diff options
author | Eugene Surovegin <ebs@ebshome.net> | 2006-04-25 04:22:44 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-04-28 07:04:56 -0400 |
commit | 30aacebed0f0619f23ce84df7c59ad033ca08d77 (patch) | |
tree | fb32292e6804fdab515227a0b7d9722e9595d532 /arch/ppc | |
parent | 1269277a5e7c6d7ae1852e648a8bcdb78035e9fa (diff) |
[PATCH] ppc32: add 440GX erratum 440_43 workaround
This patch adds workaround for PPC 440GX erratum 440_43. According to
this erratum spurious MachineChecks (caused by L1 cache parity) can
happen during DataTLB miss processing. We disable L1 cache parity
checking for 440GX rev.C and rev.F
Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc')
-rw-r--r-- | arch/ppc/platforms/4xx/ocotea.c | 2 | ||||
-rw-r--r-- | arch/ppc/syslib/ibm440gx_common.c | 13 | ||||
-rw-r--r-- | arch/ppc/syslib/ibm440gx_common.h | 4 |
3 files changed, 17 insertions, 2 deletions
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c index f841972f1fa9..554776d4b8ac 100644 --- a/arch/ppc/platforms/4xx/ocotea.c +++ b/arch/ppc/platforms/4xx/ocotea.c | |||
@@ -331,7 +331,7 @@ static void __init ocotea_init(void) | |||
331 | void __init platform_init(unsigned long r3, unsigned long r4, | 331 | void __init platform_init(unsigned long r3, unsigned long r4, |
332 | unsigned long r5, unsigned long r6, unsigned long r7) | 332 | unsigned long r5, unsigned long r6, unsigned long r7) |
333 | { | 333 | { |
334 | ibm44x_platform_init(r3, r4, r5, r6, r7); | 334 | ibm440gx_platform_init(r3, r4, r5, r6, r7); |
335 | 335 | ||
336 | ppc_md.setup_arch = ocotea_setup_arch; | 336 | ppc_md.setup_arch = ocotea_setup_arch; |
337 | ppc_md.show_cpuinfo = ocotea_show_cpuinfo; | 337 | ppc_md.show_cpuinfo = ocotea_show_cpuinfo; |
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c index a7dd55f1c63e..f6cc16888527 100644 --- a/arch/ppc/syslib/ibm440gx_common.c +++ b/arch/ppc/syslib/ibm440gx_common.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * PPC440GX system library | 2 | * PPC440GX system library |
3 | * | 3 | * |
4 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> | 4 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
5 | * Copyright (c) 2003, 2004 Zultys Technologies | 5 | * Copyright (c) 2003 - 2006 Zultys Technologies |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
8 | * under the terms of the GNU General Public License as published by the | 8 | * under the terms of the GNU General Public License as published by the |
@@ -282,3 +282,14 @@ int ibm440gx_show_cpuinfo(struct seq_file *m){ | |||
282 | return 0; | 282 | return 0; |
283 | } | 283 | } |
284 | 284 | ||
285 | void __init ibm440gx_platform_init(unsigned long r3, unsigned long r4, | ||
286 | unsigned long r5, unsigned long r6, | ||
287 | unsigned long r7) | ||
288 | { | ||
289 | /* Erratum 440_43 workaround, disable L1 cache parity checking */ | ||
290 | if (!strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") || | ||
291 | !strcmp(cur_cpu_spec->cpu_name, "440GX Rev. F")) | ||
292 | mtspr(SPRN_CCR1, mfspr(SPRN_CCR1) | CCR1_DPC); | ||
293 | |||
294 | ibm44x_platform_init(r3, r4, r5, r6, r7); | ||
295 | } | ||
diff --git a/arch/ppc/syslib/ibm440gx_common.h b/arch/ppc/syslib/ibm440gx_common.h index a2ab9fab8e34..a03ec6022e8f 100644 --- a/arch/ppc/syslib/ibm440gx_common.h +++ b/arch/ppc/syslib/ibm440gx_common.h | |||
@@ -29,6 +29,10 @@ | |||
29 | void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk, | 29 | void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk, |
30 | unsigned int ser_clk) __init; | 30 | unsigned int ser_clk) __init; |
31 | 31 | ||
32 | /* common 440GX platform init */ | ||
33 | void ibm440gx_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | ||
34 | unsigned long r6, unsigned long r7) __init; | ||
35 | |||
32 | /* Enable L2 cache */ | 36 | /* Enable L2 cache */ |
33 | void ibm440gx_l2c_enable(void) __init; | 37 | void ibm440gx_l2c_enable(void) __init; |
34 | 38 | ||