aboutsummaryrefslogtreecommitdiffstats
path: root/arch/ppc
diff options
context:
space:
mode:
authorDmitry Torokhov <dtor_core@ameritech.net>2006-04-02 00:08:05 -0500
committerDmitry Torokhov <dtor_core@ameritech.net>2006-04-02 00:08:05 -0500
commit95d465fd750897ab32462a6702fbfe1b122cbbc0 (patch)
tree65c38b2f11c51bb6932e44dd6c92f15b0091abfe /arch/ppc
parent642fde17dceceb56c7ba2762733ac688666ae657 (diff)
parent683aa4012f53b2ada0f430487e05d37b0d94e90a (diff)
Manual merge with Linus.
Conflicts: arch/powerpc/kernel/setup-common.c drivers/input/keyboard/hil_kbd.c drivers/input/mouse/hil_ptr.c
Diffstat (limited to 'arch/ppc')
-rw-r--r--arch/ppc/4xx_io/serial_sicc.c5
-rw-r--r--arch/ppc/8xx_io/commproc.c6
-rw-r--r--arch/ppc/8xx_io/cs4218_tdm.c10
-rw-r--r--arch/ppc/Kconfig144
-rw-r--r--arch/ppc/Kconfig.debug9
-rw-r--r--arch/ppc/Makefile8
-rw-r--r--arch/ppc/amiga/amiints.c2
-rw-r--r--arch/ppc/amiga/bootinfo.c2
-rw-r--r--arch/ppc/amiga/cia.c2
-rw-r--r--arch/ppc/amiga/config.c2
-rw-r--r--arch/ppc/amiga/ints.c2
-rw-r--r--arch/ppc/boot/Makefile12
-rw-r--r--arch/ppc/boot/common/Makefile3
-rw-r--r--arch/ppc/boot/common/bootinfo.c2
-rw-r--r--arch/ppc/boot/common/misc-common.c2
-rw-r--r--arch/ppc/boot/common/ns16550.c3
-rw-r--r--arch/ppc/boot/common/serial_stub.c2
-rw-r--r--arch/ppc/boot/common/util.S2
-rw-r--r--arch/ppc/boot/include/mpc10x.h2
-rw-r--r--arch/ppc/boot/openfirmware/Makefile106
-rw-r--r--arch/ppc/boot/openfirmware/chrpmain.c101
-rw-r--r--arch/ppc/boot/openfirmware/common.c146
-rw-r--r--arch/ppc/boot/openfirmware/dummy.c4
-rw-r--r--arch/ppc/boot/openfirmware/misc.S67
-rw-r--r--arch/ppc/boot/openfirmware/start.c172
-rw-r--r--arch/ppc/boot/simple/Makefile1
-rw-r--r--arch/ppc/boot/simple/cpc700_memory.c2
-rw-r--r--arch/ppc/boot/simple/embed_config.c7
-rw-r--r--arch/ppc/boot/simple/head.S9
-rw-r--r--arch/ppc/boot/simple/misc-chestnut.c2
-rw-r--r--arch/ppc/boot/simple/misc-cpci690.c2
-rw-r--r--arch/ppc/boot/simple/misc-ev64260.c2
-rw-r--r--arch/ppc/boot/simple/misc-ev64360.c1
-rw-r--r--arch/ppc/boot/simple/misc-katana.c2
-rw-r--r--arch/ppc/boot/simple/misc-mv64x60.c2
-rw-r--r--arch/ppc/boot/simple/misc-prep.c2
-rw-r--r--arch/ppc/boot/simple/misc-radstone_ppc7d.c2
-rw-r--r--arch/ppc/boot/simple/misc-spruce.c2
-rw-r--r--arch/ppc/boot/simple/misc.c2
-rw-r--r--arch/ppc/boot/simple/mpc10x_memory.c6
-rw-r--r--arch/ppc/boot/simple/mpc52xx_tty.c2
-rw-r--r--arch/ppc/boot/simple/mv64x60_tty.c2
-rw-r--r--arch/ppc/boot/simple/openbios.c2
-rw-r--r--arch/ppc/boot/simple/relocate.S4
-rw-r--r--arch/ppc/boot/utils/addnote.c175
-rw-r--r--arch/ppc/boot/utils/hack-coff.c84
-rw-r--r--arch/ppc/boot/utils/mkbugboot.c2
-rw-r--r--arch/ppc/boot/utils/mknote.c44
-rw-r--r--arch/ppc/configs/ibmchrp_defconfig875
-rw-r--r--arch/ppc/configs/ml300_defconfig739
-rw-r--r--arch/ppc/configs/ml403_defconfig740
-rw-r--r--arch/ppc/configs/pmac_defconfig1591
-rw-r--r--arch/ppc/configs/power3_defconfig1035
-rw-r--r--arch/ppc/configs/prep_defconfig (renamed from arch/ppc/configs/common_defconfig)0
-rw-r--r--arch/ppc/kernel/Makefile28
-rw-r--r--arch/ppc/kernel/cpu_setup_6xx.S474
-rw-r--r--arch/ppc/kernel/dma-mapping.c4
-rw-r--r--arch/ppc/kernel/entry.S60
-rw-r--r--arch/ppc/kernel/head.S183
-rw-r--r--arch/ppc/kernel/head_44x.S2
-rw-r--r--arch/ppc/kernel/head_8xx.S2
-rw-r--r--arch/ppc/kernel/head_fsl_booke.S6
-rw-r--r--arch/ppc/kernel/idle.c112
-rw-r--r--arch/ppc/kernel/idle_6xx.S233
-rw-r--r--arch/ppc/kernel/idle_power4.S91
-rw-r--r--arch/ppc/kernel/l2cr.S471
-rw-r--r--arch/ppc/kernel/module.c320
-rw-r--r--arch/ppc/kernel/pci.c396
-rw-r--r--arch/ppc/kernel/perfmon_fsl_booke.c222
-rw-r--r--arch/ppc/kernel/ppc_htab.c10
-rw-r--r--arch/ppc/kernel/ppc_ksyms.c26
-rw-r--r--arch/ppc/kernel/setup.c264
-rw-r--r--arch/ppc/kernel/smp-tbsync.c3
-rw-r--r--arch/ppc/kernel/smp.c2
-rw-r--r--arch/ppc/kernel/swsusp.S349
-rw-r--r--arch/ppc/kernel/temp.c271
-rw-r--r--arch/ppc/kernel/traps.c2
-rw-r--r--arch/ppc/lib/rheap.c2
-rw-r--r--arch/ppc/lib/strcase.c3
-rw-r--r--arch/ppc/math-emu/Makefile13
-rw-r--r--arch/ppc/math-emu/double.h129
-rw-r--r--arch/ppc/math-emu/fabs.c18
-rw-r--r--arch/ppc/math-emu/fadd.c38
-rw-r--r--arch/ppc/math-emu/fadds.c39
-rw-r--r--arch/ppc/math-emu/fcmpo.c46
-rw-r--r--arch/ppc/math-emu/fcmpu.c42
-rw-r--r--arch/ppc/math-emu/fctiw.c25
-rw-r--r--arch/ppc/math-emu/fctiwz.c32
-rw-r--r--arch/ppc/math-emu/fdiv.c53
-rw-r--r--arch/ppc/math-emu/fdivs.c55
-rw-r--r--arch/ppc/math-emu/fmadd.c48
-rw-r--r--arch/ppc/math-emu/fmadds.c49
-rw-r--r--arch/ppc/math-emu/fmr.c18
-rw-r--r--arch/ppc/math-emu/fmsub.c51
-rw-r--r--arch/ppc/math-emu/fmsubs.c52
-rw-r--r--arch/ppc/math-emu/fmul.c42
-rw-r--r--arch/ppc/math-emu/fmuls.c43
-rw-r--r--arch/ppc/math-emu/fnabs.c18
-rw-r--r--arch/ppc/math-emu/fneg.c18
-rw-r--r--arch/ppc/math-emu/fnmadd.c51
-rw-r--r--arch/ppc/math-emu/fnmadds.c52
-rw-r--r--arch/ppc/math-emu/fnmsub.c54
-rw-r--r--arch/ppc/math-emu/fnmsubs.c55
-rw-r--r--arch/ppc/math-emu/fres.c12
-rw-r--r--arch/ppc/math-emu/frsp.c25
-rw-r--r--arch/ppc/math-emu/frsqrte.c12
-rw-r--r--arch/ppc/math-emu/fsel.c38
-rw-r--r--arch/ppc/math-emu/fsqrt.c37
-rw-r--r--arch/ppc/math-emu/fsqrts.c38
-rw-r--r--arch/ppc/math-emu/fsub.c41
-rw-r--r--arch/ppc/math-emu/fsubs.c42
-rw-r--r--arch/ppc/math-emu/lfd.c19
-rw-r--r--arch/ppc/math-emu/lfs.c37
-rw-r--r--arch/ppc/math-emu/math.c485
-rw-r--r--arch/ppc/math-emu/mcrfs.c31
-rw-r--r--arch/ppc/math-emu/mffs.c17
-rw-r--r--arch/ppc/math-emu/mtfsb0.c18
-rw-r--r--arch/ppc/math-emu/mtfsb1.c18
-rw-r--r--arch/ppc/math-emu/mtfsf.c45
-rw-r--r--arch/ppc/math-emu/mtfsfi.c23
-rw-r--r--arch/ppc/math-emu/op-1.h245
-rw-r--r--arch/ppc/math-emu/op-2.h433
-rw-r--r--arch/ppc/math-emu/op-4.h297
-rw-r--r--arch/ppc/math-emu/op-common.h688
-rw-r--r--arch/ppc/math-emu/sfp-machine.h377
-rw-r--r--arch/ppc/math-emu/single.h66
-rw-r--r--arch/ppc/math-emu/soft-fp.h104
-rw-r--r--arch/ppc/math-emu/stfd.c20
-rw-r--r--arch/ppc/math-emu/stfiwx.c16
-rw-r--r--arch/ppc/math-emu/stfs.c41
-rw-r--r--arch/ppc/math-emu/types.c51
-rw-r--r--arch/ppc/math-emu/udivmodti4.c191
-rw-r--r--arch/ppc/mm/44x_mmu.c4
-rw-r--r--arch/ppc/mm/fault.c32
-rw-r--r--arch/ppc/mm/hashtable.S36
-rw-r--r--arch/ppc/mm/init.c19
-rw-r--r--arch/ppc/mm/mmu_context.c2
-rw-r--r--arch/ppc/mm/pgtable.c8
-rw-r--r--arch/ppc/mm/ppc_mmu.c28
-rw-r--r--arch/ppc/platforms/4xx/Kconfig23
-rw-r--r--arch/ppc/platforms/4xx/Makefile4
-rw-r--r--arch/ppc/platforms/4xx/bamboo.c2
-rw-r--r--arch/ppc/platforms/4xx/bamboo.h2
-rw-r--r--arch/ppc/platforms/4xx/bubinga.h2
-rw-r--r--arch/ppc/platforms/4xx/cpci405.c2
-rw-r--r--arch/ppc/platforms/4xx/ebony.c2
-rw-r--r--arch/ppc/platforms/4xx/ebony.h2
-rw-r--r--arch/ppc/platforms/4xx/ep405.c2
-rw-r--r--arch/ppc/platforms/4xx/ep405.h2
-rw-r--r--arch/ppc/platforms/4xx/ibm405ep.c2
-rw-r--r--arch/ppc/platforms/4xx/ibm405ep.h2
-rw-r--r--arch/ppc/platforms/4xx/ibm405gp.h2
-rw-r--r--arch/ppc/platforms/4xx/ibm405gpr.c2
-rw-r--r--arch/ppc/platforms/4xx/ibm405gpr.h2
-rw-r--r--arch/ppc/platforms/4xx/ibm440ep.c2
-rw-r--r--arch/ppc/platforms/4xx/ibm440ep.h2
-rw-r--r--arch/ppc/platforms/4xx/ibm440gp.c2
-rw-r--r--arch/ppc/platforms/4xx/ibm440gp.h2
-rw-r--r--arch/ppc/platforms/4xx/ibm440gx.c2
-rw-r--r--arch/ppc/platforms/4xx/ibm440gx.h2
-rw-r--r--arch/ppc/platforms/4xx/ibm440sp.c2
-rw-r--r--arch/ppc/platforms/4xx/ibm440sp.h2
-rw-r--r--arch/ppc/platforms/4xx/ibmnp405h.c2
-rw-r--r--arch/ppc/platforms/4xx/ibmnp405h.h2
-rw-r--r--arch/ppc/platforms/4xx/ibmstb4.c2
-rw-r--r--arch/ppc/platforms/4xx/ibmstb4.h2
-rw-r--r--arch/ppc/platforms/4xx/ibmstbx25.c2
-rw-r--r--arch/ppc/platforms/4xx/ibmstbx25.h2
-rw-r--r--arch/ppc/platforms/4xx/luan.c2
-rw-r--r--arch/ppc/platforms/4xx/luan.h2
-rw-r--r--arch/ppc/platforms/4xx/ocotea.c2
-rw-r--r--arch/ppc/platforms/4xx/ocotea.h2
-rw-r--r--arch/ppc/platforms/4xx/ppc440spe.c2
-rw-r--r--arch/ppc/platforms/4xx/ppc440spe.h2
-rw-r--r--arch/ppc/platforms/4xx/redwood5.c2
-rw-r--r--arch/ppc/platforms/4xx/redwood5.h2
-rw-r--r--arch/ppc/platforms/4xx/redwood6.c2
-rw-r--r--arch/ppc/platforms/4xx/redwood6.h2
-rw-r--r--arch/ppc/platforms/4xx/sycamore.c2
-rw-r--r--arch/ppc/platforms/4xx/sycamore.h2
-rw-r--r--arch/ppc/platforms/4xx/virtex-ii_pro.c60
-rw-r--r--arch/ppc/platforms/4xx/virtex-ii_pro.h99
-rw-r--r--arch/ppc/platforms/4xx/virtex.c56
-rw-r--r--arch/ppc/platforms/4xx/virtex.h35
-rw-r--r--arch/ppc/platforms/4xx/walnut.c2
-rw-r--r--arch/ppc/platforms/4xx/walnut.h2
-rw-r--r--arch/ppc/platforms/4xx/xilinx_ml300.c76
-rw-r--r--arch/ppc/platforms/4xx/xilinx_ml300.h6
-rw-r--r--arch/ppc/platforms/4xx/xilinx_ml403.c177
-rw-r--r--arch/ppc/platforms/4xx/xilinx_ml403.h49
-rw-r--r--arch/ppc/platforms/4xx/xparameters/xparameters.h37
-rw-r--r--arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h243
-rw-r--r--arch/ppc/platforms/4xx/yucca.c2
-rw-r--r--arch/ppc/platforms/4xx/yucca.h2
-rw-r--r--arch/ppc/platforms/83xx/mpc834x_sys.c2
-rw-r--r--arch/ppc/platforms/83xx/mpc834x_sys.h4
-rw-r--r--arch/ppc/platforms/85xx/mpc8540_ads.c2
-rw-r--r--arch/ppc/platforms/85xx/mpc8540_ads.h2
-rw-r--r--arch/ppc/platforms/85xx/mpc8555_cds.h2
-rw-r--r--arch/ppc/platforms/85xx/mpc8560_ads.c2
-rw-r--r--arch/ppc/platforms/85xx/mpc8560_ads.h2
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_ads_common.c2
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_ads_common.h2
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_cds_common.c2
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_cds_common.h2
-rw-r--r--arch/ppc/platforms/85xx/sbc8560.c2
-rw-r--r--arch/ppc/platforms/85xx/sbc8560.h2
-rw-r--r--arch/ppc/platforms/85xx/sbc85xx.c2
-rw-r--r--arch/ppc/platforms/85xx/sbc85xx.h2
-rw-r--r--arch/ppc/platforms/85xx/stx_gp3.c2
-rw-r--r--arch/ppc/platforms/85xx/stx_gp3.h2
-rw-r--r--arch/ppc/platforms/85xx/tqm85xx.c2
-rw-r--r--arch/ppc/platforms/85xx/tqm85xx.h2
-rw-r--r--arch/ppc/platforms/Makefile15
-rw-r--r--arch/ppc/platforms/apus_setup.c2
-rw-r--r--arch/ppc/platforms/chestnut.c2
-rw-r--r--arch/ppc/platforms/chestnut.h2
-rw-r--r--arch/ppc/platforms/chrp_nvram.c83
-rw-r--r--arch/ppc/platforms/chrp_pci.c309
-rw-r--r--arch/ppc/platforms/chrp_pegasos_eth.c213
-rw-r--r--arch/ppc/platforms/chrp_setup.c671
-rw-r--r--arch/ppc/platforms/chrp_smp.c99
-rw-r--r--arch/ppc/platforms/chrp_time.c253
-rw-r--r--arch/ppc/platforms/cpci690.c4
-rw-r--r--arch/ppc/platforms/cpci690.h2
-rw-r--r--arch/ppc/platforms/ev64260.c4
-rw-r--r--arch/ppc/platforms/ev64260.h2
-rw-r--r--arch/ppc/platforms/ev64360.c4
-rw-r--r--arch/ppc/platforms/ev64360.h2
-rw-r--r--arch/ppc/platforms/fads.h2
-rw-r--r--arch/ppc/platforms/gemini.h3
-rw-r--r--arch/ppc/platforms/gemini_prom.S2
-rw-r--r--arch/ppc/platforms/gemini_setup.c2
-rw-r--r--arch/ppc/platforms/hdpu.c10
-rw-r--r--arch/ppc/platforms/hdpu.h2
-rw-r--r--arch/ppc/platforms/katana.c7
-rw-r--r--arch/ppc/platforms/katana.h2
-rw-r--r--arch/ppc/platforms/lite5200.c73
-rw-r--r--arch/ppc/platforms/lite5200.h2
-rw-r--r--arch/ppc/platforms/lopec.c2
-rw-r--r--arch/ppc/platforms/mpc8272ads_setup.c236
-rw-r--r--arch/ppc/platforms/mpc866ads_setup.c273
-rw-r--r--arch/ppc/platforms/mpc885ads_setup.c389
-rw-r--r--arch/ppc/platforms/mvme5100.c2
-rw-r--r--arch/ppc/platforms/pal4.h2
-rw-r--r--arch/ppc/platforms/pal4_pci.c2
-rw-r--r--arch/ppc/platforms/pal4_serial.h2
-rw-r--r--arch/ppc/platforms/pal4_setup.c2
-rw-r--r--arch/ppc/platforms/powerpmc250.c2
-rw-r--r--arch/ppc/platforms/pplus.c2
-rw-r--r--arch/ppc/platforms/pplus.h2
-rw-r--r--arch/ppc/platforms/pq2ads.c2
-rw-r--r--arch/ppc/platforms/pq2ads.h4
-rw-r--r--arch/ppc/platforms/pq2ads_pd.h114
-rw-r--r--arch/ppc/platforms/prep_setup.c16
-rw-r--r--arch/ppc/platforms/prpmc750.c2
-rw-r--r--arch/ppc/platforms/prpmc800.c2
-rw-r--r--arch/ppc/platforms/radstone_ppc7d.c7
-rw-r--r--arch/ppc/platforms/radstone_ppc7d.h2
-rw-r--r--arch/ppc/platforms/sandpoint.c2
-rw-r--r--arch/ppc/platforms/sandpoint.h2
-rw-r--r--arch/ppc/platforms/sbc82xx.c2
-rw-r--r--arch/ppc/platforms/spruce.c2
-rw-r--r--arch/ppc/platforms/tqm8260_setup.c2
-rw-r--r--arch/ppc/syslib/Makefile6
-rw-r--r--arch/ppc/syslib/cpc700.h2
-rw-r--r--arch/ppc/syslib/cpc700_pic.c2
-rw-r--r--arch/ppc/syslib/cpc710.h2
-rw-r--r--arch/ppc/syslib/gen550.h2
-rw-r--r--arch/ppc/syslib/gen550_dbg.c2
-rw-r--r--arch/ppc/syslib/gen550_kgdb.c2
-rw-r--r--arch/ppc/syslib/gt64260_pic.c2
-rw-r--r--arch/ppc/syslib/harrier.c2
-rw-r--r--arch/ppc/syslib/hawk_common.c2
-rw-r--r--arch/ppc/syslib/ibm440gp_common.c2
-rw-r--r--arch/ppc/syslib/ibm440gp_common.h2
-rw-r--r--arch/ppc/syslib/ibm440gx_common.c2
-rw-r--r--arch/ppc/syslib/ibm440gx_common.h2
-rw-r--r--arch/ppc/syslib/ibm440sp_common.c2
-rw-r--r--arch/ppc/syslib/ibm440sp_common.h2
-rw-r--r--arch/ppc/syslib/ibm44x_common.c2
-rw-r--r--arch/ppc/syslib/ibm44x_common.h2
-rw-r--r--arch/ppc/syslib/m8260_pci_erratum9.c2
-rw-r--r--arch/ppc/syslib/m8260_setup.c2
-rw-r--r--arch/ppc/syslib/m8xx_setup.c65
-rw-r--r--arch/ppc/syslib/m8xx_wdt.c3
-rw-r--r--arch/ppc/syslib/mpc10x_common.c2
-rw-r--r--arch/ppc/syslib/mpc52xx_devices.c2
-rw-r--r--arch/ppc/syslib/mpc52xx_pci.c5
-rw-r--r--arch/ppc/syslib/mpc52xx_pci.h2
-rw-r--r--arch/ppc/syslib/mpc52xx_pic.c2
-rw-r--r--arch/ppc/syslib/mpc52xx_setup.c50
-rw-r--r--arch/ppc/syslib/mpc52xx_sys.c2
-rw-r--r--arch/ppc/syslib/mpc83xx_devices.c2
-rw-r--r--arch/ppc/syslib/mpc83xx_sys.c2
-rw-r--r--arch/ppc/syslib/mpc85xx_devices.c2
-rw-r--r--arch/ppc/syslib/mpc85xx_sys.c2
-rw-r--r--arch/ppc/syslib/mpc8xx_devices.c2
-rw-r--r--arch/ppc/syslib/mpc8xx_sys.c2
-rw-r--r--arch/ppc/syslib/mv64360_pic.c2
-rw-r--r--arch/ppc/syslib/mv64x60.c2
-rw-r--r--arch/ppc/syslib/mv64x60_dbg.c2
-rw-r--r--arch/ppc/syslib/mv64x60_win.c2
-rw-r--r--arch/ppc/syslib/ocp.c3
-rw-r--r--arch/ppc/syslib/open_pic.c4
-rw-r--r--arch/ppc/syslib/open_pic2.c2
-rw-r--r--arch/ppc/syslib/open_pic_defs.h2
-rw-r--r--arch/ppc/syslib/pci_auto.c2
-rw-r--r--arch/ppc/syslib/ppc4xx_dma.c2
-rw-r--r--arch/ppc/syslib/ppc4xx_pic.c2
-rw-r--r--arch/ppc/syslib/ppc4xx_pm.c47
-rw-r--r--arch/ppc/syslib/ppc4xx_sgdma.c2
-rw-r--r--arch/ppc/syslib/ppc83xx_setup.c2
-rw-r--r--arch/ppc/syslib/ppc83xx_setup.h2
-rw-r--r--arch/ppc/syslib/ppc85xx_common.c2
-rw-r--r--arch/ppc/syslib/ppc85xx_common.h2
-rw-r--r--arch/ppc/syslib/ppc85xx_setup.c4
-rw-r--r--arch/ppc/syslib/ppc85xx_setup.h2
-rw-r--r--arch/ppc/syslib/ppc_sys.c179
-rw-r--r--arch/ppc/syslib/pq2_devices.c2
-rw-r--r--arch/ppc/syslib/pq2_sys.c2
-rw-r--r--arch/ppc/syslib/prep_nvram.c2
-rw-r--r--arch/ppc/syslib/prom.c1429
-rw-r--r--arch/ppc/syslib/prom_init.c1011
-rw-r--r--arch/ppc/syslib/todc_time.c2
-rw-r--r--arch/ppc/syslib/xilinx_pic.c4
-rw-r--r--arch/ppc/xmon/start.c2
327 files changed, 3700 insertions, 17376 deletions
diff --git a/arch/ppc/4xx_io/serial_sicc.c b/arch/ppc/4xx_io/serial_sicc.c
index 8ace2a1f3b48..98b25fa0049a 100644
--- a/arch/ppc/4xx_io/serial_sicc.c
+++ b/arch/ppc/4xx_io/serial_sicc.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/4xx_io/serial_sicc.c
3 *
4 * Driver for IBM STB3xxx SICC serial port 2 * Driver for IBM STB3xxx SICC serial port
5 * 3 *
6 * Based on drivers/char/serial_amba.c, by ARM Ltd. 4 * Based on drivers/char/serial_amba.c, by ARM Ltd.
@@ -1639,9 +1637,8 @@ static struct SICC_info *siccuart_get(int line)
1639 state->count++; 1637 state->count++;
1640 if (state->info) 1638 if (state->info)
1641 return state->info; 1639 return state->info;
1642 info = kmalloc(sizeof(struct SICC_info), GFP_KERNEL); 1640 info = kzalloc(sizeof(struct SICC_info), GFP_KERNEL);
1643 if (info) { 1641 if (info) {
1644 memset(info, 0, sizeof(struct SICC_info));
1645 init_waitqueue_head(&info->open_wait); 1642 init_waitqueue_head(&info->open_wait);
1646 init_waitqueue_head(&info->close_wait); 1643 init_waitqueue_head(&info->close_wait);
1647 init_waitqueue_head(&info->delta_msr_wait); 1644 init_waitqueue_head(&info->delta_msr_wait);
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
index 579cd40258b9..12b84ca51327 100644
--- a/arch/ppc/8xx_io/commproc.c
+++ b/arch/ppc/8xx_io/commproc.c
@@ -73,7 +73,7 @@ cpm_mask_irq(unsigned int irq)
73{ 73{
74 int cpm_vec = irq - CPM_IRQ_OFFSET; 74 int cpm_vec = irq - CPM_IRQ_OFFSET;
75 75
76 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) & ~(1 << cpm_vec)); 76 clrbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
77} 77}
78 78
79static void 79static void
@@ -81,7 +81,7 @@ cpm_unmask_irq(unsigned int irq)
81{ 81{
82 int cpm_vec = irq - CPM_IRQ_OFFSET; 82 int cpm_vec = irq - CPM_IRQ_OFFSET;
83 83
84 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) | (1 << cpm_vec)); 84 setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
85} 85}
86 86
87static void 87static void
@@ -198,7 +198,7 @@ cpm_interrupt_init(void)
198 if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction)) 198 if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction))
199 panic("Could not allocate CPM error IRQ!"); 199 panic("Could not allocate CPM error IRQ!");
200 200
201 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr) | CICR_IEN); 201 setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, CICR_IEN);
202} 202}
203 203
204/* 204/*
diff --git a/arch/ppc/8xx_io/cs4218_tdm.c b/arch/ppc/8xx_io/cs4218_tdm.c
index 49eb2a7e65c0..a892356d5c3b 100644
--- a/arch/ppc/8xx_io/cs4218_tdm.c
+++ b/arch/ppc/8xx_io/cs4218_tdm.c
@@ -126,11 +126,11 @@ static int numReadBufs = 4, readbufSize = 32;
126*/ 126*/
127static volatile cbd_t *rx_base, *rx_cur, *tx_base, *tx_cur; 127static volatile cbd_t *rx_base, *rx_cur, *tx_base, *tx_cur;
128 128
129MODULE_PARM(catchRadius, "i"); 129module_param(catchRadius, int, 0);
130MODULE_PARM(numBufs, "i"); 130module_param(numBufs, int, 0);
131MODULE_PARM(bufSize, "i"); 131module_param(bufSize, int, 0);
132MODULE_PARM(numreadBufs, "i"); 132module_param(numreadBufs, int, 0);
133MODULE_PARM(readbufSize, "i"); 133module_param(readbufSize, int, 0);
134 134
135#define arraysize(x) (sizeof(x)/sizeof(*(x))) 135#define arraysize(x) (sizeof(x)/sizeof(*(x)))
136#define le2be16(x) (((x)<<8 & 0xff00) | ((x)>>8 & 0x00ff)) 136#define le2be16(x) (((x)<<8 & 0xff00) | ((x)>>8 & 0x00ff))
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 11899f06bf06..e9a8f5d1dfcd 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -19,6 +19,10 @@ config RWSEM_XCHGADD_ALGORITHM
19 bool 19 bool
20 default y 20 default y
21 21
22config GENERIC_HWEIGHT
23 bool
24 default y
25
22config GENERIC_CALIBRATE_DELAY 26config GENERIC_CALIBRATE_DELAY
23 bool 27 bool
24 default y 28 default y
@@ -57,15 +61,15 @@ config 6xx
57 select PPC_FPU 61 select PPC_FPU
58 help 62 help
59 There are four types of PowerPC chips supported. The more common 63 There are four types of PowerPC chips supported. The more common
60 types (601, 603, 604, 740, 750, 7400), the Motorola embedded 64 types (601, 603, 604, 740, 750, 7400), the older Freescale
61 versions (821, 823, 850, 855, 860, 52xx, 82xx, 83xx), the IBM 65 (formerly Motorola) embedded versions (821, 823, 850, 855, 860,
62 embedded versions (403 and 405) and the POWER3 processor. 66 52xx, 82xx, 83xx), the IBM embedded versions (403 and 405) and
63 (For support for more recent 64-bit processors, set ARCH=powerpc.) 67 the Book E embedded processors from IBM (44x) and Freescale (85xx).
68 For support for 64-bit processors, set ARCH=powerpc.
64 Unless you are building a kernel for one of the embedded processor 69 Unless you are building a kernel for one of the embedded processor
65 systems or a POWER3-based IBM RS/6000, choose 6xx. 70 systems, choose 6xx.
66 Note that the kernel runs in 32-bit mode even on 64-bit chips. 71 Also note that because the 52xx, 82xx, & 83xx family have a 603e
67 Also note that because the 52xx, 82xx, & 83xx family has a 603e core, 72 core, specific support for that chipset is asked later on.
68 specific support for that chipset is asked later on.
69 73
70config 40x 74config 40x
71 bool "40x" 75 bool "40x"
@@ -73,10 +77,6 @@ config 40x
73config 44x 77config 44x
74 bool "44x" 78 bool "44x"
75 79
76config POWER3
77 select PPC_FPU
78 bool "POWER3"
79
80config 8xx 80config 8xx
81 bool "8xx" 81 bool "8xx"
82 82
@@ -248,14 +248,9 @@ config PPC601_SYNC_FIX
248source arch/ppc/platforms/4xx/Kconfig 248source arch/ppc/platforms/4xx/Kconfig
249source arch/ppc/platforms/85xx/Kconfig 249source arch/ppc/platforms/85xx/Kconfig
250 250
251config PPC64BRIDGE
252 bool
253 depends on POWER3
254 default y
255
256config PPC_STD_MMU 251config PPC_STD_MMU
257 bool 252 bool
258 depends on 6xx || POWER3 253 depends on 6xx
259 default y 254 default y
260 255
261config NOT_COHERENT_CACHE 256config NOT_COHERENT_CACHE
@@ -481,10 +476,57 @@ config WINCEPT
481 476
482endchoice 477endchoice
483 478
479menu "Freescale Ethernet driver platform-specific options"
480 depends on FS_ENET
481
482 config MPC8xx_SECOND_ETH
483 bool "Second Ethernet channel"
484 depends on (MPC885ADS || MPC86XADS)
485 default y
486 help
487 This enables support for second Ethernet on MPC885ADS and MPC86xADS boards.
488 The latter will use SCC1, for 885ADS you can select it below.
489
490 choice
491 prompt "Second Ethernet channel"
492 depends on MPC8xx_SECOND_ETH
493 default MPC8xx_SECOND_ETH_FEC2
494
495 config MPC8xx_SECOND_ETH_FEC2
496 bool "FEC2"
497 depends on MPC885ADS
498 help
499 Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2
500 (often 2-nd UART) will not work if this is enabled.
501
502 config MPC8xx_SECOND_ETH_SCC1
503 bool "SCC1"
504 depends on MPC86XADS
505 select MPC8xx_SCC_ENET_FIXED
506 help
507 Enable SCC1 to serve as 2-nd Ethernet channel. Note that SMC1
508 (often 1-nd UART) will not work if this is enabled.
509
510 config MPC8xx_SECOND_ETH_SCC3
511 bool "SCC3"
512 depends on MPC885ADS
513 help
514 Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1
515 (often 1-nd UART) will not work if this is enabled.
516
517 endchoice
518
519 config MPC8xx_SCC_ENET_FIXED
520 depends on MPC8xx_SECOND_ETH_SCC
521 default n
522 bool "Use fixed MII-less mode for SCC Ethernet"
523
524endmenu
525
484choice 526choice
485 prompt "Machine Type" 527 prompt "Machine Type"
486 depends on 6xx || POWER3 528 depends on 6xx
487 default PPC_MULTIPLATFORM 529 default PPC_PREP
488 ---help--- 530 ---help---
489 Linux currently supports several different kinds of PowerPC-based 531 Linux currently supports several different kinds of PowerPC-based
490 machines: Apple Power Macintoshes and clones (such as the Motorola 532 machines: Apple Power Macintoshes and clones (such as the Motorola
@@ -494,15 +536,14 @@ choice
494 Platform) machines (including all of the recent IBM RS/6000 and 536 Platform) machines (including all of the recent IBM RS/6000 and
495 pSeries machines), and several embedded PowerPC systems containing 537 pSeries machines), and several embedded PowerPC systems containing
496 4xx, 6xx, 7xx, 8xx, 74xx, and 82xx processors. Currently, the 538 4xx, 6xx, 7xx, 8xx, 74xx, and 82xx processors. Currently, the
497 default option is to build a kernel which works on PReP and CHRP. 539 default option is to build a kernel which works on PReP.
498 540
499 Note that support for Apple machines is now only available with 541 Note that support for Apple and CHRP machines is now only available
500 ARCH=powerpc, and has been removed from this menu. If you wish 542 with ARCH=powerpc, and has been removed from this menu. If you
501 to build a kernel for an Apple machine, exit this configuration 543 wish to build a kernel for an Apple or CHRP machine, exit this
502 process and re-run it with ARCH=powerpc. 544 configuration process and re-run it with ARCH=powerpc.
503 545
504 Select CHRP/PReP if configuring for an IBM RS/6000 or 546 Select PReP if configuring for a PReP machine.
505 pSeries machine, or a PReP machine.
506 547
507 Select Gemini if configuring for a Synergy Microsystems' Gemini 548 Select Gemini if configuring for a Synergy Microsystems' Gemini
508 series Single Board Computer. More information is available at: 549 series Single Board Computer. More information is available at:
@@ -511,8 +552,8 @@ choice
511 Select APUS if configuring for a PowerUP Amiga. More information is 552 Select APUS if configuring for a PowerUP Amiga. More information is
512 available at: <http://linux-apus.sourceforge.net/>. 553 available at: <http://linux-apus.sourceforge.net/>.
513 554
514config PPC_MULTIPLATFORM 555config PPC_PREP
515 bool "CHRP/PReP" 556 bool "PReP"
516 557
517config APUS 558config APUS
518 bool "Amiga-APUS" 559 bool "Amiga-APUS"
@@ -664,6 +705,13 @@ config LITE5200
664 much but it's only been tested on this board version. I think this 705 much but it's only been tested on this board version. I think this
665 board is also known as IceCube. 706 board is also known as IceCube.
666 707
708config LITE5200B
709 bool "Freescale LITE5200B"
710 depends LITE5200
711 help
712 Support for the LITE5200B dev board for the MPC5200 from Freescale.
713 This is the new board with 2 PCI slots.
714
667config MPC834x_SYS 715config MPC834x_SYS
668 bool "Freescale MPC834x SYS" 716 bool "Freescale MPC834x SYS"
669 help 717 help
@@ -749,25 +797,6 @@ config CPM2
749 you wish to build a kernel for a machine with a CPM2 coprocessor 797 you wish to build a kernel for a machine with a CPM2 coprocessor
750 on it (826x, 827x, 8560). 798 on it (826x, 827x, 8560).
751 799
752config PPC_CHRP
753 bool "Support for CHRP (Common Hardware Reference Platform) machines"
754 depends on PPC_MULTIPLATFORM
755 select PPC_I8259
756 select PPC_INDIRECT_PCI
757 default y
758
759config PPC_PREP
760 bool "Support for PReP (PowerPC Reference Platform) machines"
761 depends on PPC_MULTIPLATFORM
762 select PPC_I8259
763 select PPC_INDIRECT_PCI
764 default y
765
766config PPC_OF
767 bool
768 depends on PPC_CHRP
769 default y
770
771config PPC_GEN550 800config PPC_GEN550
772 bool 801 bool
773 depends on SANDPOINT || SPRUCE || PPLUS || \ 802 depends on SANDPOINT || SPRUCE || PPLUS || \
@@ -926,14 +955,6 @@ source "mm/Kconfig"
926 955
927source "fs/Kconfig.binfmt" 956source "fs/Kconfig.binfmt"
928 957
929config PROC_DEVICETREE
930 bool "Support for Open Firmware device tree in /proc"
931 depends on PPC_OF && PROC_FS
932 help
933 This option adds a device-tree directory under /proc which contains
934 an image of the device tree that the kernel copies from Open
935 Firmware. If unsure, say Y here.
936
937config PREP_RESIDUAL 958config PREP_RESIDUAL
938 bool "Support for PReP Residual Data" 959 bool "Support for PReP Residual Data"
939 depends on PPC_PREP 960 depends on PPC_PREP
@@ -1126,8 +1147,7 @@ menu "Bus options"
1126 1147
1127config ISA 1148config ISA
1128 bool "Support for ISA-bus hardware" 1149 bool "Support for ISA-bus hardware"
1129 depends on PPC_PREP || PPC_CHRP 1150 depends on PPC_PREP
1130 select PPC_I8259
1131 help 1151 help
1132 Find out whether you have ISA slots on your motherboard. ISA is the 1152 Find out whether you have ISA slots on your motherboard. ISA is the
1133 name of a bus system, i.e. the way the CPU talks to the other stuff 1153 name of a bus system, i.e. the way the CPU talks to the other stuff
@@ -1137,18 +1157,18 @@ config ISA
1137 1157
1138config GENERIC_ISA_DMA 1158config GENERIC_ISA_DMA
1139 bool 1159 bool
1140 depends on POWER3 || 6xx && !CPM2 1160 depends on 6xx && !CPM2
1141 default y 1161 default y
1142 1162
1143config PPC_I8259 1163config PPC_I8259
1144 bool 1164 bool
1145 default y if 85xx 1165 default y if 85xx || PPC_PREP
1146 default n 1166 default n
1147 1167
1148config PPC_INDIRECT_PCI 1168config PPC_INDIRECT_PCI
1149 bool 1169 bool
1150 depends on PCI 1170 depends on PCI
1151 default y if 40x || 44x || 85xx || 83xx 1171 default y if 40x || 44x || 85xx || 83xx || PPC_PREP
1152 default n 1172 default n
1153 1173
1154config EISA 1174config EISA
@@ -1339,7 +1359,7 @@ config CONSISTENT_SIZE
1339 1359
1340config BOOT_LOAD_BOOL 1360config BOOT_LOAD_BOOL
1341 bool "Set the boot link/load address" 1361 bool "Set the boot link/load address"
1342 depends on ADVANCED_OPTIONS && !PPC_MULTIPLATFORM 1362 depends on ADVANCED_OPTIONS && !PPC_PREP
1343 help 1363 help
1344 This option allows you to set the initial load address of the zImage 1364 This option allows you to set the initial load address of the zImage
1345 or zImage.initrd file. This can be useful if you are on a board 1365 or zImage.initrd file. This can be useful if you are on a board
diff --git a/arch/ppc/Kconfig.debug b/arch/ppc/Kconfig.debug
index 61653cb60c4e..f94b87740973 100644
--- a/arch/ppc/Kconfig.debug
+++ b/arch/ppc/Kconfig.debug
@@ -53,13 +53,6 @@ config BDI_SWITCH
53 Unless you are intending to debug the kernel with one of these 53 Unless you are intending to debug the kernel with one of these
54 machines, say N here. 54 machines, say N here.
55 55
56config BOOTX_TEXT
57 bool "Support for early boot text console (BootX or OpenFirmware only)"
58 depends PPC_OF
59 help
60 Say Y here to see progress messages from the boot firmware in text
61 mode. Requires either BootX or Open Firmware.
62
63config SERIAL_TEXT_DEBUG 56config SERIAL_TEXT_DEBUG
64 bool "Support for early boot texts over serial port" 57 bool "Support for early boot texts over serial port"
65 depends on 4xx || LOPEC || MV64X60 || PPLUS || PRPMC800 || \ 58 depends on 4xx || LOPEC || MV64X60 || PPLUS || PRPMC800 || \
@@ -67,7 +60,7 @@ config SERIAL_TEXT_DEBUG
67 60
68config PPC_OCP 61config PPC_OCP
69 bool 62 bool
70 depends on IBM_OCP || XILINX_OCP 63 depends on IBM_OCP
71 default y 64 default y
72 65
73endmenu 66endmenu
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 98e940beeb3b..0db66dcf0723 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -40,10 +40,8 @@ ifndef CONFIG_FSL_BOOKE
40CFLAGS += -mstring 40CFLAGS += -mstring
41endif 41endif
42 42
43cpu-as-$(CONFIG_PPC64BRIDGE) += -Wa,-mppc64bridge
44cpu-as-$(CONFIG_4xx) += -Wa,-m405 43cpu-as-$(CONFIG_4xx) += -Wa,-m405
45cpu-as-$(CONFIG_6xx) += -Wa,-maltivec 44cpu-as-$(CONFIG_6xx) += -Wa,-maltivec
46cpu-as-$(CONFIG_POWER4) += -Wa,-maltivec
47cpu-as-$(CONFIG_E500) += -Wa,-me500 45cpu-as-$(CONFIG_E500) += -Wa,-me500
48cpu-as-$(CONFIG_E200) += -Wa,-me200 46cpu-as-$(CONFIG_E200) += -Wa,-me200
49 47
@@ -59,8 +57,6 @@ head-$(CONFIG_4xx) := arch/ppc/kernel/head_4xx.o
59head-$(CONFIG_44x) := arch/ppc/kernel/head_44x.o 57head-$(CONFIG_44x) := arch/ppc/kernel/head_44x.o
60head-$(CONFIG_FSL_BOOKE) := arch/ppc/kernel/head_fsl_booke.o 58head-$(CONFIG_FSL_BOOKE) := arch/ppc/kernel/head_fsl_booke.o
61 59
62head-$(CONFIG_6xx) += arch/ppc/kernel/idle_6xx.o
63head-$(CONFIG_POWER4) += arch/ppc/kernel/idle_power4.o
64head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o 60head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o
65 61
66core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \ 62core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \
@@ -71,7 +67,7 @@ core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \
71core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/ 67core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/
72core-$(CONFIG_83xx) += arch/ppc/platforms/83xx/ 68core-$(CONFIG_83xx) += arch/ppc/platforms/83xx/
73core-$(CONFIG_85xx) += arch/ppc/platforms/85xx/ 69core-$(CONFIG_85xx) += arch/ppc/platforms/85xx/
74core-$(CONFIG_MATH_EMULATION) += arch/ppc/math-emu/ 70core-$(CONFIG_MATH_EMULATION) += arch/powerpc/math-emu/
75core-$(CONFIG_XMON) += arch/ppc/xmon/ 71core-$(CONFIG_XMON) += arch/ppc/xmon/
76core-$(CONFIG_APUS) += arch/ppc/amiga/ 72core-$(CONFIG_APUS) += arch/ppc/amiga/
77drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/ 73drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/
@@ -82,7 +78,7 @@ drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
82 78
83BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm 79BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
84 80
85.PHONY: $(BOOT_TARGETS) 81PHONY += $(BOOT_TARGETS)
86 82
87all: uImage zImage 83all: uImage zImage
88 84
diff --git a/arch/ppc/amiga/amiints.c b/arch/ppc/amiga/amiints.c
index 5f35cf3986f7..b2bba052ab93 100644
--- a/arch/ppc/amiga/amiints.c
+++ b/arch/ppc/amiga/amiints.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/ppc/amiga/amiints.c -- Amiga Linux interrupt handling code 2 * Amiga Linux interrupt handling code
3 * 3 *
4 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file COPYING in the main directory of this archive 5 * License. See the file COPYING in the main directory of this archive
diff --git a/arch/ppc/amiga/bootinfo.c b/arch/ppc/amiga/bootinfo.c
index e2e965661d03..efd869a3ed9b 100644
--- a/arch/ppc/amiga/bootinfo.c
+++ b/arch/ppc/amiga/bootinfo.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/amiga/bootinfo.c
3 *
4 * Extracted from arch/m68k/kernel/setup.c. 2 * Extracted from arch/m68k/kernel/setup.c.
5 * Should be properly generalized and put somewhere else. 3 * Should be properly generalized and put somewhere else.
6 * Jesper 4 * Jesper
diff --git a/arch/ppc/amiga/cia.c b/arch/ppc/amiga/cia.c
index 4431c58f611a..9558f2f40e64 100644
--- a/arch/ppc/amiga/cia.c
+++ b/arch/ppc/amiga/cia.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/amiga/cia.c - CIA support
3 *
4 * Copyright (C) 1996 Roman Zippel 2 * Copyright (C) 1996 Roman Zippel
5 * 3 *
6 * The concept of some functions bases on the original Amiga OS function 4 * The concept of some functions bases on the original Amiga OS function
diff --git a/arch/ppc/amiga/config.c b/arch/ppc/amiga/config.c
index 60e2da1c92c0..bbe47c9bd707 100644
--- a/arch/ppc/amiga/config.c
+++ b/arch/ppc/amiga/config.c
@@ -1,8 +1,6 @@
1#define m68k_debug_device debug_device 1#define m68k_debug_device debug_device
2 2
3/* 3/*
4 * arch/ppc/amiga/config.c
5 *
6 * Copyright (C) 1993 Hamish Macdonald 4 * Copyright (C) 1993 Hamish Macdonald
7 * 5 *
8 * This file is subject to the terms and conditions of the GNU General Public 6 * This file is subject to the terms and conditions of the GNU General Public
diff --git a/arch/ppc/amiga/ints.c b/arch/ppc/amiga/ints.c
index 5d318e498f06..083a17462190 100644
--- a/arch/ppc/amiga/ints.c
+++ b/arch/ppc/amiga/ints.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/amiga/ints.c
3 *
4 * Linux/m68k general interrupt handling code from arch/m68k/kernel/ints.c 2 * Linux/m68k general interrupt handling code from arch/m68k/kernel/ints.c
5 * Needed to drive the m68k emulating IRQ hardware on the PowerUp boards. 3 * Needed to drive the m68k emulating IRQ hardware on the PowerUp boards.
6 */ 4 */
diff --git a/arch/ppc/boot/Makefile b/arch/ppc/boot/Makefile
index efd8ce515d5f..b739e25d4728 100644
--- a/arch/ppc/boot/Makefile
+++ b/arch/ppc/boot/Makefile
@@ -1,6 +1,9 @@
1# 1#
2# arch/ppc/boot/Makefile 2# arch/ppc/boot/Makefile
3# 3#
4# This file is included by the global makefile so that you can add your own
5# architecture-specific flags and dependencies.
6#
4# This file is subject to the terms and conditions of the GNU General Public 7# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive 8# License. See the file "COPYING" in the main directory of this archive
6# for more details. 9# for more details.
@@ -16,16 +19,15 @@ HOSTCFLAGS += -Iarch/$(ARCH)/boot/include
16BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd 19BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd
17 20
18bootdir-y := simple 21bootdir-y := simple
19bootdir-$(CONFIG_PPC_OF) += openfirmware
20subdir-y := lib common images 22subdir-y := lib common images
21subdir-$(CONFIG_PPC_MULTIPLATFORM) += of1275 23subdir-$(CONFIG_PPC_PREP) += of1275
22 24
23# for cleaning 25# for cleaning
24subdir- += simple openfirmware 26subdir- += simple
25 27
26hostprogs-y := $(addprefix utils/, addnote mknote hack-coff mkprep mkbugboot mktree) 28hostprogs-y := $(addprefix utils/, mkprep mkbugboot mktree)
27 29
28.PHONY: $(BOOT_TARGETS) $(bootdir-y) 30PHONY += $(BOOT_TARGETS) $(bootdir-y)
29 31
30$(BOOT_TARGETS): $(bootdir-y) 32$(BOOT_TARGETS): $(bootdir-y)
31 33
diff --git a/arch/ppc/boot/common/Makefile b/arch/ppc/boot/common/Makefile
index f88d647d5dd4..a2e85e3beb88 100644
--- a/arch/ppc/boot/common/Makefile
+++ b/arch/ppc/boot/common/Makefile
@@ -1,6 +1,3 @@
1#
2# arch/ppc/boot/common/Makefile
3#
4# This file is subject to the terms and conditions of the GNU General Public 1# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive 2# License. See the file "COPYING" in the main directory of this archive
6# for more details. 3# for more details.
diff --git a/arch/ppc/boot/common/bootinfo.c b/arch/ppc/boot/common/bootinfo.c
index 9c6e528940e9..f4dc9b9fab9c 100644
--- a/arch/ppc/boot/common/bootinfo.c
+++ b/arch/ppc/boot/common/bootinfo.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/common/bootinfo.c
3 *
4 * General bootinfo record utilities 2 * General bootinfo record utilities
5 * Author: Randy Vinson <rvinson@mvista.com> 3 * Author: Randy Vinson <rvinson@mvista.com>
6 * 4 *
diff --git a/arch/ppc/boot/common/misc-common.c b/arch/ppc/boot/common/misc-common.c
index e79e6b3f276e..073830a8559a 100644
--- a/arch/ppc/boot/common/misc-common.c
+++ b/arch/ppc/boot/common/misc-common.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/common/misc-common.c
3 *
4 * Misc. bootloader code (almost) all platforms can use 2 * Misc. bootloader code (almost) all platforms can use
5 * 3 *
6 * Author: Johnnie Peters <jpeters@mvista.com> 4 * Author: Johnnie Peters <jpeters@mvista.com>
diff --git a/arch/ppc/boot/common/ns16550.c b/arch/ppc/boot/common/ns16550.c
index 26818bbb6cff..4f00c93ac870 100644
--- a/arch/ppc/boot/common/ns16550.c
+++ b/arch/ppc/boot/common/ns16550.c
@@ -8,6 +8,9 @@
8#include <linux/serial_reg.h> 8#include <linux/serial_reg.h>
9#include <asm/serial.h> 9#include <asm/serial.h>
10 10
11#if defined(CONFIG_XILINX_VIRTEX)
12#include <platforms/4xx/xparameters/xparameters.h>
13#endif
11#include "nonstdio.h" 14#include "nonstdio.h"
12#include "serial.h" 15#include "serial.h"
13 16
diff --git a/arch/ppc/boot/common/serial_stub.c b/arch/ppc/boot/common/serial_stub.c
index 03dfaa01fa63..5cc9ae66a8ba 100644
--- a/arch/ppc/boot/common/serial_stub.c
+++ b/arch/ppc/boot/common/serial_stub.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/common/serial_stub.c
3 *
4 * This is a few stub routines to make the boot code cleaner looking when 2 * This is a few stub routines to make the boot code cleaner looking when
5 * there is no serial port support doesn't need to be closed, for example. 3 * there is no serial port support doesn't need to be closed, for example.
6 * 4 *
diff --git a/arch/ppc/boot/common/util.S b/arch/ppc/boot/common/util.S
index 368ec035e6cd..0c5e43c4ae06 100644
--- a/arch/ppc/boot/common/util.S
+++ b/arch/ppc/boot/common/util.S
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/common/util.S
3 *
4 * Useful bootup functions, which are more easily done in asm than C. 2 * Useful bootup functions, which are more easily done in asm than C.
5 * 3 *
6 * NOTE: Be very very careful about the registers you use here. 4 * NOTE: Be very very careful about the registers you use here.
diff --git a/arch/ppc/boot/include/mpc10x.h b/arch/ppc/boot/include/mpc10x.h
index 6cd40ecabc74..6e5d540d8d3e 100644
--- a/arch/ppc/boot/include/mpc10x.h
+++ b/arch/ppc/boot/include/mpc10x.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/include/mpc10.h
3 *
4 * Common defines for the Motorola SPS MPC106/8240/107 Host bridge/Mem 2 * Common defines for the Motorola SPS MPC106/8240/107 Host bridge/Mem
5 * ctrl/EPIC/etc. 3 * ctrl/EPIC/etc.
6 * 4 *
diff --git a/arch/ppc/boot/openfirmware/Makefile b/arch/ppc/boot/openfirmware/Makefile
deleted file mode 100644
index 2a411ec2e650..000000000000
--- a/arch/ppc/boot/openfirmware/Makefile
+++ /dev/null
@@ -1,106 +0,0 @@
1# Makefile for making bootable images on various OpenFirmware machines.
2#
3# Paul Mackerras January 1997
4# XCOFF bootable images for PowerMacs
5# Geert Uytterhoeven September 1997
6# ELF bootable iamges for CHRP machines.
7# Tom Rini January 2001
8# Cleaned up, moved into arch/ppc/boot/pmac
9# Tom Rini July/August 2002
10# Merged 'chrp' and 'pmac' into 'openfirmware', and cleaned up the
11# rules.
12
13zImage.initrd znetboot.initrd: del-ramdisk-sec := -R .ramdisk
14zImage.initrd znetboot.initrd: initrd := .initrd
15
16
17boot := arch/ppc/boot
18common := $(boot)/common
19utils := $(boot)/utils
20bootlib := $(boot)/lib
21of1275 := $(boot)/of1275
22images := $(boot)/images
23
24CHRP_LD_ARGS := -T $(srctree)/$(boot)/ld.script -e _start -Ttext 0x00800000
25
26COMMONOBJS := start.o misc.o common.o
27CHRPOBJS := crt0.o $(COMMONOBJS) chrpmain.o
28
29targets := $(CHRPOBJS) dummy.o
30CHRPOBJS := $(addprefix $(obj)/, $(CHRPOBJS))
31
32LIBS := lib/lib.a $(bootlib)/lib.a $(of1275)/lib.a $(common)/lib.a
33
34ifdef CONFIG_SMP
35END := .smp
36endif
37ifdef CONFIG_PPC64BRIDGE
38END += .64
39endif
40
41
42$(images)/ramdisk.image.gz:
43 @echo ' MISSING $@'
44 @echo ' RAM disk image must be provided separately'
45 @/bin/false
46
47quiet_cmd_genimage = GEN $@
48 cmd_genimage = $(OBJCOPY) -R .comment \
49 --add-section=.image=$(images)/vmlinux.gz \
50 --set-section-flags=.image=contents,alloc,load,readonly,data $< $@
51
52targets += image.o
53$(obj)/image.o: $(obj)/dummy.o $(images)/vmlinux.gz FORCE
54 $(call if_changed,genimage)
55
56# Place the ramdisk in the initrd image.
57quiet_cmd_genimage-initrd = GEN $@
58 cmd_genimage-initrd = $(OBJCOPY) $< $@ \
59 --add-section=.ramdisk=$(images)/ramdisk.image.gz \
60 --set-section-flags=.ramdisk=contents,alloc,load,readonly,data
61targets += image.initrd.o
62$(obj)/image.initrd.o: $(obj)/image.o $(images)/ramdisk.image.gz FORCE
63 $(call if_changed,genimage-initrd)
64
65
66targets += crt0.o
67$(obj)/crt0.o: $(common)/crt0.S FORCE
68 $(call if_changed_dep,as_o_S)
69
70quiet_cmd_gen-chrp = CHRP $@
71 cmd_gen-chrp = $(LD) $(CHRP_LD_ARGS) -o $@ $(CHRPOBJS) $< $(LIBS) && \
72 $(OBJCOPY) $@ $@ -R .comment $(del-ramdisk-sec)
73
74$(images)/zImage.chrp: $(obj)/image.o $(CHRPOBJS) $(LIBS) \
75 $(srctree)/$(boot)/ld.script
76 $(call cmd,gen-chrp)
77$(images)/zImage.initrd.chrp: $(obj)/image.initrd.o $(CHRPOBJS) $(LIBS) \
78 $(srctree)/$(boot)/ld.script
79 $(call cmd,gen-chrp)
80
81quiet_cmd_addnote = ADDNOTE $@
82 cmd_addnote = cat $< > $@ && $(utils)/addnote $@
83$(images)/zImage.chrp-rs6k $(images)/zImage.initrd.chrp-rs6k: \
84 %-rs6k: %
85 $(call cmd,addnote)
86
87# The targets used on the make command-line
88
89.PHONY: zImage zImage.initrd
90zImage: $(images)/zImage.chrp \
91 $(images)/zImage.chrp-rs6k
92 @echo ' kernel: $@ is ready ($<)'
93zImage.initrd: $(images)/zImage.initrd.chrp \
94 $(images)/zImage.initrd.chrp-rs6k
95 @echo ' kernel: $@ is ready ($<)'
96
97TFTPIMAGE := /tftpboot/zImage
98
99.PHONY: znetboot znetboot.initrd
100znetboot: $(images)/zImage.chrp
101 cp $(images)/zImage.chrp $(TFTPIMAGE).chrp$(END)
102 @echo ' kernel: $@ is ready ($<)'
103znetboot.initrd:$(images)/zImage.initrd.chrp
104 cp $(images)/zImage.initrd.chrp $(TFTPIMAGE).chrp$(END)
105 @echo ' kernel: $@ is ready ($<)'
106
diff --git a/arch/ppc/boot/openfirmware/chrpmain.c b/arch/ppc/boot/openfirmware/chrpmain.c
deleted file mode 100644
index 245dbd9fc120..000000000000
--- a/arch/ppc/boot/openfirmware/chrpmain.c
+++ /dev/null
@@ -1,101 +0,0 @@
1/*
2 * Copyright (C) Paul Mackerras 1997.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#include <linux/string.h>
10#include "nonstdio.h"
11#include "of1275.h"
12#include <asm/processor.h>
13#include <asm/page.h>
14
15/* Passed from the linker */
16extern char __image_begin, __image_end;
17extern char __ramdisk_begin, __ramdisk_end;
18extern char _start, _end;
19
20extern unsigned int heap_max;
21extern void flush_cache(void *, unsigned long);
22extern void gunzip(void *, int, unsigned char *, int *);
23extern void make_bi_recs(unsigned long addr, char *name, unsigned int mach,
24 unsigned int progend);
25
26char *avail_ram;
27char *begin_avail, *end_avail;
28char *avail_high;
29
30#define RAM_START 0x00000000
31#define RAM_END (64<<20)
32
33#define BOOT_START ((unsigned long)_start)
34#define BOOT_END ((unsigned long)(_end + 0xFFF) & ~0xFFF)
35
36#define RAM_FREE ((unsigned long)(_end+0x1000)&~0xFFF)
37#define PROG_START 0x00010000
38#define PROG_SIZE 0x007f0000 /* 8MB */
39
40#define SCRATCH_SIZE (128 << 10)
41
42static char scratch[SCRATCH_SIZE]; /* 128k of scratch space for gunzip */
43
44typedef void (*kernel_start_t)(int, int, void *, unsigned int, unsigned int);
45
46void
47boot(int a1, int a2, void *prom)
48{
49 unsigned sa, len;
50 void *dst;
51 unsigned char *im;
52 unsigned int initrd_size, initrd_start;
53
54 printf("chrpboot starting: loaded at 0x%p\n\r", &_start);
55
56 initrd_size = &__ramdisk_end - &__ramdisk_begin;
57 if (initrd_size) {
58 initrd_start = (RAM_END - initrd_size) & ~0xFFF;
59 a1 = initrd_start;
60 a2 = initrd_size;
61 claim(initrd_start, RAM_END - initrd_start, 0);
62 printf("initial ramdisk moving 0x%x <- 0x%p (%x bytes)\n\r",
63 initrd_start, &__ramdisk_begin, initrd_size);
64 memcpy((char *)initrd_start, &__ramdisk_begin, initrd_size);
65 } else {
66 initrd_start = 0;
67 initrd_size = 0;
68 a2 = 0xdeadbeef;
69 }
70
71 im = &__image_begin;
72 len = &__image_end - &__image_begin;
73 /* claim 4MB starting at PROG_START */
74 claim(PROG_START, PROG_SIZE - PROG_START, 0);
75 dst = (void *) PROG_START;
76 if (im[0] == 0x1f && im[1] == 0x8b) {
77 avail_ram = scratch;
78 begin_avail = avail_high = avail_ram;
79 end_avail = scratch + sizeof(scratch);
80 printf("gunzipping (0x%p <- 0x%p:0x%p)...", dst, im, im+len);
81 gunzip(dst, PROG_SIZE - PROG_START, im, &len);
82 printf("done %u bytes\n\r", len);
83 printf("%u bytes of heap consumed, max in use %u\n\r",
84 avail_high - begin_avail, heap_max);
85 } else {
86 memmove(dst, im, len);
87 }
88
89 flush_cache(dst, len);
90 make_bi_recs(((unsigned long) dst + len), "chrpboot", _MACH_chrp,
91 (PROG_START + PROG_SIZE));
92
93 sa = PROG_START;
94 printf("start address = 0x%x\n\r", sa);
95
96 (*(kernel_start_t)sa)(a1, a2, prom, initrd_start, initrd_size);
97
98 printf("returned?\n\r");
99
100 pause();
101}
diff --git a/arch/ppc/boot/openfirmware/common.c b/arch/ppc/boot/openfirmware/common.c
deleted file mode 100644
index 0f46756a903e..000000000000
--- a/arch/ppc/boot/openfirmware/common.c
+++ /dev/null
@@ -1,146 +0,0 @@
1/*
2 * Copyright (C) Paul Mackerras 1997.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
10#include "nonstdio.h"
11#include "of1275.h"
12#include <linux/string.h>
13#include <linux/zlib.h>
14#include <asm/bootinfo.h>
15#include <asm/page.h>
16
17/* Information from the linker */
18
19extern int strcmp(const char *s1, const char *s2);
20extern char *avail_ram, *avail_high;
21extern char *end_avail;
22
23unsigned int heap_use, heap_max;
24
25struct memchunk {
26 unsigned int size;
27 struct memchunk *next;
28};
29
30static struct memchunk *freechunks;
31
32static void *zalloc(unsigned size)
33{
34 void *p;
35 struct memchunk **mpp, *mp;
36
37 size = (size + 7) & -8;
38 heap_use += size;
39 if (heap_use > heap_max)
40 heap_max = heap_use;
41 for (mpp = &freechunks; (mp = *mpp) != 0; mpp = &mp->next) {
42 if (mp->size == size) {
43 *mpp = mp->next;
44 return mp;
45 }
46 }
47 p = avail_ram;
48 avail_ram += size;
49 if (avail_ram > avail_high)
50 avail_high = avail_ram;
51 if (avail_ram > end_avail) {
52 printf("oops... out of memory\n\r");
53 pause();
54 }
55 return p;
56}
57
58#define HEAD_CRC 2
59#define EXTRA_FIELD 4
60#define ORIG_NAME 8
61#define COMMENT 0x10
62#define RESERVED 0xe0
63
64void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
65{
66 z_stream s;
67 int r, i, flags;
68
69 /* skip header */
70 i = 10;
71 flags = src[3];
72 if (src[2] != Z_DEFLATED || (flags & RESERVED) != 0) {
73 printf("bad gzipped data\n\r");
74 exit();
75 }
76 if ((flags & EXTRA_FIELD) != 0)
77 i = 12 + src[10] + (src[11] << 8);
78 if ((flags & ORIG_NAME) != 0)
79 while (src[i++] != 0)
80 ;
81 if ((flags & COMMENT) != 0)
82 while (src[i++] != 0)
83 ;
84 if ((flags & HEAD_CRC) != 0)
85 i += 2;
86 if (i >= *lenp) {
87 printf("gunzip: ran out of data in header\n\r");
88 exit();
89 }
90
91 /* Initialize ourself. */
92 s.workspace = zalloc(zlib_inflate_workspacesize());
93 r = zlib_inflateInit2(&s, -MAX_WBITS);
94 if (r != Z_OK) {
95 printf("zlib_inflateInit2 returned %d\n\r", r);
96 exit();
97 }
98 s.next_in = src + i;
99 s.avail_in = *lenp - i;
100 s.next_out = dst;
101 s.avail_out = dstlen;
102 r = zlib_inflate(&s, Z_FINISH);
103 if (r != Z_OK && r != Z_STREAM_END) {
104 printf("inflate returned %d msg: %s\n\r", r, s.msg);
105 exit();
106 }
107 *lenp = s.next_out - (unsigned char *) dst;
108 zlib_inflateEnd(&s);
109}
110
111/* Make a bi_rec in OF. We need to be passed a name for BI_BOOTLOADER_ID,
112 * a machine type for BI_MACHTYPE, and the location where the end of the
113 * bootloader is (PROG_START + PROG_SIZE)
114 */
115void make_bi_recs(unsigned long addr, char *name, unsigned int mach,
116 unsigned long progend)
117{
118 struct bi_record *rec;
119
120
121 /* leave a 1MB gap then align to the next 1MB boundary */
122 addr = _ALIGN(addr+ (1<<20) - 1, (1<<20));
123 /* oldworld machine seem very unhappy about this. -- Tom */
124 if (addr >= progend)
125 claim(addr, 0x1000, 0);
126
127 rec = (struct bi_record *)addr;
128 rec->tag = BI_FIRST;
129 rec->size = sizeof(struct bi_record);
130 rec = (struct bi_record *)((unsigned long)rec + rec->size);
131
132 rec->tag = BI_BOOTLOADER_ID;
133 sprintf( (char *)rec->data, name);
134 rec->size = sizeof(struct bi_record) + strlen(name) + 1;
135 rec = (struct bi_record *)((unsigned long)rec + rec->size);
136
137 rec->tag = BI_MACHTYPE;
138 rec->data[0] = mach;
139 rec->data[1] = 1;
140 rec->size = sizeof(struct bi_record) + 2 * sizeof(unsigned long);
141 rec = (struct bi_record *)((unsigned long)rec + rec->size);
142
143 rec->tag = BI_LAST;
144 rec->size = sizeof(struct bi_record);
145 rec = (struct bi_record *)((unsigned long)rec + rec->size);
146}
diff --git a/arch/ppc/boot/openfirmware/dummy.c b/arch/ppc/boot/openfirmware/dummy.c
deleted file mode 100644
index 31dbf45bf99c..000000000000
--- a/arch/ppc/boot/openfirmware/dummy.c
+++ /dev/null
@@ -1,4 +0,0 @@
1int main(void)
2{
3 return 0;
4}
diff --git a/arch/ppc/boot/openfirmware/misc.S b/arch/ppc/boot/openfirmware/misc.S
deleted file mode 100644
index ab9e897cadd0..000000000000
--- a/arch/ppc/boot/openfirmware/misc.S
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * Copyright (C) Paul Mackerras 1997.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9 .text
10
11/*
12 * Use the BAT2 & 3 registers to map the 1st 16MB of RAM to
13 * the address given as the 1st argument.
14 */
15 .globl setup_bats
16setup_bats:
17 mfpvr 5
18 rlwinm 5,5,16,16,31 /* r3 = 1 for 601, 4 for 604 */
19 cmpwi 0,5,1
20 li 0,0
21 bne 4f
22 mtibatl 3,0 /* invalidate BAT first */
23 ori 3,3,4 /* set up BAT registers for 601 */
24 li 4,0x7f
25 mtibatu 2,3
26 mtibatl 2,4
27 oris 3,3,0x80
28 oris 4,4,0x80
29 mtibatu 3,3
30 mtibatl 3,4
31 b 5f
324: mtdbatu 3,0 /* invalidate BATs first */
33 mtibatu 3,0
34 ori 3,3,0xff /* set up BAT registers for 604 */
35 li 4,2
36 mtdbatl 2,4
37 mtdbatu 2,3
38 mtibatl 2,4
39 mtibatu 2,3
40 oris 3,3,0x80
41 oris 4,4,0x80
42 mtdbatl 3,4
43 mtdbatu 3,3
44 mtibatl 3,4
45 mtibatu 3,3
465: sync
47 isync
48 blr
49
50/*
51 * Flush the dcache and invalidate the icache for a range of addresses.
52 *
53 * flush_cache(addr, len)
54 */
55 .global flush_cache
56flush_cache:
57 addi 4,4,0x1f /* len = (len + 0x1f) / 0x20 */
58 rlwinm. 4,4,27,5,31
59 mtctr 4
60 beqlr
611: dcbf 0,3
62 icbi 0,3
63 addi 3,3,0x20
64 bdnz 1b
65 sync
66 isync
67 blr
diff --git a/arch/ppc/boot/openfirmware/start.c b/arch/ppc/boot/openfirmware/start.c
deleted file mode 100644
index 1617a26956bf..000000000000
--- a/arch/ppc/boot/openfirmware/start.c
+++ /dev/null
@@ -1,172 +0,0 @@
1/*
2 * Copyright (C) Paul Mackerras 1997.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9#include <stdarg.h>
10#include "of1275.h"
11
12extern int strlen(const char *s);
13extern void boot(int a1, int a2, void *prom);
14
15phandle stdin;
16phandle stdout;
17phandle stderr;
18
19void printk(char *fmt, ...);
20
21void
22start(int a1, int a2, void *promptr)
23{
24 ofinit(promptr);
25 if (ofstdio(&stdin, &stdout, &stderr))
26 exit();
27
28 boot(a1, a2, promptr);
29 for (;;)
30 exit();
31}
32
33int writestring(void *f, char *ptr, int nb)
34{
35 int w = 0, i;
36 char *ret = "\r";
37
38 for (i = 0; i < nb; ++i) {
39 if (ptr[i] == '\n') {
40 if (i > w) {
41 write(f, ptr + w, i - w);
42 w = i;
43 }
44 write(f, ret, 1);
45 }
46 }
47 if (w < nb)
48 write(f, ptr + w, nb - w);
49 return nb;
50}
51
52int
53putc(int c, void *f)
54{
55 char ch = c;
56
57 return writestring(f, &ch, 1) == 1? c: -1;
58}
59
60int
61putchar(int c)
62{
63 return putc(c, stdout);
64}
65
66int
67fputs(char *str, void *f)
68{
69 int n = strlen(str);
70
71 return writestring(f, str, n) == n? 0: -1;
72}
73
74int
75readchar(void)
76{
77 char ch;
78
79 for (;;) {
80 switch (read(stdin, &ch, 1)) {
81 case 1:
82 return ch;
83 case -1:
84 printk("read(stdin) returned -1\n");
85 return -1;
86 }
87 }
88}
89
90static char line[256];
91static char *lineptr;
92static int lineleft;
93
94int
95getchar(void)
96{
97 int c;
98
99 if (lineleft == 0) {
100 lineptr = line;
101 for (;;) {
102 c = readchar();
103 if (c == -1 || c == 4)
104 break;
105 if (c == '\r' || c == '\n') {
106 *lineptr++ = '\n';
107 putchar('\n');
108 break;
109 }
110 switch (c) {
111 case 0177:
112 case '\b':
113 if (lineptr > line) {
114 putchar('\b');
115 putchar(' ');
116 putchar('\b');
117 --lineptr;
118 }
119 break;
120 case 'U' & 0x1F:
121 while (lineptr > line) {
122 putchar('\b');
123 putchar(' ');
124 putchar('\b');
125 --lineptr;
126 }
127 break;
128 default:
129 if (lineptr >= &line[sizeof(line) - 1])
130 putchar('\a');
131 else {
132 putchar(c);
133 *lineptr++ = c;
134 }
135 }
136 }
137 lineleft = lineptr - line;
138 lineptr = line;
139 }
140 if (lineleft == 0)
141 return -1;
142 --lineleft;
143 return *lineptr++;
144}
145
146extern int vsprintf(char *buf, const char *fmt, va_list args);
147static char sprint_buf[1024];
148
149void
150printk(char *fmt, ...)
151{
152 va_list args;
153 int n;
154
155 va_start(args, fmt);
156 n = vsprintf(sprint_buf, fmt, args);
157 va_end(args);
158 writestring(stdout, sprint_buf, n);
159}
160
161int
162printf(char *fmt, ...)
163{
164 va_list args;
165 int n;
166
167 va_start(args, fmt);
168 n = vsprintf(sprint_buf, fmt, args);
169 va_end(args);
170 writestring(stdout, sprint_buf, n);
171 return n;
172}
diff --git a/arch/ppc/boot/simple/Makefile b/arch/ppc/boot/simple/Makefile
index 9533f8de238f..28be01b99c44 100644
--- a/arch/ppc/boot/simple/Makefile
+++ b/arch/ppc/boot/simple/Makefile
@@ -192,6 +192,7 @@ boot-$(CONFIG_8xx) += embed_config.o
192boot-$(CONFIG_8260) += embed_config.o 192boot-$(CONFIG_8260) += embed_config.o
193boot-$(CONFIG_EP405) += embed_config.o 193boot-$(CONFIG_EP405) += embed_config.o
194boot-$(CONFIG_XILINX_ML300) += embed_config.o 194boot-$(CONFIG_XILINX_ML300) += embed_config.o
195boot-$(CONFIG_XILINX_ML403) += embed_config.o
195boot-$(CONFIG_BSEIP) += iic.o 196boot-$(CONFIG_BSEIP) += iic.o
196boot-$(CONFIG_MBX) += iic.o pci.o qspan_pci.o 197boot-$(CONFIG_MBX) += iic.o pci.o qspan_pci.o
197boot-$(CONFIG_MV64X60) += misc-mv64x60.o 198boot-$(CONFIG_MV64X60) += misc-mv64x60.o
diff --git a/arch/ppc/boot/simple/cpc700_memory.c b/arch/ppc/boot/simple/cpc700_memory.c
index 8c75cf6c2383..d75420a45a59 100644
--- a/arch/ppc/boot/simple/cpc700_memory.c
+++ b/arch/ppc/boot/simple/cpc700_memory.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/common/cpc700_memory.c
3 *
4 * Find memory based upon settings in the CPC700 bridge 2 * Find memory based upon settings in the CPC700 bridge
5 * 3 *
6 * Author: Dan Cox 4 * Author: Dan Cox
diff --git a/arch/ppc/boot/simple/embed_config.c b/arch/ppc/boot/simple/embed_config.c
index 491a691d10cc..3a51b1062940 100644
--- a/arch/ppc/boot/simple/embed_config.c
+++ b/arch/ppc/boot/simple/embed_config.c
@@ -21,6 +21,9 @@
21#ifdef CONFIG_40x 21#ifdef CONFIG_40x
22#include <asm/io.h> 22#include <asm/io.h>
23#endif 23#endif
24#ifdef CONFIG_XILINX_VIRTEX
25#include <platforms/4xx/xparameters/xparameters.h>
26#endif
24extern unsigned long timebase_period_ns; 27extern unsigned long timebase_period_ns;
25 28
26/* For those boards that don't provide one. 29/* For those boards that don't provide one.
@@ -742,7 +745,7 @@ embed_config(bd_t **bdp)
742} 745}
743#endif /* WILLOW */ 746#endif /* WILLOW */
744 747
745#ifdef CONFIG_XILINX_ML300 748#if defined(CONFIG_XILINX_ML300) || defined(CONFIG_XILINX_ML403)
746void 749void
747embed_config(bd_t ** bdp) 750embed_config(bd_t ** bdp)
748{ 751{
@@ -779,7 +782,7 @@ embed_config(bd_t ** bdp)
779 timebase_period_ns = 1000000000 / bd->bi_tbfreq; 782 timebase_period_ns = 1000000000 / bd->bi_tbfreq;
780 /* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */ 783 /* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */
781} 784}
782#endif /* CONFIG_XILINX_ML300 */ 785#endif /* CONFIG_XILINX_ML300 || CONFIG_XILINX_ML403 */
783 786
784#ifdef CONFIG_IBM_OPENBIOS 787#ifdef CONFIG_IBM_OPENBIOS
785/* This could possibly work for all treeboot roms. 788/* This could possibly work for all treeboot roms.
diff --git a/arch/ppc/boot/simple/head.S b/arch/ppc/boot/simple/head.S
index 5e4adc298bf9..160da1006ff8 100644
--- a/arch/ppc/boot/simple/head.S
+++ b/arch/ppc/boot/simple/head.S
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/head.S
3 *
4 * Initial board bringup code for many different boards. 2 * Initial board bringup code for many different boards.
5 * 3 *
6 * Author: Tom Rini 4 * Author: Tom Rini
@@ -65,6 +63,13 @@ start_:
65 */ 63 */
66#endif 64#endif
67 65
66#if defined(CONFIG_XILINX_VIRTEX_4_FX)
67 /* PPC errata 213: only for Virtex-4 FX */
68 mfccr0 0
69 oris 0,0,0x50000000@h
70 mtccr0 0
71#endif
72
68 mflr r3 /* Save our actual starting address. */ 73 mflr r3 /* Save our actual starting address. */
69 74
70 /* The following functions we call must not modify r3 or r4..... 75 /* The following functions we call must not modify r3 or r4.....
diff --git a/arch/ppc/boot/simple/misc-chestnut.c b/arch/ppc/boot/simple/misc-chestnut.c
index 0dce7f3557e4..b94e142ad892 100644
--- a/arch/ppc/boot/simple/misc-chestnut.c
+++ b/arch/ppc/boot/simple/misc-chestnut.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/misc-chestnut.c
3 *
4 * Setup for the IBM Chestnut (ibm-750fxgx_eval) 2 * Setup for the IBM Chestnut (ibm-750fxgx_eval)
5 * 3 *
6 * Author: Mark A. Greer <mgreer@mvista.com> 4 * Author: Mark A. Greer <mgreer@mvista.com>
diff --git a/arch/ppc/boot/simple/misc-cpci690.c b/arch/ppc/boot/simple/misc-cpci690.c
index 26860300fa09..8a8614d11a32 100644
--- a/arch/ppc/boot/simple/misc-cpci690.c
+++ b/arch/ppc/boot/simple/misc-cpci690.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/misc-cpci690.c
3 *
4 * Add birec data for Force CPCI690 board. 2 * Add birec data for Force CPCI690 board.
5 * 3 *
6 * Author: Mark A. Greer <source@mvista.com> 4 * Author: Mark A. Greer <source@mvista.com>
diff --git a/arch/ppc/boot/simple/misc-ev64260.c b/arch/ppc/boot/simple/misc-ev64260.c
index 52ece6937a7a..2678c224af22 100644
--- a/arch/ppc/boot/simple/misc-ev64260.c
+++ b/arch/ppc/boot/simple/misc-ev64260.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/misc-ev64260.c
3 *
4 * Host bridge init code for the Marvell/Galileo EV-64260-BP evaluation board 2 * Host bridge init code for the Marvell/Galileo EV-64260-BP evaluation board
5 * with a GT64260 onboard. 3 * with a GT64260 onboard.
6 * 4 *
diff --git a/arch/ppc/boot/simple/misc-ev64360.c b/arch/ppc/boot/simple/misc-ev64360.c
index cd1ccf2a1582..a212b5b988cb 100644
--- a/arch/ppc/boot/simple/misc-ev64360.c
+++ b/arch/ppc/boot/simple/misc-ev64360.c
@@ -1,5 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/misc-ev64360.c
3 * Copyright (C) 2005 Lee Nicks <allinux@gmail.com> 2 * Copyright (C) 2005 Lee Nicks <allinux@gmail.com>
4 * 3 *
5 * Based on arch/ppc/boot/simple/misc-katana.c from: 4 * Based on arch/ppc/boot/simple/misc-katana.c from:
diff --git a/arch/ppc/boot/simple/misc-katana.c b/arch/ppc/boot/simple/misc-katana.c
index ec94a11bacac..d97f2ee6f04e 100644
--- a/arch/ppc/boot/simple/misc-katana.c
+++ b/arch/ppc/boot/simple/misc-katana.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/misc-katana.c
3 *
4 * Set up MPSC values to bootwrapper can prompt user. 2 * Set up MPSC values to bootwrapper can prompt user.
5 * 3 *
6 * Author: Mark A. Greer <source@mvista.com> 4 * Author: Mark A. Greer <source@mvista.com>
diff --git a/arch/ppc/boot/simple/misc-mv64x60.c b/arch/ppc/boot/simple/misc-mv64x60.c
index 258d4599fadc..71ff20fd494a 100644
--- a/arch/ppc/boot/simple/misc-mv64x60.c
+++ b/arch/ppc/boot/simple/misc-mv64x60.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/misc-mv64x60.c
3 *
4 * Relocate bridge's register base and call board specific routine. 2 * Relocate bridge's register base and call board specific routine.
5 * 3 *
6 * Author: Mark A. Greer <source@mvista.com> 4 * Author: Mark A. Greer <source@mvista.com>
diff --git a/arch/ppc/boot/simple/misc-prep.c b/arch/ppc/boot/simple/misc-prep.c
index 75380ac41669..63def9d13d70 100644
--- a/arch/ppc/boot/simple/misc-prep.c
+++ b/arch/ppc/boot/simple/misc-prep.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/misc-prep.c
3 *
4 * Maintainer: Tom Rini <trini@kernel.crashing.org> 2 * Maintainer: Tom Rini <trini@kernel.crashing.org>
5 * 3 *
6 * In the past: Gary Thomas, Cort Dougan <cort@cs.nmt.edu> 4 * In the past: Gary Thomas, Cort Dougan <cort@cs.nmt.edu>
diff --git a/arch/ppc/boot/simple/misc-radstone_ppc7d.c b/arch/ppc/boot/simple/misc-radstone_ppc7d.c
index 569e0d4feeaf..0f302ea9c3d1 100644
--- a/arch/ppc/boot/simple/misc-radstone_ppc7d.c
+++ b/arch/ppc/boot/simple/misc-radstone_ppc7d.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/misc-radstone_ppc7d.c
3 *
4 * Misc data for Radstone PPC7D board. 2 * Misc data for Radstone PPC7D board.
5 * 3 *
6 * Author: James Chapman <jchapman@katalix.com> 4 * Author: James Chapman <jchapman@katalix.com>
diff --git a/arch/ppc/boot/simple/misc-spruce.c b/arch/ppc/boot/simple/misc-spruce.c
index d012c39278fd..0cad2f557a1e 100644
--- a/arch/ppc/boot/simple/misc-spruce.c
+++ b/arch/ppc/boot/simple/misc-spruce.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/spruce/misc.c
3 *
4 * Misc. bootloader code for IBM Spruce reference platform 2 * Misc. bootloader code for IBM Spruce reference platform
5 * 3 *
6 * Authors: Johnnie Peters <jpeters@mvista.com> 4 * Authors: Johnnie Peters <jpeters@mvista.com>
diff --git a/arch/ppc/boot/simple/misc.c b/arch/ppc/boot/simple/misc.c
index f415d6c62362..3d78571ad945 100644
--- a/arch/ppc/boot/simple/misc.c
+++ b/arch/ppc/boot/simple/misc.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/simple/misc.c
3 *
4 * Misc. bootloader code for many machines. This assumes you have are using 2 * Misc. bootloader code for many machines. This assumes you have are using
5 * a 6xx/7xx/74xx CPU in your machine. This assumes the chunk of memory 3 * a 6xx/7xx/74xx CPU in your machine. This assumes the chunk of memory
6 * below 8MB is free. Finally, it assumes you have a NS16550-style uart for 4 * below 8MB is free. Finally, it assumes you have a NS16550-style uart for
diff --git a/arch/ppc/boot/simple/mpc10x_memory.c b/arch/ppc/boot/simple/mpc10x_memory.c
index 20d92a34ceb8..8da8f576031d 100644
--- a/arch/ppc/boot/simple/mpc10x_memory.c
+++ b/arch/ppc/boot/simple/mpc10x_memory.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/common/mpc10x_common.c
3 *
4 * A routine to find out how much memory the machine has. 2 * A routine to find out how much memory the machine has.
5 * 3 *
6 * Based on: 4 * Based on:
@@ -52,10 +50,10 @@ MPC10X_PCI_OP(read, dword, u32 *, in_le32, 0)
52 * the system. This assumes that the firmware has correctly set up the memory 50 * the system. This assumes that the firmware has correctly set up the memory
53 * controller registers. On CONFIG_PPC_PREP, we know we are being called 51 * controller registers. On CONFIG_PPC_PREP, we know we are being called
54 * under a PReP memory map. On all other machines, we assume we are under 52 * under a PReP memory map. On all other machines, we assume we are under
55 * a CHRP memory map. Further, on CONFIG_PPC_MULTIPLATFORM we must rename 53 * a CHRP memory map. Further, on CONFIG_PPC_PREP we must rename
56 * this function. 54 * this function.
57 */ 55 */
58#ifdef CONFIG_PPC_MULTIPLATFORM 56#ifdef CONFIG_PPC_PREP
59#define get_mem_size mpc10x_get_mem_size 57#define get_mem_size mpc10x_get_mem_size
60#endif 58#endif
61unsigned long 59unsigned long
diff --git a/arch/ppc/boot/simple/mpc52xx_tty.c b/arch/ppc/boot/simple/mpc52xx_tty.c
index 3acc6b7c0727..1964493cf3bd 100644
--- a/arch/ppc/boot/simple/mpc52xx_tty.c
+++ b/arch/ppc/boot/simple/mpc52xx_tty.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/mpc52xx_tty.c
3 *
4 * Minimal serial functions needed to send messages out a MPC52xx 2 * Minimal serial functions needed to send messages out a MPC52xx
5 * Programmable Serial Controller (PSC). 3 * Programmable Serial Controller (PSC).
6 * 4 *
diff --git a/arch/ppc/boot/simple/mv64x60_tty.c b/arch/ppc/boot/simple/mv64x60_tty.c
index b9c24d4c738b..0c52f5c784a2 100644
--- a/arch/ppc/boot/simple/mv64x60_tty.c
+++ b/arch/ppc/boot/simple/mv64x60_tty.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/mv64x60_tty.c
3 *
4 * Bootloader version of the embedded MPSC/UART driver for the Marvell 64x60. 2 * Bootloader version of the embedded MPSC/UART driver for the Marvell 64x60.
5 * Note: Due to a GT64260A erratum, DMA will be used for UART input (via SDMA). 3 * Note: Due to a GT64260A erratum, DMA will be used for UART input (via SDMA).
6 * 4 *
diff --git a/arch/ppc/boot/simple/openbios.c b/arch/ppc/boot/simple/openbios.c
index 81f11d8b30a7..3f2ed53f793a 100644
--- a/arch/ppc/boot/simple/openbios.c
+++ b/arch/ppc/boot/simple/openbios.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/openbios.c
3 *
4 * Copyright (c) 2005 DENX Software Engineering 2 * Copyright (c) 2005 DENX Software Engineering
5 * Stefan Roese <sr@denx.de> 3 * Stefan Roese <sr@denx.de>
6 * 4 *
diff --git a/arch/ppc/boot/simple/relocate.S b/arch/ppc/boot/simple/relocate.S
index 555a216ccc49..2533113c1cc5 100644
--- a/arch/ppc/boot/simple/relocate.S
+++ b/arch/ppc/boot/simple/relocate.S
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/simple/relocate.S
3 *
4 * This is the common part of the loader relocation and initialization 2 * This is the common part of the loader relocation and initialization
5 * process. All of the board/processor specific initialization is 3 * process. All of the board/processor specific initialization is
6 * done before we get here. 4 * done before we get here.
@@ -196,7 +194,7 @@ start_ldr:
196 /* 194 /*
197 * Start at the begining. 195 * Start at the begining.
198 */ 196 */
199#ifdef CONFIG_PPC_MULTIPLATFORM 197#ifdef CONFIG_PPC_PREP
200 li r9,0xc 198 li r9,0xc
201 mtlr r9 199 mtlr r9
202 /* tell kernel we're prep, by putting 0xdeadc0de at KERNELLOAD, 200 /* tell kernel we're prep, by putting 0xdeadc0de at KERNELLOAD,
diff --git a/arch/ppc/boot/utils/addnote.c b/arch/ppc/boot/utils/addnote.c
deleted file mode 100644
index 6c52b18f2d04..000000000000
--- a/arch/ppc/boot/utils/addnote.c
+++ /dev/null
@@ -1,175 +0,0 @@
1/*
2 * Program to hack in a PT_NOTE program header entry in an ELF file.
3 * This is needed for OF on RS/6000s to load an image correctly.
4 * Note that OF needs a program header entry for the note, not an
5 * ELF section.
6 *
7 * Copyright 2000 Paul Mackerras.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 *
14 * Usage: addnote zImage
15 */
16#include <stdio.h>
17#include <stdlib.h>
18#include <fcntl.h>
19#include <unistd.h>
20#include <string.h>
21
22char arch[] = "PowerPC";
23
24#define N_DESCR 6
25unsigned int descr[N_DESCR] = {
26#if 1
27 /* values for IBM RS/6000 machines */
28 0xffffffff, /* real-mode = true */
29 0x00c00000, /* real-base, i.e. where we expect OF to be */
30 0xffffffff, /* real-size */
31 0xffffffff, /* virt-base */
32 0xffffffff, /* virt-size */
33 0x4000, /* load-base */
34#else
35 /* values for longtrail CHRP */
36 0, /* real-mode = false */
37 0xffffffff, /* real-base */
38 0xffffffff, /* real-size */
39 0xffffffff, /* virt-base */
40 0xffffffff, /* virt-size */
41 0x00600000, /* load-base */
42#endif
43};
44
45unsigned char buf[512];
46
47#define GET_16BE(off) ((buf[off] << 8) + (buf[(off)+1]))
48#define GET_32BE(off) ((GET_16BE(off) << 16) + GET_16BE((off)+2))
49
50#define PUT_16BE(off, v) (buf[off] = ((v) >> 8) & 0xff, \
51 buf[(off) + 1] = (v) & 0xff)
52#define PUT_32BE(off, v) (PUT_16BE((off), (v) >> 16), \
53 PUT_16BE((off) + 2, (v)))
54
55/* Structure of an ELF file */
56#define E_IDENT 0 /* ELF header */
57#define E_PHOFF 28
58#define E_PHENTSIZE 42
59#define E_PHNUM 44
60#define E_HSIZE 52 /* size of ELF header */
61
62#define EI_MAGIC 0 /* offsets in E_IDENT area */
63#define EI_CLASS 4
64#define EI_DATA 5
65
66#define PH_TYPE 0 /* ELF program header */
67#define PH_OFFSET 4
68#define PH_FILESZ 16
69#define PH_HSIZE 32 /* size of program header */
70
71#define PT_NOTE 4 /* Program header type = note */
72
73#define ELFCLASS32 1
74#define ELFDATA2MSB 2
75
76unsigned char elf_magic[4] = { 0x7f, 'E', 'L', 'F' };
77
78int main(int ac, char **av)
79{
80 int fd, n, i;
81 int ph, ps, np;
82 int nnote, ns;
83
84 if (ac != 2) {
85 fprintf(stderr, "Usage: %s elf-file\n", av[0]);
86 exit(1);
87 }
88 fd = open(av[1], O_RDWR);
89 if (fd < 0) {
90 perror(av[1]);
91 exit(1);
92 }
93
94 nnote = strlen(arch) + 1 + (N_DESCR + 3) * 4;
95
96 n = read(fd, buf, sizeof(buf));
97 if (n < 0) {
98 perror("read");
99 exit(1);
100 }
101
102 if (n < E_HSIZE || memcmp(&buf[E_IDENT+EI_MAGIC], elf_magic, 4) != 0)
103 goto notelf;
104
105 if (buf[E_IDENT+EI_CLASS] != ELFCLASS32
106 || buf[E_IDENT+EI_DATA] != ELFDATA2MSB) {
107 fprintf(stderr, "%s is not a big-endian 32-bit ELF image\n",
108 av[1]);
109 exit(1);
110 }
111
112 ph = GET_32BE(E_PHOFF);
113 ps = GET_16BE(E_PHENTSIZE);
114 np = GET_16BE(E_PHNUM);
115 if (ph < E_HSIZE || ps < PH_HSIZE || np < 1)
116 goto notelf;
117 if (ph + (np + 1) * ps + nnote > n)
118 goto nospace;
119
120 for (i = 0; i < np; ++i) {
121 if (GET_32BE(ph + PH_TYPE) == PT_NOTE) {
122 fprintf(stderr, "%s already has a note entry\n",
123 av[1]);
124 exit(0);
125 }
126 ph += ps;
127 }
128
129 /* XXX check that the area we want to use is all zeroes */
130 for (i = 0; i < ps + nnote; ++i)
131 if (buf[ph + i] != 0)
132 goto nospace;
133
134 /* fill in the program header entry */
135 ns = ph + ps;
136 PUT_32BE(ph + PH_TYPE, PT_NOTE);
137 PUT_32BE(ph + PH_OFFSET, ns);
138 PUT_32BE(ph + PH_FILESZ, nnote);
139
140 /* fill in the note area we point to */
141 /* XXX we should probably make this a proper section */
142 PUT_32BE(ns, strlen(arch) + 1);
143 PUT_32BE(ns + 4, N_DESCR * 4);
144 PUT_32BE(ns + 8, 0x1275);
145 strcpy(&buf[ns + 12], arch);
146 ns += 12 + strlen(arch) + 1;
147 for (i = 0; i < N_DESCR; ++i)
148 PUT_32BE(ns + i * 4, descr[i]);
149
150 /* Update the number of program headers */
151 PUT_16BE(E_PHNUM, np + 1);
152
153 /* write back */
154 lseek(fd, (long) 0, SEEK_SET);
155 i = write(fd, buf, n);
156 if (i < 0) {
157 perror("write");
158 exit(1);
159 }
160 if (i < n) {
161 fprintf(stderr, "%s: write truncated\n", av[1]);
162 exit(1);
163 }
164
165 exit(0);
166
167 notelf:
168 fprintf(stderr, "%s does not appear to be an ELF file\n", av[0]);
169 exit(1);
170
171 nospace:
172 fprintf(stderr, "sorry, I can't find space in %s to put the note\n",
173 av[0]);
174 exit(1);
175}
diff --git a/arch/ppc/boot/utils/hack-coff.c b/arch/ppc/boot/utils/hack-coff.c
deleted file mode 100644
index 5e5a6573a1ef..000000000000
--- a/arch/ppc/boot/utils/hack-coff.c
+++ /dev/null
@@ -1,84 +0,0 @@
1/*
2 * hack-coff.c - hack the header of an xcoff file to fill in
3 * a few fields needed by the Open Firmware xcoff loader on
4 * Power Macs but not initialized by objcopy.
5 *
6 * Copyright (C) Paul Mackerras 1997.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13#include <stdio.h>
14#include <stdlib.h>
15#include <unistd.h>
16#include <fcntl.h>
17#include <string.h>
18#include "rs6000.h"
19
20#define AOUT_MAGIC 0x010b
21
22#define get_16be(x) ((((unsigned char *)(x))[0] << 8) \
23 + ((unsigned char *)(x))[1])
24#define put_16be(x, v) (((unsigned char *)(x))[0] = (v) >> 8, \
25 ((unsigned char *)(x))[1] = (v) & 0xff)
26#define get_32be(x) ((((unsigned char *)(x))[0] << 24) \
27 + (((unsigned char *)(x))[1] << 16) \
28 + (((unsigned char *)(x))[2] << 8) \
29 + ((unsigned char *)(x))[3])
30
31int
32main(int ac, char **av)
33{
34 int fd;
35 int i, nsect;
36 int aoutsz;
37 struct external_filehdr fhdr;
38 AOUTHDR aout;
39 struct external_scnhdr shdr;
40
41 if (ac != 2) {
42 fprintf(stderr, "Usage: hack-coff coff-file\n");
43 exit(1);
44 }
45 if ((fd = open(av[1], 2)) == -1) {
46 perror(av[2]);
47 exit(1);
48 }
49 if (read(fd, &fhdr, sizeof(fhdr)) != sizeof(fhdr))
50 goto readerr;
51 i = get_16be(fhdr.f_magic);
52 if (i != U802TOCMAGIC && i != U802WRMAGIC && i != U802ROMAGIC) {
53 fprintf(stderr, "%s: not an xcoff file\n", av[1]);
54 exit(1);
55 }
56 aoutsz = get_16be(fhdr.f_opthdr);
57 if (read(fd, &aout, aoutsz) != aoutsz)
58 goto readerr;
59 nsect = get_16be(fhdr.f_nscns);
60 for (i = 0; i < nsect; ++i) {
61 if (read(fd, &shdr, sizeof(shdr)) != sizeof(shdr))
62 goto readerr;
63 if (strcmp(shdr.s_name, ".text") == 0) {
64 put_16be(aout.o_snentry, i+1);
65 put_16be(aout.o_sntext, i+1);
66 } else if (strcmp(shdr.s_name, ".data") == 0) {
67 put_16be(aout.o_sndata, i+1);
68 } else if (strcmp(shdr.s_name, ".bss") == 0) {
69 put_16be(aout.o_snbss, i+1);
70 }
71 }
72 put_16be(aout.magic, AOUT_MAGIC);
73 if (lseek(fd, (long) sizeof(struct external_filehdr), 0) == -1
74 || write(fd, &aout, aoutsz) != aoutsz) {
75 fprintf(stderr, "%s: write error\n", av[1]);
76 exit(1);
77 }
78 close(fd);
79 exit(0);
80
81readerr:
82 fprintf(stderr, "%s: read error or file too short\n", av[1]);
83 exit(1);
84}
diff --git a/arch/ppc/boot/utils/mkbugboot.c b/arch/ppc/boot/utils/mkbugboot.c
index 886122283f39..29115e01f60a 100644
--- a/arch/ppc/boot/utils/mkbugboot.c
+++ b/arch/ppc/boot/utils/mkbugboot.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/boot/utils/mkbugboot.c
3 *
4 * Makes a Motorola PPCBUG ROM bootable image which can be flashed 2 * Makes a Motorola PPCBUG ROM bootable image which can be flashed
5 * into one of the FLASH banks on a Motorola PowerPlus board. 3 * into one of the FLASH banks on a Motorola PowerPlus board.
6 * 4 *
diff --git a/arch/ppc/boot/utils/mknote.c b/arch/ppc/boot/utils/mknote.c
deleted file mode 100644
index b9fbb2cbfc8f..000000000000
--- a/arch/ppc/boot/utils/mknote.c
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * Copyright (C) Cort Dougan 1999.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Generate a note section as per the CHRP specification.
10 *
11 */
12
13#include <stdio.h>
14#include <string.h>
15
16#define PL(x) printf("%c%c%c%c", ((x)>>24)&0xff, ((x)>>16)&0xff, ((x)>>8)&0xff, (x)&0xff );
17
18int main(void)
19{
20/* header */
21 /* namesz */
22 PL(strlen("PowerPC")+1);
23 /* descrsz */
24 PL(6*4);
25 /* type */
26 PL(0x1275);
27 /* name */
28 printf("PowerPC"); printf("%c", 0);
29
30/* descriptor */
31 /* real-mode */
32 PL(0xffffffff);
33 /* real-base */
34 PL(0x00c00000);
35 /* real-size */
36 PL(0xffffffff);
37 /* virt-base */
38 PL(0xffffffff);
39 /* virt-size */
40 PL(0xffffffff);
41 /* load-base */
42 PL(0x4000);
43 return 0;
44}
diff --git a/arch/ppc/configs/ibmchrp_defconfig b/arch/ppc/configs/ibmchrp_defconfig
deleted file mode 100644
index 27f3e69c1f96..000000000000
--- a/arch/ppc/configs/ibmchrp_defconfig
+++ /dev/null
@@ -1,875 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7CONFIG_PPC=y
8CONFIG_PPC32=y
9CONFIG_GENERIC_NVRAM=y
10
11#
12# Code maturity level options
13#
14CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y
16# CONFIG_STANDALONE is not set
17CONFIG_BROKEN_ON_SMP=y
18
19#
20# General setup
21#
22CONFIG_SWAP=y
23CONFIG_SYSVIPC=y
24CONFIG_POSIX_MQUEUE=y
25# CONFIG_BSD_PROCESS_ACCT is not set
26CONFIG_SYSCTL=y
27# CONFIG_AUDIT is not set
28CONFIG_LOG_BUF_SHIFT=14
29# CONFIG_HOTPLUG is not set
30CONFIG_IKCONFIG=y
31CONFIG_IKCONFIG_PROC=y
32# CONFIG_EMBEDDED is not set
33CONFIG_KALLSYMS=y
34CONFIG_FUTEX=y
35CONFIG_EPOLL=y
36CONFIG_IOSCHED_NOOP=y
37CONFIG_IOSCHED_AS=y
38CONFIG_IOSCHED_DEADLINE=y
39CONFIG_IOSCHED_CFQ=y
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
41
42#
43# Loadable module support
44#
45CONFIG_MODULES=y
46CONFIG_MODULE_UNLOAD=y
47CONFIG_MODULE_FORCE_UNLOAD=y
48CONFIG_OBSOLETE_MODPARM=y
49# CONFIG_MODVERSIONS is not set
50CONFIG_KMOD=y
51
52#
53# Processor
54#
55CONFIG_6xx=y
56# CONFIG_40x is not set
57# CONFIG_44x is not set
58# CONFIG_POWER3 is not set
59# CONFIG_POWER4 is not set
60# CONFIG_8xx is not set
61# CONFIG_ALTIVEC is not set
62# CONFIG_TAU is not set
63# CONFIG_CPU_FREQ is not set
64# CONFIG_PPC601_SYNC_FIX is not set
65CONFIG_PPC_STD_MMU=y
66
67#
68# Platform options
69#
70CONFIG_PPC_MULTIPLATFORM=y
71# CONFIG_APUS is not set
72# CONFIG_WILLOW is not set
73# CONFIG_PCORE is not set
74# CONFIG_POWERPMC250 is not set
75# CONFIG_EV64260 is not set
76# CONFIG_SPRUCE is not set
77# CONFIG_LOPEC is not set
78# CONFIG_MCPN765 is not set
79# CONFIG_MVME5100 is not set
80# CONFIG_PPLUS is not set
81# CONFIG_PRPMC750 is not set
82# CONFIG_PRPMC800 is not set
83# CONFIG_SANDPOINT is not set
84# CONFIG_ADIR is not set
85# CONFIG_K2 is not set
86# CONFIG_PAL4 is not set
87# CONFIG_GEMINI is not set
88# CONFIG_EST8260 is not set
89# CONFIG_SBS8260 is not set
90# CONFIG_RPX6 is not set
91# CONFIG_TQM8260 is not set
92CONFIG_PPC_CHRP=y
93CONFIG_PPC_PMAC=y
94CONFIG_PPC_PREP=y
95CONFIG_PPC_OF=y
96CONFIG_PPCBUG_NVRAM=y
97# CONFIG_SMP is not set
98# CONFIG_PREEMPT is not set
99CONFIG_HIGHMEM=y
100CONFIG_KERNEL_ELF=y
101CONFIG_BINFMT_ELF=y
102CONFIG_BINFMT_MISC=y
103CONFIG_PROC_DEVICETREE=y
104CONFIG_PPC_RTAS=y
105# CONFIG_PREP_RESIDUAL is not set
106# CONFIG_CMDLINE_BOOL is not set
107
108#
109# Bus options
110#
111CONFIG_ISA=y
112CONFIG_GENERIC_ISA_DMA=y
113CONFIG_PCI=y
114CONFIG_PCI_DOMAINS=y
115CONFIG_PCI_LEGACY_PROC=y
116CONFIG_PCI_NAMES=y
117
118#
119# Advanced setup
120#
121# CONFIG_ADVANCED_OPTIONS is not set
122
123#
124# Default settings for advanced configuration options are used
125#
126CONFIG_HIGHMEM_START=0xfe000000
127CONFIG_LOWMEM_SIZE=0x30000000
128CONFIG_KERNEL_START=0xc0000000
129CONFIG_TASK_SIZE=0x80000000
130CONFIG_BOOT_LOAD=0x00800000
131
132#
133# Device Drivers
134#
135
136#
137# Generic Driver Options
138#
139
140#
141# Memory Technology Devices (MTD)
142#
143# CONFIG_MTD is not set
144
145#
146# Parallel port support
147#
148# CONFIG_PARPORT is not set
149
150#
151# Plug and Play support
152#
153# CONFIG_PNP is not set
154
155#
156# Block devices
157#
158CONFIG_BLK_DEV_FD=y
159# CONFIG_BLK_DEV_XD is not set
160# CONFIG_BLK_CPQ_DA is not set
161# CONFIG_BLK_CPQ_CISS_DA is not set
162# CONFIG_BLK_DEV_DAC960 is not set
163# CONFIG_BLK_DEV_UMEM is not set
164CONFIG_BLK_DEV_LOOP=y
165# CONFIG_BLK_DEV_CRYPTOLOOP is not set
166# CONFIG_BLK_DEV_NBD is not set
167# CONFIG_BLK_DEV_CARMEL is not set
168CONFIG_BLK_DEV_RAM=y
169CONFIG_BLK_DEV_RAM_SIZE=4096
170CONFIG_BLK_DEV_INITRD=y
171CONFIG_LBD=y
172
173#
174# ATA/ATAPI/MFM/RLL support
175#
176# CONFIG_IDE is not set
177
178#
179# SCSI device support
180#
181CONFIG_SCSI=y
182CONFIG_SCSI_PROC_FS=y
183
184#
185# SCSI support type (disk, tape, CD-ROM)
186#
187CONFIG_BLK_DEV_SD=y
188CONFIG_CHR_DEV_ST=y
189# CONFIG_CHR_DEV_OSST is not set
190CONFIG_BLK_DEV_SR=y
191CONFIG_BLK_DEV_SR_VENDOR=y
192CONFIG_CHR_DEV_SG=y
193
194#
195# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
196#
197# CONFIG_SCSI_MULTI_LUN is not set
198# CONFIG_SCSI_REPORT_LUNS is not set
199CONFIG_SCSI_CONSTANTS=y
200# CONFIG_SCSI_LOGGING is not set
201
202#
203# SCSI Transport Attributes
204#
205CONFIG_SCSI_SPI_ATTRS=y
206# CONFIG_SCSI_FC_ATTRS is not set
207
208#
209# SCSI low-level drivers
210#
211# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
212# CONFIG_SCSI_7000FASST is not set
213# CONFIG_SCSI_ACARD is not set
214# CONFIG_SCSI_AHA152X is not set
215# CONFIG_SCSI_AHA1542 is not set
216# CONFIG_SCSI_AACRAID is not set
217# CONFIG_SCSI_AIC7XXX is not set
218# CONFIG_SCSI_AIC7XXX_OLD is not set
219# CONFIG_SCSI_AIC79XX is not set
220# CONFIG_SCSI_ADVANSYS is not set
221# CONFIG_SCSI_IN2000 is not set
222# CONFIG_SCSI_MEGARAID is not set
223# CONFIG_SCSI_SATA is not set
224# CONFIG_SCSI_BUSLOGIC is not set
225# CONFIG_SCSI_CPQFCTS is not set
226# CONFIG_SCSI_DMX3191D is not set
227# CONFIG_SCSI_DTC3280 is not set
228# CONFIG_SCSI_EATA is not set
229# CONFIG_SCSI_EATA_PIO is not set
230# CONFIG_SCSI_FUTURE_DOMAIN is not set
231# CONFIG_SCSI_GDTH is not set
232# CONFIG_SCSI_GENERIC_NCR5380 is not set
233# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
234# CONFIG_SCSI_IPS is not set
235# CONFIG_SCSI_INIA100 is not set
236# CONFIG_SCSI_NCR53C406A is not set
237CONFIG_SCSI_SYM53C8XX_2=y
238CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
239CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
240CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
241# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
242# CONFIG_SCSI_IPR is not set
243# CONFIG_SCSI_PAS16 is not set
244# CONFIG_SCSI_PSI240I is not set
245# CONFIG_SCSI_QLOGIC_FAS is not set
246# CONFIG_SCSI_QLOGIC_ISP is not set
247# CONFIG_SCSI_QLOGIC_FC is not set
248# CONFIG_SCSI_QLOGIC_1280 is not set
249CONFIG_SCSI_QLA2XXX=y
250# CONFIG_SCSI_QLA21XX is not set
251# CONFIG_SCSI_QLA22XX is not set
252# CONFIG_SCSI_QLA2300 is not set
253# CONFIG_SCSI_QLA2322 is not set
254# CONFIG_SCSI_QLA6312 is not set
255# CONFIG_SCSI_QLA6322 is not set
256# CONFIG_SCSI_SYM53C416 is not set
257# CONFIG_SCSI_DC395x is not set
258# CONFIG_SCSI_DC390T is not set
259# CONFIG_SCSI_T128 is not set
260# CONFIG_SCSI_U14_34F is not set
261# CONFIG_SCSI_NSP32 is not set
262# CONFIG_SCSI_DEBUG is not set
263# CONFIG_SCSI_MESH is not set
264# CONFIG_SCSI_MAC53C94 is not set
265
266#
267# Old CD-ROM drivers (not SCSI, not IDE)
268#
269# CONFIG_CD_NO_IDESCSI is not set
270
271#
272# Multi-device support (RAID and LVM)
273#
274# CONFIG_MD is not set
275
276#
277# Fusion MPT device support
278#
279# CONFIG_FUSION is not set
280
281#
282# IEEE 1394 (FireWire) support
283#
284# CONFIG_IEEE1394 is not set
285
286#
287# I2O device support
288#
289# CONFIG_I2O is not set
290
291#
292# Macintosh device drivers
293#
294# CONFIG_ADB is not set
295# CONFIG_ADB_CUDA is not set
296# CONFIG_ADB_PMU is not set
297# CONFIG_MAC_FLOPPY is not set
298# CONFIG_MAC_SERIAL is not set
299
300#
301# Networking support
302#
303CONFIG_NET=y
304
305#
306# Networking options
307#
308CONFIG_PACKET=y
309# CONFIG_PACKET_MMAP is not set
310# CONFIG_NETLINK_DEV is not set
311CONFIG_UNIX=y
312# CONFIG_NET_KEY is not set
313CONFIG_INET=y
314CONFIG_IP_MULTICAST=y
315# CONFIG_IP_ADVANCED_ROUTER is not set
316# CONFIG_IP_PNP is not set
317# CONFIG_NET_IPIP is not set
318# CONFIG_NET_IPGRE is not set
319# CONFIG_IP_MROUTE is not set
320# CONFIG_ARPD is not set
321CONFIG_SYN_COOKIES=y
322# CONFIG_INET_AH is not set
323# CONFIG_INET_ESP is not set
324# CONFIG_INET_IPCOMP is not set
325
326#
327# IP: Virtual Server Configuration
328#
329# CONFIG_IP_VS is not set
330# CONFIG_IPV6 is not set
331CONFIG_NETFILTER=y
332# CONFIG_NETFILTER_DEBUG is not set
333
334#
335# IP: Netfilter Configuration
336#
337CONFIG_IP_NF_CONNTRACK=m
338CONFIG_IP_NF_FTP=m
339CONFIG_IP_NF_IRC=m
340CONFIG_IP_NF_TFTP=m
341CONFIG_IP_NF_AMANDA=m
342# CONFIG_IP_NF_QUEUE is not set
343CONFIG_IP_NF_IPTABLES=m
344CONFIG_IP_NF_MATCH_LIMIT=m
345CONFIG_IP_NF_MATCH_IPRANGE=m
346CONFIG_IP_NF_MATCH_MAC=m
347# CONFIG_IP_NF_MATCH_PKTTYPE is not set
348CONFIG_IP_NF_MATCH_MARK=m
349CONFIG_IP_NF_MATCH_MULTIPORT=m
350CONFIG_IP_NF_MATCH_TOS=m
351CONFIG_IP_NF_MATCH_RECENT=m
352CONFIG_IP_NF_MATCH_ECN=m
353CONFIG_IP_NF_MATCH_DSCP=m
354CONFIG_IP_NF_MATCH_AH_ESP=m
355CONFIG_IP_NF_MATCH_LENGTH=m
356CONFIG_IP_NF_MATCH_TTL=m
357CONFIG_IP_NF_MATCH_TCPMSS=m
358CONFIG_IP_NF_MATCH_HELPER=m
359CONFIG_IP_NF_MATCH_STATE=m
360CONFIG_IP_NF_MATCH_CONNTRACK=m
361CONFIG_IP_NF_MATCH_OWNER=m
362CONFIG_IP_NF_FILTER=m
363CONFIG_IP_NF_TARGET_REJECT=m
364CONFIG_IP_NF_NAT=m
365CONFIG_IP_NF_NAT_NEEDED=y
366CONFIG_IP_NF_TARGET_MASQUERADE=m
367CONFIG_IP_NF_TARGET_REDIRECT=m
368CONFIG_IP_NF_TARGET_NETMAP=m
369CONFIG_IP_NF_TARGET_SAME=m
370CONFIG_IP_NF_NAT_SNMP_BASIC=m
371CONFIG_IP_NF_NAT_IRC=m
372CONFIG_IP_NF_NAT_FTP=m
373CONFIG_IP_NF_NAT_TFTP=m
374CONFIG_IP_NF_NAT_AMANDA=m
375# CONFIG_IP_NF_MANGLE is not set
376# CONFIG_IP_NF_TARGET_LOG is not set
377CONFIG_IP_NF_TARGET_ULOG=m
378CONFIG_IP_NF_TARGET_TCPMSS=m
379CONFIG_IP_NF_ARPTABLES=m
380CONFIG_IP_NF_ARPFILTER=m
381CONFIG_IP_NF_ARP_MANGLE=m
382CONFIG_IP_NF_COMPAT_IPCHAINS=m
383# CONFIG_IP_NF_COMPAT_IPFWADM is not set
384CONFIG_IP_NF_TARGET_NOTRACK=m
385CONFIG_IP_NF_RAW=m
386
387#
388# SCTP Configuration (EXPERIMENTAL)
389#
390# CONFIG_IP_SCTP is not set
391# CONFIG_ATM is not set
392# CONFIG_BRIDGE is not set
393# CONFIG_VLAN_8021Q is not set
394# CONFIG_DECNET is not set
395# CONFIG_LLC2 is not set
396# CONFIG_IPX is not set
397# CONFIG_ATALK is not set
398# CONFIG_X25 is not set
399# CONFIG_LAPB is not set
400# CONFIG_NET_DIVERT is not set
401# CONFIG_ECONET is not set
402# CONFIG_WAN_ROUTER is not set
403# CONFIG_NET_HW_FLOWCONTROL is not set
404
405#
406# QoS and/or fair queueing
407#
408# CONFIG_NET_SCHED is not set
409
410#
411# Network testing
412#
413# CONFIG_NET_PKTGEN is not set
414# CONFIG_NETPOLL is not set
415# CONFIG_NET_POLL_CONTROLLER is not set
416# CONFIG_HAMRADIO is not set
417# CONFIG_IRDA is not set
418# CONFIG_BT is not set
419CONFIG_NETDEVICES=y
420# CONFIG_DUMMY is not set
421# CONFIG_BONDING is not set
422# CONFIG_EQUALIZER is not set
423# CONFIG_TUN is not set
424
425#
426# ARCnet devices
427#
428# CONFIG_ARCNET is not set
429
430#
431# Ethernet (10 or 100Mbit)
432#
433CONFIG_NET_ETHERNET=y
434CONFIG_MII=y
435# CONFIG_MACE is not set
436# CONFIG_BMAC is not set
437# CONFIG_OAKNET is not set
438# CONFIG_HAPPYMEAL is not set
439# CONFIG_SUNGEM is not set
440# CONFIG_NET_VENDOR_3COM is not set
441# CONFIG_LANCE is not set
442# CONFIG_NET_VENDOR_SMC is not set
443# CONFIG_NET_VENDOR_RACAL is not set
444
445#
446# Tulip family network device support
447#
448# CONFIG_NET_TULIP is not set
449# CONFIG_AT1700 is not set
450# CONFIG_DEPCA is not set
451# CONFIG_HP100 is not set
452# CONFIG_NET_ISA is not set
453CONFIG_NET_PCI=y
454CONFIG_PCNET32=y
455# CONFIG_AMD8111_ETH is not set
456# CONFIG_ADAPTEC_STARFIRE is not set
457# CONFIG_AC3200 is not set
458# CONFIG_APRICOT is not set
459# CONFIG_B44 is not set
460# CONFIG_FORCEDETH is not set
461# CONFIG_CS89x0 is not set
462# CONFIG_DGRS is not set
463# CONFIG_EEPRO100 is not set
464# CONFIG_E100 is not set
465# CONFIG_FEALNX is not set
466# CONFIG_NATSEMI is not set
467# CONFIG_NE2K_PCI is not set
468# CONFIG_8139CP is not set
469# CONFIG_8139TOO is not set
470# CONFIG_SIS900 is not set
471# CONFIG_EPIC100 is not set
472# CONFIG_SUNDANCE is not set
473# CONFIG_TLAN is not set
474# CONFIG_VIA_RHINE is not set
475# CONFIG_NET_POCKET is not set
476
477#
478# Ethernet (1000 Mbit)
479#
480# CONFIG_ACENIC is not set
481# CONFIG_DL2K is not set
482# CONFIG_E1000 is not set
483# CONFIG_NS83820 is not set
484# CONFIG_HAMACHI is not set
485# CONFIG_YELLOWFIN is not set
486# CONFIG_R8169 is not set
487# CONFIG_SK98LIN is not set
488# CONFIG_TIGON3 is not set
489
490#
491# Ethernet (10000 Mbit)
492#
493# CONFIG_IXGB is not set
494# CONFIG_S2IO is not set
495
496#
497# Token Ring devices
498#
499# CONFIG_TR is not set
500
501#
502# Wireless LAN (non-hamradio)
503#
504# CONFIG_NET_RADIO is not set
505
506#
507# Wan interfaces
508#
509# CONFIG_WAN is not set
510# CONFIG_FDDI is not set
511# CONFIG_HIPPI is not set
512# CONFIG_PPP is not set
513# CONFIG_SLIP is not set
514# CONFIG_NET_FC is not set
515# CONFIG_RCPCI is not set
516# CONFIG_SHAPER is not set
517# CONFIG_NETCONSOLE is not set
518
519#
520# ISDN subsystem
521#
522# CONFIG_ISDN is not set
523
524#
525# Telephony Support
526#
527# CONFIG_PHONE is not set
528
529#
530# Input device support
531#
532CONFIG_INPUT=y
533
534#
535# Userland interfaces
536#
537CONFIG_INPUT_MOUSEDEV=y
538CONFIG_INPUT_MOUSEDEV_PSAUX=y
539CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
540CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
541# CONFIG_INPUT_JOYDEV is not set
542# CONFIG_INPUT_TSDEV is not set
543CONFIG_INPUT_EVDEV=y
544# CONFIG_INPUT_EVBUG is not set
545
546#
547# Input I/O drivers
548#
549# CONFIG_GAMEPORT is not set
550CONFIG_SOUND_GAMEPORT=y
551CONFIG_SERIO=y
552CONFIG_SERIO_I8042=y
553CONFIG_SERIO_SERPORT=y
554# CONFIG_SERIO_CT82C710 is not set
555# CONFIG_SERIO_PCIPS2 is not set
556
557#
558# Input Device Drivers
559#
560CONFIG_INPUT_KEYBOARD=y
561CONFIG_KEYBOARD_ATKBD=y
562# CONFIG_KEYBOARD_SUNKBD is not set
563# CONFIG_KEYBOARD_LKKBD is not set
564# CONFIG_KEYBOARD_XTKBD is not set
565# CONFIG_KEYBOARD_NEWTON is not set
566CONFIG_INPUT_MOUSE=y
567CONFIG_MOUSE_PS2=y
568# CONFIG_MOUSE_SERIAL is not set
569# CONFIG_MOUSE_INPORT is not set
570# CONFIG_MOUSE_LOGIBM is not set
571# CONFIG_MOUSE_PC110PAD is not set
572# CONFIG_MOUSE_VSXXXAA is not set
573# CONFIG_INPUT_JOYSTICK is not set
574# CONFIG_INPUT_TOUCHSCREEN is not set
575CONFIG_INPUT_MISC=y
576CONFIG_INPUT_UINPUT=y
577
578#
579# Character devices
580#
581CONFIG_VT=y
582CONFIG_VT_CONSOLE=y
583CONFIG_HW_CONSOLE=y
584# CONFIG_SERIAL_NONSTANDARD is not set
585
586#
587# Serial drivers
588#
589CONFIG_SERIAL_8250=y
590# CONFIG_SERIAL_8250_CONSOLE is not set
591CONFIG_SERIAL_8250_NR_UARTS=4
592# CONFIG_SERIAL_8250_EXTENDED is not set
593
594#
595# Non-8250 serial port support
596#
597CONFIG_SERIAL_CORE=y
598# CONFIG_SERIAL_PMACZILOG is not set
599CONFIG_UNIX98_PTYS=y
600CONFIG_LEGACY_PTYS=y
601CONFIG_LEGACY_PTY_COUNT=256
602# CONFIG_QIC02_TAPE is not set
603
604#
605# IPMI
606#
607# CONFIG_IPMI_HANDLER is not set
608
609#
610# Watchdog Cards
611#
612# CONFIG_WATCHDOG is not set
613CONFIG_NVRAM=y
614CONFIG_GEN_RTC=y
615# CONFIG_GEN_RTC_X is not set
616# CONFIG_DTLK is not set
617# CONFIG_R3964 is not set
618# CONFIG_APPLICOM is not set
619
620#
621# Ftape, the floppy tape device driver
622#
623# CONFIG_FTAPE is not set
624# CONFIG_AGP is not set
625# CONFIG_DRM is not set
626# CONFIG_RAW_DRIVER is not set
627
628#
629# I2C support
630#
631# CONFIG_I2C is not set
632
633#
634# Misc devices
635#
636
637#
638# Multimedia devices
639#
640# CONFIG_VIDEO_DEV is not set
641
642#
643# Digital Video Broadcasting Devices
644#
645# CONFIG_DVB is not set
646
647#
648# Graphics support
649#
650CONFIG_FB=y
651# CONFIG_FB_PM2 is not set
652# CONFIG_FB_CYBER2000 is not set
653CONFIG_FB_OF=y
654# CONFIG_FB_CONTROL is not set
655# CONFIG_FB_PLATINUM is not set
656# CONFIG_FB_VALKYRIE is not set
657# CONFIG_FB_CT65550 is not set
658# CONFIG_FB_IMSTT is not set
659# CONFIG_FB_S3TRIO is not set
660# CONFIG_FB_VGA16 is not set
661# CONFIG_FB_RIVA is not set
662CONFIG_FB_MATROX=y
663CONFIG_FB_MATROX_MILLENIUM=y
664CONFIG_FB_MATROX_MYSTIQUE=y
665# CONFIG_FB_MATROX_G450 is not set
666CONFIG_FB_MATROX_G100A=y
667CONFIG_FB_MATROX_G100=y
668# CONFIG_FB_MATROX_MULTIHEAD is not set
669# CONFIG_FB_RADEON_OLD is not set
670# CONFIG_FB_RADEON is not set
671# CONFIG_FB_ATY128 is not set
672# CONFIG_FB_ATY is not set
673# CONFIG_FB_SIS is not set
674# CONFIG_FB_NEOMAGIC is not set
675# CONFIG_FB_KYRO is not set
676CONFIG_FB_3DFX=y
677# CONFIG_FB_VOODOO1 is not set
678# CONFIG_FB_TRIDENT is not set
679# CONFIG_FB_VIRTUAL is not set
680
681#
682# Console display driver support
683#
684CONFIG_VGA_CONSOLE=y
685# CONFIG_MDA_CONSOLE is not set
686CONFIG_DUMMY_CONSOLE=y
687CONFIG_FRAMEBUFFER_CONSOLE=y
688CONFIG_PCI_CONSOLE=y
689# CONFIG_FONTS is not set
690CONFIG_FONT_8x8=y
691CONFIG_FONT_8x16=y
692
693#
694# Logo configuration
695#
696CONFIG_LOGO=y
697CONFIG_LOGO_LINUX_MONO=y
698CONFIG_LOGO_LINUX_VGA16=y
699CONFIG_LOGO_LINUX_CLUT224=y
700
701#
702# Sound
703#
704# CONFIG_SOUND is not set
705
706#
707# USB support
708#
709# CONFIG_USB is not set
710
711#
712# USB Gadget Support
713#
714# CONFIG_USB_GADGET is not set
715
716#
717# File systems
718#
719CONFIG_EXT2_FS=y
720# CONFIG_EXT2_FS_XATTR is not set
721# CONFIG_EXT3_FS is not set
722# CONFIG_JBD is not set
723# CONFIG_REISERFS_FS is not set
724# CONFIG_JFS_FS is not set
725# CONFIG_XFS_FS is not set
726# CONFIG_MINIX_FS is not set
727# CONFIG_ROMFS_FS is not set
728# CONFIG_QUOTA is not set
729# CONFIG_AUTOFS_FS is not set
730# CONFIG_AUTOFS4_FS is not set
731
732#
733# CD-ROM/DVD Filesystems
734#
735CONFIG_ISO9660_FS=y
736# CONFIG_JOLIET is not set
737# CONFIG_ZISOFS is not set
738# CONFIG_UDF_FS is not set
739
740#
741# DOS/FAT/NT Filesystems
742#
743CONFIG_FAT_FS=m
744CONFIG_MSDOS_FS=m
745CONFIG_VFAT_FS=m
746# CONFIG_NTFS_FS is not set
747
748#
749# Pseudo filesystems
750#
751CONFIG_PROC_FS=y
752CONFIG_PROC_KCORE=y
753CONFIG_SYSFS=y
754CONFIG_DEVFS_FS=y
755# CONFIG_DEVFS_MOUNT is not set
756# CONFIG_DEVFS_DEBUG is not set
757# CONFIG_DEVPTS_FS_XATTR is not set
758CONFIG_TMPFS=y
759# CONFIG_HUGETLB_PAGE is not set
760CONFIG_RAMFS=y
761
762#
763# Miscellaneous filesystems
764#
765# CONFIG_ADFS_FS is not set
766# CONFIG_AFFS_FS is not set
767# CONFIG_HFS_FS is not set
768# CONFIG_HFSPLUS_FS is not set
769# CONFIG_BEFS_FS is not set
770# CONFIG_BFS_FS is not set
771# CONFIG_EFS_FS is not set
772# CONFIG_CRAMFS is not set
773# CONFIG_VXFS_FS is not set
774# CONFIG_HPFS_FS is not set
775# CONFIG_QNX4FS_FS is not set
776# CONFIG_SYSV_FS is not set
777# CONFIG_UFS_FS is not set
778
779#
780# Network File Systems
781#
782# CONFIG_NFS_FS is not set
783# CONFIG_NFSD is not set
784# CONFIG_EXPORTFS is not set
785# CONFIG_SMB_FS is not set
786# CONFIG_CIFS is not set
787# CONFIG_NCP_FS is not set
788# CONFIG_CODA_FS is not set
789# CONFIG_AFS_FS is not set
790
791#
792# Partition Types
793#
794CONFIG_PARTITION_ADVANCED=y
795# CONFIG_ACORN_PARTITION is not set
796# CONFIG_OSF_PARTITION is not set
797# CONFIG_AMIGA_PARTITION is not set
798# CONFIG_ATARI_PARTITION is not set
799CONFIG_MAC_PARTITION=y
800CONFIG_MSDOS_PARTITION=y
801# CONFIG_BSD_DISKLABEL is not set
802# CONFIG_MINIX_SUBPARTITION is not set
803# CONFIG_SOLARIS_X86_PARTITION is not set
804# CONFIG_UNIXWARE_DISKLABEL is not set
805# CONFIG_LDM_PARTITION is not set
806# CONFIG_NEC98_PARTITION is not set
807# CONFIG_SGI_PARTITION is not set
808# CONFIG_ULTRIX_PARTITION is not set
809# CONFIG_SUN_PARTITION is not set
810# CONFIG_EFI_PARTITION is not set
811
812#
813# Native Language Support
814#
815CONFIG_NLS=y
816CONFIG_NLS_DEFAULT="iso8859-1"
817# CONFIG_NLS_CODEPAGE_437 is not set
818# CONFIG_NLS_CODEPAGE_737 is not set
819# CONFIG_NLS_CODEPAGE_775 is not set
820# CONFIG_NLS_CODEPAGE_850 is not set
821# CONFIG_NLS_CODEPAGE_852 is not set
822# CONFIG_NLS_CODEPAGE_855 is not set
823# CONFIG_NLS_CODEPAGE_857 is not set
824# CONFIG_NLS_CODEPAGE_860 is not set
825# CONFIG_NLS_CODEPAGE_861 is not set
826# CONFIG_NLS_CODEPAGE_862 is not set
827# CONFIG_NLS_CODEPAGE_863 is not set
828# CONFIG_NLS_CODEPAGE_864 is not set
829# CONFIG_NLS_CODEPAGE_865 is not set
830# CONFIG_NLS_CODEPAGE_866 is not set
831# CONFIG_NLS_CODEPAGE_869 is not set
832# CONFIG_NLS_CODEPAGE_936 is not set
833# CONFIG_NLS_CODEPAGE_950 is not set
834# CONFIG_NLS_CODEPAGE_932 is not set
835# CONFIG_NLS_CODEPAGE_949 is not set
836# CONFIG_NLS_CODEPAGE_874 is not set
837# CONFIG_NLS_ISO8859_8 is not set
838# CONFIG_NLS_CODEPAGE_1250 is not set
839# CONFIG_NLS_CODEPAGE_1251 is not set
840CONFIG_NLS_ISO8859_1=m
841# CONFIG_NLS_ISO8859_2 is not set
842# CONFIG_NLS_ISO8859_3 is not set
843# CONFIG_NLS_ISO8859_4 is not set
844# CONFIG_NLS_ISO8859_5 is not set
845# CONFIG_NLS_ISO8859_6 is not set
846# CONFIG_NLS_ISO8859_7 is not set
847# CONFIG_NLS_ISO8859_9 is not set
848# CONFIG_NLS_ISO8859_13 is not set
849# CONFIG_NLS_ISO8859_14 is not set
850# CONFIG_NLS_ISO8859_15 is not set
851# CONFIG_NLS_KOI8_R is not set
852# CONFIG_NLS_KOI8_U is not set
853# CONFIG_NLS_UTF8 is not set
854
855#
856# Library routines
857#
858CONFIG_CRC32=y
859# CONFIG_LIBCRC32C is not set
860
861#
862# Kernel hacking
863#
864# CONFIG_DEBUG_KERNEL is not set
865# CONFIG_BOOTX_TEXT is not set
866
867#
868# Security options
869#
870# CONFIG_SECURITY is not set
871
872#
873# Cryptographic options
874#
875# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/ml300_defconfig b/arch/ppc/configs/ml300_defconfig
new file mode 100644
index 000000000000..4a33aca948cc
--- /dev/null
+++ b/arch/ppc/configs/ml300_defconfig
@@ -0,0 +1,739 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.16-rc1
4# Wed Jan 18 00:49:20 2006
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_PPC=y
11CONFIG_PPC32=y
12CONFIG_GENERIC_NVRAM=y
13CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
14CONFIG_ARCH_MAY_HAVE_PC_FDC=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y
29# CONFIG_SWAP is not set
30CONFIG_SYSVIPC=y
31# CONFIG_POSIX_MQUEUE is not set
32CONFIG_BSD_PROCESS_ACCT=y
33CONFIG_BSD_PROCESS_ACCT_V3=y
34CONFIG_SYSCTL=y
35# CONFIG_AUDIT is not set
36# CONFIG_IKCONFIG is not set
37CONFIG_INITRAMFS_SOURCE=""
38CONFIG_CC_OPTIMIZE_FOR_SIZE=y
39# CONFIG_EMBEDDED is not set
40CONFIG_KALLSYMS=y
41# CONFIG_KALLSYMS_ALL is not set
42# CONFIG_KALLSYMS_EXTRA_PASS is not set
43CONFIG_HOTPLUG=y
44CONFIG_PRINTK=y
45CONFIG_BUG=y
46CONFIG_ELF_CORE=y
47CONFIG_BASE_FULL=y
48CONFIG_FUTEX=y
49CONFIG_EPOLL=y
50CONFIG_SHMEM=y
51CONFIG_CC_ALIGN_FUNCTIONS=0
52CONFIG_CC_ALIGN_LABELS=0
53CONFIG_CC_ALIGN_LOOPS=0
54CONFIG_CC_ALIGN_JUMPS=0
55CONFIG_SLAB=y
56# CONFIG_TINY_SHMEM is not set
57CONFIG_BASE_SMALL=0
58# CONFIG_SLOB is not set
59
60#
61# Loadable module support
62#
63CONFIG_MODULES=y
64CONFIG_MODULE_UNLOAD=y
65CONFIG_MODULE_FORCE_UNLOAD=y
66CONFIG_OBSOLETE_MODPARM=y
67CONFIG_MODVERSIONS=y
68CONFIG_MODULE_SRCVERSION_ALL=y
69CONFIG_KMOD=y
70
71#
72# Block layer
73#
74CONFIG_LBD=y
75
76#
77# IO Schedulers
78#
79CONFIG_IOSCHED_NOOP=y
80CONFIG_IOSCHED_AS=y
81CONFIG_IOSCHED_DEADLINE=y
82CONFIG_IOSCHED_CFQ=y
83CONFIG_DEFAULT_AS=y
84# CONFIG_DEFAULT_DEADLINE is not set
85# CONFIG_DEFAULT_CFQ is not set
86# CONFIG_DEFAULT_NOOP is not set
87CONFIG_DEFAULT_IOSCHED="anticipatory"
88
89#
90# Processor
91#
92# CONFIG_6xx is not set
93CONFIG_40x=y
94# CONFIG_44x is not set
95# CONFIG_POWER3 is not set
96# CONFIG_8xx is not set
97# CONFIG_E200 is not set
98# CONFIG_E500 is not set
99# CONFIG_MATH_EMULATION is not set
100# CONFIG_KEXEC is not set
101# CONFIG_CPU_FREQ is not set
102CONFIG_4xx=y
103# CONFIG_WANT_EARLY_SERIAL is not set
104
105#
106# IBM 4xx options
107#
108# CONFIG_BUBINGA is not set
109# CONFIG_CPCI405 is not set
110# CONFIG_EP405 is not set
111# CONFIG_REDWOOD_5 is not set
112# CONFIG_REDWOOD_6 is not set
113# CONFIG_SYCAMORE is not set
114# CONFIG_WALNUT is not set
115CONFIG_XILINX_ML300=y
116CONFIG_IBM405_ERR77=y
117CONFIG_IBM405_ERR51=y
118CONFIG_XILINX_VIRTEX=y
119CONFIG_EMBEDDEDBOOT=y
120# CONFIG_PPC4xx_DMA is not set
121CONFIG_PPC_GEN550=y
122CONFIG_UART0_TTYS0=y
123# CONFIG_UART0_TTYS1 is not set
124CONFIG_NOT_COHERENT_CACHE=y
125
126#
127# Platform options
128#
129# CONFIG_PC_KEYBOARD is not set
130# CONFIG_HIGHMEM is not set
131# CONFIG_HZ_100 is not set
132CONFIG_HZ_250=y
133# CONFIG_HZ_1000 is not set
134CONFIG_HZ=250
135CONFIG_PREEMPT_NONE=y
136# CONFIG_PREEMPT_VOLUNTARY is not set
137# CONFIG_PREEMPT is not set
138CONFIG_SELECT_MEMORY_MODEL=y
139CONFIG_FLATMEM_MANUAL=y
140# CONFIG_DISCONTIGMEM_MANUAL is not set
141# CONFIG_SPARSEMEM_MANUAL is not set
142CONFIG_FLATMEM=y
143CONFIG_FLAT_NODE_MEM_MAP=y
144# CONFIG_SPARSEMEM_STATIC is not set
145CONFIG_SPLIT_PTLOCK_CPUS=4
146CONFIG_BINFMT_ELF=y
147# CONFIG_BINFMT_MISC is not set
148CONFIG_CMDLINE_BOOL=y
149CONFIG_CMDLINE="console=ttyS0,9600"
150# CONFIG_PM is not set
151# CONFIG_SOFTWARE_SUSPEND is not set
152CONFIG_SECCOMP=y
153CONFIG_ISA_DMA_API=y
154
155#
156# Bus options
157#
158# CONFIG_PPC_I8259 is not set
159# CONFIG_PCI is not set
160# CONFIG_PCI_DOMAINS is not set
161
162#
163# PCCARD (PCMCIA/CardBus) support
164#
165# CONFIG_PCCARD is not set
166
167#
168# Advanced setup
169#
170# CONFIG_ADVANCED_OPTIONS is not set
171
172#
173# Default settings for advanced configuration options are used
174#
175CONFIG_HIGHMEM_START=0xfe000000
176CONFIG_LOWMEM_SIZE=0x30000000
177CONFIG_KERNEL_START=0xc0000000
178CONFIG_TASK_SIZE=0x80000000
179CONFIG_CONSISTENT_START=0xff100000
180CONFIG_CONSISTENT_SIZE=0x00200000
181CONFIG_BOOT_LOAD=0x00400000
182
183#
184# Networking
185#
186CONFIG_NET=y
187
188#
189# Networking options
190#
191CONFIG_PACKET=y
192CONFIG_PACKET_MMAP=y
193CONFIG_UNIX=y
194# CONFIG_NET_KEY is not set
195CONFIG_INET=y
196# CONFIG_IP_MULTICAST is not set
197# CONFIG_IP_ADVANCED_ROUTER is not set
198CONFIG_IP_FIB_HASH=y
199CONFIG_IP_PNP=y
200CONFIG_IP_PNP_DHCP=y
201# CONFIG_IP_PNP_BOOTP is not set
202# CONFIG_IP_PNP_RARP is not set
203# CONFIG_NET_IPIP is not set
204# CONFIG_NET_IPGRE is not set
205# CONFIG_ARPD is not set
206# CONFIG_SYN_COOKIES is not set
207# CONFIG_INET_AH is not set
208# CONFIG_INET_ESP is not set
209# CONFIG_INET_IPCOMP is not set
210# CONFIG_INET_TUNNEL is not set
211CONFIG_INET_DIAG=y
212CONFIG_INET_TCP_DIAG=y
213# CONFIG_TCP_CONG_ADVANCED is not set
214CONFIG_TCP_CONG_BIC=y
215# CONFIG_IPV6 is not set
216# CONFIG_NETFILTER is not set
217
218#
219# DCCP Configuration (EXPERIMENTAL)
220#
221# CONFIG_IP_DCCP is not set
222
223#
224# SCTP Configuration (EXPERIMENTAL)
225#
226# CONFIG_IP_SCTP is not set
227# CONFIG_ATM is not set
228# CONFIG_BRIDGE is not set
229# CONFIG_VLAN_8021Q is not set
230# CONFIG_DECNET is not set
231# CONFIG_LLC2 is not set
232# CONFIG_IPX is not set
233# CONFIG_ATALK is not set
234# CONFIG_X25 is not set
235# CONFIG_LAPB is not set
236
237#
238# TIPC Configuration (EXPERIMENTAL)
239#
240# CONFIG_TIPC is not set
241# CONFIG_NET_DIVERT is not set
242# CONFIG_ECONET is not set
243# CONFIG_WAN_ROUTER is not set
244
245#
246# QoS and/or fair queueing
247#
248# CONFIG_NET_SCHED is not set
249
250#
251# Network testing
252#
253# CONFIG_NET_PKTGEN is not set
254# CONFIG_HAMRADIO is not set
255# CONFIG_IRDA is not set
256# CONFIG_BT is not set
257# CONFIG_IEEE80211 is not set
258
259#
260# Device Drivers
261#
262
263#
264# Generic Driver Options
265#
266CONFIG_STANDALONE=y
267CONFIG_PREVENT_FIRMWARE_BUILD=y
268# CONFIG_FW_LOADER is not set
269# CONFIG_DEBUG_DRIVER is not set
270
271#
272# Connector - unified userspace <-> kernelspace linker
273#
274# CONFIG_CONNECTOR is not set
275
276#
277# Memory Technology Devices (MTD)
278#
279# CONFIG_MTD is not set
280
281#
282# Parallel port support
283#
284# CONFIG_PARPORT is not set
285
286#
287# Plug and Play support
288#
289
290#
291# Block devices
292#
293# CONFIG_BLK_DEV_FD is not set
294# CONFIG_BLK_DEV_COW_COMMON is not set
295# CONFIG_BLK_DEV_LOOP is not set
296# CONFIG_BLK_DEV_NBD is not set
297CONFIG_BLK_DEV_RAM=y
298CONFIG_BLK_DEV_RAM_COUNT=16
299CONFIG_BLK_DEV_RAM_SIZE=65536
300CONFIG_BLK_DEV_INITRD=y
301# CONFIG_CDROM_PKTCDVD is not set
302# CONFIG_ATA_OVER_ETH is not set
303
304#
305# ATA/ATAPI/MFM/RLL support
306#
307# CONFIG_IDE is not set
308
309#
310# SCSI device support
311#
312# CONFIG_RAID_ATTRS is not set
313# CONFIG_SCSI is not set
314
315#
316# Multi-device support (RAID and LVM)
317#
318# CONFIG_MD is not set
319
320#
321# Fusion MPT device support
322#
323# CONFIG_FUSION is not set
324
325#
326# IEEE 1394 (FireWire) support
327#
328
329#
330# I2O device support
331#
332
333#
334# Macintosh device drivers
335#
336# CONFIG_WINDFARM is not set
337
338#
339# Network device support
340#
341CONFIG_NETDEVICES=y
342# CONFIG_DUMMY is not set
343# CONFIG_BONDING is not set
344# CONFIG_EQUALIZER is not set
345CONFIG_TUN=y
346
347#
348# PHY device support
349#
350
351#
352# Ethernet (10 or 100Mbit)
353#
354# CONFIG_NET_ETHERNET is not set
355# CONFIG_IBM_EMAC is not set
356
357#
358# Ethernet (1000 Mbit)
359#
360
361#
362# Ethernet (10000 Mbit)
363#
364
365#
366# Token Ring devices
367#
368
369#
370# Wireless LAN (non-hamradio)
371#
372# CONFIG_NET_RADIO is not set
373
374#
375# Wan interfaces
376#
377# CONFIG_WAN is not set
378# CONFIG_PPP is not set
379# CONFIG_SLIP is not set
380# CONFIG_SHAPER is not set
381# CONFIG_NETCONSOLE is not set
382# CONFIG_NETPOLL is not set
383# CONFIG_NET_POLL_CONTROLLER is not set
384
385#
386# ISDN subsystem
387#
388# CONFIG_ISDN is not set
389
390#
391# Telephony Support
392#
393# CONFIG_PHONE is not set
394
395#
396# Input device support
397#
398CONFIG_INPUT=y
399
400#
401# Userland interfaces
402#
403CONFIG_INPUT_MOUSEDEV=y
404# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
405CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
406CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
407# CONFIG_INPUT_JOYDEV is not set
408# CONFIG_INPUT_TSDEV is not set
409# CONFIG_INPUT_EVDEV is not set
410# CONFIG_INPUT_EVBUG is not set
411
412#
413# Input Device Drivers
414#
415# CONFIG_INPUT_KEYBOARD is not set
416# CONFIG_INPUT_MOUSE is not set
417# CONFIG_INPUT_JOYSTICK is not set
418# CONFIG_INPUT_TOUCHSCREEN is not set
419# CONFIG_INPUT_MISC is not set
420
421#
422# Hardware I/O ports
423#
424# CONFIG_SERIO is not set
425# CONFIG_GAMEPORT is not set
426
427#
428# Character devices
429#
430CONFIG_VT=y
431CONFIG_VT_CONSOLE=y
432CONFIG_HW_CONSOLE=y
433# CONFIG_SERIAL_NONSTANDARD is not set
434
435#
436# Serial drivers
437#
438CONFIG_SERIAL_8250=y
439CONFIG_SERIAL_8250_CONSOLE=y
440CONFIG_SERIAL_8250_NR_UARTS=4
441CONFIG_SERIAL_8250_RUNTIME_UARTS=4
442# CONFIG_SERIAL_8250_EXTENDED is not set
443
444#
445# Non-8250 serial port support
446#
447CONFIG_SERIAL_CORE=y
448CONFIG_SERIAL_CORE_CONSOLE=y
449CONFIG_UNIX98_PTYS=y
450# CONFIG_LEGACY_PTYS is not set
451
452#
453# IPMI
454#
455# CONFIG_IPMI_HANDLER is not set
456
457#
458# Watchdog Cards
459#
460# CONFIG_WATCHDOG is not set
461# CONFIG_NVRAM is not set
462# CONFIG_GEN_RTC is not set
463# CONFIG_DTLK is not set
464# CONFIG_R3964 is not set
465
466#
467# Ftape, the floppy tape device driver
468#
469# CONFIG_AGP is not set
470# CONFIG_RAW_DRIVER is not set
471
472#
473# TPM devices
474#
475# CONFIG_TCG_TPM is not set
476# CONFIG_TELCLOCK is not set
477
478#
479# I2C support
480#
481# CONFIG_I2C is not set
482
483#
484# SPI support
485#
486# CONFIG_SPI is not set
487# CONFIG_SPI_MASTER is not set
488
489#
490# Dallas's 1-wire bus
491#
492# CONFIG_W1 is not set
493
494#
495# Hardware Monitoring support
496#
497# CONFIG_HWMON is not set
498# CONFIG_HWMON_VID is not set
499
500#
501# Misc devices
502#
503
504#
505# Multimedia Capabilities Port drivers
506#
507
508#
509# Multimedia devices
510#
511# CONFIG_VIDEO_DEV is not set
512
513#
514# Digital Video Broadcasting Devices
515#
516# CONFIG_DVB is not set
517
518#
519# Graphics support
520#
521# CONFIG_FB is not set
522
523#
524# Console display driver support
525#
526CONFIG_DUMMY_CONSOLE=y
527
528#
529# Sound
530#
531# CONFIG_SOUND is not set
532
533#
534# USB support
535#
536# CONFIG_USB_ARCH_HAS_HCD is not set
537# CONFIG_USB_ARCH_HAS_OHCI is not set
538
539#
540# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
541#
542
543#
544# USB Gadget Support
545#
546# CONFIG_USB_GADGET is not set
547
548#
549# MMC/SD Card support
550#
551# CONFIG_MMC is not set
552
553#
554# InfiniBand support
555#
556
557#
558# SN Devices
559#
560
561#
562# File systems
563#
564CONFIG_EXT2_FS=y
565# CONFIG_EXT2_FS_XATTR is not set
566# CONFIG_EXT2_FS_XIP is not set
567# CONFIG_EXT3_FS is not set
568# CONFIG_REISERFS_FS is not set
569# CONFIG_JFS_FS is not set
570# CONFIG_FS_POSIX_ACL is not set
571# CONFIG_XFS_FS is not set
572# CONFIG_OCFS2_FS is not set
573# CONFIG_MINIX_FS is not set
574# CONFIG_ROMFS_FS is not set
575CONFIG_INOTIFY=y
576# CONFIG_QUOTA is not set
577CONFIG_DNOTIFY=y
578# CONFIG_AUTOFS_FS is not set
579# CONFIG_AUTOFS4_FS is not set
580# CONFIG_FUSE_FS is not set
581
582#
583# CD-ROM/DVD Filesystems
584#
585# CONFIG_ISO9660_FS is not set
586# CONFIG_UDF_FS is not set
587
588#
589# DOS/FAT/NT Filesystems
590#
591CONFIG_FAT_FS=y
592CONFIG_MSDOS_FS=y
593CONFIG_VFAT_FS=y
594CONFIG_FAT_DEFAULT_CODEPAGE=437
595CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
596# CONFIG_NTFS_FS is not set
597
598#
599# Pseudo filesystems
600#
601CONFIG_PROC_FS=y
602CONFIG_PROC_KCORE=y
603CONFIG_SYSFS=y
604CONFIG_TMPFS=y
605# CONFIG_HUGETLB_PAGE is not set
606CONFIG_RAMFS=y
607# CONFIG_RELAYFS_FS is not set
608# CONFIG_CONFIGFS_FS is not set
609
610#
611# Miscellaneous filesystems
612#
613# CONFIG_ADFS_FS is not set
614# CONFIG_AFFS_FS is not set
615# CONFIG_HFS_FS is not set
616# CONFIG_HFSPLUS_FS is not set
617# CONFIG_BEFS_FS is not set
618# CONFIG_BFS_FS is not set
619# CONFIG_EFS_FS is not set
620# CONFIG_CRAMFS is not set
621# CONFIG_VXFS_FS is not set
622# CONFIG_HPFS_FS is not set
623# CONFIG_QNX4FS_FS is not set
624# CONFIG_SYSV_FS is not set
625# CONFIG_UFS_FS is not set
626
627#
628# Network File Systems
629#
630# CONFIG_NFS_FS is not set
631# CONFIG_NFSD is not set
632# CONFIG_SMB_FS is not set
633# CONFIG_CIFS is not set
634# CONFIG_NCP_FS is not set
635# CONFIG_CODA_FS is not set
636# CONFIG_AFS_FS is not set
637# CONFIG_9P_FS is not set
638
639#
640# Partition Types
641#
642# CONFIG_PARTITION_ADVANCED is not set
643CONFIG_MSDOS_PARTITION=y
644
645#
646# Native Language Support
647#
648CONFIG_NLS=y
649CONFIG_NLS_DEFAULT="iso8859-1"
650CONFIG_NLS_CODEPAGE_437=y
651# CONFIG_NLS_CODEPAGE_737 is not set
652# CONFIG_NLS_CODEPAGE_775 is not set
653# CONFIG_NLS_CODEPAGE_850 is not set
654# CONFIG_NLS_CODEPAGE_852 is not set
655# CONFIG_NLS_CODEPAGE_855 is not set
656# CONFIG_NLS_CODEPAGE_857 is not set
657# CONFIG_NLS_CODEPAGE_860 is not set
658# CONFIG_NLS_CODEPAGE_861 is not set
659# CONFIG_NLS_CODEPAGE_862 is not set
660# CONFIG_NLS_CODEPAGE_863 is not set
661# CONFIG_NLS_CODEPAGE_864 is not set
662# CONFIG_NLS_CODEPAGE_865 is not set
663# CONFIG_NLS_CODEPAGE_866 is not set
664# CONFIG_NLS_CODEPAGE_869 is not set
665# CONFIG_NLS_CODEPAGE_936 is not set
666# CONFIG_NLS_CODEPAGE_950 is not set
667# CONFIG_NLS_CODEPAGE_932 is not set
668# CONFIG_NLS_CODEPAGE_949 is not set
669# CONFIG_NLS_CODEPAGE_874 is not set
670# CONFIG_NLS_ISO8859_8 is not set
671# CONFIG_NLS_CODEPAGE_1250 is not set
672# CONFIG_NLS_CODEPAGE_1251 is not set
673CONFIG_NLS_ASCII=y
674CONFIG_NLS_ISO8859_1=y
675# CONFIG_NLS_ISO8859_2 is not set
676# CONFIG_NLS_ISO8859_3 is not set
677# CONFIG_NLS_ISO8859_4 is not set
678# CONFIG_NLS_ISO8859_5 is not set
679# CONFIG_NLS_ISO8859_6 is not set
680# CONFIG_NLS_ISO8859_7 is not set
681# CONFIG_NLS_ISO8859_9 is not set
682# CONFIG_NLS_ISO8859_13 is not set
683# CONFIG_NLS_ISO8859_14 is not set
684# CONFIG_NLS_ISO8859_15 is not set
685# CONFIG_NLS_KOI8_R is not set
686# CONFIG_NLS_KOI8_U is not set
687CONFIG_NLS_UTF8=y
688
689#
690# IBM 40x options
691#
692
693#
694# Library routines
695#
696# CONFIG_CRC_CCITT is not set
697# CONFIG_CRC16 is not set
698CONFIG_CRC32=y
699# CONFIG_LIBCRC32C is not set
700# CONFIG_PROFILING is not set
701
702#
703# Kernel hacking
704#
705CONFIG_PRINTK_TIME=y
706CONFIG_MAGIC_SYSRQ=y
707CONFIG_DEBUG_KERNEL=y
708CONFIG_LOG_BUF_SHIFT=14
709CONFIG_DETECT_SOFTLOCKUP=y
710# CONFIG_SCHEDSTATS is not set
711# CONFIG_DEBUG_SLAB is not set
712CONFIG_DEBUG_MUTEXES=y
713# CONFIG_DEBUG_SPINLOCK is not set
714# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
715# CONFIG_DEBUG_KOBJECT is not set
716CONFIG_DEBUG_INFO=y
717# CONFIG_DEBUG_FS is not set
718# CONFIG_DEBUG_VM is not set
719CONFIG_FORCED_INLINING=y
720# CONFIG_RCU_TORTURE_TEST is not set
721# CONFIG_KGDB is not set
722CONFIG_XMON=y
723# CONFIG_BDI_SWITCH is not set
724# CONFIG_SERIAL_TEXT_DEBUG is not set
725
726#
727# Security options
728#
729# CONFIG_KEYS is not set
730# CONFIG_SECURITY is not set
731
732#
733# Cryptographic options
734#
735# CONFIG_CRYPTO is not set
736
737#
738# Hardware crypto devices
739#
diff --git a/arch/ppc/configs/ml403_defconfig b/arch/ppc/configs/ml403_defconfig
new file mode 100644
index 000000000000..fafd2516fa51
--- /dev/null
+++ b/arch/ppc/configs/ml403_defconfig
@@ -0,0 +1,740 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.16-rc1
4# Wed Jan 18 01:11:41 2006
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_PPC=y
11CONFIG_PPC32=y
12CONFIG_GENERIC_NVRAM=y
13CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
14CONFIG_ARCH_MAY_HAVE_PC_FDC=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y
29# CONFIG_SWAP is not set
30CONFIG_SYSVIPC=y
31# CONFIG_POSIX_MQUEUE is not set
32CONFIG_BSD_PROCESS_ACCT=y
33CONFIG_BSD_PROCESS_ACCT_V3=y
34CONFIG_SYSCTL=y
35# CONFIG_AUDIT is not set
36# CONFIG_IKCONFIG is not set
37CONFIG_INITRAMFS_SOURCE=""
38CONFIG_CC_OPTIMIZE_FOR_SIZE=y
39# CONFIG_EMBEDDED is not set
40CONFIG_KALLSYMS=y
41# CONFIG_KALLSYMS_ALL is not set
42# CONFIG_KALLSYMS_EXTRA_PASS is not set
43CONFIG_HOTPLUG=y
44CONFIG_PRINTK=y
45CONFIG_BUG=y
46CONFIG_ELF_CORE=y
47CONFIG_BASE_FULL=y
48CONFIG_FUTEX=y
49CONFIG_EPOLL=y
50CONFIG_SHMEM=y
51CONFIG_CC_ALIGN_FUNCTIONS=0
52CONFIG_CC_ALIGN_LABELS=0
53CONFIG_CC_ALIGN_LOOPS=0
54CONFIG_CC_ALIGN_JUMPS=0
55CONFIG_SLAB=y
56# CONFIG_TINY_SHMEM is not set
57CONFIG_BASE_SMALL=0
58# CONFIG_SLOB is not set
59
60#
61# Loadable module support
62#
63CONFIG_MODULES=y
64CONFIG_MODULE_UNLOAD=y
65CONFIG_MODULE_FORCE_UNLOAD=y
66CONFIG_OBSOLETE_MODPARM=y
67CONFIG_MODVERSIONS=y
68CONFIG_MODULE_SRCVERSION_ALL=y
69CONFIG_KMOD=y
70
71#
72# Block layer
73#
74CONFIG_LBD=y
75
76#
77# IO Schedulers
78#
79CONFIG_IOSCHED_NOOP=y
80CONFIG_IOSCHED_AS=y
81CONFIG_IOSCHED_DEADLINE=y
82CONFIG_IOSCHED_CFQ=y
83CONFIG_DEFAULT_AS=y
84# CONFIG_DEFAULT_DEADLINE is not set
85# CONFIG_DEFAULT_CFQ is not set
86# CONFIG_DEFAULT_NOOP is not set
87CONFIG_DEFAULT_IOSCHED="anticipatory"
88
89#
90# Processor
91#
92# CONFIG_6xx is not set
93CONFIG_40x=y
94# CONFIG_44x is not set
95# CONFIG_POWER3 is not set
96# CONFIG_8xx is not set
97# CONFIG_E200 is not set
98# CONFIG_E500 is not set
99# CONFIG_MATH_EMULATION is not set
100# CONFIG_KEXEC is not set
101# CONFIG_CPU_FREQ is not set
102CONFIG_4xx=y
103# CONFIG_WANT_EARLY_SERIAL is not set
104
105#
106# IBM 4xx options
107#
108# CONFIG_BUBINGA is not set
109# CONFIG_CPCI405 is not set
110# CONFIG_EP405 is not set
111# CONFIG_REDWOOD_5 is not set
112# CONFIG_REDWOOD_6 is not set
113# CONFIG_SYCAMORE is not set
114# CONFIG_WALNUT is not set
115# CONFIG_XILINX_ML300 is not set
116CONFIG_XILINX_ML403=y
117CONFIG_IBM405_ERR77=y
118CONFIG_IBM405_ERR51=y
119CONFIG_XILINX_VIRTEX=y
120CONFIG_EMBEDDEDBOOT=y
121# CONFIG_PPC4xx_DMA is not set
122CONFIG_PPC_GEN550=y
123CONFIG_UART0_TTYS0=y
124# CONFIG_UART0_TTYS1 is not set
125CONFIG_NOT_COHERENT_CACHE=y
126
127#
128# Platform options
129#
130# CONFIG_PC_KEYBOARD is not set
131# CONFIG_HIGHMEM is not set
132# CONFIG_HZ_100 is not set
133CONFIG_HZ_250=y
134# CONFIG_HZ_1000 is not set
135CONFIG_HZ=250
136CONFIG_PREEMPT_NONE=y
137# CONFIG_PREEMPT_VOLUNTARY is not set
138# CONFIG_PREEMPT is not set
139CONFIG_SELECT_MEMORY_MODEL=y
140CONFIG_FLATMEM_MANUAL=y
141# CONFIG_DISCONTIGMEM_MANUAL is not set
142# CONFIG_SPARSEMEM_MANUAL is not set
143CONFIG_FLATMEM=y
144CONFIG_FLAT_NODE_MEM_MAP=y
145# CONFIG_SPARSEMEM_STATIC is not set
146CONFIG_SPLIT_PTLOCK_CPUS=4
147CONFIG_BINFMT_ELF=y
148# CONFIG_BINFMT_MISC is not set
149CONFIG_CMDLINE_BOOL=y
150CONFIG_CMDLINE="console=ttyS0,9600"
151# CONFIG_PM is not set
152# CONFIG_SOFTWARE_SUSPEND is not set
153CONFIG_SECCOMP=y
154CONFIG_ISA_DMA_API=y
155
156#
157# Bus options
158#
159# CONFIG_PPC_I8259 is not set
160# CONFIG_PCI is not set
161# CONFIG_PCI_DOMAINS is not set
162
163#
164# PCCARD (PCMCIA/CardBus) support
165#
166# CONFIG_PCCARD is not set
167
168#
169# Advanced setup
170#
171# CONFIG_ADVANCED_OPTIONS is not set
172
173#
174# Default settings for advanced configuration options are used
175#
176CONFIG_HIGHMEM_START=0xfe000000
177CONFIG_LOWMEM_SIZE=0x30000000
178CONFIG_KERNEL_START=0xc0000000
179CONFIG_TASK_SIZE=0x80000000
180CONFIG_CONSISTENT_START=0xff100000
181CONFIG_CONSISTENT_SIZE=0x00200000
182CONFIG_BOOT_LOAD=0x00400000
183
184#
185# Networking
186#
187CONFIG_NET=y
188
189#
190# Networking options
191#
192CONFIG_PACKET=y
193CONFIG_PACKET_MMAP=y
194CONFIG_UNIX=y
195# CONFIG_NET_KEY is not set
196CONFIG_INET=y
197# CONFIG_IP_MULTICAST is not set
198# CONFIG_IP_ADVANCED_ROUTER is not set
199CONFIG_IP_FIB_HASH=y
200CONFIG_IP_PNP=y
201CONFIG_IP_PNP_DHCP=y
202# CONFIG_IP_PNP_BOOTP is not set
203# CONFIG_IP_PNP_RARP is not set
204# CONFIG_NET_IPIP is not set
205# CONFIG_NET_IPGRE is not set
206# CONFIG_ARPD is not set
207# CONFIG_SYN_COOKIES is not set
208# CONFIG_INET_AH is not set
209# CONFIG_INET_ESP is not set
210# CONFIG_INET_IPCOMP is not set
211# CONFIG_INET_TUNNEL is not set
212CONFIG_INET_DIAG=y
213CONFIG_INET_TCP_DIAG=y
214# CONFIG_TCP_CONG_ADVANCED is not set
215CONFIG_TCP_CONG_BIC=y
216# CONFIG_IPV6 is not set
217# CONFIG_NETFILTER is not set
218
219#
220# DCCP Configuration (EXPERIMENTAL)
221#
222# CONFIG_IP_DCCP is not set
223
224#
225# SCTP Configuration (EXPERIMENTAL)
226#
227# CONFIG_IP_SCTP is not set
228# CONFIG_ATM is not set
229# CONFIG_BRIDGE is not set
230# CONFIG_VLAN_8021Q is not set
231# CONFIG_DECNET is not set
232# CONFIG_LLC2 is not set
233# CONFIG_IPX is not set
234# CONFIG_ATALK is not set
235# CONFIG_X25 is not set
236# CONFIG_LAPB is not set
237
238#
239# TIPC Configuration (EXPERIMENTAL)
240#
241# CONFIG_TIPC is not set
242# CONFIG_NET_DIVERT is not set
243# CONFIG_ECONET is not set
244# CONFIG_WAN_ROUTER is not set
245
246#
247# QoS and/or fair queueing
248#
249# CONFIG_NET_SCHED is not set
250
251#
252# Network testing
253#
254# CONFIG_NET_PKTGEN is not set
255# CONFIG_HAMRADIO is not set
256# CONFIG_IRDA is not set
257# CONFIG_BT is not set
258# CONFIG_IEEE80211 is not set
259
260#
261# Device Drivers
262#
263
264#
265# Generic Driver Options
266#
267CONFIG_STANDALONE=y
268CONFIG_PREVENT_FIRMWARE_BUILD=y
269# CONFIG_FW_LOADER is not set
270# CONFIG_DEBUG_DRIVER is not set
271
272#
273# Connector - unified userspace <-> kernelspace linker
274#
275# CONFIG_CONNECTOR is not set
276
277#
278# Memory Technology Devices (MTD)
279#
280# CONFIG_MTD is not set
281
282#
283# Parallel port support
284#
285# CONFIG_PARPORT is not set
286
287#
288# Plug and Play support
289#
290
291#
292# Block devices
293#
294# CONFIG_BLK_DEV_FD is not set
295# CONFIG_BLK_DEV_COW_COMMON is not set
296# CONFIG_BLK_DEV_LOOP is not set
297# CONFIG_BLK_DEV_NBD is not set
298CONFIG_BLK_DEV_RAM=y
299CONFIG_BLK_DEV_RAM_COUNT=16
300CONFIG_BLK_DEV_RAM_SIZE=65536
301CONFIG_BLK_DEV_INITRD=y
302# CONFIG_CDROM_PKTCDVD is not set
303# CONFIG_ATA_OVER_ETH is not set
304
305#
306# ATA/ATAPI/MFM/RLL support
307#
308# CONFIG_IDE is not set
309
310#
311# SCSI device support
312#
313# CONFIG_RAID_ATTRS is not set
314# CONFIG_SCSI is not set
315
316#
317# Multi-device support (RAID and LVM)
318#
319# CONFIG_MD is not set
320
321#
322# Fusion MPT device support
323#
324# CONFIG_FUSION is not set
325
326#
327# IEEE 1394 (FireWire) support
328#
329
330#
331# I2O device support
332#
333
334#
335# Macintosh device drivers
336#
337# CONFIG_WINDFARM is not set
338
339#
340# Network device support
341#
342CONFIG_NETDEVICES=y
343# CONFIG_DUMMY is not set
344# CONFIG_BONDING is not set
345# CONFIG_EQUALIZER is not set
346CONFIG_TUN=y
347
348#
349# PHY device support
350#
351
352#
353# Ethernet (10 or 100Mbit)
354#
355# CONFIG_NET_ETHERNET is not set
356# CONFIG_IBM_EMAC is not set
357
358#
359# Ethernet (1000 Mbit)
360#
361
362#
363# Ethernet (10000 Mbit)
364#
365
366#
367# Token Ring devices
368#
369
370#
371# Wireless LAN (non-hamradio)
372#
373# CONFIG_NET_RADIO is not set
374
375#
376# Wan interfaces
377#
378# CONFIG_WAN is not set
379# CONFIG_PPP is not set
380# CONFIG_SLIP is not set
381# CONFIG_SHAPER is not set
382# CONFIG_NETCONSOLE is not set
383# CONFIG_NETPOLL is not set
384# CONFIG_NET_POLL_CONTROLLER is not set
385
386#
387# ISDN subsystem
388#
389# CONFIG_ISDN is not set
390
391#
392# Telephony Support
393#
394# CONFIG_PHONE is not set
395
396#
397# Input device support
398#
399CONFIG_INPUT=y
400
401#
402# Userland interfaces
403#
404CONFIG_INPUT_MOUSEDEV=y
405# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
406CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
407CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
408# CONFIG_INPUT_JOYDEV is not set
409# CONFIG_INPUT_TSDEV is not set
410# CONFIG_INPUT_EVDEV is not set
411# CONFIG_INPUT_EVBUG is not set
412
413#
414# Input Device Drivers
415#
416# CONFIG_INPUT_KEYBOARD is not set
417# CONFIG_INPUT_MOUSE is not set
418# CONFIG_INPUT_JOYSTICK is not set
419# CONFIG_INPUT_TOUCHSCREEN is not set
420# CONFIG_INPUT_MISC is not set
421
422#
423# Hardware I/O ports
424#
425# CONFIG_SERIO is not set
426# CONFIG_GAMEPORT is not set
427
428#
429# Character devices
430#
431CONFIG_VT=y
432CONFIG_VT_CONSOLE=y
433CONFIG_HW_CONSOLE=y
434# CONFIG_SERIAL_NONSTANDARD is not set
435
436#
437# Serial drivers
438#
439CONFIG_SERIAL_8250=y
440CONFIG_SERIAL_8250_CONSOLE=y
441CONFIG_SERIAL_8250_NR_UARTS=4
442CONFIG_SERIAL_8250_RUNTIME_UARTS=4
443# CONFIG_SERIAL_8250_EXTENDED is not set
444
445#
446# Non-8250 serial port support
447#
448CONFIG_SERIAL_CORE=y
449CONFIG_SERIAL_CORE_CONSOLE=y
450CONFIG_UNIX98_PTYS=y
451# CONFIG_LEGACY_PTYS is not set
452
453#
454# IPMI
455#
456# CONFIG_IPMI_HANDLER is not set
457
458#
459# Watchdog Cards
460#
461# CONFIG_WATCHDOG is not set
462# CONFIG_NVRAM is not set
463# CONFIG_GEN_RTC is not set
464# CONFIG_DTLK is not set
465# CONFIG_R3964 is not set
466
467#
468# Ftape, the floppy tape device driver
469#
470# CONFIG_AGP is not set
471# CONFIG_RAW_DRIVER is not set
472
473#
474# TPM devices
475#
476# CONFIG_TCG_TPM is not set
477# CONFIG_TELCLOCK is not set
478
479#
480# I2C support
481#
482# CONFIG_I2C is not set
483
484#
485# SPI support
486#
487# CONFIG_SPI is not set
488# CONFIG_SPI_MASTER is not set
489
490#
491# Dallas's 1-wire bus
492#
493# CONFIG_W1 is not set
494
495#
496# Hardware Monitoring support
497#
498# CONFIG_HWMON is not set
499# CONFIG_HWMON_VID is not set
500
501#
502# Misc devices
503#
504
505#
506# Multimedia Capabilities Port drivers
507#
508
509#
510# Multimedia devices
511#
512# CONFIG_VIDEO_DEV is not set
513
514#
515# Digital Video Broadcasting Devices
516#
517# CONFIG_DVB is not set
518
519#
520# Graphics support
521#
522# CONFIG_FB is not set
523
524#
525# Console display driver support
526#
527CONFIG_DUMMY_CONSOLE=y
528
529#
530# Sound
531#
532# CONFIG_SOUND is not set
533
534#
535# USB support
536#
537# CONFIG_USB_ARCH_HAS_HCD is not set
538# CONFIG_USB_ARCH_HAS_OHCI is not set
539
540#
541# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
542#
543
544#
545# USB Gadget Support
546#
547# CONFIG_USB_GADGET is not set
548
549#
550# MMC/SD Card support
551#
552# CONFIG_MMC is not set
553
554#
555# InfiniBand support
556#
557
558#
559# SN Devices
560#
561
562#
563# File systems
564#
565CONFIG_EXT2_FS=y
566# CONFIG_EXT2_FS_XATTR is not set
567# CONFIG_EXT2_FS_XIP is not set
568# CONFIG_EXT3_FS is not set
569# CONFIG_REISERFS_FS is not set
570# CONFIG_JFS_FS is not set
571# CONFIG_FS_POSIX_ACL is not set
572# CONFIG_XFS_FS is not set
573# CONFIG_OCFS2_FS is not set
574# CONFIG_MINIX_FS is not set
575# CONFIG_ROMFS_FS is not set
576CONFIG_INOTIFY=y
577# CONFIG_QUOTA is not set
578CONFIG_DNOTIFY=y
579# CONFIG_AUTOFS_FS is not set
580# CONFIG_AUTOFS4_FS is not set
581# CONFIG_FUSE_FS is not set
582
583#
584# CD-ROM/DVD Filesystems
585#
586# CONFIG_ISO9660_FS is not set
587# CONFIG_UDF_FS is not set
588
589#
590# DOS/FAT/NT Filesystems
591#
592CONFIG_FAT_FS=y
593CONFIG_MSDOS_FS=y
594CONFIG_VFAT_FS=y
595CONFIG_FAT_DEFAULT_CODEPAGE=437
596CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
597# CONFIG_NTFS_FS is not set
598
599#
600# Pseudo filesystems
601#
602CONFIG_PROC_FS=y
603CONFIG_PROC_KCORE=y
604CONFIG_SYSFS=y
605CONFIG_TMPFS=y
606# CONFIG_HUGETLB_PAGE is not set
607CONFIG_RAMFS=y
608# CONFIG_RELAYFS_FS is not set
609# CONFIG_CONFIGFS_FS is not set
610
611#
612# Miscellaneous filesystems
613#
614# CONFIG_ADFS_FS is not set
615# CONFIG_AFFS_FS is not set
616# CONFIG_HFS_FS is not set
617# CONFIG_HFSPLUS_FS is not set
618# CONFIG_BEFS_FS is not set
619# CONFIG_BFS_FS is not set
620# CONFIG_EFS_FS is not set
621# CONFIG_CRAMFS is not set
622# CONFIG_VXFS_FS is not set
623# CONFIG_HPFS_FS is not set
624# CONFIG_QNX4FS_FS is not set
625# CONFIG_SYSV_FS is not set
626# CONFIG_UFS_FS is not set
627
628#
629# Network File Systems
630#
631# CONFIG_NFS_FS is not set
632# CONFIG_NFSD is not set
633# CONFIG_SMB_FS is not set
634# CONFIG_CIFS is not set
635# CONFIG_NCP_FS is not set
636# CONFIG_CODA_FS is not set
637# CONFIG_AFS_FS is not set
638# CONFIG_9P_FS is not set
639
640#
641# Partition Types
642#
643# CONFIG_PARTITION_ADVANCED is not set
644CONFIG_MSDOS_PARTITION=y
645
646#
647# Native Language Support
648#
649CONFIG_NLS=y
650CONFIG_NLS_DEFAULT="iso8859-1"
651CONFIG_NLS_CODEPAGE_437=y
652# CONFIG_NLS_CODEPAGE_737 is not set
653# CONFIG_NLS_CODEPAGE_775 is not set
654# CONFIG_NLS_CODEPAGE_850 is not set
655# CONFIG_NLS_CODEPAGE_852 is not set
656# CONFIG_NLS_CODEPAGE_855 is not set
657# CONFIG_NLS_CODEPAGE_857 is not set
658# CONFIG_NLS_CODEPAGE_860 is not set
659# CONFIG_NLS_CODEPAGE_861 is not set
660# CONFIG_NLS_CODEPAGE_862 is not set
661# CONFIG_NLS_CODEPAGE_863 is not set
662# CONFIG_NLS_CODEPAGE_864 is not set
663# CONFIG_NLS_CODEPAGE_865 is not set
664# CONFIG_NLS_CODEPAGE_866 is not set
665# CONFIG_NLS_CODEPAGE_869 is not set
666# CONFIG_NLS_CODEPAGE_936 is not set
667# CONFIG_NLS_CODEPAGE_950 is not set
668# CONFIG_NLS_CODEPAGE_932 is not set
669# CONFIG_NLS_CODEPAGE_949 is not set
670# CONFIG_NLS_CODEPAGE_874 is not set
671# CONFIG_NLS_ISO8859_8 is not set
672# CONFIG_NLS_CODEPAGE_1250 is not set
673# CONFIG_NLS_CODEPAGE_1251 is not set
674CONFIG_NLS_ASCII=y
675CONFIG_NLS_ISO8859_1=y
676# CONFIG_NLS_ISO8859_2 is not set
677# CONFIG_NLS_ISO8859_3 is not set
678# CONFIG_NLS_ISO8859_4 is not set
679# CONFIG_NLS_ISO8859_5 is not set
680# CONFIG_NLS_ISO8859_6 is not set
681# CONFIG_NLS_ISO8859_7 is not set
682# CONFIG_NLS_ISO8859_9 is not set
683# CONFIG_NLS_ISO8859_13 is not set
684# CONFIG_NLS_ISO8859_14 is not set
685# CONFIG_NLS_ISO8859_15 is not set
686# CONFIG_NLS_KOI8_R is not set
687# CONFIG_NLS_KOI8_U is not set
688CONFIG_NLS_UTF8=y
689
690#
691# IBM 40x options
692#
693
694#
695# Library routines
696#
697# CONFIG_CRC_CCITT is not set
698# CONFIG_CRC16 is not set
699CONFIG_CRC32=y
700# CONFIG_LIBCRC32C is not set
701# CONFIG_PROFILING is not set
702
703#
704# Kernel hacking
705#
706CONFIG_PRINTK_TIME=y
707CONFIG_MAGIC_SYSRQ=y
708CONFIG_DEBUG_KERNEL=y
709CONFIG_LOG_BUF_SHIFT=14
710CONFIG_DETECT_SOFTLOCKUP=y
711# CONFIG_SCHEDSTATS is not set
712# CONFIG_DEBUG_SLAB is not set
713CONFIG_DEBUG_MUTEXES=y
714# CONFIG_DEBUG_SPINLOCK is not set
715# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
716# CONFIG_DEBUG_KOBJECT is not set
717CONFIG_DEBUG_INFO=y
718# CONFIG_DEBUG_FS is not set
719# CONFIG_DEBUG_VM is not set
720CONFIG_FORCED_INLINING=y
721# CONFIG_RCU_TORTURE_TEST is not set
722# CONFIG_KGDB is not set
723CONFIG_XMON=y
724# CONFIG_BDI_SWITCH is not set
725# CONFIG_SERIAL_TEXT_DEBUG is not set
726
727#
728# Security options
729#
730# CONFIG_KEYS is not set
731# CONFIG_SECURITY is not set
732
733#
734# Cryptographic options
735#
736# CONFIG_CRYPTO is not set
737
738#
739# Hardware crypto devices
740#
diff --git a/arch/ppc/configs/pmac_defconfig b/arch/ppc/configs/pmac_defconfig
deleted file mode 100644
index a2db8b541c9b..000000000000
--- a/arch/ppc/configs/pmac_defconfig
+++ /dev/null
@@ -1,1591 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.13-rc3
4# Wed Jul 13 14:13:13 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_HAVE_DEC_LOCK=y
11CONFIG_PPC=y
12CONFIG_PPC32=y
13CONFIG_GENERIC_NVRAM=y
14CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_SWAP=y
29CONFIG_SYSVIPC=y
30CONFIG_POSIX_MQUEUE=y
31# CONFIG_BSD_PROCESS_ACCT is not set
32CONFIG_SYSCTL=y
33# CONFIG_AUDIT is not set
34CONFIG_HOTPLUG=y
35CONFIG_KOBJECT_UEVENT=y
36CONFIG_IKCONFIG=y
37CONFIG_IKCONFIG_PROC=y
38# CONFIG_EMBEDDED is not set
39CONFIG_KALLSYMS=y
40# CONFIG_KALLSYMS_ALL is not set
41# CONFIG_KALLSYMS_EXTRA_PASS is not set
42CONFIG_PRINTK=y
43CONFIG_BUG=y
44CONFIG_BASE_FULL=y
45CONFIG_FUTEX=y
46CONFIG_EPOLL=y
47CONFIG_SHMEM=y
48CONFIG_CC_ALIGN_FUNCTIONS=0
49CONFIG_CC_ALIGN_LABELS=0
50CONFIG_CC_ALIGN_LOOPS=0
51CONFIG_CC_ALIGN_JUMPS=0
52# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0
54
55#
56# Loadable module support
57#
58CONFIG_MODULES=y
59CONFIG_MODULE_UNLOAD=y
60# CONFIG_MODULE_FORCE_UNLOAD is not set
61CONFIG_OBSOLETE_MODPARM=y
62CONFIG_MODVERSIONS=y
63CONFIG_MODULE_SRCVERSION_ALL=y
64CONFIG_KMOD=y
65
66#
67# Processor
68#
69CONFIG_6xx=y
70# CONFIG_40x is not set
71# CONFIG_44x is not set
72# CONFIG_POWER3 is not set
73# CONFIG_POWER4 is not set
74# CONFIG_8xx is not set
75# CONFIG_E200 is not set
76# CONFIG_E500 is not set
77CONFIG_PPC_FPU=y
78CONFIG_ALTIVEC=y
79CONFIG_TAU=y
80# CONFIG_TAU_INT is not set
81# CONFIG_TAU_AVERAGE is not set
82# CONFIG_KEXEC is not set
83CONFIG_CPU_FREQ=y
84CONFIG_CPU_FREQ_TABLE=y
85# CONFIG_CPU_FREQ_DEBUG is not set
86CONFIG_CPU_FREQ_STAT=m
87CONFIG_CPU_FREQ_STAT_DETAILS=y
88CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
89# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
90CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
91CONFIG_CPU_FREQ_GOV_POWERSAVE=m
92CONFIG_CPU_FREQ_GOV_USERSPACE=m
93CONFIG_CPU_FREQ_GOV_ONDEMAND=m
94CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
95CONFIG_CPU_FREQ_PMAC=y
96CONFIG_PPC601_SYNC_FIX=y
97CONFIG_PM=y
98CONFIG_PPC_STD_MMU=y
99
100#
101# Platform options
102#
103CONFIG_PPC_MULTIPLATFORM=y
104# CONFIG_APUS is not set
105# CONFIG_KATANA is not set
106# CONFIG_WILLOW is not set
107# CONFIG_CPCI690 is not set
108# CONFIG_PCORE is not set
109# CONFIG_POWERPMC250 is not set
110# CONFIG_CHESTNUT is not set
111# CONFIG_SPRUCE is not set
112# CONFIG_HDPU is not set
113# CONFIG_EV64260 is not set
114# CONFIG_LOPEC is not set
115# CONFIG_MCPN765 is not set
116# CONFIG_MVME5100 is not set
117# CONFIG_PPLUS is not set
118# CONFIG_PRPMC750 is not set
119# CONFIG_PRPMC800 is not set
120# CONFIG_SANDPOINT is not set
121# CONFIG_RADSTONE_PPC7D is not set
122# CONFIG_ADIR is not set
123# CONFIG_K2 is not set
124# CONFIG_PAL4 is not set
125# CONFIG_GEMINI is not set
126# CONFIG_EST8260 is not set
127# CONFIG_SBC82xx is not set
128# CONFIG_SBS8260 is not set
129# CONFIG_RPX8260 is not set
130# CONFIG_TQM8260 is not set
131# CONFIG_ADS8272 is not set
132# CONFIG_PQ2FADS is not set
133# CONFIG_LITE5200 is not set
134# CONFIG_MPC834x_SYS is not set
135CONFIG_PPC_CHRP=y
136CONFIG_PPC_PMAC=y
137CONFIG_PPC_PREP=y
138CONFIG_PPC_OF=y
139CONFIG_PPCBUG_NVRAM=y
140# CONFIG_SMP is not set
141# CONFIG_HIGHMEM is not set
142# CONFIG_HZ_100 is not set
143CONFIG_HZ_250=y
144# CONFIG_HZ_1000 is not set
145CONFIG_HZ=250
146CONFIG_PREEMPT_NONE=y
147# CONFIG_PREEMPT_VOLUNTARY is not set
148# CONFIG_PREEMPT is not set
149CONFIG_SELECT_MEMORY_MODEL=y
150CONFIG_FLATMEM_MANUAL=y
151# CONFIG_DISCONTIGMEM_MANUAL is not set
152# CONFIG_SPARSEMEM_MANUAL is not set
153CONFIG_FLATMEM=y
154CONFIG_FLAT_NODE_MEM_MAP=y
155CONFIG_BINFMT_ELF=y
156CONFIG_BINFMT_MISC=m
157CONFIG_PROC_DEVICETREE=y
158# CONFIG_PREP_RESIDUAL is not set
159# CONFIG_CMDLINE_BOOL is not set
160# CONFIG_PM_DEBUG is not set
161CONFIG_SOFTWARE_SUSPEND=y
162CONFIG_PM_STD_PARTITION=""
163# CONFIG_SECCOMP is not set
164CONFIG_ISA_DMA_API=y
165
166#
167# Bus options
168#
169# CONFIG_ISA is not set
170CONFIG_GENERIC_ISA_DMA=y
171CONFIG_PCI=y
172CONFIG_PCI_DOMAINS=y
173CONFIG_PCI_LEGACY_PROC=y
174CONFIG_PCI_NAMES=y
175# CONFIG_PCI_DEBUG is not set
176
177#
178# PCCARD (PCMCIA/CardBus) support
179#
180CONFIG_PCCARD=m
181# CONFIG_PCMCIA_DEBUG is not set
182CONFIG_PCMCIA=m
183# CONFIG_PCMCIA_LOAD_CIS is not set
184# CONFIG_PCMCIA_IOCTL is not set
185CONFIG_CARDBUS=y
186
187#
188# PC-card bridges
189#
190CONFIG_YENTA=m
191# CONFIG_PD6729 is not set
192# CONFIG_I82092 is not set
193# CONFIG_TCIC is not set
194CONFIG_PCCARD_NONSTATIC=m
195
196#
197# Advanced setup
198#
199CONFIG_ADVANCED_OPTIONS=y
200CONFIG_HIGHMEM_START=0xfe000000
201# CONFIG_LOWMEM_SIZE_BOOL is not set
202CONFIG_LOWMEM_SIZE=0x30000000
203# CONFIG_KERNEL_START_BOOL is not set
204CONFIG_KERNEL_START=0xc0000000
205CONFIG_TASK_SIZE_BOOL=y
206CONFIG_TASK_SIZE=0xc0000000
207CONFIG_BOOT_LOAD=0x00800000
208
209#
210# Networking
211#
212CONFIG_NET=y
213
214#
215# Networking options
216#
217CONFIG_PACKET=y
218# CONFIG_PACKET_MMAP is not set
219CONFIG_UNIX=y
220# CONFIG_NET_KEY is not set
221CONFIG_INET=y
222CONFIG_IP_MULTICAST=y
223# CONFIG_IP_ADVANCED_ROUTER is not set
224CONFIG_IP_FIB_HASH=y
225# CONFIG_IP_PNP is not set
226# CONFIG_NET_IPIP is not set
227# CONFIG_NET_IPGRE is not set
228# CONFIG_IP_MROUTE is not set
229# CONFIG_ARPD is not set
230CONFIG_SYN_COOKIES=y
231# CONFIG_INET_AH is not set
232# CONFIG_INET_ESP is not set
233# CONFIG_INET_IPCOMP is not set
234# CONFIG_INET_TUNNEL is not set
235CONFIG_IP_TCPDIAG=y
236# CONFIG_IP_TCPDIAG_IPV6 is not set
237# CONFIG_TCP_CONG_ADVANCED is not set
238CONFIG_TCP_CONG_BIC=y
239
240#
241# IP: Virtual Server Configuration
242#
243# CONFIG_IP_VS is not set
244# CONFIG_IPV6 is not set
245CONFIG_NETFILTER=y
246# CONFIG_NETFILTER_DEBUG is not set
247
248#
249# IP: Netfilter Configuration
250#
251CONFIG_IP_NF_CONNTRACK=m
252CONFIG_IP_NF_CT_ACCT=y
253CONFIG_IP_NF_CONNTRACK_MARK=y
254CONFIG_IP_NF_CT_PROTO_SCTP=m
255CONFIG_IP_NF_FTP=m
256CONFIG_IP_NF_IRC=m
257CONFIG_IP_NF_TFTP=m
258CONFIG_IP_NF_AMANDA=m
259CONFIG_IP_NF_QUEUE=m
260CONFIG_IP_NF_IPTABLES=m
261CONFIG_IP_NF_MATCH_LIMIT=m
262CONFIG_IP_NF_MATCH_IPRANGE=m
263CONFIG_IP_NF_MATCH_MAC=m
264CONFIG_IP_NF_MATCH_PKTTYPE=m
265CONFIG_IP_NF_MATCH_MARK=m
266CONFIG_IP_NF_MATCH_MULTIPORT=m
267CONFIG_IP_NF_MATCH_TOS=m
268CONFIG_IP_NF_MATCH_RECENT=m
269CONFIG_IP_NF_MATCH_ECN=m
270CONFIG_IP_NF_MATCH_DSCP=m
271CONFIG_IP_NF_MATCH_AH_ESP=m
272CONFIG_IP_NF_MATCH_LENGTH=m
273CONFIG_IP_NF_MATCH_TTL=m
274CONFIG_IP_NF_MATCH_TCPMSS=m
275CONFIG_IP_NF_MATCH_HELPER=m
276CONFIG_IP_NF_MATCH_STATE=m
277CONFIG_IP_NF_MATCH_CONNTRACK=m
278CONFIG_IP_NF_MATCH_OWNER=m
279CONFIG_IP_NF_MATCH_ADDRTYPE=m
280CONFIG_IP_NF_MATCH_REALM=m
281CONFIG_IP_NF_MATCH_SCTP=m
282CONFIG_IP_NF_MATCH_COMMENT=m
283CONFIG_IP_NF_MATCH_CONNMARK=m
284CONFIG_IP_NF_MATCH_HASHLIMIT=m
285CONFIG_IP_NF_FILTER=m
286CONFIG_IP_NF_TARGET_REJECT=m
287CONFIG_IP_NF_TARGET_LOG=m
288CONFIG_IP_NF_TARGET_ULOG=m
289CONFIG_IP_NF_TARGET_TCPMSS=m
290CONFIG_IP_NF_NAT=m
291CONFIG_IP_NF_NAT_NEEDED=y
292CONFIG_IP_NF_TARGET_MASQUERADE=m
293CONFIG_IP_NF_TARGET_REDIRECT=m
294CONFIG_IP_NF_TARGET_NETMAP=m
295CONFIG_IP_NF_TARGET_SAME=m
296CONFIG_IP_NF_NAT_SNMP_BASIC=m
297CONFIG_IP_NF_NAT_IRC=m
298CONFIG_IP_NF_NAT_FTP=m
299CONFIG_IP_NF_NAT_TFTP=m
300CONFIG_IP_NF_NAT_AMANDA=m
301CONFIG_IP_NF_MANGLE=m
302CONFIG_IP_NF_TARGET_TOS=m
303CONFIG_IP_NF_TARGET_ECN=m
304CONFIG_IP_NF_TARGET_DSCP=m
305CONFIG_IP_NF_TARGET_MARK=m
306CONFIG_IP_NF_TARGET_CLASSIFY=m
307CONFIG_IP_NF_TARGET_CONNMARK=m
308CONFIG_IP_NF_TARGET_CLUSTERIP=m
309CONFIG_IP_NF_RAW=m
310CONFIG_IP_NF_TARGET_NOTRACK=m
311CONFIG_IP_NF_ARPTABLES=m
312CONFIG_IP_NF_ARPFILTER=m
313CONFIG_IP_NF_ARP_MANGLE=m
314
315#
316# SCTP Configuration (EXPERIMENTAL)
317#
318# CONFIG_IP_SCTP is not set
319# CONFIG_ATM is not set
320# CONFIG_BRIDGE is not set
321# CONFIG_VLAN_8021Q is not set
322# CONFIG_DECNET is not set
323# CONFIG_LLC2 is not set
324# CONFIG_IPX is not set
325# CONFIG_ATALK is not set
326# CONFIG_X25 is not set
327# CONFIG_LAPB is not set
328# CONFIG_NET_DIVERT is not set
329# CONFIG_ECONET is not set
330# CONFIG_WAN_ROUTER is not set
331# CONFIG_NET_SCHED is not set
332CONFIG_NET_CLS_ROUTE=y
333
334#
335# Network testing
336#
337# CONFIG_NET_PKTGEN is not set
338CONFIG_NETPOLL=y
339# CONFIG_NETPOLL_RX is not set
340# CONFIG_NETPOLL_TRAP is not set
341CONFIG_NET_POLL_CONTROLLER=y
342# CONFIG_HAMRADIO is not set
343CONFIG_IRDA=m
344
345#
346# IrDA protocols
347#
348CONFIG_IRLAN=m
349CONFIG_IRNET=m
350CONFIG_IRCOMM=m
351# CONFIG_IRDA_ULTRA is not set
352
353#
354# IrDA options
355#
356CONFIG_IRDA_CACHE_LAST_LSAP=y
357CONFIG_IRDA_FAST_RR=y
358# CONFIG_IRDA_DEBUG is not set
359
360#
361# Infrared-port device drivers
362#
363
364#
365# SIR device drivers
366#
367CONFIG_IRTTY_SIR=m
368
369#
370# Dongle support
371#
372# CONFIG_DONGLE is not set
373
374#
375# Old SIR device drivers
376#
377# CONFIG_IRPORT_SIR is not set
378
379#
380# Old Serial dongle support
381#
382
383#
384# FIR device drivers
385#
386# CONFIG_USB_IRDA is not set
387# CONFIG_SIGMATEL_FIR is not set
388# CONFIG_NSC_FIR is not set
389# CONFIG_WINBOND_FIR is not set
390# CONFIG_TOSHIBA_FIR is not set
391# CONFIG_SMC_IRCC_FIR is not set
392# CONFIG_ALI_FIR is not set
393# CONFIG_VLSI_FIR is not set
394# CONFIG_VIA_FIR is not set
395# CONFIG_BT is not set
396
397#
398# Device Drivers
399#
400
401#
402# Generic Driver Options
403#
404# CONFIG_STANDALONE is not set
405CONFIG_PREVENT_FIRMWARE_BUILD=y
406CONFIG_FW_LOADER=m
407# CONFIG_DEBUG_DRIVER is not set
408
409#
410# Memory Technology Devices (MTD)
411#
412# CONFIG_MTD is not set
413
414#
415# Parallel port support
416#
417# CONFIG_PARPORT is not set
418
419#
420# Plug and Play support
421#
422
423#
424# Block devices
425#
426# CONFIG_BLK_DEV_FD is not set
427CONFIG_MAC_FLOPPY=m
428# CONFIG_BLK_CPQ_DA is not set
429# CONFIG_BLK_CPQ_CISS_DA is not set
430# CONFIG_BLK_DEV_DAC960 is not set
431# CONFIG_BLK_DEV_UMEM is not set
432# CONFIG_BLK_DEV_COW_COMMON is not set
433CONFIG_BLK_DEV_LOOP=y
434# CONFIG_BLK_DEV_CRYPTOLOOP is not set
435# CONFIG_BLK_DEV_NBD is not set
436# CONFIG_BLK_DEV_SX8 is not set
437# CONFIG_BLK_DEV_UB is not set
438CONFIG_BLK_DEV_RAM=y
439CONFIG_BLK_DEV_RAM_COUNT=16
440CONFIG_BLK_DEV_RAM_SIZE=4096
441CONFIG_BLK_DEV_INITRD=y
442CONFIG_INITRAMFS_SOURCE=""
443CONFIG_LBD=y
444CONFIG_CDROM_PKTCDVD=m
445CONFIG_CDROM_PKTCDVD_BUFFERS=8
446# CONFIG_CDROM_PKTCDVD_WCACHE is not set
447
448#
449# IO Schedulers
450#
451CONFIG_IOSCHED_NOOP=y
452CONFIG_IOSCHED_AS=y
453CONFIG_IOSCHED_DEADLINE=y
454CONFIG_IOSCHED_CFQ=y
455# CONFIG_ATA_OVER_ETH is not set
456
457#
458# ATA/ATAPI/MFM/RLL support
459#
460CONFIG_IDE=y
461CONFIG_BLK_DEV_IDE=y
462
463#
464# Please see Documentation/ide.txt for help/info on IDE drives
465#
466# CONFIG_BLK_DEV_IDE_SATA is not set
467CONFIG_BLK_DEV_IDEDISK=y
468# CONFIG_IDEDISK_MULTI_MODE is not set
469# CONFIG_BLK_DEV_IDECS is not set
470CONFIG_BLK_DEV_IDECD=y
471# CONFIG_BLK_DEV_IDETAPE is not set
472CONFIG_BLK_DEV_IDEFLOPPY=y
473CONFIG_BLK_DEV_IDESCSI=y
474# CONFIG_IDE_TASK_IOCTL is not set
475
476#
477# IDE chipset support/bugfixes
478#
479# CONFIG_IDE_GENERIC is not set
480CONFIG_BLK_DEV_IDEPCI=y
481CONFIG_IDEPCI_SHARE_IRQ=y
482# CONFIG_BLK_DEV_OFFBOARD is not set
483CONFIG_BLK_DEV_GENERIC=y
484# CONFIG_BLK_DEV_OPTI621 is not set
485# CONFIG_BLK_DEV_SL82C105 is not set
486CONFIG_BLK_DEV_IDEDMA_PCI=y
487# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
488CONFIG_IDEDMA_PCI_AUTO=y
489# CONFIG_IDEDMA_ONLYDISK is not set
490# CONFIG_BLK_DEV_AEC62XX is not set
491# CONFIG_BLK_DEV_ALI15X3 is not set
492# CONFIG_BLK_DEV_AMD74XX is not set
493CONFIG_BLK_DEV_CMD64X=y
494# CONFIG_BLK_DEV_TRIFLEX is not set
495# CONFIG_BLK_DEV_CY82C693 is not set
496# CONFIG_BLK_DEV_CS5520 is not set
497# CONFIG_BLK_DEV_CS5530 is not set
498# CONFIG_BLK_DEV_HPT34X is not set
499# CONFIG_BLK_DEV_HPT366 is not set
500# CONFIG_BLK_DEV_SC1200 is not set
501# CONFIG_BLK_DEV_PIIX is not set
502# CONFIG_BLK_DEV_IT821X is not set
503# CONFIG_BLK_DEV_NS87415 is not set
504# CONFIG_BLK_DEV_PDC202XX_OLD is not set
505CONFIG_BLK_DEV_PDC202XX_NEW=y
506# CONFIG_PDC202XX_FORCE is not set
507# CONFIG_BLK_DEV_SVWKS is not set
508# CONFIG_BLK_DEV_SIIMAGE is not set
509# CONFIG_BLK_DEV_SLC90E66 is not set
510# CONFIG_BLK_DEV_TRM290 is not set
511# CONFIG_BLK_DEV_VIA82CXXX is not set
512CONFIG_BLK_DEV_IDE_PMAC=y
513CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
514CONFIG_BLK_DEV_IDEDMA_PMAC=y
515CONFIG_BLK_DEV_IDE_PMAC_BLINK=y
516# CONFIG_IDE_ARM is not set
517CONFIG_BLK_DEV_IDEDMA=y
518# CONFIG_IDEDMA_IVB is not set
519CONFIG_IDEDMA_AUTO=y
520# CONFIG_BLK_DEV_HD is not set
521
522#
523# SCSI device support
524#
525CONFIG_SCSI=y
526CONFIG_SCSI_PROC_FS=y
527
528#
529# SCSI support type (disk, tape, CD-ROM)
530#
531CONFIG_BLK_DEV_SD=y
532CONFIG_CHR_DEV_ST=y
533# CONFIG_CHR_DEV_OSST is not set
534CONFIG_BLK_DEV_SR=y
535CONFIG_BLK_DEV_SR_VENDOR=y
536CONFIG_CHR_DEV_SG=y
537# CONFIG_CHR_DEV_SCH is not set
538
539#
540# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
541#
542# CONFIG_SCSI_MULTI_LUN is not set
543CONFIG_SCSI_CONSTANTS=y
544# CONFIG_SCSI_LOGGING is not set
545
546#
547# SCSI Transport Attributes
548#
549CONFIG_SCSI_SPI_ATTRS=y
550# CONFIG_SCSI_FC_ATTRS is not set
551# CONFIG_SCSI_ISCSI_ATTRS is not set
552
553#
554# SCSI low-level drivers
555#
556# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
557# CONFIG_SCSI_3W_9XXX is not set
558# CONFIG_SCSI_ACARD is not set
559# CONFIG_SCSI_AACRAID is not set
560CONFIG_SCSI_AIC7XXX=m
561CONFIG_AIC7XXX_CMDS_PER_DEVICE=253
562CONFIG_AIC7XXX_RESET_DELAY_MS=15000
563CONFIG_AIC7XXX_DEBUG_ENABLE=y
564CONFIG_AIC7XXX_DEBUG_MASK=0
565CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
566CONFIG_SCSI_AIC7XXX_OLD=m
567# CONFIG_SCSI_AIC79XX is not set
568# CONFIG_SCSI_DPT_I2O is not set
569# CONFIG_MEGARAID_NEWGEN is not set
570# CONFIG_MEGARAID_LEGACY is not set
571# CONFIG_SCSI_SATA is not set
572# CONFIG_SCSI_BUSLOGIC is not set
573# CONFIG_SCSI_DMX3191D is not set
574# CONFIG_SCSI_EATA is not set
575# CONFIG_SCSI_FUTURE_DOMAIN is not set
576# CONFIG_SCSI_GDTH is not set
577# CONFIG_SCSI_IPS is not set
578# CONFIG_SCSI_INITIO is not set
579# CONFIG_SCSI_INIA100 is not set
580CONFIG_SCSI_SYM53C8XX_2=y
581CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
582CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
583CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
584# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
585# CONFIG_SCSI_IPR is not set
586# CONFIG_SCSI_QLOGIC_FC is not set
587# CONFIG_SCSI_QLOGIC_1280 is not set
588CONFIG_SCSI_QLA2XXX=y
589# CONFIG_SCSI_QLA21XX is not set
590# CONFIG_SCSI_QLA22XX is not set
591# CONFIG_SCSI_QLA2300 is not set
592# CONFIG_SCSI_QLA2322 is not set
593# CONFIG_SCSI_QLA6312 is not set
594# CONFIG_SCSI_LPFC is not set
595# CONFIG_SCSI_DC395x is not set
596# CONFIG_SCSI_DC390T is not set
597# CONFIG_SCSI_NSP32 is not set
598# CONFIG_SCSI_DEBUG is not set
599CONFIG_SCSI_MESH=y
600CONFIG_SCSI_MESH_SYNC_RATE=5
601CONFIG_SCSI_MESH_RESET_DELAY_MS=1000
602CONFIG_SCSI_MAC53C94=y
603
604#
605# PCMCIA SCSI adapter support
606#
607# CONFIG_PCMCIA_AHA152X is not set
608# CONFIG_PCMCIA_FDOMAIN is not set
609# CONFIG_PCMCIA_NINJA_SCSI is not set
610# CONFIG_PCMCIA_QLOGIC is not set
611# CONFIG_PCMCIA_SYM53C500 is not set
612
613#
614# Multi-device support (RAID and LVM)
615#
616# CONFIG_MD is not set
617
618#
619# Fusion MPT device support
620#
621# CONFIG_FUSION is not set
622# CONFIG_FUSION_SPI is not set
623# CONFIG_FUSION_FC is not set
624
625#
626# IEEE 1394 (FireWire) support
627#
628CONFIG_IEEE1394=m
629
630#
631# Subsystem Options
632#
633# CONFIG_IEEE1394_VERBOSEDEBUG is not set
634# CONFIG_IEEE1394_OUI_DB is not set
635CONFIG_IEEE1394_EXTRA_CONFIG_ROMS=y
636CONFIG_IEEE1394_CONFIG_ROM_IP1394=y
637# CONFIG_IEEE1394_EXPORT_FULL_API is not set
638
639#
640# Device Drivers
641#
642# CONFIG_IEEE1394_PCILYNX is not set
643CONFIG_IEEE1394_OHCI1394=m
644
645#
646# Protocol Drivers
647#
648CONFIG_IEEE1394_VIDEO1394=m
649CONFIG_IEEE1394_SBP2=m
650# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set
651CONFIG_IEEE1394_ETH1394=m
652CONFIG_IEEE1394_DV1394=m
653CONFIG_IEEE1394_RAWIO=m
654CONFIG_IEEE1394_CMP=m
655CONFIG_IEEE1394_AMDTP=m
656
657#
658# I2O device support
659#
660# CONFIG_I2O is not set
661
662#
663# Macintosh device drivers
664#
665CONFIG_ADB=y
666CONFIG_ADB_CUDA=y
667CONFIG_ADB_PMU=y
668CONFIG_PMAC_APM_EMU=y
669CONFIG_PMAC_MEDIABAY=y
670CONFIG_PMAC_BACKLIGHT=y
671CONFIG_ADB_MACIO=y
672CONFIG_INPUT_ADBHID=y
673CONFIG_MAC_EMUMOUSEBTN=y
674CONFIG_THERM_WINDTUNNEL=m
675CONFIG_THERM_ADT746X=m
676# CONFIG_ANSLCD is not set
677
678#
679# Network device support
680#
681CONFIG_NETDEVICES=y
682# CONFIG_DUMMY is not set
683# CONFIG_BONDING is not set
684# CONFIG_EQUALIZER is not set
685CONFIG_TUN=m
686
687#
688# ARCnet devices
689#
690# CONFIG_ARCNET is not set
691
692#
693# Ethernet (10 or 100Mbit)
694#
695CONFIG_NET_ETHERNET=y
696CONFIG_MII=y
697CONFIG_MACE=y
698# CONFIG_MACE_AAUI_PORT is not set
699CONFIG_BMAC=y
700# CONFIG_HAPPYMEAL is not set
701CONFIG_SUNGEM=y
702# CONFIG_NET_VENDOR_3COM is not set
703
704#
705# Tulip family network device support
706#
707# CONFIG_NET_TULIP is not set
708# CONFIG_HP100 is not set
709CONFIG_NET_PCI=y
710CONFIG_PCNET32=y
711# CONFIG_AMD8111_ETH is not set
712# CONFIG_ADAPTEC_STARFIRE is not set
713# CONFIG_B44 is not set
714# CONFIG_FORCEDETH is not set
715# CONFIG_DGRS is not set
716# CONFIG_EEPRO100 is not set
717# CONFIG_E100 is not set
718# CONFIG_FEALNX is not set
719# CONFIG_NATSEMI is not set
720# CONFIG_NE2K_PCI is not set
721# CONFIG_8139CP is not set
722# CONFIG_8139TOO is not set
723# CONFIG_SIS900 is not set
724# CONFIG_EPIC100 is not set
725# CONFIG_SUNDANCE is not set
726# CONFIG_TLAN is not set
727# CONFIG_VIA_RHINE is not set
728
729#
730# Ethernet (1000 Mbit)
731#
732# CONFIG_ACENIC is not set
733# CONFIG_DL2K is not set
734# CONFIG_E1000 is not set
735# CONFIG_NS83820 is not set
736# CONFIG_HAMACHI is not set
737# CONFIG_YELLOWFIN is not set
738# CONFIG_R8169 is not set
739# CONFIG_SKGE is not set
740# CONFIG_SK98LIN is not set
741# CONFIG_VIA_VELOCITY is not set
742# CONFIG_TIGON3 is not set
743# CONFIG_BNX2 is not set
744# CONFIG_MV643XX_ETH is not set
745
746#
747# Ethernet (10000 Mbit)
748#
749# CONFIG_IXGB is not set
750# CONFIG_S2IO is not set
751
752#
753# Token Ring devices
754#
755# CONFIG_TR is not set
756
757#
758# Wireless LAN (non-hamradio)
759#
760CONFIG_NET_RADIO=y
761
762#
763# Obsolete Wireless cards support (pre-802.11)
764#
765# CONFIG_STRIP is not set
766# CONFIG_PCMCIA_WAVELAN is not set
767# CONFIG_PCMCIA_NETWAVE is not set
768
769#
770# Wireless 802.11 Frequency Hopping cards support
771#
772# CONFIG_PCMCIA_RAYCS is not set
773
774#
775# Wireless 802.11b ISA/PCI cards support
776#
777CONFIG_HERMES=m
778CONFIG_APPLE_AIRPORT=m
779# CONFIG_PLX_HERMES is not set
780# CONFIG_TMD_HERMES is not set
781# CONFIG_PCI_HERMES is not set
782# CONFIG_ATMEL is not set
783
784#
785# Wireless 802.11b Pcmcia/Cardbus cards support
786#
787CONFIG_PCMCIA_HERMES=m
788# CONFIG_AIRO_CS is not set
789# CONFIG_PCMCIA_WL3501 is not set
790
791#
792# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
793#
794# CONFIG_PRISM54 is not set
795CONFIG_NET_WIRELESS=y
796
797#
798# PCMCIA network device support
799#
800# CONFIG_NET_PCMCIA is not set
801
802#
803# Wan interfaces
804#
805# CONFIG_WAN is not set
806# CONFIG_FDDI is not set
807# CONFIG_HIPPI is not set
808CONFIG_PPP=y
809CONFIG_PPP_MULTILINK=y
810# CONFIG_PPP_FILTER is not set
811CONFIG_PPP_ASYNC=y
812CONFIG_PPP_SYNC_TTY=m
813CONFIG_PPP_DEFLATE=y
814CONFIG_PPP_BSDCOMP=m
815CONFIG_PPPOE=m
816# CONFIG_SLIP is not set
817# CONFIG_NET_FC is not set
818# CONFIG_SHAPER is not set
819CONFIG_NETCONSOLE=m
820
821#
822# ISDN subsystem
823#
824# CONFIG_ISDN is not set
825
826#
827# Telephony Support
828#
829# CONFIG_PHONE is not set
830
831#
832# Input device support
833#
834CONFIG_INPUT=y
835
836#
837# Userland interfaces
838#
839CONFIG_INPUT_MOUSEDEV=y
840# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
841CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
842CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
843# CONFIG_INPUT_JOYDEV is not set
844# CONFIG_INPUT_TSDEV is not set
845CONFIG_INPUT_EVDEV=y
846# CONFIG_INPUT_EVBUG is not set
847
848#
849# Input Device Drivers
850#
851CONFIG_INPUT_KEYBOARD=y
852# CONFIG_KEYBOARD_ATKBD is not set
853# CONFIG_KEYBOARD_SUNKBD is not set
854# CONFIG_KEYBOARD_LKKBD is not set
855# CONFIG_KEYBOARD_XTKBD is not set
856# CONFIG_KEYBOARD_NEWTON is not set
857CONFIG_INPUT_MOUSE=y
858# CONFIG_MOUSE_PS2 is not set
859# CONFIG_MOUSE_SERIAL is not set
860# CONFIG_MOUSE_VSXXXAA is not set
861# CONFIG_INPUT_JOYSTICK is not set
862# CONFIG_INPUT_TOUCHSCREEN is not set
863# CONFIG_INPUT_MISC is not set
864
865#
866# Hardware I/O ports
867#
868# CONFIG_SERIO is not set
869# CONFIG_GAMEPORT is not set
870
871#
872# Character devices
873#
874CONFIG_VT=y
875CONFIG_VT_CONSOLE=y
876CONFIG_HW_CONSOLE=y
877# CONFIG_SERIAL_NONSTANDARD is not set
878
879#
880# Serial drivers
881#
882CONFIG_SERIAL_8250=m
883CONFIG_SERIAL_8250_CS=m
884CONFIG_SERIAL_8250_NR_UARTS=4
885# CONFIG_SERIAL_8250_EXTENDED is not set
886
887#
888# Non-8250 serial port support
889#
890CONFIG_SERIAL_CORE=y
891CONFIG_SERIAL_CORE_CONSOLE=y
892CONFIG_SERIAL_PMACZILOG=y
893CONFIG_SERIAL_PMACZILOG_CONSOLE=y
894# CONFIG_SERIAL_JSM is not set
895CONFIG_UNIX98_PTYS=y
896CONFIG_LEGACY_PTYS=y
897CONFIG_LEGACY_PTY_COUNT=256
898
899#
900# IPMI
901#
902# CONFIG_IPMI_HANDLER is not set
903
904#
905# Watchdog Cards
906#
907# CONFIG_WATCHDOG is not set
908CONFIG_NVRAM=y
909CONFIG_GEN_RTC=y
910# CONFIG_GEN_RTC_X is not set
911# CONFIG_DTLK is not set
912# CONFIG_R3964 is not set
913# CONFIG_APPLICOM is not set
914
915#
916# Ftape, the floppy tape device driver
917#
918CONFIG_AGP=m
919CONFIG_AGP_UNINORTH=m
920CONFIG_DRM=m
921# CONFIG_DRM_TDFX is not set
922CONFIG_DRM_R128=m
923CONFIG_DRM_RADEON=m
924# CONFIG_DRM_MGA is not set
925# CONFIG_DRM_SIS is not set
926# CONFIG_DRM_VIA is not set
927
928#
929# PCMCIA character devices
930#
931# CONFIG_SYNCLINK_CS is not set
932# CONFIG_RAW_DRIVER is not set
933
934#
935# TPM devices
936#
937# CONFIG_TCG_TPM is not set
938
939#
940# I2C support
941#
942CONFIG_I2C=y
943CONFIG_I2C_CHARDEV=m
944
945#
946# I2C Algorithms
947#
948CONFIG_I2C_ALGOBIT=y
949# CONFIG_I2C_ALGOPCF is not set
950# CONFIG_I2C_ALGOPCA is not set
951
952#
953# I2C Hardware Bus support
954#
955# CONFIG_I2C_ALI1535 is not set
956# CONFIG_I2C_ALI1563 is not set
957# CONFIG_I2C_ALI15X3 is not set
958# CONFIG_I2C_AMD756 is not set
959# CONFIG_I2C_AMD8111 is not set
960# CONFIG_I2C_HYDRA is not set
961# CONFIG_I2C_I801 is not set
962# CONFIG_I2C_I810 is not set
963# CONFIG_I2C_PIIX4 is not set
964# CONFIG_I2C_ISA is not set
965CONFIG_I2C_KEYWEST=m
966# CONFIG_I2C_MPC is not set
967# CONFIG_I2C_NFORCE2 is not set
968# CONFIG_I2C_PARPORT_LIGHT is not set
969# CONFIG_I2C_PROSAVAGE is not set
970# CONFIG_I2C_SAVAGE4 is not set
971# CONFIG_SCx200_ACB is not set
972# CONFIG_I2C_SIS5595 is not set
973# CONFIG_I2C_SIS630 is not set
974# CONFIG_I2C_SIS96X is not set
975# CONFIG_I2C_STUB is not set
976# CONFIG_I2C_VIA is not set
977# CONFIG_I2C_VIAPRO is not set
978# CONFIG_I2C_VOODOO3 is not set
979# CONFIG_I2C_PCA_ISA is not set
980# CONFIG_I2C_SENSOR is not set
981
982#
983# Miscellaneous I2C Chip support
984#
985# CONFIG_SENSORS_DS1337 is not set
986# CONFIG_SENSORS_DS1374 is not set
987# CONFIG_SENSORS_EEPROM is not set
988# CONFIG_SENSORS_PCF8574 is not set
989# CONFIG_SENSORS_PCA9539 is not set
990# CONFIG_SENSORS_PCF8591 is not set
991# CONFIG_SENSORS_RTC8564 is not set
992# CONFIG_SENSORS_M41T00 is not set
993# CONFIG_SENSORS_MAX6875 is not set
994# CONFIG_I2C_DEBUG_CORE is not set
995# CONFIG_I2C_DEBUG_ALGO is not set
996# CONFIG_I2C_DEBUG_BUS is not set
997# CONFIG_I2C_DEBUG_CHIP is not set
998
999#
1000# Dallas's 1-wire bus
1001#
1002# CONFIG_W1 is not set
1003
1004#
1005# Hardware Monitoring support
1006#
1007# CONFIG_HWMON is not set
1008
1009#
1010# Misc devices
1011#
1012
1013#
1014# Multimedia devices
1015#
1016# CONFIG_VIDEO_DEV is not set
1017
1018#
1019# Digital Video Broadcasting Devices
1020#
1021# CONFIG_DVB is not set
1022
1023#
1024# Graphics support
1025#
1026CONFIG_FB=y
1027CONFIG_FB_CFB_FILLRECT=y
1028CONFIG_FB_CFB_COPYAREA=y
1029CONFIG_FB_CFB_IMAGEBLIT=y
1030CONFIG_FB_SOFT_CURSOR=y
1031CONFIG_FB_MACMODES=y
1032CONFIG_FB_MODE_HELPERS=y
1033CONFIG_FB_TILEBLITTING=y
1034# CONFIG_FB_CIRRUS is not set
1035# CONFIG_FB_PM2 is not set
1036# CONFIG_FB_CYBER2000 is not set
1037CONFIG_FB_OF=y
1038CONFIG_FB_CONTROL=y
1039CONFIG_FB_PLATINUM=y
1040CONFIG_FB_VALKYRIE=y
1041CONFIG_FB_CT65550=y
1042# CONFIG_FB_ASILIANT is not set
1043CONFIG_FB_IMSTT=y
1044# CONFIG_FB_VGA16 is not set
1045# CONFIG_FB_NVIDIA is not set
1046# CONFIG_FB_RIVA is not set
1047CONFIG_FB_MATROX=y
1048CONFIG_FB_MATROX_MILLENIUM=y
1049CONFIG_FB_MATROX_MYSTIQUE=y
1050CONFIG_FB_MATROX_G=y
1051# CONFIG_FB_MATROX_I2C is not set
1052# CONFIG_FB_MATROX_MULTIHEAD is not set
1053# CONFIG_FB_RADEON_OLD is not set
1054CONFIG_FB_RADEON=y
1055CONFIG_FB_RADEON_I2C=y
1056# CONFIG_FB_RADEON_DEBUG is not set
1057CONFIG_FB_ATY128=y
1058CONFIG_FB_ATY=y
1059CONFIG_FB_ATY_CT=y
1060CONFIG_FB_ATY_GENERIC_LCD=y
1061# CONFIG_FB_ATY_XL_INIT is not set
1062CONFIG_FB_ATY_GX=y
1063# CONFIG_FB_SAVAGE is not set
1064# CONFIG_FB_SIS is not set
1065# CONFIG_FB_NEOMAGIC is not set
1066# CONFIG_FB_KYRO is not set
1067CONFIG_FB_3DFX=y
1068CONFIG_FB_3DFX_ACCEL=y
1069# CONFIG_FB_VOODOO1 is not set
1070# CONFIG_FB_TRIDENT is not set
1071# CONFIG_FB_S1D13XXX is not set
1072# CONFIG_FB_VIRTUAL is not set
1073
1074#
1075# Console display driver support
1076#
1077# CONFIG_VGA_CONSOLE is not set
1078CONFIG_DUMMY_CONSOLE=y
1079CONFIG_FRAMEBUFFER_CONSOLE=y
1080# CONFIG_FONTS is not set
1081CONFIG_FONT_8x8=y
1082CONFIG_FONT_8x16=y
1083
1084#
1085# Logo configuration
1086#
1087CONFIG_LOGO=y
1088CONFIG_LOGO_LINUX_MONO=y
1089CONFIG_LOGO_LINUX_VGA16=y
1090CONFIG_LOGO_LINUX_CLUT224=y
1091CONFIG_BACKLIGHT_LCD_SUPPORT=y
1092CONFIG_BACKLIGHT_CLASS_DEVICE=y
1093CONFIG_BACKLIGHT_DEVICE=y
1094CONFIG_LCD_CLASS_DEVICE=y
1095CONFIG_LCD_DEVICE=y
1096
1097#
1098# Sound
1099#
1100CONFIG_SOUND=m
1101CONFIG_DMASOUND_PMAC=m
1102CONFIG_DMASOUND=m
1103
1104#
1105# Advanced Linux Sound Architecture
1106#
1107CONFIG_SND=m
1108CONFIG_SND_TIMER=m
1109CONFIG_SND_PCM=m
1110CONFIG_SND_HWDEP=m
1111CONFIG_SND_RAWMIDI=m
1112CONFIG_SND_SEQUENCER=m
1113CONFIG_SND_SEQ_DUMMY=m
1114CONFIG_SND_OSSEMUL=y
1115CONFIG_SND_MIXER_OSS=m
1116CONFIG_SND_PCM_OSS=m
1117CONFIG_SND_SEQUENCER_OSS=y
1118# CONFIG_SND_VERBOSE_PRINTK is not set
1119# CONFIG_SND_DEBUG is not set
1120
1121#
1122# Generic devices
1123#
1124CONFIG_SND_DUMMY=m
1125# CONFIG_SND_VIRMIDI is not set
1126# CONFIG_SND_MTPAV is not set
1127# CONFIG_SND_SERIAL_U16550 is not set
1128# CONFIG_SND_MPU401 is not set
1129
1130#
1131# PCI devices
1132#
1133# CONFIG_SND_ALI5451 is not set
1134# CONFIG_SND_ATIIXP is not set
1135# CONFIG_SND_ATIIXP_MODEM is not set
1136# CONFIG_SND_AU8810 is not set
1137# CONFIG_SND_AU8820 is not set
1138# CONFIG_SND_AU8830 is not set
1139# CONFIG_SND_AZT3328 is not set
1140# CONFIG_SND_BT87X is not set
1141# CONFIG_SND_CS46XX is not set
1142# CONFIG_SND_CS4281 is not set
1143# CONFIG_SND_EMU10K1 is not set
1144# CONFIG_SND_EMU10K1X is not set
1145# CONFIG_SND_CA0106 is not set
1146# CONFIG_SND_KORG1212 is not set
1147# CONFIG_SND_MIXART is not set
1148# CONFIG_SND_NM256 is not set
1149# CONFIG_SND_RME32 is not set
1150# CONFIG_SND_RME96 is not set
1151# CONFIG_SND_RME9652 is not set
1152# CONFIG_SND_HDSP is not set
1153# CONFIG_SND_HDSPM is not set
1154# CONFIG_SND_TRIDENT is not set
1155# CONFIG_SND_YMFPCI is not set
1156# CONFIG_SND_ALS4000 is not set
1157# CONFIG_SND_CMIPCI is not set
1158# CONFIG_SND_ENS1370 is not set
1159# CONFIG_SND_ENS1371 is not set
1160# CONFIG_SND_ES1938 is not set
1161# CONFIG_SND_ES1968 is not set
1162# CONFIG_SND_MAESTRO3 is not set
1163# CONFIG_SND_FM801 is not set
1164# CONFIG_SND_ICE1712 is not set
1165# CONFIG_SND_ICE1724 is not set
1166# CONFIG_SND_INTEL8X0 is not set
1167# CONFIG_SND_INTEL8X0M is not set
1168# CONFIG_SND_SONICVIBES is not set
1169# CONFIG_SND_VIA82XX is not set
1170# CONFIG_SND_VIA82XX_MODEM is not set
1171# CONFIG_SND_VX222 is not set
1172# CONFIG_SND_HDA_INTEL is not set
1173
1174#
1175# ALSA PowerMac devices
1176#
1177CONFIG_SND_POWERMAC=m
1178
1179#
1180# USB devices
1181#
1182CONFIG_SND_USB_AUDIO=m
1183CONFIG_SND_USB_USX2Y=m
1184
1185#
1186# PCMCIA devices
1187#
1188
1189#
1190# Open Sound System
1191#
1192# CONFIG_SOUND_PRIME is not set
1193
1194#
1195# USB support
1196#
1197CONFIG_USB_ARCH_HAS_HCD=y
1198CONFIG_USB_ARCH_HAS_OHCI=y
1199CONFIG_USB=y
1200# CONFIG_USB_DEBUG is not set
1201
1202#
1203# Miscellaneous USB options
1204#
1205CONFIG_USB_DEVICEFS=y
1206# CONFIG_USB_BANDWIDTH is not set
1207CONFIG_USB_DYNAMIC_MINORS=y
1208CONFIG_USB_SUSPEND=y
1209# CONFIG_USB_OTG is not set
1210
1211#
1212# USB Host Controller Drivers
1213#
1214# CONFIG_USB_EHCI_HCD is not set
1215# CONFIG_USB_ISP116X_HCD is not set
1216CONFIG_USB_OHCI_HCD=y
1217# CONFIG_USB_OHCI_BIG_ENDIAN is not set
1218CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1219# CONFIG_USB_UHCI_HCD is not set
1220# CONFIG_USB_SL811_HCD is not set
1221
1222#
1223# USB Device Class drivers
1224#
1225# CONFIG_USB_AUDIO is not set
1226# CONFIG_USB_BLUETOOTH_TTY is not set
1227# CONFIG_USB_MIDI is not set
1228CONFIG_USB_ACM=m
1229CONFIG_USB_PRINTER=m
1230
1231#
1232# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
1233#
1234# CONFIG_USB_STORAGE is not set
1235
1236#
1237# USB Input Devices
1238#
1239CONFIG_USB_HID=y
1240CONFIG_USB_HIDINPUT=y
1241# CONFIG_HID_FF is not set
1242CONFIG_USB_HIDDEV=y
1243# CONFIG_USB_AIPTEK is not set
1244# CONFIG_USB_WACOM is not set
1245# CONFIG_USB_ACECAD is not set
1246# CONFIG_USB_KBTAB is not set
1247# CONFIG_USB_POWERMATE is not set
1248# CONFIG_USB_MTOUCH is not set
1249# CONFIG_USB_ITMTOUCH is not set
1250# CONFIG_USB_EGALAX is not set
1251# CONFIG_USB_XPAD is not set
1252# CONFIG_USB_ATI_REMOTE is not set
1253# CONFIG_USB_KEYSPAN_REMOTE is not set
1254
1255#
1256# USB Imaging devices
1257#
1258# CONFIG_USB_MDC800 is not set
1259# CONFIG_USB_MICROTEK is not set
1260
1261#
1262# USB Multimedia devices
1263#
1264# CONFIG_USB_DABUSB is not set
1265
1266#
1267# Video4Linux support is needed for USB Multimedia device support
1268#
1269
1270#
1271# USB Network Adapters
1272#
1273# CONFIG_USB_CATC is not set
1274# CONFIG_USB_KAWETH is not set
1275CONFIG_USB_PEGASUS=m
1276# CONFIG_USB_RTL8150 is not set
1277# CONFIG_USB_USBNET is not set
1278# CONFIG_USB_ZD1201 is not set
1279# CONFIG_USB_MON is not set
1280
1281#
1282# USB port drivers
1283#
1284
1285#
1286# USB Serial Converter support
1287#
1288CONFIG_USB_SERIAL=m
1289# CONFIG_USB_SERIAL_GENERIC is not set
1290# CONFIG_USB_SERIAL_AIRPRIME is not set
1291# CONFIG_USB_SERIAL_BELKIN is not set
1292# CONFIG_USB_SERIAL_WHITEHEAT is not set
1293# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
1294# CONFIG_USB_SERIAL_CP2101 is not set
1295# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1296# CONFIG_USB_SERIAL_EMPEG is not set
1297# CONFIG_USB_SERIAL_FTDI_SIO is not set
1298CONFIG_USB_SERIAL_VISOR=m
1299# CONFIG_USB_SERIAL_IPAQ is not set
1300# CONFIG_USB_SERIAL_IR is not set
1301# CONFIG_USB_SERIAL_EDGEPORT is not set
1302# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
1303# CONFIG_USB_SERIAL_GARMIN is not set
1304# CONFIG_USB_SERIAL_IPW is not set
1305# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
1306CONFIG_USB_SERIAL_KEYSPAN=m
1307CONFIG_USB_SERIAL_KEYSPAN_MPR=y
1308CONFIG_USB_SERIAL_KEYSPAN_USA28=y
1309CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
1310CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
1311CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
1312CONFIG_USB_SERIAL_KEYSPAN_USA19=y
1313CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
1314CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
1315CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
1316CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
1317CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
1318CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
1319# CONFIG_USB_SERIAL_KLSI is not set
1320# CONFIG_USB_SERIAL_KOBIL_SCT is not set
1321# CONFIG_USB_SERIAL_MCT_U232 is not set
1322# CONFIG_USB_SERIAL_PL2303 is not set
1323# CONFIG_USB_SERIAL_HP4X is not set
1324# CONFIG_USB_SERIAL_SAFE is not set
1325# CONFIG_USB_SERIAL_TI is not set
1326# CONFIG_USB_SERIAL_CYBERJACK is not set
1327# CONFIG_USB_SERIAL_XIRCOM is not set
1328# CONFIG_USB_SERIAL_OPTION is not set
1329# CONFIG_USB_SERIAL_OMNINET is not set
1330CONFIG_USB_EZUSB=y
1331
1332#
1333# USB Miscellaneous drivers
1334#
1335# CONFIG_USB_EMI62 is not set
1336# CONFIG_USB_EMI26 is not set
1337# CONFIG_USB_AUERSWALD is not set
1338# CONFIG_USB_RIO500 is not set
1339# CONFIG_USB_LEGOTOWER is not set
1340# CONFIG_USB_LCD is not set
1341# CONFIG_USB_LED is not set
1342# CONFIG_USB_CYTHERM is not set
1343# CONFIG_USB_PHIDGETKIT is not set
1344# CONFIG_USB_PHIDGETSERVO is not set
1345# CONFIG_USB_IDMOUSE is not set
1346# CONFIG_USB_LD is not set
1347# CONFIG_USB_TEST is not set
1348
1349#
1350# USB DSL modem support
1351#
1352
1353#
1354# USB Gadget Support
1355#
1356# CONFIG_USB_GADGET is not set
1357
1358#
1359# MMC/SD Card support
1360#
1361# CONFIG_MMC is not set
1362
1363#
1364# InfiniBand support
1365#
1366# CONFIG_INFINIBAND is not set
1367
1368#
1369# SN Devices
1370#
1371
1372#
1373# File systems
1374#
1375CONFIG_EXT2_FS=y
1376CONFIG_EXT2_FS_XATTR=y
1377# CONFIG_EXT2_FS_POSIX_ACL is not set
1378# CONFIG_EXT2_FS_SECURITY is not set
1379# CONFIG_EXT2_FS_XIP is not set
1380CONFIG_EXT3_FS=y
1381CONFIG_EXT3_FS_XATTR=y
1382# CONFIG_EXT3_FS_POSIX_ACL is not set
1383# CONFIG_EXT3_FS_SECURITY is not set
1384CONFIG_JBD=y
1385# CONFIG_JBD_DEBUG is not set
1386CONFIG_FS_MBCACHE=y
1387# CONFIG_REISERFS_FS is not set
1388# CONFIG_JFS_FS is not set
1389CONFIG_FS_POSIX_ACL=y
1390
1391#
1392# XFS support
1393#
1394# CONFIG_XFS_FS is not set
1395# CONFIG_MINIX_FS is not set
1396# CONFIG_ROMFS_FS is not set
1397CONFIG_INOTIFY=y
1398# CONFIG_QUOTA is not set
1399CONFIG_DNOTIFY=y
1400# CONFIG_AUTOFS_FS is not set
1401# CONFIG_AUTOFS4_FS is not set
1402
1403#
1404# CD-ROM/DVD Filesystems
1405#
1406CONFIG_ISO9660_FS=y
1407# CONFIG_JOLIET is not set
1408# CONFIG_ZISOFS is not set
1409CONFIG_UDF_FS=m
1410CONFIG_UDF_NLS=y
1411
1412#
1413# DOS/FAT/NT Filesystems
1414#
1415CONFIG_FAT_FS=m
1416CONFIG_MSDOS_FS=m
1417CONFIG_VFAT_FS=m
1418CONFIG_FAT_DEFAULT_CODEPAGE=437
1419CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1420# CONFIG_NTFS_FS is not set
1421
1422#
1423# Pseudo filesystems
1424#
1425CONFIG_PROC_FS=y
1426CONFIG_PROC_KCORE=y
1427CONFIG_SYSFS=y
1428CONFIG_DEVPTS_FS_XATTR=y
1429CONFIG_DEVPTS_FS_SECURITY=y
1430CONFIG_TMPFS=y
1431CONFIG_TMPFS_XATTR=y
1432CONFIG_TMPFS_SECURITY=y
1433# CONFIG_HUGETLB_PAGE is not set
1434CONFIG_RAMFS=y
1435
1436#
1437# Miscellaneous filesystems
1438#
1439# CONFIG_ADFS_FS is not set
1440# CONFIG_AFFS_FS is not set
1441CONFIG_HFS_FS=m
1442CONFIG_HFSPLUS_FS=m
1443# CONFIG_BEFS_FS is not set
1444# CONFIG_BFS_FS is not set
1445# CONFIG_EFS_FS is not set
1446CONFIG_CRAMFS=m
1447# CONFIG_VXFS_FS is not set
1448# CONFIG_HPFS_FS is not set
1449# CONFIG_QNX4FS_FS is not set
1450# CONFIG_SYSV_FS is not set
1451# CONFIG_UFS_FS is not set
1452
1453#
1454# Network File Systems
1455#
1456CONFIG_NFS_FS=y
1457CONFIG_NFS_V3=y
1458CONFIG_NFS_V3_ACL=y
1459# CONFIG_NFS_V4 is not set
1460# CONFIG_NFS_DIRECTIO is not set
1461CONFIG_NFSD=y
1462CONFIG_NFSD_V2_ACL=y
1463CONFIG_NFSD_V3=y
1464CONFIG_NFSD_V3_ACL=y
1465# CONFIG_NFSD_V4 is not set
1466CONFIG_NFSD_TCP=y
1467CONFIG_LOCKD=y
1468CONFIG_LOCKD_V4=y
1469CONFIG_EXPORTFS=y
1470CONFIG_NFS_ACL_SUPPORT=y
1471CONFIG_NFS_COMMON=y
1472CONFIG_SUNRPC=y
1473# CONFIG_RPCSEC_GSS_KRB5 is not set
1474# CONFIG_RPCSEC_GSS_SPKM3 is not set
1475CONFIG_SMB_FS=m
1476# CONFIG_SMB_NLS_DEFAULT is not set
1477# CONFIG_CIFS is not set
1478# CONFIG_NCP_FS is not set
1479# CONFIG_CODA_FS is not set
1480# CONFIG_AFS_FS is not set
1481
1482#
1483# Partition Types
1484#
1485CONFIG_PARTITION_ADVANCED=y
1486# CONFIG_ACORN_PARTITION is not set
1487# CONFIG_OSF_PARTITION is not set
1488# CONFIG_AMIGA_PARTITION is not set
1489# CONFIG_ATARI_PARTITION is not set
1490CONFIG_MAC_PARTITION=y
1491CONFIG_MSDOS_PARTITION=y
1492# CONFIG_BSD_DISKLABEL is not set
1493# CONFIG_MINIX_SUBPARTITION is not set
1494# CONFIG_SOLARIS_X86_PARTITION is not set
1495# CONFIG_UNIXWARE_DISKLABEL is not set
1496# CONFIG_LDM_PARTITION is not set
1497# CONFIG_SGI_PARTITION is not set
1498# CONFIG_ULTRIX_PARTITION is not set
1499# CONFIG_SUN_PARTITION is not set
1500# CONFIG_EFI_PARTITION is not set
1501
1502#
1503# Native Language Support
1504#
1505CONFIG_NLS=y
1506CONFIG_NLS_DEFAULT="iso8859-1"
1507# CONFIG_NLS_CODEPAGE_437 is not set
1508# CONFIG_NLS_CODEPAGE_737 is not set
1509# CONFIG_NLS_CODEPAGE_775 is not set
1510# CONFIG_NLS_CODEPAGE_850 is not set
1511# CONFIG_NLS_CODEPAGE_852 is not set
1512# CONFIG_NLS_CODEPAGE_855 is not set
1513# CONFIG_NLS_CODEPAGE_857 is not set
1514# CONFIG_NLS_CODEPAGE_860 is not set
1515# CONFIG_NLS_CODEPAGE_861 is not set
1516# CONFIG_NLS_CODEPAGE_862 is not set
1517# CONFIG_NLS_CODEPAGE_863 is not set
1518# CONFIG_NLS_CODEPAGE_864 is not set
1519# CONFIG_NLS_CODEPAGE_865 is not set
1520# CONFIG_NLS_CODEPAGE_866 is not set
1521# CONFIG_NLS_CODEPAGE_869 is not set
1522# CONFIG_NLS_CODEPAGE_936 is not set
1523# CONFIG_NLS_CODEPAGE_950 is not set
1524# CONFIG_NLS_CODEPAGE_932 is not set
1525# CONFIG_NLS_CODEPAGE_949 is not set
1526# CONFIG_NLS_CODEPAGE_874 is not set
1527# CONFIG_NLS_ISO8859_8 is not set
1528CONFIG_NLS_CODEPAGE_1250=m
1529CONFIG_NLS_CODEPAGE_1251=m
1530CONFIG_NLS_ASCII=m
1531CONFIG_NLS_ISO8859_1=m
1532# CONFIG_NLS_ISO8859_2 is not set
1533# CONFIG_NLS_ISO8859_3 is not set
1534# CONFIG_NLS_ISO8859_4 is not set
1535# CONFIG_NLS_ISO8859_5 is not set
1536# CONFIG_NLS_ISO8859_6 is not set
1537# CONFIG_NLS_ISO8859_7 is not set
1538# CONFIG_NLS_ISO8859_9 is not set
1539# CONFIG_NLS_ISO8859_13 is not set
1540# CONFIG_NLS_ISO8859_14 is not set
1541CONFIG_NLS_ISO8859_15=m
1542# CONFIG_NLS_KOI8_R is not set
1543# CONFIG_NLS_KOI8_U is not set
1544CONFIG_NLS_UTF8=m
1545
1546#
1547# Library routines
1548#
1549CONFIG_CRC_CCITT=y
1550CONFIG_CRC32=y
1551# CONFIG_LIBCRC32C is not set
1552CONFIG_ZLIB_INFLATE=y
1553CONFIG_ZLIB_DEFLATE=y
1554
1555#
1556# Profiling support
1557#
1558# CONFIG_PROFILING is not set
1559
1560#
1561# Kernel hacking
1562#
1563# CONFIG_PRINTK_TIME is not set
1564CONFIG_DEBUG_KERNEL=y
1565CONFIG_MAGIC_SYSRQ=y
1566CONFIG_LOG_BUF_SHIFT=16
1567# CONFIG_SCHEDSTATS is not set
1568# CONFIG_DEBUG_SLAB is not set
1569# CONFIG_DEBUG_SPINLOCK is not set
1570# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1571# CONFIG_DEBUG_KOBJECT is not set
1572# CONFIG_DEBUG_INFO is not set
1573# CONFIG_DEBUG_FS is not set
1574# CONFIG_XMON is not set
1575# CONFIG_BDI_SWITCH is not set
1576CONFIG_BOOTX_TEXT=y
1577
1578#
1579# Security options
1580#
1581# CONFIG_KEYS is not set
1582# CONFIG_SECURITY is not set
1583
1584#
1585# Cryptographic options
1586#
1587# CONFIG_CRYPTO is not set
1588
1589#
1590# Hardware crypto devices
1591#
diff --git a/arch/ppc/configs/power3_defconfig b/arch/ppc/configs/power3_defconfig
deleted file mode 100644
index a1ef929bca59..000000000000
--- a/arch/ppc/configs/power3_defconfig
+++ /dev/null
@@ -1,1035 +0,0 @@
1#
2# Automatically generated make config: don't edit
3#
4CONFIG_MMU=y
5CONFIG_RWSEM_XCHGADD_ALGORITHM=y
6CONFIG_HAVE_DEC_LOCK=y
7CONFIG_PPC=y
8CONFIG_PPC32=y
9CONFIG_GENERIC_NVRAM=y
10
11#
12# Code maturity level options
13#
14CONFIG_EXPERIMENTAL=y
15CONFIG_CLEAN_COMPILE=y
16# CONFIG_STANDALONE is not set
17
18#
19# General setup
20#
21CONFIG_SWAP=y
22CONFIG_SYSVIPC=y
23CONFIG_POSIX_MQUEUE=y
24# CONFIG_BSD_PROCESS_ACCT is not set
25CONFIG_SYSCTL=y
26# CONFIG_AUDIT is not set
27CONFIG_LOG_BUF_SHIFT=15
28# CONFIG_HOTPLUG is not set
29CONFIG_IKCONFIG=y
30CONFIG_IKCONFIG_PROC=y
31# CONFIG_EMBEDDED is not set
32CONFIG_KALLSYMS=y
33CONFIG_FUTEX=y
34CONFIG_EPOLL=y
35CONFIG_IOSCHED_NOOP=y
36CONFIG_IOSCHED_AS=y
37CONFIG_IOSCHED_DEADLINE=y
38CONFIG_IOSCHED_CFQ=y
39# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
40
41#
42# Loadable module support
43#
44CONFIG_MODULES=y
45CONFIG_MODULE_UNLOAD=y
46CONFIG_MODULE_FORCE_UNLOAD=y
47CONFIG_OBSOLETE_MODPARM=y
48# CONFIG_MODVERSIONS is not set
49CONFIG_KMOD=y
50CONFIG_STOP_MACHINE=y
51
52#
53# Processor
54#
55# CONFIG_6xx is not set
56# CONFIG_40x is not set
57# CONFIG_44x is not set
58CONFIG_POWER3=y
59# CONFIG_POWER4 is not set
60# CONFIG_8xx is not set
61# CONFIG_CPU_FREQ is not set
62CONFIG_PPC64BRIDGE=y
63CONFIG_PPC_STD_MMU=y
64
65#
66# Platform options
67#
68CONFIG_PPC_MULTIPLATFORM=y
69# CONFIG_APUS is not set
70# CONFIG_WILLOW is not set
71# CONFIG_PCORE is not set
72# CONFIG_POWERPMC250 is not set
73# CONFIG_EV64260 is not set
74# CONFIG_SPRUCE is not set
75# CONFIG_LOPEC is not set
76# CONFIG_MCPN765 is not set
77# CONFIG_MVME5100 is not set
78# CONFIG_PPLUS is not set
79# CONFIG_PRPMC750 is not set
80# CONFIG_PRPMC800 is not set
81# CONFIG_SANDPOINT is not set
82# CONFIG_ADIR is not set
83# CONFIG_K2 is not set
84# CONFIG_PAL4 is not set
85# CONFIG_GEMINI is not set
86# CONFIG_EST8260 is not set
87# CONFIG_SBS8260 is not set
88# CONFIG_RPX6 is not set
89# CONFIG_TQM8260 is not set
90CONFIG_PPC_CHRP=y
91CONFIG_PPC_PMAC=y
92CONFIG_PPC_PREP=y
93CONFIG_PPC_OF=y
94CONFIG_PPCBUG_NVRAM=y
95CONFIG_SMP=y
96# CONFIG_IRQ_ALL_CPUS is not set
97CONFIG_NR_CPUS=32
98# CONFIG_PREEMPT is not set
99CONFIG_HIGHMEM=y
100CONFIG_KERNEL_ELF=y
101CONFIG_BINFMT_ELF=y
102CONFIG_BINFMT_MISC=y
103CONFIG_PROC_DEVICETREE=y
104CONFIG_PPC_RTAS=y
105# CONFIG_PREP_RESIDUAL is not set
106# CONFIG_CMDLINE_BOOL is not set
107
108#
109# Bus options
110#
111CONFIG_ISA=y
112CONFIG_GENERIC_ISA_DMA=y
113CONFIG_PCI=y
114CONFIG_PCI_DOMAINS=y
115CONFIG_PCI_LEGACY_PROC=y
116CONFIG_PCI_NAMES=y
117
118#
119# Advanced setup
120#
121CONFIG_ADVANCED_OPTIONS=y
122# CONFIG_HIGHMEM_START_BOOL is not set
123CONFIG_HIGHMEM_START=0xfe000000
124# CONFIG_LOWMEM_SIZE_BOOL is not set
125CONFIG_LOWMEM_SIZE=0x30000000
126# CONFIG_KERNEL_START_BOOL is not set
127CONFIG_KERNEL_START=0xc0000000
128CONFIG_TASK_SIZE_BOOL=y
129CONFIG_TASK_SIZE=0xc0000000
130CONFIG_BOOT_LOAD=0x00800000
131
132#
133# Device Drivers
134#
135
136#
137# Generic Driver Options
138#
139
140#
141# Memory Technology Devices (MTD)
142#
143# CONFIG_MTD is not set
144
145#
146# Parallel port support
147#
148CONFIG_PARPORT=m
149CONFIG_PARPORT_PC=m
150CONFIG_PARPORT_PC_CML1=m
151# CONFIG_PARPORT_SERIAL is not set
152CONFIG_PARPORT_PC_FIFO=y
153# CONFIG_PARPORT_PC_SUPERIO is not set
154# CONFIG_PARPORT_OTHER is not set
155# CONFIG_PARPORT_1284 is not set
156
157#
158# Plug and Play support
159#
160# CONFIG_PNP is not set
161
162#
163# Block devices
164#
165CONFIG_BLK_DEV_FD=y
166# CONFIG_BLK_DEV_XD is not set
167# CONFIG_PARIDE is not set
168# CONFIG_BLK_CPQ_DA is not set
169# CONFIG_BLK_CPQ_CISS_DA is not set
170# CONFIG_BLK_DEV_DAC960 is not set
171# CONFIG_BLK_DEV_UMEM is not set
172CONFIG_BLK_DEV_LOOP=y
173# CONFIG_BLK_DEV_CRYPTOLOOP is not set
174# CONFIG_BLK_DEV_NBD is not set
175# CONFIG_BLK_DEV_CARMEL is not set
176CONFIG_BLK_DEV_RAM=y
177CONFIG_BLK_DEV_RAM_SIZE=4096
178CONFIG_BLK_DEV_INITRD=y
179CONFIG_LBD=y
180
181#
182# ATA/ATAPI/MFM/RLL support
183#
184# CONFIG_IDE is not set
185
186#
187# SCSI device support
188#
189CONFIG_SCSI=y
190CONFIG_SCSI_PROC_FS=y
191
192#
193# SCSI support type (disk, tape, CD-ROM)
194#
195CONFIG_BLK_DEV_SD=y
196CONFIG_CHR_DEV_ST=y
197# CONFIG_CHR_DEV_OSST is not set
198CONFIG_BLK_DEV_SR=y
199CONFIG_BLK_DEV_SR_VENDOR=y
200CONFIG_CHR_DEV_SG=y
201
202#
203# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
204#
205# CONFIG_SCSI_MULTI_LUN is not set
206# CONFIG_SCSI_REPORT_LUNS is not set
207CONFIG_SCSI_CONSTANTS=y
208CONFIG_SCSI_LOGGING=y
209
210#
211# SCSI Transport Attributes
212#
213CONFIG_SCSI_SPI_ATTRS=y
214# CONFIG_SCSI_FC_ATTRS is not set
215
216#
217# SCSI low-level drivers
218#
219# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
220# CONFIG_SCSI_7000FASST is not set
221# CONFIG_SCSI_ACARD is not set
222# CONFIG_SCSI_AHA152X is not set
223# CONFIG_SCSI_AHA1542 is not set
224# CONFIG_SCSI_AACRAID is not set
225# CONFIG_SCSI_AIC7XXX is not set
226# CONFIG_SCSI_AIC7XXX_OLD is not set
227# CONFIG_SCSI_AIC79XX is not set
228# CONFIG_SCSI_ADVANSYS is not set
229# CONFIG_SCSI_IN2000 is not set
230# CONFIG_SCSI_MEGARAID is not set
231# CONFIG_SCSI_SATA is not set
232# CONFIG_SCSI_BUSLOGIC is not set
233# CONFIG_SCSI_CPQFCTS is not set
234# CONFIG_SCSI_DMX3191D is not set
235# CONFIG_SCSI_DTC3280 is not set
236# CONFIG_SCSI_EATA is not set
237# CONFIG_SCSI_EATA_PIO is not set
238# CONFIG_SCSI_FUTURE_DOMAIN is not set
239# CONFIG_SCSI_GDTH is not set
240# CONFIG_SCSI_GENERIC_NCR5380 is not set
241# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
242# CONFIG_SCSI_IPS is not set
243# CONFIG_SCSI_INIA100 is not set
244# CONFIG_SCSI_PPA is not set
245# CONFIG_SCSI_IMM is not set
246# CONFIG_SCSI_NCR53C406A is not set
247CONFIG_SCSI_SYM53C8XX_2=y
248CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
249CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
250CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
251# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
252# CONFIG_SCSI_IPR is not set
253# CONFIG_SCSI_PAS16 is not set
254# CONFIG_SCSI_PSI240I is not set
255# CONFIG_SCSI_QLOGIC_FAS is not set
256# CONFIG_SCSI_QLOGIC_ISP is not set
257# CONFIG_SCSI_QLOGIC_FC is not set
258# CONFIG_SCSI_QLOGIC_1280 is not set
259CONFIG_SCSI_QLA2XXX=y
260# CONFIG_SCSI_QLA21XX is not set
261# CONFIG_SCSI_QLA22XX is not set
262# CONFIG_SCSI_QLA2300 is not set
263# CONFIG_SCSI_QLA2322 is not set
264# CONFIG_SCSI_QLA6312 is not set
265# CONFIG_SCSI_QLA6322 is not set
266# CONFIG_SCSI_SYM53C416 is not set
267# CONFIG_SCSI_DC395x is not set
268# CONFIG_SCSI_DC390T is not set
269# CONFIG_SCSI_T128 is not set
270# CONFIG_SCSI_U14_34F is not set
271# CONFIG_SCSI_NSP32 is not set
272# CONFIG_SCSI_DEBUG is not set
273# CONFIG_SCSI_MESH is not set
274# CONFIG_SCSI_MAC53C94 is not set
275
276#
277# Old CD-ROM drivers (not SCSI, not IDE)
278#
279# CONFIG_CD_NO_IDESCSI is not set
280
281#
282# Multi-device support (RAID and LVM)
283#
284CONFIG_MD=y
285CONFIG_BLK_DEV_MD=y
286CONFIG_MD_LINEAR=y
287CONFIG_MD_RAID0=y
288CONFIG_MD_RAID1=y
289CONFIG_MD_RAID5=y
290CONFIG_MD_RAID6=y
291# CONFIG_MD_MULTIPATH is not set
292CONFIG_BLK_DEV_DM=y
293CONFIG_DM_CRYPT=y
294
295#
296# Fusion MPT device support
297#
298# CONFIG_FUSION is not set
299
300#
301# IEEE 1394 (FireWire) support
302#
303# CONFIG_IEEE1394 is not set
304
305#
306# I2O device support
307#
308# CONFIG_I2O is not set
309
310#
311# Macintosh device drivers
312#
313# CONFIG_ADB is not set
314# CONFIG_ADB_CUDA is not set
315# CONFIG_ADB_PMU is not set
316# CONFIG_MAC_FLOPPY is not set
317# CONFIG_MAC_SERIAL is not set
318
319#
320# Networking support
321#
322CONFIG_NET=y
323
324#
325# Networking options
326#
327CONFIG_PACKET=y
328# CONFIG_PACKET_MMAP is not set
329# CONFIG_NETLINK_DEV is not set
330CONFIG_UNIX=y
331# CONFIG_NET_KEY is not set
332CONFIG_INET=y
333CONFIG_IP_MULTICAST=y
334# CONFIG_IP_ADVANCED_ROUTER is not set
335# CONFIG_IP_PNP is not set
336# CONFIG_NET_IPIP is not set
337# CONFIG_NET_IPGRE is not set
338# CONFIG_IP_MROUTE is not set
339# CONFIG_ARPD is not set
340CONFIG_SYN_COOKIES=y
341# CONFIG_INET_AH is not set
342# CONFIG_INET_ESP is not set
343# CONFIG_INET_IPCOMP is not set
344# CONFIG_IPV6 is not set
345# CONFIG_NETFILTER is not set
346
347#
348# SCTP Configuration (EXPERIMENTAL)
349#
350# CONFIG_IP_SCTP is not set
351# CONFIG_ATM is not set
352# CONFIG_BRIDGE is not set
353# CONFIG_VLAN_8021Q is not set
354# CONFIG_DECNET is not set
355# CONFIG_LLC2 is not set
356# CONFIG_IPX is not set
357# CONFIG_ATALK is not set
358# CONFIG_X25 is not set
359# CONFIG_LAPB is not set
360# CONFIG_NET_DIVERT is not set
361# CONFIG_ECONET is not set
362# CONFIG_WAN_ROUTER is not set
363# CONFIG_NET_HW_FLOWCONTROL is not set
364
365#
366# QoS and/or fair queueing
367#
368# CONFIG_NET_SCHED is not set
369
370#
371# Network testing
372#
373# CONFIG_NET_PKTGEN is not set
374# CONFIG_NETPOLL is not set
375# CONFIG_NET_POLL_CONTROLLER is not set
376# CONFIG_HAMRADIO is not set
377# CONFIG_IRDA is not set
378# CONFIG_BT is not set
379CONFIG_NETDEVICES=y
380# CONFIG_DUMMY is not set
381# CONFIG_BONDING is not set
382# CONFIG_EQUALIZER is not set
383# CONFIG_TUN is not set
384
385#
386# ARCnet devices
387#
388# CONFIG_ARCNET is not set
389
390#
391# Ethernet (10 or 100Mbit)
392#
393CONFIG_NET_ETHERNET=y
394CONFIG_MII=y
395# CONFIG_MACE is not set
396# CONFIG_BMAC is not set
397# CONFIG_OAKNET is not set
398# CONFIG_HAPPYMEAL is not set
399# CONFIG_SUNGEM is not set
400# CONFIG_NET_VENDOR_3COM is not set
401# CONFIG_LANCE is not set
402# CONFIG_NET_VENDOR_SMC is not set
403# CONFIG_NET_VENDOR_RACAL is not set
404
405#
406# Tulip family network device support
407#
408# CONFIG_NET_TULIP is not set
409# CONFIG_AT1700 is not set
410# CONFIG_DEPCA is not set
411# CONFIG_HP100 is not set
412# CONFIG_NET_ISA is not set
413CONFIG_NET_PCI=y
414CONFIG_PCNET32=y
415# CONFIG_AMD8111_ETH is not set
416# CONFIG_ADAPTEC_STARFIRE is not set
417# CONFIG_AC3200 is not set
418# CONFIG_APRICOT is not set
419# CONFIG_B44 is not set
420# CONFIG_FORCEDETH is not set
421# CONFIG_CS89x0 is not set
422# CONFIG_DGRS is not set
423# CONFIG_EEPRO100 is not set
424CONFIG_E100=y
425# CONFIG_E100_NAPI is not set
426# CONFIG_FEALNX is not set
427# CONFIG_NATSEMI is not set
428# CONFIG_NE2K_PCI is not set
429# CONFIG_8139CP is not set
430# CONFIG_8139TOO is not set
431# CONFIG_SIS900 is not set
432# CONFIG_EPIC100 is not set
433# CONFIG_SUNDANCE is not set
434# CONFIG_TLAN is not set
435# CONFIG_VIA_RHINE is not set
436# CONFIG_NET_POCKET is not set
437
438#
439# Ethernet (1000 Mbit)
440#
441# CONFIG_ACENIC is not set
442# CONFIG_DL2K is not set
443CONFIG_E1000=y
444# CONFIG_E1000_NAPI is not set
445# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
446# CONFIG_NS83820 is not set
447# CONFIG_HAMACHI is not set
448# CONFIG_YELLOWFIN is not set
449# CONFIG_R8169 is not set
450# CONFIG_SK98LIN is not set
451# CONFIG_TIGON3 is not set
452
453#
454# Ethernet (10000 Mbit)
455#
456# CONFIG_IXGB is not set
457# CONFIG_S2IO is not set
458
459#
460# Token Ring devices
461#
462# CONFIG_TR is not set
463
464#
465# Wireless LAN (non-hamradio)
466#
467# CONFIG_NET_RADIO is not set
468
469#
470# Wan interfaces
471#
472# CONFIG_WAN is not set
473# CONFIG_FDDI is not set
474# CONFIG_HIPPI is not set
475# CONFIG_PLIP is not set
476# CONFIG_PPP is not set
477# CONFIG_SLIP is not set
478# CONFIG_NET_FC is not set
479# CONFIG_RCPCI is not set
480# CONFIG_SHAPER is not set
481# CONFIG_NETCONSOLE is not set
482
483#
484# ISDN subsystem
485#
486# CONFIG_ISDN is not set
487
488#
489# Telephony Support
490#
491# CONFIG_PHONE is not set
492
493#
494# Input device support
495#
496CONFIG_INPUT=y
497
498#
499# Userland interfaces
500#
501CONFIG_INPUT_MOUSEDEV=y
502CONFIG_INPUT_MOUSEDEV_PSAUX=y
503CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
504CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
505# CONFIG_INPUT_JOYDEV is not set
506# CONFIG_INPUT_TSDEV is not set
507CONFIG_INPUT_EVDEV=y
508# CONFIG_INPUT_EVBUG is not set
509
510#
511# Input I/O drivers
512#
513CONFIG_GAMEPORT=m
514CONFIG_SOUND_GAMEPORT=m
515# CONFIG_GAMEPORT_NS558 is not set
516# CONFIG_GAMEPORT_L4 is not set
517# CONFIG_GAMEPORT_EMU10K1 is not set
518# CONFIG_GAMEPORT_VORTEX is not set
519# CONFIG_GAMEPORT_FM801 is not set
520# CONFIG_GAMEPORT_CS461x is not set
521CONFIG_SERIO=y
522CONFIG_SERIO_I8042=y
523CONFIG_SERIO_SERPORT=y
524# CONFIG_SERIO_CT82C710 is not set
525# CONFIG_SERIO_PARKBD is not set
526# CONFIG_SERIO_PCIPS2 is not set
527
528#
529# Input Device Drivers
530#
531CONFIG_INPUT_KEYBOARD=y
532CONFIG_KEYBOARD_ATKBD=y
533# CONFIG_KEYBOARD_SUNKBD is not set
534# CONFIG_KEYBOARD_LKKBD is not set
535# CONFIG_KEYBOARD_XTKBD is not set
536# CONFIG_KEYBOARD_NEWTON is not set
537CONFIG_INPUT_MOUSE=y
538CONFIG_MOUSE_PS2=y
539# CONFIG_MOUSE_SERIAL is not set
540# CONFIG_MOUSE_INPORT is not set
541# CONFIG_MOUSE_LOGIBM is not set
542# CONFIG_MOUSE_PC110PAD is not set
543# CONFIG_MOUSE_VSXXXAA is not set
544# CONFIG_INPUT_JOYSTICK is not set
545# CONFIG_INPUT_TOUCHSCREEN is not set
546CONFIG_INPUT_MISC=y
547CONFIG_INPUT_UINPUT=y
548
549#
550# Character devices
551#
552CONFIG_VT=y
553CONFIG_VT_CONSOLE=y
554CONFIG_HW_CONSOLE=y
555# CONFIG_SERIAL_NONSTANDARD is not set
556
557#
558# Serial drivers
559#
560CONFIG_SERIAL_8250=y
561CONFIG_SERIAL_8250_CONSOLE=y
562CONFIG_SERIAL_8250_NR_UARTS=4
563# CONFIG_SERIAL_8250_EXTENDED is not set
564
565#
566# Non-8250 serial port support
567#
568CONFIG_SERIAL_CORE=y
569CONFIG_SERIAL_CORE_CONSOLE=y
570# CONFIG_SERIAL_PMACZILOG is not set
571CONFIG_UNIX98_PTYS=y
572CONFIG_LEGACY_PTYS=y
573CONFIG_LEGACY_PTY_COUNT=256
574CONFIG_PRINTER=m
575# CONFIG_LP_CONSOLE is not set
576# CONFIG_PPDEV is not set
577# CONFIG_TIPAR is not set
578# CONFIG_QIC02_TAPE is not set
579
580#
581# IPMI
582#
583# CONFIG_IPMI_HANDLER is not set
584
585#
586# Watchdog Cards
587#
588# CONFIG_WATCHDOG is not set
589CONFIG_NVRAM=y
590CONFIG_GEN_RTC=y
591# CONFIG_GEN_RTC_X is not set
592# CONFIG_DTLK is not set
593# CONFIG_R3964 is not set
594# CONFIG_APPLICOM is not set
595
596#
597# Ftape, the floppy tape device driver
598#
599# CONFIG_AGP is not set
600# CONFIG_DRM is not set
601# CONFIG_RAW_DRIVER is not set
602
603#
604# I2C support
605#
606CONFIG_I2C=y
607CONFIG_I2C_CHARDEV=y
608
609#
610# I2C Algorithms
611#
612CONFIG_I2C_ALGOBIT=y
613CONFIG_I2C_ALGOPCF=y
614
615#
616# I2C Hardware Bus support
617#
618# CONFIG_I2C_ALI1535 is not set
619# CONFIG_I2C_ALI1563 is not set
620# CONFIG_I2C_ALI15X3 is not set
621# CONFIG_I2C_AMD756 is not set
622# CONFIG_I2C_AMD8111 is not set
623# CONFIG_I2C_HYDRA is not set
624# CONFIG_I2C_I801 is not set
625# CONFIG_I2C_I810 is not set
626# CONFIG_I2C_ISA is not set
627# CONFIG_I2C_KEYWEST is not set
628# CONFIG_I2C_NFORCE2 is not set
629# CONFIG_I2C_PARPORT is not set
630# CONFIG_I2C_PARPORT_LIGHT is not set
631# CONFIG_I2C_PIIX4 is not set
632# CONFIG_I2C_PROSAVAGE is not set
633# CONFIG_I2C_SAVAGE4 is not set
634# CONFIG_SCx200_ACB is not set
635# CONFIG_I2C_SIS5595 is not set
636# CONFIG_I2C_SIS630 is not set
637# CONFIG_I2C_SIS96X is not set
638# CONFIG_I2C_VIA is not set
639# CONFIG_I2C_VIAPRO is not set
640# CONFIG_I2C_VOODOO3 is not set
641
642#
643# Hardware Sensors Chip support
644#
645# CONFIG_I2C_SENSOR is not set
646# CONFIG_SENSORS_ADM1021 is not set
647# CONFIG_SENSORS_ASB100 is not set
648# CONFIG_SENSORS_DS1621 is not set
649# CONFIG_SENSORS_FSCHER is not set
650# CONFIG_SENSORS_GL518SM is not set
651# CONFIG_SENSORS_IT87 is not set
652# CONFIG_SENSORS_LM75 is not set
653# CONFIG_SENSORS_LM78 is not set
654# CONFIG_SENSORS_LM80 is not set
655# CONFIG_SENSORS_LM83 is not set
656# CONFIG_SENSORS_LM85 is not set
657# CONFIG_SENSORS_LM90 is not set
658# CONFIG_SENSORS_VIA686A is not set
659# CONFIG_SENSORS_W83781D is not set
660# CONFIG_SENSORS_W83L785TS is not set
661# CONFIG_SENSORS_W83627HF is not set
662
663#
664# Other I2C Chip support
665#
666# CONFIG_SENSORS_EEPROM is not set
667# CONFIG_SENSORS_PCF8574 is not set
668# CONFIG_SENSORS_PCF8591 is not set
669# CONFIG_I2C_DEBUG_CORE is not set
670# CONFIG_I2C_DEBUG_ALGO is not set
671# CONFIG_I2C_DEBUG_BUS is not set
672# CONFIG_I2C_DEBUG_CHIP is not set
673
674#
675# Misc devices
676#
677
678#
679# Multimedia devices
680#
681# CONFIG_VIDEO_DEV is not set
682
683#
684# Digital Video Broadcasting Devices
685#
686# CONFIG_DVB is not set
687
688#
689# Graphics support
690#
691CONFIG_FB=y
692# CONFIG_FB_PM2 is not set
693# CONFIG_FB_CYBER2000 is not set
694CONFIG_FB_OF=y
695# CONFIG_FB_CONTROL is not set
696# CONFIG_FB_PLATINUM is not set
697# CONFIG_FB_VALKYRIE is not set
698# CONFIG_FB_CT65550 is not set
699# CONFIG_FB_IMSTT is not set
700# CONFIG_FB_S3TRIO is not set
701# CONFIG_FB_VGA16 is not set
702# CONFIG_FB_RIVA is not set
703CONFIG_FB_MATROX=y
704CONFIG_FB_MATROX_MILLENIUM=y
705CONFIG_FB_MATROX_MYSTIQUE=y
706# CONFIG_FB_MATROX_G450 is not set
707CONFIG_FB_MATROX_G100A=y
708CONFIG_FB_MATROX_G100=y
709CONFIG_FB_MATROX_I2C=y
710# CONFIG_FB_MATROX_MAVEN is not set
711CONFIG_FB_MATROX_MULTIHEAD=y
712# CONFIG_FB_RADEON_OLD is not set
713# CONFIG_FB_RADEON is not set
714# CONFIG_FB_ATY128 is not set
715# CONFIG_FB_ATY is not set
716# CONFIG_FB_SIS is not set
717# CONFIG_FB_NEOMAGIC is not set
718# CONFIG_FB_KYRO is not set
719# CONFIG_FB_3DFX is not set
720# CONFIG_FB_VOODOO1 is not set
721# CONFIG_FB_TRIDENT is not set
722# CONFIG_FB_VIRTUAL is not set
723
724#
725# Console display driver support
726#
727# CONFIG_VGA_CONSOLE is not set
728# CONFIG_MDA_CONSOLE is not set
729CONFIG_DUMMY_CONSOLE=y
730CONFIG_FRAMEBUFFER_CONSOLE=y
731CONFIG_PCI_CONSOLE=y
732# CONFIG_FONTS is not set
733CONFIG_FONT_8x8=y
734CONFIG_FONT_8x16=y
735
736#
737# Logo configuration
738#
739CONFIG_LOGO=y
740CONFIG_LOGO_LINUX_MONO=y
741CONFIG_LOGO_LINUX_VGA16=y
742CONFIG_LOGO_LINUX_CLUT224=y
743
744#
745# Sound
746#
747CONFIG_SOUND=y
748# CONFIG_DMASOUND_PMAC is not set
749
750#
751# Advanced Linux Sound Architecture
752#
753CONFIG_SND=m
754CONFIG_SND_TIMER=m
755CONFIG_SND_PCM=m
756CONFIG_SND_HWDEP=m
757CONFIG_SND_RAWMIDI=m
758CONFIG_SND_SEQUENCER=m
759CONFIG_SND_SEQ_DUMMY=m
760CONFIG_SND_OSSEMUL=y
761CONFIG_SND_MIXER_OSS=m
762CONFIG_SND_PCM_OSS=m
763CONFIG_SND_SEQUENCER_OSS=y
764# CONFIG_SND_VERBOSE_PRINTK is not set
765# CONFIG_SND_DEBUG is not set
766
767#
768# Generic devices
769#
770CONFIG_SND_MPU401_UART=m
771CONFIG_SND_OPL3_LIB=m
772CONFIG_SND_DUMMY=m
773# CONFIG_SND_VIRMIDI is not set
774# CONFIG_SND_MTPAV is not set
775# CONFIG_SND_SERIAL_U16550 is not set
776# CONFIG_SND_MPU401 is not set
777
778#
779# ISA devices
780#
781# CONFIG_SND_AD1848 is not set
782# CONFIG_SND_CS4231 is not set
783CONFIG_SND_CS4232=m
784# CONFIG_SND_CS4236 is not set
785# CONFIG_SND_ES1688 is not set
786# CONFIG_SND_ES18XX is not set
787# CONFIG_SND_GUSCLASSIC is not set
788# CONFIG_SND_GUSEXTREME is not set
789# CONFIG_SND_GUSMAX is not set
790# CONFIG_SND_INTERWAVE is not set
791# CONFIG_SND_INTERWAVE_STB is not set
792# CONFIG_SND_OPTI92X_AD1848 is not set
793# CONFIG_SND_OPTI92X_CS4231 is not set
794# CONFIG_SND_OPTI93X is not set
795# CONFIG_SND_SB8 is not set
796# CONFIG_SND_SB16 is not set
797# CONFIG_SND_SBAWE is not set
798# CONFIG_SND_WAVEFRONT is not set
799# CONFIG_SND_CMI8330 is not set
800# CONFIG_SND_OPL3SA2 is not set
801# CONFIG_SND_SGALAXY is not set
802# CONFIG_SND_SSCAPE is not set
803
804#
805# PCI devices
806#
807CONFIG_SND_AC97_CODEC=m
808# CONFIG_SND_ALI5451 is not set
809# CONFIG_SND_ATIIXP is not set
810# CONFIG_SND_AU8810 is not set
811# CONFIG_SND_AU8820 is not set
812# CONFIG_SND_AU8830 is not set
813# CONFIG_SND_AZT3328 is not set
814# CONFIG_SND_BT87X is not set
815CONFIG_SND_CS46XX=m
816# CONFIG_SND_CS46XX_NEW_DSP is not set
817CONFIG_SND_CS4281=m
818# CONFIG_SND_EMU10K1 is not set
819# CONFIG_SND_KORG1212 is not set
820# CONFIG_SND_MIXART is not set
821# CONFIG_SND_NM256 is not set
822# CONFIG_SND_RME32 is not set
823# CONFIG_SND_RME96 is not set
824# CONFIG_SND_RME9652 is not set
825# CONFIG_SND_HDSP is not set
826# CONFIG_SND_TRIDENT is not set
827# CONFIG_SND_YMFPCI is not set
828# CONFIG_SND_ALS4000 is not set
829# CONFIG_SND_CMIPCI is not set
830# CONFIG_SND_ENS1370 is not set
831# CONFIG_SND_ENS1371 is not set
832# CONFIG_SND_ES1938 is not set
833# CONFIG_SND_ES1968 is not set
834# CONFIG_SND_MAESTRO3 is not set
835# CONFIG_SND_FM801 is not set
836# CONFIG_SND_ICE1712 is not set
837# CONFIG_SND_ICE1724 is not set
838# CONFIG_SND_INTEL8X0 is not set
839# CONFIG_SND_INTEL8X0M is not set
840# CONFIG_SND_SONICVIBES is not set
841# CONFIG_SND_VIA82XX is not set
842# CONFIG_SND_VX222 is not set
843
844#
845# ALSA PowerMac devices
846#
847# CONFIG_SND_POWERMAC is not set
848
849#
850# Open Sound System
851#
852# CONFIG_SOUND_PRIME is not set
853
854#
855# USB support
856#
857# CONFIG_USB is not set
858
859#
860# USB Gadget Support
861#
862# CONFIG_USB_GADGET is not set
863
864#
865# File systems
866#
867CONFIG_EXT2_FS=y
868# CONFIG_EXT2_FS_XATTR is not set
869# CONFIG_EXT3_FS is not set
870# CONFIG_JBD is not set
871# CONFIG_REISERFS_FS is not set
872# CONFIG_JFS_FS is not set
873# CONFIG_XFS_FS is not set
874# CONFIG_MINIX_FS is not set
875# CONFIG_ROMFS_FS is not set
876# CONFIG_QUOTA is not set
877# CONFIG_AUTOFS_FS is not set
878# CONFIG_AUTOFS4_FS is not set
879
880#
881# CD-ROM/DVD Filesystems
882#
883CONFIG_ISO9660_FS=y
884CONFIG_JOLIET=y
885# CONFIG_ZISOFS is not set
886# CONFIG_UDF_FS is not set
887
888#
889# DOS/FAT/NT Filesystems
890#
891CONFIG_FAT_FS=y
892CONFIG_MSDOS_FS=y
893CONFIG_VFAT_FS=y
894# CONFIG_NTFS_FS is not set
895
896#
897# Pseudo filesystems
898#
899CONFIG_PROC_FS=y
900CONFIG_PROC_KCORE=y
901CONFIG_SYSFS=y
902# CONFIG_DEVFS_FS is not set
903# CONFIG_DEVPTS_FS_XATTR is not set
904CONFIG_TMPFS=y
905# CONFIG_HUGETLB_PAGE is not set
906CONFIG_RAMFS=y
907
908#
909# Miscellaneous filesystems
910#
911# CONFIG_ADFS_FS is not set
912# CONFIG_AFFS_FS is not set
913# CONFIG_HFS_FS is not set
914# CONFIG_HFSPLUS_FS is not set
915# CONFIG_BEFS_FS is not set
916# CONFIG_BFS_FS is not set
917# CONFIG_EFS_FS is not set
918# CONFIG_CRAMFS is not set
919# CONFIG_VXFS_FS is not set
920# CONFIG_HPFS_FS is not set
921# CONFIG_QNX4FS_FS is not set
922# CONFIG_SYSV_FS is not set
923# CONFIG_UFS_FS is not set
924
925#
926# Network File Systems
927#
928CONFIG_NFS_FS=y
929# CONFIG_NFS_V3 is not set
930# CONFIG_NFS_V4 is not set
931# CONFIG_NFS_DIRECTIO is not set
932CONFIG_NFSD=y
933# CONFIG_NFSD_V3 is not set
934# CONFIG_NFSD_TCP is not set
935CONFIG_LOCKD=y
936CONFIG_EXPORTFS=y
937CONFIG_SUNRPC=y
938# CONFIG_RPCSEC_GSS_KRB5 is not set
939# CONFIG_SMB_FS is not set
940# CONFIG_CIFS is not set
941# CONFIG_NCP_FS is not set
942# CONFIG_CODA_FS is not set
943# CONFIG_AFS_FS is not set
944
945#
946# Partition Types
947#
948# CONFIG_PARTITION_ADVANCED is not set
949CONFIG_MSDOS_PARTITION=y
950
951#
952# Native Language Support
953#
954CONFIG_NLS=y
955CONFIG_NLS_DEFAULT="iso8859-1"
956CONFIG_NLS_CODEPAGE_437=y
957# CONFIG_NLS_CODEPAGE_737 is not set
958# CONFIG_NLS_CODEPAGE_775 is not set
959# CONFIG_NLS_CODEPAGE_850 is not set
960# CONFIG_NLS_CODEPAGE_852 is not set
961# CONFIG_NLS_CODEPAGE_855 is not set
962# CONFIG_NLS_CODEPAGE_857 is not set
963# CONFIG_NLS_CODEPAGE_860 is not set
964# CONFIG_NLS_CODEPAGE_861 is not set
965# CONFIG_NLS_CODEPAGE_862 is not set
966# CONFIG_NLS_CODEPAGE_863 is not set
967# CONFIG_NLS_CODEPAGE_864 is not set
968# CONFIG_NLS_CODEPAGE_865 is not set
969# CONFIG_NLS_CODEPAGE_866 is not set
970# CONFIG_NLS_CODEPAGE_869 is not set
971# CONFIG_NLS_CODEPAGE_936 is not set
972# CONFIG_NLS_CODEPAGE_950 is not set
973# CONFIG_NLS_CODEPAGE_932 is not set
974# CONFIG_NLS_CODEPAGE_949 is not set
975# CONFIG_NLS_CODEPAGE_874 is not set
976# CONFIG_NLS_ISO8859_8 is not set
977# CONFIG_NLS_CODEPAGE_1250 is not set
978# CONFIG_NLS_CODEPAGE_1251 is not set
979CONFIG_NLS_ISO8859_1=y
980# CONFIG_NLS_ISO8859_2 is not set
981# CONFIG_NLS_ISO8859_3 is not set
982# CONFIG_NLS_ISO8859_4 is not set
983# CONFIG_NLS_ISO8859_5 is not set
984# CONFIG_NLS_ISO8859_6 is not set
985# CONFIG_NLS_ISO8859_7 is not set
986# CONFIG_NLS_ISO8859_9 is not set
987# CONFIG_NLS_ISO8859_13 is not set
988# CONFIG_NLS_ISO8859_14 is not set
989# CONFIG_NLS_ISO8859_15 is not set
990# CONFIG_NLS_KOI8_R is not set
991# CONFIG_NLS_KOI8_U is not set
992# CONFIG_NLS_UTF8 is not set
993
994#
995# Library routines
996#
997CONFIG_CRC32=y
998# CONFIG_LIBCRC32C is not set
999CONFIG_ZLIB_INFLATE=m
1000CONFIG_ZLIB_DEFLATE=m
1001
1002#
1003# Kernel hacking
1004#
1005# CONFIG_DEBUG_KERNEL is not set
1006CONFIG_BOOTX_TEXT=y
1007
1008#
1009# Security options
1010#
1011# CONFIG_SECURITY is not set
1012
1013#
1014# Cryptographic options
1015#
1016CONFIG_CRYPTO=y
1017CONFIG_CRYPTO_HMAC=y
1018CONFIG_CRYPTO_NULL=y
1019CONFIG_CRYPTO_MD4=m
1020CONFIG_CRYPTO_MD5=m
1021CONFIG_CRYPTO_SHA1=m
1022CONFIG_CRYPTO_SHA256=m
1023CONFIG_CRYPTO_SHA512=m
1024CONFIG_CRYPTO_DES=m
1025CONFIG_CRYPTO_BLOWFISH=m
1026CONFIG_CRYPTO_TWOFISH=m
1027# CONFIG_CRYPTO_SERPENT is not set
1028CONFIG_CRYPTO_AES=m
1029CONFIG_CRYPTO_CAST5=m
1030CONFIG_CRYPTO_CAST6=m
1031CONFIG_CRYPTO_ARC4=m
1032CONFIG_CRYPTO_DEFLATE=m
1033CONFIG_CRYPTO_MICHAEL_MIC=m
1034# CONFIG_CRYPTO_CRC32C is not set
1035# CONFIG_CRYPTO_TEST is not set
diff --git a/arch/ppc/configs/common_defconfig b/arch/ppc/configs/prep_defconfig
index 4d33bee23a89..4d33bee23a89 100644
--- a/arch/ppc/configs/common_defconfig
+++ b/arch/ppc/configs/prep_defconfig
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index e399bbb969a4..466437f4bcbb 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -1,48 +1,24 @@
1# 1#
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4ifneq ($(CONFIG_PPC_MERGE),y)
5
6extra-$(CONFIG_PPC_STD_MMU) := head.o 4extra-$(CONFIG_PPC_STD_MMU) := head.o
7extra-$(CONFIG_40x) := head_4xx.o 5extra-$(CONFIG_40x) := head_4xx.o
8extra-$(CONFIG_44x) := head_44x.o 6extra-$(CONFIG_44x) := head_44x.o
9extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o 7extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o
10extra-$(CONFIG_8xx) := head_8xx.o 8extra-$(CONFIG_8xx) := head_8xx.o
11extra-$(CONFIG_6xx) += idle_6xx.o
12extra-y += vmlinux.lds 9extra-y += vmlinux.lds
13 10
14obj-y := entry.o traps.o idle.o time.o misc.o \ 11obj-y := entry.o traps.o time.o misc.o \
15 setup.o \ 12 setup.o \
16 ppc_htab.o 13 ppc_htab.o
17obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o 14obj-$(CONFIG_MODULES) += ppc_ksyms.o
18obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
19obj-$(CONFIG_MODULES) += module.o ppc_ksyms.o
20obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-mapping.o 15obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-mapping.o
21obj-$(CONFIG_PCI) += pci.o 16obj-$(CONFIG_PCI) += pci.o
22obj-$(CONFIG_RAPIDIO) += rio.o 17obj-$(CONFIG_RAPIDIO) += rio.o
23obj-$(CONFIG_KGDB) += ppc-stub.o 18obj-$(CONFIG_KGDB) += ppc-stub.o
24obj-$(CONFIG_SMP) += smp.o smp-tbsync.o 19obj-$(CONFIG_SMP) += smp.o smp-tbsync.o
25obj-$(CONFIG_TAU) += temp.o
26ifndef CONFIG_E200
27obj-$(CONFIG_FSL_BOOKE) += perfmon_fsl_booke.o
28endif
29obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o 20obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
30 21
31ifndef CONFIG_MATH_EMULATION 22ifndef CONFIG_MATH_EMULATION
32obj-$(CONFIG_8xx) += softemu8xx.o 23obj-$(CONFIG_8xx) += softemu8xx.o
33endif 24endif
34
35# These are here while we do the architecture merge
36
37else
38obj-y := idle.o
39obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o
40obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
41obj-$(CONFIG_MODULES) += module.o
42obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-mapping.o
43obj-$(CONFIG_KGDB) += ppc-stub.o
44obj-$(CONFIG_TAU) += temp.o
45ifndef CONFIG_E200
46obj-$(CONFIG_FSL_BOOKE) += perfmon_fsl_booke.o
47endif
48endif
diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S
deleted file mode 100644
index 55ed7716636f..000000000000
--- a/arch/ppc/kernel/cpu_setup_6xx.S
+++ /dev/null
@@ -1,474 +0,0 @@
1/*
2 * This file contains low level CPU setup functions.
3 * Copyright (C) 2003 Benjamin Herrenschmidt (benh@kernel.crashing.org)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 *
10 */
11
12#include <linux/config.h>
13#include <asm/processor.h>
14#include <asm/page.h>
15#include <asm/cputable.h>
16#include <asm/ppc_asm.h>
17#include <asm/asm-offsets.h>
18#include <asm/cache.h>
19
20_GLOBAL(__setup_cpu_603)
21 b setup_common_caches
22_GLOBAL(__setup_cpu_604)
23 mflr r4
24 bl setup_common_caches
25 bl setup_604_hid0
26 mtlr r4
27 blr
28_GLOBAL(__setup_cpu_750)
29 mflr r4
30 bl __init_fpu_registers
31 bl setup_common_caches
32 bl setup_750_7400_hid0
33 mtlr r4
34 blr
35_GLOBAL(__setup_cpu_750cx)
36 mflr r4
37 bl __init_fpu_registers
38 bl setup_common_caches
39 bl setup_750_7400_hid0
40 bl setup_750cx
41 mtlr r4
42 blr
43_GLOBAL(__setup_cpu_750fx)
44 mflr r4
45 bl __init_fpu_registers
46 bl setup_common_caches
47 bl setup_750_7400_hid0
48 bl setup_750fx
49 mtlr r4
50 blr
51_GLOBAL(__setup_cpu_7400)
52 mflr r4
53 bl __init_fpu_registers
54 bl setup_7400_workarounds
55 bl setup_common_caches
56 bl setup_750_7400_hid0
57 mtlr r4
58 blr
59_GLOBAL(__setup_cpu_7410)
60 mflr r4
61 bl __init_fpu_registers
62 bl setup_7410_workarounds
63 bl setup_common_caches
64 bl setup_750_7400_hid0
65 li r3,0
66 mtspr SPRN_L2CR2,r3
67 mtlr r4
68 blr
69_GLOBAL(__setup_cpu_745x)
70 mflr r4
71 bl setup_common_caches
72 bl setup_745x_specifics
73 mtlr r4
74 blr
75
76/* Enable caches for 603's, 604, 750 & 7400 */
77setup_common_caches:
78 mfspr r11,SPRN_HID0
79 andi. r0,r11,HID0_DCE
80 ori r11,r11,HID0_ICE|HID0_DCE
81 ori r8,r11,HID0_ICFI
82 bne 1f /* don't invalidate the D-cache */
83 ori r8,r8,HID0_DCI /* unless it wasn't enabled */
841: sync
85 mtspr SPRN_HID0,r8 /* enable and invalidate caches */
86 sync
87 mtspr SPRN_HID0,r11 /* enable caches */
88 sync
89 isync
90 blr
91
92/* 604, 604e, 604ev, ...
93 * Enable superscalar execution & branch history table
94 */
95setup_604_hid0:
96 mfspr r11,SPRN_HID0
97 ori r11,r11,HID0_SIED|HID0_BHTE
98 ori r8,r11,HID0_BTCD
99 sync
100 mtspr SPRN_HID0,r8 /* flush branch target address cache */
101 sync /* on 604e/604r */
102 mtspr SPRN_HID0,r11
103 sync
104 isync
105 blr
106
107/* 7400 <= rev 2.7 and 7410 rev = 1.0 suffer from some
108 * erratas we work around here.
109 * Moto MPC710CE.pdf describes them, those are errata
110 * #3, #4 and #5
111 * Note that we assume the firmware didn't choose to
112 * apply other workarounds (there are other ones documented
113 * in the .pdf). It appear that Apple firmware only works
114 * around #3 and with the same fix we use. We may want to
115 * check if the CPU is using 60x bus mode in which case
116 * the workaround for errata #4 is useless. Also, we may
117 * want to explicitely clear HID0_NOPDST as this is not
118 * needed once we have applied workaround #5 (though it's
119 * not set by Apple's firmware at least).
120 */
121setup_7400_workarounds:
122 mfpvr r3
123 rlwinm r3,r3,0,20,31
124 cmpwi 0,r3,0x0207
125 ble 1f
126 blr
127setup_7410_workarounds:
128 mfpvr r3
129 rlwinm r3,r3,0,20,31
130 cmpwi 0,r3,0x0100
131 bnelr
1321:
133 mfspr r11,SPRN_MSSSR0
134 /* Errata #3: Set L1OPQ_SIZE to 0x10 */
135 rlwinm r11,r11,0,9,6
136 oris r11,r11,0x0100
137 /* Errata #4: Set L2MQ_SIZE to 1 (check for MPX mode first ?) */
138 oris r11,r11,0x0002
139 /* Errata #5: Set DRLT_SIZE to 0x01 */
140 rlwinm r11,r11,0,5,2
141 oris r11,r11,0x0800
142 sync
143 mtspr SPRN_MSSSR0,r11
144 sync
145 isync
146 blr
147
148/* 740/750/7400/7410
149 * Enable Store Gathering (SGE), Address Brodcast (ABE),
150 * Branch History Table (BHTE), Branch Target ICache (BTIC)
151 * Dynamic Power Management (DPM), Speculative (SPD)
152 * Clear Instruction cache throttling (ICTC)
153 */
154setup_750_7400_hid0:
155 mfspr r11,SPRN_HID0
156 ori r11,r11,HID0_SGE | HID0_ABE | HID0_BHTE | HID0_BTIC
157 oris r11,r11,HID0_DPM@h
158BEGIN_FTR_SECTION
159 xori r11,r11,HID0_BTIC
160END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC)
161BEGIN_FTR_SECTION
162 xoris r11,r11,HID0_DPM@h /* disable dynamic power mgmt */
163END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM)
164 li r3,HID0_SPD
165 andc r11,r11,r3 /* clear SPD: enable speculative */
166 li r3,0
167 mtspr SPRN_ICTC,r3 /* Instruction Cache Throttling off */
168 isync
169 mtspr SPRN_HID0,r11
170 sync
171 isync
172 blr
173
174/* 750cx specific
175 * Looks like we have to disable NAP feature for some PLL settings...
176 * (waiting for confirmation)
177 */
178setup_750cx:
179 mfspr r10, SPRN_HID1
180 rlwinm r10,r10,4,28,31
181 cmpwi cr0,r10,7
182 cmpwi cr1,r10,9
183 cmpwi cr2,r10,11
184 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
185 cror 4*cr0+eq,4*cr0+eq,4*cr2+eq
186 bnelr
187 lwz r6,CPU_SPEC_FEATURES(r5)
188 li r7,CPU_FTR_CAN_NAP
189 andc r6,r6,r7
190 stw r6,CPU_SPEC_FEATURES(r5)
191 blr
192
193/* 750fx specific
194 */
195setup_750fx:
196 blr
197
198/* MPC 745x
199 * Enable Store Gathering (SGE), Branch Folding (FOLD)
200 * Branch History Table (BHTE), Branch Target ICache (BTIC)
201 * Dynamic Power Management (DPM), Speculative (SPD)
202 * Ensure our data cache instructions really operate.
203 * Timebase has to be running or we wouldn't have made it here,
204 * just ensure we don't disable it.
205 * Clear Instruction cache throttling (ICTC)
206 * Enable L2 HW prefetch
207 */
208setup_745x_specifics:
209 /* We check for the presence of an L3 cache setup by
210 * the firmware. If any, we disable NAP capability as
211 * it's known to be bogus on rev 2.1 and earlier
212 */
213 mfspr r11,SPRN_L3CR
214 andis. r11,r11,L3CR_L3E@h
215 beq 1f
216 lwz r6,CPU_SPEC_FEATURES(r5)
217 andi. r0,r6,CPU_FTR_L3_DISABLE_NAP
218 beq 1f
219 li r7,CPU_FTR_CAN_NAP
220 andc r6,r6,r7
221 stw r6,CPU_SPEC_FEATURES(r5)
2221:
223 mfspr r11,SPRN_HID0
224
225 /* All of the bits we have to set.....
226 */
227 ori r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE
228 ori r11,r11,HID0_LRSTK | HID0_BTIC
229 oris r11,r11,HID0_DPM@h
230BEGIN_FTR_SECTION
231 xori r11,r11,HID0_BTIC
232END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC)
233BEGIN_FTR_SECTION
234 xoris r11,r11,HID0_DPM@h /* disable dynamic power mgmt */
235END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM)
236
237 /* All of the bits we have to clear....
238 */
239 li r3,HID0_SPD | HID0_NOPDST | HID0_NOPTI
240 andc r11,r11,r3 /* clear SPD: enable speculative */
241 li r3,0
242
243 mtspr SPRN_ICTC,r3 /* Instruction Cache Throttling off */
244 isync
245 mtspr SPRN_HID0,r11
246 sync
247 isync
248
249 /* Enable L2 HW prefetch, if L2 is enabled
250 */
251 mfspr r3,SPRN_L2CR
252 andis. r3,r3,L2CR_L2E@h
253 beqlr
254 mfspr r3,SPRN_MSSCR0
255 ori r3,r3,3
256 sync
257 mtspr SPRN_MSSCR0,r3
258 sync
259 isync
260 blr
261
262/*
263 * Initialize the FPU registers. This is needed to work around an errata
264 * in some 750 cpus where using a not yet initialized FPU register after
265 * power on reset may hang the CPU
266 */
267_GLOBAL(__init_fpu_registers)
268 mfmsr r10
269 ori r11,r10,MSR_FP
270 mtmsr r11
271 isync
272 addis r9,r3,empty_zero_page@ha
273 addi r9,r9,empty_zero_page@l
274 REST_32FPRS(0,r9)
275 sync
276 mtmsr r10
277 isync
278 blr
279
280
281/* Definitions for the table use to save CPU states */
282#define CS_HID0 0
283#define CS_HID1 4
284#define CS_HID2 8
285#define CS_MSSCR0 12
286#define CS_MSSSR0 16
287#define CS_ICTRL 20
288#define CS_LDSTCR 24
289#define CS_LDSTDB 28
290#define CS_SIZE 32
291
292 .data
293 .balign L1_CACHE_BYTES
294cpu_state_storage:
295 .space CS_SIZE
296 .balign L1_CACHE_BYTES,0
297 .text
298
299/* Called in normal context to backup CPU 0 state. This
300 * does not include cache settings. This function is also
301 * called for machine sleep. This does not include the MMU
302 * setup, BATs, etc... but rather the "special" registers
303 * like HID0, HID1, MSSCR0, etc...
304 */
305_GLOBAL(__save_cpu_setup)
306 /* Some CR fields are volatile, we back it up all */
307 mfcr r7
308
309 /* Get storage ptr */
310 lis r5,cpu_state_storage@h
311 ori r5,r5,cpu_state_storage@l
312
313 /* Save HID0 (common to all CONFIG_6xx cpus) */
314 mfspr r3,SPRN_HID0
315 stw r3,CS_HID0(r5)
316
317 /* Now deal with CPU type dependent registers */
318 mfspr r3,SPRN_PVR
319 srwi r3,r3,16
320 cmplwi cr0,r3,0x8000 /* 7450 */
321 cmplwi cr1,r3,0x000c /* 7400 */
322 cmplwi cr2,r3,0x800c /* 7410 */
323 cmplwi cr3,r3,0x8001 /* 7455 */
324 cmplwi cr4,r3,0x8002 /* 7457 */
325 cmplwi cr5,r3,0x8003 /* 7447A */
326 cmplwi cr6,r3,0x7000 /* 750FX */
327 cmplwi cr7,r3,0x8004 /* 7448 */
328 /* cr1 is 7400 || 7410 */
329 cror 4*cr1+eq,4*cr1+eq,4*cr2+eq
330 /* cr0 is 74xx */
331 cror 4*cr0+eq,4*cr0+eq,4*cr3+eq
332 cror 4*cr0+eq,4*cr0+eq,4*cr4+eq
333 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
334 cror 4*cr0+eq,4*cr0+eq,4*cr5+eq
335 cror 4*cr0+eq,4*cr0+eq,4*cr7+eq
336 bne 1f
337 /* Backup 74xx specific regs */
338 mfspr r4,SPRN_MSSCR0
339 stw r4,CS_MSSCR0(r5)
340 mfspr r4,SPRN_MSSSR0
341 stw r4,CS_MSSSR0(r5)
342 beq cr1,1f
343 /* Backup 745x specific registers */
344 mfspr r4,SPRN_HID1
345 stw r4,CS_HID1(r5)
346 mfspr r4,SPRN_ICTRL
347 stw r4,CS_ICTRL(r5)
348 mfspr r4,SPRN_LDSTCR
349 stw r4,CS_LDSTCR(r5)
350 mfspr r4,SPRN_LDSTDB
351 stw r4,CS_LDSTDB(r5)
3521:
353 bne cr6,1f
354 /* Backup 750FX specific registers */
355 mfspr r4,SPRN_HID1
356 stw r4,CS_HID1(r5)
357 /* If rev 2.x, backup HID2 */
358 mfspr r3,SPRN_PVR
359 andi. r3,r3,0xff00
360 cmpwi cr0,r3,0x0200
361 bne 1f
362 mfspr r4,SPRN_HID2
363 stw r4,CS_HID2(r5)
3641:
365 mtcr r7
366 blr
367
368/* Called with no MMU context (typically MSR:IR/DR off) to
369 * restore CPU state as backed up by the previous
370 * function. This does not include cache setting
371 */
372_GLOBAL(__restore_cpu_setup)
373 /* Some CR fields are volatile, we back it up all */
374 mfcr r7
375
376 /* Get storage ptr */
377 lis r5,(cpu_state_storage-KERNELBASE)@h
378 ori r5,r5,cpu_state_storage@l
379
380 /* Restore HID0 */
381 lwz r3,CS_HID0(r5)
382 sync
383 isync
384 mtspr SPRN_HID0,r3
385 sync
386 isync
387
388 /* Now deal with CPU type dependent registers */
389 mfspr r3,SPRN_PVR
390 srwi r3,r3,16
391 cmplwi cr0,r3,0x8000 /* 7450 */
392 cmplwi cr1,r3,0x000c /* 7400 */
393 cmplwi cr2,r3,0x800c /* 7410 */
394 cmplwi cr3,r3,0x8001 /* 7455 */
395 cmplwi cr4,r3,0x8002 /* 7457 */
396 cmplwi cr5,r3,0x8003 /* 7447A */
397 cmplwi cr6,r3,0x7000 /* 750FX */
398 cmplwi cr7,r3,0x8004 /* 7448 */
399 /* cr1 is 7400 || 7410 */
400 cror 4*cr1+eq,4*cr1+eq,4*cr2+eq
401 /* cr0 is 74xx */
402 cror 4*cr0+eq,4*cr0+eq,4*cr3+eq
403 cror 4*cr0+eq,4*cr0+eq,4*cr4+eq
404 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
405 cror 4*cr0+eq,4*cr0+eq,4*cr5+eq
406 cror 4*cr0+eq,4*cr0+eq,4*cr7+eq
407 bne 2f
408 /* Restore 74xx specific regs */
409 lwz r4,CS_MSSCR0(r5)
410 sync
411 mtspr SPRN_MSSCR0,r4
412 sync
413 isync
414 lwz r4,CS_MSSSR0(r5)
415 sync
416 mtspr SPRN_MSSSR0,r4
417 sync
418 isync
419 bne cr2,1f
420 /* Clear 7410 L2CR2 */
421 li r4,0
422 mtspr SPRN_L2CR2,r4
4231: beq cr1,2f
424 /* Restore 745x specific registers */
425 lwz r4,CS_HID1(r5)
426 sync
427 mtspr SPRN_HID1,r4
428 isync
429 sync
430 lwz r4,CS_ICTRL(r5)
431 sync
432 mtspr SPRN_ICTRL,r4
433 isync
434 sync
435 lwz r4,CS_LDSTCR(r5)
436 sync
437 mtspr SPRN_LDSTCR,r4
438 isync
439 sync
440 lwz r4,CS_LDSTDB(r5)
441 sync
442 mtspr SPRN_LDSTDB,r4
443 isync
444 sync
4452: bne cr6,1f
446 /* Restore 750FX specific registers
447 * that is restore HID2 on rev 2.x and PLL config & switch
448 * to PLL 0 on all
449 */
450 /* If rev 2.x, restore HID2 with low voltage bit cleared */
451 mfspr r3,SPRN_PVR
452 andi. r3,r3,0xff00
453 cmpwi cr0,r3,0x0200
454 bne 4f
455 lwz r4,CS_HID2(r5)
456 rlwinm r4,r4,0,19,17
457 mtspr SPRN_HID2,r4
458 sync
4594:
460 lwz r4,CS_HID1(r5)
461 rlwinm r5,r4,0,16,14
462 mtspr SPRN_HID1,r5
463 /* Wait for PLL to stabilize */
464 mftbl r5
4653: mftbl r6
466 sub r6,r6,r5
467 cmplwi cr0,r6,10000
468 ble 3b
469 /* Setup final PLL */
470 mtspr SPRN_HID1,r4
4711:
472 mtcr r7
473 blr
474
diff --git a/arch/ppc/kernel/dma-mapping.c b/arch/ppc/kernel/dma-mapping.c
index 685fd0defe23..61465ec88bc7 100644
--- a/arch/ppc/kernel/dma-mapping.c
+++ b/arch/ppc/kernel/dma-mapping.c
@@ -223,6 +223,8 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
223 pte_t *pte = consistent_pte + CONSISTENT_OFFSET(vaddr); 223 pte_t *pte = consistent_pte + CONSISTENT_OFFSET(vaddr);
224 struct page *end = page + (1 << order); 224 struct page *end = page + (1 << order);
225 225
226 split_page(page, order);
227
226 /* 228 /*
227 * Set the "dma handle" 229 * Set the "dma handle"
228 */ 230 */
@@ -231,7 +233,6 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
231 do { 233 do {
232 BUG_ON(!pte_none(*pte)); 234 BUG_ON(!pte_none(*pte));
233 235
234 set_page_count(page, 1);
235 SetPageReserved(page); 236 SetPageReserved(page);
236 set_pte_at(&init_mm, vaddr, 237 set_pte_at(&init_mm, vaddr,
237 pte, mk_pte(page, pgprot_noncached(PAGE_KERNEL))); 238 pte, mk_pte(page, pgprot_noncached(PAGE_KERNEL)));
@@ -244,7 +245,6 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp)
244 * Free the otherwise unused pages. 245 * Free the otherwise unused pages.
245 */ 246 */
246 while (page < end) { 247 while (page < end) {
247 set_page_count(page, 1);
248 __free_page(page); 248 __free_page(page);
249 page++; 249 page++;
250 } 250 }
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
index 3a2815978488..5891ecbdc703 100644
--- a/arch/ppc/kernel/entry.S
+++ b/arch/ppc/kernel/entry.S
@@ -135,10 +135,10 @@ transfer_to_handler:
135 mfspr r11,SPRN_HID0 135 mfspr r11,SPRN_HID0
136 mtcr r11 136 mtcr r11
137BEGIN_FTR_SECTION 137BEGIN_FTR_SECTION
138 bt- 8,power_save_6xx_restore /* Check DOZE */ 138 bt- 8,4f /* Check DOZE */
139END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE) 139END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
140BEGIN_FTR_SECTION 140BEGIN_FTR_SECTION
141 bt- 9,power_save_6xx_restore /* Check NAP */ 141 bt- 9,4f /* Check NAP */
142END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) 142END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
143#endif /* CONFIG_6xx */ 143#endif /* CONFIG_6xx */
144 .globl transfer_to_handler_cont 144 .globl transfer_to_handler_cont
@@ -157,6 +157,10 @@ transfer_to_handler_cont:
157 SYNC 157 SYNC
158 RFI /* jump to handler, enable MMU */ 158 RFI /* jump to handler, enable MMU */
159 159
160#ifdef CONFIG_6xx
1614: b power_save_6xx_restore
162#endif
163
160/* 164/*
161 * On kernel stack overflow, load up an initial stack pointer 165 * On kernel stack overflow, load up an initial stack pointer
162 * and call StackOverflow(regs), which should not return. 166 * and call StackOverflow(regs), which should not return.
@@ -926,55 +930,3 @@ END_FTR_SECTION_IFSET(CPU_FTR_601)
926 b 4b 930 b 4b
927 931
928 .comm ee_restarts,4 932 .comm ee_restarts,4
929
930/*
931 * PROM code for specific machines follows. Put it
932 * here so it's easy to add arch-specific sections later.
933 * -- Cort
934 */
935#ifdef CONFIG_PPC_OF
936/*
937 * On CHRP, the Run-Time Abstraction Services (RTAS) have to be
938 * called with the MMU off.
939 */
940_GLOBAL(enter_rtas)
941 stwu r1,-INT_FRAME_SIZE(r1)
942 mflr r0
943 stw r0,INT_FRAME_SIZE+4(r1)
944 lis r4,rtas_data@ha
945 lwz r4,rtas_data@l(r4)
946 lis r6,1f@ha /* physical return address for rtas */
947 addi r6,r6,1f@l
948 tophys(r6,r6)
949 tophys(r7,r1)
950 lis r8,rtas_entry@ha
951 lwz r8,rtas_entry@l(r8)
952 mfmsr r9
953 stw r9,8(r1)
954 LOAD_MSR_KERNEL(r0,MSR_KERNEL)
955 SYNC /* disable interrupts so SRR0/1 */
956 MTMSRD(r0) /* don't get trashed */
957 li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR)
958 mtlr r6
959 CLR_TOP32(r7)
960 mtspr SPRN_SPRG2,r7
961 mtspr SPRN_SRR0,r8
962 mtspr SPRN_SRR1,r9
963 RFI
9641: tophys(r9,r1)
965 lwz r8,INT_FRAME_SIZE+4(r9) /* get return address */
966 lwz r9,8(r9) /* original msr value */
967 FIX_SRR1(r9,r0)
968 addi r1,r1,INT_FRAME_SIZE
969 li r0,0
970 mtspr SPRN_SPRG2,r0
971 mtspr SPRN_SRR0,r8
972 mtspr SPRN_SRR1,r9
973 RFI /* return to caller */
974
975 .globl machine_check_in_rtas
976machine_check_in_rtas:
977 twi 31,0,0
978 /* XXX load up BATs and panic */
979
980#endif /* CONFIG_PPC_OF */
diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
index 53ea845fb911..01303efeddad 100644
--- a/arch/ppc/kernel/head.S
+++ b/arch/ppc/kernel/head.S
@@ -37,19 +37,6 @@
37#include <asm/amigappc.h> 37#include <asm/amigappc.h>
38#endif 38#endif
39 39
40#ifdef CONFIG_PPC64BRIDGE
41#define LOAD_BAT(n, reg, RA, RB) \
42 ld RA,(n*32)+0(reg); \
43 ld RB,(n*32)+8(reg); \
44 mtspr SPRN_IBAT##n##U,RA; \
45 mtspr SPRN_IBAT##n##L,RB; \
46 ld RA,(n*32)+16(reg); \
47 ld RB,(n*32)+24(reg); \
48 mtspr SPRN_DBAT##n##U,RA; \
49 mtspr SPRN_DBAT##n##L,RB; \
50
51#else /* CONFIG_PPC64BRIDGE */
52
53/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */ 40/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
54#define LOAD_BAT(n, reg, RA, RB) \ 41#define LOAD_BAT(n, reg, RA, RB) \
55 /* see the comment for clear_bats() -- Cort */ \ 42 /* see the comment for clear_bats() -- Cort */ \
@@ -66,7 +53,6 @@
66 mtspr SPRN_DBAT##n##U,RA; \ 53 mtspr SPRN_DBAT##n##U,RA; \
67 mtspr SPRN_DBAT##n##L,RB; \ 54 mtspr SPRN_DBAT##n##L,RB; \
681: 551:
69#endif /* CONFIG_PPC64BRIDGE */
70 56
71 .text 57 .text
72 .stabs "arch/ppc/kernel/",N_SO,0,0,0f 58 .stabs "arch/ppc/kernel/",N_SO,0,0,0f
@@ -129,11 +115,6 @@ _start:
129 115
130 .globl __start 116 .globl __start
131__start: 117__start:
132/*
133 * We have to do any OF calls before we map ourselves to KERNELBASE,
134 * because OF may have I/O devices mapped into that area
135 * (particularly on CHRP).
136 */
137 mr r31,r3 /* save parameters */ 118 mr r31,r3 /* save parameters */
138 mr r30,r4 119 mr r30,r4
139 mr r29,r5 120 mr r29,r5
@@ -148,14 +129,6 @@ __start:
148 */ 129 */
149 bl early_init 130 bl early_init
150 131
151/*
152 * On POWER4, we first need to tweak some CPU configuration registers
153 * like real mode cache inhibit or exception base
154 */
155#ifdef CONFIG_POWER4
156 bl __970_cpu_preinit
157#endif /* CONFIG_POWER4 */
158
159#ifdef CONFIG_APUS 132#ifdef CONFIG_APUS
160/* On APUS the __va/__pa constants need to be set to the correct 133/* On APUS the __va/__pa constants need to be set to the correct
161 * values before continuing. 134 * values before continuing.
@@ -169,7 +142,6 @@ __start:
169 */ 142 */
170 bl mmu_off 143 bl mmu_off
171__after_mmu_off: 144__after_mmu_off:
172#ifndef CONFIG_POWER4
173 bl clear_bats 145 bl clear_bats
174 bl flush_tlbs 146 bl flush_tlbs
175 147
@@ -177,10 +149,6 @@ __after_mmu_off:
177#if !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT) 149#if !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT)
178 bl setup_disp_bat 150 bl setup_disp_bat
179#endif 151#endif
180#else /* CONFIG_POWER4 */
181 bl reloc_offset
182 bl initial_mm_power4
183#endif /* CONFIG_POWER4 */
184 152
185/* 153/*
186 * Call setup_cpu for CPU 0 and initialize 6xx Idle 154 * Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -192,18 +160,11 @@ __after_mmu_off:
192 bl reloc_offset 160 bl reloc_offset
193 bl init_idle_6xx 161 bl init_idle_6xx
194#endif /* CONFIG_6xx */ 162#endif /* CONFIG_6xx */
195#ifdef CONFIG_POWER4
196 bl reloc_offset
197 bl init_idle_power4
198#endif /* CONFIG_POWER4 */
199 163
200 164
201#ifndef CONFIG_APUS 165#ifndef CONFIG_APUS
202/* 166/*
203 * We need to run with _start at physical address 0. 167 * We need to run with _start at physical address 0.
204 * On CHRP, we are loaded at 0x10000 since OF on CHRP uses
205 * the exception vectors at 0 (and therefore this copy
206 * overwrites OF's exception vectors with our own).
207 * If the MMU is already turned on, we copy stuff to KERNELBASE, 168 * If the MMU is already turned on, we copy stuff to KERNELBASE,
208 * otherwise we copy it to 0. 169 * otherwise we copy it to 0.
209 */ 170 */
@@ -358,51 +319,19 @@ i##n: \
358#endif 319#endif
359 320
360/* Machine check */ 321/* Machine check */
361/*
362 * On CHRP, this is complicated by the fact that we could get a
363 * machine check inside RTAS, and we have no guarantee that certain
364 * critical registers will have the values we expect. The set of
365 * registers that might have bad values includes all the GPRs
366 * and all the BATs. We indicate that we are in RTAS by putting
367 * a non-zero value, the address of the exception frame to use,
368 * in SPRG2. The machine check handler checks SPRG2 and uses its
369 * value if it is non-zero. If we ever needed to free up SPRG2,
370 * we could use a field in the thread_info or thread_struct instead.
371 * (Other exception handlers assume that r1 is a valid kernel stack
372 * pointer when we take an exception from supervisor mode.)
373 * -- paulus.
374 */
375 . = 0x200 322 . = 0x200
376 mtspr SPRN_SPRG0,r10 323 mtspr SPRN_SPRG0,r10
377 mtspr SPRN_SPRG1,r11 324 mtspr SPRN_SPRG1,r11
378 mfcr r10 325 mfcr r10
379#ifdef CONFIG_PPC_CHRP
380 mfspr r11,SPRN_SPRG2
381 cmpwi 0,r11,0
382 bne 7f
383#endif /* CONFIG_PPC_CHRP */
384 EXCEPTION_PROLOG_1 326 EXCEPTION_PROLOG_1
3857: EXCEPTION_PROLOG_2 3277: EXCEPTION_PROLOG_2
386 addi r3,r1,STACK_FRAME_OVERHEAD 328 addi r3,r1,STACK_FRAME_OVERHEAD
387#ifdef CONFIG_PPC_CHRP
388 mfspr r4,SPRN_SPRG2
389 cmpwi cr1,r4,0
390 bne cr1,1f
391#endif
392 EXC_XFER_STD(0x200, machine_check_exception) 329 EXC_XFER_STD(0x200, machine_check_exception)
393#ifdef CONFIG_PPC_CHRP
3941: b machine_check_in_rtas
395#endif
396 330
397/* Data access exception. */ 331/* Data access exception. */
398 . = 0x300 332 . = 0x300
399#ifdef CONFIG_PPC64BRIDGE
400 b DataAccess
401DataAccessCont:
402#else
403DataAccess: 333DataAccess:
404 EXCEPTION_PROLOG 334 EXCEPTION_PROLOG
405#endif /* CONFIG_PPC64BRIDGE */
406 mfspr r10,SPRN_DSISR 335 mfspr r10,SPRN_DSISR
407 andis. r0,r10,0xa470 /* weird error? */ 336 andis. r0,r10,0xa470 /* weird error? */
408 bne 1f /* if not, try to put a PTE */ 337 bne 1f /* if not, try to put a PTE */
@@ -414,21 +343,10 @@ DataAccess:
414 mfspr r4,SPRN_DAR 343 mfspr r4,SPRN_DAR
415 EXC_XFER_EE_LITE(0x300, handle_page_fault) 344 EXC_XFER_EE_LITE(0x300, handle_page_fault)
416 345
417#ifdef CONFIG_PPC64BRIDGE
418/* SLB fault on data access. */
419 . = 0x380
420 b DataSegment
421#endif /* CONFIG_PPC64BRIDGE */
422
423/* Instruction access exception. */ 346/* Instruction access exception. */
424 . = 0x400 347 . = 0x400
425#ifdef CONFIG_PPC64BRIDGE
426 b InstructionAccess
427InstructionAccessCont:
428#else
429InstructionAccess: 348InstructionAccess:
430 EXCEPTION_PROLOG 349 EXCEPTION_PROLOG
431#endif /* CONFIG_PPC64BRIDGE */
432 andis. r0,r9,0x4000 /* no pte found? */ 350 andis. r0,r9,0x4000 /* no pte found? */
433 beq 1f /* if so, try to put a PTE */ 351 beq 1f /* if so, try to put a PTE */
434 li r3,0 /* into the hash table */ 352 li r3,0 /* into the hash table */
@@ -438,12 +356,6 @@ InstructionAccess:
438 mr r5,r9 356 mr r5,r9
439 EXC_XFER_EE_LITE(0x400, handle_page_fault) 357 EXC_XFER_EE_LITE(0x400, handle_page_fault)
440 358
441#ifdef CONFIG_PPC64BRIDGE
442/* SLB fault on instruction access. */
443 . = 0x480
444 b InstructionSegment
445#endif /* CONFIG_PPC64BRIDGE */
446
447/* External interrupt */ 359/* External interrupt */
448 EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE) 360 EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
449 361
@@ -708,15 +620,9 @@ DataStoreTLBMiss:
708 EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE) 620 EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE)
709 EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE) 621 EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE)
710 EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE) 622 EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
711#ifdef CONFIG_POWER4
712 EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
713 EXCEPTION(0x1700, Trap_17, altivec_assist_exception, EXC_XFER_EE)
714 EXCEPTION(0x1800, Trap_18, TAUException, EXC_XFER_STD)
715#else /* !CONFIG_POWER4 */
716 EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE) 623 EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE)
717 EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD) 624 EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD)
718 EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE) 625 EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
719#endif /* CONFIG_POWER4 */
720 EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE) 626 EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
721 EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE) 627 EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
722 EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE) 628 EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
@@ -754,28 +660,6 @@ AltiVecUnavailable:
754 addi r3,r1,STACK_FRAME_OVERHEAD 660 addi r3,r1,STACK_FRAME_OVERHEAD
755 EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception) 661 EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception)
756 662
757#ifdef CONFIG_PPC64BRIDGE
758DataAccess:
759 EXCEPTION_PROLOG
760 b DataAccessCont
761
762InstructionAccess:
763 EXCEPTION_PROLOG
764 b InstructionAccessCont
765
766DataSegment:
767 EXCEPTION_PROLOG
768 addi r3,r1,STACK_FRAME_OVERHEAD
769 mfspr r4,SPRN_DAR
770 stw r4,_DAR(r11)
771 EXC_XFER_STD(0x380, unknown_exception)
772
773InstructionSegment:
774 EXCEPTION_PROLOG
775 addi r3,r1,STACK_FRAME_OVERHEAD
776 EXC_XFER_STD(0x480, unknown_exception)
777#endif /* CONFIG_PPC64BRIDGE */
778
779#ifdef CONFIG_ALTIVEC 663#ifdef CONFIG_ALTIVEC
780/* Note that the AltiVec support is closely modeled after the FP 664/* Note that the AltiVec support is closely modeled after the FP
781 * support. Changes to one are likely to be applicable to the 665 * support. Changes to one are likely to be applicable to the
@@ -1048,13 +932,6 @@ __secondary_start_pmac_0:
1048 932
1049 .globl __secondary_start 933 .globl __secondary_start
1050__secondary_start: 934__secondary_start:
1051#ifdef CONFIG_PPC64BRIDGE
1052 mfmsr r0
1053 clrldi r0,r0,1 /* make sure it's in 32-bit mode */
1054 SYNC
1055 MTMSRD(r0)
1056 isync
1057#endif
1058 /* Copy some CPU settings from CPU 0 */ 935 /* Copy some CPU settings from CPU 0 */
1059 bl __restore_cpu_setup 936 bl __restore_cpu_setup
1060 937
@@ -1065,10 +942,6 @@ __secondary_start:
1065 lis r3,-KERNELBASE@h 942 lis r3,-KERNELBASE@h
1066 bl init_idle_6xx 943 bl init_idle_6xx
1067#endif /* CONFIG_6xx */ 944#endif /* CONFIG_6xx */
1068#ifdef CONFIG_POWER4
1069 lis r3,-KERNELBASE@h
1070 bl init_idle_power4
1071#endif /* CONFIG_POWER4 */
1072 945
1073 /* get current_thread_info and current */ 946 /* get current_thread_info and current */
1074 lis r1,secondary_ti@ha 947 lis r1,secondary_ti@ha
@@ -1109,12 +982,12 @@ __secondary_start:
1109 * Those generic dummy functions are kept for CPUs not 982 * Those generic dummy functions are kept for CPUs not
1110 * included in CONFIG_6xx 983 * included in CONFIG_6xx
1111 */ 984 */
1112#if !defined(CONFIG_6xx) && !defined(CONFIG_POWER4) 985#if !defined(CONFIG_6xx)
1113_GLOBAL(__save_cpu_setup) 986_GLOBAL(__save_cpu_setup)
1114 blr 987 blr
1115_GLOBAL(__restore_cpu_setup) 988_GLOBAL(__restore_cpu_setup)
1116 blr 989 blr
1117#endif /* !defined(CONFIG_6xx) && !defined(CONFIG_POWER4) */ 990#endif /* !defined(CONFIG_6xx) */
1118 991
1119 992
1120/* 993/*
@@ -1132,11 +1005,6 @@ load_up_mmu:
1132 tophys(r6,r6) 1005 tophys(r6,r6)
1133 lwz r6,_SDR1@l(r6) 1006 lwz r6,_SDR1@l(r6)
1134 mtspr SPRN_SDR1,r6 1007 mtspr SPRN_SDR1,r6
1135#ifdef CONFIG_PPC64BRIDGE
1136 /* clear the ASR so we only use the pseudo-segment registers. */
1137 li r6,0
1138 mtasr r6
1139#endif /* CONFIG_PPC64BRIDGE */
1140 li r0,16 /* load up segment register values */ 1008 li r0,16 /* load up segment register values */
1141 mtctr r0 /* for context 0 */ 1009 mtctr r0 /* for context 0 */
1142 lis r3,0x2000 /* Ku = 1, VSID = 0 */ 1010 lis r3,0x2000 /* Ku = 1, VSID = 0 */
@@ -1145,7 +1013,7 @@ load_up_mmu:
1145 addi r3,r3,0x111 /* increment VSID */ 1013 addi r3,r3,0x111 /* increment VSID */
1146 addis r4,r4,0x1000 /* address of next segment */ 1014 addis r4,r4,0x1000 /* address of next segment */
1147 bdnz 3b 1015 bdnz 3b
1148#ifndef CONFIG_POWER4 1016
1149/* Load the BAT registers with the values set up by MMU_init. 1017/* Load the BAT registers with the values set up by MMU_init.
1150 MMU_init takes care of whether we're on a 601 or not. */ 1018 MMU_init takes care of whether we're on a 601 or not. */
1151 mfpvr r3 1019 mfpvr r3
@@ -1158,7 +1026,7 @@ load_up_mmu:
1158 LOAD_BAT(1,r3,r4,r5) 1026 LOAD_BAT(1,r3,r4,r5)
1159 LOAD_BAT(2,r3,r4,r5) 1027 LOAD_BAT(2,r3,r4,r5)
1160 LOAD_BAT(3,r3,r4,r5) 1028 LOAD_BAT(3,r3,r4,r5)
1161#endif /* CONFIG_POWER4 */ 1029
1162 blr 1030 blr
1163 1031
1164/* 1032/*
@@ -1269,9 +1137,6 @@ _GLOBAL(set_context)
1269 li r4,0 1137 li r4,0
1270 isync 1138 isync
12713: 11393:
1272#ifdef CONFIG_PPC64BRIDGE
1273 slbie r4
1274#endif /* CONFIG_PPC64BRIDGE */
1275 mtsrin r3,r4 1140 mtsrin r3,r4
1276 addi r3,r3,0x111 /* next VSID */ 1141 addi r3,r3,0x111 /* next VSID */
1277 rlwinm r3,r3,0,8,3 /* clear out any overflow from VSID field */ 1142 rlwinm r3,r3,0,8,3 /* clear out any overflow from VSID field */
@@ -1358,7 +1223,6 @@ mmu_off:
1358 sync 1223 sync
1359 RFI 1224 RFI
1360 1225
1361#ifndef CONFIG_POWER4
1362/* 1226/*
1363 * Use the first pair of BAT registers to map the 1st 16MB 1227 * Use the first pair of BAT registers to map the 1st 16MB
1364 * of RAM to KERNELBASE. From this point on we can't safely 1228 * of RAM to KERNELBASE. From this point on we can't safely
@@ -1366,7 +1230,6 @@ mmu_off:
1366 */ 1230 */
1367initial_bats: 1231initial_bats:
1368 lis r11,KERNELBASE@h 1232 lis r11,KERNELBASE@h
1369#ifndef CONFIG_PPC64BRIDGE
1370 mfspr r9,SPRN_PVR 1233 mfspr r9,SPRN_PVR
1371 rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */ 1234 rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */
1372 cmpwi 0,r9,1 1235 cmpwi 0,r9,1
@@ -1381,7 +1244,6 @@ initial_bats:
1381 mtspr SPRN_IBAT1L,r10 1244 mtspr SPRN_IBAT1L,r10
1382 isync 1245 isync
1383 blr 1246 blr
1384#endif /* CONFIG_PPC64BRIDGE */
1385 1247
13864: tophys(r8,r11) 12484: tophys(r8,r11)
1387#ifdef CONFIG_SMP 1249#ifdef CONFIG_SMP
@@ -1395,11 +1257,6 @@ initial_bats:
1395 ori r11,r11,BL_256M<<2|0x2 /* set up BAT registers for 604 */ 1257 ori r11,r11,BL_256M<<2|0x2 /* set up BAT registers for 604 */
1396#endif /* CONFIG_APUS */ 1258#endif /* CONFIG_APUS */
1397 1259
1398#ifdef CONFIG_PPC64BRIDGE
1399 /* clear out the high 32 bits in the BAT */
1400 clrldi r11,r11,32
1401 clrldi r8,r8,32
1402#endif /* CONFIG_PPC64BRIDGE */
1403 mtspr SPRN_DBAT0L,r8 /* N.B. 6xx (not 601) have valid */ 1260 mtspr SPRN_DBAT0L,r8 /* N.B. 6xx (not 601) have valid */
1404 mtspr SPRN_DBAT0U,r11 /* bit in upper BAT register */ 1261 mtspr SPRN_DBAT0U,r11 /* bit in upper BAT register */
1405 mtspr SPRN_IBAT0L,r8 1262 mtspr SPRN_IBAT0L,r8
@@ -1432,38 +1289,6 @@ setup_disp_bat:
1432 1289
1433#endif /* !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT) */ 1290#endif /* !defined(CONFIG_APUS) && defined(CONFIG_BOOTX_TEXT) */
1434 1291
1435#else /* CONFIG_POWER4 */
1436/*
1437 * Load up the SDR1 and segment register values now
1438 * since we don't have the BATs.
1439 * Also make sure we are running in 32-bit mode.
1440 */
1441
1442initial_mm_power4:
1443 addis r14,r3,_SDR1@ha /* get the value from _SDR1 */
1444 lwz r14,_SDR1@l(r14) /* assume hash table below 4GB */
1445 mtspr SPRN_SDR1,r14
1446 slbia
1447 lis r4,0x2000 /* set pseudo-segment reg 12 */
1448 ori r5,r4,0x0ccc
1449 mtsr 12,r5
1450#if 0
1451 ori r5,r4,0x0888 /* set pseudo-segment reg 8 */
1452 mtsr 8,r5 /* (for access to serial port) */
1453#endif
1454#ifdef CONFIG_BOOTX_TEXT
1455 ori r5,r4,0x0999 /* set pseudo-segment reg 9 */
1456 mtsr 9,r5 /* (for access to screen) */
1457#endif
1458 mfmsr r0
1459 clrldi r0,r0,1
1460 sync
1461 mtmsr r0
1462 isync
1463 blr
1464
1465#endif /* CONFIG_POWER4 */
1466
1467#ifdef CONFIG_8260 1292#ifdef CONFIG_8260
1468/* Jump into the system reset for the rom. 1293/* Jump into the system reset for the rom.
1469 * We first disable the MMU, and then jump to the ROM reset address. 1294 * We first disable the MMU, and then jump to the ROM reset address.
diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
index 677c571aa276..0d8b88219d38 100644
--- a/arch/ppc/kernel/head_44x.S
+++ b/arch/ppc/kernel/head_44x.S
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/head_44x.S
3 *
4 * Kernel execution entry point code. 2 * Kernel execution entry point code.
5 * 3 *
6 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org> 4 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index c1e89ad0684d..ec53c7d65f2b 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/except_8xx.S
3 *
4 * PowerPC version 2 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP 4 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
index 8d60fa99fc4b..dd86bbed7627 100644
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ b/arch/ppc/kernel/head_fsl_booke.S
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/head_fsl_booke.S
3 *
4 * Kernel execution entry point code. 2 * Kernel execution entry point code.
5 * 3 *
6 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org> 4 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
@@ -316,6 +314,7 @@ skpinv: addi r6,r6,1 /* Increment */
316 */ 314 */
317 lis r2,DBCR0_IDM@h 315 lis r2,DBCR0_IDM@h
318 mtspr SPRN_DBCR0,r2 316 mtspr SPRN_DBCR0,r2
317 isync
319 /* clear any residual debug events */ 318 /* clear any residual debug events */
320 li r2,-1 319 li r2,-1
321 mtspr SPRN_DBSR,r2 320 mtspr SPRN_DBSR,r2
@@ -1002,12 +1001,15 @@ _GLOBAL(giveup_fpu)
1002_GLOBAL(abort) 1001_GLOBAL(abort)
1003 li r13,0 1002 li r13,0
1004 mtspr SPRN_DBCR0,r13 /* disable all debug events */ 1003 mtspr SPRN_DBCR0,r13 /* disable all debug events */
1004 isync
1005 mfmsr r13 1005 mfmsr r13
1006 ori r13,r13,MSR_DE@l /* Enable Debug Events */ 1006 ori r13,r13,MSR_DE@l /* Enable Debug Events */
1007 mtmsr r13 1007 mtmsr r13
1008 isync
1008 mfspr r13,SPRN_DBCR0 1009 mfspr r13,SPRN_DBCR0
1009 lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h 1010 lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h
1010 mtspr SPRN_DBCR0,r13 1011 mtspr SPRN_DBCR0,r13
1012 isync
1011 1013
1012_GLOBAL(set_context) 1014_GLOBAL(set_context)
1013 1015
diff --git a/arch/ppc/kernel/idle.c b/arch/ppc/kernel/idle.c
deleted file mode 100644
index 1be3ca5bae40..000000000000
--- a/arch/ppc/kernel/idle.c
+++ /dev/null
@@ -1,112 +0,0 @@
1/*
2 * Idle daemon for PowerPC. Idle daemon will handle any action
3 * that needs to be taken when the system becomes idle.
4 *
5 * Written by Cort Dougan (cort@cs.nmt.edu). Subsequently hacked
6 * on by Tom Rini, Armin Kuster, Paul Mackerras and others.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13#include <linux/config.h>
14#include <linux/errno.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/smp.h>
19#include <linux/smp_lock.h>
20#include <linux/stddef.h>
21#include <linux/unistd.h>
22#include <linux/ptrace.h>
23#include <linux/slab.h>
24#include <linux/sysctl.h>
25#include <linux/cpu.h>
26
27#include <asm/pgtable.h>
28#include <asm/uaccess.h>
29#include <asm/system.h>
30#include <asm/io.h>
31#include <asm/mmu.h>
32#include <asm/cache.h>
33#include <asm/cputable.h>
34#include <asm/machdep.h>
35#include <asm/smp.h>
36
37void default_idle(void)
38{
39 void (*powersave)(void);
40
41 powersave = ppc_md.power_save;
42
43 if (!need_resched()) {
44 if (powersave != NULL)
45 powersave();
46#ifdef CONFIG_SMP
47 else {
48 set_thread_flag(TIF_POLLING_NRFLAG);
49 while (!need_resched() &&
50 !cpu_is_offline(smp_processor_id()))
51 barrier();
52 clear_thread_flag(TIF_POLLING_NRFLAG);
53 }
54#endif
55 }
56}
57
58/*
59 * The body of the idle task.
60 */
61void cpu_idle(void)
62{
63 int cpu = smp_processor_id();
64
65 for (;;) {
66 while (!need_resched()) {
67 if (ppc_md.idle != NULL)
68 ppc_md.idle();
69 else
70 default_idle();
71 }
72
73 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
74 cpu_die();
75 preempt_enable_no_resched();
76 schedule();
77 preempt_disable();
78 }
79}
80
81#if defined(CONFIG_SYSCTL) && defined(CONFIG_6xx)
82/*
83 * Register the sysctl to set/clear powersave_nap.
84 */
85extern int powersave_nap;
86
87static ctl_table powersave_nap_ctl_table[]={
88 {
89 .ctl_name = KERN_PPC_POWERSAVE_NAP,
90 .procname = "powersave-nap",
91 .data = &powersave_nap,
92 .maxlen = sizeof(int),
93 .mode = 0644,
94 .proc_handler = &proc_dointvec,
95 },
96 { 0, },
97};
98static ctl_table powersave_nap_sysctl_root[] = {
99 { 1, "kernel", NULL, 0, 0755, powersave_nap_ctl_table, },
100 { 0,},
101};
102
103static int __init
104register_powersave_nap_sysctl(void)
105{
106 register_sysctl_table(powersave_nap_sysctl_root, 0);
107
108 return 0;
109}
110
111__initcall(register_powersave_nap_sysctl);
112#endif
diff --git a/arch/ppc/kernel/idle_6xx.S b/arch/ppc/kernel/idle_6xx.S
deleted file mode 100644
index 1a2194cf6828..000000000000
--- a/arch/ppc/kernel/idle_6xx.S
+++ /dev/null
@@ -1,233 +0,0 @@
1/*
2 * This file contains the power_save function for 6xx & 7xxx CPUs
3 * rewritten in assembler
4 *
5 * Warning ! This code assumes that if your machine has a 750fx
6 * it will have PLL 1 set to low speed mode (used during NAP/DOZE).
7 * if this is not the case some additional changes will have to
8 * be done to check a runtime var (a bit like powersave-nap)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#include <linux/config.h>
17#include <linux/threads.h>
18#include <asm/processor.h>
19#include <asm/page.h>
20#include <asm/cputable.h>
21#include <asm/thread_info.h>
22#include <asm/ppc_asm.h>
23#include <asm/asm-offsets.h>
24
25#undef DEBUG
26
27 .text
28
29/*
30 * Init idle, called at early CPU setup time from head.S for each CPU
31 * Make sure no rest of NAP mode remains in HID0, save default
32 * values for some CPU specific registers. Called with r24
33 * containing CPU number and r3 reloc offset
34 */
35_GLOBAL(init_idle_6xx)
36BEGIN_FTR_SECTION
37 mfspr r4,SPRN_HID0
38 rlwinm r4,r4,0,10,8 /* Clear NAP */
39 mtspr SPRN_HID0, r4
40 b 1f
41END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
42 blr
431:
44 slwi r5,r24,2
45 add r5,r5,r3
46BEGIN_FTR_SECTION
47 mfspr r4,SPRN_MSSCR0
48 addis r6,r5, nap_save_msscr0@ha
49 stw r4,nap_save_msscr0@l(r6)
50END_FTR_SECTION_IFSET(CPU_FTR_NAP_DISABLE_L2_PR)
51BEGIN_FTR_SECTION
52 mfspr r4,SPRN_HID1
53 addis r6,r5,nap_save_hid1@ha
54 stw r4,nap_save_hid1@l(r6)
55END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)
56 blr
57
58/*
59 * Here is the power_save_6xx function. This could eventually be
60 * split into several functions & changing the function pointer
61 * depending on the various features.
62 */
63_GLOBAL(ppc6xx_idle)
64 /* Check if we can nap or doze, put HID0 mask in r3
65 */
66 lis r3, 0
67BEGIN_FTR_SECTION
68 lis r3,HID0_DOZE@h
69END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
70BEGIN_FTR_SECTION
71 /* We must dynamically check for the NAP feature as it
72 * can be cleared by CPU init after the fixups are done
73 */
74 lis r4,cur_cpu_spec@ha
75 lwz r4,cur_cpu_spec@l(r4)
76 lwz r4,CPU_SPEC_FEATURES(r4)
77 andi. r0,r4,CPU_FTR_CAN_NAP
78 beq 1f
79 /* Now check if user or arch enabled NAP mode */
80 lis r4,powersave_nap@ha
81 lwz r4,powersave_nap@l(r4)
82 cmpwi 0,r4,0
83 beq 1f
84 lis r3,HID0_NAP@h
851:
86END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
87 cmpwi 0,r3,0
88 beqlr
89
90 /* Clear MSR:EE */
91 mfmsr r7
92 rlwinm r0,r7,0,17,15
93 mtmsr r0
94
95 /* Check current_thread_info()->flags */
96 rlwinm r4,r1,0,0,18
97 lwz r4,TI_FLAGS(r4)
98 andi. r0,r4,_TIF_NEED_RESCHED
99 beq 1f
100 mtmsr r7 /* out of line this ? */
101 blr
1021:
103 /* Some pre-nap cleanups needed on some CPUs */
104 andis. r0,r3,HID0_NAP@h
105 beq 2f
106BEGIN_FTR_SECTION
107 /* Disable L2 prefetch on some 745x and try to ensure
108 * L2 prefetch engines are idle. As explained by errata
109 * text, we can't be sure they are, we just hope very hard
110 * that well be enough (sic !). At least I noticed Apple
111 * doesn't even bother doing the dcbf's here...
112 */
113 mfspr r4,SPRN_MSSCR0
114 rlwinm r4,r4,0,0,29
115 sync
116 mtspr SPRN_MSSCR0,r4
117 sync
118 isync
119 lis r4,KERNELBASE@h
120 dcbf 0,r4
121 dcbf 0,r4
122 dcbf 0,r4
123 dcbf 0,r4
124END_FTR_SECTION_IFSET(CPU_FTR_NAP_DISABLE_L2_PR)
125#ifdef DEBUG
126 lis r6,nap_enter_count@ha
127 lwz r4,nap_enter_count@l(r6)
128 addi r4,r4,1
129 stw r4,nap_enter_count@l(r6)
130#endif
1312:
132BEGIN_FTR_SECTION
133 /* Go to low speed mode on some 750FX */
134 lis r4,powersave_lowspeed@ha
135 lwz r4,powersave_lowspeed@l(r4)
136 cmpwi 0,r4,0
137 beq 1f
138 mfspr r4,SPRN_HID1
139 oris r4,r4,0x0001
140 mtspr SPRN_HID1,r4
1411:
142END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)
143
144 /* Go to NAP or DOZE now */
145 mfspr r4,SPRN_HID0
146 lis r5,(HID0_NAP|HID0_SLEEP)@h
147BEGIN_FTR_SECTION
148 oris r5,r5,HID0_DOZE@h
149END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
150 andc r4,r4,r5
151 or r4,r4,r3
152BEGIN_FTR_SECTION
153 oris r4,r4,HID0_DPM@h /* that should be done once for all */
154END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM)
155 mtspr SPRN_HID0,r4
156BEGIN_FTR_SECTION
157 DSSALL
158 sync
159END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
160 ori r7,r7,MSR_EE /* Could be ommited (already set) */
161 oris r7,r7,MSR_POW@h
162 sync
163 isync
164 mtmsr r7
165 isync
166 sync
167 blr
168
169/*
170 * Return from NAP/DOZE mode, restore some CPU specific registers,
171 * we are called with DR/IR still off and r2 containing physical
172 * address of current.
173 */
174_GLOBAL(power_save_6xx_restore)
175 mfspr r11,SPRN_HID0
176 rlwinm. r11,r11,0,10,8 /* Clear NAP & copy NAP bit !state to cr1 EQ */
177 cror 4*cr1+eq,4*cr0+eq,4*cr0+eq
178BEGIN_FTR_SECTION
179 rlwinm r11,r11,0,9,7 /* Clear DOZE */
180END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
181 mtspr SPRN_HID0, r11
182
183#ifdef DEBUG
184 beq cr1,1f
185 lis r11,(nap_return_count-KERNELBASE)@ha
186 lwz r9,nap_return_count@l(r11)
187 addi r9,r9,1
188 stw r9,nap_return_count@l(r11)
1891:
190#endif
191
192 rlwinm r9,r1,0,0,18
193 tophys(r9,r9)
194 lwz r11,TI_CPU(r9)
195 slwi r11,r11,2
196 /* Todo make sure all these are in the same page
197 * and load r22 (@ha part + CPU offset) only once
198 */
199BEGIN_FTR_SECTION
200 beq cr1,1f
201 addis r9,r11,(nap_save_msscr0-KERNELBASE)@ha
202 lwz r9,nap_save_msscr0@l(r9)
203 mtspr SPRN_MSSCR0, r9
204 sync
205 isync
2061:
207END_FTR_SECTION_IFSET(CPU_FTR_NAP_DISABLE_L2_PR)
208BEGIN_FTR_SECTION
209 addis r9,r11,(nap_save_hid1-KERNELBASE)@ha
210 lwz r9,nap_save_hid1@l(r9)
211 mtspr SPRN_HID1, r9
212END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)
213 b transfer_to_handler_cont
214
215 .data
216
217_GLOBAL(nap_save_msscr0)
218 .space 4*NR_CPUS
219
220_GLOBAL(nap_save_hid1)
221 .space 4*NR_CPUS
222
223_GLOBAL(powersave_nap)
224 .long 0
225_GLOBAL(powersave_lowspeed)
226 .long 0
227
228#ifdef DEBUG
229_GLOBAL(nap_enter_count)
230 .space 4
231_GLOBAL(nap_return_count)
232 .space 4
233#endif
diff --git a/arch/ppc/kernel/idle_power4.S b/arch/ppc/kernel/idle_power4.S
deleted file mode 100644
index cc0d535365cd..000000000000
--- a/arch/ppc/kernel/idle_power4.S
+++ /dev/null
@@ -1,91 +0,0 @@
1/*
2 * This file contains the power_save function for 6xx & 7xxx CPUs
3 * rewritten in assembler
4 *
5 * Warning ! This code assumes that if your machine has a 750fx
6 * it will have PLL 1 set to low speed mode (used during NAP/DOZE).
7 * if this is not the case some additional changes will have to
8 * be done to check a runtime var (a bit like powersave-nap)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#include <linux/config.h>
17#include <linux/threads.h>
18#include <asm/processor.h>
19#include <asm/page.h>
20#include <asm/cputable.h>
21#include <asm/thread_info.h>
22#include <asm/ppc_asm.h>
23#include <asm/asm-offsets.h>
24
25#undef DEBUG
26
27 .text
28
29/*
30 * Init idle, called at early CPU setup time from head.S for each CPU
31 * So nothing for now. Called with r24 containing CPU number and r3
32 * reloc offset
33 */
34 .globl init_idle_power4
35init_idle_power4:
36 blr
37
38/*
39 * Here is the power_save_6xx function. This could eventually be
40 * split into several functions & changing the function pointer
41 * depending on the various features.
42 */
43 .globl power4_idle
44power4_idle:
45BEGIN_FTR_SECTION
46 blr
47END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP)
48 /* We must dynamically check for the NAP feature as it
49 * can be cleared by CPU init after the fixups are done
50 */
51 lis r4,cur_cpu_spec@ha
52 lwz r4,cur_cpu_spec@l(r4)
53 lwz r4,CPU_SPEC_FEATURES(r4)
54 andi. r0,r4,CPU_FTR_CAN_NAP
55 beqlr
56 /* Now check if user or arch enabled NAP mode */
57 lis r4,powersave_nap@ha
58 lwz r4,powersave_nap@l(r4)
59 cmpwi 0,r4,0
60 beqlr
61
62 /* Clear MSR:EE */
63 mfmsr r7
64 rlwinm r0,r7,0,17,15
65 mtmsr r0
66
67 /* Check current_thread_info()->flags */
68 rlwinm r4,r1,0,0,18
69 lwz r4,TI_FLAGS(r4)
70 andi. r0,r4,_TIF_NEED_RESCHED
71 beq 1f
72 mtmsr r7 /* out of line this ? */
73 blr
741:
75 /* Go to NAP now */
76BEGIN_FTR_SECTION
77 DSSALL
78 sync
79END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
80 ori r7,r7,MSR_EE /* Could be ommited (already set) */
81 oris r7,r7,MSR_POW@h
82 sync
83 isync
84 mtmsr r7
85 isync
86 sync
87 blr
88
89 .globl powersave_nap
90powersave_nap:
91 .long 0
diff --git a/arch/ppc/kernel/l2cr.S b/arch/ppc/kernel/l2cr.S
deleted file mode 100644
index d7f4e982b539..000000000000
--- a/arch/ppc/kernel/l2cr.S
+++ /dev/null
@@ -1,471 +0,0 @@
1/*
2 L2CR functions
3 Copyright © 1997-1998 by PowerLogix R & D, Inc.
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18*/
19/*
20 Thur, Dec. 12, 1998.
21 - First public release, contributed by PowerLogix.
22 ***********
23 Sat, Aug. 7, 1999.
24 - Terry: Made sure code disabled interrupts before running. (Previously
25 it was assumed interrupts were already disabled).
26 - Terry: Updated for tentative G4 support. 4MB of memory is now flushed
27 instead of 2MB. (Prob. only 3 is necessary).
28 - Terry: Updated for workaround to HID0[DPM] processor bug
29 during global invalidates.
30 ***********
31 Thu, July 13, 2000.
32 - Terry: Added isync to correct for an errata.
33
34 22 August 2001.
35 - DanM: Finally added the 7450 patch I've had for the past
36 several months. The L2CR is similar, but I'm going
37 to assume the user of this functions knows what they
38 are doing.
39
40 Author: Terry Greeniaus (tgree@phys.ualberta.ca)
41 Please e-mail updates to this file to me, thanks!
42*/
43#include <linux/config.h>
44#include <asm/processor.h>
45#include <asm/cputable.h>
46#include <asm/ppc_asm.h>
47#include <asm/cache.h>
48#include <asm/page.h>
49
50/* Usage:
51
52 When setting the L2CR register, you must do a few special
53 things. If you are enabling the cache, you must perform a
54 global invalidate. If you are disabling the cache, you must
55 flush the cache contents first. This routine takes care of
56 doing these things. When first enabling the cache, make sure
57 you pass in the L2CR you want, as well as passing in the
58 global invalidate bit set. A global invalidate will only be
59 performed if the L2I bit is set in applyThis. When enabling
60 the cache, you should also set the L2E bit in applyThis. If
61 you want to modify the L2CR contents after the cache has been
62 enabled, the recommended procedure is to first call
63 __setL2CR(0) to disable the cache and then call it again with
64 the new values for L2CR. Examples:
65
66 _setL2CR(0) - disables the cache
67 _setL2CR(0xB3A04000) - enables my G3 upgrade card:
68 - L2E set to turn on the cache
69 - L2SIZ set to 1MB
70 - L2CLK set to 1:1
71 - L2RAM set to pipelined synchronous late-write
72 - L2I set to perform a global invalidation
73 - L2OH set to 0.5 nS
74 - L2DF set because this upgrade card
75 requires it
76
77 A similar call should work for your card. You need to know
78 the correct setting for your card and then place them in the
79 fields I have outlined above. Other fields support optional
80 features, such as L2DO which caches only data, or L2TS which
81 causes cache pushes from the L1 cache to go to the L2 cache
82 instead of to main memory.
83
84IMPORTANT:
85 Starting with the 7450, the bits in this register have moved
86 or behave differently. The Enable, Parity Enable, Size,
87 and L2 Invalidate are the only bits that have not moved.
88 The size is read-only for these processors with internal L2
89 cache, and the invalidate is a control as well as status.
90 -- Dan
91
92*/
93/*
94 * Summary: this procedure ignores the L2I bit in the value passed in,
95 * flushes the cache if it was already enabled, always invalidates the
96 * cache, then enables the cache if the L2E bit is set in the value
97 * passed in.
98 * -- paulus.
99 */
100_GLOBAL(_set_L2CR)
101 /* Make sure this is a 750 or 7400 chip */
102BEGIN_FTR_SECTION
103 li r3,-1
104 blr
105END_FTR_SECTION_IFCLR(CPU_FTR_L2CR)
106
107 mflr r9
108
109 /* Stop DST streams */
110BEGIN_FTR_SECTION
111 DSSALL
112 sync
113END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
114
115 /* Turn off interrupts and data relocation. */
116 mfmsr r7 /* Save MSR in r7 */
117 rlwinm r4,r7,0,17,15
118 rlwinm r4,r4,0,28,26 /* Turn off DR bit */
119 sync
120 mtmsr r4
121 isync
122
123 /* Before we perform the global invalidation, we must disable dynamic
124 * power management via HID0[DPM] to work around a processor bug where
125 * DPM can possibly interfere with the state machine in the processor
126 * that invalidates the L2 cache tags.
127 */
128 mfspr r8,SPRN_HID0 /* Save HID0 in r8 */
129 rlwinm r4,r8,0,12,10 /* Turn off HID0[DPM] */
130 sync
131 mtspr SPRN_HID0,r4 /* Disable DPM */
132 sync
133
134 /* Get the current enable bit of the L2CR into r4 */
135 mfspr r4,SPRN_L2CR
136
137 /* Tweak some bits */
138 rlwinm r5,r3,0,0,0 /* r5 contains the new enable bit */
139 rlwinm r3,r3,0,11,9 /* Turn off the invalidate bit */
140 rlwinm r3,r3,0,1,31 /* Turn off the enable bit */
141
142 /* Check to see if we need to flush */
143 rlwinm. r4,r4,0,0,0
144 beq 2f
145
146 /* Flush the cache. First, read the first 4MB of memory (physical) to
147 * put new data in the cache. (Actually we only need
148 * the size of the L2 cache plus the size of the L1 cache, but 4MB will
149 * cover everything just to be safe).
150 */
151
152 /**** Might be a good idea to set L2DO here - to prevent instructions
153 from getting into the cache. But since we invalidate
154 the next time we enable the cache it doesn't really matter.
155 Don't do this unless you accomodate all processor variations.
156 The bit moved on the 7450.....
157 ****/
158
159BEGIN_FTR_SECTION
160 /* Disable L2 prefetch on some 745x and try to ensure
161 * L2 prefetch engines are idle. As explained by errata
162 * text, we can't be sure they are, we just hope very hard
163 * that well be enough (sic !). At least I noticed Apple
164 * doesn't even bother doing the dcbf's here...
165 */
166 mfspr r4,SPRN_MSSCR0
167 rlwinm r4,r4,0,0,29
168 sync
169 mtspr SPRN_MSSCR0,r4
170 sync
171 isync
172 lis r4,KERNELBASE@h
173 dcbf 0,r4
174 dcbf 0,r4
175 dcbf 0,r4
176 dcbf 0,r4
177END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
178
179 /* TODO: use HW flush assist when available */
180
181 lis r4,0x0002
182 mtctr r4
183 li r4,0
1841:
185 lwzx r0,r0,r4
186 addi r4,r4,32 /* Go to start of next cache line */
187 bdnz 1b
188 isync
189
190 /* Now, flush the first 4MB of memory */
191 lis r4,0x0002
192 mtctr r4
193 li r4,0
194 sync
1951:
196 dcbf 0,r4
197 addi r4,r4,32 /* Go to start of next cache line */
198 bdnz 1b
199
2002:
201 /* Set up the L2CR configuration bits (and switch L2 off) */
202 /* CPU errata: Make sure the mtspr below is already in the
203 * L1 icache
204 */
205 b 20f
206 .balign L1_CACHE_BYTES
20722:
208 sync
209 mtspr SPRN_L2CR,r3
210 sync
211 b 23f
21220:
213 b 21f
21421: sync
215 isync
216 b 22b
217
21823:
219 /* Perform a global invalidation */
220 oris r3,r3,0x0020
221 sync
222 mtspr SPRN_L2CR,r3
223 sync
224 isync /* For errata */
225
226BEGIN_FTR_SECTION
227 /* On the 7450, we wait for the L2I bit to clear......
228 */
22910: mfspr r3,SPRN_L2CR
230 andis. r4,r3,0x0020
231 bne 10b
232 b 11f
233END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
234
235 /* Wait for the invalidation to complete */
2363: mfspr r3,SPRN_L2CR
237 rlwinm. r4,r3,0,31,31
238 bne 3b
239
24011: rlwinm r3,r3,0,11,9 /* Turn off the L2I bit */
241 sync
242 mtspr SPRN_L2CR,r3
243 sync
244
245 /* See if we need to enable the cache */
246 cmplwi r5,0
247 beq 4f
248
249 /* Enable the cache */
250 oris r3,r3,0x8000
251 mtspr SPRN_L2CR,r3
252 sync
253
254 /* Enable L2 HW prefetch on 744x/745x */
255BEGIN_FTR_SECTION
256 mfspr r3,SPRN_MSSCR0
257 ori r3,r3,3
258 sync
259 mtspr SPRN_MSSCR0,r3
260 sync
261 isync
262END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
2634:
264
265 /* Restore HID0[DPM] to whatever it was before */
266 sync
267 mtspr 1008,r8
268 sync
269
270 /* Restore MSR (restores EE and DR bits to original state) */
271 SYNC
272 mtmsr r7
273 isync
274
275 mtlr r9
276 blr
277
278_GLOBAL(_get_L2CR)
279 /* Return the L2CR contents */
280 li r3,0
281BEGIN_FTR_SECTION
282 mfspr r3,SPRN_L2CR
283END_FTR_SECTION_IFSET(CPU_FTR_L2CR)
284 blr
285
286
287/*
288 * Here is a similar routine for dealing with the L3 cache
289 * on the 745x family of chips
290 */
291
292_GLOBAL(_set_L3CR)
293 /* Make sure this is a 745x chip */
294BEGIN_FTR_SECTION
295 li r3,-1
296 blr
297END_FTR_SECTION_IFCLR(CPU_FTR_L3CR)
298
299 /* Turn off interrupts and data relocation. */
300 mfmsr r7 /* Save MSR in r7 */
301 rlwinm r4,r7,0,17,15
302 rlwinm r4,r4,0,28,26 /* Turn off DR bit */
303 sync
304 mtmsr r4
305 isync
306
307 /* Stop DST streams */
308 DSSALL
309 sync
310
311 /* Get the current enable bit of the L3CR into r4 */
312 mfspr r4,SPRN_L3CR
313
314 /* Tweak some bits */
315 rlwinm r5,r3,0,0,0 /* r5 contains the new enable bit */
316 rlwinm r3,r3,0,22,20 /* Turn off the invalidate bit */
317 rlwinm r3,r3,0,2,31 /* Turn off the enable & PE bits */
318 rlwinm r3,r3,0,5,3 /* Turn off the clken bit */
319 /* Check to see if we need to flush */
320 rlwinm. r4,r4,0,0,0
321 beq 2f
322
323 /* Flush the cache.
324 */
325
326 /* TODO: use HW flush assist */
327
328 lis r4,0x0008
329 mtctr r4
330 li r4,0
3311:
332 lwzx r0,r0,r4
333 dcbf 0,r4
334 addi r4,r4,32 /* Go to start of next cache line */
335 bdnz 1b
336
3372:
338 /* Set up the L3CR configuration bits (and switch L3 off) */
339 sync
340 mtspr SPRN_L3CR,r3
341 sync
342
343 oris r3,r3,L3CR_L3RES@h /* Set reserved bit 5 */
344 mtspr SPRN_L3CR,r3
345 sync
346 oris r3,r3,L3CR_L3CLKEN@h /* Set clken */
347 mtspr SPRN_L3CR,r3
348 sync
349
350 /* Wait for stabilize */
351 li r0,256
352 mtctr r0
3531: bdnz 1b
354
355 /* Perform a global invalidation */
356 ori r3,r3,0x0400
357 sync
358 mtspr SPRN_L3CR,r3
359 sync
360 isync
361
362 /* We wait for the L3I bit to clear...... */
36310: mfspr r3,SPRN_L3CR
364 andi. r4,r3,0x0400
365 bne 10b
366
367 /* Clear CLKEN */
368 rlwinm r3,r3,0,5,3 /* Turn off the clken bit */
369 mtspr SPRN_L3CR,r3
370 sync
371
372 /* Wait for stabilize */
373 li r0,256
374 mtctr r0
3751: bdnz 1b
376
377 /* See if we need to enable the cache */
378 cmplwi r5,0
379 beq 4f
380
381 /* Enable the cache */
382 oris r3,r3,(L3CR_L3E | L3CR_L3CLKEN)@h
383 mtspr SPRN_L3CR,r3
384 sync
385
386 /* Wait for stabilize */
387 li r0,256
388 mtctr r0
3891: bdnz 1b
390
391 /* Restore MSR (restores EE and DR bits to original state) */
3924: SYNC
393 mtmsr r7
394 isync
395 blr
396
397_GLOBAL(_get_L3CR)
398 /* Return the L3CR contents */
399 li r3,0
400BEGIN_FTR_SECTION
401 mfspr r3,SPRN_L3CR
402END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
403 blr
404
405/* --- End of PowerLogix code ---
406 */
407
408
409/* flush_disable_L1() - Flush and disable L1 cache
410 *
411 * clobbers r0, r3, ctr, cr0
412 * Must be called with interrupts disabled and MMU enabled.
413 */
414_GLOBAL(__flush_disable_L1)
415 /* Stop pending alitvec streams and memory accesses */
416BEGIN_FTR_SECTION
417 DSSALL
418END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
419 sync
420
421 /* Load counter to 0x4000 cache lines (512k) and
422 * load cache with datas
423 */
424 li r3,0x4000 /* 512kB / 32B */
425 mtctr r3
426 lis r3,KERNELBASE@h
4271:
428 lwz r0,0(r3)
429 addi r3,r3,0x0020 /* Go to start of next cache line */
430 bdnz 1b
431 isync
432 sync
433
434 /* Now flush those cache lines */
435 li r3,0x4000 /* 512kB / 32B */
436 mtctr r3
437 lis r3,KERNELBASE@h
4381:
439 dcbf 0,r3
440 addi r3,r3,0x0020 /* Go to start of next cache line */
441 bdnz 1b
442 sync
443
444 /* We can now disable the L1 cache (HID0:DCE, HID0:ICE) */
445 mfspr r3,SPRN_HID0
446 rlwinm r3,r3,0,18,15
447 mtspr SPRN_HID0,r3
448 sync
449 isync
450 blr
451
452/* inval_enable_L1 - Invalidate and enable L1 cache
453 *
454 * Assumes L1 is already disabled and MSR:EE is off
455 *
456 * clobbers r3
457 */
458_GLOBAL(__inval_enable_L1)
459 /* Enable and then Flash inval the instruction & data cache */
460 mfspr r3,SPRN_HID0
461 ori r3,r3, HID0_ICE|HID0_ICFI|HID0_DCE|HID0_DCI
462 sync
463 isync
464 mtspr SPRN_HID0,r3
465 xori r3,r3, HID0_ICFI|HID0_DCI
466 mtspr SPRN_HID0,r3
467 sync
468
469 blr
470
471
diff --git a/arch/ppc/kernel/module.c b/arch/ppc/kernel/module.c
deleted file mode 100644
index 92f4e5f64f02..000000000000
--- a/arch/ppc/kernel/module.c
+++ /dev/null
@@ -1,320 +0,0 @@
1/* Kernel module help for PPC.
2 Copyright (C) 2001 Rusty Russell.
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17*/
18#include <linux/module.h>
19#include <linux/moduleloader.h>
20#include <linux/elf.h>
21#include <linux/vmalloc.h>
22#include <linux/fs.h>
23#include <linux/string.h>
24#include <linux/kernel.h>
25#include <linux/cache.h>
26
27#if 0
28#define DEBUGP printk
29#else
30#define DEBUGP(fmt , ...)
31#endif
32
33LIST_HEAD(module_bug_list);
34
35void *module_alloc(unsigned long size)
36{
37 if (size == 0)
38 return NULL;
39 return vmalloc(size);
40}
41
42/* Free memory returned from module_alloc */
43void module_free(struct module *mod, void *module_region)
44{
45 vfree(module_region);
46 /* FIXME: If module_region == mod->init_region, trim exception
47 table entries. */
48}
49
50/* Count how many different relocations (different symbol, different
51 addend) */
52static unsigned int count_relocs(const Elf32_Rela *rela, unsigned int num)
53{
54 unsigned int i, j, ret = 0;
55
56 /* Sure, this is order(n^2), but it's usually short, and not
57 time critical */
58 for (i = 0; i < num; i++) {
59 for (j = 0; j < i; j++) {
60 /* If this addend appeared before, it's
61 already been counted */
62 if (ELF32_R_SYM(rela[i].r_info)
63 == ELF32_R_SYM(rela[j].r_info)
64 && rela[i].r_addend == rela[j].r_addend)
65 break;
66 }
67 if (j == i) ret++;
68 }
69 return ret;
70}
71
72/* Get the potential trampolines size required of the init and
73 non-init sections */
74static unsigned long get_plt_size(const Elf32_Ehdr *hdr,
75 const Elf32_Shdr *sechdrs,
76 const char *secstrings,
77 int is_init)
78{
79 unsigned long ret = 0;
80 unsigned i;
81
82 /* Everything marked ALLOC (this includes the exported
83 symbols) */
84 for (i = 1; i < hdr->e_shnum; i++) {
85 /* If it's called *.init*, and we're not init, we're
86 not interested */
87 if ((strstr(secstrings + sechdrs[i].sh_name, ".init") != 0)
88 != is_init)
89 continue;
90
91 /* We don't want to look at debug sections. */
92 if (strstr(secstrings + sechdrs[i].sh_name, ".debug") != 0)
93 continue;
94
95 if (sechdrs[i].sh_type == SHT_RELA) {
96 DEBUGP("Found relocations in section %u\n", i);
97 DEBUGP("Ptr: %p. Number: %u\n",
98 (void *)hdr + sechdrs[i].sh_offset,
99 sechdrs[i].sh_size / sizeof(Elf32_Rela));
100 ret += count_relocs((void *)hdr
101 + sechdrs[i].sh_offset,
102 sechdrs[i].sh_size
103 / sizeof(Elf32_Rela))
104 * sizeof(struct ppc_plt_entry);
105 }
106 }
107
108 return ret;
109}
110
111int module_frob_arch_sections(Elf32_Ehdr *hdr,
112 Elf32_Shdr *sechdrs,
113 char *secstrings,
114 struct module *me)
115{
116 unsigned int i;
117
118 /* Find .plt and .init.plt sections */
119 for (i = 0; i < hdr->e_shnum; i++) {
120 if (strcmp(secstrings + sechdrs[i].sh_name, ".init.plt") == 0)
121 me->arch.init_plt_section = i;
122 else if (strcmp(secstrings + sechdrs[i].sh_name, ".plt") == 0)
123 me->arch.core_plt_section = i;
124 }
125 if (!me->arch.core_plt_section || !me->arch.init_plt_section) {
126 printk("Module doesn't contain .plt or .init.plt sections.\n");
127 return -ENOEXEC;
128 }
129
130 /* Override their sizes */
131 sechdrs[me->arch.core_plt_section].sh_size
132 = get_plt_size(hdr, sechdrs, secstrings, 0);
133 sechdrs[me->arch.init_plt_section].sh_size
134 = get_plt_size(hdr, sechdrs, secstrings, 1);
135 return 0;
136}
137
138int apply_relocate(Elf32_Shdr *sechdrs,
139 const char *strtab,
140 unsigned int symindex,
141 unsigned int relsec,
142 struct module *module)
143{
144 printk(KERN_ERR "%s: Non-ADD RELOCATION unsupported\n",
145 module->name);
146 return -ENOEXEC;
147}
148
149static inline int entry_matches(struct ppc_plt_entry *entry, Elf32_Addr val)
150{
151 if (entry->jump[0] == 0x3d600000 + ((val + 0x8000) >> 16)
152 && entry->jump[1] == 0x396b0000 + (val & 0xffff))
153 return 1;
154 return 0;
155}
156
157/* Set up a trampoline in the PLT to bounce us to the distant function */
158static uint32_t do_plt_call(void *location,
159 Elf32_Addr val,
160 Elf32_Shdr *sechdrs,
161 struct module *mod)
162{
163 struct ppc_plt_entry *entry;
164
165 DEBUGP("Doing plt for call to 0x%x at 0x%x\n", val, (unsigned int)location);
166 /* Init, or core PLT? */
167 if (location >= mod->module_core
168 && location < mod->module_core + mod->core_size)
169 entry = (void *)sechdrs[mod->arch.core_plt_section].sh_addr;
170 else
171 entry = (void *)sechdrs[mod->arch.init_plt_section].sh_addr;
172
173 /* Find this entry, or if that fails, the next avail. entry */
174 while (entry->jump[0]) {
175 if (entry_matches(entry, val)) return (uint32_t)entry;
176 entry++;
177 }
178
179 /* Stolen from Paul Mackerras as well... */
180 entry->jump[0] = 0x3d600000+((val+0x8000)>>16); /* lis r11,sym@ha */
181 entry->jump[1] = 0x396b0000 + (val&0xffff); /* addi r11,r11,sym@l*/
182 entry->jump[2] = 0x7d6903a6; /* mtctr r11 */
183 entry->jump[3] = 0x4e800420; /* bctr */
184
185 DEBUGP("Initialized plt for 0x%x at %p\n", val, entry);
186 return (uint32_t)entry;
187}
188
189int apply_relocate_add(Elf32_Shdr *sechdrs,
190 const char *strtab,
191 unsigned int symindex,
192 unsigned int relsec,
193 struct module *module)
194{
195 unsigned int i;
196 Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr;
197 Elf32_Sym *sym;
198 uint32_t *location;
199 uint32_t value;
200
201 DEBUGP("Applying ADD relocate section %u to %u\n", relsec,
202 sechdrs[relsec].sh_info);
203 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rela); i++) {
204 /* This is where to make the change */
205 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
206 + rela[i].r_offset;
207 /* This is the symbol it is referring to. Note that all
208 undefined symbols have been resolved. */
209 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
210 + ELF32_R_SYM(rela[i].r_info);
211 /* `Everything is relative'. */
212 value = sym->st_value + rela[i].r_addend;
213
214 switch (ELF32_R_TYPE(rela[i].r_info)) {
215 case R_PPC_ADDR32:
216 /* Simply set it */
217 *(uint32_t *)location = value;
218 break;
219
220 case R_PPC_ADDR16_LO:
221 /* Low half of the symbol */
222 *(uint16_t *)location = value;
223 break;
224
225 case R_PPC_ADDR16_HA:
226 /* Sign-adjusted lower 16 bits: PPC ELF ABI says:
227 (((x >> 16) + ((x & 0x8000) ? 1 : 0))) & 0xFFFF.
228 This is the same, only sane.
229 */
230 *(uint16_t *)location = (value + 0x8000) >> 16;
231 break;
232
233 case R_PPC_REL24:
234 if ((int)(value - (uint32_t)location) < -0x02000000
235 || (int)(value - (uint32_t)location) >= 0x02000000)
236 value = do_plt_call(location, value,
237 sechdrs, module);
238
239 /* Only replace bits 2 through 26 */
240 DEBUGP("REL24 value = %08X. location = %08X\n",
241 value, (uint32_t)location);
242 DEBUGP("Location before: %08X.\n",
243 *(uint32_t *)location);
244 *(uint32_t *)location
245 = (*(uint32_t *)location & ~0x03fffffc)
246 | ((value - (uint32_t)location)
247 & 0x03fffffc);
248 DEBUGP("Location after: %08X.\n",
249 *(uint32_t *)location);
250 DEBUGP("ie. jump to %08X+%08X = %08X\n",
251 *(uint32_t *)location & 0x03fffffc,
252 (uint32_t)location,
253 (*(uint32_t *)location & 0x03fffffc)
254 + (uint32_t)location);
255 break;
256
257 case R_PPC_REL32:
258 /* 32-bit relative jump. */
259 *(uint32_t *)location = value - (uint32_t)location;
260 break;
261
262 default:
263 printk("%s: unknown ADD relocation: %u\n",
264 module->name,
265 ELF32_R_TYPE(rela[i].r_info));
266 return -ENOEXEC;
267 }
268 }
269 return 0;
270}
271
272int module_finalize(const Elf_Ehdr *hdr,
273 const Elf_Shdr *sechdrs,
274 struct module *me)
275{
276 char *secstrings;
277 unsigned int i;
278
279 me->arch.bug_table = NULL;
280 me->arch.num_bugs = 0;
281
282 /* Find the __bug_table section, if present */
283 secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
284 for (i = 1; i < hdr->e_shnum; i++) {
285 if (strcmp(secstrings+sechdrs[i].sh_name, "__bug_table"))
286 continue;
287 me->arch.bug_table = (void *) sechdrs[i].sh_addr;
288 me->arch.num_bugs = sechdrs[i].sh_size / sizeof(struct bug_entry);
289 break;
290 }
291
292 /*
293 * Strictly speaking this should have a spinlock to protect against
294 * traversals, but since we only traverse on BUG()s, a spinlock
295 * could potentially lead to deadlock and thus be counter-productive.
296 */
297 list_add(&me->arch.bug_list, &module_bug_list);
298
299 return 0;
300}
301
302void module_arch_cleanup(struct module *mod)
303{
304 list_del(&mod->arch.bug_list);
305}
306
307struct bug_entry *module_find_bug(unsigned long bugaddr)
308{
309 struct mod_arch_specific *mod;
310 unsigned int i;
311 struct bug_entry *bug;
312
313 list_for_each_entry(mod, &module_bug_list, bug_list) {
314 bug = mod->bug_table;
315 for (i = 0; i < mod->num_bugs; ++i, ++bug)
316 if (bugaddr == bug->bug_addr)
317 return bug;
318 }
319 return NULL;
320}
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
index 04d04c5bfdd0..809673a36f7a 100644
--- a/arch/ppc/kernel/pci.c
+++ b/arch/ppc/kernel/pci.c
@@ -46,9 +46,6 @@ static void pcibios_fixup_resources(struct pci_dev* dev);
46static void fixup_broken_pcnet32(struct pci_dev* dev); 46static void fixup_broken_pcnet32(struct pci_dev* dev);
47static int reparent_resources(struct resource *parent, struct resource *res); 47static int reparent_resources(struct resource *parent, struct resource *res);
48static void fixup_cpc710_pci64(struct pci_dev* dev); 48static void fixup_cpc710_pci64(struct pci_dev* dev);
49#ifdef CONFIG_PPC_OF
50static u8* pci_to_OF_bus_map;
51#endif
52 49
53/* By default, we don't re-assign bus numbers. 50/* By default, we don't re-assign bus numbers.
54 */ 51 */
@@ -625,406 +622,13 @@ pcibios_alloc_controller(void)
625 return hose; 622 return hose;
626} 623}
627 624
628#ifdef CONFIG_PPC_OF
629/*
630 * Functions below are used on OpenFirmware machines.
631 */
632static void
633make_one_node_map(struct device_node* node, u8 pci_bus)
634{
635 int *bus_range;
636 int len;
637
638 if (pci_bus >= pci_bus_count)
639 return;
640 bus_range = (int *) get_property(node, "bus-range", &len);
641 if (bus_range == NULL || len < 2 * sizeof(int)) {
642 printk(KERN_WARNING "Can't get bus-range for %s, "
643 "assuming it starts at 0\n", node->full_name);
644 pci_to_OF_bus_map[pci_bus] = 0;
645 } else
646 pci_to_OF_bus_map[pci_bus] = bus_range[0];
647
648 for (node=node->child; node != 0;node = node->sibling) {
649 struct pci_dev* dev;
650 unsigned int *class_code, *reg;
651
652 class_code = (unsigned int *) get_property(node, "class-code", NULL);
653 if (!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
654 (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS))
655 continue;
656 reg = (unsigned int *)get_property(node, "reg", NULL);
657 if (!reg)
658 continue;
659 dev = pci_find_slot(pci_bus, ((reg[0] >> 8) & 0xff));
660 if (!dev || !dev->subordinate)
661 continue;
662 make_one_node_map(node, dev->subordinate->number);
663 }
664}
665
666void
667pcibios_make_OF_bus_map(void)
668{
669 int i;
670 struct pci_controller* hose;
671 u8* of_prop_map;
672
673 pci_to_OF_bus_map = (u8*)kmalloc(pci_bus_count, GFP_KERNEL);
674 if (!pci_to_OF_bus_map) {
675 printk(KERN_ERR "Can't allocate OF bus map !\n");
676 return;
677 }
678
679 /* We fill the bus map with invalid values, that helps
680 * debugging.
681 */
682 for (i=0; i<pci_bus_count; i++)
683 pci_to_OF_bus_map[i] = 0xff;
684
685 /* For each hose, we begin searching bridges */
686 for(hose=hose_head; hose; hose=hose->next) {
687 struct device_node* node;
688 node = (struct device_node *)hose->arch_data;
689 if (!node)
690 continue;
691 make_one_node_map(node, hose->first_busno);
692 }
693 of_prop_map = get_property(find_path_device("/"), "pci-OF-bus-map", NULL);
694 if (of_prop_map)
695 memcpy(of_prop_map, pci_to_OF_bus_map, pci_bus_count);
696#ifdef DEBUG
697 printk("PCI->OF bus map:\n");
698 for (i=0; i<pci_bus_count; i++) {
699 if (pci_to_OF_bus_map[i] == 0xff)
700 continue;
701 printk("%d -> %d\n", i, pci_to_OF_bus_map[i]);
702 }
703#endif
704}
705
706typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);
707
708static struct device_node*
709scan_OF_pci_childs(struct device_node* node, pci_OF_scan_iterator filter, void* data)
710{
711 struct device_node* sub_node;
712
713 for (; node != 0;node = node->sibling) {
714 unsigned int *class_code;
715
716 if (filter(node, data))
717 return node;
718
719 /* For PCI<->PCI bridges or CardBus bridges, we go down
720 * Note: some OFs create a parent node "multifunc-device" as
721 * a fake root for all functions of a multi-function device,
722 * we go down them as well.
723 */
724 class_code = (unsigned int *) get_property(node, "class-code", NULL);
725 if ((!class_code || ((*class_code >> 8) != PCI_CLASS_BRIDGE_PCI &&
726 (*class_code >> 8) != PCI_CLASS_BRIDGE_CARDBUS)) &&
727 strcmp(node->name, "multifunc-device"))
728 continue;
729 sub_node = scan_OF_pci_childs(node->child, filter, data);
730 if (sub_node)
731 return sub_node;
732 }
733 return NULL;
734}
735
736static int
737scan_OF_pci_childs_iterator(struct device_node* node, void* data)
738{
739 unsigned int *reg;
740 u8* fdata = (u8*)data;
741
742 reg = (unsigned int *) get_property(node, "reg", NULL);
743 if (reg && ((reg[0] >> 8) & 0xff) == fdata[1]
744 && ((reg[0] >> 16) & 0xff) == fdata[0])
745 return 1;
746 return 0;
747}
748
749static struct device_node*
750scan_OF_childs_for_device(struct device_node* node, u8 bus, u8 dev_fn)
751{
752 u8 filter_data[2] = {bus, dev_fn};
753
754 return scan_OF_pci_childs(node, scan_OF_pci_childs_iterator, filter_data);
755}
756
757/*
758 * Scans the OF tree for a device node matching a PCI device
759 */
760struct device_node *
761pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
762{
763 struct pci_controller *hose;
764 struct device_node *node;
765 int busnr;
766
767 if (!have_of)
768 return NULL;
769
770 /* Lookup the hose */
771 busnr = bus->number;
772 hose = pci_bus_to_hose(busnr);
773 if (!hose)
774 return NULL;
775
776 /* Check it has an OF node associated */
777 node = (struct device_node *) hose->arch_data;
778 if (!node)
779 return NULL;
780
781 /* Fixup bus number according to what OF think it is. */
782 if (pci_to_OF_bus_map)
783 busnr = pci_to_OF_bus_map[busnr];
784 if (busnr == 0xff)
785 return NULL;
786
787 /* Now, lookup childs of the hose */
788 return scan_OF_childs_for_device(node->child, busnr, devfn);
789}
790EXPORT_SYMBOL(pci_busdev_to_OF_node);
791
792struct device_node*
793pci_device_to_OF_node(struct pci_dev *dev)
794{
795 return pci_busdev_to_OF_node(dev->bus, dev->devfn);
796}
797EXPORT_SYMBOL(pci_device_to_OF_node);
798
799/* This routine is meant to be used early during boot, when the
800 * PCI bus numbers have not yet been assigned, and you need to
801 * issue PCI config cycles to an OF device.
802 * It could also be used to "fix" RTAS config cycles if you want
803 * to set pci_assign_all_buses to 1 and still use RTAS for PCI
804 * config cycles.
805 */
806struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
807{
808 if (!have_of)
809 return NULL;
810 while(node) {
811 struct pci_controller* hose;
812 for (hose=hose_head;hose;hose=hose->next)
813 if (hose->arch_data == node)
814 return hose;
815 node=node->parent;
816 }
817 return NULL;
818}
819
820static int
821find_OF_pci_device_filter(struct device_node* node, void* data)
822{
823 return ((void *)node == data);
824}
825
826/*
827 * Returns the PCI device matching a given OF node
828 */
829int
830pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
831{
832 unsigned int *reg;
833 struct pci_controller* hose;
834 struct pci_dev* dev = NULL;
835
836 if (!have_of)
837 return -ENODEV;
838 /* Make sure it's really a PCI device */
839 hose = pci_find_hose_for_OF_device(node);
840 if (!hose || !hose->arch_data)
841 return -ENODEV;
842 if (!scan_OF_pci_childs(((struct device_node*)hose->arch_data)->child,
843 find_OF_pci_device_filter, (void *)node))
844 return -ENODEV;
845 reg = (unsigned int *) get_property(node, "reg", NULL);
846 if (!reg)
847 return -ENODEV;
848 *bus = (reg[0] >> 16) & 0xff;
849 *devfn = ((reg[0] >> 8) & 0xff);
850
851 /* Ok, here we need some tweak. If we have already renumbered
852 * all busses, we can't rely on the OF bus number any more.
853 * the pci_to_OF_bus_map is not enough as several PCI busses
854 * may match the same OF bus number.
855 */
856 if (!pci_to_OF_bus_map)
857 return 0;
858
859 for_each_pci_dev(dev)
860 if (pci_to_OF_bus_map[dev->bus->number] == *bus &&
861 dev->devfn == *devfn) {
862 *bus = dev->bus->number;
863 pci_dev_put(dev);
864 return 0;
865 }
866
867 return -ENODEV;
868}
869EXPORT_SYMBOL(pci_device_from_OF_node);
870
871void __init
872pci_process_bridge_OF_ranges(struct pci_controller *hose,
873 struct device_node *dev, int primary)
874{
875 static unsigned int static_lc_ranges[256] __initdata;
876 unsigned int *dt_ranges, *lc_ranges, *ranges, *prev;
877 unsigned int size;
878 int rlen = 0, orig_rlen;
879 int memno = 0;
880 struct resource *res;
881 int np, na = prom_n_addr_cells(dev);
882 np = na + 5;
883
884 /* First we try to merge ranges to fix a problem with some pmacs
885 * that can have more than 3 ranges, fortunately using contiguous
886 * addresses -- BenH
887 */
888 dt_ranges = (unsigned int *) get_property(dev, "ranges", &rlen);
889 if (!dt_ranges)
890 return;
891 /* Sanity check, though hopefully that never happens */
892 if (rlen > sizeof(static_lc_ranges)) {
893 printk(KERN_WARNING "OF ranges property too large !\n");
894 rlen = sizeof(static_lc_ranges);
895 }
896 lc_ranges = static_lc_ranges;
897 memcpy(lc_ranges, dt_ranges, rlen);
898 orig_rlen = rlen;
899
900 /* Let's work on a copy of the "ranges" property instead of damaging
901 * the device-tree image in memory
902 */
903 ranges = lc_ranges;
904 prev = NULL;
905 while ((rlen -= np * sizeof(unsigned int)) >= 0) {
906 if (prev) {
907 if (prev[0] == ranges[0] && prev[1] == ranges[1] &&
908 (prev[2] + prev[na+4]) == ranges[2] &&
909 (prev[na+2] + prev[na+4]) == ranges[na+2]) {
910 prev[na+4] += ranges[na+4];
911 ranges[0] = 0;
912 ranges += np;
913 continue;
914 }
915 }
916 prev = ranges;
917 ranges += np;
918 }
919
920 /*
921 * The ranges property is laid out as an array of elements,
922 * each of which comprises:
923 * cells 0 - 2: a PCI address
924 * cells 3 or 3+4: a CPU physical address
925 * (size depending on dev->n_addr_cells)
926 * cells 4+5 or 5+6: the size of the range
927 */
928 ranges = lc_ranges;
929 rlen = orig_rlen;
930 while (ranges && (rlen -= np * sizeof(unsigned int)) >= 0) {
931 res = NULL;
932 size = ranges[na+4];
933 switch ((ranges[0] >> 24) & 0x3) {
934 case 1: /* I/O space */
935 if (ranges[2] != 0)
936 break;
937 hose->io_base_phys = ranges[na+2];
938 /* limit I/O space to 16MB */
939 if (size > 0x01000000)
940 size = 0x01000000;
941 hose->io_base_virt = ioremap(ranges[na+2], size);
942 if (primary)
943 isa_io_base = (unsigned long) hose->io_base_virt;
944 res = &hose->io_resource;
945 res->flags = IORESOURCE_IO;
946 res->start = ranges[2];
947 DBG("PCI: IO 0x%lx -> 0x%lx\n",
948 res->start, res->start + size - 1);
949 break;
950 case 2: /* memory space */
951 memno = 0;
952 if (ranges[1] == 0 && ranges[2] == 0
953 && ranges[na+4] <= (16 << 20)) {
954 /* 1st 16MB, i.e. ISA memory area */
955 if (primary)
956 isa_mem_base = ranges[na+2];
957 memno = 1;
958 }
959 while (memno < 3 && hose->mem_resources[memno].flags)
960 ++memno;
961 if (memno == 0)
962 hose->pci_mem_offset = ranges[na+2] - ranges[2];
963 if (memno < 3) {
964 res = &hose->mem_resources[memno];
965 res->flags = IORESOURCE_MEM;
966 if(ranges[0] & 0x40000000)
967 res->flags |= IORESOURCE_PREFETCH;
968 res->start = ranges[na+2];
969 DBG("PCI: MEM[%d] 0x%lx -> 0x%lx\n", memno,
970 res->start, res->start + size - 1);
971 }
972 break;
973 }
974 if (res != NULL) {
975 res->name = dev->full_name;
976 res->end = res->start + size - 1;
977 res->parent = NULL;
978 res->sibling = NULL;
979 res->child = NULL;
980 }
981 ranges += np;
982 }
983}
984
985/* We create the "pci-OF-bus-map" property now so it appears in the
986 * /proc device tree
987 */
988void __init
989pci_create_OF_bus_map(void)
990{
991 struct property* of_prop;
992
993 of_prop = (struct property*) alloc_bootmem(sizeof(struct property) + 256);
994 if (of_prop && find_path_device("/")) {
995 memset(of_prop, -1, sizeof(struct property) + 256);
996 of_prop->name = "pci-OF-bus-map";
997 of_prop->length = 256;
998 of_prop->value = (unsigned char *)&of_prop[1];
999 prom_add_property(find_path_device("/"), of_prop);
1000 }
1001}
1002
1003static ssize_t pci_show_devspec(struct device *dev, struct device_attribute *attr, char *buf)
1004{
1005 struct pci_dev *pdev;
1006 struct device_node *np;
1007
1008 pdev = to_pci_dev (dev);
1009 np = pci_device_to_OF_node(pdev);
1010 if (np == NULL || np->full_name == NULL)
1011 return 0;
1012 return sprintf(buf, "%s", np->full_name);
1013}
1014static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
1015
1016#else /* CONFIG_PPC_OF */
1017void pcibios_make_OF_bus_map(void) 625void pcibios_make_OF_bus_map(void)
1018{ 626{
1019} 627}
1020#endif /* CONFIG_PPC_OF */
1021 628
1022/* Add sysfs properties */ 629/* Add sysfs properties */
1023void pcibios_add_platform_entries(struct pci_dev *pdev) 630void pcibios_add_platform_entries(struct pci_dev *pdev)
1024{ 631{
1025#ifdef CONFIG_PPC_OF
1026 device_create_file(&pdev->dev, &dev_attr_devspec);
1027#endif /* CONFIG_PPC_OF */
1028} 632}
1029 633
1030 634
diff --git a/arch/ppc/kernel/perfmon_fsl_booke.c b/arch/ppc/kernel/perfmon_fsl_booke.c
deleted file mode 100644
index 32455dfcc36b..000000000000
--- a/arch/ppc/kernel/perfmon_fsl_booke.c
+++ /dev/null
@@ -1,222 +0,0 @@
1/* kernel/perfmon_fsl_booke.c
2 * Freescale Book-E Performance Monitor code
3 *
4 * Author: Andy Fleming
5 * Copyright (c) 2004 Freescale Semiconductor, Inc
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/errno.h>
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
19#include <linux/ptrace.h>
20#include <linux/slab.h>
21#include <linux/user.h>
22#include <linux/a.out.h>
23#include <linux/interrupt.h>
24#include <linux/config.h>
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/prctl.h>
28
29#include <asm/pgtable.h>
30#include <asm/uaccess.h>
31#include <asm/system.h>
32#include <asm/io.h>
33#include <asm/reg.h>
34#include <asm/xmon.h>
35#include <asm/pmc.h>
36
37static inline u32 get_pmlca(int ctr);
38static inline void set_pmlca(int ctr, u32 pmlca);
39
40static inline u32 get_pmlca(int ctr)
41{
42 u32 pmlca;
43
44 switch (ctr) {
45 case 0:
46 pmlca = mfpmr(PMRN_PMLCA0);
47 break;
48 case 1:
49 pmlca = mfpmr(PMRN_PMLCA1);
50 break;
51 case 2:
52 pmlca = mfpmr(PMRN_PMLCA2);
53 break;
54 case 3:
55 pmlca = mfpmr(PMRN_PMLCA3);
56 break;
57 default:
58 panic("Bad ctr number\n");
59 }
60
61 return pmlca;
62}
63
64static inline void set_pmlca(int ctr, u32 pmlca)
65{
66 switch (ctr) {
67 case 0:
68 mtpmr(PMRN_PMLCA0, pmlca);
69 break;
70 case 1:
71 mtpmr(PMRN_PMLCA1, pmlca);
72 break;
73 case 2:
74 mtpmr(PMRN_PMLCA2, pmlca);
75 break;
76 case 3:
77 mtpmr(PMRN_PMLCA3, pmlca);
78 break;
79 default:
80 panic("Bad ctr number\n");
81 }
82}
83
84void init_pmc_stop(int ctr)
85{
86 u32 pmlca = (PMLCA_FC | PMLCA_FCS | PMLCA_FCU |
87 PMLCA_FCM1 | PMLCA_FCM0);
88 u32 pmlcb = 0;
89
90 switch (ctr) {
91 case 0:
92 mtpmr(PMRN_PMLCA0, pmlca);
93 mtpmr(PMRN_PMLCB0, pmlcb);
94 break;
95 case 1:
96 mtpmr(PMRN_PMLCA1, pmlca);
97 mtpmr(PMRN_PMLCB1, pmlcb);
98 break;
99 case 2:
100 mtpmr(PMRN_PMLCA2, pmlca);
101 mtpmr(PMRN_PMLCB2, pmlcb);
102 break;
103 case 3:
104 mtpmr(PMRN_PMLCA3, pmlca);
105 mtpmr(PMRN_PMLCB3, pmlcb);
106 break;
107 default:
108 panic("Bad ctr number!\n");
109 }
110}
111
112void set_pmc_event(int ctr, int event)
113{
114 u32 pmlca;
115
116 pmlca = get_pmlca(ctr);
117
118 pmlca = (pmlca & ~PMLCA_EVENT_MASK) |
119 ((event << PMLCA_EVENT_SHIFT) &
120 PMLCA_EVENT_MASK);
121
122 set_pmlca(ctr, pmlca);
123}
124
125void set_pmc_user_kernel(int ctr, int user, int kernel)
126{
127 u32 pmlca;
128
129 pmlca = get_pmlca(ctr);
130
131 if(user)
132 pmlca &= ~PMLCA_FCU;
133 else
134 pmlca |= PMLCA_FCU;
135
136 if(kernel)
137 pmlca &= ~PMLCA_FCS;
138 else
139 pmlca |= PMLCA_FCS;
140
141 set_pmlca(ctr, pmlca);
142}
143
144void set_pmc_marked(int ctr, int mark0, int mark1)
145{
146 u32 pmlca = get_pmlca(ctr);
147
148 if(mark0)
149 pmlca &= ~PMLCA_FCM0;
150 else
151 pmlca |= PMLCA_FCM0;
152
153 if(mark1)
154 pmlca &= ~PMLCA_FCM1;
155 else
156 pmlca |= PMLCA_FCM1;
157
158 set_pmlca(ctr, pmlca);
159}
160
161void pmc_start_ctr(int ctr, int enable)
162{
163 u32 pmlca = get_pmlca(ctr);
164
165 pmlca &= ~PMLCA_FC;
166
167 if (enable)
168 pmlca |= PMLCA_CE;
169 else
170 pmlca &= ~PMLCA_CE;
171
172 set_pmlca(ctr, pmlca);
173}
174
175void pmc_start_ctrs(int enable)
176{
177 u32 pmgc0 = mfpmr(PMRN_PMGC0);
178
179 pmgc0 &= ~PMGC0_FAC;
180 pmgc0 |= PMGC0_FCECE;
181
182 if (enable)
183 pmgc0 |= PMGC0_PMIE;
184 else
185 pmgc0 &= ~PMGC0_PMIE;
186
187 mtpmr(PMRN_PMGC0, pmgc0);
188}
189
190void pmc_stop_ctrs(void)
191{
192 u32 pmgc0 = mfpmr(PMRN_PMGC0);
193
194 pmgc0 |= PMGC0_FAC;
195
196 pmgc0 &= ~(PMGC0_PMIE | PMGC0_FCECE);
197
198 mtpmr(PMRN_PMGC0, pmgc0);
199}
200
201void dump_pmcs(void)
202{
203 printk("pmgc0: %x\n", mfpmr(PMRN_PMGC0));
204 printk("pmc\t\tpmlca\t\tpmlcb\n");
205 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC0),
206 mfpmr(PMRN_PMLCA0), mfpmr(PMRN_PMLCB0));
207 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC1),
208 mfpmr(PMRN_PMLCA1), mfpmr(PMRN_PMLCB1));
209 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC2),
210 mfpmr(PMRN_PMLCA2), mfpmr(PMRN_PMLCB2));
211 printk("%8x\t%8x\t%8x\n", mfpmr(PMRN_PMC3),
212 mfpmr(PMRN_PMLCA3), mfpmr(PMRN_PMLCB3));
213}
214
215EXPORT_SYMBOL(init_pmc_stop);
216EXPORT_SYMBOL(set_pmc_event);
217EXPORT_SYMBOL(set_pmc_user_kernel);
218EXPORT_SYMBOL(set_pmc_marked);
219EXPORT_SYMBOL(pmc_start_ctr);
220EXPORT_SYMBOL(pmc_start_ctrs);
221EXPORT_SYMBOL(pmc_stop_ctrs);
222EXPORT_SYMBOL(dump_pmcs);
diff --git a/arch/ppc/kernel/ppc_htab.c b/arch/ppc/kernel/ppc_htab.c
index 2f5c7650274f..75c645043746 100644
--- a/arch/ppc/kernel/ppc_htab.c
+++ b/arch/ppc/kernel/ppc_htab.c
@@ -52,7 +52,7 @@ static int ppc_htab_open(struct inode *inode, struct file *file)
52 return single_open(file, ppc_htab_show, NULL); 52 return single_open(file, ppc_htab_show, NULL);
53} 53}
54 54
55struct file_operations ppc_htab_operations = { 55const struct file_operations ppc_htab_operations = {
56 .open = ppc_htab_open, 56 .open = ppc_htab_open,
57 .read = seq_read, 57 .read = seq_read,
58 .llseek = seq_lseek, 58 .llseek = seq_lseek,
@@ -104,7 +104,7 @@ static char *pmc2_lookup(unsigned long mmcr0)
104static int ppc_htab_show(struct seq_file *m, void *v) 104static int ppc_htab_show(struct seq_file *m, void *v)
105{ 105{
106 unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0; 106 unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
107#if defined(CONFIG_PPC_STD_MMU) && !defined(CONFIG_PPC64BRIDGE) 107#if defined(CONFIG_PPC_STD_MMU)
108 unsigned int kptes = 0, uptes = 0; 108 unsigned int kptes = 0, uptes = 0;
109 PTE *ptr; 109 PTE *ptr;
110#endif /* CONFIG_PPC_STD_MMU */ 110#endif /* CONFIG_PPC_STD_MMU */
@@ -133,7 +133,6 @@ static int ppc_htab_show(struct seq_file *m, void *v)
133 return 0; 133 return 0;
134 } 134 }
135 135
136#ifndef CONFIG_PPC64BRIDGE
137 for (ptr = Hash; ptr < Hash_end; ptr++) { 136 for (ptr = Hash; ptr < Hash_end; ptr++) {
138 unsigned int mctx, vsid; 137 unsigned int mctx, vsid;
139 138
@@ -147,7 +146,6 @@ static int ppc_htab_show(struct seq_file *m, void *v)
147 else 146 else
148 uptes++; 147 uptes++;
149 } 148 }
150#endif
151 149
152 seq_printf(m, 150 seq_printf(m,
153 "PTE Hash Table Information\n" 151 "PTE Hash Table Information\n"
@@ -155,20 +153,16 @@ static int ppc_htab_show(struct seq_file *m, void *v)
155 "Buckets\t\t: %lu\n" 153 "Buckets\t\t: %lu\n"
156 "Address\t\t: %08lx\n" 154 "Address\t\t: %08lx\n"
157 "Entries\t\t: %lu\n" 155 "Entries\t\t: %lu\n"
158#ifndef CONFIG_PPC64BRIDGE
159 "User ptes\t: %u\n" 156 "User ptes\t: %u\n"
160 "Kernel ptes\t: %u\n" 157 "Kernel ptes\t: %u\n"
161 "Percent full\t: %lu%%\n" 158 "Percent full\t: %lu%%\n"
162#endif
163 , (unsigned long)(Hash_size>>10), 159 , (unsigned long)(Hash_size>>10),
164 (Hash_size/(sizeof(PTE)*8)), 160 (Hash_size/(sizeof(PTE)*8)),
165 (unsigned long)Hash, 161 (unsigned long)Hash,
166 Hash_size/sizeof(PTE) 162 Hash_size/sizeof(PTE)
167#ifndef CONFIG_PPC64BRIDGE
168 , uptes, 163 , uptes,
169 kptes, 164 kptes,
170 ((kptes+uptes)*100) / (Hash_size/sizeof(PTE)) 165 ((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
171#endif
172 ); 166 );
173 167
174 seq_printf(m, 168 seq_printf(m,
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 82adb4601348..865ba74991a9 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -18,7 +18,6 @@
18#include <linux/bitops.h> 18#include <linux/bitops.h>
19 19
20#include <asm/page.h> 20#include <asm/page.h>
21#include <asm/semaphore.h>
22#include <asm/processor.h> 21#include <asm/processor.h>
23#include <asm/uaccess.h> 22#include <asm/uaccess.h>
24#include <asm/io.h> 23#include <asm/io.h>
@@ -30,7 +29,6 @@
30#include <linux/adb.h> 29#include <linux/adb.h>
31#include <linux/cuda.h> 30#include <linux/cuda.h>
32#include <linux/pmu.h> 31#include <linux/pmu.h>
33#include <asm/prom.h>
34#include <asm/system.h> 32#include <asm/system.h>
35#include <asm/pci-bridge.h> 33#include <asm/pci-bridge.h>
36#include <asm/irq.h> 34#include <asm/irq.h>
@@ -208,27 +206,6 @@ EXPORT_SYMBOL(adb_try_handler_change);
208EXPORT_SYMBOL(cuda_request); 206EXPORT_SYMBOL(cuda_request);
209EXPORT_SYMBOL(cuda_poll); 207EXPORT_SYMBOL(cuda_poll);
210#endif /* CONFIG_ADB_CUDA */ 208#endif /* CONFIG_ADB_CUDA */
211#ifdef CONFIG_PPC_OF
212EXPORT_SYMBOL(find_devices);
213EXPORT_SYMBOL(find_type_devices);
214EXPORT_SYMBOL(find_compatible_devices);
215EXPORT_SYMBOL(find_path_device);
216EXPORT_SYMBOL(device_is_compatible);
217EXPORT_SYMBOL(machine_is_compatible);
218EXPORT_SYMBOL(find_all_nodes);
219EXPORT_SYMBOL(get_property);
220EXPORT_SYMBOL(request_OF_resource);
221EXPORT_SYMBOL(release_OF_resource);
222EXPORT_SYMBOL(of_find_node_by_name);
223EXPORT_SYMBOL(of_find_node_by_type);
224EXPORT_SYMBOL(of_find_compatible_node);
225EXPORT_SYMBOL(of_find_node_by_path);
226EXPORT_SYMBOL(of_find_all_nodes);
227EXPORT_SYMBOL(of_get_parent);
228EXPORT_SYMBOL(of_get_next_child);
229EXPORT_SYMBOL(of_node_get);
230EXPORT_SYMBOL(of_node_put);
231#endif /* CONFIG_PPC_OF */
232#if defined(CONFIG_BOOTX_TEXT) 209#if defined(CONFIG_BOOTX_TEXT)
233EXPORT_SYMBOL(btext_update_display); 210EXPORT_SYMBOL(btext_update_display);
234#endif 211#endif
@@ -262,9 +239,6 @@ EXPORT_SYMBOL(console_drivers);
262EXPORT_SYMBOL(xmon); 239EXPORT_SYMBOL(xmon);
263EXPORT_SYMBOL(xmon_printf); 240EXPORT_SYMBOL(xmon_printf);
264#endif 241#endif
265EXPORT_SYMBOL(__up);
266EXPORT_SYMBOL(__down);
267EXPORT_SYMBOL(__down_interruptible);
268 242
269#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) 243#if defined(CONFIG_KGDB) || defined(CONFIG_XMON)
270extern void (*debugger)(struct pt_regs *regs); 244extern void (*debugger)(struct pt_regs *regs);
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index c08ab432e958..1f79e84ab464 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Common prep/chrp boot and setup code. 2 * Common prep boot and setup code.
3 */ 3 */
4 4
5#include <linux/config.h> 5#include <linux/config.h>
@@ -72,17 +72,12 @@ unsigned long ISA_DMA_THRESHOLD;
72unsigned int DMA_MODE_READ; 72unsigned int DMA_MODE_READ;
73unsigned int DMA_MODE_WRITE; 73unsigned int DMA_MODE_WRITE;
74 74
75#ifdef CONFIG_PPC_MULTIPLATFORM 75#ifdef CONFIG_PPC_PREP
76int _machine = 0;
77EXPORT_SYMBOL(_machine);
78
79extern void prep_init(unsigned long r3, unsigned long r4, 76extern void prep_init(unsigned long r3, unsigned long r4,
80 unsigned long r5, unsigned long r6, unsigned long r7); 77 unsigned long r5, unsigned long r6, unsigned long r7);
81extern void chrp_init(unsigned long r3, unsigned long r4,
82 unsigned long r5, unsigned long r6, unsigned long r7);
83 78
84dev_t boot_dev; 79dev_t boot_dev;
85#endif /* CONFIG_PPC_MULTIPLATFORM */ 80#endif /* CONFIG_PPC_PREP */
86 81
87int have_of; 82int have_of;
88EXPORT_SYMBOL(have_of); 83EXPORT_SYMBOL(have_of);
@@ -168,9 +163,8 @@ int show_cpuinfo(struct seq_file *m, void *v)
168 /* Show summary information */ 163 /* Show summary information */
169#ifdef CONFIG_SMP 164#ifdef CONFIG_SMP
170 unsigned long bogosum = 0; 165 unsigned long bogosum = 0;
171 for (i = 0; i < NR_CPUS; ++i) 166 for_each_online_cpu(i)
172 if (cpu_online(i)) 167 bogosum += cpu_data[i].loops_per_jiffy;
173 bogosum += cpu_data[i].loops_per_jiffy;
174 seq_printf(m, "total bogomips\t: %lu.%02lu\n", 168 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
175 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100); 169 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
176#endif /* CONFIG_SMP */ 170#endif /* CONFIG_SMP */
@@ -320,72 +314,12 @@ early_init(int r3, int r4, int r5)
320 identify_cpu(offset, 0); 314 identify_cpu(offset, 0);
321 do_cpu_ftr_fixups(offset); 315 do_cpu_ftr_fixups(offset);
322 316
323#if defined(CONFIG_PPC_OF)
324 reloc_got2(offset);
325
326 /*
327 * don't do anything on prep
328 * for now, don't use bootinfo because it breaks yaboot 0.5
329 * and assume that if we didn't find a magic number, we have OF
330 */
331 if (*(unsigned long *)(0) != 0xdeadc0de)
332 phys = prom_init(r3, r4, (prom_entry)r5);
333
334 reloc_got2(-offset);
335#endif
336
337 return phys; 317 return phys;
338} 318}
339 319
340#ifdef CONFIG_PPC_OF 320#ifdef CONFIG_PPC_PREP
341/*
342 * Assume here that all clock rates are the same in a
343 * smp system. -- Cort
344 */
345int
346of_show_percpuinfo(struct seq_file *m, int i)
347{
348 struct device_node *cpu_node;
349 u32 *fp;
350 int s;
351
352 cpu_node = find_type_devices("cpu");
353 if (!cpu_node)
354 return 0;
355 for (s = 0; s < i && cpu_node->next; s++)
356 cpu_node = cpu_node->next;
357 fp = (u32 *)get_property(cpu_node, "clock-frequency", NULL);
358 if (fp)
359 seq_printf(m, "clock\t\t: %dMHz\n", *fp / 1000000);
360 return 0;
361}
362
363void __init
364intuit_machine_type(void)
365{
366 char *model;
367 struct device_node *root;
368
369 /* ask the OF info if we're a chrp or pmac */
370 root = find_path_device("/");
371 if (root != 0) {
372 /* assume pmac unless proven to be chrp -- Cort */
373 _machine = _MACH_Pmac;
374 model = get_property(root, "device_type", NULL);
375 if (model && !strncmp("chrp", model, 4))
376 _machine = _MACH_chrp;
377 else {
378 model = get_property(root, "model", NULL);
379 if (model && !strncmp(model, "IBM", 3))
380 _machine = _MACH_chrp;
381 }
382 }
383}
384#endif
385
386#ifdef CONFIG_PPC_MULTIPLATFORM
387/* 321/*
388 * The PPC_MULTIPLATFORM version of platform_init... 322 * The PPC_PREP version of platform_init...
389 */ 323 */
390void __init 324void __init
391platform_init(unsigned long r3, unsigned long r4, unsigned long r5, 325platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
@@ -400,161 +334,9 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
400 334
401 parse_bootinfo(find_bootinfo()); 335 parse_bootinfo(find_bootinfo());
402 336
403 /* if we didn't get any bootinfo telling us what we are... */ 337 prep_init(r3, r4, r5, r6, r7);
404 if (_machine == 0) {
405 /* prep boot loader tells us if we're prep or not */
406 if ( *(unsigned long *)(KERNELBASE) == (0xdeadc0de) )
407 _machine = _MACH_prep;
408 }
409
410#ifdef CONFIG_PPC_PREP
411 /* not much more to do here, if prep */
412 if (_machine == _MACH_prep) {
413 prep_init(r3, r4, r5, r6, r7);
414 return;
415 }
416#endif
417
418#ifdef CONFIG_PPC_OF
419 have_of = 1;
420
421 /* prom_init has already been called from __start */
422 if (boot_infos)
423 relocate_nodes();
424
425 /* If we aren't PReP, we can find out if we're Pmac
426 * or CHRP with this. */
427 if (_machine == 0)
428 intuit_machine_type();
429
430 /* finish_device_tree may need _machine defined. */
431 finish_device_tree();
432
433 /*
434 * If we were booted via quik, r3 points to the physical
435 * address of the command-line parameters.
436 * If we were booted from an xcoff image (i.e. netbooted or
437 * booted from floppy), we get the command line from the
438 * bootargs property of the /chosen node.
439 * If an initial ramdisk is present, r3 and r4
440 * are used for initrd_start and initrd_size,
441 * otherwise they contain 0xdeadbeef.
442 */
443 if (r3 >= 0x4000 && r3 < 0x800000 && r4 == 0) {
444 strlcpy(cmd_line, (char *)r3 + KERNELBASE,
445 sizeof(cmd_line));
446 } else if (boot_infos != 0) {
447 /* booted by BootX - check for ramdisk */
448 if (boot_infos->kernelParamsOffset != 0)
449 strlcpy(cmd_line, (char *) boot_infos
450 + boot_infos->kernelParamsOffset,
451 sizeof(cmd_line));
452#ifdef CONFIG_BLK_DEV_INITRD
453 if (boot_infos->ramDisk) {
454 initrd_start = (unsigned long) boot_infos
455 + boot_infos->ramDisk;
456 initrd_end = initrd_start + boot_infos->ramDiskSize;
457 initrd_below_start_ok = 1;
458 }
459#endif
460 } else {
461 struct device_node *chosen;
462 char *p;
463
464#ifdef CONFIG_BLK_DEV_INITRD
465 if (r3 && r4 && r4 != 0xdeadbeef) {
466 if (r3 < KERNELBASE)
467 r3 += KERNELBASE;
468 initrd_start = r3;
469 initrd_end = r3 + r4;
470 ROOT_DEV = Root_RAM0;
471 initrd_below_start_ok = 1;
472 }
473#endif
474 chosen = find_devices("chosen");
475 if (chosen != NULL) {
476 p = get_property(chosen, "bootargs", NULL);
477 if (p && *p) {
478 strlcpy(cmd_line, p, sizeof(cmd_line));
479 }
480 }
481 }
482#ifdef CONFIG_ADB
483 if (strstr(cmd_line, "adb_sync")) {
484 extern int __adb_probe_sync;
485 __adb_probe_sync = 1;
486 }
487#endif /* CONFIG_ADB */
488
489 switch (_machine) {
490#ifdef CONFIG_PPC_CHRP
491 case _MACH_chrp:
492 chrp_init(r3, r4, r5, r6, r7);
493 break;
494#endif
495 }
496#endif /* CONFIG_PPC_OF */
497} 338}
498#endif /* CONFIG_PPC_MULTIPLATFORM */ 339#endif /* CONFIG_PPC_PREP */
499
500#ifdef CONFIG_PPC_OF
501#ifdef CONFIG_SERIAL_CORE_CONSOLE
502extern char *of_stdout_device;
503
504static int __init set_preferred_console(void)
505{
506 struct device_node *prom_stdout;
507 char *name;
508 int offset = 0;
509
510 if (of_stdout_device == NULL)
511 return -ENODEV;
512
513 /* The user has requested a console so this is already set up. */
514 if (strstr(saved_command_line, "console="))
515 return -EBUSY;
516
517 prom_stdout = find_path_device(of_stdout_device);
518 if (!prom_stdout)
519 return -ENODEV;
520
521 name = (char *)get_property(prom_stdout, "name", NULL);
522 if (!name)
523 return -ENODEV;
524
525 if (strcmp(name, "serial") == 0) {
526 int i;
527 u32 *reg = (u32 *)get_property(prom_stdout, "reg", &i);
528 if (i > 8) {
529 switch (reg[1]) {
530 case 0x3f8:
531 offset = 0;
532 break;
533 case 0x2f8:
534 offset = 1;
535 break;
536 case 0x898:
537 offset = 2;
538 break;
539 case 0x890:
540 offset = 3;
541 break;
542 default:
543 /* We dont recognise the serial port */
544 return -ENODEV;
545 }
546 }
547 } else if (strcmp(name, "ch-a") == 0)
548 offset = 0;
549 else if (strcmp(name, "ch-b") == 0)
550 offset = 1;
551 else
552 return -ENODEV;
553 return add_preferred_console("ttyS", offset, NULL);
554}
555console_initcall(set_preferred_console);
556#endif /* CONFIG_SERIAL_CORE_CONSOLE */
557#endif /* CONFIG_PPC_OF */
558 340
559struct bi_record *find_bootinfo(void) 341struct bi_record *find_bootinfo(void)
560{ 342{
@@ -590,23 +372,6 @@ void parse_bootinfo(struct bi_record *rec)
590 initrd_end = data[0] + data[1] + KERNELBASE; 372 initrd_end = data[0] + data[1] + KERNELBASE;
591 break; 373 break;
592#endif /* CONFIG_BLK_DEV_INITRD */ 374#endif /* CONFIG_BLK_DEV_INITRD */
593#ifdef CONFIG_PPC_MULTIPLATFORM
594 case BI_MACHTYPE:
595 /* Machine types changed with the merge. Since the
596 * bootinfo are now deprecated, we can just hard code
597 * the appropriate conversion here for when we are
598 * called with yaboot which passes us a machine type
599 * this way.
600 */
601 switch(data[0]) {
602 case 1: _machine = _MACH_prep; break;
603 case 2: _machine = _MACH_Pmac; break;
604 case 4: _machine = _MACH_chrp; break;
605 default:
606 _machine = data[0];
607 }
608 break;
609#endif
610 case BI_MEMSIZE: 375 case BI_MEMSIZE:
611 boot_mem_size = data[0]; 376 boot_mem_size = data[0];
612 break; 377 break;
@@ -632,9 +397,6 @@ machine_init(unsigned long r3, unsigned long r4, unsigned long r5,
632#ifdef CONFIG_6xx 397#ifdef CONFIG_6xx
633 ppc_md.power_save = ppc6xx_idle; 398 ppc_md.power_save = ppc6xx_idle;
634#endif 399#endif
635#ifdef CONFIG_POWER4
636 ppc_md.power_save = power4_idle;
637#endif
638 400
639 platform_init(r3, r4, r5, r6, r7); 401 platform_init(r3, r4, r5, r6, r7);
640 402
@@ -712,9 +474,8 @@ int __init ppc_init(void)
712 if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff); 474 if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff);
713 475
714 /* register CPU devices */ 476 /* register CPU devices */
715 for (i = 0; i < NR_CPUS; i++) 477 for_each_possible_cpu(i)
716 if (cpu_possible(i)) 478 register_cpu(&cpu_devices[i], i, NULL);
717 register_cpu(&cpu_devices[i], i, NULL);
718 479
719 /* call platform init */ 480 /* call platform init */
720 if (ppc_md.init != NULL) { 481 if (ppc_md.init != NULL) {
@@ -801,7 +562,4 @@ void __init setup_arch(char **cmdline_p)
801 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); 562 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
802 563
803 paging_init(); 564 paging_init();
804
805 /* this is for modules since _machine can be a define -- Cort */
806 ppc_md.ppc_machine = _machine;
807} 565}
diff --git a/arch/ppc/kernel/smp-tbsync.c b/arch/ppc/kernel/smp-tbsync.c
index 2c9cd95bcea6..6a5694fcc711 100644
--- a/arch/ppc/kernel/smp-tbsync.c
+++ b/arch/ppc/kernel/smp-tbsync.c
@@ -126,8 +126,7 @@ smp_generic_give_timebase( void )
126 printk("Synchronizing timebase\n"); 126 printk("Synchronizing timebase\n");
127 127
128 /* if this fails then this kernel won't work anyway... */ 128 /* if this fails then this kernel won't work anyway... */
129 tbsync = kmalloc( sizeof(*tbsync), GFP_KERNEL ); 129 tbsync = kzalloc( sizeof(*tbsync), GFP_KERNEL );
130 memset( tbsync, 0, sizeof(*tbsync) );
131 mb(); 130 mb();
132 running = 1; 131 running = 1;
133 132
diff --git a/arch/ppc/kernel/smp.c b/arch/ppc/kernel/smp.c
index e55cdda6149a..f77795a64dae 100644
--- a/arch/ppc/kernel/smp.c
+++ b/arch/ppc/kernel/smp.c
@@ -311,7 +311,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
311 /* Backup CPU 0 state */ 311 /* Backup CPU 0 state */
312 __save_cpu_setup(); 312 __save_cpu_setup();
313 313
314 for_each_cpu(cpu) { 314 for_each_possible_cpu(cpu) {
315 if (cpu == smp_processor_id()) 315 if (cpu == smp_processor_id())
316 continue; 316 continue;
317 /* create a process for the processor */ 317 /* create a process for the processor */
diff --git a/arch/ppc/kernel/swsusp.S b/arch/ppc/kernel/swsusp.S
deleted file mode 100644
index 69773cc1a85f..000000000000
--- a/arch/ppc/kernel/swsusp.S
+++ /dev/null
@@ -1,349 +0,0 @@
1#include <linux/config.h>
2#include <linux/threads.h>
3#include <asm/processor.h>
4#include <asm/page.h>
5#include <asm/cputable.h>
6#include <asm/thread_info.h>
7#include <asm/ppc_asm.h>
8#include <asm/asm-offsets.h>
9
10
11/*
12 * Structure for storing CPU registers on the save area.
13 */
14#define SL_SP 0
15#define SL_PC 4
16#define SL_MSR 8
17#define SL_SDR1 0xc
18#define SL_SPRG0 0x10 /* 4 sprg's */
19#define SL_DBAT0 0x20
20#define SL_IBAT0 0x28
21#define SL_DBAT1 0x30
22#define SL_IBAT1 0x38
23#define SL_DBAT2 0x40
24#define SL_IBAT2 0x48
25#define SL_DBAT3 0x50
26#define SL_IBAT3 0x58
27#define SL_TB 0x60
28#define SL_R2 0x68
29#define SL_CR 0x6c
30#define SL_LR 0x70
31#define SL_R12 0x74 /* r12 to r31 */
32#define SL_SIZE (SL_R12 + 80)
33
34 .section .data
35 .align 5
36
37_GLOBAL(swsusp_save_area)
38 .space SL_SIZE
39
40
41 .section .text
42 .align 5
43
44_GLOBAL(swsusp_arch_suspend)
45
46 lis r11,swsusp_save_area@h
47 ori r11,r11,swsusp_save_area@l
48
49 mflr r0
50 stw r0,SL_LR(r11)
51 mfcr r0
52 stw r0,SL_CR(r11)
53 stw r1,SL_SP(r11)
54 stw r2,SL_R2(r11)
55 stmw r12,SL_R12(r11)
56
57 /* Save MSR & SDR1 */
58 mfmsr r4
59 stw r4,SL_MSR(r11)
60 mfsdr1 r4
61 stw r4,SL_SDR1(r11)
62
63 /* Get a stable timebase and save it */
641: mftbu r4
65 stw r4,SL_TB(r11)
66 mftb r5
67 stw r5,SL_TB+4(r11)
68 mftbu r3
69 cmpw r3,r4
70 bne 1b
71
72 /* Save SPRGs */
73 mfsprg r4,0
74 stw r4,SL_SPRG0(r11)
75 mfsprg r4,1
76 stw r4,SL_SPRG0+4(r11)
77 mfsprg r4,2
78 stw r4,SL_SPRG0+8(r11)
79 mfsprg r4,3
80 stw r4,SL_SPRG0+12(r11)
81
82 /* Save BATs */
83 mfdbatu r4,0
84 stw r4,SL_DBAT0(r11)
85 mfdbatl r4,0
86 stw r4,SL_DBAT0+4(r11)
87 mfdbatu r4,1
88 stw r4,SL_DBAT1(r11)
89 mfdbatl r4,1
90 stw r4,SL_DBAT1+4(r11)
91 mfdbatu r4,2
92 stw r4,SL_DBAT2(r11)
93 mfdbatl r4,2
94 stw r4,SL_DBAT2+4(r11)
95 mfdbatu r4,3
96 stw r4,SL_DBAT3(r11)
97 mfdbatl r4,3
98 stw r4,SL_DBAT3+4(r11)
99 mfibatu r4,0
100 stw r4,SL_IBAT0(r11)
101 mfibatl r4,0
102 stw r4,SL_IBAT0+4(r11)
103 mfibatu r4,1
104 stw r4,SL_IBAT1(r11)
105 mfibatl r4,1
106 stw r4,SL_IBAT1+4(r11)
107 mfibatu r4,2
108 stw r4,SL_IBAT2(r11)
109 mfibatl r4,2
110 stw r4,SL_IBAT2+4(r11)
111 mfibatu r4,3
112 stw r4,SL_IBAT3(r11)
113 mfibatl r4,3
114 stw r4,SL_IBAT3+4(r11)
115
116#if 0
117 /* Backup various CPU config stuffs */
118 bl __save_cpu_setup
119#endif
120 /* Call the low level suspend stuff (we should probably have made
121 * a stackframe...
122 */
123 bl swsusp_save
124
125 /* Restore LR from the save area */
126 lis r11,swsusp_save_area@h
127 ori r11,r11,swsusp_save_area@l
128 lwz r0,SL_LR(r11)
129 mtlr r0
130
131 blr
132
133
134/* Resume code */
135_GLOBAL(swsusp_arch_resume)
136
137 /* Stop pending alitvec streams and memory accesses */
138BEGIN_FTR_SECTION
139 DSSALL
140END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
141 sync
142
143 /* Disable MSR:DR to make sure we don't take a TLB or
144 * hash miss during the copy, as our hash table will
145 * for a while be unuseable. For .text, we assume we are
146 * covered by a BAT. This works only for non-G5 at this
147 * point. G5 will need a better approach, possibly using
148 * a small temporary hash table filled with large mappings,
149 * disabling the MMU completely isn't a good option for
150 * performance reasons.
151 * (Note that 750's may have the same performance issue as
152 * the G5 in this case, we should investigate using moving
153 * BATs for these CPUs)
154 */
155 mfmsr r0
156 sync
157 rlwinm r0,r0,0,28,26 /* clear MSR_DR */
158 mtmsr r0
159 sync
160 isync
161
162 /* Load ptr the list of pages to copy in r3 */
163 lis r11,(pagedir_nosave - KERNELBASE)@h
164 ori r11,r11,pagedir_nosave@l
165 lwz r10,0(r11)
166
167 /* Copy the pages. This is a very basic implementation, to
168 * be replaced by something more cache efficient */
1691:
170 tophys(r3,r10)
171 li r0,256
172 mtctr r0
173 lwz r11,pbe_address(r3) /* source */
174 tophys(r5,r11)
175 lwz r10,pbe_orig_address(r3) /* destination */
176 tophys(r6,r10)
1772:
178 lwz r8,0(r5)
179 lwz r9,4(r5)
180 lwz r10,8(r5)
181 lwz r11,12(r5)
182 addi r5,r5,16
183 stw r8,0(r6)
184 stw r9,4(r6)
185 stw r10,8(r6)
186 stw r11,12(r6)
187 addi r6,r6,16
188 bdnz 2b
189 lwz r10,pbe_next(r3)
190 cmpwi 0,r10,0
191 bne 1b
192
193 /* Do a very simple cache flush/inval of the L1 to ensure
194 * coherency of the icache
195 */
196 lis r3,0x0002
197 mtctr r3
198 li r3, 0
1991:
200 lwz r0,0(r3)
201 addi r3,r3,0x0020
202 bdnz 1b
203 isync
204 sync
205
206 /* Now flush those cache lines */
207 lis r3,0x0002
208 mtctr r3
209 li r3, 0
2101:
211 dcbf 0,r3
212 addi r3,r3,0x0020
213 bdnz 1b
214 sync
215
216 /* Ok, we are now running with the kernel data of the old
217 * kernel fully restored. We can get to the save area
218 * easily now. As for the rest of the code, it assumes the
219 * loader kernel and the booted one are exactly identical
220 */
221 lis r11,swsusp_save_area@h
222 ori r11,r11,swsusp_save_area@l
223 tophys(r11,r11)
224
225#if 0
226 /* Restore various CPU config stuffs */
227 bl __restore_cpu_setup
228#endif
229 /* Restore the BATs, and SDR1. Then we can turn on the MMU.
230 * This is a bit hairy as we are running out of those BATs,
231 * but first, our code is probably in the icache, and we are
232 * writing the same value to the BAT, so that should be fine,
233 * though a better solution will have to be found long-term
234 */
235 lwz r4,SL_SDR1(r11)
236 mtsdr1 r4
237 lwz r4,SL_SPRG0(r11)
238 mtsprg 0,r4
239 lwz r4,SL_SPRG0+4(r11)
240 mtsprg 1,r4
241 lwz r4,SL_SPRG0+8(r11)
242 mtsprg 2,r4
243 lwz r4,SL_SPRG0+12(r11)
244 mtsprg 3,r4
245
246#if 0
247 lwz r4,SL_DBAT0(r11)
248 mtdbatu 0,r4
249 lwz r4,SL_DBAT0+4(r11)
250 mtdbatl 0,r4
251 lwz r4,SL_DBAT1(r11)
252 mtdbatu 1,r4
253 lwz r4,SL_DBAT1+4(r11)
254 mtdbatl 1,r4
255 lwz r4,SL_DBAT2(r11)
256 mtdbatu 2,r4
257 lwz r4,SL_DBAT2+4(r11)
258 mtdbatl 2,r4
259 lwz r4,SL_DBAT3(r11)
260 mtdbatu 3,r4
261 lwz r4,SL_DBAT3+4(r11)
262 mtdbatl 3,r4
263 lwz r4,SL_IBAT0(r11)
264 mtibatu 0,r4
265 lwz r4,SL_IBAT0+4(r11)
266 mtibatl 0,r4
267 lwz r4,SL_IBAT1(r11)
268 mtibatu 1,r4
269 lwz r4,SL_IBAT1+4(r11)
270 mtibatl 1,r4
271 lwz r4,SL_IBAT2(r11)
272 mtibatu 2,r4
273 lwz r4,SL_IBAT2+4(r11)
274 mtibatl 2,r4
275 lwz r4,SL_IBAT3(r11)
276 mtibatu 3,r4
277 lwz r4,SL_IBAT3+4(r11)
278 mtibatl 3,r4
279#endif
280
281BEGIN_FTR_SECTION
282 li r4,0
283 mtspr SPRN_DBAT4U,r4
284 mtspr SPRN_DBAT4L,r4
285 mtspr SPRN_DBAT5U,r4
286 mtspr SPRN_DBAT5L,r4
287 mtspr SPRN_DBAT6U,r4
288 mtspr SPRN_DBAT6L,r4
289 mtspr SPRN_DBAT7U,r4
290 mtspr SPRN_DBAT7L,r4
291 mtspr SPRN_IBAT4U,r4
292 mtspr SPRN_IBAT4L,r4
293 mtspr SPRN_IBAT5U,r4
294 mtspr SPRN_IBAT5L,r4
295 mtspr SPRN_IBAT6U,r4
296 mtspr SPRN_IBAT6L,r4
297 mtspr SPRN_IBAT7U,r4
298 mtspr SPRN_IBAT7L,r4
299END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
300
301 /* Flush all TLBs */
302 lis r4,0x1000
3031: addic. r4,r4,-0x1000
304 tlbie r4
305 blt 1b
306 sync
307
308 /* restore the MSR and turn on the MMU */
309 lwz r3,SL_MSR(r11)
310 bl turn_on_mmu
311 tovirt(r11,r11)
312
313 /* Restore TB */
314 li r3,0
315 mttbl r3
316 lwz r3,SL_TB(r11)
317 lwz r4,SL_TB+4(r11)
318 mttbu r3
319 mttbl r4
320
321 /* Kick decrementer */
322 li r0,1
323 mtdec r0
324
325 /* Restore the callee-saved registers and return */
326 lwz r0,SL_CR(r11)
327 mtcr r0
328 lwz r2,SL_R2(r11)
329 lmw r12,SL_R12(r11)
330 lwz r1,SL_SP(r11)
331 lwz r0,SL_LR(r11)
332 mtlr r0
333
334 // XXX Note: we don't really need to call swsusp_resume
335
336 li r3,0
337 blr
338
339/* FIXME:This construct is actually not useful since we don't shut
340 * down the instruction MMU, we could just flip back MSR-DR on.
341 */
342turn_on_mmu:
343 mflr r4
344 mtsrr0 r4
345 mtsrr1 r3
346 sync
347 isync
348 rfi
349
diff --git a/arch/ppc/kernel/temp.c b/arch/ppc/kernel/temp.c
deleted file mode 100644
index 26bd8ea35a4e..000000000000
--- a/arch/ppc/kernel/temp.c
+++ /dev/null
@@ -1,271 +0,0 @@
1/*
2 * temp.c Thermal management for cpu's with Thermal Assist Units
3 *
4 * Written by Troy Benjegerdes <hozer@drgw.net>
5 *
6 * TODO:
7 * dynamic power management to limit peak CPU temp (using ICTC)
8 * calibration???
9 *
10 * Silly, crazy ideas: use cpu load (from scheduler) and ICTC to extend battery
11 * life in portables, and add a 'performance/watt' metric somewhere in /proc
12 */
13
14#include <linux/config.h>
15#include <linux/errno.h>
16#include <linux/jiffies.h>
17#include <linux/kernel.h>
18#include <linux/param.h>
19#include <linux/string.h>
20#include <linux/mm.h>
21#include <linux/interrupt.h>
22#include <linux/init.h>
23
24#include <asm/io.h>
25#include <asm/reg.h>
26#include <asm/nvram.h>
27#include <asm/cache.h>
28#include <asm/8xx_immap.h>
29#include <asm/machdep.h>
30
31static struct tau_temp
32{
33 int interrupts;
34 unsigned char low;
35 unsigned char high;
36 unsigned char grew;
37} tau[NR_CPUS];
38
39struct timer_list tau_timer;
40
41#undef DEBUG
42
43/* TODO: put these in a /proc interface, with some sanity checks, and maybe
44 * dynamic adjustment to minimize # of interrupts */
45/* configurable values for step size and how much to expand the window when
46 * we get an interrupt. These are based on the limit that was out of range */
47#define step_size 2 /* step size when temp goes out of range */
48#define window_expand 1 /* expand the window by this much */
49/* configurable values for shrinking the window */
50#define shrink_timer 2*HZ /* period between shrinking the window */
51#define min_window 2 /* minimum window size, degrees C */
52
53void set_thresholds(unsigned long cpu)
54{
55#ifdef CONFIG_TAU_INT
56 /*
57 * setup THRM1,
58 * threshold, valid bit, enable interrupts, interrupt when below threshold
59 */
60 mtspr(SPRN_THRM1, THRM1_THRES(tau[cpu].low) | THRM1_V | THRM1_TIE | THRM1_TID);
61
62 /* setup THRM2,
63 * threshold, valid bit, enable interrupts, interrupt when above threshhold
64 */
65 mtspr (SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V | THRM1_TIE);
66#else
67 /* same thing but don't enable interrupts */
68 mtspr(SPRN_THRM1, THRM1_THRES(tau[cpu].low) | THRM1_V | THRM1_TID);
69 mtspr(SPRN_THRM2, THRM1_THRES(tau[cpu].high) | THRM1_V);
70#endif
71}
72
73void TAUupdate(int cpu)
74{
75 unsigned thrm;
76
77#ifdef DEBUG
78 printk("TAUupdate ");
79#endif
80
81 /* if both thresholds are crossed, the step_sizes cancel out
82 * and the window winds up getting expanded twice. */
83 if((thrm = mfspr(SPRN_THRM1)) & THRM1_TIV){ /* is valid? */
84 if(thrm & THRM1_TIN){ /* crossed low threshold */
85 if (tau[cpu].low >= step_size){
86 tau[cpu].low -= step_size;
87 tau[cpu].high -= (step_size - window_expand);
88 }
89 tau[cpu].grew = 1;
90#ifdef DEBUG
91 printk("low threshold crossed ");
92#endif
93 }
94 }
95 if((thrm = mfspr(SPRN_THRM2)) & THRM1_TIV){ /* is valid? */
96 if(thrm & THRM1_TIN){ /* crossed high threshold */
97 if (tau[cpu].high <= 127-step_size){
98 tau[cpu].low += (step_size - window_expand);
99 tau[cpu].high += step_size;
100 }
101 tau[cpu].grew = 1;
102#ifdef DEBUG
103 printk("high threshold crossed ");
104#endif
105 }
106 }
107
108#ifdef DEBUG
109 printk("grew = %d\n", tau[cpu].grew);
110#endif
111
112#ifndef CONFIG_TAU_INT /* tau_timeout will do this if not using interrupts */
113 set_thresholds(cpu);
114#endif
115
116}
117
118#ifdef CONFIG_TAU_INT
119/*
120 * TAU interrupts - called when we have a thermal assist unit interrupt
121 * with interrupts disabled
122 */
123
124void TAUException(struct pt_regs * regs)
125{
126 int cpu = smp_processor_id();
127
128 irq_enter();
129 tau[cpu].interrupts++;
130
131 TAUupdate(cpu);
132
133 irq_exit();
134}
135#endif /* CONFIG_TAU_INT */
136
137static void tau_timeout(void * info)
138{
139 int cpu;
140 unsigned long flags;
141 int size;
142 int shrink;
143
144 /* disabling interrupts *should* be okay */
145 local_irq_save(flags);
146 cpu = smp_processor_id();
147
148#ifndef CONFIG_TAU_INT
149 TAUupdate(cpu);
150#endif
151
152 size = tau[cpu].high - tau[cpu].low;
153 if (size > min_window && ! tau[cpu].grew) {
154 /* do an exponential shrink of half the amount currently over size */
155 shrink = (2 + size - min_window) / 4;
156 if (shrink) {
157 tau[cpu].low += shrink;
158 tau[cpu].high -= shrink;
159 } else { /* size must have been min_window + 1 */
160 tau[cpu].low += 1;
161#if 1 /* debug */
162 if ((tau[cpu].high - tau[cpu].low) != min_window){
163 printk(KERN_ERR "temp.c: line %d, logic error\n", __LINE__);
164 }
165#endif
166 }
167 }
168
169 tau[cpu].grew = 0;
170
171 set_thresholds(cpu);
172
173 /*
174 * Do the enable every time, since otherwise a bunch of (relatively)
175 * complex sleep code needs to be added. One mtspr every time
176 * tau_timeout is called is probably not a big deal.
177 *
178 * Enable thermal sensor and set up sample interval timer
179 * need 20 us to do the compare.. until a nice 'cpu_speed' function
180 * call is implemented, just assume a 500 mhz clock. It doesn't really
181 * matter if we take too long for a compare since it's all interrupt
182 * driven anyway.
183 *
184 * use a extra long time.. (60 us @ 500 mhz)
185 */
186 mtspr(SPRN_THRM3, THRM3_SITV(500*60) | THRM3_E);
187
188 local_irq_restore(flags);
189}
190
191static void tau_timeout_smp(unsigned long unused)
192{
193
194 /* schedule ourselves to be run again */
195 mod_timer(&tau_timer, jiffies + shrink_timer) ;
196 on_each_cpu(tau_timeout, NULL, 1, 0);
197}
198
199/*
200 * setup the TAU
201 *
202 * Set things up to use THRM1 as a temperature lower bound, and THRM2 as an upper bound.
203 * Start off at zero
204 */
205
206int tau_initialized = 0;
207
208void __init TAU_init_smp(void * info)
209{
210 unsigned long cpu = smp_processor_id();
211
212 /* set these to a reasonable value and let the timer shrink the
213 * window */
214 tau[cpu].low = 5;
215 tau[cpu].high = 120;
216
217 set_thresholds(cpu);
218}
219
220int __init TAU_init(void)
221{
222 /* We assume in SMP that if one CPU has TAU support, they
223 * all have it --BenH
224 */
225 if (!cpu_has_feature(CPU_FTR_TAU)) {
226 printk("Thermal assist unit not available\n");
227 tau_initialized = 0;
228 return 1;
229 }
230
231
232 /* first, set up the window shrinking timer */
233 init_timer(&tau_timer);
234 tau_timer.function = tau_timeout_smp;
235 tau_timer.expires = jiffies + shrink_timer;
236 add_timer(&tau_timer);
237
238 on_each_cpu(TAU_init_smp, NULL, 1, 0);
239
240 printk("Thermal assist unit ");
241#ifdef CONFIG_TAU_INT
242 printk("using interrupts, ");
243#else
244 printk("using timers, ");
245#endif
246 printk("shrink_timer: %d jiffies\n", shrink_timer);
247 tau_initialized = 1;
248
249 return 0;
250}
251
252__initcall(TAU_init);
253
254/*
255 * return current temp
256 */
257
258u32 cpu_temp_both(unsigned long cpu)
259{
260 return ((tau[cpu].high << 16) | tau[cpu].low);
261}
262
263int cpu_temp(unsigned long cpu)
264{
265 return ((tau[cpu].high + tau[cpu].low) / 2);
266}
267
268int tau_interrupts(unsigned long cpu)
269{
270 return (tau[cpu].interrupts);
271}
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index 6d0a1838d94c..1c0d68026abd 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/traps.c
3 *
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * 3 *
6 * This program is free software; you can redistribute it and/or 4 * This program is free software; you can redistribute it and/or
diff --git a/arch/ppc/lib/rheap.c b/arch/ppc/lib/rheap.c
index 42c5de2c898f..31e511856dc5 100644
--- a/arch/ppc/lib/rheap.c
+++ b/arch/ppc/lib/rheap.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/rheap.c
3 *
4 * A Remote Heap. Remote means that we don't touch the memory that the 2 * A Remote Heap. Remote means that we don't touch the memory that the
5 * heap points to. Normal heap implementations use the memory they manage 3 * heap points to. Normal heap implementations use the memory they manage
6 * to place their list. We cannot do that because the memory we manage may 4 * to place their list. We cannot do that because the memory we manage may
diff --git a/arch/ppc/lib/strcase.c b/arch/ppc/lib/strcase.c
index 36b521091bbc..3b0094cc2b52 100644
--- a/arch/ppc/lib/strcase.c
+++ b/arch/ppc/lib/strcase.c
@@ -1,4 +1,5 @@
1#include <linux/ctype.h> 1#include <linux/ctype.h>
2#include <linux/types.h>
2 3
3int strcasecmp(const char *s1, const char *s2) 4int strcasecmp(const char *s1, const char *s2)
4{ 5{
@@ -11,7 +12,7 @@ int strcasecmp(const char *s1, const char *s2)
11 return c1 - c2; 12 return c1 - c2;
12} 13}
13 14
14int strncasecmp(const char *s1, const char *s2, int n) 15int strncasecmp(const char *s1, const char *s2, size_t n)
15{ 16{
16 int c1, c2; 17 int c1, c2;
17 18
diff --git a/arch/ppc/math-emu/Makefile b/arch/ppc/math-emu/Makefile
deleted file mode 100644
index 754143e8936b..000000000000
--- a/arch/ppc/math-emu/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
1
2obj-y := math.o fmr.o lfd.o stfd.o
3
4obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
5 fctiw.o fctiwz.o fdiv.o fdivs.o \
6 fmadd.o fmadds.o fmsub.o fmsubs.o \
7 fmul.o fmuls.o fnabs.o fneg.o types.o \
8 fnmadd.o fnmadds.o fnmsub.o fnmsubs.o \
9 fres.o frsp.o frsqrte.o fsel.o lfs.o \
10 fsqrt.o fsqrts.o fsub.o fsubs.o \
11 mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
12 mtfsf.o mtfsfi.o stfiwx.o stfs.o \
13 udivmodti4.o
diff --git a/arch/ppc/math-emu/double.h b/arch/ppc/math-emu/double.h
deleted file mode 100644
index ffba8b67f059..000000000000
--- a/arch/ppc/math-emu/double.h
+++ /dev/null
@@ -1,129 +0,0 @@
1/*
2 * Definitions for IEEE Double Precision
3 */
4
5#if _FP_W_TYPE_SIZE < 32
6#error "Here's a nickel kid. Go buy yourself a real computer."
7#endif
8
9#if _FP_W_TYPE_SIZE < 64
10#define _FP_FRACTBITS_D (2 * _FP_W_TYPE_SIZE)
11#else
12#define _FP_FRACTBITS_D _FP_W_TYPE_SIZE
13#endif
14
15#define _FP_FRACBITS_D 53
16#define _FP_FRACXBITS_D (_FP_FRACTBITS_D - _FP_FRACBITS_D)
17#define _FP_WFRACBITS_D (_FP_WORKBITS + _FP_FRACBITS_D)
18#define _FP_WFRACXBITS_D (_FP_FRACTBITS_D - _FP_WFRACBITS_D)
19#define _FP_EXPBITS_D 11
20#define _FP_EXPBIAS_D 1023
21#define _FP_EXPMAX_D 2047
22
23#define _FP_QNANBIT_D \
24 ((_FP_W_TYPE)1 << ((_FP_FRACBITS_D-2) % _FP_W_TYPE_SIZE))
25#define _FP_IMPLBIT_D \
26 ((_FP_W_TYPE)1 << ((_FP_FRACBITS_D-1) % _FP_W_TYPE_SIZE))
27#define _FP_OVERFLOW_D \
28 ((_FP_W_TYPE)1 << (_FP_WFRACBITS_D % _FP_W_TYPE_SIZE))
29
30#if _FP_W_TYPE_SIZE < 64
31
32union _FP_UNION_D
33{
34 double flt;
35 struct {
36#if __BYTE_ORDER == __BIG_ENDIAN
37 unsigned sign : 1;
38 unsigned exp : _FP_EXPBITS_D;
39 unsigned frac1 : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0) - _FP_W_TYPE_SIZE;
40 unsigned frac0 : _FP_W_TYPE_SIZE;
41#else
42 unsigned frac0 : _FP_W_TYPE_SIZE;
43 unsigned frac1 : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0) - _FP_W_TYPE_SIZE;
44 unsigned exp : _FP_EXPBITS_D;
45 unsigned sign : 1;
46#endif
47 } bits __attribute__((packed));
48};
49
50#define FP_DECL_D(X) _FP_DECL(2,X)
51#define FP_UNPACK_RAW_D(X,val) _FP_UNPACK_RAW_2(D,X,val)
52#define FP_PACK_RAW_D(val,X) _FP_PACK_RAW_2(D,val,X)
53
54#define FP_UNPACK_D(X,val) \
55 do { \
56 _FP_UNPACK_RAW_2(D,X,val); \
57 _FP_UNPACK_CANONICAL(D,2,X); \
58 } while (0)
59
60#define FP_PACK_D(val,X) \
61 do { \
62 _FP_PACK_CANONICAL(D,2,X); \
63 _FP_PACK_RAW_2(D,val,X); \
64 } while (0)
65
66#define FP_NEG_D(R,X) _FP_NEG(D,2,R,X)
67#define FP_ADD_D(R,X,Y) _FP_ADD(D,2,R,X,Y)
68#define FP_SUB_D(R,X,Y) _FP_SUB(D,2,R,X,Y)
69#define FP_MUL_D(R,X,Y) _FP_MUL(D,2,R,X,Y)
70#define FP_DIV_D(R,X,Y) _FP_DIV(D,2,R,X,Y)
71#define FP_SQRT_D(R,X) _FP_SQRT(D,2,R,X)
72
73#define FP_CMP_D(r,X,Y,un) _FP_CMP(D,2,r,X,Y,un)
74#define FP_CMP_EQ_D(r,X,Y) _FP_CMP_EQ(D,2,r,X,Y)
75
76#define FP_TO_INT_D(r,X,rsz,rsg) _FP_TO_INT(D,2,r,X,rsz,rsg)
77#define FP_FROM_INT_D(X,r,rs,rt) _FP_FROM_INT(D,2,X,r,rs,rt)
78
79#else
80
81union _FP_UNION_D
82{
83 double flt;
84 struct {
85#if __BYTE_ORDER == __BIG_ENDIAN
86 unsigned sign : 1;
87 unsigned exp : _FP_EXPBITS_D;
88 unsigned long frac : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0);
89#else
90 unsigned long frac : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0);
91 unsigned exp : _FP_EXPBITS_D;
92 unsigned sign : 1;
93#endif
94 } bits __attribute__((packed));
95};
96
97#define FP_DECL_D(X) _FP_DECL(1,X)
98#define FP_UNPACK_RAW_D(X,val) _FP_UNPACK_RAW_1(D,X,val)
99#define FP_PACK_RAW_D(val,X) _FP_PACK_RAW_1(D,val,X)
100
101#define FP_UNPACK_D(X,val) \
102 do { \
103 _FP_UNPACK_RAW_1(D,X,val); \
104 _FP_UNPACK_CANONICAL(D,1,X); \
105 } while (0)
106
107#define FP_PACK_D(val,X) \
108 do { \
109 _FP_PACK_CANONICAL(D,1,X); \
110 _FP_PACK_RAW_1(D,val,X); \
111 } while (0)
112
113#define FP_NEG_D(R,X) _FP_NEG(D,1,R,X)
114#define FP_ADD_D(R,X,Y) _FP_ADD(D,1,R,X,Y)
115#define FP_SUB_D(R,X,Y) _FP_SUB(D,1,R,X,Y)
116#define FP_MUL_D(R,X,Y) _FP_MUL(D,1,R,X,Y)
117#define FP_DIV_D(R,X,Y) _FP_DIV(D,1,R,X,Y)
118#define FP_SQRT_D(R,X) _FP_SQRT(D,1,R,X)
119
120/* The implementation of _FP_MUL_D and _FP_DIV_D should be chosen by
121 the target machine. */
122
123#define FP_CMP_D(r,X,Y,un) _FP_CMP(D,1,r,X,Y,un)
124#define FP_CMP_EQ_D(r,X,Y) _FP_CMP_EQ(D,1,r,X,Y)
125
126#define FP_TO_INT_D(r,X,rsz,rsg) _FP_TO_INT(D,1,r,X,rsz,rsg)
127#define FP_FROM_INT_D(X,r,rs,rt) _FP_FROM_INT(D,1,X,r,rs,rt)
128
129#endif /* W_TYPE_SIZE < 64 */
diff --git a/arch/ppc/math-emu/fabs.c b/arch/ppc/math-emu/fabs.c
deleted file mode 100644
index 41f0617f3d3a..000000000000
--- a/arch/ppc/math-emu/fabs.c
+++ /dev/null
@@ -1,18 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5int
6fabs(u32 *frD, u32 *frB)
7{
8 frD[0] = frB[0] & 0x7fffffff;
9 frD[1] = frB[1];
10
11#ifdef DEBUG
12 printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
13 dump_double(frD);
14 printk("\n");
15#endif
16
17 return 0;
18}
diff --git a/arch/ppc/math-emu/fadd.c b/arch/ppc/math-emu/fadd.c
deleted file mode 100644
index fc8836488b64..000000000000
--- a/arch/ppc/math-emu/fadd.c
+++ /dev/null
@@ -1,38 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fadd(void *frD, void *frA, void *frB)
10{
11 FP_DECL_D(A);
12 FP_DECL_D(B);
13 FP_DECL_D(R);
14 int ret = 0;
15
16#ifdef DEBUG
17 printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
18#endif
19
20 __FP_UNPACK_D(A, frA);
21 __FP_UNPACK_D(B, frB);
22
23#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
25 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
26#endif
27
28 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
29 ret |= EFLAG_VXISI;
30
31 FP_ADD_D(R, A, B);
32
33#ifdef DEBUG
34 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
35#endif
36
37 return (ret | __FP_PACK_D(frD, R));
38}
diff --git a/arch/ppc/math-emu/fadds.c b/arch/ppc/math-emu/fadds.c
deleted file mode 100644
index 93025b6c8f3c..000000000000
--- a/arch/ppc/math-emu/fadds.c
+++ /dev/null
@@ -1,39 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10fadds(void *frD, void *frA, void *frB)
11{
12 FP_DECL_D(A);
13 FP_DECL_D(B);
14 FP_DECL_D(R);
15 int ret = 0;
16
17#ifdef DEBUG
18 printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
19#endif
20
21 __FP_UNPACK_D(A, frA);
22 __FP_UNPACK_D(B, frB);
23
24#ifdef DEBUG
25 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
26 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
27#endif
28
29 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
30 ret |= EFLAG_VXISI;
31
32 FP_ADD_D(R, A, B);
33
34#ifdef DEBUG
35 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
36#endif
37
38 return (ret | __FP_PACK_DS(frD, R));
39}
diff --git a/arch/ppc/math-emu/fcmpo.c b/arch/ppc/math-emu/fcmpo.c
deleted file mode 100644
index 4efac394b4cb..000000000000
--- a/arch/ppc/math-emu/fcmpo.c
+++ /dev/null
@@ -1,46 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fcmpo(u32 *ccr, int crfD, void *frA, void *frB)
10{
11 FP_DECL_D(A);
12 FP_DECL_D(B);
13 int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) };
14 long cmp;
15 int ret = 0;
16
17#ifdef DEBUG
18 printk("%s: %p (%08x) %d %p %p\n", __FUNCTION__, ccr, *ccr, crfD, frA, frB);
19#endif
20
21 __FP_UNPACK_D(A, frA);
22 __FP_UNPACK_D(B, frB);
23
24#ifdef DEBUG
25 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
26 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
27#endif
28
29 if (A_c == FP_CLS_NAN || B_c == FP_CLS_NAN)
30 ret |= EFLAG_VXVC;
31
32 FP_CMP_D(cmp, A, B, 2);
33 cmp = code[(cmp + 1) & 3];
34
35 __FPU_FPSCR &= ~(0x1f000);
36 __FPU_FPSCR |= (cmp << 12);
37
38 *ccr &= ~(15 << ((7 - crfD) << 2));
39 *ccr |= (cmp << ((7 - crfD) << 2));
40
41#ifdef DEBUG
42 printk("CR: %08x\n", *ccr);
43#endif
44
45 return ret;
46}
diff --git a/arch/ppc/math-emu/fcmpu.c b/arch/ppc/math-emu/fcmpu.c
deleted file mode 100644
index b7e33176e618..000000000000
--- a/arch/ppc/math-emu/fcmpu.c
+++ /dev/null
@@ -1,42 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fcmpu(u32 *ccr, int crfD, void *frA, void *frB)
10{
11 FP_DECL_D(A);
12 FP_DECL_D(B);
13 int code[4] = { (1 << 3), (1 << 1), (1 << 2), (1 << 0) };
14 long cmp;
15
16#ifdef DEBUG
17 printk("%s: %p (%08x) %d %p %p\n", __FUNCTION__, ccr, *ccr, crfD, frA, frB);
18#endif
19
20 __FP_UNPACK_D(A, frA);
21 __FP_UNPACK_D(B, frB);
22
23#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
25 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
26#endif
27
28 FP_CMP_D(cmp, A, B, 2);
29 cmp = code[(cmp + 1) & 3];
30
31 __FPU_FPSCR &= ~(0x1f000);
32 __FPU_FPSCR |= (cmp << 12);
33
34 *ccr &= ~(15 << ((7 - crfD) << 2));
35 *ccr |= (cmp << ((7 - crfD) << 2));
36
37#ifdef DEBUG
38 printk("CR: %08x\n", *ccr);
39#endif
40
41 return 0;
42}
diff --git a/arch/ppc/math-emu/fctiw.c b/arch/ppc/math-emu/fctiw.c
deleted file mode 100644
index 3b3c98b840cf..000000000000
--- a/arch/ppc/math-emu/fctiw.c
+++ /dev/null
@@ -1,25 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fctiw(u32 *frD, void *frB)
10{
11 FP_DECL_D(B);
12 unsigned int r;
13
14 __FP_UNPACK_D(B, frB);
15 FP_TO_INT_D(r, B, 32, 1);
16 frD[1] = r;
17
18#ifdef DEBUG
19 printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
20 dump_double(frD);
21 printk("\n");
22#endif
23
24 return 0;
25}
diff --git a/arch/ppc/math-emu/fctiwz.c b/arch/ppc/math-emu/fctiwz.c
deleted file mode 100644
index 7717eb6fcfb6..000000000000
--- a/arch/ppc/math-emu/fctiwz.c
+++ /dev/null
@@ -1,32 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fctiwz(u32 *frD, void *frB)
10{
11 FP_DECL_D(B);
12 u32 fpscr;
13 unsigned int r;
14
15 fpscr = __FPU_FPSCR;
16 __FPU_FPSCR &= ~(3);
17 __FPU_FPSCR |= FP_RND_ZERO;
18
19 __FP_UNPACK_D(B, frB);
20 FP_TO_INT_D(r, B, 32, 1);
21 frD[1] = r;
22
23 __FPU_FPSCR = fpscr;
24
25#ifdef DEBUG
26 printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
27 dump_double(frD);
28 printk("\n");
29#endif
30
31 return 0;
32}
diff --git a/arch/ppc/math-emu/fdiv.c b/arch/ppc/math-emu/fdiv.c
deleted file mode 100644
index f2fba825b2d0..000000000000
--- a/arch/ppc/math-emu/fdiv.c
+++ /dev/null
@@ -1,53 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fdiv(void *frD, void *frA, void *frB)
10{
11 FP_DECL_D(A);
12 FP_DECL_D(B);
13 FP_DECL_D(R);
14 int ret = 0;
15
16#ifdef DEBUG
17 printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
18#endif
19
20 __FP_UNPACK_D(A, frA);
21 __FP_UNPACK_D(B, frB);
22
23#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
25 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
26#endif
27
28 if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) {
29 ret |= EFLAG_VXZDZ;
30#ifdef DEBUG
31 printk("%s: FPSCR_VXZDZ raised\n", __FUNCTION__);
32#endif
33 }
34 if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) {
35 ret |= EFLAG_VXIDI;
36#ifdef DEBUG
37 printk("%s: FPSCR_VXIDI raised\n", __FUNCTION__);
38#endif
39 }
40
41 if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) {
42 ret |= EFLAG_DIVZERO;
43 if (__FPU_TRAP_P(EFLAG_DIVZERO))
44 return ret;
45 }
46 FP_DIV_D(R, A, B);
47
48#ifdef DEBUG
49 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
50#endif
51
52 return (ret | __FP_PACK_D(frD, R));
53}
diff --git a/arch/ppc/math-emu/fdivs.c b/arch/ppc/math-emu/fdivs.c
deleted file mode 100644
index b971196e3175..000000000000
--- a/arch/ppc/math-emu/fdivs.c
+++ /dev/null
@@ -1,55 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10fdivs(void *frD, void *frA, void *frB)
11{
12 FP_DECL_D(A);
13 FP_DECL_D(B);
14 FP_DECL_D(R);
15 int ret = 0;
16
17#ifdef DEBUG
18 printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
19#endif
20
21 __FP_UNPACK_D(A, frA);
22 __FP_UNPACK_D(B, frB);
23
24#ifdef DEBUG
25 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
26 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
27#endif
28
29 if (A_c == FP_CLS_ZERO && B_c == FP_CLS_ZERO) {
30 ret |= EFLAG_VXZDZ;
31#ifdef DEBUG
32 printk("%s: FPSCR_VXZDZ raised\n", __FUNCTION__);
33#endif
34 }
35 if (A_c == FP_CLS_INF && B_c == FP_CLS_INF) {
36 ret |= EFLAG_VXIDI;
37#ifdef DEBUG
38 printk("%s: FPSCR_VXIDI raised\n", __FUNCTION__);
39#endif
40 }
41
42 if (B_c == FP_CLS_ZERO && A_c != FP_CLS_ZERO) {
43 ret |= EFLAG_DIVZERO;
44 if (__FPU_TRAP_P(EFLAG_DIVZERO))
45 return ret;
46 }
47
48 FP_DIV_D(R, A, B);
49
50#ifdef DEBUG
51 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
52#endif
53
54 return (ret | __FP_PACK_DS(frD, R));
55}
diff --git a/arch/ppc/math-emu/fmadd.c b/arch/ppc/math-emu/fmadd.c
deleted file mode 100644
index 0a1dbce793e9..000000000000
--- a/arch/ppc/math-emu/fmadd.c
+++ /dev/null
@@ -1,48 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fmadd(void *frD, void *frA, void *frB, void *frC)
10{
11 FP_DECL_D(R);
12 FP_DECL_D(A);
13 FP_DECL_D(B);
14 FP_DECL_D(C);
15 FP_DECL_D(T);
16 int ret = 0;
17
18#ifdef DEBUG
19 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
20#endif
21
22 __FP_UNPACK_D(A, frA);
23 __FP_UNPACK_D(B, frB);
24 __FP_UNPACK_D(C, frC);
25
26#ifdef DEBUG
27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
28 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
29 printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
30#endif
31
32 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
33 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
34 ret |= EFLAG_VXIMZ;
35
36 FP_MUL_D(T, A, C);
37
38 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
39 ret |= EFLAG_VXISI;
40
41 FP_ADD_D(R, T, B);
42
43#ifdef DEBUG
44 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
45#endif
46
47 return (ret | __FP_PACK_D(frD, R));
48}
diff --git a/arch/ppc/math-emu/fmadds.c b/arch/ppc/math-emu/fmadds.c
deleted file mode 100644
index 0f70bba9445e..000000000000
--- a/arch/ppc/math-emu/fmadds.c
+++ /dev/null
@@ -1,49 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10fmadds(void *frD, void *frA, void *frB, void *frC)
11{
12 FP_DECL_D(R);
13 FP_DECL_D(A);
14 FP_DECL_D(B);
15 FP_DECL_D(C);
16 FP_DECL_D(T);
17 int ret = 0;
18
19#ifdef DEBUG
20 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
21#endif
22
23 __FP_UNPACK_D(A, frA);
24 __FP_UNPACK_D(B, frB);
25 __FP_UNPACK_D(C, frC);
26
27#ifdef DEBUG
28 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
29 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
30 printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
31#endif
32
33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
35 ret |= EFLAG_VXIMZ;
36
37 FP_MUL_D(T, A, C);
38
39 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
40 ret |= EFLAG_VXISI;
41
42 FP_ADD_D(R, T, B);
43
44#ifdef DEBUG
45 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
46#endif
47
48 return (ret | __FP_PACK_DS(frD, R));
49}
diff --git a/arch/ppc/math-emu/fmr.c b/arch/ppc/math-emu/fmr.c
deleted file mode 100644
index 28df700c0c7e..000000000000
--- a/arch/ppc/math-emu/fmr.c
+++ /dev/null
@@ -1,18 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5int
6fmr(u32 *frD, u32 *frB)
7{
8 frD[0] = frB[0];
9 frD[1] = frB[1];
10
11#ifdef DEBUG
12 printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
13 dump_double(frD);
14 printk("\n");
15#endif
16
17 return 0;
18}
diff --git a/arch/ppc/math-emu/fmsub.c b/arch/ppc/math-emu/fmsub.c
deleted file mode 100644
index 203fd48a6fec..000000000000
--- a/arch/ppc/math-emu/fmsub.c
+++ /dev/null
@@ -1,51 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fmsub(void *frD, void *frA, void *frB, void *frC)
10{
11 FP_DECL_D(R);
12 FP_DECL_D(A);
13 FP_DECL_D(B);
14 FP_DECL_D(C);
15 FP_DECL_D(T);
16 int ret = 0;
17
18#ifdef DEBUG
19 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
20#endif
21
22 __FP_UNPACK_D(A, frA);
23 __FP_UNPACK_D(B, frB);
24 __FP_UNPACK_D(C, frC);
25
26#ifdef DEBUG
27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
28 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
29 printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
30#endif
31
32 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
33 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
34 ret |= EFLAG_VXIMZ;
35
36 FP_MUL_D(T, A, C);
37
38 if (B_c != FP_CLS_NAN)
39 B_s ^= 1;
40
41 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
42 ret |= EFLAG_VXISI;
43
44 FP_ADD_D(R, T, B);
45
46#ifdef DEBUG
47 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
48#endif
49
50 return (ret | __FP_PACK_D(frD, R));
51}
diff --git a/arch/ppc/math-emu/fmsubs.c b/arch/ppc/math-emu/fmsubs.c
deleted file mode 100644
index 8ce68624c189..000000000000
--- a/arch/ppc/math-emu/fmsubs.c
+++ /dev/null
@@ -1,52 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10fmsubs(void *frD, void *frA, void *frB, void *frC)
11{
12 FP_DECL_D(R);
13 FP_DECL_D(A);
14 FP_DECL_D(B);
15 FP_DECL_D(C);
16 FP_DECL_D(T);
17 int ret = 0;
18
19#ifdef DEBUG
20 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
21#endif
22
23 __FP_UNPACK_D(A, frA);
24 __FP_UNPACK_D(B, frB);
25 __FP_UNPACK_D(C, frC);
26
27#ifdef DEBUG
28 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
29 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
30 printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
31#endif
32
33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
35 ret |= EFLAG_VXIMZ;
36
37 FP_MUL_D(T, A, C);
38
39 if (B_c != FP_CLS_NAN)
40 B_s ^= 1;
41
42 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
43 ret |= EFLAG_VXISI;
44
45 FP_ADD_D(R, T, B);
46
47#ifdef DEBUG
48 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
49#endif
50
51 return (ret | __FP_PACK_DS(frD, R));
52}
diff --git a/arch/ppc/math-emu/fmul.c b/arch/ppc/math-emu/fmul.c
deleted file mode 100644
index 66c7e79aae2e..000000000000
--- a/arch/ppc/math-emu/fmul.c
+++ /dev/null
@@ -1,42 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fmul(void *frD, void *frA, void *frB)
10{
11 FP_DECL_D(A);
12 FP_DECL_D(B);
13 FP_DECL_D(R);
14 int ret = 0;
15
16#ifdef DEBUG
17 printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
18#endif
19
20 __FP_UNPACK_D(A, frA);
21 __FP_UNPACK_D(B, frB);
22
23#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
25 A_s, A_f1, A_f0, A_e, A_c, A_f1, A_f0, A_e + 1023);
26 printk("B: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
27 B_s, B_f1, B_f0, B_e, B_c, B_f1, B_f0, B_e + 1023);
28#endif
29
30 if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) ||
31 (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF))
32 ret |= EFLAG_VXIMZ;
33
34 FP_MUL_D(R, A, B);
35
36#ifdef DEBUG
37 printk("D: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
38 R_s, R_f1, R_f0, R_e, R_c, R_f1, R_f0, R_e + 1023);
39#endif
40
41 return (ret | __FP_PACK_D(frD, R));
42}
diff --git a/arch/ppc/math-emu/fmuls.c b/arch/ppc/math-emu/fmuls.c
deleted file mode 100644
index 26bc4278271c..000000000000
--- a/arch/ppc/math-emu/fmuls.c
+++ /dev/null
@@ -1,43 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10fmuls(void *frD, void *frA, void *frB)
11{
12 FP_DECL_D(A);
13 FP_DECL_D(B);
14 FP_DECL_D(R);
15 int ret = 0;
16
17#ifdef DEBUG
18 printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
19#endif
20
21 __FP_UNPACK_D(A, frA);
22 __FP_UNPACK_D(B, frB);
23
24#ifdef DEBUG
25 printk("A: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
26 A_s, A_f1, A_f0, A_e, A_c, A_f1, A_f0, A_e + 1023);
27 printk("B: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
28 B_s, B_f1, B_f0, B_e, B_c, B_f1, B_f0, B_e + 1023);
29#endif
30
31 if ((A_c == FP_CLS_INF && B_c == FP_CLS_ZERO) ||
32 (A_c == FP_CLS_ZERO && B_c == FP_CLS_INF))
33 ret |= EFLAG_VXIMZ;
34
35 FP_MUL_D(R, A, B);
36
37#ifdef DEBUG
38 printk("D: %ld %lu %lu %ld (%ld) [%08lx.%08lx %lx]\n",
39 R_s, R_f1, R_f0, R_e, R_c, R_f1, R_f0, R_e + 1023);
40#endif
41
42 return (ret | __FP_PACK_DS(frD, R));
43}
diff --git a/arch/ppc/math-emu/fnabs.c b/arch/ppc/math-emu/fnabs.c
deleted file mode 100644
index c6b913d179e0..000000000000
--- a/arch/ppc/math-emu/fnabs.c
+++ /dev/null
@@ -1,18 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5int
6fnabs(u32 *frD, u32 *frB)
7{
8 frD[0] = frB[0] | 0x80000000;
9 frD[1] = frB[1];
10
11#ifdef DEBUG
12 printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
13 dump_double(frD);
14 printk("\n");
15#endif
16
17 return 0;
18}
diff --git a/arch/ppc/math-emu/fneg.c b/arch/ppc/math-emu/fneg.c
deleted file mode 100644
index fe9a98deff69..000000000000
--- a/arch/ppc/math-emu/fneg.c
+++ /dev/null
@@ -1,18 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5int
6fneg(u32 *frD, u32 *frB)
7{
8 frD[0] = frB[0] ^ 0x80000000;
9 frD[1] = frB[1];
10
11#ifdef DEBUG
12 printk("%s: D %p, B %p: ", __FUNCTION__, frD, frB);
13 dump_double(frD);
14 printk("\n");
15#endif
16
17 return 0;
18}
diff --git a/arch/ppc/math-emu/fnmadd.c b/arch/ppc/math-emu/fnmadd.c
deleted file mode 100644
index 7f312276d920..000000000000
--- a/arch/ppc/math-emu/fnmadd.c
+++ /dev/null
@@ -1,51 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fnmadd(void *frD, void *frA, void *frB, void *frC)
10{
11 FP_DECL_D(R);
12 FP_DECL_D(A);
13 FP_DECL_D(B);
14 FP_DECL_D(C);
15 FP_DECL_D(T);
16 int ret = 0;
17
18#ifdef DEBUG
19 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
20#endif
21
22 __FP_UNPACK_D(A, frA);
23 __FP_UNPACK_D(B, frB);
24 __FP_UNPACK_D(C, frC);
25
26#ifdef DEBUG
27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
28 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
29 printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
30#endif
31
32 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
33 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
34 ret |= EFLAG_VXIMZ;
35
36 FP_MUL_D(T, A, C);
37
38 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
39 ret |= EFLAG_VXISI;
40
41 FP_ADD_D(R, T, B);
42
43 if (R_c != FP_CLS_NAN)
44 R_s ^= 1;
45
46#ifdef DEBUG
47 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
48#endif
49
50 return (ret | __FP_PACK_D(frD, R));
51}
diff --git a/arch/ppc/math-emu/fnmadds.c b/arch/ppc/math-emu/fnmadds.c
deleted file mode 100644
index 65454c9c70bc..000000000000
--- a/arch/ppc/math-emu/fnmadds.c
+++ /dev/null
@@ -1,52 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10fnmadds(void *frD, void *frA, void *frB, void *frC)
11{
12 FP_DECL_D(R);
13 FP_DECL_D(A);
14 FP_DECL_D(B);
15 FP_DECL_D(C);
16 FP_DECL_D(T);
17 int ret = 0;
18
19#ifdef DEBUG
20 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
21#endif
22
23 __FP_UNPACK_D(A, frA);
24 __FP_UNPACK_D(B, frB);
25 __FP_UNPACK_D(C, frC);
26
27#ifdef DEBUG
28 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
29 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
30 printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
31#endif
32
33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
35 ret |= EFLAG_VXIMZ;
36
37 FP_MUL_D(T, A, C);
38
39 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
40 ret |= EFLAG_VXISI;
41
42 FP_ADD_D(R, T, B);
43
44 if (R_c != FP_CLS_NAN)
45 R_s ^= 1;
46
47#ifdef DEBUG
48 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
49#endif
50
51 return (ret | __FP_PACK_DS(frD, R));
52}
diff --git a/arch/ppc/math-emu/fnmsub.c b/arch/ppc/math-emu/fnmsub.c
deleted file mode 100644
index f1ca7482b5f0..000000000000
--- a/arch/ppc/math-emu/fnmsub.c
+++ /dev/null
@@ -1,54 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fnmsub(void *frD, void *frA, void *frB, void *frC)
10{
11 FP_DECL_D(R);
12 FP_DECL_D(A);
13 FP_DECL_D(B);
14 FP_DECL_D(C);
15 FP_DECL_D(T);
16 int ret = 0;
17
18#ifdef DEBUG
19 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
20#endif
21
22 __FP_UNPACK_D(A, frA);
23 __FP_UNPACK_D(B, frB);
24 __FP_UNPACK_D(C, frC);
25
26#ifdef DEBUG
27 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
28 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
29 printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
30#endif
31
32 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
33 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
34 ret |= EFLAG_VXIMZ;
35
36 FP_MUL_D(T, A, C);
37
38 if (B_c != FP_CLS_NAN)
39 B_s ^= 1;
40
41 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
42 ret |= EFLAG_VXISI;
43
44 FP_ADD_D(R, T, B);
45
46 if (R_c != FP_CLS_NAN)
47 R_s ^= 1;
48
49#ifdef DEBUG
50 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
51#endif
52
53 return (ret | __FP_PACK_D(frD, R));
54}
diff --git a/arch/ppc/math-emu/fnmsubs.c b/arch/ppc/math-emu/fnmsubs.c
deleted file mode 100644
index 5c9a09a87dc7..000000000000
--- a/arch/ppc/math-emu/fnmsubs.c
+++ /dev/null
@@ -1,55 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10fnmsubs(void *frD, void *frA, void *frB, void *frC)
11{
12 FP_DECL_D(R);
13 FP_DECL_D(A);
14 FP_DECL_D(B);
15 FP_DECL_D(C);
16 FP_DECL_D(T);
17 int ret = 0;
18
19#ifdef DEBUG
20 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
21#endif
22
23 __FP_UNPACK_D(A, frA);
24 __FP_UNPACK_D(B, frB);
25 __FP_UNPACK_D(C, frC);
26
27#ifdef DEBUG
28 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
29 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
30 printk("C: %ld %lu %lu %ld (%ld)\n", C_s, C_f1, C_f0, C_e, C_c);
31#endif
32
33 if ((A_c == FP_CLS_INF && C_c == FP_CLS_ZERO) ||
34 (A_c == FP_CLS_ZERO && C_c == FP_CLS_INF))
35 ret |= EFLAG_VXIMZ;
36
37 FP_MUL_D(T, A, C);
38
39 if (B_c != FP_CLS_NAN)
40 B_s ^= 1;
41
42 if (T_s != B_s && T_c == FP_CLS_INF && B_c == FP_CLS_INF)
43 ret |= EFLAG_VXISI;
44
45 FP_ADD_D(R, T, B);
46
47 if (R_c != FP_CLS_NAN)
48 R_s ^= 1;
49
50#ifdef DEBUG
51 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
52#endif
53
54 return (ret | __FP_PACK_DS(frD, R));
55}
diff --git a/arch/ppc/math-emu/fres.c b/arch/ppc/math-emu/fres.c
deleted file mode 100644
index ec11e46d20af..000000000000
--- a/arch/ppc/math-emu/fres.c
+++ /dev/null
@@ -1,12 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5int
6fres(void *frD, void *frB)
7{
8#ifdef DEBUG
9 printk("%s: %p %p\n", __FUNCTION__, frD, frB);
10#endif
11 return -ENOSYS;
12}
diff --git a/arch/ppc/math-emu/frsp.c b/arch/ppc/math-emu/frsp.c
deleted file mode 100644
index d879b2a3d0c9..000000000000
--- a/arch/ppc/math-emu/frsp.c
+++ /dev/null
@@ -1,25 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10frsp(void *frD, void *frB)
11{
12 FP_DECL_D(B);
13
14#ifdef DEBUG
15 printk("%s: D %p, B %p\n", __FUNCTION__, frD, frB);
16#endif
17
18 __FP_UNPACK_D(B, frB);
19
20#ifdef DEBUG
21 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
22#endif
23
24 return __FP_PACK_DS(frD, B);
25}
diff --git a/arch/ppc/math-emu/frsqrte.c b/arch/ppc/math-emu/frsqrte.c
deleted file mode 100644
index a11ae1829850..000000000000
--- a/arch/ppc/math-emu/frsqrte.c
+++ /dev/null
@@ -1,12 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5int
6frsqrte(void *frD, void *frB)
7{
8#ifdef DEBUG
9 printk("%s: %p %p\n", __FUNCTION__, frD, frB);
10#endif
11 return 0;
12}
diff --git a/arch/ppc/math-emu/fsel.c b/arch/ppc/math-emu/fsel.c
deleted file mode 100644
index e36e6e72819a..000000000000
--- a/arch/ppc/math-emu/fsel.c
+++ /dev/null
@@ -1,38 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fsel(u32 *frD, void *frA, u32 *frB, u32 *frC)
10{
11 FP_DECL_D(A);
12
13#ifdef DEBUG
14 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frA, frB, frC);
15#endif
16
17 __FP_UNPACK_D(A, frA);
18
19#ifdef DEBUG
20 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
21 printk("B: %08x %08x\n", frB[0], frB[1]);
22 printk("C: %08x %08x\n", frC[0], frC[1]);
23#endif
24
25 if (A_c == FP_CLS_NAN || (A_c != FP_CLS_ZERO && A_s)) {
26 frD[0] = frB[0];
27 frD[1] = frB[1];
28 } else {
29 frD[0] = frC[0];
30 frD[1] = frC[1];
31 }
32
33#ifdef DEBUG
34 printk("D: %08x.%08x\n", frD[0], frD[1]);
35#endif
36
37 return 0;
38}
diff --git a/arch/ppc/math-emu/fsqrt.c b/arch/ppc/math-emu/fsqrt.c
deleted file mode 100644
index 6f8319f64a8a..000000000000
--- a/arch/ppc/math-emu/fsqrt.c
+++ /dev/null
@@ -1,37 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fsqrt(void *frD, void *frB)
10{
11 FP_DECL_D(B);
12 FP_DECL_D(R);
13 int ret = 0;
14
15#ifdef DEBUG
16 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frB);
17#endif
18
19 __FP_UNPACK_D(B, frB);
20
21#ifdef DEBUG
22 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
23#endif
24
25 if (B_s && B_c != FP_CLS_ZERO)
26 ret |= EFLAG_VXSQRT;
27 if (B_c == FP_CLS_NAN)
28 ret |= EFLAG_VXSNAN;
29
30 FP_SQRT_D(R, B);
31
32#ifdef DEBUG
33 printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
34#endif
35
36 return (ret | __FP_PACK_D(frD, R));
37}
diff --git a/arch/ppc/math-emu/fsqrts.c b/arch/ppc/math-emu/fsqrts.c
deleted file mode 100644
index 3b2b1cf55c12..000000000000
--- a/arch/ppc/math-emu/fsqrts.c
+++ /dev/null
@@ -1,38 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10fsqrts(void *frD, void *frB)
11{
12 FP_DECL_D(B);
13 FP_DECL_D(R);
14 int ret = 0;
15
16#ifdef DEBUG
17 printk("%s: %p %p %p %p\n", __FUNCTION__, frD, frB);
18#endif
19
20 __FP_UNPACK_D(B, frB);
21
22#ifdef DEBUG
23 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
24#endif
25
26 if (B_s && B_c != FP_CLS_ZERO)
27 ret |= EFLAG_VXSQRT;
28 if (B_c == FP_CLS_NAN)
29 ret |= EFLAG_VXSNAN;
30
31 FP_SQRT_D(R, B);
32
33#ifdef DEBUG
34 printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
35#endif
36
37 return (ret | __FP_PACK_DS(frD, R));
38}
diff --git a/arch/ppc/math-emu/fsub.c b/arch/ppc/math-emu/fsub.c
deleted file mode 100644
index 956679042bb2..000000000000
--- a/arch/ppc/math-emu/fsub.c
+++ /dev/null
@@ -1,41 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7
8int
9fsub(void *frD, void *frA, void *frB)
10{
11 FP_DECL_D(A);
12 FP_DECL_D(B);
13 FP_DECL_D(R);
14 int ret = 0;
15
16#ifdef DEBUG
17 printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
18#endif
19
20 __FP_UNPACK_D(A, frA);
21 __FP_UNPACK_D(B, frB);
22
23#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
25 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
26#endif
27
28 if (B_c != FP_CLS_NAN)
29 B_s ^= 1;
30
31 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
32 ret |= EFLAG_VXISI;
33
34 FP_ADD_D(R, A, B);
35
36#ifdef DEBUG
37 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
38#endif
39
40 return (ret | __FP_PACK_D(frD, R));
41}
diff --git a/arch/ppc/math-emu/fsubs.c b/arch/ppc/math-emu/fsubs.c
deleted file mode 100644
index 3428117dfe8c..000000000000
--- a/arch/ppc/math-emu/fsubs.c
+++ /dev/null
@@ -1,42 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10fsubs(void *frD, void *frA, void *frB)
11{
12 FP_DECL_D(A);
13 FP_DECL_D(B);
14 FP_DECL_D(R);
15 int ret = 0;
16
17#ifdef DEBUG
18 printk("%s: %p %p %p\n", __FUNCTION__, frD, frA, frB);
19#endif
20
21 __FP_UNPACK_D(A, frA);
22 __FP_UNPACK_D(B, frB);
23
24#ifdef DEBUG
25 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
26 printk("B: %ld %lu %lu %ld (%ld)\n", B_s, B_f1, B_f0, B_e, B_c);
27#endif
28
29 if (B_c != FP_CLS_NAN)
30 B_s ^= 1;
31
32 if (A_s != B_s && A_c == FP_CLS_INF && B_c == FP_CLS_INF)
33 ret |= EFLAG_VXISI;
34
35 FP_ADD_D(R, A, B);
36
37#ifdef DEBUG
38 printk("D: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
39#endif
40
41 return (ret | __FP_PACK_DS(frD, R));
42}
diff --git a/arch/ppc/math-emu/lfd.c b/arch/ppc/math-emu/lfd.c
deleted file mode 100644
index 7d38101c329b..000000000000
--- a/arch/ppc/math-emu/lfd.c
+++ /dev/null
@@ -1,19 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "sfp-machine.h"
6#include "double.h"
7
8int
9lfd(void *frD, void *ea)
10{
11 if (copy_from_user(frD, ea, sizeof(double)))
12 return -EFAULT;
13#ifdef DEBUG
14 printk("%s: D %p, ea %p: ", __FUNCTION__, frD, ea);
15 dump_double(frD);
16 printk("\n");
17#endif
18 return 0;
19}
diff --git a/arch/ppc/math-emu/lfs.c b/arch/ppc/math-emu/lfs.c
deleted file mode 100644
index c86dee3d7655..000000000000
--- a/arch/ppc/math-emu/lfs.c
+++ /dev/null
@@ -1,37 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10lfs(void *frD, void *ea)
11{
12 FP_DECL_D(R);
13 FP_DECL_S(A);
14 float f;
15
16#ifdef DEBUG
17 printk("%s: D %p, ea %p\n", __FUNCTION__, frD, ea);
18#endif
19
20 if (copy_from_user(&f, ea, sizeof(float)))
21 return -EFAULT;
22
23 __FP_UNPACK_S(A, &f);
24
25#ifdef DEBUG
26 printk("A: %ld %lu %ld (%ld) [%08lx]\n", A_s, A_f, A_e, A_c,
27 *(unsigned long *)&f);
28#endif
29
30 FP_CONV(D, S, 2, 1, R, A);
31
32#ifdef DEBUG
33 printk("R: %ld %lu %lu %ld (%ld)\n", R_s, R_f1, R_f0, R_e, R_c);
34#endif
35
36 return __FP_PACK_D(frD, R);
37}
diff --git a/arch/ppc/math-emu/math.c b/arch/ppc/math-emu/math.c
deleted file mode 100644
index b7dff53a7103..000000000000
--- a/arch/ppc/math-emu/math.c
+++ /dev/null
@@ -1,485 +0,0 @@
1/*
2 * arch/ppc/math-emu/math.c
3 *
4 * Copyright (C) 1999 Eddie C. Dost (ecd@atecom.com)
5 */
6
7#include <linux/config.h>
8#include <linux/types.h>
9#include <linux/sched.h>
10
11#include <asm/uaccess.h>
12#include <asm/reg.h>
13
14#include "sfp-machine.h"
15#include "double.h"
16
17#define FLOATFUNC(x) extern int x(void *, void *, void *, void *)
18
19FLOATFUNC(fadd);
20FLOATFUNC(fadds);
21FLOATFUNC(fdiv);
22FLOATFUNC(fdivs);
23FLOATFUNC(fmul);
24FLOATFUNC(fmuls);
25FLOATFUNC(fsub);
26FLOATFUNC(fsubs);
27
28FLOATFUNC(fmadd);
29FLOATFUNC(fmadds);
30FLOATFUNC(fmsub);
31FLOATFUNC(fmsubs);
32FLOATFUNC(fnmadd);
33FLOATFUNC(fnmadds);
34FLOATFUNC(fnmsub);
35FLOATFUNC(fnmsubs);
36
37FLOATFUNC(fctiw);
38FLOATFUNC(fctiwz);
39FLOATFUNC(frsp);
40
41FLOATFUNC(fcmpo);
42FLOATFUNC(fcmpu);
43
44FLOATFUNC(mcrfs);
45FLOATFUNC(mffs);
46FLOATFUNC(mtfsb0);
47FLOATFUNC(mtfsb1);
48FLOATFUNC(mtfsf);
49FLOATFUNC(mtfsfi);
50
51FLOATFUNC(lfd);
52FLOATFUNC(lfs);
53
54FLOATFUNC(stfd);
55FLOATFUNC(stfs);
56FLOATFUNC(stfiwx);
57
58FLOATFUNC(fabs);
59FLOATFUNC(fmr);
60FLOATFUNC(fnabs);
61FLOATFUNC(fneg);
62
63/* Optional */
64FLOATFUNC(fres);
65FLOATFUNC(frsqrte);
66FLOATFUNC(fsel);
67FLOATFUNC(fsqrt);
68FLOATFUNC(fsqrts);
69
70
71#define OP31 0x1f /* 31 */
72#define LFS 0x30 /* 48 */
73#define LFSU 0x31 /* 49 */
74#define LFD 0x32 /* 50 */
75#define LFDU 0x33 /* 51 */
76#define STFS 0x34 /* 52 */
77#define STFSU 0x35 /* 53 */
78#define STFD 0x36 /* 54 */
79#define STFDU 0x37 /* 55 */
80#define OP59 0x3b /* 59 */
81#define OP63 0x3f /* 63 */
82
83/* Opcode 31: */
84/* X-Form: */
85#define LFSX 0x217 /* 535 */
86#define LFSUX 0x237 /* 567 */
87#define LFDX 0x257 /* 599 */
88#define LFDUX 0x277 /* 631 */
89#define STFSX 0x297 /* 663 */
90#define STFSUX 0x2b7 /* 695 */
91#define STFDX 0x2d7 /* 727 */
92#define STFDUX 0x2f7 /* 759 */
93#define STFIWX 0x3d7 /* 983 */
94
95/* Opcode 59: */
96/* A-Form: */
97#define FDIVS 0x012 /* 18 */
98#define FSUBS 0x014 /* 20 */
99#define FADDS 0x015 /* 21 */
100#define FSQRTS 0x016 /* 22 */
101#define FRES 0x018 /* 24 */
102#define FMULS 0x019 /* 25 */
103#define FMSUBS 0x01c /* 28 */
104#define FMADDS 0x01d /* 29 */
105#define FNMSUBS 0x01e /* 30 */
106#define FNMADDS 0x01f /* 31 */
107
108/* Opcode 63: */
109/* A-Form: */
110#define FDIV 0x012 /* 18 */
111#define FSUB 0x014 /* 20 */
112#define FADD 0x015 /* 21 */
113#define FSQRT 0x016 /* 22 */
114#define FSEL 0x017 /* 23 */
115#define FMUL 0x019 /* 25 */
116#define FRSQRTE 0x01a /* 26 */
117#define FMSUB 0x01c /* 28 */
118#define FMADD 0x01d /* 29 */
119#define FNMSUB 0x01e /* 30 */
120#define FNMADD 0x01f /* 31 */
121
122/* X-Form: */
123#define FCMPU 0x000 /* 0 */
124#define FRSP 0x00c /* 12 */
125#define FCTIW 0x00e /* 14 */
126#define FCTIWZ 0x00f /* 15 */
127#define FCMPO 0x020 /* 32 */
128#define MTFSB1 0x026 /* 38 */
129#define FNEG 0x028 /* 40 */
130#define MCRFS 0x040 /* 64 */
131#define MTFSB0 0x046 /* 70 */
132#define FMR 0x048 /* 72 */
133#define MTFSFI 0x086 /* 134 */
134#define FNABS 0x088 /* 136 */
135#define FABS 0x108 /* 264 */
136#define MFFS 0x247 /* 583 */
137#define MTFSF 0x2c7 /* 711 */
138
139
140#define AB 2
141#define AC 3
142#define ABC 4
143#define D 5
144#define DU 6
145#define X 7
146#define XA 8
147#define XB 9
148#define XCR 11
149#define XCRB 12
150#define XCRI 13
151#define XCRL 16
152#define XE 14
153#define XEU 15
154#define XFLB 10
155
156#ifdef CONFIG_MATH_EMULATION
157static int
158record_exception(struct pt_regs *regs, int eflag)
159{
160 u32 fpscr;
161
162 fpscr = __FPU_FPSCR;
163
164 if (eflag) {
165 fpscr |= FPSCR_FX;
166 if (eflag & EFLAG_OVERFLOW)
167 fpscr |= FPSCR_OX;
168 if (eflag & EFLAG_UNDERFLOW)
169 fpscr |= FPSCR_UX;
170 if (eflag & EFLAG_DIVZERO)
171 fpscr |= FPSCR_ZX;
172 if (eflag & EFLAG_INEXACT)
173 fpscr |= FPSCR_XX;
174 if (eflag & EFLAG_VXSNAN)
175 fpscr |= FPSCR_VXSNAN;
176 if (eflag & EFLAG_VXISI)
177 fpscr |= FPSCR_VXISI;
178 if (eflag & EFLAG_VXIDI)
179 fpscr |= FPSCR_VXIDI;
180 if (eflag & EFLAG_VXZDZ)
181 fpscr |= FPSCR_VXZDZ;
182 if (eflag & EFLAG_VXIMZ)
183 fpscr |= FPSCR_VXIMZ;
184 if (eflag & EFLAG_VXVC)
185 fpscr |= FPSCR_VXVC;
186 if (eflag & EFLAG_VXSOFT)
187 fpscr |= FPSCR_VXSOFT;
188 if (eflag & EFLAG_VXSQRT)
189 fpscr |= FPSCR_VXSQRT;
190 if (eflag & EFLAG_VXCVI)
191 fpscr |= FPSCR_VXCVI;
192 }
193
194 fpscr &= ~(FPSCR_VX);
195 if (fpscr & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI |
196 FPSCR_VXZDZ | FPSCR_VXIMZ | FPSCR_VXVC |
197 FPSCR_VXSOFT | FPSCR_VXSQRT | FPSCR_VXCVI))
198 fpscr |= FPSCR_VX;
199
200 fpscr &= ~(FPSCR_FEX);
201 if (((fpscr & FPSCR_VX) && (fpscr & FPSCR_VE)) ||
202 ((fpscr & FPSCR_OX) && (fpscr & FPSCR_OE)) ||
203 ((fpscr & FPSCR_UX) && (fpscr & FPSCR_UE)) ||
204 ((fpscr & FPSCR_ZX) && (fpscr & FPSCR_ZE)) ||
205 ((fpscr & FPSCR_XX) && (fpscr & FPSCR_XE)))
206 fpscr |= FPSCR_FEX;
207
208 __FPU_FPSCR = fpscr;
209
210 return (fpscr & FPSCR_FEX) ? 1 : 0;
211}
212#endif /* CONFIG_MATH_EMULATION */
213
214int
215do_mathemu(struct pt_regs *regs)
216{
217 void *op0 = 0, *op1 = 0, *op2 = 0, *op3 = 0;
218 unsigned long pc = regs->nip;
219 signed short sdisp;
220 u32 insn = 0;
221 int idx = 0;
222#ifdef CONFIG_MATH_EMULATION
223 int (*func)(void *, void *, void *, void *);
224 int type = 0;
225 int eflag, trap;
226#endif
227
228 if (get_user(insn, (u32 *)pc))
229 return -EFAULT;
230
231#ifndef CONFIG_MATH_EMULATION
232 switch (insn >> 26) {
233 case LFD:
234 idx = (insn >> 16) & 0x1f;
235 sdisp = (insn & 0xffff);
236 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
237 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
238 lfd(op0, op1, op2, op3);
239 break;
240 case LFDU:
241 idx = (insn >> 16) & 0x1f;
242 sdisp = (insn & 0xffff);
243 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
244 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
245 lfd(op0, op1, op2, op3);
246 regs->gpr[idx] = (unsigned long)op1;
247 break;
248 case STFD:
249 idx = (insn >> 16) & 0x1f;
250 sdisp = (insn & 0xffff);
251 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
252 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
253 stfd(op0, op1, op2, op3);
254 break;
255 case STFDU:
256 idx = (insn >> 16) & 0x1f;
257 sdisp = (insn & 0xffff);
258 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
259 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
260 stfd(op0, op1, op2, op3);
261 regs->gpr[idx] = (unsigned long)op1;
262 break;
263 case OP63:
264 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
265 op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
266 fmr(op0, op1, op2, op3);
267 break;
268 default:
269 goto illegal;
270 }
271#else /* CONFIG_MATH_EMULATION */
272 switch (insn >> 26) {
273 case LFS: func = lfs; type = D; break;
274 case LFSU: func = lfs; type = DU; break;
275 case LFD: func = lfd; type = D; break;
276 case LFDU: func = lfd; type = DU; break;
277 case STFS: func = stfs; type = D; break;
278 case STFSU: func = stfs; type = DU; break;
279 case STFD: func = stfd; type = D; break;
280 case STFDU: func = stfd; type = DU; break;
281
282 case OP31:
283 switch ((insn >> 1) & 0x3ff) {
284 case LFSX: func = lfs; type = XE; break;
285 case LFSUX: func = lfs; type = XEU; break;
286 case LFDX: func = lfd; type = XE; break;
287 case LFDUX: func = lfd; type = XEU; break;
288 case STFSX: func = stfs; type = XE; break;
289 case STFSUX: func = stfs; type = XEU; break;
290 case STFDX: func = stfd; type = XE; break;
291 case STFDUX: func = stfd; type = XEU; break;
292 case STFIWX: func = stfiwx; type = XE; break;
293 default:
294 goto illegal;
295 }
296 break;
297
298 case OP59:
299 switch ((insn >> 1) & 0x1f) {
300 case FDIVS: func = fdivs; type = AB; break;
301 case FSUBS: func = fsubs; type = AB; break;
302 case FADDS: func = fadds; type = AB; break;
303 case FSQRTS: func = fsqrts; type = AB; break;
304 case FRES: func = fres; type = AB; break;
305 case FMULS: func = fmuls; type = AC; break;
306 case FMSUBS: func = fmsubs; type = ABC; break;
307 case FMADDS: func = fmadds; type = ABC; break;
308 case FNMSUBS: func = fnmsubs; type = ABC; break;
309 case FNMADDS: func = fnmadds; type = ABC; break;
310 default:
311 goto illegal;
312 }
313 break;
314
315 case OP63:
316 if (insn & 0x20) {
317 switch ((insn >> 1) & 0x1f) {
318 case FDIV: func = fdiv; type = AB; break;
319 case FSUB: func = fsub; type = AB; break;
320 case FADD: func = fadd; type = AB; break;
321 case FSQRT: func = fsqrt; type = AB; break;
322 case FSEL: func = fsel; type = ABC; break;
323 case FMUL: func = fmul; type = AC; break;
324 case FRSQRTE: func = frsqrte; type = AB; break;
325 case FMSUB: func = fmsub; type = ABC; break;
326 case FMADD: func = fmadd; type = ABC; break;
327 case FNMSUB: func = fnmsub; type = ABC; break;
328 case FNMADD: func = fnmadd; type = ABC; break;
329 default:
330 goto illegal;
331 }
332 break;
333 }
334
335 switch ((insn >> 1) & 0x3ff) {
336 case FCMPU: func = fcmpu; type = XCR; break;
337 case FRSP: func = frsp; type = XB; break;
338 case FCTIW: func = fctiw; type = XB; break;
339 case FCTIWZ: func = fctiwz; type = XB; break;
340 case FCMPO: func = fcmpo; type = XCR; break;
341 case MTFSB1: func = mtfsb1; type = XCRB; break;
342 case FNEG: func = fneg; type = XB; break;
343 case MCRFS: func = mcrfs; type = XCRL; break;
344 case MTFSB0: func = mtfsb0; type = XCRB; break;
345 case FMR: func = fmr; type = XB; break;
346 case MTFSFI: func = mtfsfi; type = XCRI; break;
347 case FNABS: func = fnabs; type = XB; break;
348 case FABS: func = fabs; type = XB; break;
349 case MFFS: func = mffs; type = X; break;
350 case MTFSF: func = mtfsf; type = XFLB; break;
351 default:
352 goto illegal;
353 }
354 break;
355
356 default:
357 goto illegal;
358 }
359
360 switch (type) {
361 case AB:
362 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
363 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
364 op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
365 break;
366
367 case AC:
368 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
369 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
370 op2 = (void *)&current->thread.fpr[(insn >> 6) & 0x1f];
371 break;
372
373 case ABC:
374 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
375 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
376 op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
377 op3 = (void *)&current->thread.fpr[(insn >> 6) & 0x1f];
378 break;
379
380 case D:
381 idx = (insn >> 16) & 0x1f;
382 sdisp = (insn & 0xffff);
383 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
384 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
385 break;
386
387 case DU:
388 idx = (insn >> 16) & 0x1f;
389 if (!idx)
390 goto illegal;
391
392 sdisp = (insn & 0xffff);
393 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
394 op1 = (void *)(regs->gpr[idx] + sdisp);
395 break;
396
397 case X:
398 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
399 break;
400
401 case XA:
402 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
403 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
404 break;
405
406 case XB:
407 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
408 op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
409 break;
410
411 case XE:
412 idx = (insn >> 16) & 0x1f;
413 if (!idx)
414 goto illegal;
415
416 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
417 op1 = (void *)(regs->gpr[idx] + regs->gpr[(insn >> 11) & 0x1f]);
418 break;
419
420 case XEU:
421 idx = (insn >> 16) & 0x1f;
422 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f];
423 op1 = (void *)((idx ? regs->gpr[idx] : 0)
424 + regs->gpr[(insn >> 11) & 0x1f]);
425 break;
426
427 case XCR:
428 op0 = (void *)&regs->ccr;
429 op1 = (void *)((insn >> 23) & 0x7);
430 op2 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f];
431 op3 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
432 break;
433
434 case XCRL:
435 op0 = (void *)&regs->ccr;
436 op1 = (void *)((insn >> 23) & 0x7);
437 op2 = (void *)((insn >> 18) & 0x7);
438 break;
439
440 case XCRB:
441 op0 = (void *)((insn >> 21) & 0x1f);
442 break;
443
444 case XCRI:
445 op0 = (void *)((insn >> 23) & 0x7);
446 op1 = (void *)((insn >> 12) & 0xf);
447 break;
448
449 case XFLB:
450 op0 = (void *)((insn >> 17) & 0xff);
451 op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f];
452 break;
453
454 default:
455 goto illegal;
456 }
457
458 eflag = func(op0, op1, op2, op3);
459
460 if (insn & 1) {
461 regs->ccr &= ~(0x0f000000);
462 regs->ccr |= (__FPU_FPSCR >> 4) & 0x0f000000;
463 }
464
465 trap = record_exception(regs, eflag);
466 if (trap)
467 return 1;
468
469 switch (type) {
470 case DU:
471 case XEU:
472 regs->gpr[idx] = (unsigned long)op1;
473 break;
474
475 default:
476 break;
477 }
478#endif /* CONFIG_MATH_EMULATION */
479
480 regs->nip += 4;
481 return 0;
482
483illegal:
484 return -ENOSYS;
485}
diff --git a/arch/ppc/math-emu/mcrfs.c b/arch/ppc/math-emu/mcrfs.c
deleted file mode 100644
index 106dd912914b..000000000000
--- a/arch/ppc/math-emu/mcrfs.c
+++ /dev/null
@@ -1,31 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6
7int
8mcrfs(u32 *ccr, u32 crfD, u32 crfS)
9{
10 u32 value, clear;
11
12#ifdef DEBUG
13 printk("%s: %p (%08x) %d %d\n", __FUNCTION__, ccr, *ccr, crfD, crfS);
14#endif
15
16 clear = 15 << ((7 - crfS) << 2);
17 if (!crfS)
18 clear = 0x90000000;
19
20 value = (__FPU_FPSCR >> ((7 - crfS) << 2)) & 15;
21 __FPU_FPSCR &= ~(clear);
22
23 *ccr &= ~(15 << ((7 - crfD) << 2));
24 *ccr |= (value << ((7 - crfD) << 2));
25
26#ifdef DEBUG
27 printk("CR: %08x\n", __FUNCTION__, *ccr);
28#endif
29
30 return 0;
31}
diff --git a/arch/ppc/math-emu/mffs.c b/arch/ppc/math-emu/mffs.c
deleted file mode 100644
index f477c9170e75..000000000000
--- a/arch/ppc/math-emu/mffs.c
+++ /dev/null
@@ -1,17 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6
7int
8mffs(u32 *frD)
9{
10 frD[1] = __FPU_FPSCR;
11
12#ifdef DEBUG
13 printk("%s: frD %p: %08x.%08x\n", __FUNCTION__, frD, frD[0], frD[1]);
14#endif
15
16 return 0;
17}
diff --git a/arch/ppc/math-emu/mtfsb0.c b/arch/ppc/math-emu/mtfsb0.c
deleted file mode 100644
index 99bfd80f4af3..000000000000
--- a/arch/ppc/math-emu/mtfsb0.c
+++ /dev/null
@@ -1,18 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6
7int
8mtfsb0(int crbD)
9{
10 if ((crbD != 1) && (crbD != 2))
11 __FPU_FPSCR &= ~(1 << (31 - crbD));
12
13#ifdef DEBUG
14 printk("%s: %d %08lx\n", __FUNCTION__, crbD, __FPU_FPSCR);
15#endif
16
17 return 0;
18}
diff --git a/arch/ppc/math-emu/mtfsb1.c b/arch/ppc/math-emu/mtfsb1.c
deleted file mode 100644
index 3d9e7ed92d2b..000000000000
--- a/arch/ppc/math-emu/mtfsb1.c
+++ /dev/null
@@ -1,18 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6
7int
8mtfsb1(int crbD)
9{
10 if ((crbD != 1) && (crbD != 2))
11 __FPU_FPSCR |= (1 << (31 - crbD));
12
13#ifdef DEBUG
14 printk("%s: %d %08lx\n", __FUNCTION__, crbD, __FPU_FPSCR);
15#endif
16
17 return 0;
18}
diff --git a/arch/ppc/math-emu/mtfsf.c b/arch/ppc/math-emu/mtfsf.c
deleted file mode 100644
index d70cf714994c..000000000000
--- a/arch/ppc/math-emu/mtfsf.c
+++ /dev/null
@@ -1,45 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6
7int
8mtfsf(unsigned int FM, u32 *frB)
9{
10 u32 mask;
11
12 if (FM == 0)
13 return 0;
14
15 if (FM == 0xff)
16 mask = 0x9fffffff;
17 else {
18 mask = 0;
19 if (FM & (1 << 0))
20 mask |= 0x90000000;
21 if (FM & (1 << 1))
22 mask |= 0x0f000000;
23 if (FM & (1 << 2))
24 mask |= 0x00f00000;
25 if (FM & (1 << 3))
26 mask |= 0x000f0000;
27 if (FM & (1 << 4))
28 mask |= 0x0000f000;
29 if (FM & (1 << 5))
30 mask |= 0x00000f00;
31 if (FM & (1 << 6))
32 mask |= 0x000000f0;
33 if (FM & (1 << 7))
34 mask |= 0x0000000f;
35 }
36
37 __FPU_FPSCR &= ~(mask);
38 __FPU_FPSCR |= (frB[1] & mask);
39
40#ifdef DEBUG
41 printk("%s: %02x %p: %08lx\n", __FUNCTION__, FM, frB, __FPU_FPSCR);
42#endif
43
44 return 0;
45}
diff --git a/arch/ppc/math-emu/mtfsfi.c b/arch/ppc/math-emu/mtfsfi.c
deleted file mode 100644
index 71df854baa7e..000000000000
--- a/arch/ppc/math-emu/mtfsfi.c
+++ /dev/null
@@ -1,23 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6
7int
8mtfsfi(unsigned int crfD, unsigned int IMM)
9{
10 u32 mask = 0xf;
11
12 if (!crfD)
13 mask = 9;
14
15 __FPU_FPSCR &= ~(mask << ((7 - crfD) << 2));
16 __FPU_FPSCR |= (IMM & 0xf) << ((7 - crfD) << 2);
17
18#ifdef DEBUG
19 printk("%s: %d %x: %08lx\n", __FUNCTION__, crfD, IMM, __FPU_FPSCR);
20#endif
21
22 return 0;
23}
diff --git a/arch/ppc/math-emu/op-1.h b/arch/ppc/math-emu/op-1.h
deleted file mode 100644
index c92fa95f562e..000000000000
--- a/arch/ppc/math-emu/op-1.h
+++ /dev/null
@@ -1,245 +0,0 @@
1/*
2 * Basic one-word fraction declaration and manipulation.
3 */
4
5#define _FP_FRAC_DECL_1(X) _FP_W_TYPE X##_f
6#define _FP_FRAC_COPY_1(D,S) (D##_f = S##_f)
7#define _FP_FRAC_SET_1(X,I) (X##_f = I)
8#define _FP_FRAC_HIGH_1(X) (X##_f)
9#define _FP_FRAC_LOW_1(X) (X##_f)
10#define _FP_FRAC_WORD_1(X,w) (X##_f)
11
12#define _FP_FRAC_ADDI_1(X,I) (X##_f += I)
13#define _FP_FRAC_SLL_1(X,N) \
14 do { \
15 if (__builtin_constant_p(N) && (N) == 1) \
16 X##_f += X##_f; \
17 else \
18 X##_f <<= (N); \
19 } while (0)
20#define _FP_FRAC_SRL_1(X,N) (X##_f >>= N)
21
22/* Right shift with sticky-lsb. */
23#define _FP_FRAC_SRS_1(X,N,sz) __FP_FRAC_SRS_1(X##_f, N, sz)
24
25#define __FP_FRAC_SRS_1(X,N,sz) \
26 (X = (X >> (N) | (__builtin_constant_p(N) && (N) == 1 \
27 ? X & 1 : (X << (_FP_W_TYPE_SIZE - (N))) != 0)))
28
29#define _FP_FRAC_ADD_1(R,X,Y) (R##_f = X##_f + Y##_f)
30#define _FP_FRAC_SUB_1(R,X,Y) (R##_f = X##_f - Y##_f)
31#define _FP_FRAC_CLZ_1(z, X) __FP_CLZ(z, X##_f)
32
33/* Predicates */
34#define _FP_FRAC_NEGP_1(X) ((_FP_WS_TYPE)X##_f < 0)
35#define _FP_FRAC_ZEROP_1(X) (X##_f == 0)
36#define _FP_FRAC_OVERP_1(fs,X) (X##_f & _FP_OVERFLOW_##fs)
37#define _FP_FRAC_EQ_1(X, Y) (X##_f == Y##_f)
38#define _FP_FRAC_GE_1(X, Y) (X##_f >= Y##_f)
39#define _FP_FRAC_GT_1(X, Y) (X##_f > Y##_f)
40
41#define _FP_ZEROFRAC_1 0
42#define _FP_MINFRAC_1 1
43
44/*
45 * Unpack the raw bits of a native fp value. Do not classify or
46 * normalize the data.
47 */
48
49#define _FP_UNPACK_RAW_1(fs, X, val) \
50 do { \
51 union _FP_UNION_##fs _flo; _flo.flt = (val); \
52 \
53 X##_f = _flo.bits.frac; \
54 X##_e = _flo.bits.exp; \
55 X##_s = _flo.bits.sign; \
56 } while (0)
57
58
59/*
60 * Repack the raw bits of a native fp value.
61 */
62
63#define _FP_PACK_RAW_1(fs, val, X) \
64 do { \
65 union _FP_UNION_##fs _flo; \
66 \
67 _flo.bits.frac = X##_f; \
68 _flo.bits.exp = X##_e; \
69 _flo.bits.sign = X##_s; \
70 \
71 (val) = _flo.flt; \
72 } while (0)
73
74
75/*
76 * Multiplication algorithms:
77 */
78
79/* Basic. Assuming the host word size is >= 2*FRACBITS, we can do the
80 multiplication immediately. */
81
82#define _FP_MUL_MEAT_1_imm(fs, R, X, Y) \
83 do { \
84 R##_f = X##_f * Y##_f; \
85 /* Normalize since we know where the msb of the multiplicands \
86 were (bit B), we know that the msb of the of the product is \
87 at either 2B or 2B-1. */ \
88 _FP_FRAC_SRS_1(R, _FP_WFRACBITS_##fs-1, 2*_FP_WFRACBITS_##fs); \
89 } while (0)
90
91/* Given a 1W * 1W => 2W primitive, do the extended multiplication. */
92
93#define _FP_MUL_MEAT_1_wide(fs, R, X, Y, doit) \
94 do { \
95 _FP_W_TYPE _Z_f0, _Z_f1; \
96 doit(_Z_f1, _Z_f0, X##_f, Y##_f); \
97 /* Normalize since we know where the msb of the multiplicands \
98 were (bit B), we know that the msb of the of the product is \
99 at either 2B or 2B-1. */ \
100 _FP_FRAC_SRS_2(_Z, _FP_WFRACBITS_##fs-1, 2*_FP_WFRACBITS_##fs); \
101 R##_f = _Z_f0; \
102 } while (0)
103
104/* Finally, a simple widening multiply algorithm. What fun! */
105
106#define _FP_MUL_MEAT_1_hard(fs, R, X, Y) \
107 do { \
108 _FP_W_TYPE _xh, _xl, _yh, _yl, _z_f0, _z_f1, _a_f0, _a_f1; \
109 \
110 /* split the words in half */ \
111 _xh = X##_f >> (_FP_W_TYPE_SIZE/2); \
112 _xl = X##_f & (((_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE/2)) - 1); \
113 _yh = Y##_f >> (_FP_W_TYPE_SIZE/2); \
114 _yl = Y##_f & (((_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE/2)) - 1); \
115 \
116 /* multiply the pieces */ \
117 _z_f0 = _xl * _yl; \
118 _a_f0 = _xh * _yl; \
119 _a_f1 = _xl * _yh; \
120 _z_f1 = _xh * _yh; \
121 \
122 /* reassemble into two full words */ \
123 if ((_a_f0 += _a_f1) < _a_f1) \
124 _z_f1 += (_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE/2); \
125 _a_f1 = _a_f0 >> (_FP_W_TYPE_SIZE/2); \
126 _a_f0 = _a_f0 << (_FP_W_TYPE_SIZE/2); \
127 _FP_FRAC_ADD_2(_z, _z, _a); \
128 \
129 /* normalize */ \
130 _FP_FRAC_SRS_2(_z, _FP_WFRACBITS_##fs - 1, 2*_FP_WFRACBITS_##fs); \
131 R##_f = _z_f0; \
132 } while (0)
133
134
135/*
136 * Division algorithms:
137 */
138
139/* Basic. Assuming the host word size is >= 2*FRACBITS, we can do the
140 division immediately. Give this macro either _FP_DIV_HELP_imm for
141 C primitives or _FP_DIV_HELP_ldiv for the ISO function. Which you
142 choose will depend on what the compiler does with divrem4. */
143
144#define _FP_DIV_MEAT_1_imm(fs, R, X, Y, doit) \
145 do { \
146 _FP_W_TYPE _q, _r; \
147 X##_f <<= (X##_f < Y##_f \
148 ? R##_e--, _FP_WFRACBITS_##fs \
149 : _FP_WFRACBITS_##fs - 1); \
150 doit(_q, _r, X##_f, Y##_f); \
151 R##_f = _q | (_r != 0); \
152 } while (0)
153
154/* GCC's longlong.h defines a 2W / 1W => (1W,1W) primitive udiv_qrnnd
155 that may be useful in this situation. This first is for a primitive
156 that requires normalization, the second for one that does not. Look
157 for UDIV_NEEDS_NORMALIZATION to tell which your machine needs. */
158
159#define _FP_DIV_MEAT_1_udiv_norm(fs, R, X, Y) \
160 do { \
161 _FP_W_TYPE _nh, _nl, _q, _r; \
162 \
163 /* Normalize Y -- i.e. make the most significant bit set. */ \
164 Y##_f <<= _FP_WFRACXBITS_##fs - 1; \
165 \
166 /* Shift X op correspondingly high, that is, up one full word. */ \
167 if (X##_f <= Y##_f) \
168 { \
169 _nl = 0; \
170 _nh = X##_f; \
171 } \
172 else \
173 { \
174 R##_e++; \
175 _nl = X##_f << (_FP_W_TYPE_SIZE-1); \
176 _nh = X##_f >> 1; \
177 } \
178 \
179 udiv_qrnnd(_q, _r, _nh, _nl, Y##_f); \
180 R##_f = _q | (_r != 0); \
181 } while (0)
182
183#define _FP_DIV_MEAT_1_udiv(fs, R, X, Y) \
184 do { \
185 _FP_W_TYPE _nh, _nl, _q, _r; \
186 if (X##_f < Y##_f) \
187 { \
188 R##_e--; \
189 _nl = X##_f << _FP_WFRACBITS_##fs; \
190 _nh = X##_f >> _FP_WFRACXBITS_##fs; \
191 } \
192 else \
193 { \
194 _nl = X##_f << (_FP_WFRACBITS_##fs - 1); \
195 _nh = X##_f >> (_FP_WFRACXBITS_##fs + 1); \
196 } \
197 udiv_qrnnd(_q, _r, _nh, _nl, Y##_f); \
198 R##_f = _q | (_r != 0); \
199 } while (0)
200
201
202/*
203 * Square root algorithms:
204 * We have just one right now, maybe Newton approximation
205 * should be added for those machines where division is fast.
206 */
207
208#define _FP_SQRT_MEAT_1(R, S, T, X, q) \
209 do { \
210 while (q) \
211 { \
212 T##_f = S##_f + q; \
213 if (T##_f <= X##_f) \
214 { \
215 S##_f = T##_f + q; \
216 X##_f -= T##_f; \
217 R##_f += q; \
218 } \
219 _FP_FRAC_SLL_1(X, 1); \
220 q >>= 1; \
221 } \
222 } while (0)
223
224/*
225 * Assembly/disassembly for converting to/from integral types.
226 * No shifting or overflow handled here.
227 */
228
229#define _FP_FRAC_ASSEMBLE_1(r, X, rsize) (r = X##_f)
230#define _FP_FRAC_DISASSEMBLE_1(X, r, rsize) (X##_f = r)
231
232
233/*
234 * Convert FP values between word sizes
235 */
236
237#define _FP_FRAC_CONV_1_1(dfs, sfs, D, S) \
238 do { \
239 D##_f = S##_f; \
240 if (_FP_WFRACBITS_##sfs > _FP_WFRACBITS_##dfs) \
241 _FP_FRAC_SRS_1(D, (_FP_WFRACBITS_##sfs-_FP_WFRACBITS_##dfs), \
242 _FP_WFRACBITS_##sfs); \
243 else \
244 D##_f <<= _FP_WFRACBITS_##dfs - _FP_WFRACBITS_##sfs; \
245 } while (0)
diff --git a/arch/ppc/math-emu/op-2.h b/arch/ppc/math-emu/op-2.h
deleted file mode 100644
index b9b06b4c6ea1..000000000000
--- a/arch/ppc/math-emu/op-2.h
+++ /dev/null
@@ -1,433 +0,0 @@
1/*
2 * Basic two-word fraction declaration and manipulation.
3 */
4
5#define _FP_FRAC_DECL_2(X) _FP_W_TYPE X##_f0, X##_f1
6#define _FP_FRAC_COPY_2(D,S) (D##_f0 = S##_f0, D##_f1 = S##_f1)
7#define _FP_FRAC_SET_2(X,I) __FP_FRAC_SET_2(X, I)
8#define _FP_FRAC_HIGH_2(X) (X##_f1)
9#define _FP_FRAC_LOW_2(X) (X##_f0)
10#define _FP_FRAC_WORD_2(X,w) (X##_f##w)
11
12#define _FP_FRAC_SLL_2(X,N) \
13 do { \
14 if ((N) < _FP_W_TYPE_SIZE) \
15 { \
16 if (__builtin_constant_p(N) && (N) == 1) \
17 { \
18 X##_f1 = X##_f1 + X##_f1 + (((_FP_WS_TYPE)(X##_f0)) < 0); \
19 X##_f0 += X##_f0; \
20 } \
21 else \
22 { \
23 X##_f1 = X##_f1 << (N) | X##_f0 >> (_FP_W_TYPE_SIZE - (N)); \
24 X##_f0 <<= (N); \
25 } \
26 } \
27 else \
28 { \
29 X##_f1 = X##_f0 << ((N) - _FP_W_TYPE_SIZE); \
30 X##_f0 = 0; \
31 } \
32 } while (0)
33
34#define _FP_FRAC_SRL_2(X,N) \
35 do { \
36 if ((N) < _FP_W_TYPE_SIZE) \
37 { \
38 X##_f0 = X##_f0 >> (N) | X##_f1 << (_FP_W_TYPE_SIZE - (N)); \
39 X##_f1 >>= (N); \
40 } \
41 else \
42 { \
43 X##_f0 = X##_f1 >> ((N) - _FP_W_TYPE_SIZE); \
44 X##_f1 = 0; \
45 } \
46 } while (0)
47
48/* Right shift with sticky-lsb. */
49#define _FP_FRAC_SRS_2(X,N,sz) \
50 do { \
51 if ((N) < _FP_W_TYPE_SIZE) \
52 { \
53 X##_f0 = (X##_f1 << (_FP_W_TYPE_SIZE - (N)) | X##_f0 >> (N) | \
54 (__builtin_constant_p(N) && (N) == 1 \
55 ? X##_f0 & 1 \
56 : (X##_f0 << (_FP_W_TYPE_SIZE - (N))) != 0)); \
57 X##_f1 >>= (N); \
58 } \
59 else \
60 { \
61 X##_f0 = (X##_f1 >> ((N) - _FP_W_TYPE_SIZE) | \
62 (((X##_f1 << (sz - (N))) | X##_f0) != 0)); \
63 X##_f1 = 0; \
64 } \
65 } while (0)
66
67#define _FP_FRAC_ADDI_2(X,I) \
68 __FP_FRAC_ADDI_2(X##_f1, X##_f0, I)
69
70#define _FP_FRAC_ADD_2(R,X,Y) \
71 __FP_FRAC_ADD_2(R##_f1, R##_f0, X##_f1, X##_f0, Y##_f1, Y##_f0)
72
73#define _FP_FRAC_SUB_2(R,X,Y) \
74 __FP_FRAC_SUB_2(R##_f1, R##_f0, X##_f1, X##_f0, Y##_f1, Y##_f0)
75
76#define _FP_FRAC_CLZ_2(R,X) \
77 do { \
78 if (X##_f1) \
79 __FP_CLZ(R,X##_f1); \
80 else \
81 { \
82 __FP_CLZ(R,X##_f0); \
83 R += _FP_W_TYPE_SIZE; \
84 } \
85 } while(0)
86
87/* Predicates */
88#define _FP_FRAC_NEGP_2(X) ((_FP_WS_TYPE)X##_f1 < 0)
89#define _FP_FRAC_ZEROP_2(X) ((X##_f1 | X##_f0) == 0)
90#define _FP_FRAC_OVERP_2(fs,X) (X##_f1 & _FP_OVERFLOW_##fs)
91#define _FP_FRAC_EQ_2(X, Y) (X##_f1 == Y##_f1 && X##_f0 == Y##_f0)
92#define _FP_FRAC_GT_2(X, Y) \
93 ((X##_f1 > Y##_f1) || (X##_f1 == Y##_f1 && X##_f0 > Y##_f0))
94#define _FP_FRAC_GE_2(X, Y) \
95 ((X##_f1 > Y##_f1) || (X##_f1 == Y##_f1 && X##_f0 >= Y##_f0))
96
97#define _FP_ZEROFRAC_2 0, 0
98#define _FP_MINFRAC_2 0, 1
99
100/*
101 * Internals
102 */
103
104#define __FP_FRAC_SET_2(X,I1,I0) (X##_f0 = I0, X##_f1 = I1)
105
106#define __FP_CLZ_2(R, xh, xl) \
107 do { \
108 if (xh) \
109 __FP_CLZ(R,xl); \
110 else \
111 { \
112 __FP_CLZ(R,xl); \
113 R += _FP_W_TYPE_SIZE; \
114 } \
115 } while(0)
116
117#if 0
118
119#ifndef __FP_FRAC_ADDI_2
120#define __FP_FRAC_ADDI_2(xh, xl, i) \
121 (xh += ((xl += i) < i))
122#endif
123#ifndef __FP_FRAC_ADD_2
124#define __FP_FRAC_ADD_2(rh, rl, xh, xl, yh, yl) \
125 (rh = xh + yh + ((rl = xl + yl) < xl))
126#endif
127#ifndef __FP_FRAC_SUB_2
128#define __FP_FRAC_SUB_2(rh, rl, xh, xl, yh, yl) \
129 (rh = xh - yh - ((rl = xl - yl) > xl))
130#endif
131
132#else
133
134#undef __FP_FRAC_ADDI_2
135#define __FP_FRAC_ADDI_2(xh, xl, i) add_ssaaaa(xh, xl, xh, xl, 0, i)
136#undef __FP_FRAC_ADD_2
137#define __FP_FRAC_ADD_2 add_ssaaaa
138#undef __FP_FRAC_SUB_2
139#define __FP_FRAC_SUB_2 sub_ddmmss
140
141#endif
142
143/*
144 * Unpack the raw bits of a native fp value. Do not classify or
145 * normalize the data.
146 */
147
148#define _FP_UNPACK_RAW_2(fs, X, val) \
149 do { \
150 union _FP_UNION_##fs _flo; _flo.flt = (val); \
151 \
152 X##_f0 = _flo.bits.frac0; \
153 X##_f1 = _flo.bits.frac1; \
154 X##_e = _flo.bits.exp; \
155 X##_s = _flo.bits.sign; \
156 } while (0)
157
158
159/*
160 * Repack the raw bits of a native fp value.
161 */
162
163#define _FP_PACK_RAW_2(fs, val, X) \
164 do { \
165 union _FP_UNION_##fs _flo; \
166 \
167 _flo.bits.frac0 = X##_f0; \
168 _flo.bits.frac1 = X##_f1; \
169 _flo.bits.exp = X##_e; \
170 _flo.bits.sign = X##_s; \
171 \
172 (val) = _flo.flt; \
173 } while (0)
174
175
176/*
177 * Multiplication algorithms:
178 */
179
180/* Given a 1W * 1W => 2W primitive, do the extended multiplication. */
181
182#define _FP_MUL_MEAT_2_wide(fs, R, X, Y, doit) \
183 do { \
184 _FP_FRAC_DECL_4(_z); _FP_FRAC_DECL_2(_b); _FP_FRAC_DECL_2(_c); \
185 \
186 doit(_FP_FRAC_WORD_4(_z,1), _FP_FRAC_WORD_4(_z,0), X##_f0, Y##_f0); \
187 doit(_b_f1, _b_f0, X##_f0, Y##_f1); \
188 doit(_c_f1, _c_f0, X##_f1, Y##_f0); \
189 doit(_FP_FRAC_WORD_4(_z,3), _FP_FRAC_WORD_4(_z,2), X##_f1, Y##_f1); \
190 \
191 __FP_FRAC_ADD_4(_FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2), \
192 _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0), \
193 0, _b_f1, _b_f0, 0, \
194 _FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2), \
195 _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0)); \
196 __FP_FRAC_ADD_4(_FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2), \
197 _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0), \
198 0, _c_f1, _c_f0, 0, \
199 _FP_FRAC_WORD_4(_z,3),_FP_FRAC_WORD_4(_z,2), \
200 _FP_FRAC_WORD_4(_z,1),_FP_FRAC_WORD_4(_z,0)); \
201 \
202 /* Normalize since we know where the msb of the multiplicands \
203 were (bit B), we know that the msb of the of the product is \
204 at either 2B or 2B-1. */ \
205 _FP_FRAC_SRS_4(_z, _FP_WFRACBITS_##fs-1, 2*_FP_WFRACBITS_##fs); \
206 R##_f0 = _FP_FRAC_WORD_4(_z,0); \
207 R##_f1 = _FP_FRAC_WORD_4(_z,1); \
208 } while (0)
209
210/* This next macro appears to be totally broken. Fortunately nowhere
211 * seems to use it :-> The problem is that we define _z[4] but
212 * then use it in _FP_FRAC_SRS_4, which will attempt to access
213 * _z_f[n] which will cause an error. The fix probably involves
214 * declaring it with _FP_FRAC_DECL_4, see previous macro. -- PMM 02/1998
215 */
216#define _FP_MUL_MEAT_2_gmp(fs, R, X, Y) \
217 do { \
218 _FP_W_TYPE _x[2], _y[2], _z[4]; \
219 _x[0] = X##_f0; _x[1] = X##_f1; \
220 _y[0] = Y##_f0; _y[1] = Y##_f1; \
221 \
222 mpn_mul_n(_z, _x, _y, 2); \
223 \
224 /* Normalize since we know where the msb of the multiplicands \
225 were (bit B), we know that the msb of the of the product is \
226 at either 2B or 2B-1. */ \
227 _FP_FRAC_SRS_4(_z, _FP_WFRACBITS##_fs-1, 2*_FP_WFRACBITS_##fs); \
228 R##_f0 = _z[0]; \
229 R##_f1 = _z[1]; \
230 } while (0)
231
232
233/*
234 * Division algorithms:
235 * This seems to be giving me difficulties -- PMM
236 * Look, NetBSD seems to be able to comment algorithms. Can't you?
237 * I've thrown printks at the problem.
238 * This now appears to work, but I still don't really know why.
239 * Also, I don't think the result is properly normalised...
240 */
241
242#define _FP_DIV_MEAT_2_udiv_64(fs, R, X, Y) \
243 do { \
244 extern void _fp_udivmodti4(_FP_W_TYPE q[2], _FP_W_TYPE r[2], \
245 _FP_W_TYPE n1, _FP_W_TYPE n0, \
246 _FP_W_TYPE d1, _FP_W_TYPE d0); \
247 _FP_W_TYPE _n_f3, _n_f2, _n_f1, _n_f0, _r_f1, _r_f0; \
248 _FP_W_TYPE _q_f1, _q_f0, _m_f1, _m_f0; \
249 _FP_W_TYPE _rmem[2], _qmem[2]; \
250 /* I think this check is to ensure that the result is normalised. \
251 * Assuming X,Y normalised (ie in [1.0,2.0)) X/Y will be in \
252 * [0.5,2.0). Furthermore, it will be less than 1.0 iff X < Y. \
253 * In this case we tweak things. (this is based on comments in \
254 * the NetBSD FPU emulation code. ) \
255 * We know X,Y are normalised because we ensure this as part of \
256 * the unpacking process. -- PMM \
257 */ \
258 if (_FP_FRAC_GT_2(X, Y)) \
259 { \
260/* R##_e++; */ \
261 _n_f3 = X##_f1 >> 1; \
262 _n_f2 = X##_f1 << (_FP_W_TYPE_SIZE - 1) | X##_f0 >> 1; \
263 _n_f1 = X##_f0 << (_FP_W_TYPE_SIZE - 1); \
264 _n_f0 = 0; \
265 } \
266 else \
267 { \
268 R##_e--; \
269 _n_f3 = X##_f1; \
270 _n_f2 = X##_f0; \
271 _n_f1 = _n_f0 = 0; \
272 } \
273 \
274 /* Normalize, i.e. make the most significant bit of the \
275 denominator set. CHANGED: - 1 to nothing -- PMM */ \
276 _FP_FRAC_SLL_2(Y, _FP_WFRACXBITS_##fs /* -1 */); \
277 \
278 /* Do the 256/128 bit division given the 128-bit _fp_udivmodtf4 \
279 primitive snagged from libgcc2.c. */ \
280 \
281 _fp_udivmodti4(_qmem, _rmem, _n_f3, _n_f2, 0, Y##_f1); \
282 _q_f1 = _qmem[0]; \
283 umul_ppmm(_m_f1, _m_f0, _q_f1, Y##_f0); \
284 _r_f1 = _rmem[0]; \
285 _r_f0 = _n_f1; \
286 if (_FP_FRAC_GT_2(_m, _r)) \
287 { \
288 _q_f1--; \
289 _FP_FRAC_ADD_2(_r, _r, Y); \
290 if (_FP_FRAC_GE_2(_r, Y) && _FP_FRAC_GT_2(_m, _r)) \
291 { \
292 _q_f1--; \
293 _FP_FRAC_ADD_2(_r, _r, Y); \
294 } \
295 } \
296 _FP_FRAC_SUB_2(_r, _r, _m); \
297 \
298 _fp_udivmodti4(_qmem, _rmem, _r_f1, _r_f0, 0, Y##_f1); \
299 _q_f0 = _qmem[0]; \
300 umul_ppmm(_m_f1, _m_f0, _q_f0, Y##_f0); \
301 _r_f1 = _rmem[0]; \
302 _r_f0 = _n_f0; \
303 if (_FP_FRAC_GT_2(_m, _r)) \
304 { \
305 _q_f0--; \
306 _FP_FRAC_ADD_2(_r, _r, Y); \
307 if (_FP_FRAC_GE_2(_r, Y) && _FP_FRAC_GT_2(_m, _r)) \
308 { \
309 _q_f0--; \
310 _FP_FRAC_ADD_2(_r, _r, Y); \
311 } \
312 } \
313 _FP_FRAC_SUB_2(_r, _r, _m); \
314 \
315 R##_f1 = _q_f1; \
316 R##_f0 = _q_f0 | ((_r_f1 | _r_f0) != 0); \
317 /* adjust so answer is normalized again. I'm not sure what the \
318 * final sz param should be. In practice it's never used since \
319 * N is 1 which is always going to be < _FP_W_TYPE_SIZE... \
320 */ \
321 /* _FP_FRAC_SRS_2(R,1,_FP_WFRACBITS_##fs); */ \
322 } while (0)
323
324
325#define _FP_DIV_MEAT_2_gmp(fs, R, X, Y) \
326 do { \
327 _FP_W_TYPE _x[4], _y[2], _z[4]; \
328 _y[0] = Y##_f0; _y[1] = Y##_f1; \
329 _x[0] = _x[3] = 0; \
330 if (_FP_FRAC_GT_2(X, Y)) \
331 { \
332 R##_e++; \
333 _x[1] = (X##_f0 << (_FP_WFRACBITS-1 - _FP_W_TYPE_SIZE) | \
334 X##_f1 >> (_FP_W_TYPE_SIZE - \
335 (_FP_WFRACBITS-1 - _FP_W_TYPE_SIZE))); \
336 _x[2] = X##_f1 << (_FP_WFRACBITS-1 - _FP_W_TYPE_SIZE); \
337 } \
338 else \
339 { \
340 _x[1] = (X##_f0 << (_FP_WFRACBITS - _FP_W_TYPE_SIZE) | \
341 X##_f1 >> (_FP_W_TYPE_SIZE - \
342 (_FP_WFRACBITS - _FP_W_TYPE_SIZE))); \
343 _x[2] = X##_f1 << (_FP_WFRACBITS - _FP_W_TYPE_SIZE); \
344 } \
345 \
346 (void) mpn_divrem (_z, 0, _x, 4, _y, 2); \
347 R##_f1 = _z[1]; \
348 R##_f0 = _z[0] | ((_x[0] | _x[1]) != 0); \
349 } while (0)
350
351
352/*
353 * Square root algorithms:
354 * We have just one right now, maybe Newton approximation
355 * should be added for those machines where division is fast.
356 */
357
358#define _FP_SQRT_MEAT_2(R, S, T, X, q) \
359 do { \
360 while (q) \
361 { \
362 T##_f1 = S##_f1 + q; \
363 if (T##_f1 <= X##_f1) \
364 { \
365 S##_f1 = T##_f1 + q; \
366 X##_f1 -= T##_f1; \
367 R##_f1 += q; \
368 } \
369 _FP_FRAC_SLL_2(X, 1); \
370 q >>= 1; \
371 } \
372 q = (_FP_W_TYPE)1 << (_FP_W_TYPE_SIZE - 1); \
373 while (q) \
374 { \
375 T##_f0 = S##_f0 + q; \
376 T##_f1 = S##_f1; \
377 if (T##_f1 < X##_f1 || \
378 (T##_f1 == X##_f1 && T##_f0 < X##_f0)) \
379 { \
380 S##_f0 = T##_f0 + q; \
381 if (((_FP_WS_TYPE)T##_f0) < 0 && \
382 ((_FP_WS_TYPE)S##_f0) >= 0) \
383 S##_f1++; \
384 _FP_FRAC_SUB_2(X, X, T); \
385 R##_f0 += q; \
386 } \
387 _FP_FRAC_SLL_2(X, 1); \
388 q >>= 1; \
389 } \
390 } while (0)
391
392
393/*
394 * Assembly/disassembly for converting to/from integral types.
395 * No shifting or overflow handled here.
396 */
397
398#define _FP_FRAC_ASSEMBLE_2(r, X, rsize) \
399 do { \
400 if (rsize <= _FP_W_TYPE_SIZE) \
401 r = X##_f0; \
402 else \
403 { \
404 r = X##_f1; \
405 r <<= _FP_W_TYPE_SIZE; \
406 r += X##_f0; \
407 } \
408 } while (0)
409
410#define _FP_FRAC_DISASSEMBLE_2(X, r, rsize) \
411 do { \
412 X##_f0 = r; \
413 X##_f1 = (rsize <= _FP_W_TYPE_SIZE ? 0 : r >> _FP_W_TYPE_SIZE); \
414 } while (0)
415
416/*
417 * Convert FP values between word sizes
418 */
419
420#define _FP_FRAC_CONV_1_2(dfs, sfs, D, S) \
421 do { \
422 _FP_FRAC_SRS_2(S, (_FP_WFRACBITS_##sfs - _FP_WFRACBITS_##dfs), \
423 _FP_WFRACBITS_##sfs); \
424 D##_f = S##_f0; \
425 } while (0)
426
427#define _FP_FRAC_CONV_2_1(dfs, sfs, D, S) \
428 do { \
429 D##_f0 = S##_f; \
430 D##_f1 = 0; \
431 _FP_FRAC_SLL_2(D, (_FP_WFRACBITS_##dfs - _FP_WFRACBITS_##sfs)); \
432 } while (0)
433
diff --git a/arch/ppc/math-emu/op-4.h b/arch/ppc/math-emu/op-4.h
deleted file mode 100644
index fcdd6d064c54..000000000000
--- a/arch/ppc/math-emu/op-4.h
+++ /dev/null
@@ -1,297 +0,0 @@
1/*
2 * Basic four-word fraction declaration and manipulation.
3 *
4 * When adding quadword support for 32 bit machines, we need
5 * to be a little careful as double multiply uses some of these
6 * macros: (in op-2.h)
7 * _FP_MUL_MEAT_2_wide() uses _FP_FRAC_DECL_4, _FP_FRAC_WORD_4,
8 * _FP_FRAC_ADD_4, _FP_FRAC_SRS_4
9 * _FP_MUL_MEAT_2_gmp() uses _FP_FRAC_SRS_4 (and should use
10 * _FP_FRAC_DECL_4: it appears to be broken and is not used
11 * anywhere anyway. )
12 *
13 * I've now fixed all the macros that were here from the sparc64 code.
14 * [*none* of the shift macros were correct!] -- PMM 02/1998
15 *
16 * The only quadword stuff that remains to be coded is:
17 * 1) the conversion to/from ints, which requires
18 * that we check (in op-common.h) that the following do the right thing
19 * for quadwords: _FP_TO_INT(Q,4,r,X,rsz,rsg), _FP_FROM_INT(Q,4,X,r,rs,rt)
20 * 2) multiply, divide and sqrt, which require:
21 * _FP_MUL_MEAT_4_*(R,X,Y), _FP_DIV_MEAT_4_*(R,X,Y), _FP_SQRT_MEAT_4(R,S,T,X,q),
22 * This also needs _FP_MUL_MEAT_Q and _FP_DIV_MEAT_Q to be defined to
23 * some suitable _FP_MUL_MEAT_4_* macros in sfp-machine.h.
24 * [we're free to choose whatever FP_MUL_MEAT_4_* macros we need for
25 * these; they are used nowhere else. ]
26 */
27
28#define _FP_FRAC_DECL_4(X) _FP_W_TYPE X##_f[4]
29#define _FP_FRAC_COPY_4(D,S) \
30 (D##_f[0] = S##_f[0], D##_f[1] = S##_f[1], \
31 D##_f[2] = S##_f[2], D##_f[3] = S##_f[3])
32/* The _FP_FRAC_SET_n(X,I) macro is intended for use with another
33 * macro such as _FP_ZEROFRAC_n which returns n comma separated values.
34 * The result is that we get an expansion of __FP_FRAC_SET_n(X,I0,I1,I2,I3)
35 * which just assigns the In values to the array X##_f[].
36 * This is why the number of parameters doesn't appear to match
37 * at first glance... -- PMM
38 */
39#define _FP_FRAC_SET_4(X,I) __FP_FRAC_SET_4(X, I)
40#define _FP_FRAC_HIGH_4(X) (X##_f[3])
41#define _FP_FRAC_LOW_4(X) (X##_f[0])
42#define _FP_FRAC_WORD_4(X,w) (X##_f[w])
43
44#define _FP_FRAC_SLL_4(X,N) \
45 do { \
46 _FP_I_TYPE _up, _down, _skip, _i; \
47 _skip = (N) / _FP_W_TYPE_SIZE; \
48 _up = (N) % _FP_W_TYPE_SIZE; \
49 _down = _FP_W_TYPE_SIZE - _up; \
50 for (_i = 3; _i > _skip; --_i) \
51 X##_f[_i] = X##_f[_i-_skip] << _up | X##_f[_i-_skip-1] >> _down; \
52/* bugfixed: was X##_f[_i] <<= _up; -- PMM 02/1998 */ \
53 X##_f[_i] = X##_f[0] << _up; \
54 for (--_i; _i >= 0; --_i) \
55 X##_f[_i] = 0; \
56 } while (0)
57
58/* This one was broken too */
59#define _FP_FRAC_SRL_4(X,N) \
60 do { \
61 _FP_I_TYPE _up, _down, _skip, _i; \
62 _skip = (N) / _FP_W_TYPE_SIZE; \
63 _down = (N) % _FP_W_TYPE_SIZE; \
64 _up = _FP_W_TYPE_SIZE - _down; \
65 for (_i = 0; _i < 3-_skip; ++_i) \
66 X##_f[_i] = X##_f[_i+_skip] >> _down | X##_f[_i+_skip+1] << _up; \
67 X##_f[_i] = X##_f[3] >> _down; \
68 for (++_i; _i < 4; ++_i) \
69 X##_f[_i] = 0; \
70 } while (0)
71
72
73/* Right shift with sticky-lsb.
74 * What this actually means is that we do a standard right-shift,
75 * but that if any of the bits that fall off the right hand side
76 * were one then we always set the LSbit.
77 */
78#define _FP_FRAC_SRS_4(X,N,size) \
79 do { \
80 _FP_I_TYPE _up, _down, _skip, _i; \
81 _FP_W_TYPE _s; \
82 _skip = (N) / _FP_W_TYPE_SIZE; \
83 _down = (N) % _FP_W_TYPE_SIZE; \
84 _up = _FP_W_TYPE_SIZE - _down; \
85 for (_s = _i = 0; _i < _skip; ++_i) \
86 _s |= X##_f[_i]; \
87 _s |= X##_f[_i] << _up; \
88/* s is now != 0 if we want to set the LSbit */ \
89 for (_i = 0; _i < 3-_skip; ++_i) \
90 X##_f[_i] = X##_f[_i+_skip] >> _down | X##_f[_i+_skip+1] << _up; \
91 X##_f[_i] = X##_f[3] >> _down; \
92 for (++_i; _i < 4; ++_i) \
93 X##_f[_i] = 0; \
94 /* don't fix the LSB until the very end when we're sure f[0] is stable */ \
95 X##_f[0] |= (_s != 0); \
96 } while (0)
97
98#define _FP_FRAC_ADD_4(R,X,Y) \
99 __FP_FRAC_ADD_4(R##_f[3], R##_f[2], R##_f[1], R##_f[0], \
100 X##_f[3], X##_f[2], X##_f[1], X##_f[0], \
101 Y##_f[3], Y##_f[2], Y##_f[1], Y##_f[0])
102
103#define _FP_FRAC_SUB_4(R,X,Y) \
104 __FP_FRAC_SUB_4(R##_f[3], R##_f[2], R##_f[1], R##_f[0], \
105 X##_f[3], X##_f[2], X##_f[1], X##_f[0], \
106 Y##_f[3], Y##_f[2], Y##_f[1], Y##_f[0])
107
108#define _FP_FRAC_ADDI_4(X,I) \
109 __FP_FRAC_ADDI_4(X##_f[3], X##_f[2], X##_f[1], X##_f[0], I)
110
111#define _FP_ZEROFRAC_4 0,0,0,0
112#define _FP_MINFRAC_4 0,0,0,1
113
114#define _FP_FRAC_ZEROP_4(X) ((X##_f[0] | X##_f[1] | X##_f[2] | X##_f[3]) == 0)
115#define _FP_FRAC_NEGP_4(X) ((_FP_WS_TYPE)X##_f[3] < 0)
116#define _FP_FRAC_OVERP_4(fs,X) (X##_f[0] & _FP_OVERFLOW_##fs)
117
118#define _FP_FRAC_EQ_4(X,Y) \
119 (X##_f[0] == Y##_f[0] && X##_f[1] == Y##_f[1] \
120 && X##_f[2] == Y##_f[2] && X##_f[3] == Y##_f[3])
121
122#define _FP_FRAC_GT_4(X,Y) \
123 (X##_f[3] > Y##_f[3] || \
124 (X##_f[3] == Y##_f[3] && (X##_f[2] > Y##_f[2] || \
125 (X##_f[2] == Y##_f[2] && (X##_f[1] > Y##_f[1] || \
126 (X##_f[1] == Y##_f[1] && X##_f[0] > Y##_f[0]) \
127 )) \
128 )) \
129 )
130
131#define _FP_FRAC_GE_4(X,Y) \
132 (X##_f[3] > Y##_f[3] || \
133 (X##_f[3] == Y##_f[3] && (X##_f[2] > Y##_f[2] || \
134 (X##_f[2] == Y##_f[2] && (X##_f[1] > Y##_f[1] || \
135 (X##_f[1] == Y##_f[1] && X##_f[0] >= Y##_f[0]) \
136 )) \
137 )) \
138 )
139
140
141#define _FP_FRAC_CLZ_4(R,X) \
142 do { \
143 if (X##_f[3]) \
144 { \
145 __FP_CLZ(R,X##_f[3]); \
146 } \
147 else if (X##_f[2]) \
148 { \
149 __FP_CLZ(R,X##_f[2]); \
150 R += _FP_W_TYPE_SIZE; \
151 } \
152 else if (X##_f[1]) \
153 { \
154 __FP_CLZ(R,X##_f[2]); \
155 R += _FP_W_TYPE_SIZE*2; \
156 } \
157 else \
158 { \
159 __FP_CLZ(R,X##_f[0]); \
160 R += _FP_W_TYPE_SIZE*3; \
161 } \
162 } while(0)
163
164
165#define _FP_UNPACK_RAW_4(fs, X, val) \
166 do { \
167 union _FP_UNION_##fs _flo; _flo.flt = (val); \
168 X##_f[0] = _flo.bits.frac0; \
169 X##_f[1] = _flo.bits.frac1; \
170 X##_f[2] = _flo.bits.frac2; \
171 X##_f[3] = _flo.bits.frac3; \
172 X##_e = _flo.bits.exp; \
173 X##_s = _flo.bits.sign; \
174 } while (0)
175
176#define _FP_PACK_RAW_4(fs, val, X) \
177 do { \
178 union _FP_UNION_##fs _flo; \
179 _flo.bits.frac0 = X##_f[0]; \
180 _flo.bits.frac1 = X##_f[1]; \
181 _flo.bits.frac2 = X##_f[2]; \
182 _flo.bits.frac3 = X##_f[3]; \
183 _flo.bits.exp = X##_e; \
184 _flo.bits.sign = X##_s; \
185 (val) = _flo.flt; \
186 } while (0)
187
188
189/*
190 * Internals
191 */
192
193#define __FP_FRAC_SET_4(X,I3,I2,I1,I0) \
194 (X##_f[3] = I3, X##_f[2] = I2, X##_f[1] = I1, X##_f[0] = I0)
195
196#ifndef __FP_FRAC_ADD_4
197#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
198 (r0 = x0 + y0, \
199 r1 = x1 + y1 + (r0 < x0), \
200 r2 = x2 + y2 + (r1 < x1), \
201 r3 = x3 + y3 + (r2 < x2))
202#endif
203
204#ifndef __FP_FRAC_SUB_4
205#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
206 (r0 = x0 - y0, \
207 r1 = x1 - y1 - (r0 > x0), \
208 r2 = x2 - y2 - (r1 > x1), \
209 r3 = x3 - y3 - (r2 > x2))
210#endif
211
212#ifndef __FP_FRAC_ADDI_4
213/* I always wanted to be a lisp programmer :-> */
214#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \
215 (x3 += ((x2 += ((x1 += ((x0 += i) < x0)) < x1) < x2)))
216#endif
217
218/* Convert FP values between word sizes. This appears to be more
219 * complicated than I'd have expected it to be, so these might be
220 * wrong... These macros are in any case somewhat bogus because they
221 * use information about what various FRAC_n variables look like
222 * internally [eg, that 2 word vars are X_f0 and x_f1]. But so do
223 * the ones in op-2.h and op-1.h.
224 */
225#define _FP_FRAC_CONV_1_4(dfs, sfs, D, S) \
226 do { \
227 _FP_FRAC_SRS_4(S, (_FP_WFRACBITS_##sfs - _FP_WFRACBITS_##dfs), \
228 _FP_WFRACBITS_##sfs); \
229 D##_f = S##_f[0]; \
230 } while (0)
231
232#define _FP_FRAC_CONV_2_4(dfs, sfs, D, S) \
233 do { \
234 _FP_FRAC_SRS_4(S, (_FP_WFRACBITS_##sfs - _FP_WFRACBITS_##dfs), \
235 _FP_WFRACBITS_##sfs); \
236 D##_f0 = S##_f[0]; \
237 D##_f1 = S##_f[1]; \
238 } while (0)
239
240/* Assembly/disassembly for converting to/from integral types.
241 * No shifting or overflow handled here.
242 */
243/* Put the FP value X into r, which is an integer of size rsize. */
244#define _FP_FRAC_ASSEMBLE_4(r, X, rsize) \
245 do { \
246 if (rsize <= _FP_W_TYPE_SIZE) \
247 r = X##_f[0]; \
248 else if (rsize <= 2*_FP_W_TYPE_SIZE) \
249 { \
250 r = X##_f[1]; \
251 r <<= _FP_W_TYPE_SIZE; \
252 r += X##_f[0]; \
253 } \
254 else \
255 { \
256 /* I'm feeling lazy so we deal with int == 3words (implausible)*/ \
257 /* and int == 4words as a single case. */ \
258 r = X##_f[3]; \
259 r <<= _FP_W_TYPE_SIZE; \
260 r += X##_f[2]; \
261 r <<= _FP_W_TYPE_SIZE; \
262 r += X##_f[1]; \
263 r <<= _FP_W_TYPE_SIZE; \
264 r += X##_f[0]; \
265 } \
266 } while (0)
267
268/* "No disassemble Number Five!" */
269/* move an integer of size rsize into X's fractional part. We rely on
270 * the _f[] array consisting of words of size _FP_W_TYPE_SIZE to avoid
271 * having to mask the values we store into it.
272 */
273#define _FP_FRAC_DISASSEMBLE_4(X, r, rsize) \
274 do { \
275 X##_f[0] = r; \
276 X##_f[1] = (rsize <= _FP_W_TYPE_SIZE ? 0 : r >> _FP_W_TYPE_SIZE); \
277 X##_f[2] = (rsize <= 2*_FP_W_TYPE_SIZE ? 0 : r >> 2*_FP_W_TYPE_SIZE); \
278 X##_f[3] = (rsize <= 3*_FP_W_TYPE_SIZE ? 0 : r >> 3*_FP_W_TYPE_SIZE); \
279 } while (0)
280
281#define _FP_FRAC_CONV_4_1(dfs, sfs, D, S) \
282 do { \
283 D##_f[0] = S##_f; \
284 D##_f[1] = D##_f[2] = D##_f[3] = 0; \
285 _FP_FRAC_SLL_4(D, (_FP_WFRACBITS_##dfs - _FP_WFRACBITS_##sfs)); \
286 } while (0)
287
288#define _FP_FRAC_CONV_4_2(dfs, sfs, D, S) \
289 do { \
290 D##_f[0] = S##_f0; \
291 D##_f[1] = S##_f1; \
292 D##_f[2] = D##_f[3] = 0; \
293 _FP_FRAC_SLL_4(D, (_FP_WFRACBITS_##dfs - _FP_WFRACBITS_##sfs)); \
294 } while (0)
295
296/* FIXME! This has to be written */
297#define _FP_SQRT_MEAT_4(R, S, T, X, q)
diff --git a/arch/ppc/math-emu/op-common.h b/arch/ppc/math-emu/op-common.h
deleted file mode 100644
index afb82b6498ce..000000000000
--- a/arch/ppc/math-emu/op-common.h
+++ /dev/null
@@ -1,688 +0,0 @@
1#define _FP_DECL(wc, X) \
2 _FP_I_TYPE X##_c, X##_s, X##_e; \
3 _FP_FRAC_DECL_##wc(X)
4
5/*
6 * Finish truely unpacking a native fp value by classifying the kind
7 * of fp value and normalizing both the exponent and the fraction.
8 */
9
10#define _FP_UNPACK_CANONICAL(fs, wc, X) \
11do { \
12 switch (X##_e) \
13 { \
14 default: \
15 _FP_FRAC_HIGH_##wc(X) |= _FP_IMPLBIT_##fs; \
16 _FP_FRAC_SLL_##wc(X, _FP_WORKBITS); \
17 X##_e -= _FP_EXPBIAS_##fs; \
18 X##_c = FP_CLS_NORMAL; \
19 break; \
20 \
21 case 0: \
22 if (_FP_FRAC_ZEROP_##wc(X)) \
23 X##_c = FP_CLS_ZERO; \
24 else \
25 { \
26 /* a denormalized number */ \
27 _FP_I_TYPE _shift; \
28 _FP_FRAC_CLZ_##wc(_shift, X); \
29 _shift -= _FP_FRACXBITS_##fs; \
30 _FP_FRAC_SLL_##wc(X, (_shift+_FP_WORKBITS)); \
31 X##_e -= _FP_EXPBIAS_##fs - 1 + _shift; \
32 X##_c = FP_CLS_NORMAL; \
33 } \
34 break; \
35 \
36 case _FP_EXPMAX_##fs: \
37 if (_FP_FRAC_ZEROP_##wc(X)) \
38 X##_c = FP_CLS_INF; \
39 else \
40 /* we don't differentiate between signaling and quiet nans */ \
41 X##_c = FP_CLS_NAN; \
42 break; \
43 } \
44} while (0)
45
46
47/*
48 * Before packing the bits back into the native fp result, take care
49 * of such mundane things as rounding and overflow. Also, for some
50 * kinds of fp values, the original parts may not have been fully
51 * extracted -- but that is ok, we can regenerate them now.
52 */
53
54#define _FP_PACK_CANONICAL(fs, wc, X) \
55({int __ret = 0; \
56 switch (X##_c) \
57 { \
58 case FP_CLS_NORMAL: \
59 X##_e += _FP_EXPBIAS_##fs; \
60 if (X##_e > 0) \
61 { \
62 __ret |= _FP_ROUND(wc, X); \
63 if (_FP_FRAC_OVERP_##wc(fs, X)) \
64 { \
65 _FP_FRAC_SRL_##wc(X, (_FP_WORKBITS+1)); \
66 X##_e++; \
67 } \
68 else \
69 _FP_FRAC_SRL_##wc(X, _FP_WORKBITS); \
70 if (X##_e >= _FP_EXPMAX_##fs) \
71 { \
72 /* overflow to infinity */ \
73 X##_e = _FP_EXPMAX_##fs; \
74 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
75 __ret |= EFLAG_OVERFLOW; \
76 } \
77 } \
78 else \
79 { \
80 /* we've got a denormalized number */ \
81 X##_e = -X##_e + 1; \
82 if (X##_e <= _FP_WFRACBITS_##fs) \
83 { \
84 _FP_FRAC_SRS_##wc(X, X##_e, _FP_WFRACBITS_##fs); \
85 _FP_FRAC_SLL_##wc(X, 1); \
86 if (_FP_FRAC_OVERP_##wc(fs, X)) \
87 { \
88 X##_e = 1; \
89 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
90 } \
91 else \
92 { \
93 X##_e = 0; \
94 _FP_FRAC_SRL_##wc(X, _FP_WORKBITS+1); \
95 __ret |= EFLAG_UNDERFLOW; \
96 } \
97 } \
98 else \
99 { \
100 /* underflow to zero */ \
101 X##_e = 0; \
102 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
103 __ret |= EFLAG_UNDERFLOW; \
104 } \
105 } \
106 break; \
107 \
108 case FP_CLS_ZERO: \
109 X##_e = 0; \
110 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
111 break; \
112 \
113 case FP_CLS_INF: \
114 X##_e = _FP_EXPMAX_##fs; \
115 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
116 break; \
117 \
118 case FP_CLS_NAN: \
119 X##_e = _FP_EXPMAX_##fs; \
120 if (!_FP_KEEPNANFRACP) \
121 { \
122 _FP_FRAC_SET_##wc(X, _FP_NANFRAC_##fs); \
123 X##_s = 0; \
124 } \
125 else \
126 _FP_FRAC_HIGH_##wc(X) |= _FP_QNANBIT_##fs; \
127 break; \
128 } \
129 __ret; \
130})
131
132
133/*
134 * Main addition routine. The input values should be cooked.
135 */
136
137#define _FP_ADD(fs, wc, R, X, Y) \
138do { \
139 switch (_FP_CLS_COMBINE(X##_c, Y##_c)) \
140 { \
141 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NORMAL): \
142 { \
143 /* shift the smaller number so that its exponent matches the larger */ \
144 _FP_I_TYPE diff = X##_e - Y##_e; \
145 \
146 if (diff < 0) \
147 { \
148 diff = -diff; \
149 if (diff <= _FP_WFRACBITS_##fs) \
150 _FP_FRAC_SRS_##wc(X, diff, _FP_WFRACBITS_##fs); \
151 else if (!_FP_FRAC_ZEROP_##wc(X)) \
152 _FP_FRAC_SET_##wc(X, _FP_MINFRAC_##wc); \
153 else \
154 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
155 R##_e = Y##_e; \
156 } \
157 else \
158 { \
159 if (diff > 0) \
160 { \
161 if (diff <= _FP_WFRACBITS_##fs) \
162 _FP_FRAC_SRS_##wc(Y, diff, _FP_WFRACBITS_##fs); \
163 else if (!_FP_FRAC_ZEROP_##wc(Y)) \
164 _FP_FRAC_SET_##wc(Y, _FP_MINFRAC_##wc); \
165 else \
166 _FP_FRAC_SET_##wc(Y, _FP_ZEROFRAC_##wc); \
167 } \
168 R##_e = X##_e; \
169 } \
170 \
171 R##_c = FP_CLS_NORMAL; \
172 \
173 if (X##_s == Y##_s) \
174 { \
175 R##_s = X##_s; \
176 _FP_FRAC_ADD_##wc(R, X, Y); \
177 if (_FP_FRAC_OVERP_##wc(fs, R)) \
178 { \
179 _FP_FRAC_SRS_##wc(R, 1, _FP_WFRACBITS_##fs); \
180 R##_e++; \
181 } \
182 } \
183 else \
184 { \
185 R##_s = X##_s; \
186 _FP_FRAC_SUB_##wc(R, X, Y); \
187 if (_FP_FRAC_ZEROP_##wc(R)) \
188 { \
189 /* return an exact zero */ \
190 if (FP_ROUNDMODE == FP_RND_MINF) \
191 R##_s |= Y##_s; \
192 else \
193 R##_s &= Y##_s; \
194 R##_c = FP_CLS_ZERO; \
195 } \
196 else \
197 { \
198 if (_FP_FRAC_NEGP_##wc(R)) \
199 { \
200 _FP_FRAC_SUB_##wc(R, Y, X); \
201 R##_s = Y##_s; \
202 } \
203 \
204 /* renormalize after subtraction */ \
205 _FP_FRAC_CLZ_##wc(diff, R); \
206 diff -= _FP_WFRACXBITS_##fs; \
207 if (diff) \
208 { \
209 R##_e -= diff; \
210 _FP_FRAC_SLL_##wc(R, diff); \
211 } \
212 } \
213 } \
214 break; \
215 } \
216 \
217 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NAN): \
218 _FP_CHOOSENAN(fs, wc, R, X, Y); \
219 break; \
220 \
221 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_ZERO): \
222 R##_e = X##_e; \
223 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NORMAL): \
224 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_INF): \
225 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_ZERO): \
226 _FP_FRAC_COPY_##wc(R, X); \
227 R##_s = X##_s; \
228 R##_c = X##_c; \
229 break; \
230 \
231 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NORMAL): \
232 R##_e = Y##_e; \
233 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NAN): \
234 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NAN): \
235 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NAN): \
236 _FP_FRAC_COPY_##wc(R, Y); \
237 R##_s = Y##_s; \
238 R##_c = Y##_c; \
239 break; \
240 \
241 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF): \
242 if (X##_s != Y##_s) \
243 { \
244 /* +INF + -INF => NAN */ \
245 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
246 R##_s = X##_s ^ Y##_s; \
247 R##_c = FP_CLS_NAN; \
248 break; \
249 } \
250 /* FALLTHRU */ \
251 \
252 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL): \
253 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO): \
254 R##_s = X##_s; \
255 R##_c = FP_CLS_INF; \
256 break; \
257 \
258 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_INF): \
259 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_INF): \
260 R##_s = Y##_s; \
261 R##_c = FP_CLS_INF; \
262 break; \
263 \
264 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO): \
265 /* make sure the sign is correct */ \
266 if (FP_ROUNDMODE == FP_RND_MINF) \
267 R##_s = X##_s | Y##_s; \
268 else \
269 R##_s = X##_s & Y##_s; \
270 R##_c = FP_CLS_ZERO; \
271 break; \
272 \
273 default: \
274 abort(); \
275 } \
276} while (0)
277
278
279/*
280 * Main negation routine. FIXME -- when we care about setting exception
281 * bits reliably, this will not do. We should examine all of the fp classes.
282 */
283
284#define _FP_NEG(fs, wc, R, X) \
285 do { \
286 _FP_FRAC_COPY_##wc(R, X); \
287 R##_c = X##_c; \
288 R##_e = X##_e; \
289 R##_s = 1 ^ X##_s; \
290 } while (0)
291
292
293/*
294 * Main multiplication routine. The input values should be cooked.
295 */
296
297#define _FP_MUL(fs, wc, R, X, Y) \
298do { \
299 R##_s = X##_s ^ Y##_s; \
300 switch (_FP_CLS_COMBINE(X##_c, Y##_c)) \
301 { \
302 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NORMAL): \
303 R##_c = FP_CLS_NORMAL; \
304 R##_e = X##_e + Y##_e + 1; \
305 \
306 _FP_MUL_MEAT_##fs(R,X,Y); \
307 \
308 if (_FP_FRAC_OVERP_##wc(fs, R)) \
309 _FP_FRAC_SRS_##wc(R, 1, _FP_WFRACBITS_##fs); \
310 else \
311 R##_e--; \
312 break; \
313 \
314 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NAN): \
315 _FP_CHOOSENAN(fs, wc, R, X, Y); \
316 break; \
317 \
318 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NORMAL): \
319 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_INF): \
320 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_ZERO): \
321 R##_s = X##_s; \
322 \
323 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF): \
324 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL): \
325 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NORMAL): \
326 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO): \
327 _FP_FRAC_COPY_##wc(R, X); \
328 R##_c = X##_c; \
329 break; \
330 \
331 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NAN): \
332 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NAN): \
333 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NAN): \
334 R##_s = Y##_s; \
335 \
336 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_INF): \
337 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_ZERO): \
338 _FP_FRAC_COPY_##wc(R, Y); \
339 R##_c = Y##_c; \
340 break; \
341 \
342 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO): \
343 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_INF): \
344 R##_c = FP_CLS_NAN; \
345 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
346 break; \
347 \
348 default: \
349 abort(); \
350 } \
351} while (0)
352
353
354/*
355 * Main division routine. The input values should be cooked.
356 */
357
358#define _FP_DIV(fs, wc, R, X, Y) \
359do { \
360 R##_s = X##_s ^ Y##_s; \
361 switch (_FP_CLS_COMBINE(X##_c, Y##_c)) \
362 { \
363 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NORMAL): \
364 R##_c = FP_CLS_NORMAL; \
365 R##_e = X##_e - Y##_e; \
366 \
367 _FP_DIV_MEAT_##fs(R,X,Y); \
368 break; \
369 \
370 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NAN): \
371 _FP_CHOOSENAN(fs, wc, R, X, Y); \
372 break; \
373 \
374 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_NORMAL): \
375 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_INF): \
376 case _FP_CLS_COMBINE(FP_CLS_NAN,FP_CLS_ZERO): \
377 R##_s = X##_s; \
378 _FP_FRAC_COPY_##wc(R, X); \
379 R##_c = X##_c; \
380 break; \
381 \
382 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_NAN): \
383 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NAN): \
384 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NAN): \
385 R##_s = Y##_s; \
386 _FP_FRAC_COPY_##wc(R, Y); \
387 R##_c = Y##_c; \
388 break; \
389 \
390 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_INF): \
391 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_INF): \
392 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_NORMAL): \
393 R##_c = FP_CLS_ZERO; \
394 break; \
395 \
396 case _FP_CLS_COMBINE(FP_CLS_NORMAL,FP_CLS_ZERO): \
397 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_ZERO): \
398 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_NORMAL): \
399 R##_c = FP_CLS_INF; \
400 break; \
401 \
402 case _FP_CLS_COMBINE(FP_CLS_INF,FP_CLS_INF): \
403 case _FP_CLS_COMBINE(FP_CLS_ZERO,FP_CLS_ZERO): \
404 R##_c = FP_CLS_NAN; \
405 _FP_FRAC_SET_##wc(R, _FP_NANFRAC_##fs); \
406 break; \
407 \
408 default: \
409 abort(); \
410 } \
411} while (0)
412
413
414/*
415 * Main differential comparison routine. The inputs should be raw not
416 * cooked. The return is -1,0,1 for normal values, 2 otherwise.
417 */
418
419#define _FP_CMP(fs, wc, ret, X, Y, un) \
420 do { \
421 /* NANs are unordered */ \
422 if ((X##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(X)) \
423 || (Y##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(Y))) \
424 { \
425 ret = un; \
426 } \
427 else \
428 { \
429 int __x_zero = (!X##_e && _FP_FRAC_ZEROP_##wc(X)) ? 1 : 0; \
430 int __y_zero = (!Y##_e && _FP_FRAC_ZEROP_##wc(Y)) ? 1 : 0; \
431 \
432 if (__x_zero && __y_zero) \
433 ret = 0; \
434 else if (__x_zero) \
435 ret = Y##_s ? 1 : -1; \
436 else if (__y_zero) \
437 ret = X##_s ? -1 : 1; \
438 else if (X##_s != Y##_s) \
439 ret = X##_s ? -1 : 1; \
440 else if (X##_e > Y##_e) \
441 ret = X##_s ? -1 : 1; \
442 else if (X##_e < Y##_e) \
443 ret = X##_s ? 1 : -1; \
444 else if (_FP_FRAC_GT_##wc(X, Y)) \
445 ret = X##_s ? -1 : 1; \
446 else if (_FP_FRAC_GT_##wc(Y, X)) \
447 ret = X##_s ? 1 : -1; \
448 else \
449 ret = 0; \
450 } \
451 } while (0)
452
453
454/* Simplification for strict equality. */
455
456#define _FP_CMP_EQ(fs, wc, ret, X, Y) \
457 do { \
458 /* NANs are unordered */ \
459 if ((X##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(X)) \
460 || (Y##_e == _FP_EXPMAX_##fs && !_FP_FRAC_ZEROP_##wc(Y))) \
461 { \
462 ret = 1; \
463 } \
464 else \
465 { \
466 ret = !(X##_e == Y##_e \
467 && _FP_FRAC_EQ_##wc(X, Y) \
468 && (X##_s == Y##_s || !X##_e && _FP_FRAC_ZEROP_##wc(X))); \
469 } \
470 } while (0)
471
472/*
473 * Main square root routine. The input value should be cooked.
474 */
475
476#define _FP_SQRT(fs, wc, R, X) \
477do { \
478 _FP_FRAC_DECL_##wc(T); _FP_FRAC_DECL_##wc(S); \
479 _FP_W_TYPE q; \
480 switch (X##_c) \
481 { \
482 case FP_CLS_NAN: \
483 R##_s = 0; \
484 R##_c = FP_CLS_NAN; \
485 _FP_FRAC_SET_##wc(X, _FP_ZEROFRAC_##wc); \
486 break; \
487 case FP_CLS_INF: \
488 if (X##_s) \
489 { \
490 R##_s = 0; \
491 R##_c = FP_CLS_NAN; /* sNAN */ \
492 } \
493 else \
494 { \
495 R##_s = 0; \
496 R##_c = FP_CLS_INF; /* sqrt(+inf) = +inf */ \
497 } \
498 break; \
499 case FP_CLS_ZERO: \
500 R##_s = X##_s; \
501 R##_c = FP_CLS_ZERO; /* sqrt(+-0) = +-0 */ \
502 break; \
503 case FP_CLS_NORMAL: \
504 R##_s = 0; \
505 if (X##_s) \
506 { \
507 R##_c = FP_CLS_NAN; /* sNAN */ \
508 break; \
509 } \
510 R##_c = FP_CLS_NORMAL; \
511 if (X##_e & 1) \
512 _FP_FRAC_SLL_##wc(X, 1); \
513 R##_e = X##_e >> 1; \
514 _FP_FRAC_SET_##wc(S, _FP_ZEROFRAC_##wc); \
515 _FP_FRAC_SET_##wc(R, _FP_ZEROFRAC_##wc); \
516 q = _FP_OVERFLOW_##fs; \
517 _FP_FRAC_SLL_##wc(X, 1); \
518 _FP_SQRT_MEAT_##wc(R, S, T, X, q); \
519 _FP_FRAC_SRL_##wc(R, 1); \
520 } \
521 } while (0)
522
523/*
524 * Convert from FP to integer
525 */
526
527/* "When a NaN, infinity, large positive argument >= 2147483648.0, or
528 * large negative argument <= -2147483649.0 is converted to an integer,
529 * the invalid_current bit...should be set and fp_exception_IEEE_754 should
530 * be raised. If the floating point invalid trap is disabled, no trap occurs
531 * and a numerical result is generated: if the sign bit of the operand
532 * is 0, the result is 2147483647; if the sign bit of the operand is 1,
533 * the result is -2147483648."
534 * Similarly for conversion to extended ints, except that the boundaries
535 * are >= 2^63, <= -(2^63 + 1), and the results are 2^63 + 1 for s=0 and
536 * -2^63 for s=1.
537 * -- SPARC Architecture Manual V9, Appendix B, which specifies how
538 * SPARCs resolve implementation dependencies in the IEEE-754 spec.
539 * I don't believe that the code below follows this. I'm not even sure
540 * it's right!
541 * It doesn't cope with needing to convert to an n bit integer when there
542 * is no n bit integer type. Fortunately gcc provides long long so this
543 * isn't a problem for sparc32.
544 * I have, however, fixed its NaN handling to conform as above.
545 * -- PMM 02/1998
546 * NB: rsigned is not 'is r declared signed?' but 'should the value stored
547 * in r be signed or unsigned?'. r is always(?) declared unsigned.
548 * Comments below are mine, BTW -- PMM
549 */
550#define _FP_TO_INT(fs, wc, r, X, rsize, rsigned) \
551 do { \
552 switch (X##_c) \
553 { \
554 case FP_CLS_NORMAL: \
555 if (X##_e < 0) \
556 { \
557 /* case FP_CLS_NAN: see above! */ \
558 case FP_CLS_ZERO: \
559 r = 0; \
560 } \
561 else if (X##_e >= rsize - (rsigned != 0)) \
562 { /* overflow */ \
563 case FP_CLS_NAN: \
564 case FP_CLS_INF: \
565 if (rsigned) \
566 { \
567 r = 1; \
568 r <<= rsize - 1; \
569 r -= 1 - X##_s; \
570 } \
571 else \
572 { \
573 r = 0; \
574 if (!X##_s) \
575 r = ~r; \
576 } \
577 } \
578 else \
579 { \
580 if (_FP_W_TYPE_SIZE*wc < rsize) \
581 { \
582 _FP_FRAC_ASSEMBLE_##wc(r, X, rsize); \
583 r <<= X##_e - _FP_WFRACBITS_##fs; \
584 } \
585 else \
586 { \
587 if (X##_e >= _FP_WFRACBITS_##fs) \
588 _FP_FRAC_SLL_##wc(X, (X##_e - _FP_WFRACBITS_##fs + 1));\
589 else \
590 _FP_FRAC_SRL_##wc(X, (_FP_WFRACBITS_##fs - X##_e - 1));\
591 _FP_FRAC_ASSEMBLE_##wc(r, X, rsize); \
592 } \
593 if (rsigned && X##_s) \
594 r = -r; \
595 } \
596 break; \
597 } \
598 } while (0)
599
600#define _FP_FROM_INT(fs, wc, X, r, rsize, rtype) \
601 do { \
602 if (r) \
603 { \
604 X##_c = FP_CLS_NORMAL; \
605 \
606 if ((X##_s = (r < 0))) \
607 r = -r; \
608 /* Note that `r' is now considered unsigned, so we don't have \
609 to worry about the single signed overflow case. */ \
610 \
611 if (rsize <= _FP_W_TYPE_SIZE) \
612 __FP_CLZ(X##_e, r); \
613 else \
614 __FP_CLZ_2(X##_e, (_FP_W_TYPE)(r >> _FP_W_TYPE_SIZE), \
615 (_FP_W_TYPE)r); \
616 if (rsize < _FP_W_TYPE_SIZE) \
617 X##_e -= (_FP_W_TYPE_SIZE - rsize); \
618 X##_e = rsize - X##_e - 1; \
619 \
620 if (_FP_FRACBITS_##fs < rsize && _FP_WFRACBITS_##fs < X##_e) \
621 __FP_FRAC_SRS_1(r, (X##_e - _FP_WFRACBITS_##fs), rsize); \
622 r &= ~((_FP_W_TYPE)1 << X##_e); \
623 _FP_FRAC_DISASSEMBLE_##wc(X, ((unsigned rtype)r), rsize); \
624 _FP_FRAC_SLL_##wc(X, (_FP_WFRACBITS_##fs - X##_e - 1)); \
625 } \
626 else \
627 { \
628 X##_c = FP_CLS_ZERO, X##_s = 0; \
629 } \
630 } while (0)
631
632
633#define FP_CONV(dfs,sfs,dwc,swc,D,S) \
634 do { \
635 _FP_FRAC_CONV_##dwc##_##swc(dfs, sfs, D, S); \
636 D##_e = S##_e; \
637 D##_c = S##_c; \
638 D##_s = S##_s; \
639 } while (0)
640
641/*
642 * Helper primitives.
643 */
644
645/* Count leading zeros in a word. */
646
647#ifndef __FP_CLZ
648#if _FP_W_TYPE_SIZE < 64
649/* this is just to shut the compiler up about shifts > word length -- PMM 02/1998 */
650#define __FP_CLZ(r, x) \
651 do { \
652 _FP_W_TYPE _t = (x); \
653 r = _FP_W_TYPE_SIZE - 1; \
654 if (_t > 0xffff) r -= 16; \
655 if (_t > 0xffff) _t >>= 16; \
656 if (_t > 0xff) r -= 8; \
657 if (_t > 0xff) _t >>= 8; \
658 if (_t & 0xf0) r -= 4; \
659 if (_t & 0xf0) _t >>= 4; \
660 if (_t & 0xc) r -= 2; \
661 if (_t & 0xc) _t >>= 2; \
662 if (_t & 0x2) r -= 1; \
663 } while (0)
664#else /* not _FP_W_TYPE_SIZE < 64 */
665#define __FP_CLZ(r, x) \
666 do { \
667 _FP_W_TYPE _t = (x); \
668 r = _FP_W_TYPE_SIZE - 1; \
669 if (_t > 0xffffffff) r -= 32; \
670 if (_t > 0xffffffff) _t >>= 32; \
671 if (_t > 0xffff) r -= 16; \
672 if (_t > 0xffff) _t >>= 16; \
673 if (_t > 0xff) r -= 8; \
674 if (_t > 0xff) _t >>= 8; \
675 if (_t & 0xf0) r -= 4; \
676 if (_t & 0xf0) _t >>= 4; \
677 if (_t & 0xc) r -= 2; \
678 if (_t & 0xc) _t >>= 2; \
679 if (_t & 0x2) r -= 1; \
680 } while (0)
681#endif /* not _FP_W_TYPE_SIZE < 64 */
682#endif /* ndef __FP_CLZ */
683
684#define _FP_DIV_HELP_imm(q, r, n, d) \
685 do { \
686 q = n / d, r = n % d; \
687 } while (0)
688
diff --git a/arch/ppc/math-emu/sfp-machine.h b/arch/ppc/math-emu/sfp-machine.h
deleted file mode 100644
index 4b17d83cfcdd..000000000000
--- a/arch/ppc/math-emu/sfp-machine.h
+++ /dev/null
@@ -1,377 +0,0 @@
1/* Machine-dependent software floating-point definitions. PPC version.
2 Copyright (C) 1997 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Library General Public License as
7 published by the Free Software Foundation; either version 2 of the
8 License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Library General Public License for more details.
14
15 You should have received a copy of the GNU Library General Public
16 License along with the GNU C Library; see the file COPYING.LIB. If
17 not, write to the Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 Actually, this is a PPC (32bit) version, written based on the
21 i386, sparc, and sparc64 versions, by me,
22 Peter Maydell (pmaydell@chiark.greenend.org.uk).
23 Comments are by and large also mine, although they may be inaccurate.
24
25 In picking out asm fragments I've gone with the lowest common
26 denominator, which also happens to be the hardware I have :->
27 That is, a SPARC without hardware multiply and divide.
28 */
29
30/* basic word size definitions */
31#define _FP_W_TYPE_SIZE 32
32#define _FP_W_TYPE unsigned long
33#define _FP_WS_TYPE signed long
34#define _FP_I_TYPE long
35
36#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
37#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
38#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
39
40/* You can optionally code some things like addition in asm. For
41 * example, i386 defines __FP_FRAC_ADD_2 as asm. If you don't
42 * then you get a fragment of C code [if you change an #ifdef 0
43 * in op-2.h] or a call to add_ssaaaa (see below).
44 * Good places to look for asm fragments to use are gcc and glibc.
45 * gcc's longlong.h is useful.
46 */
47
48/* We need to know how to multiply and divide. If the host word size
49 * is >= 2*fracbits you can use FP_MUL_MEAT_n_imm(t,R,X,Y) which
50 * codes the multiply with whatever gcc does to 'a * b'.
51 * _FP_MUL_MEAT_n_wide(t,R,X,Y,f) is used when you have an asm
52 * function that can multiply two 1W values and get a 2W result.
53 * Otherwise you're stuck with _FP_MUL_MEAT_n_hard(t,R,X,Y) which
54 * does bitshifting to avoid overflow.
55 * For division there is FP_DIV_MEAT_n_imm(t,R,X,Y,f) for word size
56 * >= 2*fracbits, where f is either _FP_DIV_HELP_imm or
57 * _FP_DIV_HELP_ldiv (see op-1.h).
58 * _FP_DIV_MEAT_udiv() is if you have asm to do 2W/1W => (1W, 1W).
59 * [GCC and glibc have longlong.h which has the asm macro udiv_qrnnd
60 * to do this.]
61 * In general, 'n' is the number of words required to hold the type,
62 * and 't' is either S, D or Q for single/double/quad.
63 * -- PMM
64 */
65/* Example: SPARC64:
66 * #define _FP_MUL_MEAT_S(R,X,Y) _FP_MUL_MEAT_1_imm(S,R,X,Y)
67 * #define _FP_MUL_MEAT_D(R,X,Y) _FP_MUL_MEAT_1_wide(D,R,X,Y,umul_ppmm)
68 * #define _FP_MUL_MEAT_Q(R,X,Y) _FP_MUL_MEAT_2_wide(Q,R,X,Y,umul_ppmm)
69 *
70 * #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
71 * #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv(D,R,X,Y)
72 * #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv_64(Q,R,X,Y)
73 *
74 * Example: i386:
75 * #define _FP_MUL_MEAT_S(R,X,Y) _FP_MUL_MEAT_1_wide(S,R,X,Y,_i386_mul_32_64)
76 * #define _FP_MUL_MEAT_D(R,X,Y) _FP_MUL_MEAT_2_wide(D,R,X,Y,_i386_mul_32_64)
77 *
78 * #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y,_i386_div_64_32)
79 * #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv_64(D,R,X,Y)
80 */
81
82#define _FP_MUL_MEAT_S(R,X,Y) _FP_MUL_MEAT_1_wide(S,R,X,Y,umul_ppmm)
83#define _FP_MUL_MEAT_D(R,X,Y) _FP_MUL_MEAT_2_wide(D,R,X,Y,umul_ppmm)
84
85#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y)
86#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv_64(D,R,X,Y)
87
88/* These macros define what NaN looks like. They're supposed to expand to
89 * a comma-separated set of 32bit unsigned ints that encode NaN.
90 */
91#define _FP_NANFRAC_S _FP_QNANBIT_S
92#define _FP_NANFRAC_D _FP_QNANBIT_D, 0
93#define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0
94
95#define _FP_KEEPNANFRACP 1
96
97/* This macro appears to be called when both X and Y are NaNs, and
98 * has to choose one and copy it to R. i386 goes for the larger of the
99 * two, sparc64 just picks Y. I don't understand this at all so I'll
100 * go with sparc64 because it's shorter :-> -- PMM
101 */
102#define _FP_CHOOSENAN(fs, wc, R, X, Y) \
103 do { \
104 R##_s = Y##_s; \
105 _FP_FRAC_COPY_##wc(R,Y); \
106 R##_c = FP_CLS_NAN; \
107 } while (0)
108
109
110extern void fp_unpack_d(long *, unsigned long *, unsigned long *,
111 long *, long *, void *);
112extern int fp_pack_d(void *, long, unsigned long, unsigned long, long, long);
113extern int fp_pack_ds(void *, long, unsigned long, unsigned long, long, long);
114
115#define __FP_UNPACK_RAW_1(fs, X, val) \
116 do { \
117 union _FP_UNION_##fs *_flo = \
118 (union _FP_UNION_##fs *)val; \
119 \
120 X##_f = _flo->bits.frac; \
121 X##_e = _flo->bits.exp; \
122 X##_s = _flo->bits.sign; \
123 } while (0)
124
125#define __FP_UNPACK_RAW_2(fs, X, val) \
126 do { \
127 union _FP_UNION_##fs *_flo = \
128 (union _FP_UNION_##fs *)val; \
129 \
130 X##_f0 = _flo->bits.frac0; \
131 X##_f1 = _flo->bits.frac1; \
132 X##_e = _flo->bits.exp; \
133 X##_s = _flo->bits.sign; \
134 } while (0)
135
136#define __FP_UNPACK_S(X,val) \
137 do { \
138 __FP_UNPACK_RAW_1(S,X,val); \
139 _FP_UNPACK_CANONICAL(S,1,X); \
140 } while (0)
141
142#define __FP_UNPACK_D(X,val) \
143 fp_unpack_d(&X##_s, &X##_f1, &X##_f0, &X##_e, &X##_c, val)
144
145#define __FP_PACK_RAW_1(fs, val, X) \
146 do { \
147 union _FP_UNION_##fs *_flo = \
148 (union _FP_UNION_##fs *)val; \
149 \
150 _flo->bits.frac = X##_f; \
151 _flo->bits.exp = X##_e; \
152 _flo->bits.sign = X##_s; \
153 } while (0)
154
155#define __FP_PACK_RAW_2(fs, val, X) \
156 do { \
157 union _FP_UNION_##fs *_flo = \
158 (union _FP_UNION_##fs *)val; \
159 \
160 _flo->bits.frac0 = X##_f0; \
161 _flo->bits.frac1 = X##_f1; \
162 _flo->bits.exp = X##_e; \
163 _flo->bits.sign = X##_s; \
164 } while (0)
165
166#include <linux/kernel.h>
167#include <linux/sched.h>
168
169#define __FPU_FPSCR (current->thread.fpscr.val)
170
171/* We only actually write to the destination register
172 * if exceptions signalled (if any) will not trap.
173 */
174#define __FPU_ENABLED_EXC \
175({ \
176 (__FPU_FPSCR >> 3) & 0x1f; \
177})
178
179#define __FPU_TRAP_P(bits) \
180 ((__FPU_ENABLED_EXC & (bits)) != 0)
181
182#define __FP_PACK_S(val,X) \
183({ int __exc = _FP_PACK_CANONICAL(S,1,X); \
184 if(!__exc || !__FPU_TRAP_P(__exc)) \
185 __FP_PACK_RAW_1(S,val,X); \
186 __exc; \
187})
188
189#define __FP_PACK_D(val,X) \
190 fp_pack_d(val, X##_s, X##_f1, X##_f0, X##_e, X##_c)
191
192#define __FP_PACK_DS(val,X) \
193 fp_pack_ds(val, X##_s, X##_f1, X##_f0, X##_e, X##_c)
194
195/* Obtain the current rounding mode. */
196#define FP_ROUNDMODE \
197({ \
198 __FPU_FPSCR & 0x3; \
199})
200
201/* the asm fragments go here: all these are taken from glibc-2.0.5's
202 * stdlib/longlong.h
203 */
204
205#include <linux/types.h>
206#include <asm/byteorder.h>
207
208/* add_ssaaaa is used in op-2.h and should be equivalent to
209 * #define add_ssaaaa(sh,sl,ah,al,bh,bl) (sh = ah+bh+ (( sl = al+bl) < al))
210 * add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
211 * high_addend_2, low_addend_2) adds two UWtype integers, composed by
212 * HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
213 * respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow
214 * (i.e. carry out) is not stored anywhere, and is lost.
215 */
216#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
217 do { \
218 if (__builtin_constant_p (bh) && (bh) == 0) \
219 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
220 : "=r" ((USItype)(sh)), \
221 "=&r" ((USItype)(sl)) \
222 : "%r" ((USItype)(ah)), \
223 "%r" ((USItype)(al)), \
224 "rI" ((USItype)(bl))); \
225 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
226 __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
227 : "=r" ((USItype)(sh)), \
228 "=&r" ((USItype)(sl)) \
229 : "%r" ((USItype)(ah)), \
230 "%r" ((USItype)(al)), \
231 "rI" ((USItype)(bl))); \
232 else \
233 __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
234 : "=r" ((USItype)(sh)), \
235 "=&r" ((USItype)(sl)) \
236 : "%r" ((USItype)(ah)), \
237 "r" ((USItype)(bh)), \
238 "%r" ((USItype)(al)), \
239 "rI" ((USItype)(bl))); \
240 } while (0)
241
242/* sub_ddmmss is used in op-2.h and udivmodti4.c and should be equivalent to
243 * #define sub_ddmmss(sh, sl, ah, al, bh, bl) (sh = ah-bh - ((sl = al-bl) > al))
244 * sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
245 * high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
246 * composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
247 * LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE
248 * and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
249 * and is lost.
250 */
251#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
252 do { \
253 if (__builtin_constant_p (ah) && (ah) == 0) \
254 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
255 : "=r" ((USItype)(sh)), \
256 "=&r" ((USItype)(sl)) \
257 : "r" ((USItype)(bh)), \
258 "rI" ((USItype)(al)), \
259 "r" ((USItype)(bl))); \
260 else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0) \
261 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
262 : "=r" ((USItype)(sh)), \
263 "=&r" ((USItype)(sl)) \
264 : "r" ((USItype)(bh)), \
265 "rI" ((USItype)(al)), \
266 "r" ((USItype)(bl))); \
267 else if (__builtin_constant_p (bh) && (bh) == 0) \
268 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
269 : "=r" ((USItype)(sh)), \
270 "=&r" ((USItype)(sl)) \
271 : "r" ((USItype)(ah)), \
272 "rI" ((USItype)(al)), \
273 "r" ((USItype)(bl))); \
274 else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0) \
275 __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
276 : "=r" ((USItype)(sh)), \
277 "=&r" ((USItype)(sl)) \
278 : "r" ((USItype)(ah)), \
279 "rI" ((USItype)(al)), \
280 "r" ((USItype)(bl))); \
281 else \
282 __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
283 : "=r" ((USItype)(sh)), \
284 "=&r" ((USItype)(sl)) \
285 : "r" ((USItype)(ah)), \
286 "r" ((USItype)(bh)), \
287 "rI" ((USItype)(al)), \
288 "r" ((USItype)(bl))); \
289 } while (0)
290
291/* asm fragments for mul and div */
292
293/* umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
294 * UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
295 * word product in HIGH_PROD and LOW_PROD.
296 */
297#define umul_ppmm(ph, pl, m0, m1) \
298 do { \
299 USItype __m0 = (m0), __m1 = (m1); \
300 __asm__ ("mulhwu %0,%1,%2" \
301 : "=r" ((USItype)(ph)) \
302 : "%r" (__m0), \
303 "r" (__m1)); \
304 (pl) = __m0 * __m1; \
305 } while (0)
306
307/* udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
308 * denominator) divides a UDWtype, composed by the UWtype integers
309 * HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
310 * in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less
311 * than DENOMINATOR for correct operation. If, in addition, the most
312 * significant bit of DENOMINATOR must be 1, then the pre-processor symbol
313 * UDIV_NEEDS_NORMALIZATION is defined to 1.
314 */
315#define udiv_qrnnd(q, r, n1, n0, d) \
316 do { \
317 UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m; \
318 __d1 = __ll_highpart (d); \
319 __d0 = __ll_lowpart (d); \
320 \
321 __r1 = (n1) % __d1; \
322 __q1 = (n1) / __d1; \
323 __m = (UWtype) __q1 * __d0; \
324 __r1 = __r1 * __ll_B | __ll_highpart (n0); \
325 if (__r1 < __m) \
326 { \
327 __q1--, __r1 += (d); \
328 if (__r1 >= (d)) /* we didn't get carry when adding to __r1 */ \
329 if (__r1 < __m) \
330 __q1--, __r1 += (d); \
331 } \
332 __r1 -= __m; \
333 \
334 __r0 = __r1 % __d1; \
335 __q0 = __r1 / __d1; \
336 __m = (UWtype) __q0 * __d0; \
337 __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
338 if (__r0 < __m) \
339 { \
340 __q0--, __r0 += (d); \
341 if (__r0 >= (d)) \
342 if (__r0 < __m) \
343 __q0--, __r0 += (d); \
344 } \
345 __r0 -= __m; \
346 \
347 (q) = (UWtype) __q1 * __ll_B | __q0; \
348 (r) = __r0; \
349 } while (0)
350
351#define UDIV_NEEDS_NORMALIZATION 1
352
353#define abort() \
354 return 0
355
356#ifdef __BIG_ENDIAN
357#define __BYTE_ORDER __BIG_ENDIAN
358#else
359#define __BYTE_ORDER __LITTLE_ENDIAN
360#endif
361
362/* Exception flags. */
363#define EFLAG_INVALID (1 << (31 - 2))
364#define EFLAG_OVERFLOW (1 << (31 - 3))
365#define EFLAG_UNDERFLOW (1 << (31 - 4))
366#define EFLAG_DIVZERO (1 << (31 - 5))
367#define EFLAG_INEXACT (1 << (31 - 6))
368
369#define EFLAG_VXSNAN (1 << (31 - 7))
370#define EFLAG_VXISI (1 << (31 - 8))
371#define EFLAG_VXIDI (1 << (31 - 9))
372#define EFLAG_VXZDZ (1 << (31 - 10))
373#define EFLAG_VXIMZ (1 << (31 - 11))
374#define EFLAG_VXVC (1 << (31 - 12))
375#define EFLAG_VXSOFT (1 << (31 - 21))
376#define EFLAG_VXSQRT (1 << (31 - 22))
377#define EFLAG_VXCVI (1 << (31 - 23))
diff --git a/arch/ppc/math-emu/single.h b/arch/ppc/math-emu/single.h
deleted file mode 100644
index f19d99451815..000000000000
--- a/arch/ppc/math-emu/single.h
+++ /dev/null
@@ -1,66 +0,0 @@
1/*
2 * Definitions for IEEE Single Precision
3 */
4
5#if _FP_W_TYPE_SIZE < 32
6#error "Here's a nickel kid. Go buy yourself a real computer."
7#endif
8
9#define _FP_FRACBITS_S 24
10#define _FP_FRACXBITS_S (_FP_W_TYPE_SIZE - _FP_FRACBITS_S)
11#define _FP_WFRACBITS_S (_FP_WORKBITS + _FP_FRACBITS_S)
12#define _FP_WFRACXBITS_S (_FP_W_TYPE_SIZE - _FP_WFRACBITS_S)
13#define _FP_EXPBITS_S 8
14#define _FP_EXPBIAS_S 127
15#define _FP_EXPMAX_S 255
16#define _FP_QNANBIT_S ((_FP_W_TYPE)1 << (_FP_FRACBITS_S-2))
17#define _FP_IMPLBIT_S ((_FP_W_TYPE)1 << (_FP_FRACBITS_S-1))
18#define _FP_OVERFLOW_S ((_FP_W_TYPE)1 << (_FP_WFRACBITS_S))
19
20/* The implementation of _FP_MUL_MEAT_S and _FP_DIV_MEAT_S should be
21 chosen by the target machine. */
22
23union _FP_UNION_S
24{
25 float flt;
26 struct {
27#if __BYTE_ORDER == __BIG_ENDIAN
28 unsigned sign : 1;
29 unsigned exp : _FP_EXPBITS_S;
30 unsigned frac : _FP_FRACBITS_S - (_FP_IMPLBIT_S != 0);
31#else
32 unsigned frac : _FP_FRACBITS_S - (_FP_IMPLBIT_S != 0);
33 unsigned exp : _FP_EXPBITS_S;
34 unsigned sign : 1;
35#endif
36 } bits __attribute__((packed));
37};
38
39#define FP_DECL_S(X) _FP_DECL(1,X)
40#define FP_UNPACK_RAW_S(X,val) _FP_UNPACK_RAW_1(S,X,val)
41#define FP_PACK_RAW_S(val,X) _FP_PACK_RAW_1(S,val,X)
42
43#define FP_UNPACK_S(X,val) \
44 do { \
45 _FP_UNPACK_RAW_1(S,X,val); \
46 _FP_UNPACK_CANONICAL(S,1,X); \
47 } while (0)
48
49#define FP_PACK_S(val,X) \
50 do { \
51 _FP_PACK_CANONICAL(S,1,X); \
52 _FP_PACK_RAW_1(S,val,X); \
53 } while (0)
54
55#define FP_NEG_S(R,X) _FP_NEG(S,1,R,X)
56#define FP_ADD_S(R,X,Y) _FP_ADD(S,1,R,X,Y)
57#define FP_SUB_S(R,X,Y) _FP_SUB(S,1,R,X,Y)
58#define FP_MUL_S(R,X,Y) _FP_MUL(S,1,R,X,Y)
59#define FP_DIV_S(R,X,Y) _FP_DIV(S,1,R,X,Y)
60#define FP_SQRT_S(R,X) _FP_SQRT(S,1,R,X)
61
62#define FP_CMP_S(r,X,Y,un) _FP_CMP(S,1,r,X,Y,un)
63#define FP_CMP_EQ_S(r,X,Y) _FP_CMP_EQ(S,1,r,X,Y)
64
65#define FP_TO_INT_S(r,X,rsz,rsg) _FP_TO_INT(S,1,r,X,rsz,rsg)
66#define FP_FROM_INT_S(X,r,rs,rt) _FP_FROM_INT(S,1,X,r,rs,rt)
diff --git a/arch/ppc/math-emu/soft-fp.h b/arch/ppc/math-emu/soft-fp.h
deleted file mode 100644
index cca39598f873..000000000000
--- a/arch/ppc/math-emu/soft-fp.h
+++ /dev/null
@@ -1,104 +0,0 @@
1#ifndef SOFT_FP_H
2#define SOFT_FP_H
3
4#include "sfp-machine.h"
5
6#define _FP_WORKBITS 3
7#define _FP_WORK_LSB ((_FP_W_TYPE)1 << 3)
8#define _FP_WORK_ROUND ((_FP_W_TYPE)1 << 2)
9#define _FP_WORK_GUARD ((_FP_W_TYPE)1 << 1)
10#define _FP_WORK_STICKY ((_FP_W_TYPE)1 << 0)
11
12#ifndef FP_RND_NEAREST
13# define FP_RND_NEAREST 0
14# define FP_RND_ZERO 1
15# define FP_RND_PINF 2
16# define FP_RND_MINF 3
17#ifndef FP_ROUNDMODE
18# define FP_ROUNDMODE FP_RND_NEAREST
19#endif
20#endif
21
22#define _FP_ROUND_NEAREST(wc, X) \
23({ int __ret = 0; \
24 int __frac = _FP_FRAC_LOW_##wc(X) & 15; \
25 if (__frac & 7) { \
26 __ret = EFLAG_INEXACT; \
27 if ((__frac & 7) != _FP_WORK_ROUND) \
28 _FP_FRAC_ADDI_##wc(X, _FP_WORK_ROUND); \
29 else if (__frac & _FP_WORK_LSB) \
30 _FP_FRAC_ADDI_##wc(X, _FP_WORK_ROUND); \
31 } \
32 __ret; \
33})
34
35#define _FP_ROUND_ZERO(wc, X) \
36({ int __ret = 0; \
37 if (_FP_FRAC_LOW_##wc(X) & 7) \
38 __ret = EFLAG_INEXACT; \
39 __ret; \
40})
41
42#define _FP_ROUND_PINF(wc, X) \
43({ int __ret = EFLAG_INEXACT; \
44 if (!X##_s && (_FP_FRAC_LOW_##wc(X) & 7)) \
45 _FP_FRAC_ADDI_##wc(X, _FP_WORK_LSB); \
46 else __ret = 0; \
47 __ret; \
48})
49
50#define _FP_ROUND_MINF(wc, X) \
51({ int __ret = EFLAG_INEXACT; \
52 if (X##_s && (_FP_FRAC_LOW_##wc(X) & 7)) \
53 _FP_FRAC_ADDI_##wc(X, _FP_WORK_LSB); \
54 else __ret = 0; \
55 __ret; \
56})
57
58#define _FP_ROUND(wc, X) \
59({ int __ret = 0; \
60 switch (FP_ROUNDMODE) \
61 { \
62 case FP_RND_NEAREST: \
63 __ret |= _FP_ROUND_NEAREST(wc,X); \
64 break; \
65 case FP_RND_ZERO: \
66 __ret |= _FP_ROUND_ZERO(wc,X); \
67 break; \
68 case FP_RND_PINF: \
69 __ret |= _FP_ROUND_PINF(wc,X); \
70 break; \
71 case FP_RND_MINF: \
72 __ret |= _FP_ROUND_MINF(wc,X); \
73 break; \
74 }; \
75 __ret; \
76})
77
78#define FP_CLS_NORMAL 0
79#define FP_CLS_ZERO 1
80#define FP_CLS_INF 2
81#define FP_CLS_NAN 3
82
83#define _FP_CLS_COMBINE(x,y) (((x) << 2) | (y))
84
85#include "op-1.h"
86#include "op-2.h"
87#include "op-4.h"
88#include "op-common.h"
89
90/* Sigh. Silly things longlong.h needs. */
91#define UWtype _FP_W_TYPE
92#define W_TYPE_SIZE _FP_W_TYPE_SIZE
93
94typedef int SItype __attribute__((mode(SI)));
95typedef int DItype __attribute__((mode(DI)));
96typedef unsigned int USItype __attribute__((mode(SI)));
97typedef unsigned int UDItype __attribute__((mode(DI)));
98#if _FP_W_TYPE_SIZE == 32
99typedef unsigned int UHWtype __attribute__((mode(HI)));
100#elif _FP_W_TYPE_SIZE == 64
101typedef USItype UHWtype;
102#endif
103
104#endif
diff --git a/arch/ppc/math-emu/stfd.c b/arch/ppc/math-emu/stfd.c
deleted file mode 100644
index 3f8c2558a9e8..000000000000
--- a/arch/ppc/math-emu/stfd.c
+++ /dev/null
@@ -1,20 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5int
6stfd(void *frS, void *ea)
7{
8#if 0
9#ifdef DEBUG
10 printk("%s: S %p, ea %p: ", __FUNCTION__, frS, ea);
11 dump_double(frS);
12 printk("\n");
13#endif
14#endif
15
16 if (copy_to_user(ea, frS, sizeof(double)))
17 return -EFAULT;
18
19 return 0;
20}
diff --git a/arch/ppc/math-emu/stfiwx.c b/arch/ppc/math-emu/stfiwx.c
deleted file mode 100644
index 95caaeec6a08..000000000000
--- a/arch/ppc/math-emu/stfiwx.c
+++ /dev/null
@@ -1,16 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5int
6stfiwx(u32 *frS, void *ea)
7{
8#ifdef DEBUG
9 printk("%s: %p %p\n", __FUNCTION__, frS, ea);
10#endif
11
12 if (copy_to_user(ea, &frS[1], sizeof(frS[1])))
13 return -EFAULT;
14
15 return 0;
16}
diff --git a/arch/ppc/math-emu/stfs.c b/arch/ppc/math-emu/stfs.c
deleted file mode 100644
index e87ca23c6dc3..000000000000
--- a/arch/ppc/math-emu/stfs.c
+++ /dev/null
@@ -1,41 +0,0 @@
1#include <linux/types.h>
2#include <linux/errno.h>
3#include <asm/uaccess.h>
4
5#include "soft-fp.h"
6#include "double.h"
7#include "single.h"
8
9int
10stfs(void *frS, void *ea)
11{
12 FP_DECL_D(A);
13 FP_DECL_S(R);
14 float f;
15 int err;
16
17#ifdef DEBUG
18 printk("%s: S %p, ea %p\n", __FUNCTION__, frS, ea);
19#endif
20
21 __FP_UNPACK_D(A, frS);
22
23#ifdef DEBUG
24 printk("A: %ld %lu %lu %ld (%ld)\n", A_s, A_f1, A_f0, A_e, A_c);
25#endif
26
27 FP_CONV(S, D, 1, 2, R, A);
28
29#ifdef DEBUG
30 printk("R: %ld %lu %ld (%ld)\n", R_s, R_f, R_e, R_c);
31#endif
32
33 err = _FP_PACK_CANONICAL(S, 1, R);
34 if (!err || !__FPU_TRAP_P(err)) {
35 __FP_PACK_RAW_1(S, &f, R);
36 if (copy_to_user(ea, &f, sizeof(float)))
37 return -EFAULT;
38 }
39
40 return err;
41}
diff --git a/arch/ppc/math-emu/types.c b/arch/ppc/math-emu/types.c
deleted file mode 100644
index e1ed15d829db..000000000000
--- a/arch/ppc/math-emu/types.c
+++ /dev/null
@@ -1,51 +0,0 @@
1#include "soft-fp.h"
2#include "double.h"
3#include "single.h"
4
5void
6fp_unpack_d(long *_s, unsigned long *_f1, unsigned long *_f0,
7 long *_e, long *_c, void *val)
8{
9 FP_DECL_D(X);
10
11 __FP_UNPACK_RAW_2(D, X, val);
12
13 _FP_UNPACK_CANONICAL(D, 2, X);
14
15 *_s = X_s;
16 *_f1 = X_f1;
17 *_f0 = X_f0;
18 *_e = X_e;
19 *_c = X_c;
20}
21
22int
23fp_pack_d(void *val, long X_s, unsigned long X_f1,
24 unsigned long X_f0, long X_e, long X_c)
25{
26 int exc;
27
28 exc = _FP_PACK_CANONICAL(D, 2, X);
29 if (!exc || !__FPU_TRAP_P(exc))
30 __FP_PACK_RAW_2(D, val, X);
31 return exc;
32}
33
34int
35fp_pack_ds(void *val, long X_s, unsigned long X_f1,
36 unsigned long X_f0, long X_e, long X_c)
37{
38 FP_DECL_S(__X);
39 int exc;
40
41 FP_CONV(S, D, 1, 2, __X, X);
42 exc = _FP_PACK_CANONICAL(S, 1, __X);
43 if (!exc || !__FPU_TRAP_P(exc)) {
44 _FP_UNPACK_CANONICAL(S, 1, __X);
45 FP_CONV(D, S, 2, 1, X, __X);
46 exc |= _FP_PACK_CANONICAL(D, 2, X);
47 if (!exc || !__FPU_TRAP_P(exc))
48 __FP_PACK_RAW_2(D, val, X);
49 }
50 return exc;
51}
diff --git a/arch/ppc/math-emu/udivmodti4.c b/arch/ppc/math-emu/udivmodti4.c
deleted file mode 100644
index 7e112dc1e2f2..000000000000
--- a/arch/ppc/math-emu/udivmodti4.c
+++ /dev/null
@@ -1,191 +0,0 @@
1/* This has so very few changes over libgcc2's __udivmoddi4 it isn't funny. */
2
3#include "soft-fp.h"
4
5#undef count_leading_zeros
6#define count_leading_zeros __FP_CLZ
7
8void
9_fp_udivmodti4(_FP_W_TYPE q[2], _FP_W_TYPE r[2],
10 _FP_W_TYPE n1, _FP_W_TYPE n0,
11 _FP_W_TYPE d1, _FP_W_TYPE d0)
12{
13 _FP_W_TYPE q0, q1, r0, r1;
14 _FP_I_TYPE b, bm;
15
16 if (d1 == 0)
17 {
18#if !UDIV_NEEDS_NORMALIZATION
19 if (d0 > n1)
20 {
21 /* 0q = nn / 0D */
22
23 udiv_qrnnd (q0, n0, n1, n0, d0);
24 q1 = 0;
25
26 /* Remainder in n0. */
27 }
28 else
29 {
30 /* qq = NN / 0d */
31
32 if (d0 == 0)
33 d0 = 1 / d0; /* Divide intentionally by zero. */
34
35 udiv_qrnnd (q1, n1, 0, n1, d0);
36 udiv_qrnnd (q0, n0, n1, n0, d0);
37
38 /* Remainder in n0. */
39 }
40
41 r0 = n0;
42 r1 = 0;
43
44#else /* UDIV_NEEDS_NORMALIZATION */
45
46 if (d0 > n1)
47 {
48 /* 0q = nn / 0D */
49
50 count_leading_zeros (bm, d0);
51
52 if (bm != 0)
53 {
54 /* Normalize, i.e. make the most significant bit of the
55 denominator set. */
56
57 d0 = d0 << bm;
58 n1 = (n1 << bm) | (n0 >> (_FP_W_TYPE_SIZE - bm));
59 n0 = n0 << bm;
60 }
61
62 udiv_qrnnd (q0, n0, n1, n0, d0);
63 q1 = 0;
64
65 /* Remainder in n0 >> bm. */
66 }
67 else
68 {
69 /* qq = NN / 0d */
70
71 if (d0 == 0)
72 d0 = 1 / d0; /* Divide intentionally by zero. */
73
74 count_leading_zeros (bm, d0);
75
76 if (bm == 0)
77 {
78 /* From (n1 >= d0) /\ (the most significant bit of d0 is set),
79 conclude (the most significant bit of n1 is set) /\ (the
80 leading quotient digit q1 = 1).
81
82 This special case is necessary, not an optimization.
83 (Shifts counts of SI_TYPE_SIZE are undefined.) */
84
85 n1 -= d0;
86 q1 = 1;
87 }
88 else
89 {
90 _FP_W_TYPE n2;
91
92 /* Normalize. */
93
94 b = _FP_W_TYPE_SIZE - bm;
95
96 d0 = d0 << bm;
97 n2 = n1 >> b;
98 n1 = (n1 << bm) | (n0 >> b);
99 n0 = n0 << bm;
100
101 udiv_qrnnd (q1, n1, n2, n1, d0);
102 }
103
104 /* n1 != d0... */
105
106 udiv_qrnnd (q0, n0, n1, n0, d0);
107
108 /* Remainder in n0 >> bm. */
109 }
110
111 r0 = n0 >> bm;
112 r1 = 0;
113#endif /* UDIV_NEEDS_NORMALIZATION */
114 }
115 else
116 {
117 if (d1 > n1)
118 {
119 /* 00 = nn / DD */
120
121 q0 = 0;
122 q1 = 0;
123
124 /* Remainder in n1n0. */
125 r0 = n0;
126 r1 = n1;
127 }
128 else
129 {
130 /* 0q = NN / dd */
131
132 count_leading_zeros (bm, d1);
133 if (bm == 0)
134 {
135 /* From (n1 >= d1) /\ (the most significant bit of d1 is set),
136 conclude (the most significant bit of n1 is set) /\ (the
137 quotient digit q0 = 0 or 1).
138
139 This special case is necessary, not an optimization. */
140
141 /* The condition on the next line takes advantage of that
142 n1 >= d1 (true due to program flow). */
143 if (n1 > d1 || n0 >= d0)
144 {
145 q0 = 1;
146 sub_ddmmss (n1, n0, n1, n0, d1, d0);
147 }
148 else
149 q0 = 0;
150
151 q1 = 0;
152
153 r0 = n0;
154 r1 = n1;
155 }
156 else
157 {
158 _FP_W_TYPE m1, m0, n2;
159
160 /* Normalize. */
161
162 b = _FP_W_TYPE_SIZE - bm;
163
164 d1 = (d1 << bm) | (d0 >> b);
165 d0 = d0 << bm;
166 n2 = n1 >> b;
167 n1 = (n1 << bm) | (n0 >> b);
168 n0 = n0 << bm;
169
170 udiv_qrnnd (q0, n1, n2, n1, d1);
171 umul_ppmm (m1, m0, q0, d0);
172
173 if (m1 > n1 || (m1 == n1 && m0 > n0))
174 {
175 q0--;
176 sub_ddmmss (m1, m0, m1, m0, d1, d0);
177 }
178
179 q1 = 0;
180
181 /* Remainder in (n1n0 - m1m0) >> bm. */
182 sub_ddmmss (n1, n0, n1, n0, m1, m0);
183 r0 = (n1 << b) | (n0 >> bm);
184 r1 = n1 >> bm;
185 }
186 }
187 }
188
189 q[0] = q0; q[1] = q1;
190 r[0] = r0, r[1] = r1;
191}
diff --git a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c
index 3d79ce281b67..e0152a9b26e6 100644
--- a/arch/ppc/mm/44x_mmu.c
+++ b/arch/ppc/mm/44x_mmu.c
@@ -104,7 +104,7 @@ unsigned long __init mmu_mapin_ram(void)
104 104
105 /* Determine number of entries necessary to cover lowmem */ 105 /* Determine number of entries necessary to cover lowmem */
106 pinned_tlbs = (unsigned int) 106 pinned_tlbs = (unsigned int)
107 (_ALIGN(total_lowmem, PPC44x_PIN_SIZE) >> PPC44x_PIN_SHIFT); 107 (_ALIGN(total_lowmem, PPC_PIN_SIZE) >> PPC44x_PIN_SHIFT);
108 108
109 /* Write upper watermark to save location */ 109 /* Write upper watermark to save location */
110 tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs; 110 tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
@@ -112,7 +112,7 @@ unsigned long __init mmu_mapin_ram(void)
112 /* If necessary, set additional pinned TLBs */ 112 /* If necessary, set additional pinned TLBs */
113 if (pinned_tlbs > 1) 113 if (pinned_tlbs > 1)
114 for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) { 114 for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) {
115 unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE; 115 unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC_PIN_SIZE;
116 ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr); 116 ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr);
117 } 117 }
118 118
diff --git a/arch/ppc/mm/fault.c b/arch/ppc/mm/fault.c
index ee5e9f25baf9..8e08ca32531a 100644
--- a/arch/ppc/mm/fault.c
+++ b/arch/ppc/mm/fault.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/mm/fault.c
3 *
4 * PowerPC version 2 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * 4 *
@@ -204,6 +202,7 @@ good_area:
204 /* an exec - 4xx/Book-E allows for per-page execute permission */ 202 /* an exec - 4xx/Book-E allows for per-page execute permission */
205 } else if (TRAP(regs) == 0x400) { 203 } else if (TRAP(regs) == 0x400) {
206 pte_t *ptep; 204 pte_t *ptep;
205 pmd_t *pmdp;
207 206
208#if 0 207#if 0
209 /* It would be nice to actually enforce the VM execute 208 /* It would be nice to actually enforce the VM execute
@@ -217,21 +216,24 @@ good_area:
217 /* Since 4xx/Book-E supports per-page execute permission, 216 /* Since 4xx/Book-E supports per-page execute permission,
218 * we lazily flush dcache to icache. */ 217 * we lazily flush dcache to icache. */
219 ptep = NULL; 218 ptep = NULL;
220 if (get_pteptr(mm, address, &ptep) && pte_present(*ptep)) { 219 if (get_pteptr(mm, address, &ptep, &pmdp)) {
221 struct page *page = pte_page(*ptep); 220 spinlock_t *ptl = pte_lockptr(mm, pmdp);
222 221 spin_lock(ptl);
223 if (! test_bit(PG_arch_1, &page->flags)) { 222 if (pte_present(*ptep)) {
224 flush_dcache_icache_page(page); 223 struct page *page = pte_page(*ptep);
225 set_bit(PG_arch_1, &page->flags); 224
225 if (!test_bit(PG_arch_1, &page->flags)) {
226 flush_dcache_icache_page(page);
227 set_bit(PG_arch_1, &page->flags);
228 }
229 pte_update(ptep, 0, _PAGE_HWEXEC);
230 _tlbie(address);
231 pte_unmap_unlock(ptep, ptl);
232 up_read(&mm->mmap_sem);
233 return 0;
226 } 234 }
227 pte_update(ptep, 0, _PAGE_HWEXEC); 235 pte_unmap_unlock(ptep, ptl);
228 _tlbie(address);
229 pte_unmap(ptep);
230 up_read(&mm->mmap_sem);
231 return 0;
232 } 236 }
233 if (ptep != NULL)
234 pte_unmap(ptep);
235#endif 237#endif
236 /* a read */ 238 /* a read */
237 } else { 239 } else {
diff --git a/arch/ppc/mm/hashtable.S b/arch/ppc/mm/hashtable.S
index 3ec87c91343e..31d0a924317c 100644
--- a/arch/ppc/mm/hashtable.S
+++ b/arch/ppc/mm/hashtable.S
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/hashtable.S
3 *
4 * $Id: hashtable.S,v 1.6 1999/10/08 01:56:15 paulus Exp $ 2 * $Id: hashtable.S,v 1.6 1999/10/08 01:56:15 paulus Exp $
5 * 3 *
6 * PowerPC version 4 * PowerPC version
@@ -76,12 +74,6 @@ _GLOBAL(hash_page_sync)
76 */ 74 */
77 .text 75 .text
78_GLOBAL(hash_page) 76_GLOBAL(hash_page)
79#ifdef CONFIG_PPC64BRIDGE
80 mfmsr r0
81 clrldi r0,r0,1 /* make sure it's in 32-bit mode */
82 MTMSRD(r0)
83 isync
84#endif
85 tophys(r7,0) /* gets -KERNELBASE into r7 */ 77 tophys(r7,0) /* gets -KERNELBASE into r7 */
86#ifdef CONFIG_SMP 78#ifdef CONFIG_SMP
87 addis r8,r7,mmu_hash_lock@h 79 addis r8,r7,mmu_hash_lock@h
@@ -305,7 +297,6 @@ Hash_base = 0xc0180000
305Hash_bits = 12 /* e.g. 256kB hash table */ 297Hash_bits = 12 /* e.g. 256kB hash table */
306Hash_msk = (((1 << Hash_bits) - 1) * 64) 298Hash_msk = (((1 << Hash_bits) - 1) * 64)
307 299
308#ifndef CONFIG_PPC64BRIDGE
309/* defines for the PTE format for 32-bit PPCs */ 300/* defines for the PTE format for 32-bit PPCs */
310#define PTE_SIZE 8 301#define PTE_SIZE 8
311#define PTEG_SIZE 64 302#define PTEG_SIZE 64
@@ -319,21 +310,6 @@ Hash_msk = (((1 << Hash_bits) - 1) * 64)
319#define SET_V(r) oris r,r,PTE_V@h 310#define SET_V(r) oris r,r,PTE_V@h
320#define CLR_V(r,t) rlwinm r,r,0,1,31 311#define CLR_V(r,t) rlwinm r,r,0,1,31
321 312
322#else
323/* defines for the PTE format for 64-bit PPCs */
324#define PTE_SIZE 16
325#define PTEG_SIZE 128
326#define LG_PTEG_SIZE 7
327#define LDPTEu ldu
328#define STPTE std
329#define CMPPTE cmpd
330#define PTE_H 2
331#define PTE_V 1
332#define TST_V(r) andi. r,r,PTE_V
333#define SET_V(r) ori r,r,PTE_V
334#define CLR_V(r,t) li t,PTE_V; andc r,r,t
335#endif /* CONFIG_PPC64BRIDGE */
336
337#define HASH_LEFT 31-(LG_PTEG_SIZE+Hash_bits-1) 313#define HASH_LEFT 31-(LG_PTEG_SIZE+Hash_bits-1)
338#define HASH_RIGHT 31-LG_PTEG_SIZE 314#define HASH_RIGHT 31-LG_PTEG_SIZE
339 315
@@ -351,14 +327,8 @@ BEGIN_FTR_SECTION
351END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT) 327END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT)
352 328
353 /* Construct the high word of the PPC-style PTE (r5) */ 329 /* Construct the high word of the PPC-style PTE (r5) */
354#ifndef CONFIG_PPC64BRIDGE
355 rlwinm r5,r3,7,1,24 /* put VSID in 0x7fffff80 bits */ 330 rlwinm r5,r3,7,1,24 /* put VSID in 0x7fffff80 bits */
356 rlwimi r5,r4,10,26,31 /* put in API (abbrev page index) */ 331 rlwimi r5,r4,10,26,31 /* put in API (abbrev page index) */
357#else /* CONFIG_PPC64BRIDGE */
358 clrlwi r3,r3,8 /* reduce vsid to 24 bits */
359 sldi r5,r3,12 /* shift vsid into position */
360 rlwimi r5,r4,16,20,24 /* put in API (abbrev page index) */
361#endif /* CONFIG_PPC64BRIDGE */
362 SET_V(r5) /* set V (valid) bit */ 332 SET_V(r5) /* set V (valid) bit */
363 333
364 /* Get the address of the primary PTE group in the hash table (r3) */ 334 /* Get the address of the primary PTE group in the hash table (r3) */
@@ -542,14 +512,8 @@ _GLOBAL(flush_hash_pages)
542 add r3,r3,r0 /* note code below trims to 24 bits */ 512 add r3,r3,r0 /* note code below trims to 24 bits */
543 513
544 /* Construct the high word of the PPC-style PTE (r11) */ 514 /* Construct the high word of the PPC-style PTE (r11) */
545#ifndef CONFIG_PPC64BRIDGE
546 rlwinm r11,r3,7,1,24 /* put VSID in 0x7fffff80 bits */ 515 rlwinm r11,r3,7,1,24 /* put VSID in 0x7fffff80 bits */
547 rlwimi r11,r4,10,26,31 /* put in API (abbrev page index) */ 516 rlwimi r11,r4,10,26,31 /* put in API (abbrev page index) */
548#else /* CONFIG_PPC64BRIDGE */
549 clrlwi r3,r3,8 /* reduce vsid to 24 bits */
550 sldi r11,r3,12 /* shift vsid into position */
551 rlwimi r11,r4,16,20,24 /* put in API (abbrev page index) */
552#endif /* CONFIG_PPC64BRIDGE */
553 SET_V(r11) /* set V (valid) bit */ 517 SET_V(r11) /* set V (valid) bit */
554 518
555#ifdef CONFIG_SMP 519#ifdef CONFIG_SMP
diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c
index 134db5c04203..386e000bcb73 100644
--- a/arch/ppc/mm/init.c
+++ b/arch/ppc/mm/init.c
@@ -140,7 +140,7 @@ static void free_sec(unsigned long start, unsigned long end, const char *name)
140 140
141 while (start < end) { 141 while (start < end) {
142 ClearPageReserved(virt_to_page(start)); 142 ClearPageReserved(virt_to_page(start));
143 set_page_count(virt_to_page(start), 1); 143 init_page_count(virt_to_page(start));
144 free_page(start); 144 free_page(start);
145 cnt++; 145 cnt++;
146 start += PAGE_SIZE; 146 start += PAGE_SIZE;
@@ -172,7 +172,7 @@ void free_initrd_mem(unsigned long start, unsigned long end)
172 172
173 for (; start < end; start += PAGE_SIZE) { 173 for (; start < end; start += PAGE_SIZE) {
174 ClearPageReserved(virt_to_page(start)); 174 ClearPageReserved(virt_to_page(start));
175 set_page_count(virt_to_page(start), 1); 175 init_page_count(virt_to_page(start));
176 free_page(start); 176 free_page(start);
177 totalram_pages++; 177 totalram_pages++;
178 } 178 }
@@ -412,14 +412,6 @@ void __init mem_init(void)
412 } 412 }
413#endif /* CONFIG_BLK_DEV_INITRD */ 413#endif /* CONFIG_BLK_DEV_INITRD */
414 414
415#ifdef CONFIG_PPC_OF
416 /* mark the RTAS pages as reserved */
417 if ( rtas_data )
418 for (addr = (ulong)__va(rtas_data);
419 addr < PAGE_ALIGN((ulong)__va(rtas_data)+rtas_size) ;
420 addr += PAGE_SIZE)
421 SetPageReserved(virt_to_page(addr));
422#endif
423 for (addr = PAGE_OFFSET; addr < (unsigned long)high_memory; 415 for (addr = PAGE_OFFSET; addr < (unsigned long)high_memory;
424 addr += PAGE_SIZE) { 416 addr += PAGE_SIZE) {
425 if (!PageReserved(virt_to_page(addr))) 417 if (!PageReserved(virt_to_page(addr)))
@@ -441,7 +433,7 @@ void __init mem_init(void)
441 struct page *page = mem_map + pfn; 433 struct page *page = mem_map + pfn;
442 434
443 ClearPageReserved(page); 435 ClearPageReserved(page);
444 set_page_count(page, 1); 436 init_page_count(page);
445 __free_page(page); 437 __free_page(page);
446 totalhigh_pages++; 438 totalhigh_pages++;
447 } 439 }
@@ -494,11 +486,6 @@ set_phys_avail(unsigned long total_memory)
494 initrd_end - initrd_start, 1); 486 initrd_end - initrd_start, 1);
495 } 487 }
496#endif /* CONFIG_BLK_DEV_INITRD */ 488#endif /* CONFIG_BLK_DEV_INITRD */
497#ifdef CONFIG_PPC_OF
498 /* remove the RTAS pages from the available memory */
499 if (rtas_data)
500 mem_pieces_remove(&phys_avail, rtas_data, rtas_size, 1);
501#endif
502} 489}
503 490
504/* Mark some memory as reserved by removing it from phys_avail. */ 491/* Mark some memory as reserved by removing it from phys_avail. */
diff --git a/arch/ppc/mm/mmu_context.c b/arch/ppc/mm/mmu_context.c
index a8816e0f6a86..b4a4b3f02a1c 100644
--- a/arch/ppc/mm/mmu_context.c
+++ b/arch/ppc/mm/mmu_context.c
@@ -2,7 +2,7 @@
2 * This file contains the routines for handling the MMU on those 2 * This file contains the routines for handling the MMU on those
3 * PowerPC implementations where the MMU substantially follows the 3 * PowerPC implementations where the MMU substantially follows the
4 * architecture specification. This includes the 6xx, 7xx, 7xxx, 4 * architecture specification. This includes the 6xx, 7xx, 7xxx,
5 * 8260, and POWER3 implementations but excludes the 8xx and 4xx. 5 * 8260, and 83xx implementations but excludes the 8xx and 4xx.
6 * -- paulus 6 * -- paulus
7 * 7 *
8 * Derived from arch/ppc/mm/init.c: 8 * Derived from arch/ppc/mm/init.c:
diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c
index 6ea9185fd120..706bca8eb144 100644
--- a/arch/ppc/mm/pgtable.c
+++ b/arch/ppc/mm/pgtable.c
@@ -39,7 +39,7 @@ unsigned long ioremap_base;
39unsigned long ioremap_bot; 39unsigned long ioremap_bot;
40int io_bat_index; 40int io_bat_index;
41 41
42#if defined(CONFIG_6xx) || defined(CONFIG_POWER3) 42#if defined(CONFIG_6xx)
43#define HAVE_BATS 1 43#define HAVE_BATS 1
44#endif 44#endif
45 45
@@ -368,7 +368,7 @@ void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
368 * the PTE pointer is unmodified if PTE is not found. 368 * the PTE pointer is unmodified if PTE is not found.
369 */ 369 */
370int 370int
371get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep) 371get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep, pmd_t **pmdp)
372{ 372{
373 pgd_t *pgd; 373 pgd_t *pgd;
374 pmd_t *pmd; 374 pmd_t *pmd;
@@ -383,6 +383,8 @@ get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep)
383 if (pte) { 383 if (pte) {
384 retval = 1; 384 retval = 1;
385 *ptep = pte; 385 *ptep = pte;
386 if (pmdp)
387 *pmdp = pmd;
386 /* XXX caller needs to do pte_unmap, yuck */ 388 /* XXX caller needs to do pte_unmap, yuck */
387 } 389 }
388 } 390 }
@@ -420,7 +422,7 @@ unsigned long iopa(unsigned long addr)
420 mm = &init_mm; 422 mm = &init_mm;
421 423
422 pa = 0; 424 pa = 0;
423 if (get_pteptr(mm, addr, &pte)) { 425 if (get_pteptr(mm, addr, &pte, NULL)) {
424 pa = (pte_val(*pte) & PAGE_MASK) | (addr & ~PAGE_MASK); 426 pa = (pte_val(*pte) & PAGE_MASK) | (addr & ~PAGE_MASK);
425 pte_unmap(pte); 427 pte_unmap(pte);
426 } 428 }
diff --git a/arch/ppc/mm/ppc_mmu.c b/arch/ppc/mm/ppc_mmu.c
index 9a381ed5eb21..25bb6f3347c1 100644
--- a/arch/ppc/mm/ppc_mmu.c
+++ b/arch/ppc/mm/ppc_mmu.c
@@ -2,7 +2,7 @@
2 * This file contains the routines for handling the MMU on those 2 * This file contains the routines for handling the MMU on those
3 * PowerPC implementations where the MMU substantially follows the 3 * PowerPC implementations where the MMU substantially follows the
4 * architecture specification. This includes the 6xx, 7xx, 7xxx, 4 * architecture specification. This includes the 6xx, 7xx, 7xxx,
5 * 8260, and POWER3 implementations but excludes the 8xx and 4xx. 5 * 8260, and 83xx implementations but excludes the 8xx and 4xx.
6 * -- paulus 6 * -- paulus
7 * 7 *
8 * Derived from arch/ppc/mm/init.c: 8 * Derived from arch/ppc/mm/init.c:
@@ -42,11 +42,7 @@ unsigned long _SDR1;
42 42
43union ubat { /* BAT register values to be loaded */ 43union ubat { /* BAT register values to be loaded */
44 BAT bat; 44 BAT bat;
45#ifdef CONFIG_PPC64BRIDGE
46 u64 word[2];
47#else
48 u32 word[2]; 45 u32 word[2];
49#endif
50} BATS[4][2]; /* 4 pairs of IBAT, DBAT */ 46} BATS[4][2]; /* 4 pairs of IBAT, DBAT */
51 47
52struct batrange { /* stores address ranges mapped by BATs */ 48struct batrange { /* stores address ranges mapped by BATs */
@@ -83,9 +79,6 @@ unsigned long p_mapped_by_bats(unsigned long pa)
83 79
84unsigned long __init mmu_mapin_ram(void) 80unsigned long __init mmu_mapin_ram(void)
85{ 81{
86#ifdef CONFIG_POWER4
87 return 0;
88#else
89 unsigned long tot, bl, done; 82 unsigned long tot, bl, done;
90 unsigned long max_size = (256<<20); 83 unsigned long max_size = (256<<20);
91 unsigned long align; 84 unsigned long align;
@@ -122,7 +115,6 @@ unsigned long __init mmu_mapin_ram(void)
122 } 115 }
123 116
124 return done; 117 return done;
125#endif
126} 118}
127 119
128/* 120/*
@@ -205,27 +197,10 @@ void __init MMU_init_hw(void)
205 197
206 if ( ppc_md.progress ) ppc_md.progress("hash:enter", 0x105); 198 if ( ppc_md.progress ) ppc_md.progress("hash:enter", 0x105);
207 199
208#ifdef CONFIG_PPC64BRIDGE
209#define LG_HPTEG_SIZE 7 /* 128 bytes per HPTEG */
210#define SDR1_LOW_BITS (lg_n_hpteg - 11)
211#define MIN_N_HPTEG 2048 /* min 256kB hash table */
212#else
213#define LG_HPTEG_SIZE 6 /* 64 bytes per HPTEG */ 200#define LG_HPTEG_SIZE 6 /* 64 bytes per HPTEG */
214#define SDR1_LOW_BITS ((n_hpteg - 1) >> 10) 201#define SDR1_LOW_BITS ((n_hpteg - 1) >> 10)
215#define MIN_N_HPTEG 1024 /* min 64kB hash table */ 202#define MIN_N_HPTEG 1024 /* min 64kB hash table */
216#endif
217
218#ifdef CONFIG_POWER4
219 /* The hash table has already been allocated and initialized
220 in prom.c */
221 n_hpteg = Hash_size >> LG_HPTEG_SIZE;
222 lg_n_hpteg = __ilog2(n_hpteg);
223
224 /* Remove the hash table from the available memory */
225 if (Hash)
226 reserve_phys_mem(__pa(Hash), Hash_size);
227 203
228#else /* CONFIG_POWER4 */
229 /* 204 /*
230 * Allow 1 HPTE (1/8 HPTEG) for each page of memory. 205 * Allow 1 HPTE (1/8 HPTEG) for each page of memory.
231 * This is less than the recommended amount, but then 206 * This is less than the recommended amount, but then
@@ -248,7 +223,6 @@ void __init MMU_init_hw(void)
248 Hash = mem_pieces_find(Hash_size, Hash_size); 223 Hash = mem_pieces_find(Hash_size, Hash_size);
249 cacheable_memzero(Hash, Hash_size); 224 cacheable_memzero(Hash, Hash_size);
250 _SDR1 = __pa(Hash) | SDR1_LOW_BITS; 225 _SDR1 = __pa(Hash) | SDR1_LOW_BITS;
251#endif /* CONFIG_POWER4 */
252 226
253 Hash_end = (PTE *) ((unsigned long)Hash + Hash_size); 227 Hash_end = (PTE *) ((unsigned long)Hash + Hash_size);
254 228
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig
index d8837911bbc6..174ddbc9758b 100644
--- a/arch/ppc/platforms/4xx/Kconfig
+++ b/arch/ppc/platforms/4xx/Kconfig
@@ -57,6 +57,10 @@ config XILINX_ML300
57 help 57 help
58 This option enables support for the Xilinx ML300 evaluation board. 58 This option enables support for the Xilinx ML300 evaluation board.
59 59
60config XILINX_ML403
61 bool "Xilinx-ML403"
62 help
63 This option enables support for the Xilinx ML403 evaluation board.
60endchoice 64endchoice
61 65
62choice 66choice
@@ -172,11 +176,6 @@ config IBM_OCP
172 depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT 176 depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
173 default y 177 default y
174 178
175config XILINX_OCP
176 bool
177 depends on XILINX_ML300
178 default y
179
180config IBM_EMAC4 179config IBM_EMAC4
181 bool 180 bool
182 depends on 440GX || 440SP || 440SPE 181 depends on 440GX || 440SP || 440SPE
@@ -208,11 +207,21 @@ config 405GPR
208 depends on SYCAMORE 207 depends on SYCAMORE
209 default y 208 default y
210 209
211config VIRTEX_II_PRO 210config XILINX_VIRTEX_II_PRO
212 bool 211 bool
213 depends on XILINX_ML300 212 depends on XILINX_ML300
214 default y 213 default y
215 214
215config XILINX_VIRTEX_4_FX
216 bool
217 depends on XILINX_ML403
218 default y
219
220config XILINX_VIRTEX
221 bool
222 depends on XILINX_VIRTEX_II_PRO || XILINX_VIRTEX_4_FX
223 default y
224
216config STB03xxx 225config STB03xxx
217 bool 226 bool
218 depends on REDWOOD_5 || REDWOOD_6 227 depends on REDWOOD_5 || REDWOOD_6
@@ -220,7 +229,7 @@ config STB03xxx
220 229
221config EMBEDDEDBOOT 230config EMBEDDEDBOOT
222 bool 231 bool
223 depends on EP405 || XILINX_ML300 232 depends on EP405 || XILINX_ML300 || XILINX_ML403
224 default y 233 default y
225 234
226config IBM_OPENBIOS 235config IBM_OPENBIOS
diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile
index c9bb61170954..a04a0d0a0f5c 100644
--- a/arch/ppc/platforms/4xx/Makefile
+++ b/arch/ppc/platforms/4xx/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_REDWOOD_6) += redwood6.o
14obj-$(CONFIG_SYCAMORE) += sycamore.o 14obj-$(CONFIG_SYCAMORE) += sycamore.o
15obj-$(CONFIG_WALNUT) += walnut.o 15obj-$(CONFIG_WALNUT) += walnut.o
16obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o 16obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o
17obj-$(CONFIG_XILINX_ML403) += xilinx_ml403.o
17 18
18obj-$(CONFIG_405GP) += ibm405gp.o 19obj-$(CONFIG_405GP) += ibm405gp.o
19obj-$(CONFIG_REDWOOD_5) += ibmstb4.o 20obj-$(CONFIG_REDWOOD_5) += ibmstb4.o
@@ -26,4 +27,5 @@ obj-$(CONFIG_440SP) += ibm440sp.o
26obj-$(CONFIG_440SPE) += ppc440spe.o 27obj-$(CONFIG_440SPE) += ppc440spe.o
27obj-$(CONFIG_405EP) += ibm405ep.o 28obj-$(CONFIG_405EP) += ibm405ep.o
28obj-$(CONFIG_405GPR) += ibm405gpr.o 29obj-$(CONFIG_405GPR) += ibm405gpr.o
29obj-$(CONFIG_VIRTEX_II_PRO) += virtex-ii_pro.o 30obj-$(CONFIG_XILINX_VIRTEX) += virtex.o
31
diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bamboo.c
index 0ec53f049338..b940cfd646c2 100644
--- a/arch/ppc/platforms/4xx/bamboo.c
+++ b/arch/ppc/platforms/4xx/bamboo.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/bamboo.c
3 *
4 * Bamboo board specific routines 2 * Bamboo board specific routines
5 * 3 *
6 * Wade Farnsworth <wfarnsworth@mvista.com> 4 * Wade Farnsworth <wfarnsworth@mvista.com>
diff --git a/arch/ppc/platforms/4xx/bamboo.h b/arch/ppc/platforms/4xx/bamboo.h
index 5c0192826494..31c0dd6a26cb 100644
--- a/arch/ppc/platforms/4xx/bamboo.h
+++ b/arch/ppc/platforms/4xx/bamboo.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/bamboo.h
3 *
4 * Bamboo board definitions 2 * Bamboo board definitions
5 * 3 *
6 * Wade Farnsworth <wfarnsworth@mvista.com> 4 * Wade Farnsworth <wfarnsworth@mvista.com>
diff --git a/arch/ppc/platforms/4xx/bubinga.h b/arch/ppc/platforms/4xx/bubinga.h
index b5380cfaf5c0..606aa9fa5caa 100644
--- a/arch/ppc/platforms/4xx/bubinga.h
+++ b/arch/ppc/platforms/4xx/bubinga.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/bubinga.h
3 *
4 * Bubinga board definitions 2 * Bubinga board definitions
5 * 3 *
6 * Copyright (c) 2005 DENX Software Engineering 4 * Copyright (c) 2005 DENX Software Engineering
diff --git a/arch/ppc/platforms/4xx/cpci405.c b/arch/ppc/platforms/4xx/cpci405.c
index ff966773a0bf..6571e39fbe48 100644
--- a/arch/ppc/platforms/4xx/cpci405.c
+++ b/arch/ppc/platforms/4xx/cpci405.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/cpci405.c
3 *
4 * Board setup routines for the esd CPCI-405 cPCI Board. 2 * Board setup routines for the esd CPCI-405 cPCI Board.
5 * 3 *
6 * Author: Stefan Roese 4 * Author: Stefan Roese
diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c
index 9a828b623417..b4ecb9c79854 100644
--- a/arch/ppc/platforms/4xx/ebony.c
+++ b/arch/ppc/platforms/4xx/ebony.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ebony.c
3 *
4 * Ebony board specific routines 2 * Ebony board specific routines
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/platforms/4xx/ebony.h b/arch/ppc/platforms/4xx/ebony.h
index b91ad4272dfe..27b2e77c7c83 100644
--- a/arch/ppc/platforms/4xx/ebony.h
+++ b/arch/ppc/platforms/4xx/ebony.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/ebony.h
3 *
4 * Ebony board definitions 2 * Ebony board definitions
5 * 3 *
6 * Matt Porter <mporter@mvista.com> 4 * Matt Porter <mporter@mvista.com>
diff --git a/arch/ppc/platforms/4xx/ep405.c b/arch/ppc/platforms/4xx/ep405.c
index 26a07cdb30ec..6efa91ff9c07 100644
--- a/arch/ppc/platforms/4xx/ep405.c
+++ b/arch/ppc/platforms/4xx/ep405.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ep405.c
3 *
4 * Embedded Planet 405GP board 2 * Embedded Planet 405GP board
5 * http://www.embeddedplanet.com 3 * http://www.embeddedplanet.com
6 * 4 *
diff --git a/arch/ppc/platforms/4xx/ep405.h b/arch/ppc/platforms/4xx/ep405.h
index ea3eb21338fb..9814fc431725 100644
--- a/arch/ppc/platforms/4xx/ep405.h
+++ b/arch/ppc/platforms/4xx/ep405.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ep405.h
3 *
4 * Embedded Planet 405GP board 2 * Embedded Planet 405GP board
5 * http://www.embeddedplanet.com 3 * http://www.embeddedplanet.com
6 * 4 *
diff --git a/arch/ppc/platforms/4xx/ibm405ep.c b/arch/ppc/platforms/4xx/ibm405ep.c
index 093b28d27a41..55af769a6e70 100644
--- a/arch/ppc/platforms/4xx/ibm405ep.c
+++ b/arch/ppc/platforms/4xx/ibm405ep.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/ibm405ep.c
3 *
4 * Support for IBM PPC 405EP processors. 2 * Support for IBM PPC 405EP processors.
5 * 3 *
6 * Author: SAW (IBM), derived from ibmnp405l.c. 4 * Author: SAW (IBM), derived from ibmnp405l.c.
diff --git a/arch/ppc/platforms/4xx/ibm405ep.h b/arch/ppc/platforms/4xx/ibm405ep.h
index e051e3fe8c63..fe46640de152 100644
--- a/arch/ppc/platforms/4xx/ibm405ep.h
+++ b/arch/ppc/platforms/4xx/ibm405ep.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm405ep.h
3 *
4 * IBM PPC 405EP processor defines. 2 * IBM PPC 405EP processor defines.
5 * 3 *
6 * Author: SAW (IBM), derived from ibm405gp.h. 4 * Author: SAW (IBM), derived from ibm405gp.h.
diff --git a/arch/ppc/platforms/4xx/ibm405gp.h b/arch/ppc/platforms/4xx/ibm405gp.h
index b2b642e81af7..eaf0ef57028d 100644
--- a/arch/ppc/platforms/4xx/ibm405gp.h
+++ b/arch/ppc/platforms/4xx/ibm405gp.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm405gp.h
3 *
4 * Author: Armin Kuster akuster@mvista.com 2 * Author: Armin Kuster akuster@mvista.com
5 * 3 *
6 * 2001 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2001 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/4xx/ibm405gpr.c b/arch/ppc/platforms/4xx/ibm405gpr.c
index cd0d00d8e8ee..49da61f6854a 100644
--- a/arch/ppc/platforms/4xx/ibm405gpr.c
+++ b/arch/ppc/platforms/4xx/ibm405gpr.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm405gpr.c
3 *
4 * Author: Armin Kuster <akuster@mvista.com> 2 * Author: Armin Kuster <akuster@mvista.com>
5 * 3 *
6 * 2002 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2002 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/4xx/ibm405gpr.h b/arch/ppc/platforms/4xx/ibm405gpr.h
index 45412fb4368f..e90c5dde01d3 100644
--- a/arch/ppc/platforms/4xx/ibm405gpr.h
+++ b/arch/ppc/platforms/4xx/ibm405gpr.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm405gpr.h
3 *
4 * Author: Armin Kuster <akuster@mvista.com> 2 * Author: Armin Kuster <akuster@mvista.com>
5 * 3 *
6 * 2002 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2002 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/4xx/ibm440ep.c b/arch/ppc/platforms/4xx/ibm440ep.c
index 65ac0b9c2d05..1fed6638c81f 100644
--- a/arch/ppc/platforms/4xx/ibm440ep.c
+++ b/arch/ppc/platforms/4xx/ibm440ep.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm440ep.c
3 *
4 * PPC440EP I/O descriptions 2 * PPC440EP I/O descriptions
5 * 3 *
6 * Wade Farnsworth <wfarnsworth@mvista.com> 4 * Wade Farnsworth <wfarnsworth@mvista.com>
diff --git a/arch/ppc/platforms/4xx/ibm440ep.h b/arch/ppc/platforms/4xx/ibm440ep.h
index 97c80b8e3e10..61717e8a799e 100644
--- a/arch/ppc/platforms/4xx/ibm440ep.h
+++ b/arch/ppc/platforms/4xx/ibm440ep.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm440ep.h
3 *
4 * PPC440EP definitions 2 * PPC440EP definitions
5 * 3 *
6 * Wade Farnsworth <wfarnsworth@mvista.com> 4 * Wade Farnsworth <wfarnsworth@mvista.com>
diff --git a/arch/ppc/platforms/4xx/ibm440gp.c b/arch/ppc/platforms/4xx/ibm440gp.c
index d926245e8b3e..b67a72e5c6fe 100644
--- a/arch/ppc/platforms/4xx/ibm440gp.c
+++ b/arch/ppc/platforms/4xx/ibm440gp.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm440gp.c
3 *
4 * PPC440GP I/O descriptions 2 * PPC440GP I/O descriptions
5 * 3 *
6 * Matt Porter <mporter@mvista.com> 4 * Matt Porter <mporter@mvista.com>
diff --git a/arch/ppc/platforms/4xx/ibm440gp.h b/arch/ppc/platforms/4xx/ibm440gp.h
index ae1efc03b295..7b2763b6024f 100644
--- a/arch/ppc/platforms/4xx/ibm440gp.h
+++ b/arch/ppc/platforms/4xx/ibm440gp.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm440gp.h
3 *
4 * PPC440GP definitions 2 * PPC440GP definitions
5 * 3 *
6 * Roland Dreier <roland@digitalvampire.org> 4 * Roland Dreier <roland@digitalvampire.org>
diff --git a/arch/ppc/platforms/4xx/ibm440gx.c b/arch/ppc/platforms/4xx/ibm440gx.c
index d24c09ee7b18..685abffcb6ce 100644
--- a/arch/ppc/platforms/4xx/ibm440gx.c
+++ b/arch/ppc/platforms/4xx/ibm440gx.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm440gx.c
3 *
4 * PPC440GX I/O descriptions 2 * PPC440GX I/O descriptions
5 * 3 *
6 * Matt Porter <mporter@mvista.com> 4 * Matt Porter <mporter@mvista.com>
diff --git a/arch/ppc/platforms/4xx/ibm440gx.h b/arch/ppc/platforms/4xx/ibm440gx.h
index 0b59d8dcd03c..070a34efe1c7 100644
--- a/arch/ppc/platforms/4xx/ibm440gx.h
+++ b/arch/ppc/platforms/4xx/ibm440gx.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/ibm440gx.h
3 *
4 * PPC440GX definitions 2 * PPC440GX definitions
5 * 3 *
6 * Matt Porter <mporter@mvista.com> 4 * Matt Porter <mporter@mvista.com>
diff --git a/arch/ppc/platforms/4xx/ibm440sp.c b/arch/ppc/platforms/4xx/ibm440sp.c
index 71a0117d3597..de8f7ac5623c 100644
--- a/arch/ppc/platforms/4xx/ibm440sp.c
+++ b/arch/ppc/platforms/4xx/ibm440sp.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm440sp.c
3 *
4 * PPC440SP I/O descriptions 2 * PPC440SP I/O descriptions
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/platforms/4xx/ibm440sp.h b/arch/ppc/platforms/4xx/ibm440sp.h
index c71e46a18b9e..77e8bb22c527 100644
--- a/arch/ppc/platforms/4xx/ibm440sp.h
+++ b/arch/ppc/platforms/4xx/ibm440sp.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm440sp.h
3 *
4 * PPC440SP definitions 2 * PPC440SP definitions
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/platforms/4xx/ibmnp405h.c b/arch/ppc/platforms/4xx/ibmnp405h.c
index a477a78f4902..f1dcb0ac15b7 100644
--- a/arch/ppc/platforms/4xx/ibmnp405h.c
+++ b/arch/ppc/platforms/4xx/ibmnp405h.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibmnp405h.c
3 *
4 * Author: Armin Kuster <akuster@mvista.com> 2 * Author: Armin Kuster <akuster@mvista.com>
5 * 3 *
6 * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/4xx/ibmnp405h.h b/arch/ppc/platforms/4xx/ibmnp405h.h
index e2c2b06128c8..2c683f6aaa66 100644
--- a/arch/ppc/platforms/4xx/ibmnp405h.h
+++ b/arch/ppc/platforms/4xx/ibmnp405h.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibmnp405h.h
3 *
4 * Author: Armin Kuster <akuster@mvista.com> 2 * Author: Armin Kuster <akuster@mvista.com>
5 * 3 *
6 * 2002 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2002 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/4xx/ibmstb4.c b/arch/ppc/platforms/4xx/ibmstb4.c
index 7e33bb635443..799a2eccccc3 100644
--- a/arch/ppc/platforms/4xx/ibmstb4.c
+++ b/arch/ppc/platforms/4xx/ibmstb4.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibmstb4.c
3 *
4 * Author: Armin Kuster <akuster@mvista.com> 2 * Author: Armin Kuster <akuster@mvista.com>
5 * 3 *
6 * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/4xx/ibmstb4.h b/arch/ppc/platforms/4xx/ibmstb4.h
index 9f21d4c88a3d..9de426597351 100644
--- a/arch/ppc/platforms/4xx/ibmstb4.h
+++ b/arch/ppc/platforms/4xx/ibmstb4.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibmstb4.h
3 *
4 * Author: Armin Kuster <akuster@mvista.com> 2 * Author: Armin Kuster <akuster@mvista.com>
5 * 3 *
6 * 2001 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2001 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/4xx/ibmstbx25.c b/arch/ppc/platforms/4xx/ibmstbx25.c
index b895b9cca57d..090ddcbecc5e 100644
--- a/arch/ppc/platforms/4xx/ibmstbx25.c
+++ b/arch/ppc/platforms/4xx/ibmstbx25.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibmstbx25.c
3 *
4 * Author: Armin Kuster <akuster@mvista.com> 2 * Author: Armin Kuster <akuster@mvista.com>
5 * 3 *
6 * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/4xx/ibmstbx25.h b/arch/ppc/platforms/4xx/ibmstbx25.h
index 9a2efc366e9c..6884a49d3482 100644
--- a/arch/ppc/platforms/4xx/ibmstbx25.h
+++ b/arch/ppc/platforms/4xx/ibmstbx25.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibmstbx25.h
3 *
4 * Author: Armin Kuster <akuster@mvista.com> 2 * Author: Armin Kuster <akuster@mvista.com>
5 * 3 *
6 * 2002 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2002 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/4xx/luan.c b/arch/ppc/platforms/4xx/luan.c
index 21d29132aebd..5c37de28e135 100644
--- a/arch/ppc/platforms/4xx/luan.c
+++ b/arch/ppc/platforms/4xx/luan.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/luan.c
3 *
4 * Luan board specific routines 2 * Luan board specific routines
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/platforms/4xx/luan.h b/arch/ppc/platforms/4xx/luan.h
index bbe7d0766db8..e0db6a810feb 100644
--- a/arch/ppc/platforms/4xx/luan.h
+++ b/arch/ppc/platforms/4xx/luan.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/luan.h
3 *
4 * Luan board definitions 2 * Luan board definitions
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c
index 4f355b6acab2..f841972f1fa9 100644
--- a/arch/ppc/platforms/4xx/ocotea.c
+++ b/arch/ppc/platforms/4xx/ocotea.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ocotea.c
3 *
4 * Ocotea board specific routines 2 * Ocotea board specific routines
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/platforms/4xx/ocotea.h b/arch/ppc/platforms/4xx/ocotea.h
index 33251153ac5f..7c799a9ff82b 100644
--- a/arch/ppc/platforms/4xx/ocotea.h
+++ b/arch/ppc/platforms/4xx/ocotea.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/ocotea.h
3 *
4 * Ocotea board definitions 2 * Ocotea board definitions
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/platforms/4xx/ppc440spe.c b/arch/ppc/platforms/4xx/ppc440spe.c
index 6139a0b3393e..1be5d1c8e266 100644
--- a/arch/ppc/platforms/4xx/ppc440spe.c
+++ b/arch/ppc/platforms/4xx/ppc440spe.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ppc440spe.c
3 *
4 * PPC440SPe I/O descriptions 2 * PPC440SPe I/O descriptions
5 * 3 *
6 * Roland Dreier <rolandd@cisco.com> 4 * Roland Dreier <rolandd@cisco.com>
diff --git a/arch/ppc/platforms/4xx/ppc440spe.h b/arch/ppc/platforms/4xx/ppc440spe.h
index 2216846973b8..d3a620ddcdee 100644
--- a/arch/ppc/platforms/4xx/ppc440spe.h
+++ b/arch/ppc/platforms/4xx/ppc440spe.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/ibm440spe.h
3 *
4 * PPC440SPe definitions 2 * PPC440SPe definitions
5 * 3 *
6 * Roland Dreier <rolandd@cisco.com> 4 * Roland Dreier <rolandd@cisco.com>
diff --git a/arch/ppc/platforms/4xx/redwood5.c b/arch/ppc/platforms/4xx/redwood5.c
index 611ac861804d..53da2b4f7c24 100644
--- a/arch/ppc/platforms/4xx/redwood5.c
+++ b/arch/ppc/platforms/4xx/redwood5.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/redwood5.c
3 *
4 * Support for the IBM redwood5 eval board file 2 * Support for the IBM redwood5 eval board file
5 * 3 *
6 * Author: Armin Kuster <akuster@mvista.com> 4 * Author: Armin Kuster <akuster@mvista.com>
diff --git a/arch/ppc/platforms/4xx/redwood5.h b/arch/ppc/platforms/4xx/redwood5.h
index 264e34fb3fbd..49edd4818970 100644
--- a/arch/ppc/platforms/4xx/redwood5.h
+++ b/arch/ppc/platforms/4xx/redwood5.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/redwood5.h
3 *
4 * Macros, definitions, and data structures specific to the IBM PowerPC 2 * Macros, definitions, and data structures specific to the IBM PowerPC
5 * STB03xxx "Redwood" evaluation board. 3 * STB03xxx "Redwood" evaluation board.
6 * 4 *
diff --git a/arch/ppc/platforms/4xx/redwood6.c b/arch/ppc/platforms/4xx/redwood6.c
index b13116691289..41b27d106fa3 100644
--- a/arch/ppc/platforms/4xx/redwood6.c
+++ b/arch/ppc/platforms/4xx/redwood6.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/redwood6.c
3 *
4 * Author: Armin Kuster <akuster@mvista.com> 2 * Author: Armin Kuster <akuster@mvista.com>
5 * 3 *
6 * 2002 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2002 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/4xx/redwood6.h b/arch/ppc/platforms/4xx/redwood6.h
index 1814b9f5fc3a..1edcbe5c51c7 100644
--- a/arch/ppc/platforms/4xx/redwood6.h
+++ b/arch/ppc/platforms/4xx/redwood6.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/redwood6.h
3 *
4 * Macros, definitions, and data structures specific to the IBM PowerPC 2 * Macros, definitions, and data structures specific to the IBM PowerPC
5 * STBx25xx "Redwood6" evaluation board. 3 * STBx25xx "Redwood6" evaluation board.
6 * 4 *
diff --git a/arch/ppc/platforms/4xx/sycamore.c b/arch/ppc/platforms/4xx/sycamore.c
index 281b4a2ffb96..bab31eb30687 100644
--- a/arch/ppc/platforms/4xx/sycamore.c
+++ b/arch/ppc/platforms/4xx/sycamore.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/sycamore.c
3 *
4 * Architecture- / platform-specific boot-time initialization code for 2 * Architecture- / platform-specific boot-time initialization code for
5 * IBM PowerPC 4xx based boards. 3 * IBM PowerPC 4xx based boards.
6 * 4 *
diff --git a/arch/ppc/platforms/4xx/sycamore.h b/arch/ppc/platforms/4xx/sycamore.h
index 1cd6c824fd62..dae01620227d 100644
--- a/arch/ppc/platforms/4xx/sycamore.h
+++ b/arch/ppc/platforms/4xx/sycamore.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/sycamore.h
3 *
4 * Sycamore board definitions 2 * Sycamore board definitions
5 * 3 *
6 * Copyright (c) 2005 DENX Software Engineering 4 * Copyright (c) 2005 DENX Software Engineering
diff --git a/arch/ppc/platforms/4xx/virtex-ii_pro.c b/arch/ppc/platforms/4xx/virtex-ii_pro.c
deleted file mode 100644
index 097cc9d5aca0..000000000000
--- a/arch/ppc/platforms/4xx/virtex-ii_pro.c
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 * arch/ppc/platforms/4xx/virtex-ii_pro.c
3 *
4 * Author: MontaVista Software, Inc.
5 * source@mvista.com
6 *
7 * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is licensed
9 * "as is" without any warranty of any kind, whether express or implied.
10 */
11
12#include <linux/config.h>
13#include <linux/init.h>
14#include <asm/ocp.h>
15#include "virtex-ii_pro.h"
16
17/* Have OCP take care of the serial ports. */
18struct ocp_def core_ocp[] = {
19#ifdef XPAR_UARTNS550_0_BASEADDR
20 { .vendor = OCP_VENDOR_XILINX,
21 .function = OCP_FUNC_16550,
22 .index = 0,
23 .paddr = XPAR_UARTNS550_0_BASEADDR,
24 .irq = XPAR_INTC_0_UARTNS550_0_VEC_ID,
25 .pm = OCP_CPM_NA
26 },
27#ifdef XPAR_UARTNS550_1_BASEADDR
28 { .vendor = OCP_VENDOR_XILINX,
29 .function = OCP_FUNC_16550,
30 .index = 1,
31 .paddr = XPAR_UARTNS550_1_BASEADDR,
32 .irq = XPAR_INTC_0_UARTNS550_1_VEC_ID,
33 .pm = OCP_CPM_NA
34 },
35#ifdef XPAR_UARTNS550_2_BASEADDR
36 { .vendor = OCP_VENDOR_XILINX,
37 .function = OCP_FUNC_16550,
38 .index = 2,
39 .paddr = XPAR_UARTNS550_2_BASEADDR,
40 .irq = XPAR_INTC_0_UARTNS550_2_VEC_ID,
41 .pm = OCP_CPM_NA
42 },
43#ifdef XPAR_UARTNS550_3_BASEADDR
44 { .vendor = OCP_VENDOR_XILINX,
45 .function = OCP_FUNC_16550,
46 .index = 3,
47 .paddr = XPAR_UARTNS550_3_BASEADDR,
48 .irq = XPAR_INTC_0_UARTNS550_3_VEC_ID,
49 .pm = OCP_CPM_NA
50 },
51#ifdef XPAR_UARTNS550_4_BASEADDR
52#error Edit this file to add more devices.
53#endif /* 4 */
54#endif /* 3 */
55#endif /* 2 */
56#endif /* 1 */
57#endif /* 0 */
58 { .vendor = OCP_VENDOR_INVALID
59 }
60};
diff --git a/arch/ppc/platforms/4xx/virtex-ii_pro.h b/arch/ppc/platforms/4xx/virtex-ii_pro.h
deleted file mode 100644
index 9014c4887339..000000000000
--- a/arch/ppc/platforms/4xx/virtex-ii_pro.h
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * arch/ppc/platforms/4xx/virtex-ii_pro.h
3 *
4 * Include file that defines the Xilinx Virtex-II Pro processor
5 *
6 * Author: MontaVista Software, Inc.
7 * source@mvista.com
8 *
9 * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is licensed
11 * "as is" without any warranty of any kind, whether express or implied.
12 */
13
14#ifdef __KERNEL__
15#ifndef __ASM_VIRTEXIIPRO_H__
16#define __ASM_VIRTEXIIPRO_H__
17
18#include <linux/config.h>
19#include <asm/xparameters.h>
20
21/* serial defines */
22
23#define RS_TABLE_SIZE 4 /* change this and add more devices below
24 if you have more then 4 16x50 UARTs */
25
26#define BASE_BAUD (XPAR_UARTNS550_0_CLOCK_FREQ_HZ/16)
27
28/* The serial ports in the Virtex-II Pro have each I/O byte in the
29 * LSByte of a word. This means that iomem_reg_shift needs to be 2 to
30 * change the byte offsets into word offsets. In addition the base
31 * addresses need to have 3 added to them to get to the LSByte.
32 */
33#define STD_UART_OP(num) \
34 { 0, BASE_BAUD, 0, XPAR_INTC_0_UARTNS550_##num##_VEC_ID, \
35 ASYNC_BOOT_AUTOCONF, \
36 .iomem_base = (u8 *)XPAR_UARTNS550_##num##_BASEADDR + 3, \
37 .iomem_reg_shift = 2, \
38 .io_type = SERIAL_IO_MEM},
39
40#if defined(XPAR_INTC_0_UARTNS550_0_VEC_ID)
41#define ML300_UART0 STD_UART_OP(0)
42#else
43#define ML300_UART0
44#endif
45
46#if defined(XPAR_INTC_0_UARTNS550_1_VEC_ID)
47#define ML300_UART1 STD_UART_OP(1)
48#else
49#define ML300_UART1
50#endif
51
52#if defined(XPAR_INTC_0_UARTNS550_2_VEC_ID)
53#define ML300_UART2 STD_UART_OP(2)
54#else
55#define ML300_UART2
56#endif
57
58#if defined(XPAR_INTC_0_UARTNS550_3_VEC_ID)
59#define ML300_UART3 STD_UART_OP(3)
60#else
61#define ML300_UART3
62#endif
63
64#if defined(XPAR_INTC_0_UARTNS550_4_VEC_ID)
65#error Edit this file to add more devices.
66#elif defined(XPAR_INTC_0_UARTNS550_3_VEC_ID)
67#define NR_SER_PORTS 4
68#elif defined(XPAR_INTC_0_UARTNS550_2_VEC_ID)
69#define NR_SER_PORTS 3
70#elif defined(XPAR_INTC_0_UARTNS550_1_VEC_ID)
71#define NR_SER_PORTS 2
72#elif defined(XPAR_INTC_0_UARTNS550_0_VEC_ID)
73#define NR_SER_PORTS 1
74#else
75#define NR_SER_PORTS 0
76#endif
77
78#if defined(CONFIG_UART0_TTYS0)
79#define SERIAL_PORT_DFNS \
80 ML300_UART0 \
81 ML300_UART1 \
82 ML300_UART2 \
83 ML300_UART3
84#endif
85
86#if defined(CONFIG_UART0_TTYS1)
87#define SERIAL_PORT_DFNS \
88 ML300_UART1 \
89 ML300_UART0 \
90 ML300_UART2 \
91 ML300_UART3
92#endif
93
94#define DCRN_CPMFR_BASE 0
95
96#include <asm/ibm405.h>
97
98#endif /* __ASM_VIRTEXIIPRO_H__ */
99#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/virtex.c b/arch/ppc/platforms/4xx/virtex.c
new file mode 100644
index 000000000000..133a83147199
--- /dev/null
+++ b/arch/ppc/platforms/4xx/virtex.c
@@ -0,0 +1,56 @@
1/*
2 * Virtex-II Pro & Virtex-4 FX common infrastructure
3 *
4 * Maintainer: Grant Likely <grant.likely@secretlab.ca>
5 *
6 * Copyright 2005 Secret Lab Technologies Ltd.
7 * Copyright 2005 General Dynamics Canada Ltd.
8 * Copyright 2005 Freescale Semiconductor Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/device.h>
19#include <linux/serial_8250.h>
20#include <asm/ppc_sys.h>
21#include <platforms/4xx/virtex.h>
22#include <platforms/4xx/xparameters/xparameters.h>
23
24#define XPAR_UART(num) { \
25 .mapbase = XPAR_UARTNS550_##num##_BASEADDR + 3, \
26 .irq = XPAR_INTC_0_UARTNS550_##num##_VEC_ID, \
27 .iotype = UPIO_MEM, \
28 .uartclk = XPAR_UARTNS550_##num##_CLOCK_FREQ_HZ, \
29 .flags = UPF_BOOT_AUTOCONF, \
30 .regshift = 2, \
31 }
32
33struct plat_serial8250_port serial_platform_data[] = {
34#ifdef XPAR_UARTNS550_0_BASEADDR
35 XPAR_UART(0),
36#endif
37#ifdef XPAR_UARTNS550_1_BASEADDR
38 XPAR_UART(1),
39#endif
40#ifdef XPAR_UARTNS550_2_BASEADDR
41 XPAR_UART(2),
42#endif
43#ifdef XPAR_UARTNS550_3_BASEADDR
44 XPAR_UART(3),
45#endif
46 { }, /* terminated by empty record */
47};
48
49struct platform_device ppc_sys_platform_devices[] = {
50 [VIRTEX_UART] = {
51 .name = "serial8250",
52 .id = 0,
53 .dev.platform_data = serial_platform_data,
54 },
55};
56
diff --git a/arch/ppc/platforms/4xx/virtex.h b/arch/ppc/platforms/4xx/virtex.h
new file mode 100644
index 000000000000..c14325dfd7b1
--- /dev/null
+++ b/arch/ppc/platforms/4xx/virtex.h
@@ -0,0 +1,35 @@
1/*
2 * arch/ppc/platforms/4xx/virtex.h
3 *
4 * Include file that defines the Xilinx Virtex-II Pro processor
5 *
6 * Author: MontaVista Software, Inc.
7 * source@mvista.com
8 *
9 * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is licensed
11 * "as is" without any warranty of any kind, whether express or implied.
12 */
13
14#ifdef __KERNEL__
15#ifndef __ASM_VIRTEX_H__
16#define __ASM_VIRTEX_H__
17
18/* serial defines */
19
20#include <asm/ibm405.h>
21
22/* Ugly, ugly, ugly! BASE_BAUD defined here to keep 8250.c happy. */
23#if !defined(BASE_BAUD)
24 #define BASE_BAUD (0) /* dummy value; not used */
25#endif
26
27/* Device type enumeration for platform bus definitions */
28#ifndef __ASSEMBLY__
29enum ppc_sys_devices {
30 VIRTEX_UART, NUM_PPC_SYS_DEVS,
31};
32#endif
33
34#endif /* __ASM_VIRTEX_H__ */
35#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/walnut.c b/arch/ppc/platforms/4xx/walnut.c
index 74cb33182d9f..6bd77902b9a4 100644
--- a/arch/ppc/platforms/4xx/walnut.c
+++ b/arch/ppc/platforms/4xx/walnut.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/walnut.c
3 *
4 * Architecture- / platform-specific boot-time initialization code for 2 * Architecture- / platform-specific boot-time initialization code for
5 * IBM PowerPC 4xx based boards. Adapted from original 3 * IBM PowerPC 4xx based boards. Adapted from original
6 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek 4 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
diff --git a/arch/ppc/platforms/4xx/walnut.h b/arch/ppc/platforms/4xx/walnut.h
index dcf2691698c0..f13a577f0a41 100644
--- a/arch/ppc/platforms/4xx/walnut.h
+++ b/arch/ppc/platforms/4xx/walnut.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/walnut.h
3 *
4 * Walnut board definitions 2 * Walnut board definitions
5 * 3 *
6 * Copyright (c) 2005 DENX Software Engineering 4 * Copyright (c) 2005 DENX Software Engineering
diff --git a/arch/ppc/platforms/4xx/xilinx_ml300.c b/arch/ppc/platforms/4xx/xilinx_ml300.c
index e90d97f64f76..d97a7f269f97 100644
--- a/arch/ppc/platforms/4xx/xilinx_ml300.c
+++ b/arch/ppc/platforms/4xx/xilinx_ml300.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/xilinx_ml300.c
3 *
4 * Xilinx ML300 evaluation board initialization 2 * Xilinx ML300 evaluation board initialization
5 * 3 *
6 * Author: MontaVista Software, Inc. 4 * Author: MontaVista Software, Inc.
@@ -17,12 +15,14 @@
17#include <linux/tty.h> 15#include <linux/tty.h>
18#include <linux/serial.h> 16#include <linux/serial.h>
19#include <linux/serial_core.h> 17#include <linux/serial_core.h>
18#include <linux/serial_8250.h>
20#include <linux/serialP.h> 19#include <linux/serialP.h>
21#include <asm/io.h> 20#include <asm/io.h>
22#include <asm/machdep.h> 21#include <asm/machdep.h>
23#include <asm/ocp.h> 22#include <asm/ppc_sys.h>
24 23
25#include <platforms/4xx/virtex-ii_pro.h> /* for NR_SER_PORTS */ 24#include <syslib/gen550.h>
25#include <platforms/4xx/xparameters/xparameters.h>
26 26
27/* 27/*
28 * As an overview of how the following functions (platform_init, 28 * As an overview of how the following functions (platform_init,
@@ -54,6 +54,22 @@
54 * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c 54 * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c
55 */ 55 */
56 56
57/* Board specifications structures */
58struct ppc_sys_spec *cur_ppc_sys_spec;
59struct ppc_sys_spec ppc_sys_specs[] = {
60 {
61 /* Only one entry, always assume the same design */
62 .ppc_sys_name = "Xilinx ML300 Reference Design",
63 .mask = 0x00000000,
64 .value = 0x00000000,
65 .num_devices = 1,
66 .device_list = (enum ppc_sys_devices[])
67 {
68 VIRTEX_UART,
69 },
70 },
71};
72
57#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR) 73#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
58 74
59static volatile unsigned *powerdown_base = 75static volatile unsigned *powerdown_base =
@@ -80,28 +96,39 @@ ml300_map_io(void)
80#endif 96#endif
81} 97}
82 98
99/* Early serial support functions */
83static void __init 100static void __init
101ml300_early_serial_init(int num, struct plat_serial8250_port *pdata)
102{
103#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
104 struct uart_port serial_req;
105
106 memset(&serial_req, 0, sizeof(serial_req));
107 serial_req.mapbase = pdata->mapbase;
108 serial_req.membase = pdata->membase;
109 serial_req.irq = pdata->irq;
110 serial_req.uartclk = pdata->uartclk;
111 serial_req.regshift = pdata->regshift;
112 serial_req.iotype = pdata->iotype;
113 serial_req.flags = pdata->flags;
114 gen550_init(num, &serial_req);
115#endif
116}
117
118void __init
84ml300_early_serial_map(void) 119ml300_early_serial_map(void)
85{ 120{
86#ifdef CONFIG_SERIAL_8250 121#ifdef CONFIG_SERIAL_8250
87 struct serial_state old_ports[] = { SERIAL_PORT_DFNS }; 122 struct plat_serial8250_port *pdata;
88 struct uart_port port; 123 int i = 0;
89 int i; 124
90 125 pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(VIRTEX_UART);
91 /* Setup ioremapped serial port access */ 126 while(pdata && pdata->flags)
92 for (i = 0; i < ARRAY_SIZE(old_ports); i++ ) { 127 {
93 memset(&port, 0, sizeof(port)); 128 pdata->membase = ioremap(pdata->mapbase, 0x100);
94 port.membase = ioremap((phys_addr_t)(old_ports[i].iomem_base), 16); 129 ml300_early_serial_init(i, pdata);
95 port.irq = old_ports[i].irq; 130 pdata++;
96 port.uartclk = old_ports[i].baud_base * 16; 131 i++;
97 port.regshift = old_ports[i].iomem_reg_shift;
98 port.iotype = UPIO_MEM;
99 port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
100 port.line = i;
101
102 if (early_serial_setup(&port) != 0) {
103 printk("Early serial init of port %d failed\n", i);
104 }
105 } 132 }
106#endif /* CONFIG_SERIAL_8250 */ 133#endif /* CONFIG_SERIAL_8250 */
107} 134}
@@ -109,9 +136,8 @@ ml300_early_serial_map(void)
109void __init 136void __init
110ml300_setup_arch(void) 137ml300_setup_arch(void)
111{ 138{
112 ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
113
114 ml300_early_serial_map(); 139 ml300_early_serial_map();
140 ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
115 141
116 /* Identify the system */ 142 /* Identify the system */
117 printk(KERN_INFO "Xilinx Virtex-II Pro port\n"); 143 printk(KERN_INFO "Xilinx Virtex-II Pro port\n");
@@ -131,6 +157,8 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
131{ 157{
132 ppc4xx_init(r3, r4, r5, r6, r7); 158 ppc4xx_init(r3, r4, r5, r6, r7);
133 159
160 identify_ppc_sys_by_id(mfspr(SPRN_PVR));
161
134 ppc_md.setup_arch = ml300_setup_arch; 162 ppc_md.setup_arch = ml300_setup_arch;
135 ppc_md.setup_io_mappings = ml300_map_io; 163 ppc_md.setup_io_mappings = ml300_map_io;
136 ppc_md.init_IRQ = ml300_init_irq; 164 ppc_md.init_IRQ = ml300_init_irq;
diff --git a/arch/ppc/platforms/4xx/xilinx_ml300.h b/arch/ppc/platforms/4xx/xilinx_ml300.h
index f8c588412336..3d57332ba820 100644
--- a/arch/ppc/platforms/4xx/xilinx_ml300.h
+++ b/arch/ppc/platforms/4xx/xilinx_ml300.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/xilinx_ml300.h
3 *
4 * Include file that defines the Xilinx ML300 evaluation board 2 * Include file that defines the Xilinx ML300 evaluation board
5 * 3 *
6 * Author: MontaVista Software, Inc. 4 * Author: MontaVista Software, Inc.
@@ -16,7 +14,7 @@
16#define __ASM_XILINX_ML300_H__ 14#define __ASM_XILINX_ML300_H__
17 15
18/* ML300 has a Xilinx Virtex-II Pro processor */ 16/* ML300 has a Xilinx Virtex-II Pro processor */
19#include <platforms/4xx/virtex-ii_pro.h> 17#include <platforms/4xx/virtex.h>
20 18
21#ifndef __ASSEMBLY__ 19#ifndef __ASSEMBLY__
22 20
@@ -41,7 +39,7 @@ typedef struct board_info {
41#define PPC4xx_ONB_IO_VADDR 0u 39#define PPC4xx_ONB_IO_VADDR 0u
42#define PPC4xx_ONB_IO_SIZE 0u 40#define PPC4xx_ONB_IO_SIZE 0u
43 41
44#define PPC4xx_MACHINE_NAME "Xilinx ML300" 42#define PPC4xx_MACHINE_NAME "Xilinx ML300 Reference System"
45 43
46#endif /* __ASM_XILINX_ML300_H__ */ 44#endif /* __ASM_XILINX_ML300_H__ */
47#endif /* __KERNEL__ */ 45#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/xilinx_ml403.c b/arch/ppc/platforms/4xx/xilinx_ml403.c
new file mode 100644
index 000000000000..4c0c7e4c1114
--- /dev/null
+++ b/arch/ppc/platforms/4xx/xilinx_ml403.c
@@ -0,0 +1,177 @@
1/*
2 * arch/ppc/platforms/4xx/xilinx_ml403.c
3 *
4 * Xilinx ML403 evaluation board initialization
5 *
6 * Author: Grant Likely <grant.likely@secretlab.ca>
7 *
8 * 2005 (c) Secret Lab Technologies Ltd.
9 * 2002-2004 (c) MontaVista Software, Inc.
10 *
11 * This file is licensed under the terms of the GNU General Public License
12 * version 2. This program is licensed "as is" without any warranty of any
13 * kind, whether express or implied.
14 */
15
16#include <linux/config.h>
17#include <linux/init.h>
18#include <linux/irq.h>
19#include <linux/tty.h>
20#include <linux/serial.h>
21#include <linux/serial_core.h>
22#include <linux/serial_8250.h>
23#include <linux/serialP.h>
24#include <asm/io.h>
25#include <asm/machdep.h>
26#include <asm/ppc_sys.h>
27
28#include <syslib/gen550.h>
29#include <platforms/4xx/xparameters/xparameters.h>
30
31/*
32 * As an overview of how the following functions (platform_init,
33 * ml403_map_io, ml403_setup_arch and ml403_init_IRQ) fit into the
34 * kernel startup procedure, here's a call tree:
35 *
36 * start_here arch/ppc/kernel/head_4xx.S
37 * early_init arch/ppc/kernel/setup.c
38 * machine_init arch/ppc/kernel/setup.c
39 * platform_init this file
40 * ppc4xx_init arch/ppc/syslib/ppc4xx_setup.c
41 * parse_bootinfo
42 * find_bootinfo
43 * "setup some default ppc_md pointers"
44 * MMU_init arch/ppc/mm/init.c
45 * *ppc_md.setup_io_mappings == ml403_map_io this file
46 * ppc4xx_map_io arch/ppc/syslib/ppc4xx_setup.c
47 * start_kernel init/main.c
48 * setup_arch arch/ppc/kernel/setup.c
49 * #if defined(CONFIG_KGDB)
50 * *ppc_md.kgdb_map_scc() == gen550_kgdb_map_scc
51 * #endif
52 * *ppc_md.setup_arch == ml403_setup_arch this file
53 * ppc4xx_setup_arch arch/ppc/syslib/ppc4xx_setup.c
54 * ppc4xx_find_bridges arch/ppc/syslib/ppc405_pci.c
55 * init_IRQ arch/ppc/kernel/irq.c
56 * *ppc_md.init_IRQ == ml403_init_IRQ this file
57 * ppc4xx_init_IRQ arch/ppc/syslib/ppc4xx_setup.c
58 * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c
59 */
60
61/* Board specifications structures */
62struct ppc_sys_spec *cur_ppc_sys_spec;
63struct ppc_sys_spec ppc_sys_specs[] = {
64 {
65 /* Only one entry, always assume the same design */
66 .ppc_sys_name = "Xilinx ML403 Reference Design",
67 .mask = 0x00000000,
68 .value = 0x00000000,
69 .num_devices = 1,
70 .device_list = (enum ppc_sys_devices[])
71 {
72 VIRTEX_UART,
73 },
74 },
75};
76
77#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
78
79static volatile unsigned *powerdown_base =
80 (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR;
81
82static void
83xilinx_power_off(void)
84{
85 local_irq_disable();
86 out_be32(powerdown_base, XPAR_POWER_0_POWERDOWN_VALUE);
87 while (1) ;
88}
89#endif
90
91void __init
92ml403_map_io(void)
93{
94 ppc4xx_map_io();
95
96#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
97 powerdown_base = ioremap((unsigned long) powerdown_base,
98 XPAR_POWER_0_POWERDOWN_HIGHADDR -
99 XPAR_POWER_0_POWERDOWN_BASEADDR + 1);
100#endif
101}
102
103/* Early serial support functions */
104static void __init
105ml403_early_serial_init(int num, struct plat_serial8250_port *pdata)
106{
107#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
108 struct uart_port serial_req;
109
110 memset(&serial_req, 0, sizeof(serial_req));
111 serial_req.mapbase = pdata->mapbase;
112 serial_req.membase = pdata->membase;
113 serial_req.irq = pdata->irq;
114 serial_req.uartclk = pdata->uartclk;
115 serial_req.regshift = pdata->regshift;
116 serial_req.iotype = pdata->iotype;
117 serial_req.flags = pdata->flags;
118 gen550_init(num, &serial_req);
119#endif
120}
121
122void __init
123ml403_early_serial_map(void)
124{
125#ifdef CONFIG_SERIAL_8250
126 struct plat_serial8250_port *pdata;
127 int i = 0;
128
129 pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(VIRTEX_UART);
130 while(pdata && pdata->flags)
131 {
132 pdata->membase = ioremap(pdata->mapbase, 0x100);
133 ml403_early_serial_init(i, pdata);
134 pdata++;
135 i++;
136 }
137#endif /* CONFIG_SERIAL_8250 */
138}
139
140void __init
141ml403_setup_arch(void)
142{
143 ml403_early_serial_map();
144 ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
145
146 /* Identify the system */
147 printk(KERN_INFO "Xilinx ML403 Reference System (Virtex-4 FX)\n");
148}
149
150/* Called after board_setup_irq from ppc4xx_init_IRQ(). */
151void __init
152ml403_init_irq(void)
153{
154 ppc4xx_init_IRQ();
155}
156
157void __init
158platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
159 unsigned long r6, unsigned long r7)
160{
161 ppc4xx_init(r3, r4, r5, r6, r7);
162
163 identify_ppc_sys_by_id(mfspr(SPRN_PVR));
164
165 ppc_md.setup_arch = ml403_setup_arch;
166 ppc_md.setup_io_mappings = ml403_map_io;
167 ppc_md.init_IRQ = ml403_init_irq;
168
169#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
170 ppc_md.power_off = xilinx_power_off;
171#endif
172
173#ifdef CONFIG_KGDB
174 ppc_md.early_serial_map = ml403_early_serial_map;
175#endif
176}
177
diff --git a/arch/ppc/platforms/4xx/xilinx_ml403.h b/arch/ppc/platforms/4xx/xilinx_ml403.h
new file mode 100644
index 000000000000..473596959902
--- /dev/null
+++ b/arch/ppc/platforms/4xx/xilinx_ml403.h
@@ -0,0 +1,49 @@
1/*
2 * arch/ppc/platforms/4xx/xilinx_ml403.h
3 *
4 * Include file that defines the Xilinx ML403 reference design
5 *
6 * Author: Grant Likely <grant.likely@secretlab.ca>
7 *
8 * 2005 (c) Secret Lab Technologies Ltd.
9 * 2002-2004 (c) MontaVista Software, Inc.
10 *
11 * This file is licensed under the terms of the GNU General Public License
12 * version 2. This program is licensed "as is" without any warranty of any
13 * kind, whether express or implied.
14 */
15
16#ifdef __KERNEL__
17#ifndef __ASM_XILINX_ML403_H__
18#define __ASM_XILINX_ML403_H__
19
20/* ML403 has a Xilinx Virtex-4 FPGA with a PPC405 hard core */
21#include <platforms/4xx/virtex.h>
22
23#ifndef __ASSEMBLY__
24
25#include <linux/types.h>
26
27typedef struct board_info {
28 unsigned int bi_memsize; /* DRAM installed, in bytes */
29 unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
30 unsigned int bi_intfreq; /* Processor speed, in Hz */
31 unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
32 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
33} bd_t;
34
35/* Some 4xx parts use a different timebase frequency from the internal clock.
36*/
37#define bi_tbfreq bi_intfreq
38
39#endif /* !__ASSEMBLY__ */
40
41/* We don't need anything mapped. Size of zero will accomplish that. */
42#define PPC4xx_ONB_IO_PADDR 0u
43#define PPC4xx_ONB_IO_VADDR 0u
44#define PPC4xx_ONB_IO_SIZE 0u
45
46#define PPC4xx_MACHINE_NAME "Xilinx ML403 Reference Design"
47
48#endif /* __ASM_XILINX_ML403_H__ */
49#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters.h b/arch/ppc/platforms/4xx/xparameters/xparameters.h
new file mode 100644
index 000000000000..4cf21f256356
--- /dev/null
+++ b/arch/ppc/platforms/4xx/xparameters/xparameters.h
@@ -0,0 +1,37 @@
1/*
2 * include/asm-ppc/xparameters.h
3 *
4 * This file includes the correct xparameters.h for the CONFIG'ed board plus
5 * fixups to translate board specific XPAR values to a common set of names
6 *
7 * Author: MontaVista Software, Inc.
8 * source@mvista.com
9 *
10 * 2004 (c) MontaVista Software, Inc. This file is licensed under the terms
11 * of the GNU General Public License version 2. This program is licensed
12 * "as is" without any warranty of any kind, whether express or implied.
13 */
14
15#include <linux/config.h>
16
17#if defined(CONFIG_XILINX_ML300)
18 #include "xparameters_ml300.h"
19#elif defined(CONFIG_XILINX_ML403)
20 #include "xparameters_ml403.h"
21#else
22 /* Add other board xparameter includes here before the #else */
23 #error No xparameters_*.h file included
24#endif
25
26#ifndef SERIAL_PORT_DFNS
27 /* zImage serial port definitions */
28 #define RS_TABLE_SIZE 1
29 #define SERIAL_PORT_DFNS { \
30 .baud_base = XPAR_UARTNS550_0_CLOCK_FREQ_HZ/16, \
31 .irq = XPAR_INTC_0_UARTNS550_0_VEC_ID, \
32 .flags = ASYNC_BOOT_AUTOCONF, \
33 .iomem_base = (u8 *)XPAR_UARTNS550_0_BASEADDR + 3, \
34 .iomem_reg_shift = 2, \
35 .io_type = SERIAL_IO_MEM, \
36 },
37#endif
diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h b/arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h
new file mode 100644
index 000000000000..5cacdcb3964d
--- /dev/null
+++ b/arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h
@@ -0,0 +1,243 @@
1
2/*******************************************************************
3*
4* CAUTION: This file is automatically generated by libgen.
5* Version: Xilinx EDK 7.1.2 EDK_H.12.5.1
6* DO NOT EDIT.
7*
8* Copyright (c) 2005 Xilinx, Inc. All rights reserved.
9*
10* Description: Driver parameters
11*
12*******************************************************************/
13
14#define XPAR_PLB_BRAM_IF_CNTLR_0_BASEADDR 0xFFFF0000
15#define XPAR_PLB_BRAM_IF_CNTLR_0_HIGHADDR 0xFFFFFFFF
16
17/******************************************************************/
18
19#define XPAR_OPB_EMC_0_MEM0_BASEADDR 0x20000000
20#define XPAR_OPB_EMC_0_MEM0_HIGHADDR 0x200FFFFF
21#define XPAR_OPB_EMC_0_MEM1_BASEADDR 0x28000000
22#define XPAR_OPB_EMC_0_MEM1_HIGHADDR 0x287FFFFF
23#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000
24#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF
25#define XPAR_OPB_EMC_USB_0_MEM0_BASEADDR 0xA5000000
26#define XPAR_OPB_EMC_USB_0_MEM0_HIGHADDR 0xA50000FF
27#define XPAR_PLB_DDR_0_MEM0_BASEADDR 0x00000000
28#define XPAR_PLB_DDR_0_MEM0_HIGHADDR 0x0FFFFFFF
29
30/******************************************************************/
31
32#define XPAR_XEMAC_NUM_INSTANCES 1
33#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000
34#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF
35#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
36#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
37#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
38#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
39
40/******************************************************************/
41
42#define XPAR_XUARTNS550_NUM_INSTANCES 1
43#define XPAR_XUARTNS550_CLOCK_HZ 100000000
44#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000
45#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF
46#define XPAR_OPB_UART16550_0_DEVICE_ID 0
47
48/******************************************************************/
49
50#define XPAR_XGPIO_NUM_INSTANCES 3
51#define XPAR_OPB_GPIO_0_BASEADDR 0x90000000
52#define XPAR_OPB_GPIO_0_HIGHADDR 0x900001FF
53#define XPAR_OPB_GPIO_0_DEVICE_ID 0
54#define XPAR_OPB_GPIO_0_INTERRUPT_PRESENT 0
55#define XPAR_OPB_GPIO_0_IS_DUAL 1
56#define XPAR_OPB_GPIO_EXP_HDR_0_BASEADDR 0x90001000
57#define XPAR_OPB_GPIO_EXP_HDR_0_HIGHADDR 0x900011FF
58#define XPAR_OPB_GPIO_EXP_HDR_0_DEVICE_ID 1
59#define XPAR_OPB_GPIO_EXP_HDR_0_INTERRUPT_PRESENT 0
60#define XPAR_OPB_GPIO_EXP_HDR_0_IS_DUAL 1
61#define XPAR_OPB_GPIO_CHAR_LCD_0_BASEADDR 0x90002000
62#define XPAR_OPB_GPIO_CHAR_LCD_0_HIGHADDR 0x900021FF
63#define XPAR_OPB_GPIO_CHAR_LCD_0_DEVICE_ID 2
64#define XPAR_OPB_GPIO_CHAR_LCD_0_INTERRUPT_PRESENT 0
65#define XPAR_OPB_GPIO_CHAR_LCD_0_IS_DUAL 0
66
67/******************************************************************/
68
69#define XPAR_XPS2_NUM_INSTANCES 2
70#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0
71#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000
72#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F)
73#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1
74#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000)
75#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F)
76
77/******************************************************************/
78
79#define XPAR_XIIC_NUM_INSTANCES 1
80#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000
81#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF
82#define XPAR_OPB_IIC_0_DEVICE_ID 0
83#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0
84#define XPAR_OPB_IIC_0_GPO_WIDTH 1
85
86/******************************************************************/
87
88#define XPAR_INTC_MAX_NUM_INTR_INPUTS 10
89#define XPAR_XINTC_HAS_IPR 1
90#define XPAR_XINTC_USE_DCR 0
91#define XPAR_XINTC_NUM_INSTANCES 1
92#define XPAR_OPB_INTC_0_BASEADDR 0xD1000FC0
93#define XPAR_OPB_INTC_0_HIGHADDR 0xD1000FDF
94#define XPAR_OPB_INTC_0_DEVICE_ID 0
95#define XPAR_OPB_INTC_0_KIND_OF_INTR 0x00000000
96
97/******************************************************************/
98
99#define XPAR_INTC_SINGLE_BASEADDR 0xD1000FC0
100#define XPAR_INTC_SINGLE_HIGHADDR 0xD1000FDF
101#define XPAR_INTC_SINGLE_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID
102#define XPAR_OPB_ETHERNET_0_IP2INTC_IRPT_MASK 0X000001
103#define XPAR_OPB_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 0
104#define XPAR_SYSTEM_USB_HPI_INT_MASK 0X000002
105#define XPAR_OPB_INTC_0_SYSTEM_USB_HPI_INT_INTR 1
106#define XPAR_MISC_LOGIC_0_PHY_MII_INT_MASK 0X000004
107#define XPAR_OPB_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 2
108#define XPAR_OPB_SYSACE_0_SYSACE_IRQ_MASK 0X000008
109#define XPAR_OPB_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 3
110#define XPAR_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_MASK 0X000010
111#define XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 4
112#define XPAR_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_MASK 0X000020
113#define XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 5
114#define XPAR_OPB_IIC_0_IP2INTC_IRPT_MASK 0X000040
115#define XPAR_OPB_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 6
116#define XPAR_OPB_PS2_DUAL_REF_0_SYS_INTR2_MASK 0X000080
117#define XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 7
118#define XPAR_OPB_PS2_DUAL_REF_0_SYS_INTR1_MASK 0X000100
119#define XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8
120#define XPAR_OPB_UART16550_0_IP2INTC_IRPT_MASK 0X000200
121#define XPAR_OPB_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 9
122
123/******************************************************************/
124
125#define XPAR_XTFT_NUM_INSTANCES 1
126#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200
127#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207
128#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0
129
130/******************************************************************/
131
132#define XPAR_XSYSACE_MEM_WIDTH 16
133#define XPAR_XSYSACE_NUM_INSTANCES 1
134#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000
135#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF
136#define XPAR_OPB_SYSACE_0_DEVICE_ID 0
137#define XPAR_OPB_SYSACE_0_MEM_WIDTH 16
138
139/******************************************************************/
140
141#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000
142
143/******************************************************************/
144
145
146/******************************************************************/
147
148/* Linux Redefines */
149
150/******************************************************************/
151
152#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000)
153#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR
154#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
155#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID
156
157/******************************************************************/
158
159#define XPAR_INTC_0_BASEADDR XPAR_OPB_INTC_0_BASEADDR
160#define XPAR_INTC_0_HIGHADDR XPAR_OPB_INTC_0_HIGHADDR
161#define XPAR_INTC_0_KIND_OF_INTR XPAR_OPB_INTC_0_KIND_OF_INTR
162#define XPAR_INTC_0_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID
163
164/******************************************************************/
165
166#define XPAR_INTC_0_EMAC_0_VEC_ID XPAR_OPB_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR
167#define XPAR_INTC_0_SYSACE_0_VEC_ID XPAR_OPB_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR
168#define XPAR_INTC_0_IIC_0_VEC_ID XPAR_OPB_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR
169#define XPAR_INTC_0_PS2_1_VEC_ID XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR
170#define XPAR_INTC_0_PS2_0_VEC_ID XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR
171#define XPAR_INTC_0_UARTNS550_0_VEC_ID XPAR_OPB_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR
172
173/******************************************************************/
174
175#define XPAR_TFT_0_BASEADDR XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR
176
177/******************************************************************/
178
179#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR
180#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR
181#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT
182#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST
183#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST
184#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID
185
186/******************************************************************/
187
188#define XPAR_GPIO_0_BASEADDR XPAR_OPB_GPIO_0_BASEADDR_0
189#define XPAR_GPIO_0_HIGHADDR XPAR_OPB_GPIO_0_HIGHADDR_0
190#define XPAR_GPIO_0_DEVICE_ID XPAR_OPB_GPIO_0_DEVICE_ID_0
191#define XPAR_GPIO_1_BASEADDR XPAR_OPB_GPIO_0_BASEADDR_1
192#define XPAR_GPIO_1_HIGHADDR XPAR_OPB_GPIO_0_HIGHADDR_1
193#define XPAR_GPIO_1_DEVICE_ID XPAR_OPB_GPIO_0_DEVICE_ID_1
194#define XPAR_GPIO_2_BASEADDR XPAR_OPB_GPIO_EXP_HDR_0_BASEADDR_0
195#define XPAR_GPIO_2_HIGHADDR XPAR_OPB_GPIO_EXP_HDR_0_HIGHADDR_0
196#define XPAR_GPIO_2_DEVICE_ID XPAR_OPB_GPIO_EXP_HDR_0_DEVICE_ID_0
197#define XPAR_GPIO_3_BASEADDR XPAR_OPB_GPIO_EXP_HDR_0_BASEADDR_1
198#define XPAR_GPIO_3_HIGHADDR XPAR_OPB_GPIO_EXP_HDR_0_HIGHADDR_1
199#define XPAR_GPIO_3_DEVICE_ID XPAR_OPB_GPIO_EXP_HDR_0_DEVICE_ID_1
200#define XPAR_GPIO_4_BASEADDR XPAR_OPB_GPIO_CHAR_LCD_0_BASEADDR
201#define XPAR_GPIO_4_HIGHADDR XPAR_OPB_GPIO_CHAR_LCD_0_HIGHADDR
202#define XPAR_GPIO_4_DEVICE_ID XPAR_OPB_GPIO_CHAR_LCD_0_DEVICE_ID
203
204/******************************************************************/
205
206#define XPAR_PS2_0_BASEADDR XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0
207#define XPAR_PS2_0_HIGHADDR XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0
208#define XPAR_PS2_0_DEVICE_ID XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0
209#define XPAR_PS2_1_BASEADDR XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1
210#define XPAR_PS2_1_HIGHADDR XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1
211#define XPAR_PS2_1_DEVICE_ID XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1
212
213/******************************************************************/
214
215#define XPAR_SYSACE_0_BASEADDR XPAR_OPB_SYSACE_0_BASEADDR
216#define XPAR_SYSACE_0_HIGHADDR XPAR_OPB_SYSACE_0_HIGHADDR
217#define XPAR_SYSACE_0_DEVICE_ID XPAR_OPB_SYSACE_0_DEVICE_ID
218
219/******************************************************************/
220
221#define XPAR_IIC_0_BASEADDR XPAR_OPB_IIC_0_BASEADDR
222#define XPAR_IIC_0_HIGHADDR XPAR_OPB_IIC_0_HIGHADDR
223#define XPAR_IIC_0_TEN_BIT_ADR XPAR_OPB_IIC_0_TEN_BIT_ADR
224#define XPAR_IIC_0_DEVICE_ID XPAR_OPB_IIC_0_DEVICE_ID
225
226/******************************************************************/
227
228#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
229#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
230#define XPAR_DDR_0_SIZE 0x4000000
231
232/******************************************************************/
233
234#define XPAR_PERSISTENT_0_IIC_0_BASEADDR 0x00000400
235#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR 0x000007FF
236#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0
237
238/******************************************************************/
239
240#define XPAR_PCI_0_CLOCK_FREQ_HZ 0
241
242/******************************************************************/
243
diff --git a/arch/ppc/platforms/4xx/yucca.c b/arch/ppc/platforms/4xx/yucca.c
index b065b8babcd3..f287dcdbffce 100644
--- a/arch/ppc/platforms/4xx/yucca.c
+++ b/arch/ppc/platforms/4xx/yucca.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/yucca.c
3 *
4 * Yucca board specific routines 2 * Yucca board specific routines
5 * 3 *
6 * Roland Dreier <rolandd@cisco.com> (based on luan.c by Matt Porter) 4 * Roland Dreier <rolandd@cisco.com> (based on luan.c by Matt Porter)
diff --git a/arch/ppc/platforms/4xx/yucca.h b/arch/ppc/platforms/4xx/yucca.h
index 01a4afea1514..7ae23012237a 100644
--- a/arch/ppc/platforms/4xx/yucca.h
+++ b/arch/ppc/platforms/4xx/yucca.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/yucca.h
3 *
4 * Yucca board definitions 2 * Yucca board definitions
5 * 3 *
6 * Roland Dreier <rolandd@cisco.com> (based on luan.h by Matt Porter) 4 * Roland Dreier <rolandd@cisco.com> (based on luan.h by Matt Porter)
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
index 1a659bbc1860..11626dd9090f 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/83xx/mpc834x_sys.c
3 *
4 * MPC834x SYS board specific routines 2 * MPC834x SYS board specific routines
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
index 2e514d316fb8..6727bbdc36ec 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/83xx/mpc834x_sys.h
3 *
4 * MPC834X SYS common board definitions 2 * MPC834X SYS common board definitions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
@@ -25,7 +23,7 @@
25#define VIRT_IMMRBAR ((uint)0xfe000000) 23#define VIRT_IMMRBAR ((uint)0xfe000000)
26 24
27#define BCSR_PHYS_ADDR ((uint)0xf8000000) 25#define BCSR_PHYS_ADDR ((uint)0xf8000000)
28#define BCSR_SIZE ((uint)(128 * 1024)) 26#define BCSR_SIZE ((uint)(32 * 1024))
29 27
30#define BCSR_MISC_REG2_OFF 0x07 28#define BCSR_MISC_REG2_OFF 0x07
31#define BCSR_MISC_REG2_PORESET 0x01 29#define BCSR_MISC_REG2_PORESET 0x01
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c
index 408d64f18e1a..9b014df516b9 100644
--- a/arch/ppc/platforms/85xx/mpc8540_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8540_ads.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc8540_ads.c
3 *
4 * MPC8540ADS board specific routines 2 * MPC8540ADS board specific routines
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.h b/arch/ppc/platforms/85xx/mpc8540_ads.h
index e48ca3a97397..0b5e7ff856f5 100644
--- a/arch/ppc/platforms/85xx/mpc8540_ads.h
+++ b/arch/ppc/platforms/85xx/mpc8540_ads.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc8540_ads.h
3 *
4 * MPC8540ADS board definitions 2 * MPC8540ADS board definitions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/85xx/mpc8555_cds.h b/arch/ppc/platforms/85xx/mpc8555_cds.h
index 1a8e6c67355d..9754dbd5d18c 100644
--- a/arch/ppc/platforms/85xx/mpc8555_cds.h
+++ b/arch/ppc/platforms/85xx/mpc8555_cds.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/mpc8555_cds.h
3 *
4 * MPC8555CDS board definitions 2 * MPC8555CDS board definitions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c
index 442c7ff195d3..0cb2e86470e2 100644
--- a/arch/ppc/platforms/85xx/mpc8560_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8560_ads.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc8560_ads.c
3 *
4 * MPC8560ADS board specific routines 2 * MPC8560ADS board specific routines
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.h b/arch/ppc/platforms/85xx/mpc8560_ads.h
index 143ae7eefa7c..c2247c21fc53 100644
--- a/arch/ppc/platforms/85xx/mpc8560_ads.h
+++ b/arch/ppc/platforms/85xx/mpc8560_ads.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/mpc8560_ads.h
3 *
4 * MPC8540ADS board definitions 2 * MPC8540ADS board definitions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
index 17ce48fe3503..8fd9d763f58d 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
+++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc85xx_ads_common.c
3 *
4 * MPC85xx ADS board common routines 2 * MPC85xx ADS board common routines
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
index 198a6a02cde8..de8d41aafe11 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
+++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc85xx_ads_common.h
3 *
4 * MPC85XX ADS common board definitions 2 * MPC85XX ADS common board definitions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
index 1801ab392e22..c9e0aeeca3d8 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
+++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platform/85xx/mpc85xx_cds_common.c
3 *
4 * MPC85xx CDS board specific routines 2 * MPC85xx CDS board specific routines
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
index 5b588cfd0e41..62df54f61ae3 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
+++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc85xx_cds_common.h
3 *
4 * MPC85xx CDS board definitions 2 * MPC85xx CDS board definitions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c
index 8a72221f816c..b73778ecf827 100644
--- a/arch/ppc/platforms/85xx/sbc8560.c
+++ b/arch/ppc/platforms/85xx/sbc8560.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/sbc8560.c
3 *
4 * Wind River SBC8560 board specific routines 2 * Wind River SBC8560 board specific routines
5 * 3 *
6 * Maintainer: Kumar Gala 4 * Maintainer: Kumar Gala
diff --git a/arch/ppc/platforms/85xx/sbc8560.h b/arch/ppc/platforms/85xx/sbc8560.h
index 5e1b00c77da5..44ffaa2d2c87 100644
--- a/arch/ppc/platforms/85xx/sbc8560.h
+++ b/arch/ppc/platforms/85xx/sbc8560.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/sbc8560.h
3 *
4 * Wind River SBC8560 board definitions 2 * Wind River SBC8560 board definitions
5 * 3 *
6 * Copyright 2003 Motorola Inc. 4 * Copyright 2003 Motorola Inc.
diff --git a/arch/ppc/platforms/85xx/sbc85xx.c b/arch/ppc/platforms/85xx/sbc85xx.c
index c02f110219f5..d3ff280510ff 100644
--- a/arch/ppc/platforms/85xx/sbc85xx.c
+++ b/arch/ppc/platforms/85xx/sbc85xx.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platform/85xx/sbc85xx.c
3 *
4 * WindRiver PowerQUICC III SBC85xx board common routines 2 * WindRiver PowerQUICC III SBC85xx board common routines
5 * 3 *
6 * Copyright 2002, 2003 Motorola Inc. 4 * Copyright 2002, 2003 Motorola Inc.
diff --git a/arch/ppc/platforms/85xx/sbc85xx.h b/arch/ppc/platforms/85xx/sbc85xx.h
index 7af93c691a6b..5dd8b6a98c9b 100644
--- a/arch/ppc/platforms/85xx/sbc85xx.h
+++ b/arch/ppc/platforms/85xx/sbc85xx.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/sbc85xx.h
3 *
4 * WindRiver PowerQUICC III SBC85xx common board definitions 2 * WindRiver PowerQUICC III SBC85xx common board definitions
5 * 3 *
6 * Copyright 2003 Motorola Inc. 4 * Copyright 2003 Motorola Inc.
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c
index 061bb7cf2d9a..8d7baa9a397a 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.c
+++ b/arch/ppc/platforms/85xx/stx_gp3.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/stx_gp3.c
3 *
4 * STx GP3 board specific routines 2 * STx GP3 board specific routines
5 * 3 *
6 * Dan Malek <dan@embeddededge.com> 4 * Dan Malek <dan@embeddededge.com>
diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h
index 2f25b5195152..3f71f8f59370 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.h
+++ b/arch/ppc/platforms/85xx/stx_gp3.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/stx8560_gp3.h
3 *
4 * STx GP3 board definitions 2 * STx GP3 board definitions
5 * 3 *
6 * Dan Malek (dan@embeddededge.com) 4 * Dan Malek (dan@embeddededge.com)
diff --git a/arch/ppc/platforms/85xx/tqm85xx.c b/arch/ppc/platforms/85xx/tqm85xx.c
index a5e38ba62732..00af132262b3 100644
--- a/arch/ppc/platforms/85xx/tqm85xx.c
+++ b/arch/ppc/platforms/85xx/tqm85xx.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/tqm85xx.c
3 *
4 * TQM85xx (40/41/55/60) board specific routines 2 * TQM85xx (40/41/55/60) board specific routines
5 * 3 *
6 * Copyright (c) 2005 DENX Software Engineering 4 * Copyright (c) 2005 DENX Software Engineering
diff --git a/arch/ppc/platforms/85xx/tqm85xx.h b/arch/ppc/platforms/85xx/tqm85xx.h
index 3775eb363fde..612d80504f9b 100644
--- a/arch/ppc/platforms/85xx/tqm85xx.h
+++ b/arch/ppc/platforms/85xx/tqm85xx.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/tqm85xx.h
3 *
4 * TQM85xx (40/41/55/60) board definitions 2 * TQM85xx (40/41/55/60) board definitions
5 * 3 *
6 * Copyright (c) 2005 DENX Software Engineering 4 * Copyright (c) 2005 DENX Software Engineering
diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
index 51430e294b32..90c622294423 100644
--- a/arch/ppc/platforms/Makefile
+++ b/arch/ppc/platforms/Makefile
@@ -2,18 +2,10 @@
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4 4
5# Extra CFLAGS so we don't have to do relative includes
6CFLAGS_chrp_setup.o += -Iarch/$(ARCH)/mm
7
8obj-$(CONFIG_APUS) += apus_setup.o 5obj-$(CONFIG_APUS) += apus_setup.o
9ifeq ($(CONFIG_APUS),y) 6ifeq ($(CONFIG_APUS),y)
10obj-$(CONFIG_PCI) += apus_pci.o 7obj-$(CONFIG_PCI) += apus_pci.o
11endif 8endif
12obj-$(CONFIG_PPC_CHRP) += chrp_setup.o chrp_time.o chrp_pci.o \
13 chrp_pegasos_eth.o
14ifeq ($(CONFIG_PPC_CHRP),y)
15obj-$(CONFIG_NVRAM) += chrp_nvram.o
16endif
17obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o 9obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o
18obj-$(CONFIG_PREP_RESIDUAL) += residual.o 10obj-$(CONFIG_PREP_RESIDUAL) += residual.o
19obj-$(CONFIG_PQ2ADS) += pq2ads.o 11obj-$(CONFIG_PQ2ADS) += pq2ads.o
@@ -37,7 +29,6 @@ obj-$(CONFIG_SBC82xx) += sbc82xx.o
37obj-$(CONFIG_SPRUCE) += spruce.o 29obj-$(CONFIG_SPRUCE) += spruce.o
38obj-$(CONFIG_LITE5200) += lite5200.o 30obj-$(CONFIG_LITE5200) += lite5200.o
39obj-$(CONFIG_EV64360) += ev64360.o 31obj-$(CONFIG_EV64360) += ev64360.o
40 32obj-$(CONFIG_MPC86XADS) += mpc866ads_setup.o
41ifeq ($(CONFIG_SMP),y) 33obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
42obj-$(CONFIG_PPC_CHRP) += chrp_smp.o 34obj-$(CONFIG_ADS8272) += mpc8272ads_setup.o
43endif
diff --git a/arch/ppc/platforms/apus_setup.c b/arch/ppc/platforms/apus_setup.c
index c42c50073da5..fe0cdc04d436 100644
--- a/arch/ppc/platforms/apus_setup.c
+++ b/arch/ppc/platforms/apus_setup.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/apus_setup.c
3 *
4 * Copyright (C) 1998, 1999 Jesper Skov 2 * Copyright (C) 1998, 1999 Jesper Skov
5 * 3 *
6 * Basically what is needed to replace functionality found in 4 * Basically what is needed to replace functionality found in
diff --git a/arch/ppc/platforms/chestnut.c b/arch/ppc/platforms/chestnut.c
index aefcc0e7be57..f324f757cae1 100644
--- a/arch/ppc/platforms/chestnut.c
+++ b/arch/ppc/platforms/chestnut.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/chestnut.c
3 *
4 * Board setup routines for IBM Chestnut 2 * Board setup routines for IBM Chestnut
5 * 3 *
6 * Author: <source@mvista.com> 4 * Author: <source@mvista.com>
diff --git a/arch/ppc/platforms/chestnut.h b/arch/ppc/platforms/chestnut.h
index 0400b2be40ab..e00fd9f8bbd0 100644
--- a/arch/ppc/platforms/chestnut.h
+++ b/arch/ppc/platforms/chestnut.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/chestnut.h
3 *
4 * Definitions for IBM 750FXGX Eval (Chestnut) 2 * Definitions for IBM 750FXGX Eval (Chestnut)
5 * 3 *
6 * Author: <source@mvista.com> 4 * Author: <source@mvista.com>
diff --git a/arch/ppc/platforms/chrp_nvram.c b/arch/ppc/platforms/chrp_nvram.c
deleted file mode 100644
index 465ba9b090ef..000000000000
--- a/arch/ppc/platforms/chrp_nvram.c
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * c 2001 PPC 64 Team, IBM Corp
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * /dev/nvram driver for PPC
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/slab.h>
16#include <linux/spinlock.h>
17#include <asm/uaccess.h>
18#include <asm/prom.h>
19#include <asm/machdep.h>
20
21static unsigned int nvram_size;
22static unsigned char nvram_buf[4];
23static DEFINE_SPINLOCK(nvram_lock);
24
25static unsigned char chrp_nvram_read(int addr)
26{
27 unsigned long done, flags;
28 unsigned char ret;
29
30 if (addr >= nvram_size) {
31 printk(KERN_DEBUG "%s: read addr %d > nvram_size %u\n",
32 current->comm, addr, nvram_size);
33 return 0xff;
34 }
35 spin_lock_irqsave(&nvram_lock, flags);
36 if ((call_rtas("nvram-fetch", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done)
37 ret = 0xff;
38 else
39 ret = nvram_buf[0];
40 spin_unlock_irqrestore(&nvram_lock, flags);
41
42 return ret;
43}
44
45static void chrp_nvram_write(int addr, unsigned char val)
46{
47 unsigned long done, flags;
48
49 if (addr >= nvram_size) {
50 printk(KERN_DEBUG "%s: write addr %d > nvram_size %u\n",
51 current->comm, addr, nvram_size);
52 return;
53 }
54 spin_lock_irqsave(&nvram_lock, flags);
55 nvram_buf[0] = val;
56 if ((call_rtas("nvram-store", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done)
57 printk(KERN_DEBUG "rtas IO error storing 0x%02x at %d", val, addr);
58 spin_unlock_irqrestore(&nvram_lock, flags);
59}
60
61void __init chrp_nvram_init(void)
62{
63 struct device_node *nvram;
64 unsigned int *nbytes_p, proplen;
65
66 nvram = of_find_node_by_type(NULL, "nvram");
67 if (nvram == NULL)
68 return;
69
70 nbytes_p = (unsigned int *)get_property(nvram, "#bytes", &proplen);
71 if (nbytes_p == NULL || proplen != sizeof(unsigned int))
72 return;
73
74 nvram_size = *nbytes_p;
75
76 printk(KERN_INFO "CHRP nvram contains %u bytes\n", nvram_size);
77 of_node_put(nvram);
78
79 ppc_md.nvram_read_val = chrp_nvram_read;
80 ppc_md.nvram_write_val = chrp_nvram_write;
81
82 return;
83}
diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c
deleted file mode 100644
index c7fe6182bb77..000000000000
--- a/arch/ppc/platforms/chrp_pci.c
+++ /dev/null
@@ -1,309 +0,0 @@
1/*
2 * CHRP pci routines.
3 */
4
5#include <linux/config.h>
6#include <linux/kernel.h>
7#include <linux/pci.h>
8#include <linux/delay.h>
9#include <linux/string.h>
10#include <linux/init.h>
11#include <linux/ide.h>
12
13#include <asm/io.h>
14#include <asm/pgtable.h>
15#include <asm/irq.h>
16#include <asm/hydra.h>
17#include <asm/prom.h>
18#include <asm/gg2.h>
19#include <asm/machdep.h>
20#include <asm/sections.h>
21#include <asm/pci-bridge.h>
22#include <asm/open_pic.h>
23
24/* LongTrail */
25void __iomem *gg2_pci_config_base;
26
27/*
28 * The VLSI Golden Gate II has only 512K of PCI configuration space, so we
29 * limit the bus number to 3 bits
30 */
31
32int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
33 int len, u32 *val)
34{
35 volatile void __iomem *cfg_data;
36 struct pci_controller *hose = bus->sysdata;
37
38 if (bus->number > 7)
39 return PCIBIOS_DEVICE_NOT_FOUND;
40 /*
41 * Note: the caller has already checked that off is
42 * suitably aligned and that len is 1, 2 or 4.
43 */
44 cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off);
45 switch (len) {
46 case 1:
47 *val = in_8(cfg_data);
48 break;
49 case 2:
50 *val = in_le16(cfg_data);
51 break;
52 default:
53 *val = in_le32(cfg_data);
54 break;
55 }
56 return PCIBIOS_SUCCESSFUL;
57}
58
59int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
60 int len, u32 val)
61{
62 volatile void __iomem *cfg_data;
63 struct pci_controller *hose = bus->sysdata;
64
65 if (bus->number > 7)
66 return PCIBIOS_DEVICE_NOT_FOUND;
67 /*
68 * Note: the caller has already checked that off is
69 * suitably aligned and that len is 1, 2 or 4.
70 */
71 cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off);
72 switch (len) {
73 case 1:
74 out_8(cfg_data, val);
75 break;
76 case 2:
77 out_le16(cfg_data, val);
78 break;
79 default:
80 out_le32(cfg_data, val);
81 break;
82 }
83 return PCIBIOS_SUCCESSFUL;
84}
85
86static struct pci_ops gg2_pci_ops =
87{
88 gg2_read_config,
89 gg2_write_config
90};
91
92/*
93 * Access functions for PCI config space using RTAS calls.
94 */
95int
96rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
97 int len, u32 *val)
98{
99 struct pci_controller *hose = bus->sysdata;
100 unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
101 | (((bus->number - hose->first_busno) & 0xff) << 16)
102 | (hose->index << 24);
103 unsigned long ret = ~0UL;
104 int rval;
105
106 rval = call_rtas("read-pci-config", 2, 2, &ret, addr, len);
107 *val = ret;
108 return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
109}
110
111int
112rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
113 int len, u32 val)
114{
115 struct pci_controller *hose = bus->sysdata;
116 unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
117 | (((bus->number - hose->first_busno) & 0xff) << 16)
118 | (hose->index << 24);
119 int rval;
120
121 rval = call_rtas("write-pci-config", 3, 1, NULL, addr, len, val);
122 return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
123}
124
125static struct pci_ops rtas_pci_ops =
126{
127 rtas_read_config,
128 rtas_write_config
129};
130
131volatile struct Hydra __iomem *Hydra = NULL;
132
133int __init
134hydra_init(void)
135{
136 struct device_node *np;
137
138 np = find_devices("mac-io");
139 if (np == NULL || np->n_addrs == 0)
140 return 0;
141 Hydra = ioremap(np->addrs[0].address, np->addrs[0].size);
142 printk("Hydra Mac I/O at %x\n", np->addrs[0].address);
143 printk("Hydra Feature_Control was %x",
144 in_le32(&Hydra->Feature_Control));
145 out_le32(&Hydra->Feature_Control, (HYDRA_FC_SCC_CELL_EN |
146 HYDRA_FC_SCSI_CELL_EN |
147 HYDRA_FC_SCCA_ENABLE |
148 HYDRA_FC_SCCB_ENABLE |
149 HYDRA_FC_ARB_BYPASS |
150 HYDRA_FC_MPIC_ENABLE |
151 HYDRA_FC_SLOW_SCC_PCLK |
152 HYDRA_FC_MPIC_IS_MASTER));
153 printk(", now %x\n", in_le32(&Hydra->Feature_Control));
154 return 1;
155}
156
157void __init
158chrp_pcibios_fixup(void)
159{
160 struct pci_dev *dev = NULL;
161 struct device_node *np;
162
163 /* PCI interrupts are controlled by the OpenPIC */
164 for_each_pci_dev(dev) {
165 np = pci_device_to_OF_node(dev);
166 if ((np != 0) && (np->n_intrs > 0) && (np->intrs[0].line != 0))
167 dev->irq = np->intrs[0].line;
168 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
169 }
170}
171
172#define PRG_CL_RESET_VALID 0x00010000
173
174static void __init
175setup_python(struct pci_controller *hose, struct device_node *dev)
176{
177 u32 __iomem *reg;
178 u32 val;
179 unsigned long addr = dev->addrs[0].address;
180
181 setup_indirect_pci(hose, addr + 0xf8000, addr + 0xf8010);
182
183 /* Clear the magic go-slow bit */
184 reg = ioremap(dev->addrs[0].address + 0xf6000, 0x40);
185 val = in_be32(&reg[12]);
186 if (val & PRG_CL_RESET_VALID) {
187 out_be32(&reg[12], val & ~PRG_CL_RESET_VALID);
188 in_be32(&reg[12]);
189 }
190 iounmap(reg);
191}
192
193/* Marvell Discovery II based Pegasos 2 */
194static void __init setup_peg2(struct pci_controller *hose, struct device_node *dev)
195{
196 struct device_node *root = find_path_device("/");
197 struct device_node *rtas;
198
199 rtas = of_find_node_by_name (root, "rtas");
200 if (rtas) {
201 hose->ops = &rtas_pci_ops;
202 } else {
203 printk ("RTAS supporting Pegasos OF not found, please upgrade"
204 " your firmware\n");
205 }
206 pci_assign_all_buses = 1;
207}
208
209void __init
210chrp_find_bridges(void)
211{
212 struct device_node *dev;
213 int *bus_range;
214 int len, index = -1;
215 struct pci_controller *hose;
216 unsigned int *dma;
217 char *model, *machine;
218 int is_longtrail = 0, is_mot = 0, is_pegasos = 0;
219 struct device_node *root = find_path_device("/");
220
221 /*
222 * The PCI host bridge nodes on some machines don't have
223 * properties to adequately identify them, so we have to
224 * look at what sort of machine this is as well.
225 */
226 machine = get_property(root, "model", NULL);
227 if (machine != NULL) {
228 is_longtrail = strncmp(machine, "IBM,LongTrail", 13) == 0;
229 is_mot = strncmp(machine, "MOT", 3) == 0;
230 if (strncmp(machine, "Pegasos2", 8) == 0)
231 is_pegasos = 2;
232 else if (strncmp(machine, "Pegasos", 7) == 0)
233 is_pegasos = 1;
234 }
235 for (dev = root->child; dev != NULL; dev = dev->sibling) {
236 if (dev->type == NULL || strcmp(dev->type, "pci") != 0)
237 continue;
238 ++index;
239 /* The GG2 bridge on the LongTrail doesn't have an address */
240 if (dev->n_addrs < 1 && !is_longtrail) {
241 printk(KERN_WARNING "Can't use %s: no address\n",
242 dev->full_name);
243 continue;
244 }
245 bus_range = (int *) get_property(dev, "bus-range", &len);
246 if (bus_range == NULL || len < 2 * sizeof(int)) {
247 printk(KERN_WARNING "Can't get bus-range for %s\n",
248 dev->full_name);
249 continue;
250 }
251 if (bus_range[1] == bus_range[0])
252 printk(KERN_INFO "PCI bus %d", bus_range[0]);
253 else
254 printk(KERN_INFO "PCI buses %d..%d",
255 bus_range[0], bus_range[1]);
256 printk(" controlled by %s", dev->type);
257 if (dev->n_addrs > 0)
258 printk(" at %x", dev->addrs[0].address);
259 printk("\n");
260
261 hose = pcibios_alloc_controller();
262 if (!hose) {
263 printk("Can't allocate PCI controller structure for %s\n",
264 dev->full_name);
265 continue;
266 }
267 hose->arch_data = dev;
268 hose->first_busno = bus_range[0];
269 hose->last_busno = bus_range[1];
270
271 model = get_property(dev, "model", NULL);
272 if (model == NULL)
273 model = "<none>";
274 if (device_is_compatible(dev, "IBM,python")) {
275 setup_python(hose, dev);
276 } else if (is_mot
277 || strncmp(model, "Motorola, Grackle", 17) == 0) {
278 setup_indirect_pci(hose, 0xfec00000, 0xfee00000);
279 } else if (is_longtrail) {
280 void __iomem *p = ioremap(GG2_PCI_CONFIG_BASE, 0x80000);
281 hose->ops = &gg2_pci_ops;
282 hose->cfg_data = p;
283 gg2_pci_config_base = p;
284 } else if (is_pegasos == 1) {
285 setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc);
286 } else if (is_pegasos == 2) {
287 setup_peg2(hose, dev);
288 } else {
289 printk("No methods for %s (model %s), using RTAS\n",
290 dev->full_name, model);
291 hose->ops = &rtas_pci_ops;
292 }
293
294 pci_process_bridge_OF_ranges(hose, dev, index == 0);
295
296 /* check the first bridge for a property that we can
297 use to set pci_dram_offset */
298 dma = (unsigned int *)
299 get_property(dev, "ibm,dma-ranges", &len);
300 if (index == 0 && dma != NULL && len >= 6 * sizeof(*dma)) {
301 pci_dram_offset = dma[2] - dma[3];
302 printk("pci_dram_offset = %lx\n", pci_dram_offset);
303 }
304 }
305
306 /* Do not fixup interrupts from OF tree on pegasos */
307 if (is_pegasos == 0)
308 ppc_md.pcibios_fixup = chrp_pcibios_fixup;
309}
diff --git a/arch/ppc/platforms/chrp_pegasos_eth.c b/arch/ppc/platforms/chrp_pegasos_eth.c
deleted file mode 100644
index 108a6e265185..000000000000
--- a/arch/ppc/platforms/chrp_pegasos_eth.c
+++ /dev/null
@@ -1,213 +0,0 @@
1/*
2 * arch/ppc/platforms/chrp_pegasos_eth.c
3 *
4 * Copyright (C) 2005 Sven Luther <sl@bplan-gmbh.de>
5 * Thanks to :
6 * Dale Farnsworth <dale@farnsworth.org>
7 * Mark A. Greer <mgreer@mvista.com>
8 * Nicolas DET <nd@bplan-gmbh.de>
9 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 * And anyone else who helped me on this.
11 */
12
13#include <linux/types.h>
14#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/platform_device.h>
17#include <linux/mv643xx.h>
18#include <linux/pci.h>
19
20#define PEGASOS2_MARVELL_REGBASE (0xf1000000)
21#define PEGASOS2_MARVELL_REGSIZE (0x00004000)
22#define PEGASOS2_SRAM_BASE (0xf2000000)
23#define PEGASOS2_SRAM_SIZE (256*1024)
24
25#define PEGASOS2_SRAM_BASE_ETH0 (PEGASOS2_SRAM_BASE)
26#define PEGASOS2_SRAM_BASE_ETH1 (PEGASOS2_SRAM_BASE_ETH0 + (PEGASOS2_SRAM_SIZE / 2) )
27
28
29#define PEGASOS2_SRAM_RXRING_SIZE (PEGASOS2_SRAM_SIZE/4)
30#define PEGASOS2_SRAM_TXRING_SIZE (PEGASOS2_SRAM_SIZE/4)
31
32#undef BE_VERBOSE
33
34static struct resource mv643xx_eth_shared_resources[] = {
35 [0] = {
36 .name = "ethernet shared base",
37 .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
38 .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
39 MV643XX_ETH_SHARED_REGS_SIZE - 1,
40 .flags = IORESOURCE_MEM,
41 },
42};
43
44static struct platform_device mv643xx_eth_shared_device = {
45 .name = MV643XX_ETH_SHARED_NAME,
46 .id = 0,
47 .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
48 .resource = mv643xx_eth_shared_resources,
49};
50
51static struct resource mv643xx_eth0_resources[] = {
52 [0] = {
53 .name = "eth0 irq",
54 .start = 9,
55 .end = 9,
56 .flags = IORESOURCE_IRQ,
57 },
58};
59
60
61static struct mv643xx_eth_platform_data eth0_pd = {
62 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
63 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
64 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
65
66 .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH0 + PEGASOS2_SRAM_TXRING_SIZE,
67 .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
68 .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
69};
70
71static struct platform_device eth0_device = {
72 .name = MV643XX_ETH_NAME,
73 .id = 0,
74 .num_resources = ARRAY_SIZE(mv643xx_eth0_resources),
75 .resource = mv643xx_eth0_resources,
76 .dev = {
77 .platform_data = &eth0_pd,
78 },
79};
80
81static struct resource mv643xx_eth1_resources[] = {
82 [0] = {
83 .name = "eth1 irq",
84 .start = 9,
85 .end = 9,
86 .flags = IORESOURCE_IRQ,
87 },
88};
89
90static struct mv643xx_eth_platform_data eth1_pd = {
91 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1,
92 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
93 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
94
95 .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH1 + PEGASOS2_SRAM_TXRING_SIZE,
96 .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
97 .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
98};
99
100static struct platform_device eth1_device = {
101 .name = MV643XX_ETH_NAME,
102 .id = 1,
103 .num_resources = ARRAY_SIZE(mv643xx_eth1_resources),
104 .resource = mv643xx_eth1_resources,
105 .dev = {
106 .platform_data = &eth1_pd,
107 },
108};
109
110static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
111 &mv643xx_eth_shared_device,
112 &eth0_device,
113 &eth1_device,
114};
115
116/***********/
117/***********/
118#define MV_READ(offset,val) { val = readl(mv643xx_reg_base + offset); }
119#define MV_WRITE(offset,data) writel(data, mv643xx_reg_base + offset)
120
121static void __iomem *mv643xx_reg_base;
122
123static int Enable_SRAM(void)
124{
125 u32 ALong;
126
127 if (mv643xx_reg_base == NULL)
128 mv643xx_reg_base = ioremap(PEGASOS2_MARVELL_REGBASE,
129 PEGASOS2_MARVELL_REGSIZE);
130
131 if (mv643xx_reg_base == NULL)
132 return -ENOMEM;
133
134#ifdef BE_VERBOSE
135 printk("Pegasos II/Marvell MV64361: register remapped from %p to %p\n",
136 (void *)PEGASOS2_MARVELL_REGBASE, (void *)mv643xx_reg_base);
137#endif
138
139 MV_WRITE(MV64340_SRAM_CONFIG, 0);
140
141 MV_WRITE(MV64340_INTEGRATED_SRAM_BASE_ADDR, PEGASOS2_SRAM_BASE >> 16);
142
143 MV_READ(MV64340_BASE_ADDR_ENABLE, ALong);
144 ALong &= ~(1 << 19);
145 MV_WRITE(MV64340_BASE_ADDR_ENABLE, ALong);
146
147 ALong = 0x02;
148 ALong |= PEGASOS2_SRAM_BASE & 0xffff0000;
149 MV_WRITE(MV643XX_ETH_BAR_4, ALong);
150
151 MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000);
152
153 MV_READ(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong);
154 ALong &= ~(1 << 4);
155 MV_WRITE(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong);
156
157#ifdef BE_VERBOSE
158 printk("Pegasos II/Marvell MV64361: register unmapped\n");
159 printk("Pegasos II/Marvell MV64361: SRAM at %p, size=%x\n", (void*) PEGASOS2_SRAM_BASE, PEGASOS2_SRAM_SIZE);
160#endif
161
162 iounmap(mv643xx_reg_base);
163 mv643xx_reg_base = NULL;
164
165 return 1;
166}
167
168
169/***********/
170/***********/
171int mv643xx_eth_add_pds(void)
172{
173 int ret = 0;
174 static struct pci_device_id pci_marvell_mv64360[] = {
175 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_MV64360) },
176 { }
177 };
178
179#ifdef BE_VERBOSE
180 printk("Pegasos II/Marvell MV64361: init\n");
181#endif
182
183 if (pci_dev_present(pci_marvell_mv64360)) {
184 ret = platform_add_devices(mv643xx_eth_pd_devs,
185 ARRAY_SIZE(mv643xx_eth_pd_devs));
186
187 if ( Enable_SRAM() < 0)
188 {
189 eth0_pd.tx_sram_addr = 0;
190 eth0_pd.tx_sram_size = 0;
191 eth0_pd.rx_sram_addr = 0;
192 eth0_pd.rx_sram_size = 0;
193
194 eth1_pd.tx_sram_addr = 0;
195 eth1_pd.tx_sram_size = 0;
196 eth1_pd.rx_sram_addr = 0;
197 eth1_pd.rx_sram_size = 0;
198
199#ifdef BE_VERBOSE
200 printk("Pegasos II/Marvell MV64361: Can't enable the "
201 "SRAM\n");
202#endif
203 }
204 }
205
206#ifdef BE_VERBOSE
207 printk("Pegasos II/Marvell MV64361: init is over\n");
208#endif
209
210 return ret;
211}
212
213device_initcall(mv643xx_eth_add_pds);
diff --git a/arch/ppc/platforms/chrp_setup.c b/arch/ppc/platforms/chrp_setup.c
deleted file mode 100644
index 48996b787378..000000000000
--- a/arch/ppc/platforms/chrp_setup.c
+++ /dev/null
@@ -1,671 +0,0 @@
1/*
2 * arch/ppc/platforms/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu)
7 */
8
9/*
10 * bootup setup stuff..
11 */
12
13#include <linux/config.h>
14#include <linux/errno.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/stddef.h>
19#include <linux/unistd.h>
20#include <linux/ptrace.h>
21#include <linux/slab.h>
22#include <linux/user.h>
23#include <linux/a.out.h>
24#include <linux/tty.h>
25#include <linux/major.h>
26#include <linux/interrupt.h>
27#include <linux/reboot.h>
28#include <linux/init.h>
29#include <linux/pci.h>
30#include <linux/version.h>
31#include <linux/adb.h>
32#include <linux/module.h>
33#include <linux/delay.h>
34#include <linux/ide.h>
35#include <linux/console.h>
36#include <linux/seq_file.h>
37#include <linux/root_dev.h>
38#include <linux/initrd.h>
39#include <linux/module.h>
40
41#include <asm/io.h>
42#include <asm/pgtable.h>
43#include <asm/prom.h>
44#include <asm/gg2.h>
45#include <asm/pci-bridge.h>
46#include <asm/dma.h>
47#include <asm/machdep.h>
48#include <asm/irq.h>
49#include <asm/hydra.h>
50#include <asm/sections.h>
51#include <asm/time.h>
52#include <asm/btext.h>
53#include <asm/i8259.h>
54#include <asm/open_pic.h>
55#include <asm/xmon.h>
56#include "mem_pieces.h"
57
58unsigned long chrp_get_rtc_time(void);
59int chrp_set_rtc_time(unsigned long nowtime);
60void chrp_calibrate_decr(void);
61long chrp_time_init(void);
62
63void chrp_find_bridges(void);
64void chrp_event_scan(void);
65void rtas_display_progress(char *, unsigned short);
66void rtas_indicator_progress(char *, unsigned short);
67void btext_progress(char *, unsigned short);
68
69extern int of_show_percpuinfo(struct seq_file *, int);
70
71int _chrp_type;
72EXPORT_SYMBOL(_chrp_type);
73
74/*
75 * XXX this should be in xmon.h, but putting it there means xmon.h
76 * has to include <linux/interrupt.h> (to get irqreturn_t), which
77 * causes all sorts of problems. -- paulus
78 */
79extern irqreturn_t xmon_irq(int, void *, struct pt_regs *);
80
81extern dev_t boot_dev;
82
83extern PTE *Hash, *Hash_end;
84extern unsigned long Hash_size, Hash_mask;
85extern int probingmem;
86extern unsigned long loops_per_jiffy;
87static int max_width;
88
89#ifdef CONFIG_SMP
90extern struct smp_ops_t chrp_smp_ops;
91#endif
92
93static const char *gg2_memtypes[4] = {
94 "FPM", "SDRAM", "EDO", "BEDO"
95};
96static const char *gg2_cachesizes[4] = {
97 "256 KB", "512 KB", "1 MB", "Reserved"
98};
99static const char *gg2_cachetypes[4] = {
100 "Asynchronous", "Reserved", "Flow-Through Synchronous",
101 "Pipelined Synchronous"
102};
103static const char *gg2_cachemodes[4] = {
104 "Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
105};
106
107int
108chrp_show_cpuinfo(struct seq_file *m)
109{
110 int i, sdramen;
111 unsigned int t;
112 struct device_node *root;
113 const char *model = "";
114
115 root = find_path_device("/");
116 if (root)
117 model = get_property(root, "model", NULL);
118 seq_printf(m, "machine\t\t: CHRP %s\n", model);
119
120 /* longtrail (goldengate) stuff */
121 if (!strncmp(model, "IBM,LongTrail", 13)) {
122 /* VLSI VAS96011/12 `Golden Gate 2' */
123 /* Memory banks */
124 sdramen = (in_le32(gg2_pci_config_base + GG2_PCI_DRAM_CTRL)
125 >>31) & 1;
126 for (i = 0; i < (sdramen ? 4 : 6); i++) {
127 t = in_le32(gg2_pci_config_base+
128 GG2_PCI_DRAM_BANK0+
129 i*4);
130 if (!(t & 1))
131 continue;
132 switch ((t>>8) & 0x1f) {
133 case 0x1f:
134 model = "4 MB";
135 break;
136 case 0x1e:
137 model = "8 MB";
138 break;
139 case 0x1c:
140 model = "16 MB";
141 break;
142 case 0x18:
143 model = "32 MB";
144 break;
145 case 0x10:
146 model = "64 MB";
147 break;
148 case 0x00:
149 model = "128 MB";
150 break;
151 default:
152 model = "Reserved";
153 break;
154 }
155 seq_printf(m, "memory bank %d\t: %s %s\n", i, model,
156 gg2_memtypes[sdramen ? 1 : ((t>>1) & 3)]);
157 }
158 /* L2 cache */
159 t = in_le32(gg2_pci_config_base+GG2_PCI_CC_CTRL);
160 seq_printf(m, "board l2\t: %s %s (%s)\n",
161 gg2_cachesizes[(t>>7) & 3],
162 gg2_cachetypes[(t>>2) & 3],
163 gg2_cachemodes[t & 3]);
164 }
165 return 0;
166}
167
168/*
169 * Fixes for the National Semiconductor PC78308VUL SuperI/O
170 *
171 * Some versions of Open Firmware incorrectly initialize the IRQ settings
172 * for keyboard and mouse
173 */
174static inline void __init sio_write(u8 val, u8 index)
175{
176 outb(index, 0x15c);
177 outb(val, 0x15d);
178}
179
180static inline u8 __init sio_read(u8 index)
181{
182 outb(index, 0x15c);
183 return inb(0x15d);
184}
185
186static void __init sio_fixup_irq(const char *name, u8 device, u8 level,
187 u8 type)
188{
189 u8 level0, type0, active;
190
191 /* select logical device */
192 sio_write(device, 0x07);
193 active = sio_read(0x30);
194 level0 = sio_read(0x70);
195 type0 = sio_read(0x71);
196 if (level0 != level || type0 != type || !active) {
197 printk(KERN_WARNING "sio: %s irq level %d, type %d, %sactive: "
198 "remapping to level %d, type %d, active\n",
199 name, level0, type0, !active ? "in" : "", level, type);
200 sio_write(0x01, 0x30);
201 sio_write(level, 0x70);
202 sio_write(type, 0x71);
203 }
204}
205
206static void __init sio_init(void)
207{
208 struct device_node *root;
209
210 if ((root = find_path_device("/")) &&
211 !strncmp(get_property(root, "model", NULL), "IBM,LongTrail", 13)) {
212 /* logical device 0 (KBC/Keyboard) */
213 sio_fixup_irq("keyboard", 0, 1, 2);
214 /* select logical device 1 (KBC/Mouse) */
215 sio_fixup_irq("mouse", 1, 12, 2);
216 }
217}
218
219
220static void __init pegasos_set_l2cr(void)
221{
222 struct device_node *np;
223
224 /* On Pegasos, enable the l2 cache if needed, as the OF forgets it */
225 if (_chrp_type != _CHRP_Pegasos)
226 return;
227
228 /* Enable L2 cache if needed */
229 np = find_type_devices("cpu");
230 if (np != NULL) {
231 unsigned int *l2cr = (unsigned int *)
232 get_property (np, "l2cr", NULL);
233 if (l2cr == NULL) {
234 printk ("Pegasos l2cr : no cpu l2cr property found\n");
235 return;
236 }
237 if (!((*l2cr) & 0x80000000)) {
238 printk ("Pegasos l2cr : L2 cache was not active, "
239 "activating\n");
240 _set_L2CR(0);
241 _set_L2CR((*l2cr) | 0x80000000);
242 }
243 }
244}
245
246void __init chrp_setup_arch(void)
247{
248 struct device_node *device;
249
250 /* init to some ~sane value until calibrate_delay() runs */
251 loops_per_jiffy = 50000000/HZ;
252
253#ifdef CONFIG_BLK_DEV_INITRD
254 /* this is fine for chrp */
255 initrd_below_start_ok = 1;
256
257 if (initrd_start)
258 ROOT_DEV = Root_RAM0;
259 else
260#endif
261 ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
262
263 /* On pegasos, enable the L2 cache if not already done by OF */
264 pegasos_set_l2cr();
265
266 /* Lookup PCI host bridges */
267 chrp_find_bridges();
268
269#ifndef CONFIG_PPC64BRIDGE
270 /*
271 * Temporary fixes for PCI devices.
272 * -- Geert
273 */
274 hydra_init(); /* Mac I/O */
275
276#endif /* CONFIG_PPC64BRIDGE */
277
278 /*
279 * Fix the Super I/O configuration
280 */
281 sio_init();
282
283 /* Get the event scan rate for the rtas so we know how
284 * often it expects a heartbeat. -- Cort
285 */
286 if ( rtas_data ) {
287 struct property *p;
288 device = find_devices("rtas");
289 for ( p = device->properties;
290 p && strncmp(p->name, "rtas-event-scan-rate", 20);
291 p = p->next )
292 /* nothing */ ;
293 if ( p && *(unsigned long *)p->value ) {
294 ppc_md.heartbeat = chrp_event_scan;
295 ppc_md.heartbeat_reset = (HZ/(*(unsigned long *)p->value)*30)-1;
296 ppc_md.heartbeat_count = 1;
297 printk("RTAS Event Scan Rate: %lu (%lu jiffies)\n",
298 *(unsigned long *)p->value, ppc_md.heartbeat_reset );
299 }
300 }
301
302 pci_create_OF_bus_map();
303}
304
305void
306chrp_event_scan(void)
307{
308 unsigned char log[1024];
309 unsigned long ret = 0;
310 /* XXX: we should loop until the hardware says no more error logs -- Cort */
311 call_rtas( "event-scan", 4, 1, &ret, 0xffffffff, 0,
312 __pa(log), 1024 );
313 ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
314}
315
316void
317chrp_restart(char *cmd)
318{
319 printk("RTAS system-reboot returned %d\n",
320 call_rtas("system-reboot", 0, 1, NULL));
321 for (;;);
322}
323
324void
325chrp_power_off(void)
326{
327 /* allow power on only with power button press */
328 printk("RTAS power-off returned %d\n",
329 call_rtas("power-off", 2, 1, NULL,0xffffffff,0xffffffff));
330 for (;;);
331}
332
333void
334chrp_halt(void)
335{
336 chrp_power_off();
337}
338
339/*
340 * Finds the open-pic node and sets OpenPIC_Addr based on its reg property.
341 * Then checks if it has an interrupt-ranges property. If it does then
342 * we have a distributed open-pic, so call openpic_set_sources to tell
343 * the openpic code where to find the interrupt source registers.
344 */
345static void __init chrp_find_openpic(void)
346{
347 struct device_node *np;
348 int len, i;
349 unsigned int *iranges;
350 void __iomem *isu;
351
352 np = find_type_devices("open-pic");
353 if (np == NULL || np->n_addrs == 0)
354 return;
355 printk(KERN_INFO "OpenPIC at %x (size %x)\n",
356 np->addrs[0].address, np->addrs[0].size);
357 OpenPIC_Addr = ioremap(np->addrs[0].address, 0x40000);
358 if (OpenPIC_Addr == NULL) {
359 printk(KERN_ERR "Failed to map OpenPIC!\n");
360 return;
361 }
362
363 iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len);
364 if (iranges == NULL || len < 2 * sizeof(unsigned int))
365 return; /* not distributed */
366
367 /*
368 * The first pair of cells in interrupt-ranges refers to the
369 * IDU; subsequent pairs refer to the ISUs.
370 */
371 len /= 2 * sizeof(unsigned int);
372 if (np->n_addrs < len) {
373 printk(KERN_ERR "Insufficient addresses for distributed"
374 " OpenPIC (%d < %d)\n", np->n_addrs, len);
375 return;
376 }
377 if (iranges[1] != 0) {
378 printk(KERN_INFO "OpenPIC irqs %d..%d in IDU\n",
379 iranges[0], iranges[0] + iranges[1] - 1);
380 openpic_set_sources(iranges[0], iranges[1], NULL);
381 }
382 for (i = 1; i < len; ++i) {
383 iranges += 2;
384 printk(KERN_INFO "OpenPIC irqs %d..%d in ISU at %x (%x)\n",
385 iranges[0], iranges[0] + iranges[1] - 1,
386 np->addrs[i].address, np->addrs[i].size);
387 isu = ioremap(np->addrs[i].address, np->addrs[i].size);
388 if (isu != NULL)
389 openpic_set_sources(iranges[0], iranges[1], isu);
390 else
391 printk(KERN_ERR "Failed to map OpenPIC ISU at %x!\n",
392 np->addrs[i].address);
393 }
394}
395
396#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
397static struct irqaction xmon_irqaction = {
398 .handler = xmon_irq,
399 .mask = CPU_MASK_NONE,
400 .name = "XMON break",
401};
402#endif
403
404void __init chrp_init_IRQ(void)
405{
406 struct device_node *np;
407 unsigned long chrp_int_ack = 0;
408 unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS];
409#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
410 struct device_node *kbd;
411#endif
412
413 for (np = find_devices("pci"); np != NULL; np = np->next) {
414 unsigned int *addrp = (unsigned int *)
415 get_property(np, "8259-interrupt-acknowledge", NULL);
416
417 if (addrp == NULL)
418 continue;
419 chrp_int_ack = addrp[prom_n_addr_cells(np)-1];
420 break;
421 }
422 if (np == NULL)
423 printk(KERN_ERR "Cannot find PCI interrupt acknowledge address\n");
424
425 chrp_find_openpic();
426
427 if (OpenPIC_Addr) {
428 prom_get_irq_senses(init_senses, NUM_8259_INTERRUPTS, NR_IRQS);
429 OpenPIC_InitSenses = init_senses;
430 OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS;
431
432 openpic_init(NUM_8259_INTERRUPTS);
433 /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
434 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
435 i8259_irq);
436
437 }
438 i8259_init(chrp_int_ack, 0);
439
440#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
441 /* see if there is a keyboard in the device tree
442 with a parent of type "adb" */
443 for (kbd = find_devices("keyboard"); kbd; kbd = kbd->next)
444 if (kbd->parent && kbd->parent->type
445 && strcmp(kbd->parent->type, "adb") == 0)
446 break;
447 if (kbd)
448 setup_irq(HYDRA_INT_ADB_NMI, &xmon_irqaction);
449#endif
450}
451
452void __init
453chrp_init2(void)
454{
455#ifdef CONFIG_NVRAM
456 chrp_nvram_init();
457#endif
458
459 request_region(0x20,0x20,"pic1");
460 request_region(0xa0,0x20,"pic2");
461 request_region(0x00,0x20,"dma1");
462 request_region(0x40,0x20,"timer");
463 request_region(0x80,0x10,"dma page reg");
464 request_region(0xc0,0x20,"dma2");
465
466 if (ppc_md.progress)
467 ppc_md.progress(" Have fun! ", 0x7777);
468}
469
470static struct device_node *memory_node;
471
472static int __init get_mem_prop(char *name, struct mem_pieces *mp)
473{
474 struct reg_property *rp;
475 int i, s;
476 unsigned int *ip;
477 int nac = prom_n_addr_cells(memory_node);
478 int nsc = prom_n_size_cells(memory_node);
479
480 ip = (unsigned int *) get_property(memory_node, name, &s);
481 if (ip == NULL) {
482 printk(KERN_ERR "error: couldn't get %s property on /memory\n",
483 name);
484 return 0;
485 }
486 s /= (nsc + nac) * 4;
487 rp = mp->regions;
488 for (i = 0; i < s; ++i, ip += nac+nsc) {
489 if (nac >= 2 && ip[nac-2] != 0)
490 continue;
491 rp->address = ip[nac-1];
492 if (nsc >= 2 && ip[nac+nsc-2] != 0)
493 rp->size = ~0U;
494 else
495 rp->size = ip[nac+nsc-1];
496 ++rp;
497 }
498 mp->n_regions = rp - mp->regions;
499
500 /* Make sure the pieces are sorted. */
501 mem_pieces_sort(mp);
502 mem_pieces_coalesce(mp);
503 return 1;
504}
505
506static unsigned long __init chrp_find_end_of_memory(void)
507{
508 unsigned long a, total;
509 struct mem_pieces phys_mem;
510
511 /*
512 * Find out where physical memory is, and check that it
513 * starts at 0 and is contiguous. It seems that RAM is
514 * always physically contiguous on Power Macintoshes.
515 *
516 * Supporting discontiguous physical memory isn't hard,
517 * it just makes the virtual <-> physical mapping functions
518 * more complicated (or else you end up wasting space
519 * in mem_map).
520 */
521 memory_node = find_devices("memory");
522 if (memory_node == NULL || !get_mem_prop("reg", &phys_mem)
523 || phys_mem.n_regions == 0)
524 panic("No RAM??");
525 a = phys_mem.regions[0].address;
526 if (a != 0)
527 panic("RAM doesn't start at physical address 0");
528 total = phys_mem.regions[0].size;
529
530 if (phys_mem.n_regions > 1) {
531 printk("RAM starting at 0x%x is not contiguous\n",
532 phys_mem.regions[1].address);
533 printk("Using RAM from 0 to 0x%lx\n", total-1);
534 }
535
536 return total;
537}
538
539void __init
540chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
541 unsigned long r6, unsigned long r7)
542{
543 struct device_node *root = find_path_device ("/");
544 char *machine = NULL;
545
546#ifdef CONFIG_BLK_DEV_INITRD
547 /* take care of initrd if we have one */
548 if ( r6 )
549 {
550 initrd_start = r6 + KERNELBASE;
551 initrd_end = r6 + r7 + KERNELBASE;
552 }
553#endif /* CONFIG_BLK_DEV_INITRD */
554
555 ISA_DMA_THRESHOLD = ~0L;
556 DMA_MODE_READ = 0x44;
557 DMA_MODE_WRITE = 0x48;
558 isa_io_base = CHRP_ISA_IO_BASE; /* default value */
559 ppc_do_canonicalize_irqs = 1;
560
561 if (root)
562 machine = get_property(root, "model", NULL);
563 if (machine && strncmp(machine, "Pegasos", 7) == 0) {
564 _chrp_type = _CHRP_Pegasos;
565 } else if (machine && strncmp(machine, "IBM", 3) == 0) {
566 _chrp_type = _CHRP_IBM;
567 } else if (machine && strncmp(machine, "MOT", 3) == 0) {
568 _chrp_type = _CHRP_Motorola;
569 } else {
570 /* Let's assume it is an IBM chrp if all else fails */
571 _chrp_type = _CHRP_IBM;
572 }
573
574 ppc_md.setup_arch = chrp_setup_arch;
575 ppc_md.show_percpuinfo = of_show_percpuinfo;
576 ppc_md.show_cpuinfo = chrp_show_cpuinfo;
577
578 ppc_md.init_IRQ = chrp_init_IRQ;
579 if (_chrp_type == _CHRP_Pegasos)
580 ppc_md.get_irq = i8259_irq;
581 else
582 ppc_md.get_irq = openpic_get_irq;
583
584 ppc_md.init = chrp_init2;
585
586 ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
587
588 ppc_md.restart = chrp_restart;
589 ppc_md.power_off = chrp_power_off;
590 ppc_md.halt = chrp_halt;
591
592 ppc_md.time_init = chrp_time_init;
593 ppc_md.set_rtc_time = chrp_set_rtc_time;
594 ppc_md.get_rtc_time = chrp_get_rtc_time;
595 ppc_md.calibrate_decr = chrp_calibrate_decr;
596
597 ppc_md.find_end_of_memory = chrp_find_end_of_memory;
598
599 if (rtas_data) {
600 struct device_node *rtas;
601 unsigned int *p;
602
603 rtas = find_devices("rtas");
604 if (rtas != NULL) {
605 if (get_property(rtas, "display-character", NULL)) {
606 ppc_md.progress = rtas_display_progress;
607 p = (unsigned int *) get_property
608 (rtas, "ibm,display-line-length", NULL);
609 if (p)
610 max_width = *p;
611 } else if (get_property(rtas, "set-indicator", NULL))
612 ppc_md.progress = rtas_indicator_progress;
613 }
614 }
615#ifdef CONFIG_BOOTX_TEXT
616 if (ppc_md.progress == NULL && boot_text_mapped)
617 ppc_md.progress = btext_progress;
618#endif
619
620#ifdef CONFIG_SMP
621 smp_ops = &chrp_smp_ops;
622#endif /* CONFIG_SMP */
623
624 /*
625 * Print the banner, then scroll down so boot progress
626 * can be printed. -- Cort
627 */
628 if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
629}
630
631void
632rtas_display_progress(char *s, unsigned short hex)
633{
634 int width;
635 char *os = s;
636
637 if ( call_rtas( "display-character", 1, 1, NULL, '\r' ) )
638 return;
639
640 width = max_width;
641 while ( *os )
642 {
643 if ( (*os == '\n') || (*os == '\r') )
644 width = max_width;
645 else
646 width--;
647 call_rtas( "display-character", 1, 1, NULL, *os++ );
648 /* if we overwrite the screen length */
649 if ( width == 0 )
650 while ( (*os != 0) && (*os != '\n') && (*os != '\r') )
651 os++;
652 }
653
654 /*while ( width-- > 0 )*/
655 call_rtas( "display-character", 1, 1, NULL, ' ' );
656}
657
658void
659rtas_indicator_progress(char *s, unsigned short hex)
660{
661 call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex);
662}
663
664#ifdef CONFIG_BOOTX_TEXT
665void
666btext_progress(char *s, unsigned short hex)
667{
668 prom_print(s);
669 prom_print("\n");
670}
671#endif /* CONFIG_BOOTX_TEXT */
diff --git a/arch/ppc/platforms/chrp_smp.c b/arch/ppc/platforms/chrp_smp.c
deleted file mode 100644
index 97e539557ecb..000000000000
--- a/arch/ppc/platforms/chrp_smp.c
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * Smp support for CHRP machines.
3 *
4 * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
5 * deal of code from the sparc and intel versions.
6 *
7 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
8 *
9 */
10
11#include <linux/config.h>
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/smp.h>
15#include <linux/smp_lock.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18#include <linux/delay.h>
19#include <linux/init.h>
20#include <linux/spinlock.h>
21
22#include <asm/ptrace.h>
23#include <asm/atomic.h>
24#include <asm/irq.h>
25#include <asm/page.h>
26#include <asm/pgtable.h>
27#include <asm/sections.h>
28#include <asm/io.h>
29#include <asm/prom.h>
30#include <asm/smp.h>
31#include <asm/residual.h>
32#include <asm/time.h>
33#include <asm/open_pic.h>
34#include <asm/machdep.h>
35
36extern unsigned long smp_chrp_cpu_nr;
37
38static int __init
39smp_chrp_probe(void)
40{
41 if (smp_chrp_cpu_nr > 1)
42 openpic_request_IPIs();
43
44 return smp_chrp_cpu_nr;
45}
46
47static void __devinit
48smp_chrp_kick_cpu(int nr)
49{
50 *(unsigned long *)KERNELBASE = nr;
51 asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
52}
53
54static void __devinit
55smp_chrp_setup_cpu(int cpu_nr)
56{
57 if (OpenPIC_Addr)
58 do_openpic_setup_cpu();
59}
60
61static DEFINE_SPINLOCK(timebase_lock);
62static unsigned int timebase_upper = 0, timebase_lower = 0;
63
64void __devinit
65smp_chrp_give_timebase(void)
66{
67 spin_lock(&timebase_lock);
68 call_rtas("freeze-time-base", 0, 1, NULL);
69 timebase_upper = get_tbu();
70 timebase_lower = get_tbl();
71 spin_unlock(&timebase_lock);
72
73 while (timebase_upper || timebase_lower)
74 barrier();
75 call_rtas("thaw-time-base", 0, 1, NULL);
76}
77
78void __devinit
79smp_chrp_take_timebase(void)
80{
81 while (!(timebase_upper || timebase_lower))
82 barrier();
83 spin_lock(&timebase_lock);
84 set_tb(timebase_upper, timebase_lower);
85 timebase_upper = 0;
86 timebase_lower = 0;
87 spin_unlock(&timebase_lock);
88 printk("CPU %i taken timebase\n", smp_processor_id());
89}
90
91/* CHRP with openpic */
92struct smp_ops_t chrp_smp_ops = {
93 .message_pass = smp_openpic_message_pass,
94 .probe = smp_chrp_probe,
95 .kick_cpu = smp_chrp_kick_cpu,
96 .setup_cpu = smp_chrp_setup_cpu,
97 .give_timebase = smp_chrp_give_timebase,
98 .take_timebase = smp_chrp_take_timebase,
99};
diff --git a/arch/ppc/platforms/chrp_time.c b/arch/ppc/platforms/chrp_time.c
deleted file mode 100644
index 57753a55b580..000000000000
--- a/arch/ppc/platforms/chrp_time.c
+++ /dev/null
@@ -1,253 +0,0 @@
1/*
2 * arch/ppc/platforms/chrp_time.c
3 *
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 *
6 * Adapted for PowerPC (PReP) by Gary Thomas
7 * Modified by Cort Dougan (cort@cs.nmt.edu).
8 * Copied and modified from arch/i386/kernel/time.c
9 *
10 */
11#include <linux/errno.h>
12#include <linux/sched.h>
13#include <linux/kernel.h>
14#include <linux/param.h>
15#include <linux/string.h>
16#include <linux/mm.h>
17#include <linux/interrupt.h>
18#include <linux/time.h>
19#include <linux/timex.h>
20#include <linux/kernel_stat.h>
21#include <linux/mc146818rtc.h>
22#include <linux/init.h>
23#include <linux/bcd.h>
24
25#include <asm/io.h>
26#include <asm/nvram.h>
27#include <asm/prom.h>
28#include <asm/sections.h>
29#include <asm/time.h>
30
31extern spinlock_t rtc_lock;
32
33static int nvram_as1 = NVRAM_AS1;
34static int nvram_as0 = NVRAM_AS0;
35static int nvram_data = NVRAM_DATA;
36
37long __init chrp_time_init(void)
38{
39 struct device_node *rtcs;
40 int base;
41
42 rtcs = find_compatible_devices("rtc", "pnpPNP,b00");
43 if (rtcs == NULL)
44 rtcs = find_compatible_devices("rtc", "ds1385-rtc");
45 if (rtcs == NULL || rtcs->addrs == NULL)
46 return 0;
47 base = rtcs->addrs[0].address;
48 nvram_as1 = 0;
49 nvram_as0 = base;
50 nvram_data = base + 1;
51
52 return 0;
53}
54
55int chrp_cmos_clock_read(int addr)
56{
57 if (nvram_as1 != 0)
58 outb(addr>>8, nvram_as1);
59 outb(addr, nvram_as0);
60 return (inb(nvram_data));
61}
62
63void chrp_cmos_clock_write(unsigned long val, int addr)
64{
65 if (nvram_as1 != 0)
66 outb(addr>>8, nvram_as1);
67 outb(addr, nvram_as0);
68 outb(val, nvram_data);
69 return;
70}
71
72/*
73 * Set the hardware clock. -- Cort
74 */
75int chrp_set_rtc_time(unsigned long nowtime)
76{
77 unsigned char save_control, save_freq_select;
78 struct rtc_time tm;
79
80 spin_lock(&rtc_lock);
81 to_tm(nowtime, &tm);
82
83 save_control = chrp_cmos_clock_read(RTC_CONTROL); /* tell the clock it's being set */
84
85 chrp_cmos_clock_write((save_control|RTC_SET), RTC_CONTROL);
86
87 save_freq_select = chrp_cmos_clock_read(RTC_FREQ_SELECT); /* stop and reset prescaler */
88
89 chrp_cmos_clock_write((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
90
91 tm.tm_year -= 1900;
92 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
93 BIN_TO_BCD(tm.tm_sec);
94 BIN_TO_BCD(tm.tm_min);
95 BIN_TO_BCD(tm.tm_hour);
96 BIN_TO_BCD(tm.tm_mon);
97 BIN_TO_BCD(tm.tm_mday);
98 BIN_TO_BCD(tm.tm_year);
99 }
100 chrp_cmos_clock_write(tm.tm_sec,RTC_SECONDS);
101 chrp_cmos_clock_write(tm.tm_min,RTC_MINUTES);
102 chrp_cmos_clock_write(tm.tm_hour,RTC_HOURS);
103 chrp_cmos_clock_write(tm.tm_mon,RTC_MONTH);
104 chrp_cmos_clock_write(tm.tm_mday,RTC_DAY_OF_MONTH);
105 chrp_cmos_clock_write(tm.tm_year,RTC_YEAR);
106
107 /* The following flags have to be released exactly in this order,
108 * otherwise the DS12887 (popular MC146818A clone with integrated
109 * battery and quartz) will not reset the oscillator and will not
110 * update precisely 500 ms later. You won't find this mentioned in
111 * the Dallas Semiconductor data sheets, but who believes data
112 * sheets anyway ... -- Markus Kuhn
113 */
114 chrp_cmos_clock_write(save_control, RTC_CONTROL);
115 chrp_cmos_clock_write(save_freq_select, RTC_FREQ_SELECT);
116
117 spin_unlock(&rtc_lock);
118 return 0;
119}
120
121unsigned long chrp_get_rtc_time(void)
122{
123 unsigned int year, mon, day, hour, min, sec;
124 int uip, i;
125
126 /* The Linux interpretation of the CMOS clock register contents:
127 * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
128 * RTC registers show the second which has precisely just started.
129 * Let's hope other operating systems interpret the RTC the same way.
130 */
131
132 /* Since the UIP flag is set for about 2.2 ms and the clock
133 * is typically written with a precision of 1 jiffy, trying
134 * to obtain a precision better than a few milliseconds is
135 * an illusion. Only consistency is interesting, this also
136 * allows to use the routine for /dev/rtc without a potential
137 * 1 second kernel busy loop triggered by any reader of /dev/rtc.
138 */
139
140 for ( i = 0; i<1000000; i++) {
141 uip = chrp_cmos_clock_read(RTC_FREQ_SELECT);
142 sec = chrp_cmos_clock_read(RTC_SECONDS);
143 min = chrp_cmos_clock_read(RTC_MINUTES);
144 hour = chrp_cmos_clock_read(RTC_HOURS);
145 day = chrp_cmos_clock_read(RTC_DAY_OF_MONTH);
146 mon = chrp_cmos_clock_read(RTC_MONTH);
147 year = chrp_cmos_clock_read(RTC_YEAR);
148 uip |= chrp_cmos_clock_read(RTC_FREQ_SELECT);
149 if ((uip & RTC_UIP)==0) break;
150 }
151
152 if (!(chrp_cmos_clock_read(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
153 {
154 BCD_TO_BIN(sec);
155 BCD_TO_BIN(min);
156 BCD_TO_BIN(hour);
157 BCD_TO_BIN(day);
158 BCD_TO_BIN(mon);
159 BCD_TO_BIN(year);
160 }
161 if ((year += 1900) < 1970)
162 year += 100;
163 return mktime(year, mon, day, hour, min, sec);
164}
165
166/*
167 * Calibrate the decrementer frequency with the VIA timer 1.
168 */
169#define VIA_TIMER_FREQ_6 4700000 /* time 1 frequency * 6 */
170
171/* VIA registers */
172#define RS 0x200 /* skip between registers */
173#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
174#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
175#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
176#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
177#define ACR (11*RS) /* Auxiliary control register */
178#define IFR (13*RS) /* Interrupt flag register */
179
180/* Bits in ACR */
181#define T1MODE 0xc0 /* Timer 1 mode */
182#define T1MODE_CONT 0x40 /* continuous interrupts */
183
184/* Bits in IFR and IER */
185#define T1_INT 0x40 /* Timer 1 interrupt */
186
187static int __init chrp_via_calibrate_decr(void)
188{
189 struct device_node *vias;
190 volatile unsigned char __iomem *via;
191 int count = VIA_TIMER_FREQ_6 / 100;
192 unsigned int dstart, dend;
193
194 vias = find_devices("via-cuda");
195 if (vias == 0)
196 vias = find_devices("via");
197 if (vias == 0 || vias->n_addrs == 0)
198 return 0;
199 via = ioremap(vias->addrs[0].address, vias->addrs[0].size);
200
201 /* set timer 1 for continuous interrupts */
202 out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT);
203 /* set the counter to a small value */
204 out_8(&via[T1CH], 2);
205 /* set the latch to `count' */
206 out_8(&via[T1LL], count);
207 out_8(&via[T1LH], count >> 8);
208 /* wait until it hits 0 */
209 while ((in_8(&via[IFR]) & T1_INT) == 0)
210 ;
211 dstart = get_dec();
212 /* clear the interrupt & wait until it hits 0 again */
213 in_8(&via[T1CL]);
214 while ((in_8(&via[IFR]) & T1_INT) == 0)
215 ;
216 dend = get_dec();
217
218 tb_ticks_per_jiffy = (dstart - dend) / ((6 * HZ)/100);
219 tb_to_us = mulhwu_scale_factor(dstart - dend, 60000);
220
221 printk(KERN_INFO "via_calibrate_decr: ticks per jiffy = %u (%u ticks)\n",
222 tb_ticks_per_jiffy, dstart - dend);
223
224 iounmap(via);
225
226 return 1;
227}
228
229void __init chrp_calibrate_decr(void)
230{
231 struct device_node *cpu;
232 unsigned int freq, *fp;
233
234 if (chrp_via_calibrate_decr())
235 return;
236
237 /*
238 * The cpu node should have a timebase-frequency property
239 * to tell us the rate at which the decrementer counts.
240 */
241 freq = 16666000; /* hardcoded default */
242 cpu = find_type_devices("cpu");
243 if (cpu != 0) {
244 fp = (unsigned int *)
245 get_property(cpu, "timebase-frequency", NULL);
246 if (fp != 0)
247 freq = *fp;
248 }
249 printk("time_init: decrementer frequency = %u.%.6u MHz\n",
250 freq/1000000, freq%1000000);
251 tb_ticks_per_jiffy = freq / HZ;
252 tb_to_us = mulhwu_scale_factor(freq, 1000000);
253}
diff --git a/arch/ppc/platforms/cpci690.c b/arch/ppc/platforms/cpci690.c
index 6ca7bcac9474..790475c22fd7 100644
--- a/arch/ppc/platforms/cpci690.c
+++ b/arch/ppc/platforms/cpci690.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/cpci690.c
3 *
4 * Board setup routines for the Force CPCI690 board. 2 * Board setup routines for the Force CPCI690 board.
5 * 3 *
6 * Author: Mark A. Greer <mgreer@mvista.com> 4 * Author: Mark A. Greer <mgreer@mvista.com>
@@ -290,7 +288,7 @@ cpci690_fixup_mpsc_pdata(struct platform_device *pdev)
290 pdata->brg_clk_freq = cpci690_get_bus_freq(); 288 pdata->brg_clk_freq = cpci690_get_bus_freq();
291} 289}
292 290
293static int __init 291static int
294cpci690_platform_notify(struct device *dev) 292cpci690_platform_notify(struct device *dev)
295{ 293{
296 static struct { 294 static struct {
diff --git a/arch/ppc/platforms/cpci690.h b/arch/ppc/platforms/cpci690.h
index 49584c9cedf3..0fa5a4c31b67 100644
--- a/arch/ppc/platforms/cpci690.h
+++ b/arch/ppc/platforms/cpci690.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/cpci690.h
3 *
4 * Definitions for Force CPCI690 2 * Definitions for Force CPCI690
5 * 3 *
6 * Author: Mark A. Greer <mgreer@mvista.com> 4 * Author: Mark A. Greer <mgreer@mvista.com>
diff --git a/arch/ppc/platforms/ev64260.c b/arch/ppc/platforms/ev64260.c
index ffde8f6f6302..31e8e21e1d5c 100644
--- a/arch/ppc/platforms/ev64260.c
+++ b/arch/ppc/platforms/ev64260.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/ev64260.c
3 *
4 * Board setup routines for the Marvell/Galileo EV-64260-BP Evaluation Board. 2 * Board setup routines for the Marvell/Galileo EV-64260-BP Evaluation Board.
5 * 3 *
6 * Author: Mark A. Greer <mgreer@mvista.com> 4 * Author: Mark A. Greer <mgreer@mvista.com>
@@ -416,7 +414,7 @@ ev64260_fixup_mpsc_pdata(struct platform_device *pdev)
416 return; 414 return;
417} 415}
418 416
419static int __init 417static int
420ev64260_platform_notify(struct device *dev) 418ev64260_platform_notify(struct device *dev)
421{ 419{
422 static struct { 420 static struct {
diff --git a/arch/ppc/platforms/ev64260.h b/arch/ppc/platforms/ev64260.h
index bedffced3a02..44d90d56745a 100644
--- a/arch/ppc/platforms/ev64260.h
+++ b/arch/ppc/platforms/ev64260.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/ev64260.h
3 *
4 * Definitions for Marvell/Galileo EV-64260-BP Evaluation Board. 2 * Definitions for Marvell/Galileo EV-64260-BP Evaluation Board.
5 * 3 *
6 * Author: Mark A. Greer <mgreer@mvista.com> 4 * Author: Mark A. Greer <mgreer@mvista.com>
diff --git a/arch/ppc/platforms/ev64360.c b/arch/ppc/platforms/ev64360.c
index b9d844f88c2b..104ac9b16e8b 100644
--- a/arch/ppc/platforms/ev64360.c
+++ b/arch/ppc/platforms/ev64360.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/ev64360.c
3 *
4 * Board setup routines for the Marvell EV-64360-BP Evaluation Board. 2 * Board setup routines for the Marvell EV-64360-BP Evaluation Board.
5 * 3 *
6 * Author: Lee Nicks <allinux@gmail.com> 4 * Author: Lee Nicks <allinux@gmail.com>
@@ -300,7 +298,7 @@ ev64360_fixup_eth_pdata(struct platform_device *pdev)
300} 298}
301#endif 299#endif
302 300
303static int __init 301static int
304ev64360_platform_notify(struct device *dev) 302ev64360_platform_notify(struct device *dev)
305{ 303{
306 static struct { 304 static struct {
diff --git a/arch/ppc/platforms/ev64360.h b/arch/ppc/platforms/ev64360.h
index 68eabe490397..b30f4722690a 100644
--- a/arch/ppc/platforms/ev64360.h
+++ b/arch/ppc/platforms/ev64360.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/ev64360.h
3 *
4 * Definitions for Marvell EV-64360-BP Evaluation Board. 2 * Definitions for Marvell EV-64360-BP Evaluation Board.
5 * 3 *
6 * Author: Lee Nicks <allinux@gmail.com> 4 * Author: Lee Nicks <allinux@gmail.com>
diff --git a/arch/ppc/platforms/fads.h b/arch/ppc/platforms/fads.h
index a48fb8d723e4..e1c0b1b6dcb3 100644
--- a/arch/ppc/platforms/fads.h
+++ b/arch/ppc/platforms/fads.h
@@ -112,7 +112,7 @@
112 112
113/* CPM Ethernet through SCC1 or SCC2 */ 113/* CPM Ethernet through SCC1 or SCC2 */
114 114
115#ifdef CONFIG_SCC1_ENET /* Probably 860 variant */ 115#if defined(CONFIG_SCC1_ENET) || defined(CONFIG_MPC8xx_SECOND_ETH_SCC1) /* Probably 860 variant */
116/* Bits in parallel I/O port registers that have to be set/cleared 116/* Bits in parallel I/O port registers that have to be set/cleared
117 * to configure the pins for SCC1 use. 117 * to configure the pins for SCC1 use.
118 * TCLK - CLK1, RCLK - CLK2. 118 * TCLK - CLK1, RCLK - CLK2.
diff --git a/arch/ppc/platforms/gemini.h b/arch/ppc/platforms/gemini.h
index 06de59248918..5528fd0a1216 100644
--- a/arch/ppc/platforms/gemini.h
+++ b/arch/ppc/platforms/gemini.h
@@ -1,7 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/gemini.h
3 *
4 *
5 * Onboard registers and descriptions for Synergy Microsystems' 2 * Onboard registers and descriptions for Synergy Microsystems'
6 * "Gemini" boards. 3 * "Gemini" boards.
7 * 4 *
diff --git a/arch/ppc/platforms/gemini_prom.S b/arch/ppc/platforms/gemini_prom.S
index 8c5065d56505..b181f2108001 100644
--- a/arch/ppc/platforms/gemini_prom.S
+++ b/arch/ppc/platforms/gemini_prom.S
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/gemini_prom.S
3 *
4 * Not really prom support code (yet), but sort of anti-prom code. The current 2 * Not really prom support code (yet), but sort of anti-prom code. The current
5 * bootloader does a number of things it shouldn't and doesn't do things that it 3 * bootloader does a number of things it shouldn't and doesn't do things that it
6 * should. The stuff in here is mainly a hodge-podge collection of setup code 4 * should. The stuff in here is mainly a hodge-podge collection of setup code
diff --git a/arch/ppc/platforms/gemini_setup.c b/arch/ppc/platforms/gemini_setup.c
index 729897c59033..0090ff154608 100644
--- a/arch/ppc/platforms/gemini_setup.c
+++ b/arch/ppc/platforms/gemini_setup.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/gemini_setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds 2 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas 3 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu) 4 * Modified by Cort Dougan (cort@cs.nmt.edu)
diff --git a/arch/ppc/platforms/hdpu.c b/arch/ppc/platforms/hdpu.c
index 50039a204c24..75dc2ee87d2f 100644
--- a/arch/ppc/platforms/hdpu.c
+++ b/arch/ppc/platforms/hdpu.c
@@ -1,7 +1,4 @@
1
2/* 1/*
3 * arch/ppc/platforms/hdpu_setup.c
4 *
5 * Board setup routines for the Sky Computers HDPU Compute Blade. 2 * Board setup routines for the Sky Computers HDPU Compute Blade.
6 * 3 *
7 * Written by Brian Waite <waite@skycomputers.com> 4 * Written by Brian Waite <waite@skycomputers.com>
@@ -319,11 +316,10 @@ static void __init hdpu_fixup_eth_pdata(struct platform_device *pd)
319 struct mv643xx_eth_platform_data *eth_pd; 316 struct mv643xx_eth_platform_data *eth_pd;
320 eth_pd = pd->dev.platform_data; 317 eth_pd = pd->dev.platform_data;
321 318
322 eth_pd->port_serial_control =
323 mv64x60_read(&bh, MV643XX_ETH_PORT_SERIAL_CONTROL_REG(pd->id) & ~1);
324
325 eth_pd->force_phy_addr = 1; 319 eth_pd->force_phy_addr = 1;
326 eth_pd->phy_addr = pd->id; 320 eth_pd->phy_addr = pd->id;
321 eth_pd->speed = SPEED_100;
322 eth_pd->duplex = DUPLEX_FULL;
327 eth_pd->tx_queue_size = 400; 323 eth_pd->tx_queue_size = 400;
328 eth_pd->rx_queue_size = 800; 324 eth_pd->rx_queue_size = 800;
329} 325}
@@ -354,7 +350,7 @@ static void __init hdpu_fixup_cpustate_pdata(struct platform_device *pd)
354} 350}
355#endif 351#endif
356 352
357static int __init hdpu_platform_notify(struct device *dev) 353static int hdpu_platform_notify(struct device *dev)
358{ 354{
359 static struct { 355 static struct {
360 char *bus_id; 356 char *bus_id;
diff --git a/arch/ppc/platforms/hdpu.h b/arch/ppc/platforms/hdpu.h
index 07c3cffb5c7b..f9e020b6970c 100644
--- a/arch/ppc/platforms/hdpu.h
+++ b/arch/ppc/platforms/hdpu.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/hdpu.h
3 *
4 * Definitions for Sky Computers HDPU board. 2 * Definitions for Sky Computers HDPU board.
5 * 3 *
6 * Brian Waite <waite@skycomputers.com> 4 * Brian Waite <waite@skycomputers.com>
diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
index 6e58e30ceed1..ad21280e8920 100644
--- a/arch/ppc/platforms/katana.c
+++ b/arch/ppc/platforms/katana.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/katana.c
3 *
4 * Board setup routines for the Artesyn Katana cPCI boards. 2 * Board setup routines for the Artesyn Katana cPCI boards.
5 * 3 *
6 * Author: Tim Montgomery <timm@artesyncp.com> 4 * Author: Tim Montgomery <timm@artesyncp.com>
@@ -598,7 +596,7 @@ katana_fixup_mv64xxx_pdata(struct platform_device *pdev)
598} 596}
599#endif 597#endif
600 598
601static int __init 599static int
602katana_platform_notify(struct device *dev) 600katana_platform_notify(struct device *dev)
603{ 601{
604 static struct { 602 static struct {
@@ -664,12 +662,11 @@ katana_setup_mtd(void)
664 662
665 ptbl_entries = (size >= (64*MB)) ? 6 : 4; 663 ptbl_entries = (size >= (64*MB)) ? 6 : 4;
666 664
667 if ((ptbl = kmalloc(ptbl_entries * sizeof(struct mtd_partition), 665 if ((ptbl = kcalloc(ptbl_entries, sizeof(struct mtd_partition),
668 GFP_KERNEL)) == NULL) { 666 GFP_KERNEL)) == NULL) {
669 printk(KERN_WARNING "Can't alloc MTD partition table\n"); 667 printk(KERN_WARNING "Can't alloc MTD partition table\n");
670 return -ENOMEM; 668 return -ENOMEM;
671 } 669 }
672 memset(ptbl, 0, ptbl_entries * sizeof(struct mtd_partition));
673 670
674 ptbl[0].name = "Monitor"; 671 ptbl[0].name = "Monitor";
675 ptbl[0].size = KATANA_MTD_MONITOR_SIZE; 672 ptbl[0].size = KATANA_MTD_MONITOR_SIZE;
diff --git a/arch/ppc/platforms/katana.h b/arch/ppc/platforms/katana.h
index 597257eff2ec..0a9b036526b1 100644
--- a/arch/ppc/platforms/katana.h
+++ b/arch/ppc/platforms/katana.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/katana.h
3 *
4 * Definitions for Artesyn Katana750i/3750 board. 2 * Definitions for Artesyn Katana750i/3750 board.
5 * 3 *
6 * Author: Tim Montgomery <timm@artesyncp.com> 4 * Author: Tim Montgomery <timm@artesyncp.com>
diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
index 7ed52dc340c9..fecbe9adc9e0 100644
--- a/arch/ppc/platforms/lite5200.c
+++ b/arch/ppc/platforms/lite5200.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/lite5200.c
3 *
4 * Platform support file for the Freescale LITE5200 based on MPC52xx. 2 * Platform support file for the Freescale LITE5200 based on MPC52xx.
5 * A maximum of this file should be moved to syslib/mpc52xx_????? 3 * A maximum of this file should be moved to syslib/mpc52xx_?????
6 * so that new platform based on MPC52xx need a minimal platform file 4 * so that new platform based on MPC52xx need a minimal platform file
@@ -36,8 +34,7 @@
36#include <asm/mpc52xx.h> 34#include <asm/mpc52xx.h>
37#include <asm/ppc_sys.h> 35#include <asm/ppc_sys.h>
38#include <asm/machdep.h> 36#include <asm/machdep.h>
39 37#include <asm/pci-bridge.h>
40#include <syslib/mpc52xx_pci.h>
41 38
42 39
43extern int powersave_nap; 40extern int powersave_nap;
@@ -70,44 +67,53 @@ lite5200_show_cpuinfo(struct seq_file *m)
70} 67}
71 68
72#ifdef CONFIG_PCI 69#ifdef CONFIG_PCI
70#ifdef CONFIG_LITE5200B
71static int
72lite5200_map_irq(struct pci_dev *dev, unsigned char idsel,
73 unsigned char pin)
74{
75 static char pci_irq_table[][4] =
76 /*
77 * PCI IDSEL/INTPIN->INTLINE
78 * A B C D
79 */
80 {
81 {MPC52xx_IRQ0, MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3},
82 {MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3, MPC52xx_IRQ0},
83 };
84
85 const long min_idsel = 24, max_idsel = 25, irqs_per_slot = 4;
86 return PCI_IRQ_TABLE_LOOKUP;
87}
88#else /* Original Lite */
73static int 89static int
74lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) 90lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
75{ 91{
76 return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1; 92 return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1;
77} 93}
78#endif 94#endif
95#endif
79 96
80static void __init 97static void __init
81lite5200_setup_cpu(void) 98lite5200_setup_cpu(void)
82{ 99{
83 struct mpc52xx_cdm __iomem *cdm;
84 struct mpc52xx_gpio __iomem *gpio; 100 struct mpc52xx_gpio __iomem *gpio;
85 struct mpc52xx_intr __iomem *intr; 101 struct mpc52xx_intr __iomem *intr;
86 struct mpc52xx_xlb __iomem *xlb;
87 102
88 u32 port_config; 103 u32 port_config;
89 u32 intr_ctrl; 104 u32 intr_ctrl;
90 105
91 /* Map zones */ 106 /* Map zones */
92 cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
93 gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE); 107 gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
94 xlb = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE);
95 intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE); 108 intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
96 109
97 if (!cdm || !gpio || !xlb || !intr) { 110 if (!gpio || !intr) {
98 printk("lite5200.c: Error while mapping CDM/GPIO/XLB/INTR during" 111 printk(KERN_ERR __FILE__ ": "
99 "lite5200_setup_cpu\n"); 112 "Error while mapping GPIO/INTR during "
113 "lite5200_setup_cpu\n");
100 goto unmap_regs; 114 goto unmap_regs;
101 } 115 }
102 116
103 /* Use internal 48 Mhz */
104 out_8(&cdm->ext_48mhz_en, 0x00);
105 out_8(&cdm->fd_enable, 0x01);
106 if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */
107 out_be16(&cdm->fd_counters, 0x0001);
108 else
109 out_be16(&cdm->fd_counters, 0x5555);
110
111 /* Get port mux config */ 117 /* Get port mux config */
112 port_config = in_be32(&gpio->port_config); 118 port_config = in_be32(&gpio->port_config);
113 119
@@ -118,29 +124,29 @@ lite5200_setup_cpu(void)
118 port_config &= ~0x00007000; /* Differential mode - USB1 only */ 124 port_config &= ~0x00007000; /* Differential mode - USB1 only */
119 port_config |= 0x00001000; 125 port_config |= 0x00001000;
120 126
127 /* ATA CS is on csb_4/5 */
128 port_config &= ~0x03000000;
129 port_config |= 0x01000000;
130
121 /* Commit port config */ 131 /* Commit port config */
122 out_be32(&gpio->port_config, port_config); 132 out_be32(&gpio->port_config, port_config);
123 133
124 /* Configure the XLB Arbiter */ 134 /* IRQ[0-3] setup */
125 out_be32(&xlb->master_pri_enable, 0xff);
126 out_be32(&xlb->master_priority, 0x11111111);
127
128 /* Enable ram snooping for 1GB window */
129 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
130 out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
131
132 /* IRQ[0-3] setup : IRQ0 - Level Active Low */
133 /* IRQ[1-3] - Level Active High */
134 intr_ctrl = in_be32(&intr->ctrl); 135 intr_ctrl = in_be32(&intr->ctrl);
135 intr_ctrl &= ~0x00ff0000; 136 intr_ctrl &= ~0x00ff0000;
136 intr_ctrl |= 0x00c00000; 137#ifdef CONFIG_LITE5200B
138 /* IRQ[0-3] Level Active Low */
139 intr_ctrl |= 0x00ff0000;
140#else
141 /* IRQ0 Level Active Low
142 * IRQ[1-3] Level Active High */
143 intr_ctrl |= 0x00c00000;
144#endif
137 out_be32(&intr->ctrl, intr_ctrl); 145 out_be32(&intr->ctrl, intr_ctrl);
138 146
139 /* Unmap reg zone */ 147 /* Unmap reg zone */
140unmap_regs: 148unmap_regs:
141 if (cdm) iounmap(cdm);
142 if (gpio) iounmap(gpio); 149 if (gpio) iounmap(gpio);
143 if (xlb) iounmap(xlb);
144 if (intr) iounmap(intr); 150 if (intr) iounmap(intr);
145} 151}
146 152
@@ -148,7 +154,8 @@ static void __init
148lite5200_setup_arch(void) 154lite5200_setup_arch(void)
149{ 155{
150 /* CPU & Port mux setup */ 156 /* CPU & Port mux setup */
151 lite5200_setup_cpu(); 157 mpc52xx_setup_cpu(); /* Generic */
158 lite5200_setup_cpu(); /* Platform specific */
152 159
153#ifdef CONFIG_PCI 160#ifdef CONFIG_PCI
154 /* PCI Bridge setup */ 161 /* PCI Bridge setup */
diff --git a/arch/ppc/platforms/lite5200.h b/arch/ppc/platforms/lite5200.h
index c1de2aa47175..852a18e24d0b 100644
--- a/arch/ppc/platforms/lite5200.h
+++ b/arch/ppc/platforms/lite5200.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/lite5200.h
3 *
4 * Definitions for Freescale LITE5200 : MPC52xx Standard Development 2 * Definitions for Freescale LITE5200 : MPC52xx Standard Development
5 * Platform board support 3 * Platform board support
6 * 4 *
diff --git a/arch/ppc/platforms/lopec.c b/arch/ppc/platforms/lopec.c
index 06d247c23b82..c6445a727ca3 100644
--- a/arch/ppc/platforms/lopec.c
+++ b/arch/ppc/platforms/lopec.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/lopec.c
3 *
4 * Setup routines for the Motorola LoPEC. 2 * Setup routines for the Motorola LoPEC.
5 * 3 *
6 * Author: Dan Cox 4 * Author: Dan Cox
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c
new file mode 100644
index 000000000000..bc9b94f77e39
--- /dev/null
+++ b/arch/ppc/platforms/mpc8272ads_setup.c
@@ -0,0 +1,236 @@
1/*
2 * arch/ppc/platforms/82xx/pq2ads_pd.c
3 *
4 * MPC82xx Board-specific PlatformDevice descriptions
5 *
6 * 2005 (c) MontaVista Software, Inc.
7 * Vitaly Bordug <vbordug@ru.mvista.com>
8 *
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
12 */
13
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/device.h>
18#include <linux/ioport.h>
19#include <linux/fs_enet_pd.h>
20#include <linux/platform_device.h>
21
22#include <asm/io.h>
23#include <asm/mpc8260.h>
24#include <asm/cpm2.h>
25#include <asm/immap_cpm2.h>
26#include <asm/irq.h>
27#include <asm/ppc_sys.h>
28#include <asm/ppcboot.h>
29
30#include "pq2ads_pd.h"
31
32static void init_fcc1_ioports(void);
33static void init_fcc2_ioports(void);
34
35static struct fs_mii_bus_info mii_bus_info = {
36 .method = fsmii_bitbang,
37 .id = 0,
38 .i.bitbang = {
39 .mdio_port = fsiop_portc,
40 .mdio_bit = 18,
41 .mdc_port = fsiop_portc,
42 .mdc_bit = 19,
43 .delay = 1,
44 },
45};
46
47static struct fs_platform_info mpc82xx_fcc1_pdata = {
48 .fs_no = fsid_fcc1,
49 .cp_page = CPM_CR_FCC1_PAGE,
50 .cp_block = CPM_CR_FCC1_SBLOCK,
51 .clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
52 .clk_route = CMX1_CLK_ROUTE,
53 .clk_mask = CMX1_CLK_MASK,
54 .init_ioports = init_fcc1_ioports,
55
56 .phy_addr = 0,
57#ifdef PHY_INTERRUPT
58 .phy_irq = PHY_INTERRUPT,
59#else
60 .phy_irq = -1;
61#endif
62 .mem_offset = FCC1_MEM_OFFSET,
63 .bus_info = &mii_bus_info,
64 .rx_ring = 32,
65 .tx_ring = 32,
66 .rx_copybreak = 240,
67 .use_napi = 0,
68 .napi_weight = 17,
69};
70
71static struct fs_platform_info mpc82xx_fcc2_pdata = {
72 .fs_no = fsid_fcc2,
73 .cp_page = CPM_CR_FCC2_PAGE,
74 .cp_block = CPM_CR_FCC2_SBLOCK,
75 .clk_trx = (PC_F2RXCLK | PC_F2TXCLK),
76 .clk_route = CMX2_CLK_ROUTE,
77 .clk_mask = CMX2_CLK_MASK,
78 .init_ioports = init_fcc2_ioports,
79
80 .phy_addr = 3,
81#ifdef PHY_INTERRUPT
82 .phy_irq = PHY_INTERRUPT,
83#else
84 .phy_irq = -1;
85#endif
86 .mem_offset = FCC2_MEM_OFFSET,
87 .bus_info = &mii_bus_info,
88 .rx_ring = 32,
89 .tx_ring = 32,
90 .rx_copybreak = 240,
91 .use_napi = 0,
92 .napi_weight = 17,
93};
94
95static void init_fcc1_ioports(void)
96{
97 struct io_port *io;
98 u32 tempval;
99 cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
100 u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
101
102 io = &immap->im_ioport;
103
104 /* Enable the PHY */
105 clrbits32(bcsr, BCSR1_FETHIEN);
106 setbits32(bcsr, BCSR1_FETH_RST);
107
108 /* FCC1 pins are on port A/C. */
109 /* Configure port A and C pins for FCC1 Ethernet. */
110
111 tempval = in_be32(&io->iop_pdira);
112 tempval &= ~PA1_DIRA0;
113 tempval |= PA1_DIRA1;
114 out_be32(&io->iop_pdira, tempval);
115
116 tempval = in_be32(&io->iop_psora);
117 tempval &= ~PA1_PSORA0;
118 tempval |= PA1_PSORA1;
119 out_be32(&io->iop_psora, tempval);
120
121 setbits32(&io->iop_ppara,PA1_DIRA0 | PA1_DIRA1);
122
123 /* Alter clocks */
124 tempval = PC_F1TXCLK|PC_F1RXCLK;
125
126 clrbits32(&io->iop_psorc, tempval);
127 clrbits32(&io->iop_pdirc, tempval);
128 setbits32(&io->iop_pparc, tempval);
129
130 clrbits32(&immap->im_cpmux.cmx_fcr, CMX1_CLK_MASK);
131 setbits32(&immap->im_cpmux.cmx_fcr, CMX1_CLK_ROUTE);
132 iounmap(bcsr);
133 iounmap(immap);
134}
135
136static void init_fcc2_ioports(void)
137{
138 cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
139 u32 *bcsr = ioremap(BCSR_ADDR+12, sizeof(u32));
140
141 struct io_port *io;
142 u32 tempval;
143
144 immap = cpm2_immr;
145
146 io = &immap->im_ioport;
147
148 /* Enable the PHY */
149 clrbits32(bcsr, BCSR3_FETHIEN2);
150 setbits32(bcsr, BCSR3_FETH2_RST);
151
152 /* FCC2 are port B/C. */
153 /* Configure port A and C pins for FCC2 Ethernet. */
154
155 tempval = in_be32(&io->iop_pdirb);
156 tempval &= ~PB2_DIRB0;
157 tempval |= PB2_DIRB1;
158 out_be32(&io->iop_pdirb, tempval);
159
160 tempval = in_be32(&io->iop_psorb);
161 tempval &= ~PB2_PSORB0;
162 tempval |= PB2_PSORB1;
163 out_be32(&io->iop_psorb, tempval);
164
165 setbits32(&io->iop_pparb,PB2_DIRB0 | PB2_DIRB1);
166
167 tempval = PC_F2RXCLK|PC_F2TXCLK;
168
169 /* Alter clocks */
170 clrbits32(&io->iop_psorc,tempval);
171 clrbits32(&io->iop_pdirc,tempval);
172 setbits32(&io->iop_pparc,tempval);
173
174 clrbits32(&immap->im_cpmux.cmx_fcr, CMX2_CLK_MASK);
175 setbits32(&immap->im_cpmux.cmx_fcr, CMX2_CLK_ROUTE);
176
177 iounmap(bcsr);
178 iounmap(immap);
179}
180
181
182static void __init mpc8272ads_fixup_enet_pdata(struct platform_device *pdev,
183 int idx)
184{
185 bd_t* bi = (void*)__res;
186 int fs_no = fsid_fcc1+pdev->id-1;
187
188 mpc82xx_fcc1_pdata.dpram_offset = mpc82xx_fcc2_pdata.dpram_offset = (u32)cpm2_immr->im_dprambase;
189 mpc82xx_fcc1_pdata.fcc_regs_c = mpc82xx_fcc2_pdata.fcc_regs_c = (u32)cpm2_immr->im_fcc_c;
190
191 switch(fs_no) {
192 case fsid_fcc1:
193 memcpy(&mpc82xx_fcc1_pdata.macaddr,bi->bi_enetaddr,6);
194 pdev->dev.platform_data = &mpc82xx_fcc1_pdata;
195 break;
196 case fsid_fcc2:
197 memcpy(&mpc82xx_fcc2_pdata.macaddr,bi->bi_enetaddr,6);
198 mpc82xx_fcc2_pdata.macaddr[5] ^= 1;
199 pdev->dev.platform_data = &mpc82xx_fcc2_pdata;
200 break;
201 }
202}
203
204static int mpc8272ads_platform_notify(struct device *dev)
205{
206 static const struct platform_notify_dev_map dev_map[] = {
207 {
208 .bus_id = "fsl-cpm-fcc",
209 .rtn = mpc8272ads_fixup_enet_pdata
210 },
211 {
212 .bus_id = NULL
213 }
214 };
215 platform_notify_map(dev_map,dev);
216
217 return 0;
218
219}
220
221int __init mpc8272ads_init(void)
222{
223 printk(KERN_NOTICE "mpc8272ads: Init\n");
224
225 platform_notify = mpc8272ads_platform_notify;
226
227 ppc_sys_device_initfunc();
228
229 ppc_sys_device_disable_all();
230 ppc_sys_device_enable(MPC82xx_CPM_FCC1);
231 ppc_sys_device_enable(MPC82xx_CPM_FCC2);
232
233 return 0;
234}
235
236arch_initcall(mpc8272ads_init);
diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c
new file mode 100644
index 000000000000..ac8fcc68afeb
--- /dev/null
+++ b/arch/ppc/platforms/mpc866ads_setup.c
@@ -0,0 +1,273 @@
1/*arch/ppc/platforms/mpc885ads-setup.c
2 *
3 * Platform setup for the Freescale mpc885ads board
4 *
5 * Vitaly Bordug <vbordug@ru.mvista.com>
6 *
7 * Copyright 2005 MontaVista Software Inc.
8 *
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
12 */
13
14#include <linux/config.h>
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/param.h>
18#include <linux/string.h>
19#include <linux/ioport.h>
20#include <linux/device.h>
21
22#include <linux/fs_enet_pd.h>
23#include <linux/mii.h>
24
25#include <asm/delay.h>
26#include <asm/io.h>
27#include <asm/machdep.h>
28#include <asm/page.h>
29#include <asm/processor.h>
30#include <asm/system.h>
31#include <asm/time.h>
32#include <asm/ppcboot.h>
33#include <asm/8xx_immap.h>
34#include <asm/commproc.h>
35#include <asm/ppc_sys.h>
36#include <asm/mpc8xx.h>
37
38extern unsigned char __res[];
39
40static struct fs_mii_bus_info fec_mii_bus_info = {
41 .method = fsmii_fec,
42 .id = 0,
43};
44
45static struct fs_mii_bus_info scc_mii_bus_info = {
46 .method = fsmii_fixed,
47 .id = 0,
48 .i.fixed.speed = 10,
49 .i.fixed.duplex = 0,
50};
51
52static struct fs_platform_info mpc8xx_fec_pdata[] = {
53 {
54 .rx_ring = 128,
55 .tx_ring = 16,
56 .rx_copybreak = 240,
57
58 .use_napi = 1,
59 .napi_weight = 17,
60
61 .phy_addr = 15,
62 .phy_irq = -1,
63
64 .use_rmii = 0,
65
66 .bus_info = &fec_mii_bus_info,
67 }
68};
69
70static struct fs_platform_info mpc8xx_scc_pdata = {
71 .rx_ring = 64,
72 .tx_ring = 8,
73 .rx_copybreak = 240,
74
75 .use_napi = 1,
76 .napi_weight = 17,
77
78 .phy_addr = -1,
79 .phy_irq = -1,
80
81 .bus_info = &scc_mii_bus_info,
82};
83
84void __init board_init(void)
85{
86 volatile cpm8xx_t *cp = cpmp;
87 unsigned *bcsr_io;
88
89 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
90
91 if (bcsr_io == NULL) {
92 printk(KERN_CRIT "Could not remap BCSR1\n");
93 return;
94 }
95#ifdef CONFIG_SERIAL_CPM_SMC1
96 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
97 clrbits32(bcsr_io,(0x80000000 >> 7));
98#else
99 setbits32(bcsr_io,(0x80000000 >> 7));
100
101 cp->cp_pbpar &= ~(0x000000c0);
102 cp->cp_pbdir |= 0x000000c0;
103 cp->cp_smc[0].smc_smcmr = 0;
104 cp->cp_smc[0].smc_smce = 0;
105#endif
106
107#ifdef CONFIG_SERIAL_CPM_SMC2
108 cp->cp_simode &= ~(0xe0000000 >> 1);
109 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
110 clrbits32(bcsr_io,(0x80000000 >> 13));
111#else
112 clrbits32(bcsr_io,(0x80000000 >> 13));
113 cp->cp_pbpar &= ~(0x00000c00);
114 cp->cp_pbdir |= 0x00000c00;
115 cp->cp_smc[1].smc_smcmr = 0;
116 cp->cp_smc[1].smc_smce = 0;
117#endif
118 iounmap(bcsr_io);
119}
120
121static void setup_fec1_ioports(void)
122{
123 immap_t *immap = (immap_t *) IMAP_ADDR;
124
125 setbits16(&immap->im_ioport.iop_pdpar, 0x1fff);
126 setbits16(&immap->im_ioport.iop_pddir, 0x1fff);
127}
128
129static void setup_scc1_ioports(void)
130{
131 immap_t *immap = (immap_t *) IMAP_ADDR;
132 unsigned *bcsr_io;
133
134 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
135
136 if (bcsr_io == NULL) {
137 printk(KERN_CRIT "Could not remap BCSR1\n");
138 return;
139 }
140
141 /* Enable the PHY.
142 */
143 clrbits32(bcsr_io,BCSR1_ETHEN);
144
145 /* Configure port A pins for Txd and Rxd.
146 */
147 /* Disable receive and transmit in case EPPC-Bug started it.
148 */
149 setbits16(&immap->im_ioport.iop_papar, PA_ENET_RXD | PA_ENET_TXD);
150 clrbits16(&immap->im_ioport.iop_padir, PA_ENET_RXD | PA_ENET_TXD);
151 clrbits16(&immap->im_ioport.iop_paodr, PA_ENET_TXD);
152
153 /* Configure port C pins to enable CLSN and RENA.
154 */
155 clrbits16(&immap->im_ioport.iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
156 clrbits16(&immap->im_ioport.iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
157 setbits16(&immap->im_ioport.iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
158 /* Configure port A for TCLK and RCLK.
159 */
160 setbits16(&immap->im_ioport.iop_papar, PA_ENET_TCLK | PA_ENET_RCLK);
161 clrbits16(&immap->im_ioport.iop_padir, PA_ENET_TCLK | PA_ENET_RCLK);
162 clrbits32(&immap->im_cpm.cp_pbpar, PB_ENET_TENA);
163 clrbits32(&immap->im_cpm.cp_pbdir, PB_ENET_TENA);
164
165 /* Configure Serial Interface clock routing.
166 * First, clear all SCC bits to zero, then set the ones we want.
167 */
168 clrbits32(&immap->im_cpm.cp_sicr, SICR_ENET_MASK);
169 setbits32(&immap->im_cpm.cp_sicr, SICR_ENET_CLKRT);
170
171 /* In the original SCC enet driver the following code is placed at
172 the end of the initialization */
173 setbits32(&immap->im_cpm.cp_pbpar, PB_ENET_TENA);
174 setbits32(&immap->im_cpm.cp_pbdir, PB_ENET_TENA);
175
176}
177
178static void mpc866ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no)
179{
180 struct fs_platform_info *fpi = pdev->dev.platform_data;
181
182 volatile cpm8xx_t *cp;
183 bd_t *bd = (bd_t *) __res;
184 char *e;
185 int i;
186
187 /* Get pointer to Communication Processor */
188 cp = cpmp;
189 switch (fs_no) {
190 case fsid_fec1:
191 fpi = &mpc8xx_fec_pdata[0];
192 fpi->init_ioports = &setup_fec1_ioports;
193
194 break;
195 case fsid_scc1:
196 fpi = &mpc8xx_scc_pdata;
197 fpi->init_ioports = &setup_scc1_ioports;
198
199 break;
200 default:
201 printk(KERN_WARNING"Device %s is not supported!\n", pdev->name);
202 return;
203 }
204
205 pdev->dev.platform_data = fpi;
206 fpi->fs_no = fs_no;
207
208 e = (unsigned char *)&bd->bi_enetaddr;
209 for (i = 0; i < 6; i++)
210 fpi->macaddr[i] = *e++;
211
212 fpi->macaddr[5 - pdev->id]++;
213
214}
215
216static void mpc866ads_fixup_fec_enet_pdata(struct platform_device *pdev,
217 int idx)
218{
219 /* This is for FEC devices only */
220 if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec")))
221 return;
222 mpc866ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1);
223}
224
225static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev,
226 int idx)
227{
228 /* This is for SCC devices only */
229 if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc")))
230 return;
231
232 mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
233}
234
235static int mpc866ads_platform_notify(struct device *dev)
236{
237 static const struct platform_notify_dev_map dev_map[] = {
238 {
239 .bus_id = "fsl-cpm-fec",
240 .rtn = mpc866ads_fixup_fec_enet_pdata,
241 },
242 {
243 .bus_id = "fsl-cpm-scc",
244 .rtn = mpc866ads_fixup_scc_enet_pdata,
245 },
246 {
247 .bus_id = NULL
248 }
249 };
250
251 platform_notify_map(dev_map,dev);
252
253 return 0;
254}
255
256int __init mpc866ads_init(void)
257{
258 printk(KERN_NOTICE "mpc866ads: Init\n");
259
260 platform_notify = mpc866ads_platform_notify;
261
262 ppc_sys_device_initfunc();
263 ppc_sys_device_disable_all();
264
265#ifdef MPC8xx_SECOND_ETH_SCC1
266 ppc_sys_device_enable(MPC8xx_CPM_SCC1);
267#endif
268 ppc_sys_device_enable(MPC8xx_CPM_FEC1);
269
270 return 0;
271}
272
273arch_initcall(mpc866ads_init);
diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c
new file mode 100644
index 000000000000..50a99e5f7c68
--- /dev/null
+++ b/arch/ppc/platforms/mpc885ads_setup.c
@@ -0,0 +1,389 @@
1/*arch/ppc/platforms/mpc885ads-setup.c
2 *
3 * Platform setup for the Freescale mpc885ads board
4 *
5 * Vitaly Bordug <vbordug@ru.mvista.com>
6 *
7 * Copyright 2005 MontaVista Software Inc.
8 *
9 * This file is licensed under the terms of the GNU General Public License
10 * version 2. This program is licensed "as is" without any warranty of any
11 * kind, whether express or implied.
12 */
13
14#include <linux/config.h>
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/param.h>
18#include <linux/string.h>
19#include <linux/ioport.h>
20#include <linux/device.h>
21
22#include <linux/fs_enet_pd.h>
23#include <linux/mii.h>
24
25#include <asm/delay.h>
26#include <asm/io.h>
27#include <asm/machdep.h>
28#include <asm/page.h>
29#include <asm/processor.h>
30#include <asm/system.h>
31#include <asm/time.h>
32#include <asm/ppcboot.h>
33#include <asm/8xx_immap.h>
34#include <asm/commproc.h>
35#include <asm/ppc_sys.h>
36
37extern unsigned char __res[];
38
39static void __init mpc885ads_scc_phy_init(char);
40
41static struct fs_mii_bus_info fec_mii_bus_info = {
42 .method = fsmii_fec,
43 .id = 0,
44};
45
46static struct fs_mii_bus_info scc_mii_bus_info = {
47#ifdef CONFIG_SCC_ENET_8xx_FIXED
48 .method = fsmii_fixed,
49#else
50 .method = fsmii_fec,
51#endif
52
53 .id = 0,
54};
55
56static struct fs_platform_info mpc8xx_fec_pdata[] = {
57 {
58 .rx_ring = 128,
59 .tx_ring = 16,
60 .rx_copybreak = 240,
61
62 .use_napi = 1,
63 .napi_weight = 17,
64
65 .phy_addr = 0,
66 .phy_irq = SIU_IRQ7,
67
68 .bus_info = &fec_mii_bus_info,
69 }, {
70 .rx_ring = 128,
71 .tx_ring = 16,
72 .rx_copybreak = 240,
73
74 .use_napi = 1,
75 .napi_weight = 17,
76
77 .phy_addr = 1,
78 .phy_irq = SIU_IRQ7,
79
80 .bus_info = &fec_mii_bus_info,
81 }
82};
83
84static struct fs_platform_info mpc8xx_scc_pdata = {
85 .rx_ring = 64,
86 .tx_ring = 8,
87 .rx_copybreak = 240,
88
89 .use_napi = 1,
90 .napi_weight = 17,
91
92 .phy_addr = 2,
93#ifdef CONFIG_MPC8xx_SCC_ENET_FIXED
94 .phy_irq = -1,
95#else
96 .phy_irq = SIU_IRQ7,
97#endif
98
99 .bus_info = &scc_mii_bus_info,
100};
101
102void __init board_init(void)
103{
104 volatile cpm8xx_t *cp = cpmp;
105 unsigned int *bcsr_io;
106
107#ifdef CONFIG_FS_ENET
108 immap_t *immap = (immap_t *) IMAP_ADDR;
109#endif
110 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
111
112 if (bcsr_io == NULL) {
113 printk(KERN_CRIT "Could not remap BCSR\n");
114 return;
115 }
116#ifdef CONFIG_SERIAL_CPM_SMC1
117 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
118 clrbits32(bcsr_io, BCSR1_RS232EN_1);
119#else
120 setbits32(bcsr_io,BCSR1_RS232EN_1);
121 cp->cp_smc[0].smc_smcmr = 0;
122 cp->cp_smc[0].smc_smce = 0;
123#endif
124
125#ifdef CONFIG_SERIAL_CPM_SMC2
126 cp->cp_simode &= ~(0xe0000000 >> 1);
127 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
128 clrbits32(bcsr_io,BCSR1_RS232EN_2);
129#else
130 setbits32(bcsr_io,BCSR1_RS232EN_2);
131 cp->cp_smc[1].smc_smcmr = 0;
132 cp->cp_smc[1].smc_smce = 0;
133#endif
134 iounmap(bcsr_io);
135
136#ifdef CONFIG_FS_ENET
137 /* use MDC for MII (common) */
138 setbits16(&immap->im_ioport.iop_pdpar, 0x0080);
139 clrbits16(&immap->im_ioport.iop_pddir, 0x0080);
140#endif
141}
142
143static void setup_fec1_ioports(void)
144{
145 immap_t *immap = (immap_t *) IMAP_ADDR;
146
147 /* configure FEC1 pins */
148 setbits16(&immap->im_ioport.iop_papar, 0xf830);
149 setbits16(&immap->im_ioport.iop_padir, 0x0830);
150 clrbits16(&immap->im_ioport.iop_padir, 0xf000);
151 setbits32(&immap->im_cpm.cp_pbpar, 0x00001001);
152
153 clrbits32(&immap->im_cpm.cp_pbdir, 0x00001001);
154 setbits16(&immap->im_ioport.iop_pcpar, 0x000c);
155 clrbits16(&immap->im_ioport.iop_pcdir, 0x000c);
156 setbits32(&immap->im_cpm.cp_pepar, 0x00000003);
157
158 setbits32(&immap->im_cpm.cp_pedir, 0x00000003);
159 clrbits32(&immap->im_cpm.cp_peso, 0x00000003);
160 clrbits32(&immap->im_cpm.cp_cptr, 0x00000100);
161}
162
163static void setup_fec2_ioports(void)
164{
165 immap_t *immap = (immap_t *) IMAP_ADDR;
166
167 /* configure FEC2 pins */
168 setbits32(&immap->im_cpm.cp_pepar, 0x0003fffc);
169 setbits32(&immap->im_cpm.cp_pedir, 0x0003fffc);
170 setbits32(&immap->im_cpm.cp_peso, 0x00037800);
171 clrbits32(&immap->im_cpm.cp_peso, 0x000087fc);
172 clrbits32(&immap->im_cpm.cp_cptr, 0x00000080);
173}
174
175static void setup_scc3_ioports(void)
176{
177 immap_t *immap = (immap_t *) IMAP_ADDR;
178 unsigned *bcsr_io;
179
180 bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
181
182 if (bcsr_io == NULL) {
183 printk(KERN_CRIT "Could not remap BCSR\n");
184 return;
185 }
186
187 /* Enable the PHY.
188 */
189 setbits32(bcsr_io+4, BCSR4_ETH10_RST);
190 /* Configure port A pins for Txd and Rxd.
191 */
192 setbits16(&immap->im_ioport.iop_papar, PA_ENET_RXD | PA_ENET_TXD);
193 clrbits16(&immap->im_ioport.iop_padir, PA_ENET_RXD | PA_ENET_TXD);
194
195 /* Configure port C pins to enable CLSN and RENA.
196 */
197 clrbits16(&immap->im_ioport.iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
198 clrbits16(&immap->im_ioport.iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
199 setbits16(&immap->im_ioport.iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
200
201 /* Configure port E for TCLK and RCLK.
202 */
203 setbits32(&immap->im_cpm.cp_pepar, PE_ENET_TCLK | PE_ENET_RCLK);
204 clrbits32(&immap->im_cpm.cp_pepar, PE_ENET_TENA);
205 clrbits32(&immap->im_cpm.cp_pedir,
206 PE_ENET_TCLK | PE_ENET_RCLK | PE_ENET_TENA);
207 clrbits32(&immap->im_cpm.cp_peso, PE_ENET_TCLK | PE_ENET_RCLK);
208 setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA);
209
210 /* Configure Serial Interface clock routing.
211 * First, clear all SCC bits to zero, then set the ones we want.
212 */
213 clrbits32(&immap->im_cpm.cp_sicr, SICR_ENET_MASK);
214 setbits32(&immap->im_cpm.cp_sicr, SICR_ENET_CLKRT);
215
216 /* Disable Rx and Tx. SMC1 sshould be stopped if SCC3 eternet are used.
217 */
218 immap->im_cpm.cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
219 /* On the MPC885ADS SCC ethernet PHY is initialized in the full duplex mode
220 * by H/W setting after reset. SCC ethernet controller support only half duplex.
221 * This discrepancy of modes causes a lot of carrier lost errors.
222 */
223
224 /* In the original SCC enet driver the following code is placed at
225 the end of the initialization */
226 setbits32(&immap->im_cpm.cp_pepar, PE_ENET_TENA);
227 clrbits32(&immap->im_cpm.cp_pedir, PE_ENET_TENA);
228 setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA);
229
230 setbits32(bcsr_io+1, BCSR1_ETHEN);
231 iounmap(bcsr_io);
232}
233
234static void mpc885ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no)
235{
236 struct fs_platform_info *fpi = pdev->dev.platform_data;
237
238 volatile cpm8xx_t *cp;
239 bd_t *bd = (bd_t *) __res;
240 char *e;
241 int i;
242
243 /* Get pointer to Communication Processor */
244 cp = cpmp;
245 switch (fs_no) {
246 case fsid_fec1:
247 fpi = &mpc8xx_fec_pdata[0];
248 fpi->init_ioports = &setup_fec1_ioports;
249 break;
250 case fsid_fec2:
251 fpi = &mpc8xx_fec_pdata[1];
252 fpi->init_ioports = &setup_fec2_ioports;
253 break;
254 case fsid_scc3:
255 fpi = &mpc8xx_scc_pdata;
256 fpi->init_ioports = &setup_scc3_ioports;
257 mpc885ads_scc_phy_init(fpi->phy_addr);
258 break;
259 default:
260 printk(KERN_WARNING"Device %s is not supported!\n", pdev->name);
261 return;
262 }
263
264 pdev->dev.platform_data = fpi;
265 fpi->fs_no = fs_no;
266
267 e = (unsigned char *)&bd->bi_enetaddr;
268 for (i = 0; i < 6; i++)
269 fpi->macaddr[i] = *e++;
270
271 fpi->macaddr[5 - pdev->id]++;
272
273}
274
275static void mpc885ads_fixup_fec_enet_pdata(struct platform_device *pdev,
276 int idx)
277{
278 /* This is for FEC devices only */
279 if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec")))
280 return;
281 mpc885ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1);
282}
283
284static void __init mpc885ads_fixup_scc_enet_pdata(struct platform_device *pdev,
285 int idx)
286{
287 /* This is for SCC devices only */
288 if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc")))
289 return;
290
291 mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
292}
293
294/* SCC ethernet controller does not have MII management channel. FEC1 MII
295 * channel is used to communicate with the 10Mbit PHY.
296 */
297
298#define MII_ECNTRL_PINMUX 0x4
299#define FEC_ECNTRL_PINMUX 0x00000004
300#define FEC_RCNTRL_MII_MODE 0x00000004
301
302/* Make MII read/write commands.
303 */
304#define mk_mii_write(REG, VAL, PHY_ADDR) (0x50020000 | (((REG) & 0x1f) << 18) | \
305 ((VAL) & 0xffff) | ((PHY_ADDR) << 23))
306
307static void mpc885ads_scc_phy_init(char phy_addr)
308{
309 volatile immap_t *immap;
310 volatile fec_t *fecp;
311 bd_t *bd;
312
313 bd = (bd_t *) __res;
314 immap = (immap_t *) IMAP_ADDR; /* pointer to internal registers */
315 fecp = &(immap->im_cpm.cp_fec);
316
317 /* Enable MII pins of the FEC1
318 */
319 setbits16(&immap->im_ioport.iop_pdpar, 0x0080);
320 clrbits16(&immap->im_ioport.iop_pddir, 0x0080);
321 /* Set MII speed to 2.5 MHz
322 */
323 out_be32(&fecp->fec_mii_speed,
324 ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1);
325
326 /* Enable FEC pin MUX
327 */
328 setbits32(&fecp->fec_ecntrl, MII_ECNTRL_PINMUX);
329 setbits32(&fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
330
331 out_be32(&fecp->fec_mii_data,
332 mk_mii_write(MII_BMCR, BMCR_ISOLATE, phy_addr));
333 udelay(100);
334 out_be32(&fecp->fec_mii_data,
335 mk_mii_write(MII_ADVERTISE,
336 ADVERTISE_10HALF | ADVERTISE_CSMA, phy_addr));
337 udelay(100);
338
339 /* Disable FEC MII settings
340 */
341 clrbits32(&fecp->fec_ecntrl, MII_ECNTRL_PINMUX);
342 clrbits32(&fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
343 out_be32(&fecp->fec_mii_speed, 0);
344}
345
346static int mpc885ads_platform_notify(struct device *dev)
347{
348
349 static const struct platform_notify_dev_map dev_map[] = {
350 {
351 .bus_id = "fsl-cpm-fec",
352 .rtn = mpc885ads_fixup_fec_enet_pdata,
353 },
354 {
355 .bus_id = "fsl-cpm-scc",
356 .rtn = mpc885ads_fixup_scc_enet_pdata,
357 },
358 {
359 .bus_id = NULL
360 }
361 };
362
363 platform_notify_map(dev_map,dev);
364
365}
366
367int __init mpc885ads_init(void)
368{
369 printk(KERN_NOTICE "mpc885ads: Init\n");
370
371 platform_notify = mpc885ads_platform_notify;
372
373 ppc_sys_device_initfunc();
374 ppc_sys_device_disable_all();
375
376 ppc_sys_device_enable(MPC8xx_CPM_FEC1);
377
378#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3
379 ppc_sys_device_enable(MPC8xx_CPM_SCC1);
380
381#endif
382#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
383 ppc_sys_device_enable(MPC8xx_CPM_FEC2);
384#endif
385
386 return 0;
387}
388
389arch_initcall(mpc885ads_init);
diff --git a/arch/ppc/platforms/mvme5100.c b/arch/ppc/platforms/mvme5100.c
index 108eb182dddc..c717cd92c028 100644
--- a/arch/ppc/platforms/mvme5100.c
+++ b/arch/ppc/platforms/mvme5100.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/mvme5100.c
3 *
4 * Board setup routines for the Motorola MVME5100. 2 * Board setup routines for the Motorola MVME5100.
5 * 3 *
6 * Author: Matt Porter <mporter@mvista.com> 4 * Author: Matt Porter <mporter@mvista.com>
diff --git a/arch/ppc/platforms/pal4.h b/arch/ppc/platforms/pal4.h
index 641a11a31657..8569c423d887 100644
--- a/arch/ppc/platforms/pal4.h
+++ b/arch/ppc/platforms/pal4.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/pal4.h
3 *
4 * Definitions for SBS Palomar IV board 2 * Definitions for SBS Palomar IV board
5 * 3 *
6 * Author: Dan Cox 4 * Author: Dan Cox
diff --git a/arch/ppc/platforms/pal4_pci.c b/arch/ppc/platforms/pal4_pci.c
index c3b1b757a48b..d81ae1c7e1cf 100644
--- a/arch/ppc/platforms/pal4_pci.c
+++ b/arch/ppc/platforms/pal4_pci.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/pal4_pci.c
3 *
4 * PCI support for SBS Palomar IV 2 * PCI support for SBS Palomar IV
5 * 3 *
6 * Author: Dan Cox 4 * Author: Dan Cox
diff --git a/arch/ppc/platforms/pal4_serial.h b/arch/ppc/platforms/pal4_serial.h
index a715c66e1adf..a75343224cfd 100644
--- a/arch/ppc/platforms/pal4_serial.h
+++ b/arch/ppc/platforms/pal4_serial.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/pal4_serial.h
3 *
4 * Definitions for SBS PalomarIV serial support 2 * Definitions for SBS PalomarIV serial support
5 * 3 *
6 * Author: Dan Cox 4 * Author: Dan Cox
diff --git a/arch/ppc/platforms/pal4_setup.c b/arch/ppc/platforms/pal4_setup.c
index f93a3f871932..3c3d881df00d 100644
--- a/arch/ppc/platforms/pal4_setup.c
+++ b/arch/ppc/platforms/pal4_setup.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/pal4_setup.c
3 *
4 * Board setup routines for the SBS PalomarIV. 2 * Board setup routines for the SBS PalomarIV.
5 * 3 *
6 * Author: Dan Cox 4 * Author: Dan Cox
diff --git a/arch/ppc/platforms/powerpmc250.c b/arch/ppc/platforms/powerpmc250.c
index e6b520e6e13f..c3a86be11fb7 100644
--- a/arch/ppc/platforms/powerpmc250.c
+++ b/arch/ppc/platforms/powerpmc250.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/powerpmc250.c
3 *
4 * Board setup routines for Force PowerPMC-250 Processor PMC 2 * Board setup routines for Force PowerPMC-250 Processor PMC
5 * 3 *
6 * Author: Troy Benjegerdes <tbenjegerdes@mvista.com> 4 * Author: Troy Benjegerdes <tbenjegerdes@mvista.com>
diff --git a/arch/ppc/platforms/pplus.c b/arch/ppc/platforms/pplus.c
index 22bd40cfb092..de2761ebe0d9 100644
--- a/arch/ppc/platforms/pplus.c
+++ b/arch/ppc/platforms/pplus.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/pplus.c
3 *
4 * Board and PCI setup routines for MCG PowerPlus 2 * Board and PCI setup routines for MCG PowerPlus
5 * 3 *
6 * Author: Randy Vinson <rvinson@mvista.com> 4 * Author: Randy Vinson <rvinson@mvista.com>
diff --git a/arch/ppc/platforms/pplus.h b/arch/ppc/platforms/pplus.h
index 90f0cb2d409f..a07cbbdd72c6 100644
--- a/arch/ppc/platforms/pplus.h
+++ b/arch/ppc/platforms/pplus.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/pplus.h
3 *
4 * Definitions for Motorola MCG Falcon/Raven & HAWK North Bridge & Memory ctlr. 2 * Definitions for Motorola MCG Falcon/Raven & HAWK North Bridge & Memory ctlr.
5 * 3 *
6 * Author: Mark A. Greerinclude/asm-ppc/hawk.h 4 * Author: Mark A. Greerinclude/asm-ppc/hawk.h
diff --git a/arch/ppc/platforms/pq2ads.c b/arch/ppc/platforms/pq2ads.c
index 71c9fca1fe9b..3365fd788a7a 100644
--- a/arch/ppc/platforms/pq2ads.c
+++ b/arch/ppc/platforms/pq2ads.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/pq2ads.c
3 *
4 * PQ2ADS platform support 2 * PQ2ADS platform support
5 * 3 *
6 * Author: Kumar Gala <galak@kernel.crashing.org> 4 * Author: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/platforms/pq2ads.h b/arch/ppc/platforms/pq2ads.h
index 067d9a5aebc1..6b26dd36c640 100644
--- a/arch/ppc/platforms/pq2ads.h
+++ b/arch/ppc/platforms/pq2ads.h
@@ -13,6 +13,10 @@
13 13
14#include <asm/ppcboot.h> 14#include <asm/ppcboot.h>
15 15
16#if defined(CONFIG_ADS8272)
17#define BOARD_CHIP_NAME "8272"
18#endif
19
16/* Memory map is configured by the PROM startup. 20/* Memory map is configured by the PROM startup.
17 * We just map a few things we need. The CSR is actually 4 byte-wide 21 * We just map a few things we need. The CSR is actually 4 byte-wide
18 * registers that can be accessed as 8-, 16-, or 32-bit values. 22 * registers that can be accessed as 8-, 16-, or 32-bit values.
diff --git a/arch/ppc/platforms/pq2ads_pd.h b/arch/ppc/platforms/pq2ads_pd.h
new file mode 100644
index 000000000000..8f14a43eafec
--- /dev/null
+++ b/arch/ppc/platforms/pq2ads_pd.h
@@ -0,0 +1,114 @@
1#ifndef __PQ2ADS_PD_H
2#define __PQ2ADS_PD_H
3/*
4 * arch/ppc/platforms/82xx/pq2ads_pd.h
5 *
6 * Some defines for MPC82xx board-specific PlatformDevice descriptions
7 *
8 * 2005 (c) MontaVista Software, Inc.
9 * Vitaly Bordug <vbordug@ru.mvista.com>
10 *
11 * This file is licensed under the terms of the GNU General Public License
12 * version 2. This program is licensed "as is" without any warranty of any
13 * kind, whether express or implied.
14 */
15
16/* FCC1 Clock Source Configuration. These can be redefined in the board specific file.
17 Can only choose from CLK9-12 */
18
19#define F1_RXCLK 11
20#define F1_TXCLK 10
21
22/* FCC2 Clock Source Configuration. These can be redefined in the board specific file.
23 Can only choose from CLK13-16 */
24#define F2_RXCLK 15
25#define F2_TXCLK 16
26
27/* FCC3 Clock Source Configuration. These can be redefined in the board specific file.
28 Can only choose from CLK13-16 */
29#define F3_RXCLK 13
30#define F3_TXCLK 14
31
32/* Automatically generates register configurations */
33#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */
34
35#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */
36#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */
37#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */
38#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */
39#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */
40#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */
41
42#define PC_F1RXCLK PC_CLK(F1_RXCLK)
43#define PC_F1TXCLK PC_CLK(F1_TXCLK)
44#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK))
45#define CMX1_CLK_MASK ((uint)0xff000000)
46
47#define PC_F2RXCLK PC_CLK(F2_RXCLK)
48#define PC_F2TXCLK PC_CLK(F2_TXCLK)
49#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK))
50#define CMX2_CLK_MASK ((uint)0x00ff0000)
51
52#define PC_F3RXCLK PC_CLK(F3_RXCLK)
53#define PC_F3TXCLK PC_CLK(F3_TXCLK)
54#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK))
55#define CMX3_CLK_MASK ((uint)0x0000ff00)
56
57/* I/O Pin assignment for FCC1. I don't yet know the best way to do this,
58 * but there is little variation among the choices.
59 */
60#define PA1_COL 0x00000001U
61#define PA1_CRS 0x00000002U
62#define PA1_TXER 0x00000004U
63#define PA1_TXEN 0x00000008U
64#define PA1_RXDV 0x00000010U
65#define PA1_RXER 0x00000020U
66#define PA1_TXDAT 0x00003c00U
67#define PA1_RXDAT 0x0003c000U
68#define PA1_PSORA0 (PA1_RXDAT | PA1_TXDAT)
69#define PA1_PSORA1 (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \
70 PA1_RXDV | PA1_RXER)
71#define PA1_DIRA0 (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV)
72#define PA1_DIRA1 (PA1_TXDAT | PA1_TXEN | PA1_TXER)
73
74
75/* I/O Pin assignment for FCC2. I don't yet know the best way to do this,
76 * but there is little variation among the choices.
77 */
78#define PB2_TXER 0x00000001U
79#define PB2_RXDV 0x00000002U
80#define PB2_TXEN 0x00000004U
81#define PB2_RXER 0x00000008U
82#define PB2_COL 0x00000010U
83#define PB2_CRS 0x00000020U
84#define PB2_TXDAT 0x000003c0U
85#define PB2_RXDAT 0x00003c00U
86#define PB2_PSORB0 (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \
87 PB2_RXER | PB2_RXDV | PB2_TXER)
88#define PB2_PSORB1 (PB2_TXEN)
89#define PB2_DIRB0 (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV)
90#define PB2_DIRB1 (PB2_TXDAT | PB2_TXEN | PB2_TXER)
91
92
93/* I/O Pin assignment for FCC3. I don't yet know the best way to do this,
94 * but there is little variation among the choices.
95 */
96#define PB3_RXDV 0x00004000U
97#define PB3_RXER 0x00008000U
98#define PB3_TXER 0x00010000U
99#define PB3_TXEN 0x00020000U
100#define PB3_COL 0x00040000U
101#define PB3_CRS 0x00080000U
102#define PB3_TXDAT 0x0f000000U
103#define PB3_RXDAT 0x00f00000U
104#define PB3_PSORB0 (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \
105 PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN)
106#define PB3_PSORB1 0
107#define PB3_DIRB0 (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV)
108#define PB3_DIRB1 (PB3_TXDAT | PB3_TXEN | PB3_TXER)
109
110#define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128))
111#define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0)
112#define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1)
113
114#endif
diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c
index d06535802003..e86f6156d589 100644
--- a/arch/ppc/platforms/prep_setup.c
+++ b/arch/ppc/platforms/prep_setup.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds 2 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas 3 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu) 4 * Modified by Cort Dougan (cort@cs.nmt.edu)
@@ -738,7 +736,7 @@ ibm_statusled_progress(char *s, unsigned short hex)
738 hex = 0xfff; 736 hex = 0xfff;
739 if (!notifier_installed) { 737 if (!notifier_installed) {
740 ++notifier_installed; 738 ++notifier_installed;
741 notifier_chain_register(&panic_notifier_list, 739 atomic_notifier_chain_register(&panic_notifier_list,
742 &ibm_statusled_block); 740 &ibm_statusled_block);
743 } 741 }
744 } 742 }
@@ -1069,15 +1067,13 @@ prep_map_io(void)
1069static int __init 1067static int __init
1070prep_request_io(void) 1068prep_request_io(void)
1071{ 1069{
1072 if (_machine == _MACH_prep) {
1073#ifdef CONFIG_NVRAM 1070#ifdef CONFIG_NVRAM
1074 request_region(PREP_NVRAM_AS0, 0x8, "nvram"); 1071 request_region(PREP_NVRAM_AS0, 0x8, "nvram");
1075#endif 1072#endif
1076 request_region(0x00,0x20,"dma1"); 1073 request_region(0x00,0x20,"dma1");
1077 request_region(0x40,0x20,"timer"); 1074 request_region(0x40,0x20,"timer");
1078 request_region(0x80,0x10,"dma page reg"); 1075 request_region(0x80,0x10,"dma page reg");
1079 request_region(0xc0,0x20,"dma2"); 1076 request_region(0xc0,0x20,"dma2");
1080 }
1081 1077
1082 return 0; 1078 return 0;
1083} 1079}
diff --git a/arch/ppc/platforms/prpmc750.c b/arch/ppc/platforms/prpmc750.c
index 0bb14a5e824c..cdd9cfb13ee9 100644
--- a/arch/ppc/platforms/prpmc750.c
+++ b/arch/ppc/platforms/prpmc750.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/prpmc750_setup.c
3 *
4 * Board setup routines for Motorola PrPMC750 2 * Board setup routines for Motorola PrPMC750
5 * 3 *
6 * Author: Matt Porter <mporter@mvista.com> 4 * Author: Matt Porter <mporter@mvista.com>
diff --git a/arch/ppc/platforms/prpmc800.c b/arch/ppc/platforms/prpmc800.c
index de7baefacd3a..e459a199fb1d 100644
--- a/arch/ppc/platforms/prpmc800.c
+++ b/arch/ppc/platforms/prpmc800.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/prpmc800.c
3 *
4 * Author: Dale Farnsworth <dale.farnsworth@mvista.com> 2 * Author: Dale Farnsworth <dale.farnsworth@mvista.com>
5 * 3 *
6 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under 4 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
diff --git a/arch/ppc/platforms/radstone_ppc7d.c b/arch/ppc/platforms/radstone_ppc7d.c
index 872c0a3ba3c7..bc26b6d71c1d 100644
--- a/arch/ppc/platforms/radstone_ppc7d.c
+++ b/arch/ppc/platforms/radstone_ppc7d.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/radstone_ppc7d.c
3 *
4 * Board setup routines for the Radstone PPC7D boards. 2 * Board setup routines for the Radstone PPC7D boards.
5 * 3 *
6 * Author: James Chapman <jchapman@katalix.com> 4 * Author: James Chapman <jchapman@katalix.com>
@@ -685,11 +683,10 @@ ppc7d_fixup_i2c_pdata(struct platform_device *pdev)
685 683
686 pdata = pdev->dev.platform_data; 684 pdata = pdev->dev.platform_data;
687 if (pdata == NULL) { 685 if (pdata == NULL) {
688 pdata = kmalloc(sizeof(*pdata), GFP_KERNEL); 686 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
689 if (pdata == NULL) 687 if (pdata == NULL)
690 return; 688 return;
691 689
692 memset(pdata, 0, sizeof(*pdata));
693 pdev->dev.platform_data = pdata; 690 pdev->dev.platform_data = pdata;
694 } 691 }
695 692
@@ -712,7 +709,7 @@ ppc7d_fixup_i2c_pdata(struct platform_device *pdev)
712} 709}
713#endif 710#endif
714 711
715static int __init ppc7d_platform_notify(struct device *dev) 712static int ppc7d_platform_notify(struct device *dev)
716{ 713{
717 static struct { 714 static struct {
718 char *bus_id; 715 char *bus_id;
diff --git a/arch/ppc/platforms/radstone_ppc7d.h b/arch/ppc/platforms/radstone_ppc7d.h
index 938375510be4..2bb093a0c03e 100644
--- a/arch/ppc/platforms/radstone_ppc7d.h
+++ b/arch/ppc/platforms/radstone_ppc7d.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/radstone_ppc7d.h
3 *
4 * Board definitions for the Radstone PPC7D boards. 2 * Board definitions for the Radstone PPC7D boards.
5 * 3 *
6 * Author: James Chapman <jchapman@katalix.com> 4 * Author: James Chapman <jchapman@katalix.com>
diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c
index 9eeed3572309..6dc459decb2d 100644
--- a/arch/ppc/platforms/sandpoint.c
+++ b/arch/ppc/platforms/sandpoint.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/sandpoint_setup.c
3 *
4 * Board setup routines for the Motorola SPS Sandpoint Test Platform. 2 * Board setup routines for the Motorola SPS Sandpoint Test Platform.
5 * 3 *
6 * Author: Mark A. Greer 4 * Author: Mark A. Greer
diff --git a/arch/ppc/platforms/sandpoint.h b/arch/ppc/platforms/sandpoint.h
index f4e982cb69df..3b64e6418489 100644
--- a/arch/ppc/platforms/sandpoint.h
+++ b/arch/ppc/platforms/sandpoint.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/sandpoint.h
3 *
4 * Definitions for Motorola SPS Sandpoint Test Platform 2 * Definitions for Motorola SPS Sandpoint Test Platform
5 * 3 *
6 * Author: Mark A. Greer 4 * Author: Mark A. Greer
diff --git a/arch/ppc/platforms/sbc82xx.c b/arch/ppc/platforms/sbc82xx.c
index 74c9ff72c3dd..866807b4ad0b 100644
--- a/arch/ppc/platforms/sbc82xx.c
+++ b/arch/ppc/platforms/sbc82xx.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/sbc82xx.c
3 *
4 * SBC82XX platform support 2 * SBC82XX platform support
5 * 3 *
6 * Author: Guy Streeter <streeter@redhat.com> 4 * Author: Guy Streeter <streeter@redhat.com>
diff --git a/arch/ppc/platforms/spruce.c b/arch/ppc/platforms/spruce.c
index 69e1de7971f2..3783deccd9b2 100644
--- a/arch/ppc/platforms/spruce.c
+++ b/arch/ppc/platforms/spruce.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/spruce.c
3 *
4 * Board and PCI setup routines for IBM Spruce 2 * Board and PCI setup routines for IBM Spruce
5 * 3 *
6 * Author: MontaVista Software <source@mvista.com> 4 * Author: MontaVista Software <source@mvista.com>
diff --git a/arch/ppc/platforms/tqm8260_setup.c b/arch/ppc/platforms/tqm8260_setup.c
index 3409139330b1..b766339f44ac 100644
--- a/arch/ppc/platforms/tqm8260_setup.c
+++ b/arch/ppc/platforms/tqm8260_setup.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/tqm8260_setup.c
3 *
4 * TQM8260 platform support 2 * TQM8260 platform support
5 * 3 *
6 * Author: Allen Curtis <acurtis@onz.com> 4 * Author: Allen Curtis <acurtis@onz.com>
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 159dcd92a6d1..490749ca88f9 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -17,8 +17,8 @@ obj-$(CONFIG_440GX) += ibm440gx_common.o
17obj-$(CONFIG_440SP) += ibm440gx_common.o ibm440sp_common.o 17obj-$(CONFIG_440SP) += ibm440gx_common.o ibm440sp_common.o
18obj-$(CONFIG_440SPE) += ibm440gx_common.o ibm440sp_common.o ppc440spe_pcie.o 18obj-$(CONFIG_440SPE) += ibm440gx_common.o ibm440sp_common.o ppc440spe_pcie.o
19ifeq ($(CONFIG_4xx),y) 19ifeq ($(CONFIG_4xx),y)
20ifeq ($(CONFIG_VIRTEX_II_PRO),y) 20ifeq ($(CONFIG_XILINX_VIRTEX),y)
21obj-$(CONFIG_40x) += xilinx_pic.o 21obj-$(CONFIG_40x) += xilinx_pic.o ppc_sys.o
22else 22else
23ifeq ($(CONFIG_403),y) 23ifeq ($(CONFIG_403),y)
24obj-$(CONFIG_40x) += ppc403_pic.o 24obj-$(CONFIG_40x) += ppc403_pic.o
@@ -38,8 +38,6 @@ endif
38obj-$(CONFIG_8xx) += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y) \ 38obj-$(CONFIG_8xx) += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y) \
39 ppc_sys.o mpc8xx_devices.o mpc8xx_sys.o 39 ppc_sys.o mpc8xx_devices.o mpc8xx_sys.o
40obj-$(CONFIG_PCI_QSPAN) += qspan_pci.o 40obj-$(CONFIG_PCI_QSPAN) += qspan_pci.o
41obj-$(CONFIG_PPC_OF) += prom_init.o prom.o
42obj-$(CONFIG_PPC_CHRP) += open_pic.o
43obj-$(CONFIG_PPC_PREP) += open_pic.o todc_time.o 41obj-$(CONFIG_PPC_PREP) += open_pic.o todc_time.o
44obj-$(CONFIG_BAMBOO) += pci_auto.o todc_time.o 42obj-$(CONFIG_BAMBOO) += pci_auto.o todc_time.o
45obj-$(CONFIG_CPCI690) += todc_time.o pci_auto.o 43obj-$(CONFIG_CPCI690) += todc_time.o pci_auto.o
diff --git a/arch/ppc/syslib/cpc700.h b/arch/ppc/syslib/cpc700.h
index f2c002531019..0a8a5d84390f 100644
--- a/arch/ppc/syslib/cpc700.h
+++ b/arch/ppc/syslib/cpc700.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/cpc700.h
3 *
4 * Header file for IBM CPC700 Host Bridge, et. al. 2 * Header file for IBM CPC700 Host Bridge, et. al.
5 * 3 *
6 * Author: Mark A. Greer 4 * Author: Mark A. Greer
diff --git a/arch/ppc/syslib/cpc700_pic.c b/arch/ppc/syslib/cpc700_pic.c
index 75fe8eb10693..5add0a919ef6 100644
--- a/arch/ppc/syslib/cpc700_pic.c
+++ b/arch/ppc/syslib/cpc700_pic.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/cpc700_pic.c
3 *
4 * Interrupt controller support for IBM Spruce 2 * Interrupt controller support for IBM Spruce
5 * 3 *
6 * Authors: Mark Greer, Matt Porter, and Johnnie Peters 4 * Authors: Mark Greer, Matt Porter, and Johnnie Peters
diff --git a/arch/ppc/syslib/cpc710.h b/arch/ppc/syslib/cpc710.h
index cc0afd804029..5299bf8b5d01 100644
--- a/arch/ppc/syslib/cpc710.h
+++ b/arch/ppc/syslib/cpc710.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/cpc710.h
3 *
4 * Definitions for the IBM CPC710 PCI Host Bridge 2 * Definitions for the IBM CPC710 PCI Host Bridge
5 * 3 *
6 * Author: Matt Porter <mporter@mvista.com> 4 * Author: Matt Porter <mporter@mvista.com>
diff --git a/arch/ppc/syslib/gen550.h b/arch/ppc/syslib/gen550.h
index 039d249e19a8..5254d3cdbca6 100644
--- a/arch/ppc/syslib/gen550.h
+++ b/arch/ppc/syslib/gen550.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/gen550.h
3 *
4 * gen550 prototypes 2 * gen550 prototypes
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/syslib/gen550_dbg.c b/arch/ppc/syslib/gen550_dbg.c
index 9ef0113c83d1..9fcff74bfdd0 100644
--- a/arch/ppc/syslib/gen550_dbg.c
+++ b/arch/ppc/syslib/gen550_dbg.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/gen550_dbg.c
3 *
4 * A library of polled 16550 serial routines. These are intended to 2 * A library of polled 16550 serial routines. These are intended to
5 * be used to support progress messages, xmon, kgdb, etc. on a 3 * be used to support progress messages, xmon, kgdb, etc. on a
6 * variety of platforms. 4 * variety of platforms.
diff --git a/arch/ppc/syslib/gen550_kgdb.c b/arch/ppc/syslib/gen550_kgdb.c
index 7239d5d7ddcd..874078a7664d 100644
--- a/arch/ppc/syslib/gen550_kgdb.c
+++ b/arch/ppc/syslib/gen550_kgdb.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/gen550_kgdb.c
3 *
4 * Generic 16550 kgdb support intended to be useful on a variety 2 * Generic 16550 kgdb support intended to be useful on a variety
5 * of platforms. To enable this support, it is necessary to set 3 * of platforms. To enable this support, it is necessary to set
6 * the CONFIG_GEN550 option. Any virtual mapping of the serial 4 * the CONFIG_GEN550 option. Any virtual mapping of the serial
diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c
index f97b3a9abd1e..dc3bd9ecbbf6 100644
--- a/arch/ppc/syslib/gt64260_pic.c
+++ b/arch/ppc/syslib/gt64260_pic.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/gt64260_pic.c
3 *
4 * Interrupt controller support for Galileo's GT64260. 2 * Interrupt controller support for Galileo's GT64260.
5 * 3 *
6 * Author: Chris Zankel <source@mvista.com> 4 * Author: Chris Zankel <source@mvista.com>
diff --git a/arch/ppc/syslib/harrier.c b/arch/ppc/syslib/harrier.c
index a6b3f8645793..c1583f488325 100644
--- a/arch/ppc/syslib/harrier.c
+++ b/arch/ppc/syslib/harrier.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/harrier.c
3 *
4 * Motorola MCG Harrier northbridge/memory controller support 2 * Motorola MCG Harrier northbridge/memory controller support
5 * 3 *
6 * Author: Dale Farnsworth 4 * Author: Dale Farnsworth
diff --git a/arch/ppc/syslib/hawk_common.c b/arch/ppc/syslib/hawk_common.c
index a9911dc3a82f..c5bf16b0d6a1 100644
--- a/arch/ppc/syslib/hawk_common.c
+++ b/arch/ppc/syslib/hawk_common.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/hawk_common.c
3 *
4 * Common Motorola PowerPlus Platform--really Falcon/Raven or HAWK. 2 * Common Motorola PowerPlus Platform--really Falcon/Raven or HAWK.
5 * 3 *
6 * Author: Mark A. Greer 4 * Author: Mark A. Greer
diff --git a/arch/ppc/syslib/ibm440gp_common.c b/arch/ppc/syslib/ibm440gp_common.c
index 0d6be2d6dd67..fbaae5f6d834 100644
--- a/arch/ppc/syslib/ibm440gp_common.c
+++ b/arch/ppc/syslib/ibm440gp_common.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ibm440gp_common.c
3 *
4 * PPC440GP system library 2 * PPC440GP system library
5 * 3 *
6 * Matt Porter <mporter@mvista.com> 4 * Matt Porter <mporter@mvista.com>
diff --git a/arch/ppc/syslib/ibm440gp_common.h b/arch/ppc/syslib/ibm440gp_common.h
index a054d83cb1ac..f48529f3c23d 100644
--- a/arch/ppc/syslib/ibm440gp_common.h
+++ b/arch/ppc/syslib/ibm440gp_common.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/ibm440gp_common.h
3 *
4 * PPC440GP system library 2 * PPC440GP system library
5 * 3 *
6 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 4 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c
index c36db279b43d..a7dd55f1c63e 100644
--- a/arch/ppc/syslib/ibm440gx_common.c
+++ b/arch/ppc/syslib/ibm440gx_common.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/ibm440gx_common.c
3 *
4 * PPC440GX system library 2 * PPC440GX system library
5 * 3 *
6 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 4 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
diff --git a/arch/ppc/syslib/ibm440gx_common.h b/arch/ppc/syslib/ibm440gx_common.h
index e73aa0411d35..a2ab9fab8e34 100644
--- a/arch/ppc/syslib/ibm440gx_common.h
+++ b/arch/ppc/syslib/ibm440gx_common.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/ibm440gx_common.h
3 *
4 * PPC440GX system library 2 * PPC440GX system library
5 * 3 *
6 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 4 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
diff --git a/arch/ppc/syslib/ibm440sp_common.c b/arch/ppc/syslib/ibm440sp_common.c
index cdafda127d81..293e4138d172 100644
--- a/arch/ppc/syslib/ibm440sp_common.c
+++ b/arch/ppc/syslib/ibm440sp_common.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ibm440sp_common.c
3 *
4 * PPC440SP/PPC440SPe system library 2 * PPC440SP/PPC440SPe system library
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/syslib/ibm440sp_common.h b/arch/ppc/syslib/ibm440sp_common.h
index a21a9906dcc9..8077bf8ed118 100644
--- a/arch/ppc/syslib/ibm440sp_common.h
+++ b/arch/ppc/syslib/ibm440sp_common.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ibm440sp_common.h
3 *
4 * PPC440SP system library 2 * PPC440SP system library
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/syslib/ibm44x_common.c b/arch/ppc/syslib/ibm44x_common.c
index 71db11d22158..14a981a5cea7 100644
--- a/arch/ppc/syslib/ibm44x_common.c
+++ b/arch/ppc/syslib/ibm44x_common.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ibm44x_common.c
3 *
4 * PPC44x system library 2 * PPC44x system library
5 * 3 *
6 * Matt Porter <mporter@kernel.crashing.org> 4 * Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/syslib/ibm44x_common.h b/arch/ppc/syslib/ibm44x_common.h
index b25a8995e4e9..f179db8634e0 100644
--- a/arch/ppc/syslib/ibm44x_common.h
+++ b/arch/ppc/syslib/ibm44x_common.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/ibm44x_common.h
3 *
4 * PPC44x system library 2 * PPC44x system library
5 * 3 *
6 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 4 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
diff --git a/arch/ppc/syslib/m8260_pci_erratum9.c b/arch/ppc/syslib/m8260_pci_erratum9.c
index 1dc7e4e1d491..99e4bc0e42af 100644
--- a/arch/ppc/syslib/m8260_pci_erratum9.c
+++ b/arch/ppc/syslib/m8260_pci_erratum9.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/mpc8260_pci9.c
3 *
4 * Workaround for device erratum PCI 9. 2 * Workaround for device erratum PCI 9.
5 * See Motorola's "XPC826xA Family Device Errata Reference." 3 * See Motorola's "XPC826xA Family Device Errata Reference."
6 * The erratum applies to all 8260 family Hip4 processors. It is scheduled 4 * The erratum applies to all 8260 family Hip4 processors. It is scheduled
diff --git a/arch/ppc/syslib/m8260_setup.c b/arch/ppc/syslib/m8260_setup.c
index 76a2aa4ce65e..b7a6cb2d8d52 100644
--- a/arch/ppc/syslib/m8260_setup.c
+++ b/arch/ppc/syslib/m8260_setup.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/m8260_setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds 2 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas 3 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu) 4 * Modified by Cort Dougan (cort@cs.nmt.edu)
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c
index 688616de3cde..dae9af78bde1 100644
--- a/arch/ppc/syslib/m8xx_setup.c
+++ b/arch/ppc/syslib/m8xx_setup.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds 2 * Copyright (C) 1995 Linus Torvalds
5 * Adapted from 'alpha' version by Gary Thomas 3 * Adapted from 'alpha' version by Gary Thomas
6 * Modified by Cort Dougan (cort@cs.nmt.edu) 4 * Modified by Cort Dougan (cort@cs.nmt.edu)
@@ -34,6 +32,13 @@
34#include <linux/seq_file.h> 32#include <linux/seq_file.h>
35#include <linux/root_dev.h> 33#include <linux/root_dev.h>
36 34
35#if defined(CONFIG_MTD) && defined(CONFIG_MTD_PHYSMAP)
36#include <linux/mtd/partitions.h>
37#include <linux/mtd/physmap.h>
38#include <linux/mtd/mtd.h>
39#include <linux/mtd/map.h>
40#endif
41
37#include <asm/mmu.h> 42#include <asm/mmu.h>
38#include <asm/reg.h> 43#include <asm/reg.h>
39#include <asm/residual.h> 44#include <asm/residual.h>
@@ -49,6 +54,34 @@
49 54
50#include "ppc8xx_pic.h" 55#include "ppc8xx_pic.h"
51 56
57#ifdef CONFIG_MTD_PHYSMAP
58#define MPC8xxADS_BANK_WIDTH 4
59#endif
60
61#define MPC8xxADS_U_BOOT_SIZE 0x80000
62#define MPC8xxADS_FREE_AREA_OFFSET MPC8xxADS_U_BOOT_SIZE
63
64#if defined(CONFIG_MTD_PARTITIONS)
65 /*
66 NOTE: bank width and interleave relative to the installed flash
67 should have been chosen within MTD_CFI_GEOMETRY options.
68 */
69static struct mtd_partition mpc8xxads_partitions[] = {
70 {
71 .name = "bootloader",
72 .size = MPC8xxADS_U_BOOT_SIZE,
73 .offset = 0,
74 .mask_flags = MTD_WRITEABLE, /* force read-only */
75 }, {
76 .name = "User FS",
77 .offset = MPC8xxADS_FREE_AREA_OFFSET
78 }
79};
80
81#define mpc8xxads_part_num (sizeof (mpc8xxads_partitions) / sizeof (mpc8xxads_partitions[0]))
82
83#endif
84
52static int m8xx_set_rtc_time(unsigned long time); 85static int m8xx_set_rtc_time(unsigned long time);
53static unsigned long m8xx_get_rtc_time(void); 86static unsigned long m8xx_get_rtc_time(void);
54void m8xx_calibrate_decr(void); 87void m8xx_calibrate_decr(void);
@@ -71,6 +104,10 @@ board_init(void)
71void __init 104void __init
72m8xx_setup_arch(void) 105m8xx_setup_arch(void)
73{ 106{
107#if defined(CONFIG_MTD) && defined(CONFIG_MTD_PHYSMAP)
108 bd_t *binfo = (bd_t *)__res;
109#endif
110
74 /* Reset the Communication Processor Module. 111 /* Reset the Communication Processor Module.
75 */ 112 */
76 m8xx_cpm_reset(); 113 m8xx_cpm_reset();
@@ -106,6 +143,17 @@ m8xx_setup_arch(void)
106 } 143 }
107#endif 144#endif
108#endif 145#endif
146
147#if defined (CONFIG_MPC86XADS) || defined (CONFIG_MPC885ADS)
148#if defined(CONFIG_MTD_PHYSMAP)
149 physmap_configure(binfo->bi_flashstart, binfo->bi_flashsize,
150 MPC8xxADS_BANK_WIDTH, NULL);
151#ifdef CONFIG_MTD_PARTITIONS
152 physmap_set_partitions(mpc8xxads_partitions, mpc8xxads_part_num);
153#endif /* CONFIG_MTD_PARTITIONS */
154#endif /* CONFIG_MTD_PHYSMAP */
155#endif
156
109 board_init(); 157 board_init();
110} 158}
111 159
@@ -140,9 +188,11 @@ void __init __attribute__ ((weak))
140init_internal_rtc(void) 188init_internal_rtc(void)
141{ 189{
142 /* Disable the RTC one second and alarm interrupts. */ 190 /* Disable the RTC one second and alarm interrupts. */
143 out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE)); 191 clrbits16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));
192
144 /* Enable the RTC */ 193 /* Enable the RTC */
145 out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE)); 194 setbits16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, (RTCSC_RTF | RTCSC_RTE));
195
146} 196}
147 197
148/* The decrementer counts at the system (internal) clock frequency divided by 198/* The decrementer counts at the system (internal) clock frequency divided by
@@ -159,8 +209,7 @@ void __init m8xx_calibrate_decr(void)
159 out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, KAPWR_KEY); 209 out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, KAPWR_KEY);
160 210
161 /* Force all 8xx processors to use divide by 16 processor clock. */ 211 /* Force all 8xx processors to use divide by 16 processor clock. */
162 out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr, 212 setbits32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr, 0x02000000);
163 in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr)|0x02000000);
164 /* Processor frequency is MHz. 213 /* Processor frequency is MHz.
165 * The value 'fp' is the number of decrementer ticks per second. 214 * The value 'fp' is the number of decrementer ticks per second.
166 */ 215 */
@@ -239,8 +288,8 @@ m8xx_restart(char *cmd)
239 __volatile__ unsigned char dummy; 288 __volatile__ unsigned char dummy;
240 289
241 local_irq_disable(); 290 local_irq_disable();
242 out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr) | 0x00000080);
243 291
292 setbits32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, 0x00000080);
244 /* Clear the ME bit in MSR to cause checkstop on machine check 293 /* Clear the ME bit in MSR to cause checkstop on machine check
245 */ 294 */
246 mtmsr(mfmsr() & ~0x1000); 295 mtmsr(mfmsr() & ~0x1000);
@@ -310,8 +359,8 @@ m8xx_init_IRQ(void)
310 i8259_init(0); 359 i8259_init(0);
311 360
312 /* The i8259 cascade interrupt must be level sensitive. */ 361 /* The i8259 cascade interrupt must be level sensitive. */
313 out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel & ~(0x80000000 >> ISA_BRIDGE_INT)));
314 362
363 clrbits32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, (0x80000000 >> ISA_BRIDGE_INT));
315 if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction)) 364 if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction))
316 enable_irq(ISA_BRIDGE_INT); 365 enable_irq(ISA_BRIDGE_INT);
317#endif /* CONFIG_PCI */ 366#endif /* CONFIG_PCI */
diff --git a/arch/ppc/syslib/m8xx_wdt.c b/arch/ppc/syslib/m8xx_wdt.c
index df6c9557b86a..ac11d7bab443 100644
--- a/arch/ppc/syslib/m8xx_wdt.c
+++ b/arch/ppc/syslib/m8xx_wdt.c
@@ -41,8 +41,7 @@ static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs)
41 41
42 m8xx_wdt_reset(); 42 m8xx_wdt_reset();
43 43
44 out_be16(&imap->im_sit.sit_piscr, in_be16(&imap->im_sit.sit_piscr) | PISCR_PS); /* clear irq */ 44 setbits16(&imap->im_sit.sit_piscr, PISCR_PS);
45
46 return IRQ_HANDLED; 45 return IRQ_HANDLED;
47} 46}
48 47
diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c
index 3e039706bdbc..2fc7c4150a18 100644
--- a/arch/ppc/syslib/mpc10x_common.c
+++ b/arch/ppc/syslib/mpc10x_common.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mpc10x_common.c
3 *
4 * Common routines for the Motorola SPS MPC106, MPC107 and MPC8240 Host bridge, 2 * Common routines for the Motorola SPS MPC106, MPC107 and MPC8240 Host bridge,
5 * Mem ctlr, EPIC, etc. 3 * Mem ctlr, EPIC, etc.
6 * 4 *
diff --git a/arch/ppc/syslib/mpc52xx_devices.c b/arch/ppc/syslib/mpc52xx_devices.c
index da3c74bfdc92..7487539a4e92 100644
--- a/arch/ppc/syslib/mpc52xx_devices.c
+++ b/arch/ppc/syslib/mpc52xx_devices.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mpc52xx_devices.c
3 *
4 * Freescale MPC52xx device descriptions 2 * Freescale MPC52xx device descriptions
5 * 3 *
6 * 4 *
diff --git a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c
index 313c96ec7eb1..5a5a7a9cd248 100644
--- a/arch/ppc/syslib/mpc52xx_pci.c
+++ b/arch/ppc/syslib/mpc52xx_pci.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mpc52xx_pci.c
3 *
4 * PCI code for the Freescale MPC52xx embedded CPU. 2 * PCI code for the Freescale MPC52xx embedded CPU.
5 * 3 *
6 * 4 *
@@ -227,7 +225,8 @@ mpc52xx_pci_fixup_resources(struct pci_dev *dev)
227 /* The PCI Host bridge of MPC52xx has a prefetch memory resource 225 /* The PCI Host bridge of MPC52xx has a prefetch memory resource
228 fixed to 1Gb. Doesn't fit in the resource system so we remove it */ 226 fixed to 1Gb. Doesn't fit in the resource system so we remove it */
229 if ( (dev->vendor == PCI_VENDOR_ID_MOTOROLA) && 227 if ( (dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
230 (dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200) ) { 228 ( dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200
229 || dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200B) ) {
231 struct resource *res = &dev->resource[1]; 230 struct resource *res = &dev->resource[1];
232 res->start = res->end = res->flags = 0; 231 res->start = res->end = res->flags = 0;
233 } 232 }
diff --git a/arch/ppc/syslib/mpc52xx_pci.h b/arch/ppc/syslib/mpc52xx_pci.h
index 04b509a02530..77d47dbba85e 100644
--- a/arch/ppc/syslib/mpc52xx_pci.h
+++ b/arch/ppc/syslib/mpc52xx_pci.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mpc52xx_pci.h
3 *
4 * PCI Include file the Freescale MPC52xx embedded cpu chips 2 * PCI Include file the Freescale MPC52xx embedded cpu chips
5 * 3 *
6 * 4 *
diff --git a/arch/ppc/syslib/mpc52xx_pic.c b/arch/ppc/syslib/mpc52xx_pic.c
index 4c4497e62517..c4406f9dc6a3 100644
--- a/arch/ppc/syslib/mpc52xx_pic.c
+++ b/arch/ppc/syslib/mpc52xx_pic.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mpc52xx_pic.c
3 *
4 * Programmable Interrupt Controller functions for the Freescale MPC52xx 2 * Programmable Interrupt Controller functions for the Freescale MPC52xx
5 * embedded CPU. 3 * embedded CPU.
6 * 4 *
diff --git a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c
index a4a4b02227df..ee6379bb415e 100644
--- a/arch/ppc/syslib/mpc52xx_setup.c
+++ b/arch/ppc/syslib/mpc52xx_setup.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mpc52xx_setup.c
3 *
4 * Common code for the boards based on Freescale MPC52xx embedded CPU. 2 * Common code for the boards based on Freescale MPC52xx embedded CPU.
5 * 3 *
6 * 4 *
@@ -26,6 +24,8 @@
26#include <asm/pgtable.h> 24#include <asm/pgtable.h>
27#include <asm/ppcboot.h> 25#include <asm/ppcboot.h>
28 26
27#include <syslib/mpc52xx_pci.h>
28
29extern bd_t __res; 29extern bd_t __res;
30 30
31static int core_mult[] = { /* CPU Frequency multiplier, taken */ 31static int core_mult[] = { /* CPU Frequency multiplier, taken */
@@ -218,6 +218,52 @@ mpc52xx_calibrate_decr(void)
218 tb_to_us = mulhwu_scale_factor(xlbfreq / divisor, 1000000); 218 tb_to_us = mulhwu_scale_factor(xlbfreq / divisor, 1000000);
219} 219}
220 220
221
222void __init
223mpc52xx_setup_cpu(void)
224{
225 struct mpc52xx_cdm __iomem *cdm;
226 struct mpc52xx_xlb __iomem *xlb;
227
228 /* Map zones */
229 cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
230 xlb = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE);
231
232 if (!cdm || !xlb) {
233 printk(KERN_ERR __FILE__ ": "
234 "Error while mapping CDM/XLB during "
235 "mpc52xx_setup_cpu\n");
236 goto unmap_regs;
237 }
238
239 /* Use internal 48 Mhz */
240 out_8(&cdm->ext_48mhz_en, 0x00);
241 out_8(&cdm->fd_enable, 0x01);
242 if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */
243 out_be16(&cdm->fd_counters, 0x0001);
244 else
245 out_be16(&cdm->fd_counters, 0x5555);
246
247 /* Configure the XLB Arbiter priorities */
248 out_be32(&xlb->master_pri_enable, 0xff);
249 out_be32(&xlb->master_priority, 0x11111111);
250
251 /* Enable ram snooping for 1GB window */
252 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
253 out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
254
255 /* Disable XLB pipelining */
256 /* (cfr errate 292. We could do this only just before ATA PIO
257 transaction and re-enable it after ...) */
258 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
259
260 /* Unmap reg zone */
261unmap_regs:
262 if (cdm) iounmap(cdm);
263 if (xlb) iounmap(xlb);
264}
265
266
221int mpc52xx_match_psc_function(int psc_idx, const char *func) 267int mpc52xx_match_psc_function(int psc_idx, const char *func)
222{ 268{
223 struct mpc52xx_psc_func *cf = mpc52xx_psc_functions; 269 struct mpc52xx_psc_func *cf = mpc52xx_psc_functions;
diff --git a/arch/ppc/syslib/mpc52xx_sys.c b/arch/ppc/syslib/mpc52xx_sys.c
index 9a0f90aa8aac..b4e6f978f057 100644
--- a/arch/ppc/syslib/mpc52xx_sys.c
+++ b/arch/ppc/syslib/mpc52xx_sys.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mpc52xx_sys.c
3 *
4 * Freescale MPC52xx system descriptions 2 * Freescale MPC52xx system descriptions
5 * 3 *
6 * 4 *
diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c
index f9b95de70e23..1af2c000fcfa 100644
--- a/arch/ppc/syslib/mpc83xx_devices.c
+++ b/arch/ppc/syslib/mpc83xx_devices.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/83xx/mpc83xx_devices.c
3 *
4 * MPC83xx Device descriptions 2 * MPC83xx Device descriptions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/mpc83xx_sys.c b/arch/ppc/syslib/mpc83xx_sys.c
index 82cf3ab77f4a..0498ae7e01e3 100644
--- a/arch/ppc/syslib/mpc83xx_sys.c
+++ b/arch/ppc/syslib/mpc83xx_sys.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/83xx/mpc83xx_sys.c
3 *
4 * MPC83xx System descriptions 2 * MPC83xx System descriptions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c
index 00e9b6ff2f6e..7735336f5b8f 100644
--- a/arch/ppc/syslib/mpc85xx_devices.c
+++ b/arch/ppc/syslib/mpc85xx_devices.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc85xx_devices.c
3 *
4 * MPC85xx Device descriptions 2 * MPC85xx Device descriptions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/mpc85xx_sys.c b/arch/ppc/syslib/mpc85xx_sys.c
index 397cfbcce5ea..d96a93dbcb5a 100644
--- a/arch/ppc/syslib/mpc85xx_sys.c
+++ b/arch/ppc/syslib/mpc85xx_sys.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/85xx/mpc85xx_sys.c
3 *
4 * MPC85xx System descriptions 2 * MPC85xx System descriptions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c
index 92dc98b36bde..bd41ed83beb3 100644
--- a/arch/ppc/syslib/mpc8xx_devices.c
+++ b/arch/ppc/syslib/mpc8xx_devices.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mpc8xx_devices.c
3 *
4 * MPC8xx Device descriptions 2 * MPC8xx Device descriptions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/mpc8xx_sys.c b/arch/ppc/syslib/mpc8xx_sys.c
index d3c617521603..eee213284855 100644
--- a/arch/ppc/syslib/mpc8xx_sys.c
+++ b/arch/ppc/syslib/mpc8xx_sys.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/platforms/mpc8xx_sys.c
3 *
4 * MPC8xx System descriptions 2 * MPC8xx System descriptions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c
index 58b0aa813e85..5a19697060f0 100644
--- a/arch/ppc/syslib/mv64360_pic.c
+++ b/arch/ppc/syslib/mv64360_pic.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/mv64360_pic.c
3 *
4 * Interrupt controller support for Marvell's MV64360. 2 * Interrupt controller support for Marvell's MV64360.
5 * 3 *
6 * Author: Rabeeh Khoury <rabeeh@galileo.co.il> 4 * Author: Rabeeh Khoury <rabeeh@galileo.co.il>
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index 1f01b7e2376b..3b039c30a439 100644
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mv64x60.c
3 *
4 * Common routines for the Marvell/Galileo Discovery line of host bridges 2 * Common routines for the Marvell/Galileo Discovery line of host bridges
5 * (gt64260, mv64360, mv64460, ...). 3 * (gt64260, mv64360, mv64460, ...).
6 * 4 *
diff --git a/arch/ppc/syslib/mv64x60_dbg.c b/arch/ppc/syslib/mv64x60_dbg.c
index fa5b2e45e0ca..9cf18764a1a1 100644
--- a/arch/ppc/syslib/mv64x60_dbg.c
+++ b/arch/ppc/syslib/mv64x60_dbg.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mv64x60_dbg.c
3 *
4 * KGDB and progress routines for the Marvell/Galileo MV64x60 (Discovery). 2 * KGDB and progress routines for the Marvell/Galileo MV64x60 (Discovery).
5 * 3 *
6 * Author: Mark A. Greer <mgreer@mvista.com> 4 * Author: Mark A. Greer <mgreer@mvista.com>
diff --git a/arch/ppc/syslib/mv64x60_win.c b/arch/ppc/syslib/mv64x60_win.c
index 5b827e2bbe22..4bf1ad17bf1a 100644
--- a/arch/ppc/syslib/mv64x60_win.c
+++ b/arch/ppc/syslib/mv64x60_win.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/mv64x60_win.c
3 *
4 * Tables with info on how to manipulate the 32 & 64 bit windows on the 2 * Tables with info on how to manipulate the 32 & 64 bit windows on the
5 * various types of Marvell bridge chips. 3 * various types of Marvell bridge chips.
6 * 4 *
diff --git a/arch/ppc/syslib/ocp.c b/arch/ppc/syslib/ocp.c
index 2fe28ded2c60..a4ecc2ee579f 100644
--- a/arch/ppc/syslib/ocp.c
+++ b/arch/ppc/syslib/ocp.c
@@ -451,10 +451,9 @@ ocp_driver_init(void)
451 DBG(("ocp: ocp_driver_init()...\n")); 451 DBG(("ocp: ocp_driver_init()...\n"));
452 452
453 /* Allocate/register primary OCP bus */ 453 /* Allocate/register primary OCP bus */
454 ocp_bus = kmalloc(sizeof(struct device), GFP_KERNEL); 454 ocp_bus = kzalloc(sizeof(struct device), GFP_KERNEL);
455 if (ocp_bus == NULL) 455 if (ocp_bus == NULL)
456 return 1; 456 return 1;
457 memset(ocp_bus, 0, sizeof(struct device));
458 strcpy(ocp_bus->bus_id, "ocp"); 457 strcpy(ocp_bus->bus_id, "ocp");
459 458
460 bus_register(&ocp_bus_type); 459 bus_register(&ocp_bus_type);
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index 894779712b46..70456c8f998c 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/open_pic.c -- OpenPIC Interrupt Handling
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven 2 * Copyright (C) 1997 Geert Uytterhoeven
5 * 3 *
6 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
@@ -218,7 +216,7 @@ static void openpic_safe_writefield(volatile u_int __iomem *addr, u_int mask,
218u_int openpic_read_IPI(volatile u_int __iomem * addr) 216u_int openpic_read_IPI(volatile u_int __iomem * addr)
219{ 217{
220 u_int val = 0; 218 u_int val = 0;
221#if defined(OPENPIC_BIG_ENDIAN) || defined(CONFIG_POWER3) 219#if defined(OPENPIC_BIG_ENDIAN)
222 val = in_be32(addr); 220 val = in_be32(addr);
223#else 221#else
224 val = in_le32(addr); 222 val = in_le32(addr);
diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c
index 1c40049b9a45..bcbe40de26fe 100644
--- a/arch/ppc/syslib/open_pic2.c
+++ b/arch/ppc/syslib/open_pic2.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/open_pic.c -- OpenPIC Interrupt Handling
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven 2 * Copyright (C) 1997 Geert Uytterhoeven
5 * 3 *
6 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
diff --git a/arch/ppc/syslib/open_pic_defs.h b/arch/ppc/syslib/open_pic_defs.h
index 6c94e7131463..3a25de7cb572 100644
--- a/arch/ppc/syslib/open_pic_defs.h
+++ b/arch/ppc/syslib/open_pic_defs.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/open_pic_defs.h -- OpenPIC definitions
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven 2 * Copyright (C) 1997 Geert Uytterhoeven
5 * 3 *
6 * This file is based on the following documentation: 4 * This file is based on the following documentation:
diff --git a/arch/ppc/syslib/pci_auto.c b/arch/ppc/syslib/pci_auto.c
index d64207c2a972..ee20a86fcc4b 100644
--- a/arch/ppc/syslib/pci_auto.c
+++ b/arch/ppc/syslib/pci_auto.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/pci_auto.c
3 *
4 * PCI autoconfiguration library 2 * PCI autoconfiguration library
5 * 3 *
6 * Author: Matt Porter <mporter@mvista.com> 4 * Author: Matt Porter <mporter@mvista.com>
diff --git a/arch/ppc/syslib/ppc4xx_dma.c b/arch/ppc/syslib/ppc4xx_dma.c
index 05ccd598dd4e..b40b96a8c609 100644
--- a/arch/ppc/syslib/ppc4xx_dma.c
+++ b/arch/ppc/syslib/ppc4xx_dma.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/ppc4xx_dma.c
3 *
4 * IBM PPC4xx DMA engine core library 2 * IBM PPC4xx DMA engine core library
5 * 3 *
6 * Copyright 2000-2004 MontaVista Software Inc. 4 * Copyright 2000-2004 MontaVista Software Inc.
diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c
index aa4165144ec2..fd9af0fc0e9f 100644
--- a/arch/ppc/syslib/ppc4xx_pic.c
+++ b/arch/ppc/syslib/ppc4xx_pic.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ppc4xx_pic.c
3 *
4 * Interrupt controller driver for PowerPC 4xx-based processors. 2 * Interrupt controller driver for PowerPC 4xx-based processors.
5 * 3 *
6 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 4 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
diff --git a/arch/ppc/syslib/ppc4xx_pm.c b/arch/ppc/syslib/ppc4xx_pm.c
deleted file mode 100644
index 60a479204885..000000000000
--- a/arch/ppc/syslib/ppc4xx_pm.c
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * Author: Armin Kuster <akuster@mvista.com>
3 *
4 * 2002 (c) MontaVista, Software, Inc. This file is licensed under
5 * the terms of the GNU General Public License version 2. This program
6 * is licensed "as is" without any warranty of any kind, whether express
7 * or implied.
8 *
9 * This an attempt to get Power Management going for the IBM 4xx processor.
10 * This was derived from the ppc4xx._setup.c file
11 */
12
13#include <linux/config.h>
14#include <linux/init.h>
15
16#include <asm/ibm4xx.h>
17
18void __init
19ppc4xx_pm_init(void)
20{
21
22 unsigned int value = 0;
23
24 /* turn off unused hardware to save power */
25#ifdef CONFIG_405GP
26 value |= CPM_DCP; /* CodePack */
27#endif
28
29#if !defined(CONFIG_IBM_OCP_GPIO)
30 value |= CPM_GPIO0;
31#endif
32
33#if !defined(CONFIG_PPC405_I2C_ADAP)
34 value |= CPM_IIC0;
35#ifdef CONFIG_STB03xxx
36 value |= CPM_IIC1;
37#endif
38#endif
39
40
41#if !defined(CONFIG_405_DMA)
42 value |= CPM_DMA;
43#endif
44
45 mtdcr(DCRN_CPMFR, value);
46
47}
diff --git a/arch/ppc/syslib/ppc4xx_sgdma.c b/arch/ppc/syslib/ppc4xx_sgdma.c
index 9f76e8ee39ed..280ea010a9c8 100644
--- a/arch/ppc/syslib/ppc4xx_sgdma.c
+++ b/arch/ppc/syslib/ppc4xx_sgdma.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/ppc4xx_sgdma.c
3 *
4 * IBM PPC4xx DMA engine scatter/gather library 2 * IBM PPC4xx DMA engine scatter/gather library
5 * 3 *
6 * Copyright 2002-2003 MontaVista Software Inc. 4 * Copyright 2002-2003 MontaVista Software Inc.
diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c
index 7bada82527a8..26afd637dc81 100644
--- a/arch/ppc/syslib/ppc83xx_setup.c
+++ b/arch/ppc/syslib/ppc83xx_setup.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ppc83xx_setup.c
3 *
4 * MPC83XX common board code 2 * MPC83XX common board code
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/ppc83xx_setup.h b/arch/ppc/syslib/ppc83xx_setup.h
index a122a7322e5e..478b011cd963 100644
--- a/arch/ppc/syslib/ppc83xx_setup.h
+++ b/arch/ppc/syslib/ppc83xx_setup.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ppc83xx_setup.h
3 *
4 * MPC83XX common board definitions 2 * MPC83XX common board definitions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/ppc85xx_common.c b/arch/ppc/syslib/ppc85xx_common.c
index 19ad537225e4..0145c968f9ad 100644
--- a/arch/ppc/syslib/ppc85xx_common.c
+++ b/arch/ppc/syslib/ppc85xx_common.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ppc85xx_common.c
3 *
4 * MPC85xx support routines 2 * MPC85xx support routines
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/ppc85xx_common.h b/arch/ppc/syslib/ppc85xx_common.h
index 94edf32151dd..182744a1321c 100644
--- a/arch/ppc/syslib/ppc85xx_common.h
+++ b/arch/ppc/syslib/ppc85xx_common.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ppc85xx_common.h
3 *
4 * MPC85xx support routines 2 * MPC85xx support routines
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c
index e4dda43fdaa7..79b7089d7500 100644
--- a/arch/ppc/syslib/ppc85xx_setup.c
+++ b/arch/ppc/syslib/ppc85xx_setup.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ppc85xx_setup.c
3 *
4 * MPC85XX common board code 2 * MPC85XX common board code
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
@@ -237,7 +235,7 @@ mpc85xx_setup_pci2(struct pci_controller *hose)
237 (__ilog2(MPC85XX_PCI2_UPPER_MEM - MPC85XX_PCI2_LOWER_MEM + 1) - 1); 235 (__ilog2(MPC85XX_PCI2_UPPER_MEM - MPC85XX_PCI2_LOWER_MEM + 1) - 1);
238 236
239 /* Setup outbound IO windows @ MPC85XX_PCI2_IO_BASE */ 237 /* Setup outbound IO windows @ MPC85XX_PCI2_IO_BASE */
240 pci->potar2 = (MPC85XX_PCI2_LOWER_IO >> 12) & 0x000fffff;; 238 pci->potar2 = (MPC85XX_PCI2_LOWER_IO >> 12) & 0x000fffff;
241 pci->potear2 = 0x00000000; 239 pci->potear2 = 0x00000000;
242 pci->powbar2 = (MPC85XX_PCI2_IO_BASE >> 12) & 0x000fffff; 240 pci->powbar2 = (MPC85XX_PCI2_IO_BASE >> 12) & 0x000fffff;
243 /* Enable, IO R/W */ 241 /* Enable, IO R/W */
diff --git a/arch/ppc/syslib/ppc85xx_setup.h b/arch/ppc/syslib/ppc85xx_setup.h
index e340b0545fb5..f55b8032d3d9 100644
--- a/arch/ppc/syslib/ppc85xx_setup.h
+++ b/arch/ppc/syslib/ppc85xx_setup.h
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ppc85xx_setup.h
3 *
4 * MPC85XX common board definitions 2 * MPC85XX common board definitions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
index c0b93c4191ee..60c724e11584 100644
--- a/arch/ppc/syslib/ppc_sys.c
+++ b/arch/ppc/syslib/ppc_sys.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/ppc_sys.c
3 *
4 * PPC System library functions 2 * PPC System library functions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
@@ -15,11 +13,22 @@
15 */ 13 */
16 14
17#include <linux/string.h> 15#include <linux/string.h>
16#include <linux/bootmem.h>
18#include <asm/ppc_sys.h> 17#include <asm/ppc_sys.h>
19 18
20int (*ppc_sys_device_fixup) (struct platform_device * pdev); 19int (*ppc_sys_device_fixup) (struct platform_device * pdev);
21 20
22static int ppc_sys_inited; 21static int ppc_sys_inited;
22static int ppc_sys_func_inited;
23
24static const char *ppc_sys_func_names[] = {
25 [PPC_SYS_FUNC_DUMMY] = "dummy",
26 [PPC_SYS_FUNC_ETH] = "eth",
27 [PPC_SYS_FUNC_UART] = "uart",
28 [PPC_SYS_FUNC_HLDC] = "hldc",
29 [PPC_SYS_FUNC_USB] = "usb",
30 [PPC_SYS_FUNC_IRDA] = "irda",
31};
23 32
24void __init identify_ppc_sys_by_id(u32 id) 33void __init identify_ppc_sys_by_id(u32 id)
25{ 34{
@@ -38,13 +47,13 @@ void __init identify_ppc_sys_by_id(u32 id)
38void __init identify_ppc_sys_by_name(char *name) 47void __init identify_ppc_sys_by_name(char *name)
39{ 48{
40 unsigned int i = 0; 49 unsigned int i = 0;
41 while (ppc_sys_specs[i].ppc_sys_name[0]) 50 while (ppc_sys_specs[i].ppc_sys_name[0]) {
42 {
43 if (!strcmp(ppc_sys_specs[i].ppc_sys_name, name)) 51 if (!strcmp(ppc_sys_specs[i].ppc_sys_name, name))
44 break; 52 break;
45 i++; 53 i++;
46 } 54 }
47 cur_ppc_sys_spec = &ppc_sys_specs[i]; 55 cur_ppc_sys_spec = &ppc_sys_specs[i];
56
48 return; 57 return;
49} 58}
50 59
@@ -128,6 +137,165 @@ void ppc_sys_device_remove(enum ppc_sys_devices dev)
128 } 137 }
129} 138}
130 139
140/* Platform-notify mapping
141 * Helper function for BSP code to assign board-specific platfom-divice bits
142 */
143
144void platform_notify_map(const struct platform_notify_dev_map *map,
145 struct device *dev)
146{
147 struct platform_device *pdev;
148 int len, idx;
149 const char *s;
150
151 /* do nothing if no device or no bus_id */
152 if (!dev || !dev->bus_id)
153 return;
154
155 /* call per device map */
156 while (map->bus_id != NULL) {
157 idx = -1;
158 s = strrchr(dev->bus_id, '.');
159 if (s != NULL)
160 idx = (int)simple_strtol(s + 1, NULL, 10);
161 else
162 s = dev->bus_id;
163
164 len = s - dev->bus_id;
165
166 if (!strncmp(dev->bus_id, map->bus_id, len)) {
167 pdev = container_of(dev, struct platform_device, dev);
168 map->rtn(pdev, idx);
169 }
170 map++;
171 }
172}
173
174/*
175 Function assignment stuff.
176 Intended to work as follows:
177 the device name defined in foo_devices.c will be concatenated with :"func",
178 where func is string map of respective function from platfom_device_func enum
179
180 The PPC_SYS_FUNC_DUMMY function is intended to remove all assignments, making the device to appear
181 in platform bus with unmodified name.
182 */
183
184/*
185 Here we'll replace .name pointers with fixed-lenght strings
186 Hereby, this should be called *before* any func stuff triggeded.
187 */
188void ppc_sys_device_initfunc(void)
189{
190 int i;
191 const char *name;
192 static char new_names[NUM_PPC_SYS_DEVS][BUS_ID_SIZE];
193 enum ppc_sys_devices cur_dev;
194
195 /* If inited yet, do nothing */
196 if (ppc_sys_func_inited)
197 return;
198
199 for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
200 if ((cur_dev = cur_ppc_sys_spec->device_list[i]) < 0)
201 continue;
202
203 if (ppc_sys_platform_devices[cur_dev].name) {
204 /*backup name */
205 name = ppc_sys_platform_devices[cur_dev].name;
206 strlcpy(new_names[i], name, BUS_ID_SIZE);
207 ppc_sys_platform_devices[cur_dev].name = new_names[i];
208 }
209 }
210
211 ppc_sys_func_inited = 1;
212}
213
214/*The "engine" of the func stuff. Here we either concat specified function string description
215 to the name, or remove it if PPC_SYS_FUNC_DUMMY parameter is passed here*/
216void ppc_sys_device_setfunc(enum ppc_sys_devices dev,
217 enum platform_device_func func)
218{
219 char *s;
220 char *name = (char *)ppc_sys_platform_devices[dev].name;
221 char tmp[BUS_ID_SIZE];
222
223 if (!ppc_sys_func_inited) {
224 printk(KERN_ERR "Unable to alter function - not inited!\n");
225 return;
226 }
227
228 if (ppc_sys_inited) {
229 platform_device_unregister(&ppc_sys_platform_devices[dev]);
230 }
231
232 if ((s = (char *)strchr(name, ':')) != NULL) { /* reassign */
233 /* Either change the name after ':' or remove func modifications */
234 if (func != PPC_SYS_FUNC_DUMMY)
235 strlcpy(s + 1, ppc_sys_func_names[func], BUS_ID_SIZE);
236 else
237 *s = 0;
238 } else if (func != PPC_SYS_FUNC_DUMMY) {
239 /* do assignment if it is not just "clear" request */
240 sprintf(tmp, "%s:%s", name, ppc_sys_func_names[func]);
241 strlcpy(name, tmp, BUS_ID_SIZE);
242 }
243
244 if (ppc_sys_inited) {
245 platform_device_register(&ppc_sys_platform_devices[dev]);
246 }
247}
248
249void ppc_sys_device_disable(enum ppc_sys_devices dev)
250{
251 BUG_ON(cur_ppc_sys_spec == NULL);
252
253 /*Check if it is enabled*/
254 if(!(cur_ppc_sys_spec->config[dev] & PPC_SYS_CONFIG_DISABLED)) {
255 if (ppc_sys_inited) {
256 platform_device_unregister(&ppc_sys_platform_devices[dev]);
257 }
258 cur_ppc_sys_spec->config[dev] |= PPC_SYS_CONFIG_DISABLED;
259 }
260}
261
262void ppc_sys_device_enable(enum ppc_sys_devices dev)
263{
264 BUG_ON(cur_ppc_sys_spec == NULL);
265
266 /*Check if it is disabled*/
267 if(cur_ppc_sys_spec->config[dev] & PPC_SYS_CONFIG_DISABLED) {
268 if (ppc_sys_inited) {
269 platform_device_register(&ppc_sys_platform_devices[dev]);
270 }
271 cur_ppc_sys_spec->config[dev] &= ~PPC_SYS_CONFIG_DISABLED;
272 }
273
274}
275
276void ppc_sys_device_enable_all(void)
277{
278 enum ppc_sys_devices cur_dev;
279 int i;
280
281 for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
282 cur_dev = cur_ppc_sys_spec->device_list[i];
283 ppc_sys_device_enable(cur_dev);
284 }
285}
286
287void ppc_sys_device_disable_all(void)
288{
289 enum ppc_sys_devices cur_dev;
290 int i;
291
292 for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
293 cur_dev = cur_ppc_sys_spec->device_list[i];
294 ppc_sys_device_disable(cur_dev);
295 }
296}
297
298
131static int __init ppc_sys_init(void) 299static int __init ppc_sys_init(void)
132{ 300{
133 unsigned int i, dev_id, ret = 0; 301 unsigned int i, dev_id, ret = 0;
@@ -136,7 +304,8 @@ static int __init ppc_sys_init(void)
136 304
137 for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) { 305 for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
138 dev_id = cur_ppc_sys_spec->device_list[i]; 306 dev_id = cur_ppc_sys_spec->device_list[i];
139 if (dev_id != -1) { 307 if ((dev_id != -1) &&
308 !(cur_ppc_sys_spec->config[dev_id] & PPC_SYS_CONFIG_DISABLED)) {
140 if (ppc_sys_device_fixup != NULL) 309 if (ppc_sys_device_fixup != NULL)
141 ppc_sys_device_fixup(&ppc_sys_platform_devices 310 ppc_sys_device_fixup(&ppc_sys_platform_devices
142 [dev_id]); 311 [dev_id]);
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c
index 6ff3aab82fc3..0636aed7b827 100644
--- a/arch/ppc/syslib/pq2_devices.c
+++ b/arch/ppc/syslib/pq2_devices.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/pq2_devices.c
3 *
4 * PQ2 Device descriptions 2 * PQ2 Device descriptions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c
index 36d6e2179940..75e64f1c144d 100644
--- a/arch/ppc/syslib/pq2_sys.c
+++ b/arch/ppc/syslib/pq2_sys.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/pq2_devices.c
3 *
4 * PQ2 System descriptions 2 * PQ2 System descriptions
5 * 3 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org> 4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
diff --git a/arch/ppc/syslib/prep_nvram.c b/arch/ppc/syslib/prep_nvram.c
index 2c6364d9641f..474dccbc4a8a 100644
--- a/arch/ppc/syslib/prep_nvram.c
+++ b/arch/ppc/syslib/prep_nvram.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/kernel/prep_nvram.c
3 *
4 * Copyright (C) 1998 Corey Minyard 2 * Copyright (C) 1998 Corey Minyard
5 * 3 *
6 * This reads the NvRAM on PReP compliant machines (generally from IBM or 4 * This reads the NvRAM on PReP compliant machines (generally from IBM or
diff --git a/arch/ppc/syslib/prom.c b/arch/ppc/syslib/prom.c
deleted file mode 100644
index 482f837fd373..000000000000
--- a/arch/ppc/syslib/prom.c
+++ /dev/null
@@ -1,1429 +0,0 @@
1/*
2 * Procedures for interfacing to the Open Firmware PROM on
3 * Power Macintosh computers.
4 *
5 * In particular, we are interested in the device tree
6 * and in using some of its services (exit, write to stdout).
7 *
8 * Paul Mackerras August 1996.
9 * Copyright (C) 1996 Paul Mackerras.
10 */
11#include <stdarg.h>
12#include <linux/config.h>
13#include <linux/kernel.h>
14#include <linux/string.h>
15#include <linux/init.h>
16#include <linux/threads.h>
17#include <linux/spinlock.h>
18#include <linux/ioport.h>
19#include <linux/pci.h>
20#include <linux/slab.h>
21#include <linux/bitops.h>
22
23#include <asm/sections.h>
24#include <asm/prom.h>
25#include <asm/page.h>
26#include <asm/processor.h>
27#include <asm/irq.h>
28#include <asm/io.h>
29#include <asm/smp.h>
30#include <asm/bootx.h>
31#include <asm/system.h>
32#include <asm/mmu.h>
33#include <asm/pgtable.h>
34#include <asm/bootinfo.h>
35#include <asm/btext.h>
36#include <asm/pci-bridge.h>
37#include <asm/open_pic.h>
38
39
40struct pci_address {
41 unsigned a_hi;
42 unsigned a_mid;
43 unsigned a_lo;
44};
45
46struct pci_reg_property {
47 struct pci_address addr;
48 unsigned size_hi;
49 unsigned size_lo;
50};
51
52struct isa_reg_property {
53 unsigned space;
54 unsigned address;
55 unsigned size;
56};
57
58typedef unsigned long interpret_func(struct device_node *, unsigned long,
59 int, int);
60static interpret_func interpret_pci_props;
61static interpret_func interpret_dbdma_props;
62static interpret_func interpret_isa_props;
63static interpret_func interpret_macio_props;
64static interpret_func interpret_root_props;
65
66extern char *klimit;
67
68/* Set for a newworld or CHRP machine */
69int use_of_interrupt_tree;
70struct device_node *dflt_interrupt_controller;
71int num_interrupt_controllers;
72
73extern unsigned int rtas_entry; /* physical pointer */
74
75extern struct device_node *allnodes;
76
77static unsigned long finish_node(struct device_node *, unsigned long,
78 interpret_func *, int, int);
79static unsigned long finish_node_interrupts(struct device_node *, unsigned long);
80static struct device_node *find_phandle(phandle);
81
82extern void enter_rtas(void *);
83void phys_call_rtas(int, int, int, ...);
84
85extern char cmd_line[512]; /* XXX */
86extern boot_infos_t *boot_infos;
87unsigned long dev_tree_size;
88
89void
90phys_call_rtas(int service, int nargs, int nret, ...)
91{
92 va_list list;
93 union {
94 unsigned long words[16];
95 double align;
96 } u;
97 void (*rtas)(void *, unsigned long);
98 int i;
99
100 u.words[0] = service;
101 u.words[1] = nargs;
102 u.words[2] = nret;
103 va_start(list, nret);
104 for (i = 0; i < nargs; ++i)
105 u.words[i+3] = va_arg(list, unsigned long);
106 va_end(list);
107
108 rtas = (void (*)(void *, unsigned long)) rtas_entry;
109 rtas(&u, rtas_data);
110}
111
112/*
113 * finish_device_tree is called once things are running normally
114 * (i.e. with text and data mapped to the address they were linked at).
115 * It traverses the device tree and fills in the name, type,
116 * {n_}addrs and {n_}intrs fields of each node.
117 */
118void __init
119finish_device_tree(void)
120{
121 unsigned long mem = (unsigned long) klimit;
122 struct device_node *np;
123
124 /* All CHRPs now use the interrupt tree */
125 for (np = allnodes; np != NULL; np = np->allnext) {
126 if (get_property(np, "interrupt-parent", NULL)) {
127 use_of_interrupt_tree = 1;
128 break;
129 }
130 }
131
132 if (use_of_interrupt_tree) {
133 /*
134 * We want to find out here how many interrupt-controller
135 * nodes there are, and if we are booted from BootX,
136 * we need a pointer to the first (and hopefully only)
137 * such node. But we can't use find_devices here since
138 * np->name has not been set yet. -- paulus
139 */
140 int n = 0;
141 char *name, *ic;
142 int iclen;
143
144 for (np = allnodes; np != NULL; np = np->allnext) {
145 ic = get_property(np, "interrupt-controller", &iclen);
146 name = get_property(np, "name", NULL);
147 /* checking iclen makes sure we don't get a false
148 match on /chosen.interrupt_controller */
149 if ((name != NULL
150 && strcmp(name, "interrupt-controller") == 0)
151 || (ic != NULL && iclen == 0 && strcmp(name, "AppleKiwi"))) {
152 if (n == 0)
153 dflt_interrupt_controller = np;
154 ++n;
155 }
156 }
157 num_interrupt_controllers = n;
158 }
159
160 mem = finish_node(allnodes, mem, NULL, 1, 1);
161 dev_tree_size = mem - (unsigned long) allnodes;
162 klimit = (char *) mem;
163}
164
165static unsigned long __init
166finish_node(struct device_node *np, unsigned long mem_start,
167 interpret_func *ifunc, int naddrc, int nsizec)
168{
169 struct device_node *child;
170 int *ip;
171
172 np->name = get_property(np, "name", NULL);
173 np->type = get_property(np, "device_type", NULL);
174
175 if (!np->name)
176 np->name = "<NULL>";
177 if (!np->type)
178 np->type = "<NULL>";
179
180 /* get the device addresses and interrupts */
181 if (ifunc != NULL)
182 mem_start = ifunc(np, mem_start, naddrc, nsizec);
183
184 if (use_of_interrupt_tree)
185 mem_start = finish_node_interrupts(np, mem_start);
186
187 /* Look for #address-cells and #size-cells properties. */
188 ip = (int *) get_property(np, "#address-cells", NULL);
189 if (ip != NULL)
190 naddrc = *ip;
191 ip = (int *) get_property(np, "#size-cells", NULL);
192 if (ip != NULL)
193 nsizec = *ip;
194
195 if (np->parent == NULL)
196 ifunc = interpret_root_props;
197 else if (np->type == 0)
198 ifunc = NULL;
199 else if (!strcmp(np->type, "pci") || !strcmp(np->type, "vci"))
200 ifunc = interpret_pci_props;
201 else if (!strcmp(np->type, "dbdma"))
202 ifunc = interpret_dbdma_props;
203 else if (!strcmp(np->type, "mac-io")
204 || ifunc == interpret_macio_props)
205 ifunc = interpret_macio_props;
206 else if (!strcmp(np->type, "isa"))
207 ifunc = interpret_isa_props;
208 else if (!strcmp(np->name, "uni-n") || !strcmp(np->name, "u3"))
209 ifunc = interpret_root_props;
210 else if (!((ifunc == interpret_dbdma_props
211 || ifunc == interpret_macio_props)
212 && (!strcmp(np->type, "escc")
213 || !strcmp(np->type, "media-bay"))))
214 ifunc = NULL;
215
216 /* if we were booted from BootX, convert the full name */
217 if (boot_infos
218 && strncmp(np->full_name, "Devices:device-tree", 19) == 0) {
219 if (np->full_name[19] == 0) {
220 strcpy(np->full_name, "/");
221 } else if (np->full_name[19] == ':') {
222 char *p = np->full_name + 19;
223 np->full_name = p;
224 for (; *p; ++p)
225 if (*p == ':')
226 *p = '/';
227 }
228 }
229
230 for (child = np->child; child != NULL; child = child->sibling)
231 mem_start = finish_node(child, mem_start, ifunc,
232 naddrc, nsizec);
233
234 return mem_start;
235}
236
237/*
238 * Find the interrupt parent of a node.
239 */
240static struct device_node * __init
241intr_parent(struct device_node *p)
242{
243 phandle *parp;
244
245 parp = (phandle *) get_property(p, "interrupt-parent", NULL);
246 if (parp == NULL)
247 return p->parent;
248 p = find_phandle(*parp);
249 if (p != NULL)
250 return p;
251 /*
252 * On a powermac booted with BootX, we don't get to know the
253 * phandles for any nodes, so find_phandle will return NULL.
254 * Fortunately these machines only have one interrupt controller
255 * so there isn't in fact any ambiguity. -- paulus
256 */
257 if (num_interrupt_controllers == 1)
258 p = dflt_interrupt_controller;
259 return p;
260}
261
262/*
263 * Find out the size of each entry of the interrupts property
264 * for a node.
265 */
266static int __init
267prom_n_intr_cells(struct device_node *np)
268{
269 struct device_node *p;
270 unsigned int *icp;
271
272 for (p = np; (p = intr_parent(p)) != NULL; ) {
273 icp = (unsigned int *)
274 get_property(p, "#interrupt-cells", NULL);
275 if (icp != NULL)
276 return *icp;
277 if (get_property(p, "interrupt-controller", NULL) != NULL
278 || get_property(p, "interrupt-map", NULL) != NULL) {
279 printk("oops, node %s doesn't have #interrupt-cells\n",
280 p->full_name);
281 return 1;
282 }
283 }
284 printk("prom_n_intr_cells failed for %s\n", np->full_name);
285 return 1;
286}
287
288/*
289 * Map an interrupt from a device up to the platform interrupt
290 * descriptor.
291 */
292static int __init
293map_interrupt(unsigned int **irq, struct device_node **ictrler,
294 struct device_node *np, unsigned int *ints, int nintrc)
295{
296 struct device_node *p, *ipar;
297 unsigned int *imap, *imask, *ip;
298 int i, imaplen, match;
299 int newintrc = 1, newaddrc = 1;
300 unsigned int *reg;
301 int naddrc;
302
303 reg = (unsigned int *) get_property(np, "reg", NULL);
304 naddrc = prom_n_addr_cells(np);
305 p = intr_parent(np);
306 while (p != NULL) {
307 if (get_property(p, "interrupt-controller", NULL) != NULL)
308 /* this node is an interrupt controller, stop here */
309 break;
310 imap = (unsigned int *)
311 get_property(p, "interrupt-map", &imaplen);
312 if (imap == NULL) {
313 p = intr_parent(p);
314 continue;
315 }
316 imask = (unsigned int *)
317 get_property(p, "interrupt-map-mask", NULL);
318 if (imask == NULL) {
319 printk("oops, %s has interrupt-map but no mask\n",
320 p->full_name);
321 return 0;
322 }
323 imaplen /= sizeof(unsigned int);
324 match = 0;
325 ipar = NULL;
326 while (imaplen > 0 && !match) {
327 /* check the child-interrupt field */
328 match = 1;
329 for (i = 0; i < naddrc && match; ++i)
330 match = ((reg[i] ^ imap[i]) & imask[i]) == 0;
331 for (; i < naddrc + nintrc && match; ++i)
332 match = ((ints[i-naddrc] ^ imap[i]) & imask[i]) == 0;
333 imap += naddrc + nintrc;
334 imaplen -= naddrc + nintrc;
335 /* grab the interrupt parent */
336 ipar = find_phandle((phandle) *imap++);
337 --imaplen;
338 if (ipar == NULL && num_interrupt_controllers == 1)
339 /* cope with BootX not giving us phandles */
340 ipar = dflt_interrupt_controller;
341 if (ipar == NULL) {
342 printk("oops, no int parent %x in map of %s\n",
343 imap[-1], p->full_name);
344 return 0;
345 }
346 /* find the parent's # addr and intr cells */
347 ip = (unsigned int *)
348 get_property(ipar, "#interrupt-cells", NULL);
349 if (ip == NULL) {
350 printk("oops, no #interrupt-cells on %s\n",
351 ipar->full_name);
352 return 0;
353 }
354 newintrc = *ip;
355 ip = (unsigned int *)
356 get_property(ipar, "#address-cells", NULL);
357 newaddrc = (ip == NULL)? 0: *ip;
358 imap += newaddrc + newintrc;
359 imaplen -= newaddrc + newintrc;
360 }
361 if (imaplen < 0) {
362 printk("oops, error decoding int-map on %s, len=%d\n",
363 p->full_name, imaplen);
364 return 0;
365 }
366 if (!match) {
367 printk("oops, no match in %s int-map for %s\n",
368 p->full_name, np->full_name);
369 return 0;
370 }
371 p = ipar;
372 naddrc = newaddrc;
373 nintrc = newintrc;
374 ints = imap - nintrc;
375 reg = ints - naddrc;
376 }
377 if (p == NULL)
378 printk("hmmm, int tree for %s doesn't have ctrler\n",
379 np->full_name);
380 *irq = ints;
381 *ictrler = p;
382 return nintrc;
383}
384
385/*
386 * New version of finish_node_interrupts.
387 */
388static unsigned long __init
389finish_node_interrupts(struct device_node *np, unsigned long mem_start)
390{
391 unsigned int *ints;
392 int intlen, intrcells;
393 int i, j, n, offset;
394 unsigned int *irq;
395 struct device_node *ic;
396
397 ints = (unsigned int *) get_property(np, "interrupts", &intlen);
398 if (ints == NULL)
399 return mem_start;
400 intrcells = prom_n_intr_cells(np);
401 intlen /= intrcells * sizeof(unsigned int);
402 np->n_intrs = intlen;
403 np->intrs = (struct interrupt_info *) mem_start;
404 mem_start += intlen * sizeof(struct interrupt_info);
405
406 for (i = 0; i < intlen; ++i) {
407 np->intrs[i].line = 0;
408 np->intrs[i].sense = 1;
409 n = map_interrupt(&irq, &ic, np, ints, intrcells);
410 if (n <= 0)
411 continue;
412 offset = 0;
413 /*
414 * On a CHRP we have an 8259 which is subordinate to
415 * the openpic in the interrupt tree, but we want the
416 * openpic's interrupt numbers offsetted, not the 8259's.
417 * So we apply the offset if the controller is at the
418 * root of the interrupt tree, i.e. has no interrupt-parent.
419 * This doesn't cope with the general case of multiple
420 * cascaded interrupt controllers, but then neither will
421 * irq.c at the moment either. -- paulus
422 * The G5 triggers that code, I add a machine test. On
423 * those machines, we want to offset interrupts from the
424 * second openpic by 128 -- BenH
425 */
426 if (num_interrupt_controllers > 1
427 && ic != NULL
428 && get_property(ic, "interrupt-parent", NULL) == NULL)
429 offset = 16;
430
431 np->intrs[i].line = irq[0] + offset;
432 if (n > 1)
433 np->intrs[i].sense = irq[1];
434 if (n > 2) {
435 printk("hmmm, got %d intr cells for %s:", n,
436 np->full_name);
437 for (j = 0; j < n; ++j)
438 printk(" %d", irq[j]);
439 printk("\n");
440 }
441 ints += intrcells;
442 }
443
444 return mem_start;
445}
446
447/*
448 * When BootX makes a copy of the device tree from the MacOS
449 * Name Registry, it is in the format we use but all of the pointers
450 * are offsets from the start of the tree.
451 * This procedure updates the pointers.
452 */
453void __init
454relocate_nodes(void)
455{
456 unsigned long base;
457 struct device_node *np;
458 struct property *pp;
459
460#define ADDBASE(x) (x = (typeof (x))((x)? ((unsigned long)(x) + base): 0))
461
462 base = (unsigned long) boot_infos + boot_infos->deviceTreeOffset;
463 allnodes = (struct device_node *)(base + 4);
464 for (np = allnodes; np != 0; np = np->allnext) {
465 ADDBASE(np->full_name);
466 ADDBASE(np->properties);
467 ADDBASE(np->parent);
468 ADDBASE(np->child);
469 ADDBASE(np->sibling);
470 ADDBASE(np->allnext);
471 for (pp = np->properties; pp != 0; pp = pp->next) {
472 ADDBASE(pp->name);
473 ADDBASE(pp->value);
474 ADDBASE(pp->next);
475 }
476 }
477}
478
479int
480prom_n_addr_cells(struct device_node* np)
481{
482 int* ip;
483 do {
484 if (np->parent)
485 np = np->parent;
486 ip = (int *) get_property(np, "#address-cells", NULL);
487 if (ip != NULL)
488 return *ip;
489 } while (np->parent);
490 /* No #address-cells property for the root node, default to 1 */
491 return 1;
492}
493
494int
495prom_n_size_cells(struct device_node* np)
496{
497 int* ip;
498 do {
499 if (np->parent)
500 np = np->parent;
501 ip = (int *) get_property(np, "#size-cells", NULL);
502 if (ip != NULL)
503 return *ip;
504 } while (np->parent);
505 /* No #size-cells property for the root node, default to 1 */
506 return 1;
507}
508
509static unsigned long __init
510map_addr(struct device_node *np, unsigned long space, unsigned long addr)
511{
512 int na;
513 unsigned int *ranges;
514 int rlen = 0;
515 unsigned int type;
516
517 type = (space >> 24) & 3;
518 if (type == 0)
519 return addr;
520
521 while ((np = np->parent) != NULL) {
522 if (strcmp(np->type, "pci") != 0)
523 continue;
524 /* PCI bridge: map the address through the ranges property */
525 na = prom_n_addr_cells(np);
526 ranges = (unsigned int *) get_property(np, "ranges", &rlen);
527 while ((rlen -= (na + 5) * sizeof(unsigned int)) >= 0) {
528 if (((ranges[0] >> 24) & 3) == type
529 && ranges[2] <= addr
530 && addr - ranges[2] < ranges[na+4]) {
531 /* ok, this matches, translate it */
532 addr += ranges[na+2] - ranges[2];
533 break;
534 }
535 ranges += na + 5;
536 }
537 }
538 return addr;
539}
540
541static unsigned long __init
542interpret_pci_props(struct device_node *np, unsigned long mem_start,
543 int naddrc, int nsizec)
544{
545 struct address_range *adr;
546 struct pci_reg_property *pci_addrs;
547 int i, l, *ip;
548
549 pci_addrs = (struct pci_reg_property *)
550 get_property(np, "assigned-addresses", &l);
551 if (pci_addrs != 0 && l >= sizeof(struct pci_reg_property)) {
552 i = 0;
553 adr = (struct address_range *) mem_start;
554 while ((l -= sizeof(struct pci_reg_property)) >= 0) {
555 adr[i].space = pci_addrs[i].addr.a_hi;
556 adr[i].address = map_addr(np, pci_addrs[i].addr.a_hi,
557 pci_addrs[i].addr.a_lo);
558 adr[i].size = pci_addrs[i].size_lo;
559 ++i;
560 }
561 np->addrs = adr;
562 np->n_addrs = i;
563 mem_start += i * sizeof(struct address_range);
564 }
565
566 if (use_of_interrupt_tree)
567 return mem_start;
568
569 ip = (int *) get_property(np, "AAPL,interrupts", &l);
570 if (ip == 0 && np->parent)
571 ip = (int *) get_property(np->parent, "AAPL,interrupts", &l);
572 if (ip == 0)
573 ip = (int *) get_property(np, "interrupts", &l);
574 if (ip != 0) {
575 np->intrs = (struct interrupt_info *) mem_start;
576 np->n_intrs = l / sizeof(int);
577 mem_start += np->n_intrs * sizeof(struct interrupt_info);
578 for (i = 0; i < np->n_intrs; ++i) {
579 np->intrs[i].line = *ip++;
580 np->intrs[i].sense = 1;
581 }
582 }
583
584 return mem_start;
585}
586
587static unsigned long __init
588interpret_dbdma_props(struct device_node *np, unsigned long mem_start,
589 int naddrc, int nsizec)
590{
591 struct reg_property *rp;
592 struct address_range *adr;
593 unsigned long base_address;
594 int i, l, *ip;
595 struct device_node *db;
596
597 base_address = 0;
598 for (db = np->parent; db != NULL; db = db->parent) {
599 if (!strcmp(db->type, "dbdma") && db->n_addrs != 0) {
600 base_address = db->addrs[0].address;
601 break;
602 }
603 }
604
605 rp = (struct reg_property *) get_property(np, "reg", &l);
606 if (rp != 0 && l >= sizeof(struct reg_property)) {
607 i = 0;
608 adr = (struct address_range *) mem_start;
609 while ((l -= sizeof(struct reg_property)) >= 0) {
610 adr[i].space = 2;
611 adr[i].address = rp[i].address + base_address;
612 adr[i].size = rp[i].size;
613 ++i;
614 }
615 np->addrs = adr;
616 np->n_addrs = i;
617 mem_start += i * sizeof(struct address_range);
618 }
619
620 if (use_of_interrupt_tree)
621 return mem_start;
622
623 ip = (int *) get_property(np, "AAPL,interrupts", &l);
624 if (ip == 0)
625 ip = (int *) get_property(np, "interrupts", &l);
626 if (ip != 0) {
627 np->intrs = (struct interrupt_info *) mem_start;
628 np->n_intrs = l / sizeof(int);
629 mem_start += np->n_intrs * sizeof(struct interrupt_info);
630 for (i = 0; i < np->n_intrs; ++i) {
631 np->intrs[i].line = *ip++;
632 np->intrs[i].sense = 1;
633 }
634 }
635
636 return mem_start;
637}
638
639static unsigned long __init
640interpret_macio_props(struct device_node *np, unsigned long mem_start,
641 int naddrc, int nsizec)
642{
643 struct reg_property *rp;
644 struct address_range *adr;
645 unsigned long base_address;
646 int i, l, *ip;
647 struct device_node *db;
648
649 base_address = 0;
650 for (db = np->parent; db != NULL; db = db->parent) {
651 if (!strcmp(db->type, "mac-io") && db->n_addrs != 0) {
652 base_address = db->addrs[0].address;
653 break;
654 }
655 }
656
657 rp = (struct reg_property *) get_property(np, "reg", &l);
658 if (rp != 0 && l >= sizeof(struct reg_property)) {
659 i = 0;
660 adr = (struct address_range *) mem_start;
661 while ((l -= sizeof(struct reg_property)) >= 0) {
662 adr[i].space = 2;
663 adr[i].address = rp[i].address + base_address;
664 adr[i].size = rp[i].size;
665 ++i;
666 }
667 np->addrs = adr;
668 np->n_addrs = i;
669 mem_start += i * sizeof(struct address_range);
670 }
671
672 if (use_of_interrupt_tree)
673 return mem_start;
674
675 ip = (int *) get_property(np, "interrupts", &l);
676 if (ip == 0)
677 ip = (int *) get_property(np, "AAPL,interrupts", &l);
678 if (ip != 0) {
679 np->intrs = (struct interrupt_info *) mem_start;
680 np->n_intrs = l / sizeof(int);
681 for (i = 0; i < np->n_intrs; ++i) {
682 np->intrs[i].line = *ip++;
683 np->intrs[i].sense = 1;
684 }
685 mem_start += np->n_intrs * sizeof(struct interrupt_info);
686 }
687
688 return mem_start;
689}
690
691static unsigned long __init
692interpret_isa_props(struct device_node *np, unsigned long mem_start,
693 int naddrc, int nsizec)
694{
695 struct isa_reg_property *rp;
696 struct address_range *adr;
697 int i, l, *ip;
698
699 rp = (struct isa_reg_property *) get_property(np, "reg", &l);
700 if (rp != 0 && l >= sizeof(struct isa_reg_property)) {
701 i = 0;
702 adr = (struct address_range *) mem_start;
703 while ((l -= sizeof(struct reg_property)) >= 0) {
704 adr[i].space = rp[i].space;
705 adr[i].address = rp[i].address
706 + (adr[i].space? 0: _ISA_MEM_BASE);
707 adr[i].size = rp[i].size;
708 ++i;
709 }
710 np->addrs = adr;
711 np->n_addrs = i;
712 mem_start += i * sizeof(struct address_range);
713 }
714
715 if (use_of_interrupt_tree)
716 return mem_start;
717
718 ip = (int *) get_property(np, "interrupts", &l);
719 if (ip != 0) {
720 np->intrs = (struct interrupt_info *) mem_start;
721 np->n_intrs = l / (2 * sizeof(int));
722 mem_start += np->n_intrs * sizeof(struct interrupt_info);
723 for (i = 0; i < np->n_intrs; ++i) {
724 np->intrs[i].line = *ip++;
725 np->intrs[i].sense = *ip++;
726 }
727 }
728
729 return mem_start;
730}
731
732static unsigned long __init
733interpret_root_props(struct device_node *np, unsigned long mem_start,
734 int naddrc, int nsizec)
735{
736 struct address_range *adr;
737 int i, l, *ip;
738 unsigned int *rp;
739 int rpsize = (naddrc + nsizec) * sizeof(unsigned int);
740
741 rp = (unsigned int *) get_property(np, "reg", &l);
742 if (rp != 0 && l >= rpsize) {
743 i = 0;
744 adr = (struct address_range *) mem_start;
745 while ((l -= rpsize) >= 0) {
746 adr[i].space = (naddrc >= 2? rp[naddrc-2]: 2);
747 adr[i].address = rp[naddrc - 1];
748 adr[i].size = rp[naddrc + nsizec - 1];
749 ++i;
750 rp += naddrc + nsizec;
751 }
752 np->addrs = adr;
753 np->n_addrs = i;
754 mem_start += i * sizeof(struct address_range);
755 }
756
757 if (use_of_interrupt_tree)
758 return mem_start;
759
760 ip = (int *) get_property(np, "AAPL,interrupts", &l);
761 if (ip == 0)
762 ip = (int *) get_property(np, "interrupts", &l);
763 if (ip != 0) {
764 np->intrs = (struct interrupt_info *) mem_start;
765 np->n_intrs = l / sizeof(int);
766 mem_start += np->n_intrs * sizeof(struct interrupt_info);
767 for (i = 0; i < np->n_intrs; ++i) {
768 np->intrs[i].line = *ip++;
769 np->intrs[i].sense = 1;
770 }
771 }
772
773 return mem_start;
774}
775
776/*
777 * Work out the sense (active-low level / active-high edge)
778 * of each interrupt from the device tree.
779 */
780void __init
781prom_get_irq_senses(unsigned char *senses, int off, int max)
782{
783 struct device_node *np;
784 int i, j;
785
786 /* default to level-triggered */
787 memset(senses, 1, max - off);
788 if (!use_of_interrupt_tree)
789 return;
790
791 for (np = allnodes; np != 0; np = np->allnext) {
792 for (j = 0; j < np->n_intrs; j++) {
793 i = np->intrs[j].line;
794 if (i >= off && i < max) {
795 if (np->intrs[j].sense == 1)
796 senses[i-off] = (IRQ_SENSE_LEVEL
797 | IRQ_POLARITY_NEGATIVE);
798 else
799 senses[i-off] = (IRQ_SENSE_EDGE
800 | IRQ_POLARITY_POSITIVE);
801 }
802 }
803 }
804}
805
806/*
807 * Construct and return a list of the device_nodes with a given name.
808 */
809struct device_node *
810find_devices(const char *name)
811{
812 struct device_node *head, **prevp, *np;
813
814 prevp = &head;
815 for (np = allnodes; np != 0; np = np->allnext) {
816 if (np->name != 0 && strcasecmp(np->name, name) == 0) {
817 *prevp = np;
818 prevp = &np->next;
819 }
820 }
821 *prevp = NULL;
822 return head;
823}
824
825/*
826 * Construct and return a list of the device_nodes with a given type.
827 */
828struct device_node *
829find_type_devices(const char *type)
830{
831 struct device_node *head, **prevp, *np;
832
833 prevp = &head;
834 for (np = allnodes; np != 0; np = np->allnext) {
835 if (np->type != 0 && strcasecmp(np->type, type) == 0) {
836 *prevp = np;
837 prevp = &np->next;
838 }
839 }
840 *prevp = NULL;
841 return head;
842}
843
844/*
845 * Returns all nodes linked together
846 */
847struct device_node *
848find_all_nodes(void)
849{
850 struct device_node *head, **prevp, *np;
851
852 prevp = &head;
853 for (np = allnodes; np != 0; np = np->allnext) {
854 *prevp = np;
855 prevp = &np->next;
856 }
857 *prevp = NULL;
858 return head;
859}
860
861/* Checks if the given "compat" string matches one of the strings in
862 * the device's "compatible" property
863 */
864int
865device_is_compatible(struct device_node *device, const char *compat)
866{
867 const char* cp;
868 int cplen, l;
869
870 cp = (char *) get_property(device, "compatible", &cplen);
871 if (cp == NULL)
872 return 0;
873 while (cplen > 0) {
874 if (strncasecmp(cp, compat, strlen(compat)) == 0)
875 return 1;
876 l = strlen(cp) + 1;
877 cp += l;
878 cplen -= l;
879 }
880
881 return 0;
882}
883
884
885/*
886 * Indicates whether the root node has a given value in its
887 * compatible property.
888 */
889int
890machine_is_compatible(const char *compat)
891{
892 struct device_node *root;
893
894 root = find_path_device("/");
895 if (root == 0)
896 return 0;
897 return device_is_compatible(root, compat);
898}
899
900/*
901 * Construct and return a list of the device_nodes with a given type
902 * and compatible property.
903 */
904struct device_node *
905find_compatible_devices(const char *type, const char *compat)
906{
907 struct device_node *head, **prevp, *np;
908
909 prevp = &head;
910 for (np = allnodes; np != 0; np = np->allnext) {
911 if (type != NULL
912 && !(np->type != 0 && strcasecmp(np->type, type) == 0))
913 continue;
914 if (device_is_compatible(np, compat)) {
915 *prevp = np;
916 prevp = &np->next;
917 }
918 }
919 *prevp = NULL;
920 return head;
921}
922
923/*
924 * Find the device_node with a given full_name.
925 */
926struct device_node *
927find_path_device(const char *path)
928{
929 struct device_node *np;
930
931 for (np = allnodes; np != 0; np = np->allnext)
932 if (np->full_name != 0 && strcasecmp(np->full_name, path) == 0)
933 return np;
934 return NULL;
935}
936
937/*******
938 *
939 * New implementation of the OF "find" APIs, return a refcounted
940 * object, call of_node_put() when done. Currently, still lacks
941 * locking as old implementation, this is beeing done for ppc64.
942 *
943 * Note that property management will need some locking as well,
944 * this isn't dealt with yet
945 *
946 *******/
947
948/**
949 * of_find_node_by_name - Find a node by it's "name" property
950 * @from: The node to start searching from or NULL, the node
951 * you pass will not be searched, only the next one
952 * will; typically, you pass what the previous call
953 * returned. of_node_put() will be called on it
954 * @name: The name string to match against
955 *
956 * Returns a node pointer with refcount incremented, use
957 * of_node_put() on it when done.
958 */
959struct device_node *of_find_node_by_name(struct device_node *from,
960 const char *name)
961{
962 struct device_node *np = from ? from->allnext : allnodes;
963
964 for (; np != 0; np = np->allnext)
965 if (np->name != 0 && strcasecmp(np->name, name) == 0)
966 break;
967 if (from)
968 of_node_put(from);
969 return of_node_get(np);
970}
971
972/**
973 * of_find_node_by_type - Find a node by it's "device_type" property
974 * @from: The node to start searching from or NULL, the node
975 * you pass will not be searched, only the next one
976 * will; typically, you pass what the previous call
977 * returned. of_node_put() will be called on it
978 * @name: The type string to match against
979 *
980 * Returns a node pointer with refcount incremented, use
981 * of_node_put() on it when done.
982 */
983struct device_node *of_find_node_by_type(struct device_node *from,
984 const char *type)
985{
986 struct device_node *np = from ? from->allnext : allnodes;
987
988 for (; np != 0; np = np->allnext)
989 if (np->type != 0 && strcasecmp(np->type, type) == 0)
990 break;
991 if (from)
992 of_node_put(from);
993 return of_node_get(np);
994}
995
996/**
997 * of_find_compatible_node - Find a node based on type and one of the
998 * tokens in it's "compatible" property
999 * @from: The node to start searching from or NULL, the node
1000 * you pass will not be searched, only the next one
1001 * will; typically, you pass what the previous call
1002 * returned. of_node_put() will be called on it
1003 * @type: The type string to match "device_type" or NULL to ignore
1004 * @compatible: The string to match to one of the tokens in the device
1005 * "compatible" list.
1006 *
1007 * Returns a node pointer with refcount incremented, use
1008 * of_node_put() on it when done.
1009 */
1010struct device_node *of_find_compatible_node(struct device_node *from,
1011 const char *type, const char *compatible)
1012{
1013 struct device_node *np = from ? from->allnext : allnodes;
1014
1015 for (; np != 0; np = np->allnext) {
1016 if (type != NULL
1017 && !(np->type != 0 && strcasecmp(np->type, type) == 0))
1018 continue;
1019 if (device_is_compatible(np, compatible))
1020 break;
1021 }
1022 if (from)
1023 of_node_put(from);
1024 return of_node_get(np);
1025}
1026
1027/**
1028 * of_find_node_by_path - Find a node matching a full OF path
1029 * @path: The full path to match
1030 *
1031 * Returns a node pointer with refcount incremented, use
1032 * of_node_put() on it when done.
1033 */
1034struct device_node *of_find_node_by_path(const char *path)
1035{
1036 struct device_node *np = allnodes;
1037
1038 for (; np != 0; np = np->allnext)
1039 if (np->full_name != 0 && strcasecmp(np->full_name, path) == 0)
1040 break;
1041 return of_node_get(np);
1042}
1043
1044/**
1045 * of_find_all_nodes - Get next node in global list
1046 * @prev: Previous node or NULL to start iteration
1047 * of_node_put() will be called on it
1048 *
1049 * Returns a node pointer with refcount incremented, use
1050 * of_node_put() on it when done.
1051 */
1052struct device_node *of_find_all_nodes(struct device_node *prev)
1053{
1054 return of_node_get(prev ? prev->allnext : allnodes);
1055}
1056
1057/**
1058 * of_get_parent - Get a node's parent if any
1059 * @node: Node to get parent
1060 *
1061 * Returns a node pointer with refcount incremented, use
1062 * of_node_put() on it when done.
1063 */
1064struct device_node *of_get_parent(const struct device_node *node)
1065{
1066 return node ? of_node_get(node->parent) : NULL;
1067}
1068
1069/**
1070 * of_get_next_child - Iterate a node childs
1071 * @node: parent node
1072 * @prev: previous child of the parent node, or NULL to get first
1073 *
1074 * Returns a node pointer with refcount incremented, use
1075 * of_node_put() on it when done.
1076 */
1077struct device_node *of_get_next_child(const struct device_node *node,
1078 struct device_node *prev)
1079{
1080 struct device_node *next = prev ? prev->sibling : node->child;
1081
1082 for (; next != 0; next = next->sibling)
1083 if (of_node_get(next))
1084 break;
1085 if (prev)
1086 of_node_put(prev);
1087 return next;
1088}
1089
1090/**
1091 * of_node_get - Increment refcount of a node
1092 * @node: Node to inc refcount, NULL is supported to
1093 * simplify writing of callers
1094 *
1095 * Returns the node itself or NULL if gone. Current implementation
1096 * does nothing as we don't yet do dynamic node allocation on ppc32
1097 */
1098struct device_node *of_node_get(struct device_node *node)
1099{
1100 return node;
1101}
1102
1103/**
1104 * of_node_put - Decrement refcount of a node
1105 * @node: Node to dec refcount, NULL is supported to
1106 * simplify writing of callers
1107 *
1108 * Current implementation does nothing as we don't yet do dynamic node
1109 * allocation on ppc32
1110 */
1111void of_node_put(struct device_node *node)
1112{
1113}
1114
1115/*
1116 * Find the device_node with a given phandle.
1117 */
1118static struct device_node * __init
1119find_phandle(phandle ph)
1120{
1121 struct device_node *np;
1122
1123 for (np = allnodes; np != 0; np = np->allnext)
1124 if (np->node == ph)
1125 return np;
1126 return NULL;
1127}
1128
1129/*
1130 * Find a property with a given name for a given node
1131 * and return the value.
1132 */
1133unsigned char *
1134get_property(struct device_node *np, const char *name, int *lenp)
1135{
1136 struct property *pp;
1137
1138 for (pp = np->properties; pp != 0; pp = pp->next)
1139 if (pp->name != NULL && strcmp(pp->name, name) == 0) {
1140 if (lenp != 0)
1141 *lenp = pp->length;
1142 return pp->value;
1143 }
1144 return NULL;
1145}
1146
1147/*
1148 * Add a property to a node
1149 */
1150int
1151prom_add_property(struct device_node* np, struct property* prop)
1152{
1153 struct property **next = &np->properties;
1154
1155 prop->next = NULL;
1156 while (*next)
1157 next = &(*next)->next;
1158 *next = prop;
1159
1160 return 0;
1161}
1162
1163/* I quickly hacked that one, check against spec ! */
1164static inline unsigned long
1165bus_space_to_resource_flags(unsigned int bus_space)
1166{
1167 u8 space = (bus_space >> 24) & 0xf;
1168 if (space == 0)
1169 space = 0x02;
1170 if (space == 0x02)
1171 return IORESOURCE_MEM;
1172 else if (space == 0x01)
1173 return IORESOURCE_IO;
1174 else {
1175 printk(KERN_WARNING "prom.c: bus_space_to_resource_flags(), space: %x\n",
1176 bus_space);
1177 return 0;
1178 }
1179}
1180
1181static struct resource*
1182find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range)
1183{
1184 unsigned long mask;
1185 int i;
1186
1187 /* Check this one */
1188 mask = bus_space_to_resource_flags(range->space);
1189 for (i=0; i<DEVICE_COUNT_RESOURCE; i++) {
1190 if ((pdev->resource[i].flags & mask) == mask &&
1191 pdev->resource[i].start <= range->address &&
1192 pdev->resource[i].end > range->address) {
1193 if ((range->address + range->size - 1) > pdev->resource[i].end) {
1194 /* Add better message */
1195 printk(KERN_WARNING "PCI/OF resource overlap !\n");
1196 return NULL;
1197 }
1198 break;
1199 }
1200 }
1201 if (i == DEVICE_COUNT_RESOURCE)
1202 return NULL;
1203 return &pdev->resource[i];
1204}
1205
1206/*
1207 * Request an OF device resource. Currently handles child of PCI devices,
1208 * or other nodes attached to the root node. Ultimately, put some
1209 * link to resources in the OF node.
1210 */
1211struct resource*
1212request_OF_resource(struct device_node* node, int index, const char* name_postfix)
1213{
1214 struct pci_dev* pcidev;
1215 u8 pci_bus, pci_devfn;
1216 unsigned long iomask;
1217 struct device_node* nd;
1218 struct resource* parent;
1219 struct resource *res = NULL;
1220 int nlen, plen;
1221
1222 if (index >= node->n_addrs)
1223 goto fail;
1224
1225 /* Sanity check on bus space */
1226 iomask = bus_space_to_resource_flags(node->addrs[index].space);
1227 if (iomask & IORESOURCE_MEM)
1228 parent = &iomem_resource;
1229 else if (iomask & IORESOURCE_IO)
1230 parent = &ioport_resource;
1231 else
1232 goto fail;
1233
1234 /* Find a PCI parent if any */
1235 nd = node;
1236 pcidev = NULL;
1237 while(nd) {
1238 if (!pci_device_from_OF_node(nd, &pci_bus, &pci_devfn))
1239 pcidev = pci_find_slot(pci_bus, pci_devfn);
1240 if (pcidev) break;
1241 nd = nd->parent;
1242 }
1243 if (pcidev)
1244 parent = find_parent_pci_resource(pcidev, &node->addrs[index]);
1245 if (!parent) {
1246 printk(KERN_WARNING "request_OF_resource(%s), parent not found\n",
1247 node->name);
1248 goto fail;
1249 }
1250
1251 res = __request_region(parent, node->addrs[index].address, node->addrs[index].size, NULL);
1252 if (!res)
1253 goto fail;
1254 nlen = strlen(node->name);
1255 plen = name_postfix ? strlen(name_postfix) : 0;
1256 res->name = (const char *)kmalloc(nlen+plen+1, GFP_KERNEL);
1257 if (res->name) {
1258 strcpy((char *)res->name, node->name);
1259 if (plen)
1260 strcpy((char *)res->name+nlen, name_postfix);
1261 }
1262 return res;
1263fail:
1264 return NULL;
1265}
1266
1267int
1268release_OF_resource(struct device_node* node, int index)
1269{
1270 struct pci_dev* pcidev;
1271 u8 pci_bus, pci_devfn;
1272 unsigned long iomask, start, end;
1273 struct device_node* nd;
1274 struct resource* parent;
1275 struct resource *res = NULL;
1276
1277 if (index >= node->n_addrs)
1278 return -EINVAL;
1279
1280 /* Sanity check on bus space */
1281 iomask = bus_space_to_resource_flags(node->addrs[index].space);
1282 if (iomask & IORESOURCE_MEM)
1283 parent = &iomem_resource;
1284 else if (iomask & IORESOURCE_IO)
1285 parent = &ioport_resource;
1286 else
1287 return -EINVAL;
1288
1289 /* Find a PCI parent if any */
1290 nd = node;
1291 pcidev = NULL;
1292 while(nd) {
1293 if (!pci_device_from_OF_node(nd, &pci_bus, &pci_devfn))
1294 pcidev = pci_find_slot(pci_bus, pci_devfn);
1295 if (pcidev) break;
1296 nd = nd->parent;
1297 }
1298 if (pcidev)
1299 parent = find_parent_pci_resource(pcidev, &node->addrs[index]);
1300 if (!parent) {
1301 printk(KERN_WARNING "release_OF_resource(%s), parent not found\n",
1302 node->name);
1303 return -ENODEV;
1304 }
1305
1306 /* Find us in the parent and its childs */
1307 res = parent->child;
1308 start = node->addrs[index].address;
1309 end = start + node->addrs[index].size - 1;
1310 while (res) {
1311 if (res->start == start && res->end == end &&
1312 (res->flags & IORESOURCE_BUSY))
1313 break;
1314 if (res->start <= start && res->end >= end)
1315 res = res->child;
1316 else
1317 res = res->sibling;
1318 }
1319 if (!res)
1320 return -ENODEV;
1321
1322 kfree(res->name);
1323 res->name = NULL;
1324 release_resource(res);
1325 kfree(res);
1326
1327 return 0;
1328}
1329
1330#if 0
1331void
1332print_properties(struct device_node *np)
1333{
1334 struct property *pp;
1335 char *cp;
1336 int i, n;
1337
1338 for (pp = np->properties; pp != 0; pp = pp->next) {
1339 printk(KERN_INFO "%s", pp->name);
1340 for (i = strlen(pp->name); i < 16; ++i)
1341 printk(" ");
1342 cp = (char *) pp->value;
1343 for (i = pp->length; i > 0; --i, ++cp)
1344 if ((i > 1 && (*cp < 0x20 || *cp > 0x7e))
1345 || (i == 1 && *cp != 0))
1346 break;
1347 if (i == 0 && pp->length > 1) {
1348 /* looks like a string */
1349 printk(" %s\n", (char *) pp->value);
1350 } else {
1351 /* dump it in hex */
1352 n = pp->length;
1353 if (n > 64)
1354 n = 64;
1355 if (pp->length % 4 == 0) {
1356 unsigned int *p = (unsigned int *) pp->value;
1357
1358 n /= 4;
1359 for (i = 0; i < n; ++i) {
1360 if (i != 0 && (i % 4) == 0)
1361 printk("\n ");
1362 printk(" %08x", *p++);
1363 }
1364 } else {
1365 unsigned char *bp = pp->value;
1366
1367 for (i = 0; i < n; ++i) {
1368 if (i != 0 && (i % 16) == 0)
1369 printk("\n ");
1370 printk(" %02x", *bp++);
1371 }
1372 }
1373 printk("\n");
1374 if (pp->length > 64)
1375 printk(" ... (length = %d)\n",
1376 pp->length);
1377 }
1378 }
1379}
1380#endif
1381
1382static DEFINE_SPINLOCK(rtas_lock);
1383
1384/* this can be called after setup -- Cort */
1385int
1386call_rtas(const char *service, int nargs, int nret,
1387 unsigned long *outputs, ...)
1388{
1389 va_list list;
1390 int i;
1391 unsigned long s;
1392 struct device_node *rtas;
1393 int *tokp;
1394 union {
1395 unsigned long words[16];
1396 double align;
1397 } u;
1398
1399 rtas = find_devices("rtas");
1400 if (rtas == NULL)
1401 return -1;
1402 tokp = (int *) get_property(rtas, service, NULL);
1403 if (tokp == NULL) {
1404 printk(KERN_ERR "No RTAS service called %s\n", service);
1405 return -1;
1406 }
1407 u.words[0] = *tokp;
1408 u.words[1] = nargs;
1409 u.words[2] = nret;
1410 va_start(list, outputs);
1411 for (i = 0; i < nargs; ++i)
1412 u.words[i+3] = va_arg(list, unsigned long);
1413 va_end(list);
1414
1415 /*
1416 * RTAS doesn't use floating point.
1417 * Or at least, according to the CHRP spec we enter RTAS
1418 * with FP disabled, and it doesn't change the FP registers.
1419 * -- paulus.
1420 */
1421 spin_lock_irqsave(&rtas_lock, s);
1422 enter_rtas((void *)__pa(&u));
1423 spin_unlock_irqrestore(&rtas_lock, s);
1424
1425 if (nret > 1 && outputs != NULL)
1426 for (i = 0; i < nret-1; ++i)
1427 outputs[i] = u.words[i+nargs+4];
1428 return u.words[nargs+3];
1429}
diff --git a/arch/ppc/syslib/prom_init.c b/arch/ppc/syslib/prom_init.c
deleted file mode 100644
index df14422ae1c6..000000000000
--- a/arch/ppc/syslib/prom_init.c
+++ /dev/null
@@ -1,1011 +0,0 @@
1/*
2 * Note that prom_init() and anything called from prom_init()
3 * may be running at an address that is different from the address
4 * that it was linked at. References to static data items are
5 * handled by compiling this file with -mrelocatable-lib.
6 */
7
8#include <linux/config.h>
9#include <linux/kernel.h>
10#include <linux/string.h>
11#include <linux/init.h>
12#include <linux/threads.h>
13#include <linux/spinlock.h>
14#include <linux/ioport.h>
15#include <linux/pci.h>
16#include <linux/slab.h>
17#include <linux/bitops.h>
18
19#include <asm/sections.h>
20#include <asm/prom.h>
21#include <asm/page.h>
22#include <asm/irq.h>
23#include <asm/io.h>
24#include <asm/smp.h>
25#include <asm/bootx.h>
26#include <asm/system.h>
27#include <asm/mmu.h>
28#include <asm/pgtable.h>
29#include <asm/bootinfo.h>
30#include <asm/btext.h>
31#include <asm/pci-bridge.h>
32#include <asm/open_pic.h>
33#include <asm/cacheflush.h>
34
35#ifdef CONFIG_LOGO_LINUX_CLUT224
36#include <linux/linux_logo.h>
37extern const struct linux_logo logo_linux_clut224;
38#endif
39
40/*
41 * Properties whose value is longer than this get excluded from our
42 * copy of the device tree. This way we don't waste space storing
43 * things like "driver,AAPL,MacOS,PowerPC" properties. But this value
44 * does need to be big enough to ensure that we don't lose things
45 * like the interrupt-map property on a PCI-PCI bridge.
46 */
47#define MAX_PROPERTY_LENGTH 4096
48
49#ifndef FB_MAX /* avoid pulling in all of the fb stuff */
50#define FB_MAX 8
51#endif
52
53#define ALIGNUL(x) (((x) + sizeof(unsigned long)-1) & -sizeof(unsigned long))
54
55typedef u32 prom_arg_t;
56
57struct prom_args {
58 const char *service;
59 int nargs;
60 int nret;
61 prom_arg_t args[10];
62};
63
64struct pci_address {
65 unsigned a_hi;
66 unsigned a_mid;
67 unsigned a_lo;
68};
69
70struct pci_reg_property {
71 struct pci_address addr;
72 unsigned size_hi;
73 unsigned size_lo;
74};
75
76struct pci_range {
77 struct pci_address addr;
78 unsigned phys;
79 unsigned size_hi;
80 unsigned size_lo;
81};
82
83struct isa_reg_property {
84 unsigned space;
85 unsigned address;
86 unsigned size;
87};
88
89struct pci_intr_map {
90 struct pci_address addr;
91 unsigned dunno;
92 phandle int_ctrler;
93 unsigned intr;
94};
95
96static void prom_exit(void);
97static int call_prom(const char *service, int nargs, int nret, ...);
98static int call_prom_ret(const char *service, int nargs, int nret,
99 prom_arg_t *rets, ...);
100static void prom_print_hex(unsigned int v);
101static int prom_set_color(ihandle ih, int i, int r, int g, int b);
102static int prom_next_node(phandle *nodep);
103static unsigned long check_display(unsigned long mem);
104static void setup_disp_fake_bi(ihandle dp);
105static unsigned long copy_device_tree(unsigned long mem_start,
106 unsigned long mem_end);
107static unsigned long inspect_node(phandle node, struct device_node *dad,
108 unsigned long mem_start, unsigned long mem_end,
109 struct device_node ***allnextpp);
110static void prom_hold_cpus(unsigned long mem);
111static void prom_instantiate_rtas(void);
112static void * early_get_property(unsigned long base, unsigned long node,
113 char *prop);
114
115prom_entry prom __initdata;
116ihandle prom_chosen __initdata;
117ihandle prom_stdout __initdata;
118
119static char *prom_display_paths[FB_MAX] __initdata;
120static phandle prom_display_nodes[FB_MAX] __initdata;
121static unsigned int prom_num_displays __initdata;
122static ihandle prom_disp_node __initdata;
123char *of_stdout_device __initdata;
124
125unsigned int rtas_data; /* physical pointer */
126unsigned int rtas_entry; /* physical pointer */
127unsigned int rtas_size;
128unsigned int old_rtas;
129
130boot_infos_t *boot_infos;
131char *bootpath;
132char *bootdevice;
133struct device_node *allnodes;
134
135extern char *klimit;
136
137static void __init
138prom_exit(void)
139{
140 struct prom_args args;
141
142 args.service = "exit";
143 args.nargs = 0;
144 args.nret = 0;
145 prom(&args);
146 for (;;) /* should never get here */
147 ;
148}
149
150static int __init
151call_prom(const char *service, int nargs, int nret, ...)
152{
153 va_list list;
154 int i;
155 struct prom_args prom_args;
156
157 prom_args.service = service;
158 prom_args.nargs = nargs;
159 prom_args.nret = nret;
160 va_start(list, nret);
161 for (i = 0; i < nargs; ++i)
162 prom_args.args[i] = va_arg(list, prom_arg_t);
163 va_end(list);
164 for (i = 0; i < nret; ++i)
165 prom_args.args[i + nargs] = 0;
166 prom(&prom_args);
167 return prom_args.args[nargs];
168}
169
170static int __init
171call_prom_ret(const char *service, int nargs, int nret, prom_arg_t *rets, ...)
172{
173 va_list list;
174 int i;
175 struct prom_args prom_args;
176
177 prom_args.service = service;
178 prom_args.nargs = nargs;
179 prom_args.nret = nret;
180 va_start(list, rets);
181 for (i = 0; i < nargs; ++i)
182 prom_args.args[i] = va_arg(list, int);
183 va_end(list);
184 for (i = 0; i < nret; ++i)
185 prom_args.args[i + nargs] = 0;
186 prom(&prom_args);
187 for (i = 1; i < nret; ++i)
188 rets[i-1] = prom_args.args[nargs + i];
189 return prom_args.args[nargs];
190}
191
192void __init
193prom_print(const char *msg)
194{
195 const char *p, *q;
196
197 if (prom_stdout == 0)
198 return;
199
200 for (p = msg; *p != 0; p = q) {
201 for (q = p; *q != 0 && *q != '\n'; ++q)
202 ;
203 if (q > p)
204 call_prom("write", 3, 1, prom_stdout, p, q - p);
205 if (*q != 0) {
206 ++q;
207 call_prom("write", 3, 1, prom_stdout, "\r\n", 2);
208 }
209 }
210}
211
212static void __init
213prom_print_hex(unsigned int v)
214{
215 char buf[16];
216 int i, c;
217
218 for (i = 0; i < 8; ++i) {
219 c = (v >> ((7-i)*4)) & 0xf;
220 c += (c >= 10)? ('a' - 10): '0';
221 buf[i] = c;
222 }
223 buf[i] = ' ';
224 buf[i+1] = 0;
225 prom_print(buf);
226}
227
228static int __init
229prom_set_color(ihandle ih, int i, int r, int g, int b)
230{
231 return call_prom("call-method", 6, 1, "color!", ih, i, b, g, r);
232}
233
234static int __init
235prom_next_node(phandle *nodep)
236{
237 phandle node;
238
239 if ((node = *nodep) != 0
240 && (*nodep = call_prom("child", 1, 1, node)) != 0)
241 return 1;
242 if ((*nodep = call_prom("peer", 1, 1, node)) != 0)
243 return 1;
244 for (;;) {
245 if ((node = call_prom("parent", 1, 1, node)) == 0)
246 return 0;
247 if ((*nodep = call_prom("peer", 1, 1, node)) != 0)
248 return 1;
249 }
250}
251
252#ifdef CONFIG_POWER4
253/*
254 * Set up a hash table with a set of entries in it to map the
255 * first 64MB of RAM. This is used on 64-bit machines since
256 * some of them don't have BATs.
257 */
258
259static inline void make_pte(unsigned long htab, unsigned int hsize,
260 unsigned int va, unsigned int pa, int mode)
261{
262 unsigned int *pteg;
263 unsigned int hash, i, vsid;
264
265 vsid = ((va >> 28) * 0x111) << 12;
266 hash = ((va ^ vsid) >> 5) & 0x7fff80;
267 pteg = (unsigned int *)(htab + (hash & (hsize - 1)));
268 for (i = 0; i < 8; ++i, pteg += 4) {
269 if ((pteg[1] & 1) == 0) {
270 pteg[1] = vsid | ((va >> 16) & 0xf80) | 1;
271 pteg[3] = pa | mode;
272 break;
273 }
274 }
275}
276
277extern unsigned long _SDR1;
278extern PTE *Hash;
279extern unsigned long Hash_size;
280
281static void __init
282prom_alloc_htab(void)
283{
284 unsigned int hsize;
285 unsigned long htab;
286 unsigned int addr;
287
288 /*
289 * Because of OF bugs we can't use the "claim" client
290 * interface to allocate memory for the hash table.
291 * This code is only used on 64-bit PPCs, and the only
292 * 64-bit PPCs at the moment are RS/6000s, and their
293 * OF is based at 0xc00000 (the 12M point), so we just
294 * arbitrarily use the 0x800000 - 0xc00000 region for the
295 * hash table.
296 * -- paulus.
297 */
298 hsize = 4 << 20; /* POWER4 has no BATs */
299 htab = (8 << 20);
300 call_prom("claim", 3, 1, htab, hsize, 0);
301 Hash = (void *)(htab + KERNELBASE);
302 Hash_size = hsize;
303 _SDR1 = htab + __ilog2(hsize) - 18;
304
305 /*
306 * Put in PTEs for the first 64MB of RAM
307 */
308 memset((void *)htab, 0, hsize);
309 for (addr = 0; addr < 0x4000000; addr += 0x1000)
310 make_pte(htab, hsize, addr + KERNELBASE, addr,
311 _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX);
312#if 0 /* DEBUG stuff mapping the SCC */
313 make_pte(htab, hsize, 0x80013000, 0x80013000,
314 _PAGE_ACCESSED | _PAGE_NO_CACHE | _PAGE_GUARDED | PP_RWXX);
315#endif
316}
317#endif /* CONFIG_POWER4 */
318
319
320/*
321 * If we have a display that we don't know how to drive,
322 * we will want to try to execute OF's open method for it
323 * later. However, OF will probably fall over if we do that
324 * we've taken over the MMU.
325 * So we check whether we will need to open the display,
326 * and if so, open it now.
327 */
328static unsigned long __init
329check_display(unsigned long mem)
330{
331 phandle node;
332 ihandle ih;
333 int i, j;
334 char type[16], *path;
335 static unsigned char default_colors[] = {
336 0x00, 0x00, 0x00,
337 0x00, 0x00, 0xaa,
338 0x00, 0xaa, 0x00,
339 0x00, 0xaa, 0xaa,
340 0xaa, 0x00, 0x00,
341 0xaa, 0x00, 0xaa,
342 0xaa, 0xaa, 0x00,
343 0xaa, 0xaa, 0xaa,
344 0x55, 0x55, 0x55,
345 0x55, 0x55, 0xff,
346 0x55, 0xff, 0x55,
347 0x55, 0xff, 0xff,
348 0xff, 0x55, 0x55,
349 0xff, 0x55, 0xff,
350 0xff, 0xff, 0x55,
351 0xff, 0xff, 0xff
352 };
353 const unsigned char *clut;
354
355 prom_disp_node = 0;
356
357 for (node = 0; prom_next_node(&node); ) {
358 type[0] = 0;
359 call_prom("getprop", 4, 1, node, "device_type",
360 type, sizeof(type));
361 if (strcmp(type, "display") != 0)
362 continue;
363 /* It seems OF doesn't null-terminate the path :-( */
364 path = (char *) mem;
365 memset(path, 0, 256);
366 if (call_prom("package-to-path", 3, 1, node, path, 255) < 0)
367 continue;
368
369 /*
370 * If this display is the device that OF is using for stdout,
371 * move it to the front of the list.
372 */
373 mem += strlen(path) + 1;
374 i = prom_num_displays++;
375 if (of_stdout_device != 0 && i > 0
376 && strcmp(of_stdout_device, path) == 0) {
377 for (; i > 0; --i) {
378 prom_display_paths[i]
379 = prom_display_paths[i-1];
380 prom_display_nodes[i]
381 = prom_display_nodes[i-1];
382 }
383 }
384 prom_display_paths[i] = path;
385 prom_display_nodes[i] = node;
386 if (i == 0)
387 prom_disp_node = node;
388 if (prom_num_displays >= FB_MAX)
389 break;
390 }
391
392 for (j=0; j<prom_num_displays; j++) {
393 path = prom_display_paths[j];
394 node = prom_display_nodes[j];
395 prom_print("opening display ");
396 prom_print(path);
397 ih = call_prom("open", 1, 1, path);
398 if (ih == 0 || ih == (ihandle) -1) {
399 prom_print("... failed\n");
400 for (i=j+1; i<prom_num_displays; i++) {
401 prom_display_paths[i-1] = prom_display_paths[i];
402 prom_display_nodes[i-1] = prom_display_nodes[i];
403 }
404 if (--prom_num_displays > 0) {
405 prom_disp_node = prom_display_nodes[j];
406 j--;
407 } else
408 prom_disp_node = 0;
409 continue;
410 } else {
411 prom_print("... ok\n");
412 call_prom("setprop", 4, 1, node, "linux,opened", 0, 0);
413
414 /*
415 * Setup a usable color table when the appropriate
416 * method is available.
417 * Should update this to use set-colors.
418 */
419 clut = default_colors;
420 for (i = 0; i < 32; i++, clut += 3)
421 if (prom_set_color(ih, i, clut[0], clut[1],
422 clut[2]) != 0)
423 break;
424
425#ifdef CONFIG_LOGO_LINUX_CLUT224
426 clut = PTRRELOC(logo_linux_clut224.clut);
427 for (i = 0; i < logo_linux_clut224.clutsize;
428 i++, clut += 3)
429 if (prom_set_color(ih, i + 32, clut[0],
430 clut[1], clut[2]) != 0)
431 break;
432#endif /* CONFIG_LOGO_LINUX_CLUT224 */
433 }
434 }
435
436 if (prom_stdout) {
437 phandle p;
438 p = call_prom("instance-to-package", 1, 1, prom_stdout);
439 if (p && p != -1) {
440 type[0] = 0;
441 call_prom("getprop", 4, 1, p, "device_type",
442 type, sizeof(type));
443 if (strcmp(type, "display") == 0)
444 call_prom("setprop", 4, 1, p, "linux,boot-display",
445 0, 0);
446 }
447 }
448
449 return ALIGNUL(mem);
450}
451
452/* This function will enable the early boot text when doing OF booting. This
453 * way, xmon output should work too
454 */
455static void __init
456setup_disp_fake_bi(ihandle dp)
457{
458#ifdef CONFIG_BOOTX_TEXT
459 int width = 640, height = 480, depth = 8, pitch;
460 unsigned address;
461 struct pci_reg_property addrs[8];
462 int i, naddrs;
463 char name[32];
464 char *getprop = "getprop";
465
466 prom_print("Initializing fake screen: ");
467
468 memset(name, 0, sizeof(name));
469 call_prom(getprop, 4, 1, dp, "name", name, sizeof(name));
470 name[sizeof(name)-1] = 0;
471 prom_print(name);
472 prom_print("\n");
473 call_prom(getprop, 4, 1, dp, "width", &width, sizeof(width));
474 call_prom(getprop, 4, 1, dp, "height", &height, sizeof(height));
475 call_prom(getprop, 4, 1, dp, "depth", &depth, sizeof(depth));
476 pitch = width * ((depth + 7) / 8);
477 call_prom(getprop, 4, 1, dp, "linebytes",
478 &pitch, sizeof(pitch));
479 if (pitch == 1)
480 pitch = 0x1000; /* for strange IBM display */
481 address = 0;
482 call_prom(getprop, 4, 1, dp, "address",
483 &address, sizeof(address));
484 if (address == 0) {
485 /* look for an assigned address with a size of >= 1MB */
486 naddrs = call_prom(getprop, 4, 1, dp, "assigned-addresses",
487 addrs, sizeof(addrs));
488 naddrs /= sizeof(struct pci_reg_property);
489 for (i = 0; i < naddrs; ++i) {
490 if (addrs[i].size_lo >= (1 << 20)) {
491 address = addrs[i].addr.a_lo;
492 /* use the BE aperture if possible */
493 if (addrs[i].size_lo >= (16 << 20))
494 address += (8 << 20);
495 break;
496 }
497 }
498 if (address == 0) {
499 prom_print("Failed to get address\n");
500 return;
501 }
502 }
503 /* kludge for valkyrie */
504 if (strcmp(name, "valkyrie") == 0)
505 address += 0x1000;
506
507#ifdef CONFIG_POWER4
508#if CONFIG_TASK_SIZE > 0x80000000
509#error CONFIG_TASK_SIZE cannot be above 0x80000000 with BOOTX_TEXT on G5
510#endif
511 {
512 extern boot_infos_t disp_bi;
513 unsigned long va, pa, i, offset;
514 va = 0x90000000;
515 pa = address & 0xfffff000ul;
516 offset = address & 0x00000fff;
517
518 for (i=0; i<0x4000; i++) {
519 make_pte((unsigned long)Hash - KERNELBASE, Hash_size, va, pa,
520 _PAGE_ACCESSED | _PAGE_NO_CACHE |
521 _PAGE_GUARDED | PP_RWXX);
522 va += 0x1000;
523 pa += 0x1000;
524 }
525 btext_setup_display(width, height, depth, pitch, 0x90000000 | offset);
526 disp_bi.dispDeviceBase = (u8 *)address;
527 }
528#else /* CONFIG_POWER4 */
529 btext_setup_display(width, height, depth, pitch, address);
530 btext_prepare_BAT();
531#endif /* CONFIG_POWER4 */
532#endif /* CONFIG_BOOTX_TEXT */
533}
534
535/*
536 * Make a copy of the device tree from the PROM.
537 */
538static unsigned long __init
539copy_device_tree(unsigned long mem_start, unsigned long mem_end)
540{
541 phandle root;
542 unsigned long new_start;
543 struct device_node **allnextp;
544
545 root = call_prom("peer", 1, 1, (phandle)0);
546 if (root == (phandle)0) {
547 prom_print("couldn't get device tree root\n");
548 prom_exit();
549 }
550 allnextp = &allnodes;
551 mem_start = ALIGNUL(mem_start);
552 new_start = inspect_node(root, NULL, mem_start, mem_end, &allnextp);
553 *allnextp = NULL;
554 return new_start;
555}
556
557static unsigned long __init
558inspect_node(phandle node, struct device_node *dad,
559 unsigned long mem_start, unsigned long mem_end,
560 struct device_node ***allnextpp)
561{
562 int l;
563 phandle child;
564 struct device_node *np;
565 struct property *pp, **prev_propp;
566 char *prev_name, *namep;
567 unsigned char *valp;
568
569 np = (struct device_node *) mem_start;
570 mem_start += sizeof(struct device_node);
571 memset(np, 0, sizeof(*np));
572 np->node = node;
573 **allnextpp = PTRUNRELOC(np);
574 *allnextpp = &np->allnext;
575 if (dad != 0) {
576 np->parent = PTRUNRELOC(dad);
577 /* we temporarily use the `next' field as `last_child'. */
578 if (dad->next == 0)
579 dad->child = PTRUNRELOC(np);
580 else
581 dad->next->sibling = PTRUNRELOC(np);
582 dad->next = np;
583 }
584
585 /* get and store all properties */
586 prev_propp = &np->properties;
587 prev_name = "";
588 for (;;) {
589 pp = (struct property *) mem_start;
590 namep = (char *) (pp + 1);
591 pp->name = PTRUNRELOC(namep);
592 if (call_prom("nextprop", 3, 1, node, prev_name, namep) <= 0)
593 break;
594 mem_start = ALIGNUL((unsigned long)namep + strlen(namep) + 1);
595 prev_name = namep;
596 valp = (unsigned char *) mem_start;
597 pp->value = PTRUNRELOC(valp);
598 pp->length = call_prom("getprop", 4, 1, node, namep,
599 valp, mem_end - mem_start);
600 if (pp->length < 0)
601 continue;
602#ifdef MAX_PROPERTY_LENGTH
603 if (pp->length > MAX_PROPERTY_LENGTH)
604 continue; /* ignore this property */
605#endif
606 mem_start = ALIGNUL(mem_start + pp->length);
607 *prev_propp = PTRUNRELOC(pp);
608 prev_propp = &pp->next;
609 }
610 if (np->node != 0) {
611 /* Add a "linux,phandle" property" */
612 pp = (struct property *) mem_start;
613 *prev_propp = PTRUNRELOC(pp);
614 prev_propp = &pp->next;
615 namep = (char *) (pp + 1);
616 pp->name = PTRUNRELOC(namep);
617 strcpy(namep, "linux,phandle");
618 mem_start = ALIGNUL((unsigned long)namep + strlen(namep) + 1);
619 pp->value = (unsigned char *) PTRUNRELOC(&np->node);
620 pp->length = sizeof(np->node);
621 }
622 *prev_propp = NULL;
623
624 /* get the node's full name */
625 l = call_prom("package-to-path", 3, 1, node,
626 mem_start, mem_end - mem_start);
627 if (l >= 0) {
628 char *p, *ep;
629
630 np->full_name = PTRUNRELOC((char *) mem_start);
631 *(char *)(mem_start + l) = 0;
632 /* Fixup an Apple bug where they have bogus \0 chars in the
633 * middle of the path in some properties
634 */
635 for (p = (char *)mem_start, ep = p + l; p < ep; p++)
636 if ((*p) == '\0') {
637 memmove(p, p+1, ep - p);
638 ep--;
639 }
640 mem_start = ALIGNUL(mem_start + l + 1);
641 }
642
643 /* do all our children */
644 child = call_prom("child", 1, 1, node);
645 while (child != 0) {
646 mem_start = inspect_node(child, np, mem_start, mem_end,
647 allnextpp);
648 child = call_prom("peer", 1, 1, child);
649 }
650
651 return mem_start;
652}
653
654unsigned long smp_chrp_cpu_nr __initdata = 0;
655
656/*
657 * With CHRP SMP we need to use the OF to start the other
658 * processors so we can't wait until smp_boot_cpus (the OF is
659 * trashed by then) so we have to put the processors into
660 * a holding pattern controlled by the kernel (not OF) before
661 * we destroy the OF.
662 *
663 * This uses a chunk of high memory, puts some holding pattern
664 * code there and sends the other processors off to there until
665 * smp_boot_cpus tells them to do something. We do that by using
666 * physical address 0x0. The holding pattern checks that address
667 * until its cpu # is there, when it is that cpu jumps to
668 * __secondary_start(). smp_boot_cpus() takes care of setting those
669 * values.
670 *
671 * We also use physical address 0x4 here to tell when a cpu
672 * is in its holding pattern code.
673 *
674 * -- Cort
675 *
676 * Note that we have to do this if we have more than one CPU,
677 * even if this is a UP kernel. Otherwise when we trash OF
678 * the other CPUs will start executing some random instructions
679 * and crash the system. -- paulus
680 */
681static void __init
682prom_hold_cpus(unsigned long mem)
683{
684 extern void __secondary_hold(void);
685 unsigned long i;
686 int cpu;
687 phandle node;
688 char type[16], *path;
689 unsigned int reg;
690
691 /*
692 * XXX: hack to make sure we're chrp, assume that if we're
693 * chrp we have a device_type property -- Cort
694 */
695 node = call_prom("finddevice", 1, 1, "/");
696 if (call_prom("getprop", 4, 1, node,
697 "device_type", type, sizeof(type)) <= 0)
698 return;
699
700 /* copy the holding pattern code to someplace safe (0) */
701 /* the holding pattern is now within the first 0x100
702 bytes of the kernel image -- paulus */
703 memcpy((void *)0, _stext, 0x100);
704 flush_icache_range(0, 0x100);
705
706 /* look for cpus */
707 *(unsigned long *)(0x0) = 0;
708 asm volatile("dcbf 0,%0": : "r" (0) : "memory");
709 for (node = 0; prom_next_node(&node); ) {
710 type[0] = 0;
711 call_prom("getprop", 4, 1, node, "device_type",
712 type, sizeof(type));
713 if (strcmp(type, "cpu") != 0)
714 continue;
715 path = (char *) mem;
716 memset(path, 0, 256);
717 if (call_prom("package-to-path", 3, 1, node, path, 255) < 0)
718 continue;
719 reg = -1;
720 call_prom("getprop", 4, 1, node, "reg", &reg, sizeof(reg));
721 cpu = smp_chrp_cpu_nr++;
722#ifdef CONFIG_SMP
723 smp_hw_index[cpu] = reg;
724#endif /* CONFIG_SMP */
725 /* XXX: hack - don't start cpu 0, this cpu -- Cort */
726 if (cpu == 0)
727 continue;
728 prom_print("starting cpu ");
729 prom_print(path);
730 *(ulong *)(0x4) = 0;
731 call_prom("start-cpu", 3, 0, node,
732 (char *)__secondary_hold - _stext, cpu);
733 prom_print("...");
734 for ( i = 0 ; (i < 10000) && (*(ulong *)(0x4) == 0); i++ )
735 ;
736 if (*(ulong *)(0x4) == cpu)
737 prom_print("ok\n");
738 else {
739 prom_print("failed: ");
740 prom_print_hex(*(ulong *)0x4);
741 prom_print("\n");
742 }
743 }
744}
745
746static void __init
747prom_instantiate_rtas(void)
748{
749 ihandle prom_rtas;
750 prom_arg_t result;
751
752 prom_rtas = call_prom("finddevice", 1, 1, "/rtas");
753 if (prom_rtas == -1)
754 return;
755
756 rtas_size = 0;
757 call_prom("getprop", 4, 1, prom_rtas,
758 "rtas-size", &rtas_size, sizeof(rtas_size));
759 prom_print("instantiating rtas");
760 if (rtas_size == 0) {
761 rtas_data = 0;
762 } else {
763 /*
764 * Ask OF for some space for RTAS.
765 * Actually OF has bugs so we just arbitrarily
766 * use memory at the 6MB point.
767 */
768 rtas_data = 6 << 20;
769 prom_print(" at ");
770 prom_print_hex(rtas_data);
771 }
772
773 prom_rtas = call_prom("open", 1, 1, "/rtas");
774 prom_print("...");
775 rtas_entry = 0;
776 if (call_prom_ret("call-method", 3, 2, &result,
777 "instantiate-rtas", prom_rtas, rtas_data) == 0)
778 rtas_entry = result;
779 if ((rtas_entry == -1) || (rtas_entry == 0))
780 prom_print(" failed\n");
781 else
782 prom_print(" done\n");
783}
784
785/*
786 * We enter here early on, when the Open Firmware prom is still
787 * handling exceptions and the MMU hash table for us.
788 */
789unsigned long __init
790prom_init(int r3, int r4, prom_entry pp)
791{
792 unsigned long mem;
793 ihandle prom_mmu;
794 unsigned long offset = reloc_offset();
795 int i, l;
796 char *p, *d;
797 unsigned long phys;
798 prom_arg_t result[3];
799 char model[32];
800 phandle node;
801 int rc;
802
803 /* Default */
804 phys = (unsigned long) &_stext;
805
806 /* First get a handle for the stdout device */
807 prom = pp;
808 prom_chosen = call_prom("finddevice", 1, 1, "/chosen");
809 if (prom_chosen == -1)
810 prom_exit();
811 if (call_prom("getprop", 4, 1, prom_chosen, "stdout",
812 &prom_stdout, sizeof(prom_stdout)) <= 0)
813 prom_exit();
814
815 /* Get the full OF pathname of the stdout device */
816 mem = (unsigned long) klimit + offset;
817 p = (char *) mem;
818 memset(p, 0, 256);
819 call_prom("instance-to-path", 3, 1, prom_stdout, p, 255);
820 of_stdout_device = p;
821 mem += strlen(p) + 1;
822
823 /* Get the boot device and translate it to a full OF pathname. */
824 p = (char *) mem;
825 l = call_prom("getprop", 4, 1, prom_chosen, "bootpath", p, 1<<20);
826 if (l > 0) {
827 p[l] = 0; /* should already be null-terminated */
828 bootpath = PTRUNRELOC(p);
829 mem += l + 1;
830 d = (char *) mem;
831 *d = 0;
832 call_prom("canon", 3, 1, p, d, 1<<20);
833 bootdevice = PTRUNRELOC(d);
834 mem = ALIGNUL(mem + strlen(d) + 1);
835 }
836
837 prom_instantiate_rtas();
838
839#ifdef CONFIG_POWER4
840 /*
841 * Find out how much memory we have and allocate a
842 * suitably-sized hash table.
843 */
844 prom_alloc_htab();
845#endif
846 mem = check_display(mem);
847
848 prom_print("copying OF device tree...");
849 mem = copy_device_tree(mem, mem + (1<<20));
850 prom_print("done\n");
851
852 prom_hold_cpus(mem);
853
854 klimit = (char *) (mem - offset);
855
856 node = call_prom("finddevice", 1, 1, "/");
857 rc = call_prom("getprop", 4, 1, node, "model", model, sizeof(model));
858 if (rc > 0 && !strncmp (model, "Pegasos", 7)
859 && strncmp (model, "Pegasos2", 8)) {
860 /* Pegasos 1 has a broken translate method in the OF,
861 * and furthermore the BATs are mapped 1:1 so the phys
862 * address calculated above is correct, so let's use
863 * it directly.
864 */
865 } else if (offset == 0) {
866 /* If we are already running at 0xc0000000, we assume we were
867 * loaded by an OF bootloader which did set a BAT for us.
868 * This breaks OF translate so we force phys to be 0.
869 */
870 prom_print("(already at 0xc0000000) phys=0\n");
871 phys = 0;
872 } else if (call_prom("getprop", 4, 1, prom_chosen, "mmu",
873 &prom_mmu, sizeof(prom_mmu)) <= 0) {
874 prom_print(" no MMU found\n");
875 } else if (call_prom_ret("call-method", 4, 4, result, "translate",
876 prom_mmu, &_stext, 1) != 0) {
877 prom_print(" (translate failed)\n");
878 } else {
879 /* We assume the phys. address size is 3 cells */
880 phys = result[2];
881 }
882
883 if (prom_disp_node != 0)
884 setup_disp_fake_bi(prom_disp_node);
885
886 /* Use quiesce call to get OF to shut down any devices it's using */
887 prom_print("Calling quiesce ...\n");
888 call_prom("quiesce", 0, 0);
889
890 /* Relocate various pointers which will be used once the
891 kernel is running at the address it was linked at. */
892 for (i = 0; i < prom_num_displays; ++i)
893 prom_display_paths[i] = PTRUNRELOC(prom_display_paths[i]);
894
895#ifdef CONFIG_SERIAL_CORE_CONSOLE
896 /* Relocate the of stdout for console autodetection */
897 of_stdout_device = PTRUNRELOC(of_stdout_device);
898#endif
899
900 prom_print("returning 0x");
901 prom_print_hex(phys);
902 prom_print("from prom_init\n");
903 prom_stdout = 0;
904
905 return phys;
906}
907
908/*
909 * early_get_property is used to access the device tree image prepared
910 * by BootX very early on, before the pointers in it have been relocated.
911 */
912static void * __init
913early_get_property(unsigned long base, unsigned long node, char *prop)
914{
915 struct device_node *np = (struct device_node *)(base + node);
916 struct property *pp;
917
918 for (pp = np->properties; pp != 0; pp = pp->next) {
919 pp = (struct property *) (base + (unsigned long)pp);
920 if (strcmp((char *)((unsigned long)pp->name + base),
921 prop) == 0) {
922 return (void *)((unsigned long)pp->value + base);
923 }
924 }
925 return NULL;
926}
927
928/* Is boot-info compatible ? */
929#define BOOT_INFO_IS_COMPATIBLE(bi) ((bi)->compatible_version <= BOOT_INFO_VERSION)
930#define BOOT_INFO_IS_V2_COMPATIBLE(bi) ((bi)->version >= 2)
931#define BOOT_INFO_IS_V4_COMPATIBLE(bi) ((bi)->version >= 4)
932
933void __init
934bootx_init(unsigned long r4, unsigned long phys)
935{
936 boot_infos_t *bi = (boot_infos_t *) r4;
937 unsigned long space;
938 unsigned long ptr, x;
939 char *model;
940
941 boot_infos = PTRUNRELOC(bi);
942 if (!BOOT_INFO_IS_V2_COMPATIBLE(bi))
943 bi->logicalDisplayBase = NULL;
944
945#ifdef CONFIG_BOOTX_TEXT
946 btext_init(bi);
947
948 /*
949 * Test if boot-info is compatible. Done only in config
950 * CONFIG_BOOTX_TEXT since there is nothing much we can do
951 * with an incompatible version, except display a message
952 * and eventually hang the processor...
953 *
954 * I'll try to keep enough of boot-info compatible in the
955 * future to always allow display of this message;
956 */
957 if (!BOOT_INFO_IS_COMPATIBLE(bi)) {
958 btext_drawstring(" !!! WARNING - Incompatible version of BootX !!!\n\n\n");
959 btext_flushscreen();
960 }
961#endif /* CONFIG_BOOTX_TEXT */
962
963 /* New BootX enters kernel with MMU off, i/os are not allowed
964 here. This hack will have been done by the boostrap anyway.
965 */
966 if (bi->version < 4) {
967 /*
968 * XXX If this is an iMac, turn off the USB controller.
969 */
970 model = (char *) early_get_property
971 (r4 + bi->deviceTreeOffset, 4, "model");
972 if (model
973 && (strcmp(model, "iMac,1") == 0
974 || strcmp(model, "PowerMac1,1") == 0)) {
975 out_le32((unsigned *)0x80880008, 1); /* XXX */
976 }
977 }
978
979 /* Move klimit to enclose device tree, args, ramdisk, etc... */
980 if (bi->version < 5) {
981 space = bi->deviceTreeOffset + bi->deviceTreeSize;
982 if (bi->ramDisk)
983 space = bi->ramDisk + bi->ramDiskSize;
984 } else
985 space = bi->totalParamsSize;
986 klimit = PTRUNRELOC((char *) bi + space);
987
988 /* New BootX will have flushed all TLBs and enters kernel with
989 MMU switched OFF, so this should not be useful anymore.
990 */
991 if (bi->version < 4) {
992 /*
993 * Touch each page to make sure the PTEs for them
994 * are in the hash table - the aim is to try to avoid
995 * getting DSI exceptions while copying the kernel image.
996 */
997 for (ptr = ((unsigned long) &_stext) & PAGE_MASK;
998 ptr < (unsigned long)bi + space; ptr += PAGE_SIZE)
999 x = *(volatile unsigned long *)ptr;
1000 }
1001
1002#ifdef CONFIG_BOOTX_TEXT
1003 /*
1004 * Note that after we call btext_prepare_BAT, we can't do
1005 * prom_draw*, flushscreen or clearscreen until we turn the MMU
1006 * on, since btext_prepare_BAT sets disp_bi.logicalDisplayBase
1007 * to a virtual address.
1008 */
1009 btext_prepare_BAT();
1010#endif
1011}
diff --git a/arch/ppc/syslib/todc_time.c b/arch/ppc/syslib/todc_time.c
index 1323c641c19d..a8168b8e5683 100644
--- a/arch/ppc/syslib/todc_time.c
+++ b/arch/ppc/syslib/todc_time.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/todc_time.c
3 *
4 * Time of Day Clock support for the M48T35, M48T37, M48T59, and MC146818 2 * Time of Day Clock support for the M48T35, M48T37, M48T59, and MC146818
5 * Real Time Clocks/Timekeepers. 3 * Real Time Clocks/Timekeepers.
6 * 4 *
diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c
index 47f04c71fe9c..e672b600f315 100644
--- a/arch/ppc/syslib/xilinx_pic.c
+++ b/arch/ppc/syslib/xilinx_pic.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * arch/ppc/syslib/xilinx_pic.c
3 *
4 * Interrupt controller driver for Xilinx Virtex-II Pro. 2 * Interrupt controller driver for Xilinx Virtex-II Pro.
5 * 3 *
6 * Author: MontaVista Software, Inc. 4 * Author: MontaVista Software, Inc.
@@ -15,7 +13,7 @@
15#include <linux/init.h> 13#include <linux/init.h>
16#include <linux/irq.h> 14#include <linux/irq.h>
17#include <asm/io.h> 15#include <asm/io.h>
18#include <asm/xparameters.h> 16#include <platforms/4xx/xparameters/xparameters.h>
19#include <asm/ibm4xx.h> 17#include <asm/ibm4xx.h>
20#include <asm/machdep.h> 18#include <asm/machdep.h>
21 19
diff --git a/arch/ppc/xmon/start.c b/arch/ppc/xmon/start.c
index ff86b2d814cb..cfc2d6ad464d 100644
--- a/arch/ppc/xmon/start.c
+++ b/arch/ppc/xmon/start.c
@@ -58,7 +58,7 @@ static struct sysrq_key_op sysrq_xmon_op =
58void 58void
59xmon_map_scc(void) 59xmon_map_scc(void)
60{ 60{
61#ifdef CONFIG_PPC_MULTIPLATFORM 61#ifdef CONFIG_PPC_PREP
62 volatile unsigned char *base; 62 volatile unsigned char *base;
63 63
64#elif defined(CONFIG_GEMINI) 64#elif defined(CONFIG_GEMINI)