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authorEugene Surovegin <ebs@ebshome.net>2005-09-03 18:55:44 -0400
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-05 03:05:58 -0400
commitcce9d7e36f92f2d48de8c701b65ad27e76fedd02 (patch)
treedd871e371519a05de0cd72459eb11262fb3ba095 /arch/ppc
parent5a6a4d4320aed1918bf79dfb6bd841317f33b8e9 (diff)
[PATCH] ppc32: fix EMAC Tx channel assignments for NPe405H
Fix PowerPC NPe405H EMAC Tx channel assignments. EMAC unit in this chip uses common for 4xx "two Tx / one Rx" configuration. Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc')
-rw-r--r--arch/ppc/platforms/4xx/ibmnp405h.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/ppc/platforms/4xx/ibmnp405h.c b/arch/ppc/platforms/4xx/ibmnp405h.c
index ecdc5be6ae28..4937cfb4b5d9 100644
--- a/arch/ppc/platforms/4xx/ibmnp405h.c
+++ b/arch/ppc/platforms/4xx/ibmnp405h.c
@@ -34,7 +34,7 @@ static struct ocp_func_emac_data ibmnp405h_emac1_def = {
34 .zmii_mux = 1, /* ZMII input of this EMAC */ 34 .zmii_mux = 1, /* ZMII input of this EMAC */
35 .mal_idx = 0, /* MAL device index */ 35 .mal_idx = 0, /* MAL device index */
36 .mal_rx_chan = 1, /* MAL rx channel number */ 36 .mal_rx_chan = 1, /* MAL rx channel number */
37 .mal_tx_chan = 1, /* MAL tx channel number */ 37 .mal_tx_chan = 2, /* MAL tx channel number */
38 .wol_irq = 41, /* WOL interrupt number */ 38 .wol_irq = 41, /* WOL interrupt number */
39 .mdio_idx = -1, /* No shared MDIO */ 39 .mdio_idx = -1, /* No shared MDIO */
40 .tah_idx = -1, /* No TAH */ 40 .tah_idx = -1, /* No TAH */
@@ -46,7 +46,7 @@ static struct ocp_func_emac_data ibmnp405h_emac2_def = {
46 .zmii_mux = 2, /* ZMII input of this EMAC */ 46 .zmii_mux = 2, /* ZMII input of this EMAC */
47 .mal_idx = 0, /* MAL device index */ 47 .mal_idx = 0, /* MAL device index */
48 .mal_rx_chan = 2, /* MAL rx channel number */ 48 .mal_rx_chan = 2, /* MAL rx channel number */
49 .mal_tx_chan = 2, /* MAL tx channel number */ 49 .mal_tx_chan = 4, /* MAL tx channel number */
50 .wol_irq = 41, /* WOL interrupt number */ 50 .wol_irq = 41, /* WOL interrupt number */
51 .mdio_idx = -1, /* No shared MDIO */ 51 .mdio_idx = -1, /* No shared MDIO */
52 .tah_idx = -1, /* No TAH */ 52 .tah_idx = -1, /* No TAH */
@@ -58,7 +58,7 @@ static struct ocp_func_emac_data ibmnp405h_emac3_def = {
58 .zmii_mux = 3, /* ZMII input of this EMAC */ 58 .zmii_mux = 3, /* ZMII input of this EMAC */
59 .mal_idx = 0, /* MAL device index */ 59 .mal_idx = 0, /* MAL device index */
60 .mal_rx_chan = 3, /* MAL rx channel number */ 60 .mal_rx_chan = 3, /* MAL rx channel number */
61 .mal_tx_chan = 3, /* MAL tx channel number */ 61 .mal_tx_chan = 6, /* MAL tx channel number */
62 .wol_irq = 41, /* WOL interrupt number */ 62 .wol_irq = 41, /* WOL interrupt number */
63 .mdio_idx = -1, /* No shared MDIO */ 63 .mdio_idx = -1, /* No shared MDIO */
64 .tah_idx = -1, /* No TAH */ 64 .tah_idx = -1, /* No TAH */