aboutsummaryrefslogtreecommitdiffstats
path: root/arch/ppc
diff options
context:
space:
mode:
authorJeff Garzik <jgarzik@pobox.com>2005-09-14 08:19:08 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-09-14 08:19:08 -0400
commit905ec87e93bc9e01b15c60035cd6a50c636cbaef (patch)
tree46fd7618d6511611ffc19eb0dd4d7bc6b90a41c2 /arch/ppc
parent1d6ae775d7a948c9575658eb41184fd2e506c0df (diff)
parent2f4ba45a75d6383b4a1201169a808ffea416ffa0 (diff)
Merge /spare/repo/linux-2.6/
Diffstat (limited to 'arch/ppc')
-rw-r--r--arch/ppc/8xx_io/cs4218_tdm.c2
-rw-r--r--arch/ppc/Kconfig19
-rw-r--r--arch/ppc/Makefile28
-rw-r--r--arch/ppc/boot/common/ns16550.c8
-rw-r--r--arch/ppc/boot/common/util.S2
-rw-r--r--arch/ppc/kernel/Makefile3
-rw-r--r--arch/ppc/kernel/cpu_setup_6xx.S3
-rw-r--r--arch/ppc/kernel/cpu_setup_power4.S3
-rw-r--r--arch/ppc/kernel/dma-mapping.c2
-rw-r--r--arch/ppc/kernel/entry.S2
-rw-r--r--arch/ppc/kernel/fpu.S2
-rw-r--r--arch/ppc/kernel/head.S30
-rw-r--r--arch/ppc/kernel/head_44x.S2
-rw-r--r--arch/ppc/kernel/head_4xx.S3
-rw-r--r--arch/ppc/kernel/head_8xx.S2
-rw-r--r--arch/ppc/kernel/head_fsl_booke.S2
-rw-r--r--arch/ppc/kernel/idle.c6
-rw-r--r--arch/ppc/kernel/idle_6xx.S2
-rw-r--r--arch/ppc/kernel/idle_power4.S2
-rw-r--r--arch/ppc/kernel/misc.S2
-rw-r--r--arch/ppc/kernel/pci.c1
-rw-r--r--arch/ppc/kernel/smp.c44
-rw-r--r--arch/ppc/kernel/swsusp.S2
-rw-r--r--arch/ppc/kernel/syscalls.c4
-rw-r--r--arch/ppc/kernel/traps.c24
-rw-r--r--arch/ppc/lib/Makefile1
-rw-r--r--arch/ppc/lib/dec_and_lock.c8
-rw-r--r--arch/ppc/mm/fault.c6
-rw-r--r--arch/ppc/mm/hashtable.S2
-rw-r--r--arch/ppc/platforms/4xx/ebony.c13
-rw-r--r--arch/ppc/platforms/hdpu.c2
-rw-r--r--arch/ppc/platforms/pmac_sleep.S4
-rw-r--r--arch/ppc/platforms/pmac_smp.c85
-rw-r--r--arch/ppc/syslib/cpc700_pic.c12
-rw-r--r--arch/ppc/syslib/i8259.c13
-rw-r--r--arch/ppc/syslib/ibm440gx_common.c7
-rw-r--r--arch/ppc/syslib/mpc10x_common.c4
-rw-r--r--arch/ppc/syslib/mpc83xx_devices.c2
-rw-r--r--arch/ppc/syslib/mpc85xx_devices.c2
-rw-r--r--arch/ppc/syslib/mv64x60.c2
-rw-r--r--arch/ppc/syslib/open_pic2.c12
-rw-r--r--arch/ppc/syslib/ppc403_pic.c11
-rw-r--r--arch/ppc/syslib/qspan_pci.c2
-rw-r--r--arch/ppc/syslib/xilinx_pic.c13
44 files changed, 218 insertions, 183 deletions
diff --git a/arch/ppc/8xx_io/cs4218_tdm.c b/arch/ppc/8xx_io/cs4218_tdm.c
index 89fe0ceeaa40..2ca9ec7ec3a7 100644
--- a/arch/ppc/8xx_io/cs4218_tdm.c
+++ b/arch/ppc/8xx_io/cs4218_tdm.c
@@ -1380,7 +1380,7 @@ static void cs_nosound(unsigned long xx)
1380 spin_unlock_irqrestore(&cs4218_lock, flags); 1380 spin_unlock_irqrestore(&cs4218_lock, flags);
1381} 1381}
1382 1382
1383static struct timer_list beep_timer = TIMER_INITIALIZER(cs_nosound, 0, 0); 1383static DEFINE_TIMER(beep_timer, cs_nosound, 0, 0);
1384}; 1384};
1385 1385
1386static void cs_mksound(unsigned int hz, unsigned int ticks) 1386static void cs_mksound(unsigned int hz, unsigned int ticks)
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 6ab7e5ea5fcf..347ea284140b 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -265,6 +265,15 @@ config PPC601_SYNC_FIX
265 265
266 If in doubt, say Y here. 266 If in doubt, say Y here.
267 267
268config HOTPLUG_CPU
269 bool "Support for enabling/disabling CPUs"
270 depends on SMP && HOTPLUG && EXPERIMENTAL && PPC_PMAC
271 ---help---
272 Say Y here to be able to disable and re-enable individual
273 CPUs at runtime on SMP machines.
274
275 Say N if you are unsure.
276
268source arch/ppc/platforms/4xx/Kconfig 277source arch/ppc/platforms/4xx/Kconfig
269source arch/ppc/platforms/85xx/Kconfig 278source arch/ppc/platforms/85xx/Kconfig
270 279
@@ -499,11 +508,6 @@ config WINCEPT
499 MPC821 PowerPC, introduced in 1998 and designed to be used in 508 MPC821 PowerPC, introduced in 1998 and designed to be used in
500 thin-client machines. Say Y to support it directly. 509 thin-client machines. Say Y to support it directly.
501 510
502 Be aware that PCI buses can only function when SYS board is plugged
503 into the PIB (Platform IO Board) board from Freescale which provide
504 3 PCI slots. The PIBs PCI initialization is the bootloader's
505 responsiblilty.
506
507endchoice 511endchoice
508 512
509choice 513choice
@@ -680,6 +684,11 @@ config MPC834x_SYS
680 help 684 help
681 This option enables support for the MPC 834x SYS evaluation board. 685 This option enables support for the MPC 834x SYS evaluation board.
682 686
687 Be aware that PCI buses can only function when SYS board is plugged
688 into the PIB (Platform IO Board) board from Freescale which provide
689 3 PCI slots. The PIBs PCI initialization is the bootloader's
690 responsiblilty.
691
683config EV64360 692config EV64360
684 bool "Marvell-EV64360BP" 693 bool "Marvell-EV64360BP"
685 help 694 help
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index d1b6e6dcb504..16e2675f3270 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -21,13 +21,14 @@ CC := $(CC) -m32
21endif 21endif
22 22
23LDFLAGS_vmlinux := -Ttext $(KERNELLOAD) -Bstatic 23LDFLAGS_vmlinux := -Ttext $(KERNELLOAD) -Bstatic
24CPPFLAGS += -Iarch/$(ARCH) -Iinclude3 24# The -Iarch/$(ARCH)/include is temporary while we are merging
25CPPFLAGS += -Iarch/$(ARCH) -Iarch/$(ARCH)/include
25AFLAGS += -Iarch/$(ARCH) 26AFLAGS += -Iarch/$(ARCH)
26CFLAGS += -Iarch/$(ARCH) -msoft-float -pipe \ 27CFLAGS += -Iarch/$(ARCH) -msoft-float -pipe \
27 -ffixed-r2 -mmultiple 28 -ffixed-r2 -mmultiple
28CPP = $(CC) -E $(CFLAGS) 29CPP = $(CC) -E $(CFLAGS)
29# Temporary hack until we have migrated to asm-powerpc 30# Temporary hack until we have migrated to asm-powerpc
30LINUXINCLUDE += -Iinclude3 31LINUXINCLUDE += -Iarch/$(ARCH)/include
31 32
32CHECKFLAGS += -D__powerpc__ 33CHECKFLAGS += -D__powerpc__
33 34
@@ -103,21 +104,16 @@ endef
103 104
104archclean: 105archclean:
105 $(Q)$(MAKE) $(clean)=arch/ppc/boot 106 $(Q)$(MAKE) $(clean)=arch/ppc/boot
106 $(Q)rm -rf include3 107 # Temporary hack until we have migrated to asm-powerpc
108 $(Q)rm -rf arch/$(ARCH)/include
107 109
108prepare: include/asm-$(ARCH)/offsets.h checkbin 110archprepare: checkbin
109
110arch/$(ARCH)/kernel/asm-offsets.s: include/asm include/linux/version.h \
111 include/config/MARKER
112
113include/asm-$(ARCH)/offsets.h: arch/$(ARCH)/kernel/asm-offsets.s
114 $(call filechk,gen-asm-offsets)
115 111
116# Temporary hack until we have migrated to asm-powerpc 112# Temporary hack until we have migrated to asm-powerpc
117include/asm: include3/asm 113include/asm: arch/$(ARCH)/include/asm
118include3/asm: 114arch/$(ARCH)/include/asm:
119 $(Q)if [ ! -d include3 ]; then mkdir -p include3; fi 115 $(Q)if [ ! -d arch/$(ARCH)/include ]; then mkdir -p arch/$(ARCH)/include; fi
120 $(Q)ln -fsn $(srctree)/include/asm-powerpc include3/asm 116 $(Q)ln -fsn $(srctree)/include/asm-powerpc arch/$(ARCH)/include/asm
121 117
122# Use the file '.tmp_gas_check' for binutils tests, as gas won't output 118# Use the file '.tmp_gas_check' for binutils tests, as gas won't output
123# to stdout and these checks are run even on install targets. 119# to stdout and these checks are run even on install targets.
@@ -143,7 +139,5 @@ checkbin:
143 false ; \ 139 false ; \
144 fi 140 fi
145 141
146CLEAN_FILES += include/asm-$(ARCH)/offsets.h \ 142CLEAN_FILES += $(TOUT)
147 arch/$(ARCH)/kernel/asm-offsets.s \
148 $(TOUT)
149 143
diff --git a/arch/ppc/boot/common/ns16550.c b/arch/ppc/boot/common/ns16550.c
index 9017c547a6f6..26818bbb6cff 100644
--- a/arch/ppc/boot/common/ns16550.c
+++ b/arch/ppc/boot/common/ns16550.c
@@ -23,7 +23,7 @@ static int shift;
23 23
24unsigned long serial_init(int chan, void *ignored) 24unsigned long serial_init(int chan, void *ignored)
25{ 25{
26 unsigned long com_port; 26 unsigned long com_port, base_baud;
27 unsigned char lcr, dlm; 27 unsigned char lcr, dlm;
28 28
29 /* We need to find out which type io we're expecting. If it's 29 /* We need to find out which type io we're expecting. If it's
@@ -43,6 +43,8 @@ unsigned long serial_init(int chan, void *ignored)
43 43
44 /* How far apart the registers are. */ 44 /* How far apart the registers are. */
45 shift = rs_table[chan].iomem_reg_shift; 45 shift = rs_table[chan].iomem_reg_shift;
46 /* Base baud.. */
47 base_baud = rs_table[chan].baud_base;
46 48
47 /* save the LCR */ 49 /* save the LCR */
48 lcr = inb(com_port + (UART_LCR << shift)); 50 lcr = inb(com_port + (UART_LCR << shift));
@@ -62,9 +64,9 @@ unsigned long serial_init(int chan, void *ignored)
62 else { 64 else {
63 /* Input clock. */ 65 /* Input clock. */
64 outb(com_port + (UART_DLL << shift), 66 outb(com_port + (UART_DLL << shift),
65 (BASE_BAUD / SERIAL_BAUD) & 0xFF); 67 (base_baud / SERIAL_BAUD) & 0xFF);
66 outb(com_port + (UART_DLM << shift), 68 outb(com_port + (UART_DLM << shift),
67 (BASE_BAUD / SERIAL_BAUD) >> 8); 69 (base_baud / SERIAL_BAUD) >> 8);
68 /* 8 data, 1 stop, no parity */ 70 /* 8 data, 1 stop, no parity */
69 outb(com_port + (UART_LCR << shift), 0x03); 71 outb(com_port + (UART_LCR << shift), 0x03);
70 /* RTS/DTR */ 72 /* RTS/DTR */
diff --git a/arch/ppc/boot/common/util.S b/arch/ppc/boot/common/util.S
index 47e641455bc5..c96c9f80521e 100644
--- a/arch/ppc/boot/common/util.S
+++ b/arch/ppc/boot/common/util.S
@@ -252,7 +252,7 @@ _GLOBAL(flush_instruction_cache)
2521: dcbf r0,r3 # Flush the data cache 2521: dcbf r0,r3 # Flush the data cache
253 icbi r0,r3 # Invalidate the instruction cache 253 icbi r0,r3 # Invalidate the instruction cache
254 addi r3,r3,0x10 # Increment by one cache line 254 addi r3,r3,0x10 # Increment by one cache line
255 cmplwi cr0,r3,r4 # Are we at the end yet? 255 cmplw cr0,r3,r4 # Are we at the end yet?
256 blt 1b # No, keep flushing and invalidating 256 blt 1b # No, keep flushing and invalidating
257#else 257#else
258 /* Enable, invalidate and then disable the L1 icache/dcache. */ 258 /* Enable, invalidate and then disable the L1 icache/dcache. */
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index b1457a8a9c0f..1fb92f16acd6 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -15,8 +15,9 @@ extra-y += vmlinux.lds
15obj-y := entry.o traps.o irq.o idle.o time.o misc.o \ 15obj-y := entry.o traps.o irq.o idle.o time.o misc.o \
16 process.o signal.o ptrace.o align.o \ 16 process.o signal.o ptrace.o align.o \
17 semaphore.o syscalls.o setup.o \ 17 semaphore.o syscalls.o setup.o \
18 cputable.o ppc_htab.o perfmon.o 18 cputable.o ppc_htab.o
19obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o 19obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o
20obj-$(CONFIG_E500) += perfmon.o
20obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o 21obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
21obj-$(CONFIG_POWER4) += cpu_setup_power4.o 22obj-$(CONFIG_POWER4) += cpu_setup_power4.o
22obj-$(CONFIG_MODULES) += module.o ppc_ksyms.o 23obj-$(CONFIG_MODULES) += module.o ppc_ksyms.o
diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S
index bd037caa4055..ba396438ede3 100644
--- a/arch/ppc/kernel/cpu_setup_6xx.S
+++ b/arch/ppc/kernel/cpu_setup_6xx.S
@@ -12,10 +12,9 @@
12#include <linux/config.h> 12#include <linux/config.h>
13#include <asm/processor.h> 13#include <asm/processor.h>
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/ppc_asm.h>
16#include <asm/cputable.h> 15#include <asm/cputable.h>
17#include <asm/ppc_asm.h> 16#include <asm/ppc_asm.h>
18#include <asm/offsets.h> 17#include <asm/asm-offsets.h>
19#include <asm/cache.h> 18#include <asm/cache.h>
20 19
21_GLOBAL(__setup_cpu_601) 20_GLOBAL(__setup_cpu_601)
diff --git a/arch/ppc/kernel/cpu_setup_power4.S b/arch/ppc/kernel/cpu_setup_power4.S
index f2ea1a990f17..7e4fbb653724 100644
--- a/arch/ppc/kernel/cpu_setup_power4.S
+++ b/arch/ppc/kernel/cpu_setup_power4.S
@@ -14,8 +14,7 @@
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/ppc_asm.h> 15#include <asm/ppc_asm.h>
16#include <asm/cputable.h> 16#include <asm/cputable.h>
17#include <asm/ppc_asm.h> 17#include <asm/asm-offsets.h>
18#include <asm/offsets.h>
19#include <asm/cache.h> 18#include <asm/cache.h>
20 19
21_GLOBAL(__970_cpu_preinit) 20_GLOBAL(__970_cpu_preinit)
diff --git a/arch/ppc/kernel/dma-mapping.c b/arch/ppc/kernel/dma-mapping.c
index e0c631cf96b0..b566d982806c 100644
--- a/arch/ppc/kernel/dma-mapping.c
+++ b/arch/ppc/kernel/dma-mapping.c
@@ -393,7 +393,7 @@ EXPORT_SYMBOL(__dma_sync);
393 * __dma_sync_page() implementation for systems using highmem. 393 * __dma_sync_page() implementation for systems using highmem.
394 * In this case, each page of a buffer must be kmapped/kunmapped 394 * In this case, each page of a buffer must be kmapped/kunmapped
395 * in order to have a virtual address for __dma_sync(). This must 395 * in order to have a virtual address for __dma_sync(). This must
396 * not sleep so kmap_atmomic()/kunmap_atomic() are used. 396 * not sleep so kmap_atomic()/kunmap_atomic() are used.
397 * 397 *
398 * Note: yes, it is possible and correct to have a buffer extend 398 * Note: yes, it is possible and correct to have a buffer extend
399 * beyond the first page. 399 * beyond the first page.
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
index cb83045e2edf..03d4886869f3 100644
--- a/arch/ppc/kernel/entry.S
+++ b/arch/ppc/kernel/entry.S
@@ -29,7 +29,7 @@
29#include <asm/cputable.h> 29#include <asm/cputable.h>
30#include <asm/thread_info.h> 30#include <asm/thread_info.h>
31#include <asm/ppc_asm.h> 31#include <asm/ppc_asm.h>
32#include <asm/offsets.h> 32#include <asm/asm-offsets.h>
33#include <asm/unistd.h> 33#include <asm/unistd.h>
34 34
35#undef SHOW_SYSCALLS 35#undef SHOW_SYSCALLS
diff --git a/arch/ppc/kernel/fpu.S b/arch/ppc/kernel/fpu.S
index 6189b26f640f..665d7d34304c 100644
--- a/arch/ppc/kernel/fpu.S
+++ b/arch/ppc/kernel/fpu.S
@@ -18,7 +18,7 @@
18#include <asm/cache.h> 18#include <asm/cache.h>
19#include <asm/thread_info.h> 19#include <asm/thread_info.h>
20#include <asm/ppc_asm.h> 20#include <asm/ppc_asm.h>
21#include <asm/offsets.h> 21#include <asm/asm-offsets.h>
22 22
23/* 23/*
24 * This task wants to use the FPU now. 24 * This task wants to use the FPU now.
diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
index a931d773715f..1960fb8c259c 100644
--- a/arch/ppc/kernel/head.S
+++ b/arch/ppc/kernel/head.S
@@ -31,7 +31,7 @@
31#include <asm/cache.h> 31#include <asm/cache.h>
32#include <asm/thread_info.h> 32#include <asm/thread_info.h>
33#include <asm/ppc_asm.h> 33#include <asm/ppc_asm.h>
34#include <asm/offsets.h> 34#include <asm/asm-offsets.h>
35 35
36#ifdef CONFIG_APUS 36#ifdef CONFIG_APUS
37#include <asm/amigappc.h> 37#include <asm/amigappc.h>
@@ -1023,23 +1023,21 @@ __secondary_start_gemini:
1023 andc r4,r4,r3 1023 andc r4,r4,r3
1024 mtspr SPRN_HID0,r4 1024 mtspr SPRN_HID0,r4
1025 sync 1025 sync
1026 bl gemini_prom_init
1027 b __secondary_start 1026 b __secondary_start
1028#endif /* CONFIG_GEMINI */ 1027#endif /* CONFIG_GEMINI */
1029 .globl __secondary_start_psurge 1028
1030__secondary_start_psurge: 1029 .globl __secondary_start_pmac_0
1031 li r24,1 /* cpu # */ 1030__secondary_start_pmac_0:
1032 b __secondary_start_psurge99 1031 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
1033 .globl __secondary_start_psurge2 1032 li r24,0
1034__secondary_start_psurge2: 1033 b 1f
1035 li r24,2 /* cpu # */ 1034 li r24,1
1036 b __secondary_start_psurge99 1035 b 1f
1037 .globl __secondary_start_psurge3 1036 li r24,2
1038__secondary_start_psurge3: 1037 b 1f
1039 li r24,3 /* cpu # */ 1038 li r24,3
1040 b __secondary_start_psurge99 10391:
1041__secondary_start_psurge99: 1040 /* on powersurge, we come in here with IR=0 and DR=1, and DBAT 0
1042 /* we come in here with IR=0 and DR=1, and DBAT 0
1043 set to map the 0xf0000000 - 0xffffffff region */ 1041 set to map the 0xf0000000 - 0xffffffff region */
1044 mfmsr r0 1042 mfmsr r0
1045 rlwinm r0,r0,0,28,26 /* clear DR (0x10) */ 1043 rlwinm r0,r0,0,28,26 /* clear DR (0x10) */
diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
index 9e68e32edb60..599245b0407e 100644
--- a/arch/ppc/kernel/head_44x.S
+++ b/arch/ppc/kernel/head_44x.S
@@ -40,7 +40,7 @@
40#include <asm/cputable.h> 40#include <asm/cputable.h>
41#include <asm/thread_info.h> 41#include <asm/thread_info.h>
42#include <asm/ppc_asm.h> 42#include <asm/ppc_asm.h>
43#include <asm/offsets.h> 43#include <asm/asm-offsets.h>
44#include "head_booke.h" 44#include "head_booke.h"
45 45
46 46
diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S
index 0a5e723d3be6..8562b807b37c 100644
--- a/arch/ppc/kernel/head_4xx.S
+++ b/arch/ppc/kernel/head_4xx.S
@@ -40,7 +40,7 @@
40#include <asm/cputable.h> 40#include <asm/cputable.h>
41#include <asm/thread_info.h> 41#include <asm/thread_info.h>
42#include <asm/ppc_asm.h> 42#include <asm/ppc_asm.h>
43#include <asm/offsets.h> 43#include <asm/asm-offsets.h>
44 44
45/* As with the other PowerPC ports, it is expected that when code 45/* As with the other PowerPC ports, it is expected that when code
46 * execution begins here, the following registers contain valid, yet 46 * execution begins here, the following registers contain valid, yet
@@ -453,6 +453,7 @@ label:
453#else 453#else
454 CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException) 454 CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException)
455#endif 455#endif
456#endif
456 457
457/* 0x1100 - Data TLB Miss Exception 458/* 0x1100 - Data TLB Miss Exception
458 * As the name implies, translation is not in the MMU, so search the 459 * As the name implies, translation is not in the MMU, so search the
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index eb18cadb3755..cb1a3a54a026 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -30,7 +30,7 @@
30#include <asm/cputable.h> 30#include <asm/cputable.h>
31#include <asm/thread_info.h> 31#include <asm/thread_info.h>
32#include <asm/ppc_asm.h> 32#include <asm/ppc_asm.h>
33#include <asm/offsets.h> 33#include <asm/asm-offsets.h>
34 34
35/* Macro to make the code more readable. */ 35/* Macro to make the code more readable. */
36#ifdef CONFIG_8xx_CPU6 36#ifdef CONFIG_8xx_CPU6
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
index 4028f4c7d978..8e52e8408316 100644
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ b/arch/ppc/kernel/head_fsl_booke.S
@@ -41,7 +41,7 @@
41#include <asm/cputable.h> 41#include <asm/cputable.h>
42#include <asm/thread_info.h> 42#include <asm/thread_info.h>
43#include <asm/ppc_asm.h> 43#include <asm/ppc_asm.h>
44#include <asm/offsets.h> 44#include <asm/asm-offsets.h>
45#include "head_booke.h" 45#include "head_booke.h"
46 46
47/* As with the other PowerPC ports, it is expected that when code 47/* As with the other PowerPC ports, it is expected that when code
diff --git a/arch/ppc/kernel/idle.c b/arch/ppc/kernel/idle.c
index 53547b6de45b..fba29c876b62 100644
--- a/arch/ppc/kernel/idle.c
+++ b/arch/ppc/kernel/idle.c
@@ -22,6 +22,7 @@
22#include <linux/ptrace.h> 22#include <linux/ptrace.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/sysctl.h> 24#include <linux/sysctl.h>
25#include <linux/cpu.h>
25 26
26#include <asm/pgtable.h> 27#include <asm/pgtable.h>
27#include <asm/uaccess.h> 28#include <asm/uaccess.h>
@@ -35,6 +36,7 @@
35void default_idle(void) 36void default_idle(void)
36{ 37{
37 void (*powersave)(void); 38 void (*powersave)(void);
39 int cpu = smp_processor_id();
38 40
39 powersave = ppc_md.power_save; 41 powersave = ppc_md.power_save;
40 42
@@ -44,7 +46,7 @@ void default_idle(void)
44#ifdef CONFIG_SMP 46#ifdef CONFIG_SMP
45 else { 47 else {
46 set_thread_flag(TIF_POLLING_NRFLAG); 48 set_thread_flag(TIF_POLLING_NRFLAG);
47 while (!need_resched()) 49 while (!need_resched() && !cpu_is_offline(cpu))
48 barrier(); 50 barrier();
49 clear_thread_flag(TIF_POLLING_NRFLAG); 51 clear_thread_flag(TIF_POLLING_NRFLAG);
50 } 52 }
@@ -52,6 +54,8 @@ void default_idle(void)
52 } 54 }
53 if (need_resched()) 55 if (need_resched())
54 schedule(); 56 schedule();
57 if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
58 cpu_die();
55} 59}
56 60
57/* 61/*
diff --git a/arch/ppc/kernel/idle_6xx.S b/arch/ppc/kernel/idle_6xx.S
index 25d009c75f7b..1a2194cf6828 100644
--- a/arch/ppc/kernel/idle_6xx.S
+++ b/arch/ppc/kernel/idle_6xx.S
@@ -20,7 +20,7 @@
20#include <asm/cputable.h> 20#include <asm/cputable.h>
21#include <asm/thread_info.h> 21#include <asm/thread_info.h>
22#include <asm/ppc_asm.h> 22#include <asm/ppc_asm.h>
23#include <asm/offsets.h> 23#include <asm/asm-offsets.h>
24 24
25#undef DEBUG 25#undef DEBUG
26 26
diff --git a/arch/ppc/kernel/idle_power4.S b/arch/ppc/kernel/idle_power4.S
index 73a58ff03900..cc0d535365cd 100644
--- a/arch/ppc/kernel/idle_power4.S
+++ b/arch/ppc/kernel/idle_power4.S
@@ -20,7 +20,7 @@
20#include <asm/cputable.h> 20#include <asm/cputable.h>
21#include <asm/thread_info.h> 21#include <asm/thread_info.h>
22#include <asm/ppc_asm.h> 22#include <asm/ppc_asm.h>
23#include <asm/offsets.h> 23#include <asm/asm-offsets.h>
24 24
25#undef DEBUG 25#undef DEBUG
26 26
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index ce71b4a01585..90d917d2e856 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -23,7 +23,7 @@
23#include <asm/mmu.h> 23#include <asm/mmu.h>
24#include <asm/ppc_asm.h> 24#include <asm/ppc_asm.h>
25#include <asm/thread_info.h> 25#include <asm/thread_info.h>
26#include <asm/offsets.h> 26#include <asm/asm-offsets.h>
27 27
28 .text 28 .text
29 29
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
index 7b3586a3bf30..854e45beb387 100644
--- a/arch/ppc/kernel/pci.c
+++ b/arch/ppc/kernel/pci.c
@@ -80,7 +80,6 @@ fixup_broken_pcnet32(struct pci_dev* dev)
80 if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { 80 if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
81 dev->vendor = PCI_VENDOR_ID_AMD; 81 dev->vendor = PCI_VENDOR_ID_AMD;
82 pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD); 82 pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD);
83 pci_name_device(dev);
84 } 83 }
85} 84}
86DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32); 85DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32);
diff --git a/arch/ppc/kernel/smp.c b/arch/ppc/kernel/smp.c
index e70b587b9e51..726fe7ce1747 100644
--- a/arch/ppc/kernel/smp.c
+++ b/arch/ppc/kernel/smp.c
@@ -45,6 +45,7 @@ cpumask_t cpu_online_map;
45cpumask_t cpu_possible_map; 45cpumask_t cpu_possible_map;
46int smp_hw_index[NR_CPUS]; 46int smp_hw_index[NR_CPUS];
47struct thread_info *secondary_ti; 47struct thread_info *secondary_ti;
48static struct task_struct *idle_tasks[NR_CPUS];
48 49
49EXPORT_SYMBOL(cpu_online_map); 50EXPORT_SYMBOL(cpu_online_map);
50EXPORT_SYMBOL(cpu_possible_map); 51EXPORT_SYMBOL(cpu_possible_map);
@@ -286,7 +287,8 @@ static void __devinit smp_store_cpu_info(int id)
286 287
287void __init smp_prepare_cpus(unsigned int max_cpus) 288void __init smp_prepare_cpus(unsigned int max_cpus)
288{ 289{
289 int num_cpus, i; 290 int num_cpus, i, cpu;
291 struct task_struct *p;
290 292
291 /* Fixup boot cpu */ 293 /* Fixup boot cpu */
292 smp_store_cpu_info(smp_processor_id()); 294 smp_store_cpu_info(smp_processor_id());
@@ -308,6 +310,17 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
308 310
309 if (smp_ops->space_timers) 311 if (smp_ops->space_timers)
310 smp_ops->space_timers(num_cpus); 312 smp_ops->space_timers(num_cpus);
313
314 for_each_cpu(cpu) {
315 if (cpu == smp_processor_id())
316 continue;
317 /* create a process for the processor */
318 p = fork_idle(cpu);
319 if (IS_ERR(p))
320 panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
321 p->thread_info->cpu = cpu;
322 idle_tasks[cpu] = p;
323 }
311} 324}
312 325
313void __devinit smp_prepare_boot_cpu(void) 326void __devinit smp_prepare_boot_cpu(void)
@@ -334,12 +347,17 @@ int __devinit start_secondary(void *unused)
334 set_dec(tb_ticks_per_jiffy); 347 set_dec(tb_ticks_per_jiffy);
335 cpu_callin_map[cpu] = 1; 348 cpu_callin_map[cpu] = 1;
336 349
337 printk("CPU %i done callin...\n", cpu); 350 printk("CPU %d done callin...\n", cpu);
338 smp_ops->setup_cpu(cpu); 351 smp_ops->setup_cpu(cpu);
339 printk("CPU %i done setup...\n", cpu); 352 printk("CPU %d done setup...\n", cpu);
340 local_irq_enable();
341 smp_ops->take_timebase(); 353 smp_ops->take_timebase();
342 printk("CPU %i done timebase take...\n", cpu); 354 printk("CPU %d done timebase take...\n", cpu);
355
356 spin_lock(&call_lock);
357 cpu_set(cpu, cpu_online_map);
358 spin_unlock(&call_lock);
359
360 local_irq_enable();
343 361
344 cpu_idle(); 362 cpu_idle();
345 return 0; 363 return 0;
@@ -347,17 +365,11 @@ int __devinit start_secondary(void *unused)
347 365
348int __cpu_up(unsigned int cpu) 366int __cpu_up(unsigned int cpu)
349{ 367{
350 struct task_struct *p;
351 char buf[32]; 368 char buf[32];
352 int c; 369 int c;
353 370
354 /* create a process for the processor */ 371 secondary_ti = idle_tasks[cpu]->thread_info;
355 /* only regs.msr is actually used, and 0 is OK for it */ 372 mb();
356 p = fork_idle(cpu);
357 if (IS_ERR(p))
358 panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
359 secondary_ti = p->thread_info;
360 p->thread_info->cpu = cpu;
361 373
362 /* 374 /*
363 * There was a cache flush loop here to flush the cache 375 * There was a cache flush loop here to flush the cache
@@ -389,7 +401,11 @@ int __cpu_up(unsigned int cpu)
389 printk("Processor %d found.\n", cpu); 401 printk("Processor %d found.\n", cpu);
390 402
391 smp_ops->give_timebase(); 403 smp_ops->give_timebase();
392 cpu_set(cpu, cpu_online_map); 404
405 /* Wait until cpu puts itself in the online map */
406 while (!cpu_online(cpu))
407 cpu_relax();
408
393 return 0; 409 return 0;
394} 410}
395 411
diff --git a/arch/ppc/kernel/swsusp.S b/arch/ppc/kernel/swsusp.S
index 55148bb88d39..69773cc1a85f 100644
--- a/arch/ppc/kernel/swsusp.S
+++ b/arch/ppc/kernel/swsusp.S
@@ -5,7 +5,7 @@
5#include <asm/cputable.h> 5#include <asm/cputable.h>
6#include <asm/thread_info.h> 6#include <asm/thread_info.h>
7#include <asm/ppc_asm.h> 7#include <asm/ppc_asm.h>
8#include <asm/offsets.h> 8#include <asm/asm-offsets.h>
9 9
10 10
11/* 11/*
diff --git a/arch/ppc/kernel/syscalls.c b/arch/ppc/kernel/syscalls.c
index 124313ce3c09..127f040de9de 100644
--- a/arch/ppc/kernel/syscalls.c
+++ b/arch/ppc/kernel/syscalls.c
@@ -41,10 +41,6 @@
41#include <asm/ipc.h> 41#include <asm/ipc.h>
42#include <asm/semaphore.h> 42#include <asm/semaphore.h>
43 43
44void
45check_bugs(void)
46{
47}
48 44
49/* 45/*
50 * sys_ipc() is the de-multiplexer for the SysV IPC calls.. 46 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index d87423d1003a..961ede87be72 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -118,6 +118,28 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
118 info.si_code = code; 118 info.si_code = code;
119 info.si_addr = (void __user *) addr; 119 info.si_addr = (void __user *) addr;
120 force_sig_info(signr, &info, current); 120 force_sig_info(signr, &info, current);
121
122 /*
123 * Init gets no signals that it doesn't have a handler for.
124 * That's all very well, but if it has caused a synchronous
125 * exception and we ignore the resulting signal, it will just
126 * generate the same exception over and over again and we get
127 * nowhere. Better to kill it and let the kernel panic.
128 */
129 if (current->pid == 1) {
130 __sighandler_t handler;
131
132 spin_lock_irq(&current->sighand->siglock);
133 handler = current->sighand->action[signr-1].sa.sa_handler;
134 spin_unlock_irq(&current->sighand->siglock);
135 if (handler == SIG_DFL) {
136 /* init has generated a synchronous exception
137 and it doesn't have a handler for the signal */
138 printk(KERN_CRIT "init has generated signal %d "
139 "but has no handler for it\n", signr);
140 do_exit(signr);
141 }
142 }
121} 143}
122 144
123/* 145/*
@@ -849,10 +871,12 @@ void AltivecAssistException(struct pt_regs *regs)
849} 871}
850#endif /* CONFIG_ALTIVEC */ 872#endif /* CONFIG_ALTIVEC */
851 873
874#ifdef CONFIG_E500
852void PerformanceMonitorException(struct pt_regs *regs) 875void PerformanceMonitorException(struct pt_regs *regs)
853{ 876{
854 perf_irq(regs); 877 perf_irq(regs);
855} 878}
879#endif
856 880
857#ifdef CONFIG_FSL_BOOKE 881#ifdef CONFIG_FSL_BOOKE
858void CacheLockingException(struct pt_regs *regs, unsigned long address, 882void CacheLockingException(struct pt_regs *regs, unsigned long address,
diff --git a/arch/ppc/lib/Makefile b/arch/ppc/lib/Makefile
index 1c380e67d435..f1e1fb4144f0 100644
--- a/arch/ppc/lib/Makefile
+++ b/arch/ppc/lib/Makefile
@@ -4,6 +4,5 @@
4 4
5obj-y := checksum.o string.o strcase.o dec_and_lock.o div64.o 5obj-y := checksum.o string.o strcase.o dec_and_lock.o div64.o
6 6
7obj-$(CONFIG_SMP) += locks.o
8obj-$(CONFIG_8xx) += rheap.o 7obj-$(CONFIG_8xx) += rheap.o
9obj-$(CONFIG_CPM2) += rheap.o 8obj-$(CONFIG_CPM2) += rheap.o
diff --git a/arch/ppc/lib/dec_and_lock.c b/arch/ppc/lib/dec_and_lock.c
index 4ee888070d91..b18f0d9a00fc 100644
--- a/arch/ppc/lib/dec_and_lock.c
+++ b/arch/ppc/lib/dec_and_lock.c
@@ -11,14 +11,7 @@
11 * has a cmpxchg, and where atomic->value is an int holding 11 * has a cmpxchg, and where atomic->value is an int holding
12 * the value of the atomic (i.e. the high bits aren't used 12 * the value of the atomic (i.e. the high bits aren't used
13 * for a lock or anything like that). 13 * for a lock or anything like that).
14 *
15 * N.B. ATOMIC_DEC_AND_LOCK gets defined in include/linux/spinlock.h
16 * if spinlocks are empty and thus atomic_dec_and_lock is defined
17 * to be atomic_dec_and_test - in that case we don't need it
18 * defined here as well.
19 */ 14 */
20
21#ifndef ATOMIC_DEC_AND_LOCK
22int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock) 15int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
23{ 16{
24 int counter; 17 int counter;
@@ -43,4 +36,3 @@ int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
43} 36}
44 37
45EXPORT_SYMBOL(_atomic_dec_and_lock); 38EXPORT_SYMBOL(_atomic_dec_and_lock);
46#endif /* ATOMIC_DEC_AND_LOCK */
diff --git a/arch/ppc/mm/fault.c b/arch/ppc/mm/fault.c
index 57d9930843ac..ee5e9f25baf9 100644
--- a/arch/ppc/mm/fault.c
+++ b/arch/ppc/mm/fault.c
@@ -278,11 +278,7 @@ bad_area:
278 278
279 /* User mode accesses cause a SIGSEGV */ 279 /* User mode accesses cause a SIGSEGV */
280 if (user_mode(regs)) { 280 if (user_mode(regs)) {
281 info.si_signo = SIGSEGV; 281 _exception(SIGSEGV, regs, code, address);
282 info.si_errno = 0;
283 info.si_code = code;
284 info.si_addr = (void __user *) address;
285 force_sig_info(SIGSEGV, &info, current);
286 return 0; 282 return 0;
287 } 283 }
288 284
diff --git a/arch/ppc/mm/hashtable.S b/arch/ppc/mm/hashtable.S
index ab83132a7ed0..3ec87c91343e 100644
--- a/arch/ppc/mm/hashtable.S
+++ b/arch/ppc/mm/hashtable.S
@@ -30,7 +30,7 @@
30#include <asm/cputable.h> 30#include <asm/cputable.h>
31#include <asm/ppc_asm.h> 31#include <asm/ppc_asm.h>
32#include <asm/thread_info.h> 32#include <asm/thread_info.h>
33#include <asm/offsets.h> 33#include <asm/asm-offsets.h>
34 34
35#ifdef CONFIG_SMP 35#ifdef CONFIG_SMP
36 .comm mmu_hash_lock,4 36 .comm mmu_hash_lock,4
diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c
index 0fd3442f5131..d6b2b1965dcb 100644
--- a/arch/ppc/platforms/4xx/ebony.c
+++ b/arch/ppc/platforms/4xx/ebony.c
@@ -91,15 +91,10 @@ ebony_calibrate_decr(void)
91 * on Rev. C silicon then errata forces us to 91 * on Rev. C silicon then errata forces us to
92 * use the internal clock. 92 * use the internal clock.
93 */ 93 */
94 switch (PVR_REV(mfspr(SPRN_PVR))) { 94 if (strcmp(cur_cpu_spec[0]->cpu_name, "440GP Rev. B") == 0)
95 case PVR_REV(PVR_440GP_RB): 95 freq = EBONY_440GP_RB_SYSCLK;
96 freq = EBONY_440GP_RB_SYSCLK; 96 else
97 break; 97 freq = EBONY_440GP_RC_SYSCLK;
98 case PVR_REV(PVR_440GP_RC1):
99 default:
100 freq = EBONY_440GP_RC_SYSCLK;
101 break;
102 }
103 98
104 ibm44x_calibrate_decr(freq); 99 ibm44x_calibrate_decr(freq);
105} 100}
diff --git a/arch/ppc/platforms/hdpu.c b/arch/ppc/platforms/hdpu.c
index b659d7b3d747..ff3796860123 100644
--- a/arch/ppc/platforms/hdpu.c
+++ b/arch/ppc/platforms/hdpu.c
@@ -58,7 +58,7 @@ static void parse_bootinfo(unsigned long r3,
58static void hdpu_set_l1pe(void); 58static void hdpu_set_l1pe(void);
59static void hdpu_cpustate_set(unsigned char new_state); 59static void hdpu_cpustate_set(unsigned char new_state);
60#ifdef CONFIG_SMP 60#ifdef CONFIG_SMP
61static spinlock_t timebase_lock = SPIN_LOCK_UNLOCKED; 61static DEFINE_SPINLOCK(timebase_lock);
62static unsigned int timebase_upper = 0, timebase_lower = 0; 62static unsigned int timebase_upper = 0, timebase_lower = 0;
63extern int smp_tb_synchronized; 63extern int smp_tb_synchronized;
64 64
diff --git a/arch/ppc/platforms/pmac_sleep.S b/arch/ppc/platforms/pmac_sleep.S
index 016a74649155..88419c77ac43 100644
--- a/arch/ppc/platforms/pmac_sleep.S
+++ b/arch/ppc/platforms/pmac_sleep.S
@@ -17,7 +17,7 @@
17#include <asm/cputable.h> 17#include <asm/cputable.h>
18#include <asm/cache.h> 18#include <asm/cache.h>
19#include <asm/thread_info.h> 19#include <asm/thread_info.h>
20#include <asm/offsets.h> 20#include <asm/asm-offsets.h>
21 21
22#define MAGIC 0x4c617273 /* 'Lars' */ 22#define MAGIC 0x4c617273 /* 'Lars' */
23 23
@@ -161,6 +161,8 @@ _GLOBAL(low_sleep_handler)
161 addi r3,r3,sleep_storage@l 161 addi r3,r3,sleep_storage@l
162 stw r5,0(r3) 162 stw r5,0(r3)
163 163
164 .globl low_cpu_die
165low_cpu_die:
164 /* Flush & disable all caches */ 166 /* Flush & disable all caches */
165 bl flush_disable_caches 167 bl flush_disable_caches
166 168
diff --git a/arch/ppc/platforms/pmac_smp.c b/arch/ppc/platforms/pmac_smp.c
index 8e049dab4e63..794a23994b82 100644
--- a/arch/ppc/platforms/pmac_smp.c
+++ b/arch/ppc/platforms/pmac_smp.c
@@ -33,6 +33,7 @@
33#include <linux/spinlock.h> 33#include <linux/spinlock.h>
34#include <linux/errno.h> 34#include <linux/errno.h>
35#include <linux/hardirq.h> 35#include <linux/hardirq.h>
36#include <linux/cpu.h>
36 37
37#include <asm/ptrace.h> 38#include <asm/ptrace.h>
38#include <asm/atomic.h> 39#include <asm/atomic.h>
@@ -55,9 +56,7 @@
55 * Powersurge (old powermac SMP) support. 56 * Powersurge (old powermac SMP) support.
56 */ 57 */
57 58
58extern void __secondary_start_psurge(void); 59extern void __secondary_start_pmac_0(void);
59extern void __secondary_start_psurge2(void); /* Temporary horrible hack */
60extern void __secondary_start_psurge3(void); /* Temporary horrible hack */
61 60
62/* Addresses for powersurge registers */ 61/* Addresses for powersurge registers */
63#define HAMMERHEAD_BASE 0xf8000000 62#define HAMMERHEAD_BASE 0xf8000000
@@ -119,7 +118,7 @@ static volatile int sec_tb_reset = 0;
119static unsigned int pri_tb_hi, pri_tb_lo; 118static unsigned int pri_tb_hi, pri_tb_lo;
120static unsigned int pri_tb_stamp; 119static unsigned int pri_tb_stamp;
121 120
122static void __init core99_init_caches(int cpu) 121static void __devinit core99_init_caches(int cpu)
123{ 122{
124 if (!cpu_has_feature(CPU_FTR_L2CR)) 123 if (!cpu_has_feature(CPU_FTR_L2CR))
125 return; 124 return;
@@ -346,7 +345,7 @@ static int __init smp_psurge_probe(void)
346 345
347static void __init smp_psurge_kick_cpu(int nr) 346static void __init smp_psurge_kick_cpu(int nr)
348{ 347{
349 void (*start)(void) = __secondary_start_psurge; 348 unsigned long start = __pa(__secondary_start_pmac_0) + nr * 8;
350 unsigned long a; 349 unsigned long a;
351 350
352 /* may need to flush here if secondary bats aren't setup */ 351 /* may need to flush here if secondary bats aren't setup */
@@ -356,17 +355,7 @@ static void __init smp_psurge_kick_cpu(int nr)
356 355
357 if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu", 0x353); 356 if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu", 0x353);
358 357
359 /* setup entry point of secondary processor */ 358 out_be32(psurge_start, start);
360 switch (nr) {
361 case 2:
362 start = __secondary_start_psurge2;
363 break;
364 case 3:
365 start = __secondary_start_psurge3;
366 break;
367 }
368
369 out_be32(psurge_start, __pa(start));
370 mb(); 359 mb();
371 360
372 psurge_set_ipi(nr); 361 psurge_set_ipi(nr);
@@ -500,14 +489,14 @@ static int __init smp_core99_probe(void)
500 return ncpus; 489 return ncpus;
501} 490}
502 491
503static void __init smp_core99_kick_cpu(int nr) 492static void __devinit smp_core99_kick_cpu(int nr)
504{ 493{
505 unsigned long save_vector, new_vector; 494 unsigned long save_vector, new_vector;
506 unsigned long flags; 495 unsigned long flags;
507 496
508 volatile unsigned long *vector 497 volatile unsigned long *vector
509 = ((volatile unsigned long *)(KERNELBASE+0x100)); 498 = ((volatile unsigned long *)(KERNELBASE+0x100));
510 if (nr < 1 || nr > 3) 499 if (nr < 0 || nr > 3)
511 return; 500 return;
512 if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu", 0x346); 501 if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu", 0x346);
513 502
@@ -518,19 +507,9 @@ static void __init smp_core99_kick_cpu(int nr)
518 save_vector = *vector; 507 save_vector = *vector;
519 508
520 /* Setup fake reset vector that does 509 /* Setup fake reset vector that does
521 * b __secondary_start_psurge - KERNELBASE 510 * b __secondary_start_pmac_0 + nr*8 - KERNELBASE
522 */ 511 */
523 switch(nr) { 512 new_vector = (unsigned long) __secondary_start_pmac_0 + nr * 8;
524 case 1:
525 new_vector = (unsigned long)__secondary_start_psurge;
526 break;
527 case 2:
528 new_vector = (unsigned long)__secondary_start_psurge2;
529 break;
530 case 3:
531 new_vector = (unsigned long)__secondary_start_psurge3;
532 break;
533 }
534 *vector = 0x48000002 + new_vector - KERNELBASE; 513 *vector = 0x48000002 + new_vector - KERNELBASE;
535 514
536 /* flush data cache and inval instruction cache */ 515 /* flush data cache and inval instruction cache */
@@ -554,7 +533,7 @@ static void __init smp_core99_kick_cpu(int nr)
554 if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347); 533 if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347);
555} 534}
556 535
557static void __init smp_core99_setup_cpu(int cpu_nr) 536static void __devinit smp_core99_setup_cpu(int cpu_nr)
558{ 537{
559 /* Setup L2/L3 */ 538 /* Setup L2/L3 */
560 if (cpu_nr != 0) 539 if (cpu_nr != 0)
@@ -668,3 +647,47 @@ struct smp_ops_t core99_smp_ops __pmacdata = {
668 .give_timebase = smp_core99_give_timebase, 647 .give_timebase = smp_core99_give_timebase,
669 .take_timebase = smp_core99_take_timebase, 648 .take_timebase = smp_core99_take_timebase,
670}; 649};
650
651#ifdef CONFIG_HOTPLUG_CPU
652
653int __cpu_disable(void)
654{
655 cpu_clear(smp_processor_id(), cpu_online_map);
656
657 /* XXX reset cpu affinity here */
658 openpic_set_priority(0xf);
659 asm volatile("mtdec %0" : : "r" (0x7fffffff));
660 mb();
661 udelay(20);
662 asm volatile("mtdec %0" : : "r" (0x7fffffff));
663 return 0;
664}
665
666extern void low_cpu_die(void) __attribute__((noreturn)); /* in pmac_sleep.S */
667static int cpu_dead[NR_CPUS];
668
669void cpu_die(void)
670{
671 local_irq_disable();
672 cpu_dead[smp_processor_id()] = 1;
673 mb();
674 low_cpu_die();
675}
676
677void __cpu_die(unsigned int cpu)
678{
679 int timeout;
680
681 timeout = 1000;
682 while (!cpu_dead[cpu]) {
683 if (--timeout == 0) {
684 printk("CPU %u refused to die!\n", cpu);
685 break;
686 }
687 msleep(1);
688 }
689 cpu_callin_map[cpu] = 0;
690 cpu_dead[cpu] = 0;
691}
692
693#endif
diff --git a/arch/ppc/syslib/cpc700_pic.c b/arch/ppc/syslib/cpc700_pic.c
index 774709807538..75fe8eb10693 100644
--- a/arch/ppc/syslib/cpc700_pic.c
+++ b/arch/ppc/syslib/cpc700_pic.c
@@ -90,14 +90,10 @@ cpc700_mask_and_ack_irq(unsigned int irq)
90} 90}
91 91
92static struct hw_interrupt_type cpc700_pic = { 92static struct hw_interrupt_type cpc700_pic = {
93 "CPC700 PIC", 93 .typename = "CPC700 PIC",
94 NULL, 94 .enable = cpc700_unmask_irq,
95 NULL, 95 .disable = cpc700_mask_irq,
96 cpc700_unmask_irq, 96 .ack = cpc700_mask_and_ack_irq,
97 cpc700_mask_irq,
98 cpc700_mask_and_ack_irq,
99 NULL,
100 NULL
101}; 97};
102 98
103__init static void 99__init static void
diff --git a/arch/ppc/syslib/i8259.c b/arch/ppc/syslib/i8259.c
index b9391e650141..5c7908c20e43 100644
--- a/arch/ppc/syslib/i8259.c
+++ b/arch/ppc/syslib/i8259.c
@@ -129,14 +129,11 @@ static void i8259_end_irq(unsigned int irq)
129} 129}
130 130
131struct hw_interrupt_type i8259_pic = { 131struct hw_interrupt_type i8259_pic = {
132 " i8259 ", 132 .typename = " i8259 ",
133 NULL, 133 .enable = i8259_unmask_irq,
134 NULL, 134 .disable = i8259_mask_irq,
135 i8259_unmask_irq, 135 .ack = i8259_mask_and_ack_irq,
136 i8259_mask_irq, 136 .end = i8259_end_irq,
137 i8259_mask_and_ack_irq,
138 i8259_end_irq,
139 NULL
140}; 137};
141 138
142static struct resource pic1_iores = { 139static struct resource pic1_iores = {
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c
index d4776af6a3ca..0bb919859b8b 100644
--- a/arch/ppc/syslib/ibm440gx_common.c
+++ b/arch/ppc/syslib/ibm440gx_common.c
@@ -236,9 +236,10 @@ void __init ibm440gx_l2c_setup(struct ibm44x_clocks* p)
236 /* Disable L2C on rev.A, rev.B and 800MHz version of rev.C, 236 /* Disable L2C on rev.A, rev.B and 800MHz version of rev.C,
237 enable it on all other revisions 237 enable it on all other revisions
238 */ 238 */
239 u32 pvr = mfspr(SPRN_PVR); 239 if (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. A") == 0 ||
240 if (pvr == PVR_440GX_RA || pvr == PVR_440GX_RB || 240 strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. B") == 0
241 (pvr == PVR_440GX_RC && p->cpu > 667000000)) 241 || (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. C")
242 == 0 && p->cpu > 667000000))
242 ibm440gx_l2c_disable(); 243 ibm440gx_l2c_disable();
243 else 244 else
244 ibm440gx_l2c_enable(); 245 ibm440gx_l2c_enable();
diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c
index 87065e2e4c5f..3e039706bdbc 100644
--- a/arch/ppc/syslib/mpc10x_common.c
+++ b/arch/ppc/syslib/mpc10x_common.c
@@ -140,12 +140,12 @@ struct platform_device ppc_sys_platform_devices[] = {
140 }, 140 },
141 [MPC10X_UART0] = { 141 [MPC10X_UART0] = {
142 .name = "serial8250", 142 .name = "serial8250",
143 .id = 0, 143 .id = PLAT8250_DEV_PLATFORM,
144 .dev.platform_data = serial_plat_uart0, 144 .dev.platform_data = serial_plat_uart0,
145 }, 145 },
146 [MPC10X_UART1] = { 146 [MPC10X_UART1] = {
147 .name = "serial8250", 147 .name = "serial8250",
148 .id = 1, 148 .id = PLAT8250_DEV_PLATFORM1,
149 .dev.platform_data = serial_plat_uart1, 149 .dev.platform_data = serial_plat_uart1,
150 }, 150 },
151 151
diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c
index 5aaf0e58e1f9..95b3b8a7f0ba 100644
--- a/arch/ppc/syslib/mpc83xx_devices.c
+++ b/arch/ppc/syslib/mpc83xx_devices.c
@@ -165,7 +165,7 @@ struct platform_device ppc_sys_platform_devices[] = {
165 }, 165 },
166 [MPC83xx_DUART] = { 166 [MPC83xx_DUART] = {
167 .name = "serial8250", 167 .name = "serial8250",
168 .id = 0, 168 .id = PLAT8250_DEV_PLATFORM,
169 .dev.platform_data = serial_platform_data, 169 .dev.platform_data = serial_platform_data,
170 }, 170 },
171 [MPC83xx_SEC2] = { 171 [MPC83xx_SEC2] = {
diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c
index 8af322dd476a..bbc5ac0de878 100644
--- a/arch/ppc/syslib/mpc85xx_devices.c
+++ b/arch/ppc/syslib/mpc85xx_devices.c
@@ -282,7 +282,7 @@ struct platform_device ppc_sys_platform_devices[] = {
282 }, 282 },
283 [MPC85xx_DUART] = { 283 [MPC85xx_DUART] = {
284 .name = "serial8250", 284 .name = "serial8250",
285 .id = 0, 285 .id = PLAT8250_DEV_PLATFORM,
286 .dev.platform_data = serial_platform_data, 286 .dev.platform_data = serial_platform_data,
287 }, 287 },
288 [MPC85xx_PERFMON] = { 288 [MPC85xx_PERFMON] = {
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index 6262b11f366f..839f8872826f 100644
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -31,7 +31,7 @@
31 31
32 32
33u8 mv64x60_pci_exclude_bridge = 1; 33u8 mv64x60_pci_exclude_bridge = 1;
34spinlock_t mv64x60_lock = SPIN_LOCK_UNLOCKED; 34DEFINE_SPINLOCK(mv64x60_lock);
35 35
36static phys_addr_t mv64x60_bridge_pbase; 36static phys_addr_t mv64x60_bridge_pbase;
37static void *mv64x60_bridge_vbase; 37static void *mv64x60_bridge_vbase;
diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c
index 7e272c51a497..2e0ea92144f6 100644
--- a/arch/ppc/syslib/open_pic2.c
+++ b/arch/ppc/syslib/open_pic2.c
@@ -82,13 +82,11 @@ static void openpic2_end_irq(unsigned int irq_nr);
82static void openpic2_ack_irq(unsigned int irq_nr); 82static void openpic2_ack_irq(unsigned int irq_nr);
83 83
84struct hw_interrupt_type open_pic2 = { 84struct hw_interrupt_type open_pic2 = {
85 " OpenPIC2 ", 85 .typename = " OpenPIC2 ",
86 NULL, 86 .enable = openpic2_enable_irq,
87 NULL, 87 .disable = openpic2_disable_irq,
88 openpic2_enable_irq, 88 .ack = openpic2_ack_irq,
89 openpic2_disable_irq, 89 .end = openpic2_end_irq,
90 openpic2_ack_irq,
91 openpic2_end_irq,
92}; 90};
93 91
94/* 92/*
diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c
index 06cb0af2a58d..ce4d1deb86e9 100644
--- a/arch/ppc/syslib/ppc403_pic.c
+++ b/arch/ppc/syslib/ppc403_pic.c
@@ -34,13 +34,10 @@ static void ppc403_aic_disable(unsigned int irq);
34static void ppc403_aic_disable_and_ack(unsigned int irq); 34static void ppc403_aic_disable_and_ack(unsigned int irq);
35 35
36static struct hw_interrupt_type ppc403_aic = { 36static struct hw_interrupt_type ppc403_aic = {
37 "403GC AIC", 37 .typename = "403GC AIC",
38 NULL, 38 .enable = ppc403_aic_enable,
39 NULL, 39 .disable = ppc403_aic_disable,
40 ppc403_aic_enable, 40 .ack = ppc403_aic_disable_and_ack,
41 ppc403_aic_disable,
42 ppc403_aic_disable_and_ack,
43 0
44}; 41};
45 42
46int 43int
diff --git a/arch/ppc/syslib/qspan_pci.c b/arch/ppc/syslib/qspan_pci.c
index 57f4ed5e5ae1..0970b5d30391 100644
--- a/arch/ppc/syslib/qspan_pci.c
+++ b/arch/ppc/syslib/qspan_pci.c
@@ -94,7 +94,7 @@
94#define mk_config_type1(bus, dev, offset) \ 94#define mk_config_type1(bus, dev, offset) \
95 mk_config_addr(bus, dev, offset) | 1; 95 mk_config_addr(bus, dev, offset) | 1;
96 96
97static spinlock_t pcibios_lock = SPIN_LOCK_UNLOCKED; 97static DEFINE_SPINLOCK(pcibios_lock);
98 98
99int qspan_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn, 99int qspan_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn,
100 unsigned char offset, unsigned char *val) 100 unsigned char offset, unsigned char *val)
diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c
index e0bd66f0847a..2cbcad278cef 100644
--- a/arch/ppc/syslib/xilinx_pic.c
+++ b/arch/ppc/syslib/xilinx_pic.c
@@ -79,14 +79,11 @@ xilinx_intc_end(unsigned int irq)
79} 79}
80 80
81static struct hw_interrupt_type xilinx_intc = { 81static struct hw_interrupt_type xilinx_intc = {
82 "Xilinx Interrupt Controller", 82 .typename = "Xilinx Interrupt Controller",
83 NULL, 83 .enable = xilinx_intc_enable,
84 NULL, 84 .disable = xilinx_intc_disable,
85 xilinx_intc_enable, 85 .ack = xilinx_intc_disable_and_ack,
86 xilinx_intc_disable, 86 .end = xilinx_intc_end,
87 xilinx_intc_disable_and_ack,
88 xilinx_intc_end,
89 0
90}; 87};
91 88
92int 89int
generated by cgit v1.2.2 (git 2.25.0) at 2025-05-23 15:32:49 -0400