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authorEugene Surovegin <ebs@ebshome.net>2005-07-05 21:54:45 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-07-05 22:18:59 -0400
commit4b1294f928d9396e45f62b1c306ac8bf9fae036b (patch)
treec19512eac268e75337d8e1591a11db03dd13cb55 /arch/ppc
parentf326d22b8cc5bfebfa5b3f6a4066dc737def2234 (diff)
[PATCH] ppc32: explicitly disable 440GP IRQ compatibility mode in 440GX setup
Add explicit disabling of 440GP IRQ compatibility mode when configuring 440GX interrupt controller. This helps when board firmware for some reason uses this compatibility mode and leaves it enabled. It breaks 440GX interrupt code because it assumes native 440GX IRQ mode. People seems to be continuously bitten by this. Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc')
-rw-r--r--arch/ppc/syslib/ppc4xx_pic.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c
index 05686fa73545..40086212b9c3 100644
--- a/arch/ppc/syslib/ppc4xx_pic.c
+++ b/arch/ppc/syslib/ppc4xx_pic.c
@@ -110,6 +110,10 @@ static int ppc4xx_pic_get_irq(struct pt_regs *regs)
110 110
111static void __init ppc4xx_pic_impl_init(void) 111static void __init ppc4xx_pic_impl_init(void)
112{ 112{
113#if defined(CONFIG_440GX)
114 /* Disable 440GP compatibility mode if it was enabled in firmware */
115 SDR_WRITE(DCRN_SDR_MFR, SDR_READ(DCRN_SDR_MFR) & ~DCRN_SDR_MFR_PCM);
116#endif
113 /* Configure Base UIC */ 117 /* Configure Base UIC */
114 mtdcr(DCRN_UIC_CR(UICB), 0); 118 mtdcr(DCRN_UIC_CR(UICB), 0);
115 mtdcr(DCRN_UIC_TR(UICB), 0); 119 mtdcr(DCRN_UIC_TR(UICB), 0);