diff options
author | Kumar Gala <galak@freescale.com> | 2005-09-23 15:08:58 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2005-09-28 01:42:53 -0400 |
commit | 10b35d9978ac35556aec0d2642055742d8941488 (patch) | |
tree | 7c59c62e2840d7d9971076e1acccaa0cadd678b8 /arch/ppc | |
parent | a559c91d77c3220be521453bd23815e1e1980a82 (diff) |
[PATCH] powerpc: merged asm/cputable.h
Merged cputable.h between ppc32 and ppc64. In doing this removed support
for the BEGIN_FTR_SECTION/END_FTR_SECTION macros in C code since they
dont compile correctly. C code should use cpu_has_feature(). This is
based on Arnd Bergmann's initial patch.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc')
-rw-r--r-- | arch/ppc/kernel/cputable.c | 399 |
1 files changed, 86 insertions, 313 deletions
diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c index 546e1ea4cafa..97663d5d96ca 100644 --- a/arch/ppc/kernel/cputable.c +++ b/arch/ppc/kernel/cputable.c | |||
@@ -42,17 +42,6 @@ extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spe | |||
42 | #define COMMON_PPC (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ | 42 | #define COMMON_PPC (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ |
43 | PPC_FEATURE_HAS_MMU) | 43 | PPC_FEATURE_HAS_MMU) |
44 | 44 | ||
45 | /* We only set the altivec features if the kernel was compiled with altivec | ||
46 | * support | ||
47 | */ | ||
48 | #ifdef CONFIG_ALTIVEC | ||
49 | #define CPU_FTR_ALTIVEC_COMP CPU_FTR_ALTIVEC | ||
50 | #define PPC_FEATURE_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC | ||
51 | #else | ||
52 | #define CPU_FTR_ALTIVEC_COMP 0 | ||
53 | #define PPC_FEATURE_ALTIVEC_COMP 0 | ||
54 | #endif | ||
55 | |||
56 | /* We only set the spe features if the kernel was compiled with | 45 | /* We only set the spe features if the kernel was compiled with |
57 | * spe support | 46 | * spe support |
58 | */ | 47 | */ |
@@ -62,34 +51,13 @@ extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spe | |||
62 | #define PPC_FEATURE_SPE_COMP 0 | 51 | #define PPC_FEATURE_SPE_COMP 0 |
63 | #endif | 52 | #endif |
64 | 53 | ||
65 | /* We need to mark all pages as being coherent if we're SMP or we | ||
66 | * have a 74[45]x and an MPC107 host bridge. | ||
67 | */ | ||
68 | #if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) | ||
69 | #define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT | ||
70 | #else | ||
71 | #define CPU_FTR_COMMON 0 | ||
72 | #endif | ||
73 | |||
74 | /* The powersave features NAP & DOZE seems to confuse BDI when | ||
75 | debugging. So if a BDI is used, disable theses | ||
76 | */ | ||
77 | #ifndef CONFIG_BDI_SWITCH | ||
78 | #define CPU_FTR_MAYBE_CAN_DOZE CPU_FTR_CAN_DOZE | ||
79 | #define CPU_FTR_MAYBE_CAN_NAP CPU_FTR_CAN_NAP | ||
80 | #else | ||
81 | #define CPU_FTR_MAYBE_CAN_DOZE 0 | ||
82 | #define CPU_FTR_MAYBE_CAN_NAP 0 | ||
83 | #endif | ||
84 | |||
85 | struct cpu_spec cpu_specs[] = { | 54 | struct cpu_spec cpu_specs[] = { |
86 | #if CLASSIC_PPC | 55 | #if CLASSIC_PPC |
87 | { /* 601 */ | 56 | { /* 601 */ |
88 | .pvr_mask = 0xffff0000, | 57 | .pvr_mask = 0xffff0000, |
89 | .pvr_value = 0x00010000, | 58 | .pvr_value = 0x00010000, |
90 | .cpu_name = "601", | 59 | .cpu_name = "601", |
91 | .cpu_features = CPU_FTR_COMMON | CPU_FTR_601 | | 60 | .cpu_features = CPU_FTRS_PPC601, |
92 | CPU_FTR_HPTE_TABLE, | ||
93 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_601_INSTR | | 61 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_601_INSTR | |
94 | PPC_FEATURE_UNIFIED_CACHE, | 62 | PPC_FEATURE_UNIFIED_CACHE, |
95 | .icache_bsize = 32, | 63 | .icache_bsize = 32, |
@@ -100,9 +68,7 @@ struct cpu_spec cpu_specs[] = { | |||
100 | .pvr_mask = 0xffff0000, | 68 | .pvr_mask = 0xffff0000, |
101 | .pvr_value = 0x00030000, | 69 | .pvr_value = 0x00030000, |
102 | .cpu_name = "603", | 70 | .cpu_name = "603", |
103 | .cpu_features = CPU_FTR_COMMON | | 71 | .cpu_features = CPU_FTRS_603, |
104 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
105 | CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP, | ||
106 | .cpu_user_features = COMMON_PPC, | 72 | .cpu_user_features = COMMON_PPC, |
107 | .icache_bsize = 32, | 73 | .icache_bsize = 32, |
108 | .dcache_bsize = 32, | 74 | .dcache_bsize = 32, |
@@ -112,9 +78,7 @@ struct cpu_spec cpu_specs[] = { | |||
112 | .pvr_mask = 0xffff0000, | 78 | .pvr_mask = 0xffff0000, |
113 | .pvr_value = 0x00060000, | 79 | .pvr_value = 0x00060000, |
114 | .cpu_name = "603e", | 80 | .cpu_name = "603e", |
115 | .cpu_features = CPU_FTR_COMMON | | 81 | .cpu_features = CPU_FTRS_603, |
116 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
117 | CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP, | ||
118 | .cpu_user_features = COMMON_PPC, | 82 | .cpu_user_features = COMMON_PPC, |
119 | .icache_bsize = 32, | 83 | .icache_bsize = 32, |
120 | .dcache_bsize = 32, | 84 | .dcache_bsize = 32, |
@@ -124,9 +88,7 @@ struct cpu_spec cpu_specs[] = { | |||
124 | .pvr_mask = 0xffff0000, | 88 | .pvr_mask = 0xffff0000, |
125 | .pvr_value = 0x00070000, | 89 | .pvr_value = 0x00070000, |
126 | .cpu_name = "603ev", | 90 | .cpu_name = "603ev", |
127 | .cpu_features = CPU_FTR_COMMON | | 91 | .cpu_features = CPU_FTRS_603, |
128 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
129 | CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP, | ||
130 | .cpu_user_features = COMMON_PPC, | 92 | .cpu_user_features = COMMON_PPC, |
131 | .icache_bsize = 32, | 93 | .icache_bsize = 32, |
132 | .dcache_bsize = 32, | 94 | .dcache_bsize = 32, |
@@ -136,9 +98,7 @@ struct cpu_spec cpu_specs[] = { | |||
136 | .pvr_mask = 0xffff0000, | 98 | .pvr_mask = 0xffff0000, |
137 | .pvr_value = 0x00040000, | 99 | .pvr_value = 0x00040000, |
138 | .cpu_name = "604", | 100 | .cpu_name = "604", |
139 | .cpu_features = CPU_FTR_COMMON | | 101 | .cpu_features = CPU_FTRS_604, |
140 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
141 | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE, | ||
142 | .cpu_user_features = COMMON_PPC, | 102 | .cpu_user_features = COMMON_PPC, |
143 | .icache_bsize = 32, | 103 | .icache_bsize = 32, |
144 | .dcache_bsize = 32, | 104 | .dcache_bsize = 32, |
@@ -149,9 +109,7 @@ struct cpu_spec cpu_specs[] = { | |||
149 | .pvr_mask = 0xfffff000, | 109 | .pvr_mask = 0xfffff000, |
150 | .pvr_value = 0x00090000, | 110 | .pvr_value = 0x00090000, |
151 | .cpu_name = "604e", | 111 | .cpu_name = "604e", |
152 | .cpu_features = CPU_FTR_COMMON | | 112 | .cpu_features = CPU_FTRS_604, |
153 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
154 | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE, | ||
155 | .cpu_user_features = COMMON_PPC, | 113 | .cpu_user_features = COMMON_PPC, |
156 | .icache_bsize = 32, | 114 | .icache_bsize = 32, |
157 | .dcache_bsize = 32, | 115 | .dcache_bsize = 32, |
@@ -162,9 +120,7 @@ struct cpu_spec cpu_specs[] = { | |||
162 | .pvr_mask = 0xffff0000, | 120 | .pvr_mask = 0xffff0000, |
163 | .pvr_value = 0x00090000, | 121 | .pvr_value = 0x00090000, |
164 | .cpu_name = "604r", | 122 | .cpu_name = "604r", |
165 | .cpu_features = CPU_FTR_COMMON | | 123 | .cpu_features = CPU_FTRS_604, |
166 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
167 | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE, | ||
168 | .cpu_user_features = COMMON_PPC, | 124 | .cpu_user_features = COMMON_PPC, |
169 | .icache_bsize = 32, | 125 | .icache_bsize = 32, |
170 | .dcache_bsize = 32, | 126 | .dcache_bsize = 32, |
@@ -175,9 +131,7 @@ struct cpu_spec cpu_specs[] = { | |||
175 | .pvr_mask = 0xffff0000, | 131 | .pvr_mask = 0xffff0000, |
176 | .pvr_value = 0x000a0000, | 132 | .pvr_value = 0x000a0000, |
177 | .cpu_name = "604ev", | 133 | .cpu_name = "604ev", |
178 | .cpu_features = CPU_FTR_COMMON | | 134 | .cpu_features = CPU_FTRS_604, |
179 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
180 | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE, | ||
181 | .cpu_user_features = COMMON_PPC, | 135 | .cpu_user_features = COMMON_PPC, |
182 | .icache_bsize = 32, | 136 | .icache_bsize = 32, |
183 | .dcache_bsize = 32, | 137 | .dcache_bsize = 32, |
@@ -188,10 +142,7 @@ struct cpu_spec cpu_specs[] = { | |||
188 | .pvr_mask = 0xffffffff, | 142 | .pvr_mask = 0xffffffff, |
189 | .pvr_value = 0x00084202, | 143 | .pvr_value = 0x00084202, |
190 | .cpu_name = "740/750", | 144 | .cpu_name = "740/750", |
191 | .cpu_features = CPU_FTR_COMMON | | 145 | .cpu_features = CPU_FTRS_740_NOTAU, |
192 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
193 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_HPTE_TABLE | | ||
194 | CPU_FTR_MAYBE_CAN_NAP, | ||
195 | .cpu_user_features = COMMON_PPC, | 146 | .cpu_user_features = COMMON_PPC, |
196 | .icache_bsize = 32, | 147 | .icache_bsize = 32, |
197 | .dcache_bsize = 32, | 148 | .dcache_bsize = 32, |
@@ -202,10 +153,7 @@ struct cpu_spec cpu_specs[] = { | |||
202 | .pvr_mask = 0xfffffff0, | 153 | .pvr_mask = 0xfffffff0, |
203 | .pvr_value = 0x00080100, | 154 | .pvr_value = 0x00080100, |
204 | .cpu_name = "750CX", | 155 | .cpu_name = "750CX", |
205 | .cpu_features = CPU_FTR_COMMON | | 156 | .cpu_features = CPU_FTRS_750, |
206 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
207 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
208 | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, | ||
209 | .cpu_user_features = COMMON_PPC, | 157 | .cpu_user_features = COMMON_PPC, |
210 | .icache_bsize = 32, | 158 | .icache_bsize = 32, |
211 | .dcache_bsize = 32, | 159 | .dcache_bsize = 32, |
@@ -216,10 +164,7 @@ struct cpu_spec cpu_specs[] = { | |||
216 | .pvr_mask = 0xfffffff0, | 164 | .pvr_mask = 0xfffffff0, |
217 | .pvr_value = 0x00082200, | 165 | .pvr_value = 0x00082200, |
218 | .cpu_name = "750CX", | 166 | .cpu_name = "750CX", |
219 | .cpu_features = CPU_FTR_COMMON | | 167 | .cpu_features = CPU_FTRS_750, |
220 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
221 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
222 | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, | ||
223 | .cpu_user_features = COMMON_PPC, | 168 | .cpu_user_features = COMMON_PPC, |
224 | .icache_bsize = 32, | 169 | .icache_bsize = 32, |
225 | .dcache_bsize = 32, | 170 | .dcache_bsize = 32, |
@@ -230,10 +175,7 @@ struct cpu_spec cpu_specs[] = { | |||
230 | .pvr_mask = 0xfffffff0, | 175 | .pvr_mask = 0xfffffff0, |
231 | .pvr_value = 0x00082210, | 176 | .pvr_value = 0x00082210, |
232 | .cpu_name = "750CXe", | 177 | .cpu_name = "750CXe", |
233 | .cpu_features = CPU_FTR_COMMON | | 178 | .cpu_features = CPU_FTRS_750, |
234 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
235 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
236 | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, | ||
237 | .cpu_user_features = COMMON_PPC, | 179 | .cpu_user_features = COMMON_PPC, |
238 | .icache_bsize = 32, | 180 | .icache_bsize = 32, |
239 | .dcache_bsize = 32, | 181 | .dcache_bsize = 32, |
@@ -244,10 +186,7 @@ struct cpu_spec cpu_specs[] = { | |||
244 | .pvr_mask = 0xffffffff, | 186 | .pvr_mask = 0xffffffff, |
245 | .pvr_value = 0x00083214, | 187 | .pvr_value = 0x00083214, |
246 | .cpu_name = "750CXe", | 188 | .cpu_name = "750CXe", |
247 | .cpu_features = CPU_FTR_COMMON | | 189 | .cpu_features = CPU_FTRS_750, |
248 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
249 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
250 | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, | ||
251 | .cpu_user_features = COMMON_PPC, | 190 | .cpu_user_features = COMMON_PPC, |
252 | .icache_bsize = 32, | 191 | .icache_bsize = 32, |
253 | .dcache_bsize = 32, | 192 | .dcache_bsize = 32, |
@@ -258,10 +197,7 @@ struct cpu_spec cpu_specs[] = { | |||
258 | .pvr_mask = 0xfffff000, | 197 | .pvr_mask = 0xfffff000, |
259 | .pvr_value = 0x00083000, | 198 | .pvr_value = 0x00083000, |
260 | .cpu_name = "745/755", | 199 | .cpu_name = "745/755", |
261 | .cpu_features = CPU_FTR_COMMON | | 200 | .cpu_features = CPU_FTRS_750, |
262 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
263 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
264 | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, | ||
265 | .cpu_user_features = COMMON_PPC, | 201 | .cpu_user_features = COMMON_PPC, |
266 | .icache_bsize = 32, | 202 | .icache_bsize = 32, |
267 | .dcache_bsize = 32, | 203 | .dcache_bsize = 32, |
@@ -272,11 +208,7 @@ struct cpu_spec cpu_specs[] = { | |||
272 | .pvr_mask = 0xffffff00, | 208 | .pvr_mask = 0xffffff00, |
273 | .pvr_value = 0x70000100, | 209 | .pvr_value = 0x70000100, |
274 | .cpu_name = "750FX", | 210 | .cpu_name = "750FX", |
275 | .cpu_features = CPU_FTR_COMMON | | 211 | .cpu_features = CPU_FTRS_750FX1, |
276 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
277 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
278 | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | | ||
279 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM, | ||
280 | .cpu_user_features = COMMON_PPC, | 212 | .cpu_user_features = COMMON_PPC, |
281 | .icache_bsize = 32, | 213 | .icache_bsize = 32, |
282 | .dcache_bsize = 32, | 214 | .dcache_bsize = 32, |
@@ -287,11 +219,7 @@ struct cpu_spec cpu_specs[] = { | |||
287 | .pvr_mask = 0xffffffff, | 219 | .pvr_mask = 0xffffffff, |
288 | .pvr_value = 0x70000200, | 220 | .pvr_value = 0x70000200, |
289 | .cpu_name = "750FX", | 221 | .cpu_name = "750FX", |
290 | .cpu_features = CPU_FTR_COMMON | | 222 | .cpu_features = CPU_FTRS_750FX2, |
291 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
292 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
293 | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | | ||
294 | CPU_FTR_NO_DPM, | ||
295 | .cpu_user_features = COMMON_PPC, | 223 | .cpu_user_features = COMMON_PPC, |
296 | .icache_bsize = 32, | 224 | .icache_bsize = 32, |
297 | .dcache_bsize = 32, | 225 | .dcache_bsize = 32, |
@@ -302,11 +230,7 @@ struct cpu_spec cpu_specs[] = { | |||
302 | .pvr_mask = 0xffff0000, | 230 | .pvr_mask = 0xffff0000, |
303 | .pvr_value = 0x70000000, | 231 | .pvr_value = 0x70000000, |
304 | .cpu_name = "750FX", | 232 | .cpu_name = "750FX", |
305 | .cpu_features = CPU_FTR_COMMON | | 233 | .cpu_features = CPU_FTRS_750FX, |
306 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
307 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
308 | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | | ||
309 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS, | ||
310 | .cpu_user_features = COMMON_PPC, | 234 | .cpu_user_features = COMMON_PPC, |
311 | .icache_bsize = 32, | 235 | .icache_bsize = 32, |
312 | .dcache_bsize = 32, | 236 | .dcache_bsize = 32, |
@@ -317,11 +241,7 @@ struct cpu_spec cpu_specs[] = { | |||
317 | .pvr_mask = 0xffff0000, | 241 | .pvr_mask = 0xffff0000, |
318 | .pvr_value = 0x70020000, | 242 | .pvr_value = 0x70020000, |
319 | .cpu_name = "750GX", | 243 | .cpu_name = "750GX", |
320 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 244 | .cpu_features = CPU_FTRS_750GX, |
321 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | | ||
322 | CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | | ||
323 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_DUAL_PLL_750FX | | ||
324 | CPU_FTR_HAS_HIGH_BATS, | ||
325 | .cpu_user_features = COMMON_PPC, | 245 | .cpu_user_features = COMMON_PPC, |
326 | .icache_bsize = 32, | 246 | .icache_bsize = 32, |
327 | .dcache_bsize = 32, | 247 | .dcache_bsize = 32, |
@@ -332,10 +252,7 @@ struct cpu_spec cpu_specs[] = { | |||
332 | .pvr_mask = 0xffff0000, | 252 | .pvr_mask = 0xffff0000, |
333 | .pvr_value = 0x00080000, | 253 | .pvr_value = 0x00080000, |
334 | .cpu_name = "740/750", | 254 | .cpu_name = "740/750", |
335 | .cpu_features = CPU_FTR_COMMON | | 255 | .cpu_features = CPU_FTRS_740, |
336 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
337 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
338 | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, | ||
339 | .cpu_user_features = COMMON_PPC, | 256 | .cpu_user_features = COMMON_PPC, |
340 | .icache_bsize = 32, | 257 | .icache_bsize = 32, |
341 | .dcache_bsize = 32, | 258 | .dcache_bsize = 32, |
@@ -346,11 +263,8 @@ struct cpu_spec cpu_specs[] = { | |||
346 | .pvr_mask = 0xffffffff, | 263 | .pvr_mask = 0xffffffff, |
347 | .pvr_value = 0x000c1101, | 264 | .pvr_value = 0x000c1101, |
348 | .cpu_name = "7400 (1.1)", | 265 | .cpu_name = "7400 (1.1)", |
349 | .cpu_features = CPU_FTR_COMMON | | 266 | .cpu_features = CPU_FTRS_7400_NOTAU, |
350 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | 267 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
351 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | | ||
352 | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, | ||
353 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
354 | .icache_bsize = 32, | 268 | .icache_bsize = 32, |
355 | .dcache_bsize = 32, | 269 | .dcache_bsize = 32, |
356 | .num_pmcs = 4, | 270 | .num_pmcs = 4, |
@@ -360,12 +274,8 @@ struct cpu_spec cpu_specs[] = { | |||
360 | .pvr_mask = 0xffff0000, | 274 | .pvr_mask = 0xffff0000, |
361 | .pvr_value = 0x000c0000, | 275 | .pvr_value = 0x000c0000, |
362 | .cpu_name = "7400", | 276 | .cpu_name = "7400", |
363 | .cpu_features = CPU_FTR_COMMON | | 277 | .cpu_features = CPU_FTRS_7400, |
364 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | 278 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
365 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
366 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | | ||
367 | CPU_FTR_MAYBE_CAN_NAP, | ||
368 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
369 | .icache_bsize = 32, | 279 | .icache_bsize = 32, |
370 | .dcache_bsize = 32, | 280 | .dcache_bsize = 32, |
371 | .num_pmcs = 4, | 281 | .num_pmcs = 4, |
@@ -375,12 +285,8 @@ struct cpu_spec cpu_specs[] = { | |||
375 | .pvr_mask = 0xffff0000, | 285 | .pvr_mask = 0xffff0000, |
376 | .pvr_value = 0x800c0000, | 286 | .pvr_value = 0x800c0000, |
377 | .cpu_name = "7410", | 287 | .cpu_name = "7410", |
378 | .cpu_features = CPU_FTR_COMMON | | 288 | .cpu_features = CPU_FTRS_7400, |
379 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | 289 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
380 | CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | | ||
381 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | | ||
382 | CPU_FTR_MAYBE_CAN_NAP, | ||
383 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
384 | .icache_bsize = 32, | 290 | .icache_bsize = 32, |
385 | .dcache_bsize = 32, | 291 | .dcache_bsize = 32, |
386 | .num_pmcs = 4, | 292 | .num_pmcs = 4, |
@@ -390,12 +296,8 @@ struct cpu_spec cpu_specs[] = { | |||
390 | .pvr_mask = 0xffffffff, | 296 | .pvr_mask = 0xffffffff, |
391 | .pvr_value = 0x80000200, | 297 | .pvr_value = 0x80000200, |
392 | .cpu_name = "7450", | 298 | .cpu_name = "7450", |
393 | .cpu_features = CPU_FTR_COMMON | | 299 | .cpu_features = CPU_FTRS_7450_20, |
394 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 300 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
395 | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | | ||
396 | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | | ||
397 | CPU_FTR_NEED_COHERENT, | ||
398 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
399 | .icache_bsize = 32, | 301 | .icache_bsize = 32, |
400 | .dcache_bsize = 32, | 302 | .dcache_bsize = 32, |
401 | .num_pmcs = 6, | 303 | .num_pmcs = 6, |
@@ -405,14 +307,8 @@ struct cpu_spec cpu_specs[] = { | |||
405 | .pvr_mask = 0xffffffff, | 307 | .pvr_mask = 0xffffffff, |
406 | .pvr_value = 0x80000201, | 308 | .pvr_value = 0x80000201, |
407 | .cpu_name = "7450", | 309 | .cpu_name = "7450", |
408 | .cpu_features = CPU_FTR_COMMON | | 310 | .cpu_features = CPU_FTRS_7450_21, |
409 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 311 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
410 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | | ||
411 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | | ||
412 | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | | ||
413 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | | ||
414 | CPU_FTR_NEED_COHERENT, | ||
415 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
416 | .icache_bsize = 32, | 312 | .icache_bsize = 32, |
417 | .dcache_bsize = 32, | 313 | .dcache_bsize = 32, |
418 | .num_pmcs = 6, | 314 | .num_pmcs = 6, |
@@ -422,13 +318,8 @@ struct cpu_spec cpu_specs[] = { | |||
422 | .pvr_mask = 0xffff0000, | 318 | .pvr_mask = 0xffff0000, |
423 | .pvr_value = 0x80000000, | 319 | .pvr_value = 0x80000000, |
424 | .cpu_name = "7450", | 320 | .cpu_name = "7450", |
425 | .cpu_features = CPU_FTR_COMMON | | 321 | .cpu_features = CPU_FTRS_7450_23, |
426 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 322 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
427 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | | ||
428 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | | ||
429 | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | | ||
430 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT, | ||
431 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
432 | .icache_bsize = 32, | 323 | .icache_bsize = 32, |
433 | .dcache_bsize = 32, | 324 | .dcache_bsize = 32, |
434 | .num_pmcs = 6, | 325 | .num_pmcs = 6, |
@@ -438,12 +329,8 @@ struct cpu_spec cpu_specs[] = { | |||
438 | .pvr_mask = 0xffffff00, | 329 | .pvr_mask = 0xffffff00, |
439 | .pvr_value = 0x80010100, | 330 | .pvr_value = 0x80010100, |
440 | .cpu_name = "7455", | 331 | .cpu_name = "7455", |
441 | .cpu_features = CPU_FTR_COMMON | | 332 | .cpu_features = CPU_FTRS_7455_1, |
442 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 333 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
443 | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | | ||
444 | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | | ||
445 | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT, | ||
446 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
447 | .icache_bsize = 32, | 334 | .icache_bsize = 32, |
448 | .dcache_bsize = 32, | 335 | .dcache_bsize = 32, |
449 | .num_pmcs = 6, | 336 | .num_pmcs = 6, |
@@ -453,14 +340,8 @@ struct cpu_spec cpu_specs[] = { | |||
453 | .pvr_mask = 0xffffffff, | 340 | .pvr_mask = 0xffffffff, |
454 | .pvr_value = 0x80010200, | 341 | .pvr_value = 0x80010200, |
455 | .cpu_name = "7455", | 342 | .cpu_name = "7455", |
456 | .cpu_features = CPU_FTR_COMMON | | 343 | .cpu_features = CPU_FTRS_7455_20, |
457 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 344 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
458 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | | ||
459 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | | ||
460 | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | | ||
461 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | | ||
462 | CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS, | ||
463 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
464 | .icache_bsize = 32, | 345 | .icache_bsize = 32, |
465 | .dcache_bsize = 32, | 346 | .dcache_bsize = 32, |
466 | .num_pmcs = 6, | 347 | .num_pmcs = 6, |
@@ -470,14 +351,8 @@ struct cpu_spec cpu_specs[] = { | |||
470 | .pvr_mask = 0xffff0000, | 351 | .pvr_mask = 0xffff0000, |
471 | .pvr_value = 0x80010000, | 352 | .pvr_value = 0x80010000, |
472 | .cpu_name = "7455", | 353 | .cpu_name = "7455", |
473 | .cpu_features = CPU_FTR_COMMON | | 354 | .cpu_features = CPU_FTRS_7455, |
474 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 355 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
475 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | | ||
476 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | | ||
477 | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | | ||
478 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | | ||
479 | CPU_FTR_NEED_COHERENT, | ||
480 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
481 | .icache_bsize = 32, | 356 | .icache_bsize = 32, |
482 | .dcache_bsize = 32, | 357 | .dcache_bsize = 32, |
483 | .num_pmcs = 6, | 358 | .num_pmcs = 6, |
@@ -487,14 +362,8 @@ struct cpu_spec cpu_specs[] = { | |||
487 | .pvr_mask = 0xffffffff, | 362 | .pvr_mask = 0xffffffff, |
488 | .pvr_value = 0x80020100, | 363 | .pvr_value = 0x80020100, |
489 | .cpu_name = "7447/7457", | 364 | .cpu_name = "7447/7457", |
490 | .cpu_features = CPU_FTR_COMMON | | 365 | .cpu_features = CPU_FTRS_7447_10, |
491 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 366 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
492 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | | ||
493 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | | ||
494 | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | | ||
495 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | | ||
496 | CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC, | ||
497 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
498 | .icache_bsize = 32, | 367 | .icache_bsize = 32, |
499 | .dcache_bsize = 32, | 368 | .dcache_bsize = 32, |
500 | .num_pmcs = 6, | 369 | .num_pmcs = 6, |
@@ -504,14 +373,8 @@ struct cpu_spec cpu_specs[] = { | |||
504 | .pvr_mask = 0xffffffff, | 373 | .pvr_mask = 0xffffffff, |
505 | .pvr_value = 0x80020101, | 374 | .pvr_value = 0x80020101, |
506 | .cpu_name = "7447/7457", | 375 | .cpu_name = "7447/7457", |
507 | .cpu_features = CPU_FTR_COMMON | | 376 | .cpu_features = CPU_FTRS_7447_10, |
508 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 377 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
509 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | | ||
510 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | | ||
511 | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | | ||
512 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | | ||
513 | CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC, | ||
514 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
515 | .icache_bsize = 32, | 378 | .icache_bsize = 32, |
516 | .dcache_bsize = 32, | 379 | .dcache_bsize = 32, |
517 | .num_pmcs = 6, | 380 | .num_pmcs = 6, |
@@ -521,14 +384,8 @@ struct cpu_spec cpu_specs[] = { | |||
521 | .pvr_mask = 0xffff0000, | 384 | .pvr_mask = 0xffff0000, |
522 | .pvr_value = 0x80020000, | 385 | .pvr_value = 0x80020000, |
523 | .cpu_name = "7447/7457", | 386 | .cpu_name = "7447/7457", |
524 | .cpu_features = CPU_FTR_COMMON | | 387 | .cpu_features = CPU_FTRS_7447, |
525 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 388 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
526 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | | ||
527 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | | ||
528 | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | | ||
529 | CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | | ||
530 | CPU_FTR_NEED_COHERENT, | ||
531 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
532 | .icache_bsize = 32, | 389 | .icache_bsize = 32, |
533 | .dcache_bsize = 32, | 390 | .dcache_bsize = 32, |
534 | .num_pmcs = 6, | 391 | .num_pmcs = 6, |
@@ -538,13 +395,8 @@ struct cpu_spec cpu_specs[] = { | |||
538 | .pvr_mask = 0xffff0000, | 395 | .pvr_mask = 0xffff0000, |
539 | .pvr_value = 0x80030000, | 396 | .pvr_value = 0x80030000, |
540 | .cpu_name = "7447A", | 397 | .cpu_name = "7447A", |
541 | .cpu_features = CPU_FTR_COMMON | | 398 | .cpu_features = CPU_FTRS_7447A, |
542 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 399 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
543 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | | ||
544 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | | ||
545 | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | | ||
546 | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT, | ||
547 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
548 | .icache_bsize = 32, | 400 | .icache_bsize = 32, |
549 | .dcache_bsize = 32, | 401 | .dcache_bsize = 32, |
550 | .num_pmcs = 6, | 402 | .num_pmcs = 6, |
@@ -554,13 +406,8 @@ struct cpu_spec cpu_specs[] = { | |||
554 | .pvr_mask = 0xffff0000, | 406 | .pvr_mask = 0xffff0000, |
555 | .pvr_value = 0x80040000, | 407 | .pvr_value = 0x80040000, |
556 | .cpu_name = "7448", | 408 | .cpu_name = "7448", |
557 | .cpu_features = CPU_FTR_COMMON | | 409 | .cpu_features = CPU_FTRS_7447A, |
558 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 410 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP, |
559 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | | ||
560 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | | ||
561 | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | | ||
562 | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT, | ||
563 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, | ||
564 | .icache_bsize = 32, | 411 | .icache_bsize = 32, |
565 | .dcache_bsize = 32, | 412 | .dcache_bsize = 32, |
566 | .num_pmcs = 6, | 413 | .num_pmcs = 6, |
@@ -570,9 +417,7 @@ struct cpu_spec cpu_specs[] = { | |||
570 | .pvr_mask = 0x7fff0000, | 417 | .pvr_mask = 0x7fff0000, |
571 | .pvr_value = 0x00810000, | 418 | .pvr_value = 0x00810000, |
572 | .cpu_name = "82xx", | 419 | .cpu_name = "82xx", |
573 | .cpu_features = CPU_FTR_COMMON | | 420 | .cpu_features = CPU_FTRS_82XX, |
574 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | | ||
575 | CPU_FTR_USE_TB, | ||
576 | .cpu_user_features = COMMON_PPC, | 421 | .cpu_user_features = COMMON_PPC, |
577 | .icache_bsize = 32, | 422 | .icache_bsize = 32, |
578 | .dcache_bsize = 32, | 423 | .dcache_bsize = 32, |
@@ -582,9 +427,7 @@ struct cpu_spec cpu_specs[] = { | |||
582 | .pvr_mask = 0x7fff0000, | 427 | .pvr_mask = 0x7fff0000, |
583 | .pvr_value = 0x00820000, | 428 | .pvr_value = 0x00820000, |
584 | .cpu_name = "G2_LE", | 429 | .cpu_name = "G2_LE", |
585 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 430 | .cpu_features = CPU_FTRS_G2_LE, |
586 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | | ||
587 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS, | ||
588 | .cpu_user_features = COMMON_PPC, | 431 | .cpu_user_features = COMMON_PPC, |
589 | .icache_bsize = 32, | 432 | .icache_bsize = 32, |
590 | .dcache_bsize = 32, | 433 | .dcache_bsize = 32, |
@@ -594,9 +437,7 @@ struct cpu_spec cpu_specs[] = { | |||
594 | .pvr_mask = 0x7fff0000, | 437 | .pvr_mask = 0x7fff0000, |
595 | .pvr_value = 0x00830000, | 438 | .pvr_value = 0x00830000, |
596 | .cpu_name = "e300", | 439 | .cpu_name = "e300", |
597 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 440 | .cpu_features = CPU_FTRS_E300, |
598 | CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | | ||
599 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS, | ||
600 | .cpu_user_features = COMMON_PPC, | 441 | .cpu_user_features = COMMON_PPC, |
601 | .icache_bsize = 32, | 442 | .icache_bsize = 32, |
602 | .dcache_bsize = 32, | 443 | .dcache_bsize = 32, |
@@ -606,9 +447,7 @@ struct cpu_spec cpu_specs[] = { | |||
606 | .pvr_mask = 0x00000000, | 447 | .pvr_mask = 0x00000000, |
607 | .pvr_value = 0x00000000, | 448 | .pvr_value = 0x00000000, |
608 | .cpu_name = "(generic PPC)", | 449 | .cpu_name = "(generic PPC)", |
609 | .cpu_features = CPU_FTR_COMMON | | 450 | .cpu_features = CPU_FTRS_CLASSIC32, |
610 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
611 | CPU_FTR_HPTE_TABLE, | ||
612 | .cpu_user_features = COMMON_PPC, | 451 | .cpu_user_features = COMMON_PPC, |
613 | .icache_bsize = 32, | 452 | .icache_bsize = 32, |
614 | .dcache_bsize = 32, | 453 | .dcache_bsize = 32, |
@@ -620,9 +459,7 @@ struct cpu_spec cpu_specs[] = { | |||
620 | .pvr_mask = 0xffff0000, | 459 | .pvr_mask = 0xffff0000, |
621 | .pvr_value = 0x00400000, | 460 | .pvr_value = 0x00400000, |
622 | .cpu_name = "Power3 (630)", | 461 | .cpu_name = "Power3 (630)", |
623 | .cpu_features = CPU_FTR_COMMON | | 462 | .cpu_features = CPU_FTRS_POWER3_32, |
624 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
625 | CPU_FTR_HPTE_TABLE, | ||
626 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, | 463 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, |
627 | .icache_bsize = 128, | 464 | .icache_bsize = 128, |
628 | .dcache_bsize = 128, | 465 | .dcache_bsize = 128, |
@@ -633,9 +470,7 @@ struct cpu_spec cpu_specs[] = { | |||
633 | .pvr_mask = 0xffff0000, | 470 | .pvr_mask = 0xffff0000, |
634 | .pvr_value = 0x00410000, | 471 | .pvr_value = 0x00410000, |
635 | .cpu_name = "Power3 (630+)", | 472 | .cpu_name = "Power3 (630+)", |
636 | .cpu_features = CPU_FTR_COMMON | | 473 | .cpu_features = CPU_FTRS_POWER3_32, |
637 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
638 | CPU_FTR_HPTE_TABLE, | ||
639 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, | 474 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, |
640 | .icache_bsize = 128, | 475 | .icache_bsize = 128, |
641 | .dcache_bsize = 128, | 476 | .dcache_bsize = 128, |
@@ -646,9 +481,7 @@ struct cpu_spec cpu_specs[] = { | |||
646 | .pvr_mask = 0xffff0000, | 481 | .pvr_mask = 0xffff0000, |
647 | .pvr_value = 0x00360000, | 482 | .pvr_value = 0x00360000, |
648 | .cpu_name = "I-star", | 483 | .cpu_name = "I-star", |
649 | .cpu_features = CPU_FTR_COMMON | | 484 | .cpu_features = CPU_FTRS_POWER3_32, |
650 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
651 | CPU_FTR_HPTE_TABLE, | ||
652 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, | 485 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, |
653 | .icache_bsize = 128, | 486 | .icache_bsize = 128, |
654 | .dcache_bsize = 128, | 487 | .dcache_bsize = 128, |
@@ -659,9 +492,7 @@ struct cpu_spec cpu_specs[] = { | |||
659 | .pvr_mask = 0xffff0000, | 492 | .pvr_mask = 0xffff0000, |
660 | .pvr_value = 0x00370000, | 493 | .pvr_value = 0x00370000, |
661 | .cpu_name = "S-star", | 494 | .cpu_name = "S-star", |
662 | .cpu_features = CPU_FTR_COMMON | | 495 | .cpu_features = CPU_FTRS_POWER3_32, |
663 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
664 | CPU_FTR_HPTE_TABLE, | ||
665 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, | 496 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, |
666 | .icache_bsize = 128, | 497 | .icache_bsize = 128, |
667 | .dcache_bsize = 128, | 498 | .dcache_bsize = 128, |
@@ -670,44 +501,12 @@ struct cpu_spec cpu_specs[] = { | |||
670 | }, | 501 | }, |
671 | #endif /* CONFIG_PPC64BRIDGE */ | 502 | #endif /* CONFIG_PPC64BRIDGE */ |
672 | #ifdef CONFIG_POWER4 | 503 | #ifdef CONFIG_POWER4 |
673 | { /* Power4 */ | ||
674 | .pvr_mask = 0xffff0000, | ||
675 | .pvr_value = 0x00350000, | ||
676 | .cpu_name = "Power4", | ||
677 | .cpu_features = CPU_FTR_COMMON | | ||
678 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
679 | CPU_FTR_HPTE_TABLE, | ||
680 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, | ||
681 | .icache_bsize = 128, | ||
682 | .dcache_bsize = 128, | ||
683 | .num_pmcs = 8, | ||
684 | .cpu_setup = __setup_cpu_power4 | ||
685 | }, | ||
686 | { /* PPC970 */ | ||
687 | .pvr_mask = 0xffff0000, | ||
688 | .pvr_value = 0x00390000, | ||
689 | .cpu_name = "PPC970", | ||
690 | .cpu_features = CPU_FTR_COMMON | | ||
691 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | ||
692 | CPU_FTR_HPTE_TABLE | | ||
693 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MAYBE_CAN_NAP, | ||
694 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 | | ||
695 | PPC_FEATURE_ALTIVEC_COMP, | ||
696 | .icache_bsize = 128, | ||
697 | .dcache_bsize = 128, | ||
698 | .num_pmcs = 8, | ||
699 | .cpu_setup = __setup_cpu_ppc970 | ||
700 | }, | ||
701 | { /* PPC970FX */ | 504 | { /* PPC970FX */ |
702 | .pvr_mask = 0xffff0000, | 505 | .pvr_mask = 0xffff0000, |
703 | .pvr_value = 0x003c0000, | 506 | .pvr_value = 0x003c0000, |
704 | .cpu_name = "PPC970FX", | 507 | .cpu_name = "PPC970FX", |
705 | .cpu_features = CPU_FTR_COMMON | | 508 | .cpu_features = CPU_FTRS_970_32, |
706 | CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | | 509 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC_COMP, |
707 | CPU_FTR_HPTE_TABLE | | ||
708 | CPU_FTR_ALTIVEC_COMP | CPU_FTR_MAYBE_CAN_NAP, | ||
709 | .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 | | ||
710 | PPC_FEATURE_ALTIVEC_COMP, | ||
711 | .icache_bsize = 128, | 510 | .icache_bsize = 128, |
712 | .dcache_bsize = 128, | 511 | .dcache_bsize = 128, |
713 | .num_pmcs = 8, | 512 | .num_pmcs = 8, |
@@ -721,8 +520,7 @@ struct cpu_spec cpu_specs[] = { | |||
721 | .cpu_name = "8xx", | 520 | .cpu_name = "8xx", |
722 | /* CPU_FTR_MAYBE_CAN_DOZE is possible, | 521 | /* CPU_FTR_MAYBE_CAN_DOZE is possible, |
723 | * if the 8xx code is there.... */ | 522 | * if the 8xx code is there.... */ |
724 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 523 | .cpu_features = CPU_FTRS_8XX, |
725 | CPU_FTR_USE_TB, | ||
726 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 524 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
727 | .icache_bsize = 16, | 525 | .icache_bsize = 16, |
728 | .dcache_bsize = 16, | 526 | .dcache_bsize = 16, |
@@ -733,8 +531,7 @@ struct cpu_spec cpu_specs[] = { | |||
733 | .pvr_mask = 0xffffff00, | 531 | .pvr_mask = 0xffffff00, |
734 | .pvr_value = 0x00200200, | 532 | .pvr_value = 0x00200200, |
735 | .cpu_name = "403GC", | 533 | .cpu_name = "403GC", |
736 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 534 | .cpu_features = CPU_FTRS_40X, |
737 | CPU_FTR_USE_TB, | ||
738 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 535 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
739 | .icache_bsize = 16, | 536 | .icache_bsize = 16, |
740 | .dcache_bsize = 16, | 537 | .dcache_bsize = 16, |
@@ -743,8 +540,7 @@ struct cpu_spec cpu_specs[] = { | |||
743 | .pvr_mask = 0xffffff00, | 540 | .pvr_mask = 0xffffff00, |
744 | .pvr_value = 0x00201400, | 541 | .pvr_value = 0x00201400, |
745 | .cpu_name = "403GCX", | 542 | .cpu_name = "403GCX", |
746 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 543 | .cpu_features = CPU_FTRS_40X, |
747 | CPU_FTR_USE_TB, | ||
748 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 544 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
749 | .icache_bsize = 16, | 545 | .icache_bsize = 16, |
750 | .dcache_bsize = 16, | 546 | .dcache_bsize = 16, |
@@ -753,8 +549,7 @@ struct cpu_spec cpu_specs[] = { | |||
753 | .pvr_mask = 0xffff0000, | 549 | .pvr_mask = 0xffff0000, |
754 | .pvr_value = 0x00200000, | 550 | .pvr_value = 0x00200000, |
755 | .cpu_name = "403G ??", | 551 | .cpu_name = "403G ??", |
756 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 552 | .cpu_features = CPU_FTRS_40X, |
757 | CPU_FTR_USE_TB, | ||
758 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 553 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
759 | .icache_bsize = 16, | 554 | .icache_bsize = 16, |
760 | .dcache_bsize = 16, | 555 | .dcache_bsize = 16, |
@@ -763,8 +558,7 @@ struct cpu_spec cpu_specs[] = { | |||
763 | .pvr_mask = 0xffff0000, | 558 | .pvr_mask = 0xffff0000, |
764 | .pvr_value = 0x40110000, | 559 | .pvr_value = 0x40110000, |
765 | .cpu_name = "405GP", | 560 | .cpu_name = "405GP", |
766 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 561 | .cpu_features = CPU_FTRS_40X, |
767 | CPU_FTR_USE_TB, | ||
768 | .cpu_user_features = PPC_FEATURE_32 | | 562 | .cpu_user_features = PPC_FEATURE_32 | |
769 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, | 563 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
770 | .icache_bsize = 32, | 564 | .icache_bsize = 32, |
@@ -774,8 +568,7 @@ struct cpu_spec cpu_specs[] = { | |||
774 | .pvr_mask = 0xffff0000, | 568 | .pvr_mask = 0xffff0000, |
775 | .pvr_value = 0x40130000, | 569 | .pvr_value = 0x40130000, |
776 | .cpu_name = "STB03xxx", | 570 | .cpu_name = "STB03xxx", |
777 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 571 | .cpu_features = CPU_FTRS_40X, |
778 | CPU_FTR_USE_TB, | ||
779 | .cpu_user_features = PPC_FEATURE_32 | | 572 | .cpu_user_features = PPC_FEATURE_32 | |
780 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, | 573 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
781 | .icache_bsize = 32, | 574 | .icache_bsize = 32, |
@@ -785,8 +578,7 @@ struct cpu_spec cpu_specs[] = { | |||
785 | .pvr_mask = 0xffff0000, | 578 | .pvr_mask = 0xffff0000, |
786 | .pvr_value = 0x41810000, | 579 | .pvr_value = 0x41810000, |
787 | .cpu_name = "STB04xxx", | 580 | .cpu_name = "STB04xxx", |
788 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 581 | .cpu_features = CPU_FTRS_40X, |
789 | CPU_FTR_USE_TB, | ||
790 | .cpu_user_features = PPC_FEATURE_32 | | 582 | .cpu_user_features = PPC_FEATURE_32 | |
791 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, | 583 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
792 | .icache_bsize = 32, | 584 | .icache_bsize = 32, |
@@ -796,8 +588,7 @@ struct cpu_spec cpu_specs[] = { | |||
796 | .pvr_mask = 0xffff0000, | 588 | .pvr_mask = 0xffff0000, |
797 | .pvr_value = 0x41610000, | 589 | .pvr_value = 0x41610000, |
798 | .cpu_name = "NP405L", | 590 | .cpu_name = "NP405L", |
799 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 591 | .cpu_features = CPU_FTRS_40X, |
800 | CPU_FTR_USE_TB, | ||
801 | .cpu_user_features = PPC_FEATURE_32 | | 592 | .cpu_user_features = PPC_FEATURE_32 | |
802 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, | 593 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
803 | .icache_bsize = 32, | 594 | .icache_bsize = 32, |
@@ -807,8 +598,7 @@ struct cpu_spec cpu_specs[] = { | |||
807 | .pvr_mask = 0xffff0000, | 598 | .pvr_mask = 0xffff0000, |
808 | .pvr_value = 0x40B10000, | 599 | .pvr_value = 0x40B10000, |
809 | .cpu_name = "NP4GS3", | 600 | .cpu_name = "NP4GS3", |
810 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 601 | .cpu_features = CPU_FTRS_40X, |
811 | CPU_FTR_USE_TB, | ||
812 | .cpu_user_features = PPC_FEATURE_32 | | 602 | .cpu_user_features = PPC_FEATURE_32 | |
813 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, | 603 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
814 | .icache_bsize = 32, | 604 | .icache_bsize = 32, |
@@ -818,8 +608,7 @@ struct cpu_spec cpu_specs[] = { | |||
818 | .pvr_mask = 0xffff0000, | 608 | .pvr_mask = 0xffff0000, |
819 | .pvr_value = 0x41410000, | 609 | .pvr_value = 0x41410000, |
820 | .cpu_name = "NP405H", | 610 | .cpu_name = "NP405H", |
821 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 611 | .cpu_features = CPU_FTRS_40X, |
822 | CPU_FTR_USE_TB, | ||
823 | .cpu_user_features = PPC_FEATURE_32 | | 612 | .cpu_user_features = PPC_FEATURE_32 | |
824 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, | 613 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
825 | .icache_bsize = 32, | 614 | .icache_bsize = 32, |
@@ -829,8 +618,7 @@ struct cpu_spec cpu_specs[] = { | |||
829 | .pvr_mask = 0xffff0000, | 618 | .pvr_mask = 0xffff0000, |
830 | .pvr_value = 0x50910000, | 619 | .pvr_value = 0x50910000, |
831 | .cpu_name = "405GPr", | 620 | .cpu_name = "405GPr", |
832 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 621 | .cpu_features = CPU_FTRS_40X, |
833 | CPU_FTR_USE_TB, | ||
834 | .cpu_user_features = PPC_FEATURE_32 | | 622 | .cpu_user_features = PPC_FEATURE_32 | |
835 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, | 623 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
836 | .icache_bsize = 32, | 624 | .icache_bsize = 32, |
@@ -840,8 +628,7 @@ struct cpu_spec cpu_specs[] = { | |||
840 | .pvr_mask = 0xffff0000, | 628 | .pvr_mask = 0xffff0000, |
841 | .pvr_value = 0x51510000, | 629 | .pvr_value = 0x51510000, |
842 | .cpu_name = "STBx25xx", | 630 | .cpu_name = "STBx25xx", |
843 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 631 | .cpu_features = CPU_FTRS_40X, |
844 | CPU_FTR_USE_TB, | ||
845 | .cpu_user_features = PPC_FEATURE_32 | | 632 | .cpu_user_features = PPC_FEATURE_32 | |
846 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, | 633 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
847 | .icache_bsize = 32, | 634 | .icache_bsize = 32, |
@@ -851,8 +638,7 @@ struct cpu_spec cpu_specs[] = { | |||
851 | .pvr_mask = 0xffff0000, | 638 | .pvr_mask = 0xffff0000, |
852 | .pvr_value = 0x41F10000, | 639 | .pvr_value = 0x41F10000, |
853 | .cpu_name = "405LP", | 640 | .cpu_name = "405LP", |
854 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 641 | .cpu_features = CPU_FTRS_40X, |
855 | CPU_FTR_USE_TB, | ||
856 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 642 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
857 | .icache_bsize = 32, | 643 | .icache_bsize = 32, |
858 | .dcache_bsize = 32, | 644 | .dcache_bsize = 32, |
@@ -861,8 +647,7 @@ struct cpu_spec cpu_specs[] = { | |||
861 | .pvr_mask = 0xffff0000, | 647 | .pvr_mask = 0xffff0000, |
862 | .pvr_value = 0x20010000, | 648 | .pvr_value = 0x20010000, |
863 | .cpu_name = "Virtex-II Pro", | 649 | .cpu_name = "Virtex-II Pro", |
864 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 650 | .cpu_features = CPU_FTRS_40X, |
865 | CPU_FTR_USE_TB, | ||
866 | .cpu_user_features = PPC_FEATURE_32 | | 651 | .cpu_user_features = PPC_FEATURE_32 | |
867 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, | 652 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
868 | .icache_bsize = 32, | 653 | .icache_bsize = 32, |
@@ -872,8 +657,7 @@ struct cpu_spec cpu_specs[] = { | |||
872 | .pvr_mask = 0xffff0000, | 657 | .pvr_mask = 0xffff0000, |
873 | .pvr_value = 0x51210000, | 658 | .pvr_value = 0x51210000, |
874 | .cpu_name = "405EP", | 659 | .cpu_name = "405EP", |
875 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 660 | .cpu_features = CPU_FTRS_40X, |
876 | CPU_FTR_USE_TB, | ||
877 | .cpu_user_features = PPC_FEATURE_32 | | 661 | .cpu_user_features = PPC_FEATURE_32 | |
878 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, | 662 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, |
879 | .icache_bsize = 32, | 663 | .icache_bsize = 32, |
@@ -886,8 +670,7 @@ struct cpu_spec cpu_specs[] = { | |||
886 | .pvr_mask = 0xf0000fff, | 670 | .pvr_mask = 0xf0000fff, |
887 | .pvr_value = 0x40000850, | 671 | .pvr_value = 0x40000850, |
888 | .cpu_name = "440EP Rev. A", | 672 | .cpu_name = "440EP Rev. A", |
889 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 673 | .cpu_features = CPU_FTRS_44X, |
890 | CPU_FTR_USE_TB, | ||
891 | .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */ | 674 | .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */ |
892 | .icache_bsize = 32, | 675 | .icache_bsize = 32, |
893 | .dcache_bsize = 32, | 676 | .dcache_bsize = 32, |
@@ -896,8 +679,7 @@ struct cpu_spec cpu_specs[] = { | |||
896 | .pvr_mask = 0xf0000fff, | 679 | .pvr_mask = 0xf0000fff, |
897 | .pvr_value = 0x400008d3, | 680 | .pvr_value = 0x400008d3, |
898 | .cpu_name = "440EP Rev. B", | 681 | .cpu_name = "440EP Rev. B", |
899 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 682 | .cpu_features = CPU_FTRS_44X, |
900 | CPU_FTR_USE_TB, | ||
901 | .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */ | 683 | .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */ |
902 | .icache_bsize = 32, | 684 | .icache_bsize = 32, |
903 | .dcache_bsize = 32, | 685 | .dcache_bsize = 32, |
@@ -906,8 +688,7 @@ struct cpu_spec cpu_specs[] = { | |||
906 | .pvr_mask = 0xf0000fff, | 688 | .pvr_mask = 0xf0000fff, |
907 | .pvr_value = 0x40000440, | 689 | .pvr_value = 0x40000440, |
908 | .cpu_name = "440GP Rev. B", | 690 | .cpu_name = "440GP Rev. B", |
909 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 691 | .cpu_features = CPU_FTRS_44X, |
910 | CPU_FTR_USE_TB, | ||
911 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 692 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
912 | .icache_bsize = 32, | 693 | .icache_bsize = 32, |
913 | .dcache_bsize = 32, | 694 | .dcache_bsize = 32, |
@@ -916,8 +697,7 @@ struct cpu_spec cpu_specs[] = { | |||
916 | .pvr_mask = 0xf0000fff, | 697 | .pvr_mask = 0xf0000fff, |
917 | .pvr_value = 0x40000481, | 698 | .pvr_value = 0x40000481, |
918 | .cpu_name = "440GP Rev. C", | 699 | .cpu_name = "440GP Rev. C", |
919 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 700 | .cpu_features = CPU_FTRS_44X, |
920 | CPU_FTR_USE_TB, | ||
921 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 701 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
922 | .icache_bsize = 32, | 702 | .icache_bsize = 32, |
923 | .dcache_bsize = 32, | 703 | .dcache_bsize = 32, |
@@ -926,8 +706,7 @@ struct cpu_spec cpu_specs[] = { | |||
926 | .pvr_mask = 0xf0000fff, | 706 | .pvr_mask = 0xf0000fff, |
927 | .pvr_value = 0x50000850, | 707 | .pvr_value = 0x50000850, |
928 | .cpu_name = "440GX Rev. A", | 708 | .cpu_name = "440GX Rev. A", |
929 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 709 | .cpu_features = CPU_FTRS_44X, |
930 | CPU_FTR_USE_TB, | ||
931 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 710 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
932 | .icache_bsize = 32, | 711 | .icache_bsize = 32, |
933 | .dcache_bsize = 32, | 712 | .dcache_bsize = 32, |
@@ -936,8 +715,7 @@ struct cpu_spec cpu_specs[] = { | |||
936 | .pvr_mask = 0xf0000fff, | 715 | .pvr_mask = 0xf0000fff, |
937 | .pvr_value = 0x50000851, | 716 | .pvr_value = 0x50000851, |
938 | .cpu_name = "440GX Rev. B", | 717 | .cpu_name = "440GX Rev. B", |
939 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 718 | .cpu_features = CPU_FTRS_44X, |
940 | CPU_FTR_USE_TB, | ||
941 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 719 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
942 | .icache_bsize = 32, | 720 | .icache_bsize = 32, |
943 | .dcache_bsize = 32, | 721 | .dcache_bsize = 32, |
@@ -946,8 +724,7 @@ struct cpu_spec cpu_specs[] = { | |||
946 | .pvr_mask = 0xf0000fff, | 724 | .pvr_mask = 0xf0000fff, |
947 | .pvr_value = 0x50000892, | 725 | .pvr_value = 0x50000892, |
948 | .cpu_name = "440GX Rev. C", | 726 | .cpu_name = "440GX Rev. C", |
949 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 727 | .cpu_features = CPU_FTRS_44X, |
950 | CPU_FTR_USE_TB, | ||
951 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 728 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
952 | .icache_bsize = 32, | 729 | .icache_bsize = 32, |
953 | .dcache_bsize = 32, | 730 | .dcache_bsize = 32, |
@@ -956,8 +733,7 @@ struct cpu_spec cpu_specs[] = { | |||
956 | .pvr_mask = 0xf0000fff, | 733 | .pvr_mask = 0xf0000fff, |
957 | .pvr_value = 0x50000894, | 734 | .pvr_value = 0x50000894, |
958 | .cpu_name = "440GX Rev. F", | 735 | .cpu_name = "440GX Rev. F", |
959 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 736 | .cpu_features = CPU_FTRS_44X, |
960 | CPU_FTR_USE_TB, | ||
961 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 737 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
962 | .icache_bsize = 32, | 738 | .icache_bsize = 32, |
963 | .dcache_bsize = 32, | 739 | .dcache_bsize = 32, |
@@ -966,8 +742,7 @@ struct cpu_spec cpu_specs[] = { | |||
966 | .pvr_mask = 0xff000fff, | 742 | .pvr_mask = 0xff000fff, |
967 | .pvr_value = 0x53000891, | 743 | .pvr_value = 0x53000891, |
968 | .cpu_name = "440SP Rev. A", | 744 | .cpu_name = "440SP Rev. A", |
969 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 745 | .cpu_features = CPU_FTRS_44X, |
970 | CPU_FTR_USE_TB, | ||
971 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 746 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
972 | .icache_bsize = 32, | 747 | .icache_bsize = 32, |
973 | .dcache_bsize = 32, | 748 | .dcache_bsize = 32, |
@@ -979,7 +754,7 @@ struct cpu_spec cpu_specs[] = { | |||
979 | .pvr_value = 0x81000000, | 754 | .pvr_value = 0x81000000, |
980 | .cpu_name = "e200z5", | 755 | .cpu_name = "e200z5", |
981 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ | 756 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ |
982 | .cpu_features = CPU_FTR_USE_TB, | 757 | .cpu_features = CPU_FTRS_E200, |
983 | .cpu_user_features = PPC_FEATURE_32 | | 758 | .cpu_user_features = PPC_FEATURE_32 | |
984 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE | | 759 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE | |
985 | PPC_FEATURE_UNIFIED_CACHE, | 760 | PPC_FEATURE_UNIFIED_CACHE, |
@@ -990,7 +765,7 @@ struct cpu_spec cpu_specs[] = { | |||
990 | .pvr_value = 0x81100000, | 765 | .pvr_value = 0x81100000, |
991 | .cpu_name = "e200z6", | 766 | .cpu_name = "e200z6", |
992 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ | 767 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ |
993 | .cpu_features = CPU_FTR_USE_TB, | 768 | .cpu_features = CPU_FTRS_E200, |
994 | .cpu_user_features = PPC_FEATURE_32 | | 769 | .cpu_user_features = PPC_FEATURE_32 | |
995 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | | 770 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | |
996 | PPC_FEATURE_HAS_EFP_SINGLE | | 771 | PPC_FEATURE_HAS_EFP_SINGLE | |
@@ -1002,8 +777,7 @@ struct cpu_spec cpu_specs[] = { | |||
1002 | .pvr_value = 0x80200000, | 777 | .pvr_value = 0x80200000, |
1003 | .cpu_name = "e500", | 778 | .cpu_name = "e500", |
1004 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ | 779 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ |
1005 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 780 | .cpu_features = CPU_FTRS_E500, |
1006 | CPU_FTR_USE_TB, | ||
1007 | .cpu_user_features = PPC_FEATURE_32 | | 781 | .cpu_user_features = PPC_FEATURE_32 | |
1008 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | | 782 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | |
1009 | PPC_FEATURE_HAS_EFP_SINGLE, | 783 | PPC_FEATURE_HAS_EFP_SINGLE, |
@@ -1016,8 +790,7 @@ struct cpu_spec cpu_specs[] = { | |||
1016 | .pvr_value = 0x80210000, | 790 | .pvr_value = 0x80210000, |
1017 | .cpu_name = "e500v2", | 791 | .cpu_name = "e500v2", |
1018 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ | 792 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ |
1019 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 793 | .cpu_features = CPU_FTRS_E500_2, |
1020 | CPU_FTR_USE_TB | CPU_FTR_BIG_PHYS, | ||
1021 | .cpu_user_features = PPC_FEATURE_32 | | 794 | .cpu_user_features = PPC_FEATURE_32 | |
1022 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | | 795 | PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | |
1023 | PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE, | 796 | PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE, |
@@ -1031,7 +804,7 @@ struct cpu_spec cpu_specs[] = { | |||
1031 | .pvr_mask = 0x00000000, | 804 | .pvr_mask = 0x00000000, |
1032 | .pvr_value = 0x00000000, | 805 | .pvr_value = 0x00000000, |
1033 | .cpu_name = "(generic PPC)", | 806 | .cpu_name = "(generic PPC)", |
1034 | .cpu_features = CPU_FTR_COMMON, | 807 | .cpu_features = CPU_FTRS_GENERIC_32, |
1035 | .cpu_user_features = PPC_FEATURE_32, | 808 | .cpu_user_features = PPC_FEATURE_32, |
1036 | .icache_bsize = 32, | 809 | .icache_bsize = 32, |
1037 | .dcache_bsize = 32, | 810 | .dcache_bsize = 32, |