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authorJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-06-10 14:47:26 -0400
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-06-10 14:47:26 -0400
commitf0cd91a68acdc9b49d7f6738b514a426da627649 (patch)
tree8ad73564015794197583b094217ae0a71e71e753 /arch/ppc
parent60eef25701d25e99c991dd0f4a9f3832a0c3ad3e (diff)
parent128e6ced247cda88f96fa9f2e4ba8b2c4a681560 (diff)
Merge ../linux-2.6
Diffstat (limited to 'arch/ppc')
-rw-r--r--arch/ppc/kernel/asm-offsets.c1
-rw-r--r--arch/ppc/kernel/entry.S33
-rw-r--r--arch/ppc/kernel/head_8xx.S4
-rw-r--r--arch/ppc/kernel/ppc_ksyms.c1
-rw-r--r--arch/ppc/platforms/4xx/ocotea.c2
-rw-r--r--arch/ppc/platforms/mpc8272ads_setup.c116
-rw-r--r--arch/ppc/platforms/mpc866ads_setup.c140
-rw-r--r--arch/ppc/platforms/mpc885ads_setup.c131
-rw-r--r--arch/ppc/platforms/pq2ads.c31
-rw-r--r--arch/ppc/syslib/ibm440gx_common.c13
-rw-r--r--arch/ppc/syslib/ibm440gx_common.h4
-rw-r--r--arch/ppc/syslib/mpc8xx_devices.c25
-rw-r--r--arch/ppc/syslib/ppc_sys.c13
-rw-r--r--arch/ppc/syslib/pq2_devices.c16
-rw-r--r--arch/ppc/syslib/pq2_sys.c16
15 files changed, 494 insertions, 52 deletions
diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c
index 77e4dc780f8c..2f5c5e157617 100644
--- a/arch/ppc/kernel/asm-offsets.c
+++ b/arch/ppc/kernel/asm-offsets.c
@@ -134,6 +134,7 @@ main(void)
134 DEFINE(TI_TASK, offsetof(struct thread_info, task)); 134 DEFINE(TI_TASK, offsetof(struct thread_info, task));
135 DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain)); 135 DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain));
136 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); 136 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
137 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
137 DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); 138 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
138 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); 139 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
139 140
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
index 5891ecbdc703..1adc9145516f 100644
--- a/arch/ppc/kernel/entry.S
+++ b/arch/ppc/kernel/entry.S
@@ -128,29 +128,26 @@ transfer_to_handler:
128 stw r12,4(r11) 128 stw r12,4(r11)
129#endif 129#endif
130 b 3f 130 b 3f
131
1312: /* if from kernel, check interrupted DOZE/NAP mode and 1322: /* if from kernel, check interrupted DOZE/NAP mode and
132 * check for stack overflow 133 * check for stack overflow
133 */ 134 */
135 lwz r9,THREAD_INFO-THREAD(r12)
136 cmplw r1,r9 /* if r1 <= current->thread_info */
137 ble- stack_ovf /* then the kernel stack overflowed */
1385:
134#ifdef CONFIG_6xx 139#ifdef CONFIG_6xx
135 mfspr r11,SPRN_HID0 140 tophys(r9,r9) /* check local flags */
136 mtcr r11 141 lwz r12,TI_LOCAL_FLAGS(r9)
137BEGIN_FTR_SECTION 142 mtcrf 0x01,r12
138 bt- 8,4f /* Check DOZE */ 143 bt- 31-TLF_NAPPING,4f
139END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
140BEGIN_FTR_SECTION
141 bt- 9,4f /* Check NAP */
142END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
143#endif /* CONFIG_6xx */ 144#endif /* CONFIG_6xx */
144 .globl transfer_to_handler_cont 145 .globl transfer_to_handler_cont
145transfer_to_handler_cont: 146transfer_to_handler_cont:
146 lwz r11,THREAD_INFO-THREAD(r12)
147 cmplw r1,r11 /* if r1 <= current->thread_info */
148 ble- stack_ovf /* then the kernel stack overflowed */
1493: 1473:
150 mflr r9 148 mflr r9
151 lwz r11,0(r9) /* virtual address of handler */ 149 lwz r11,0(r9) /* virtual address of handler */
152 lwz r9,4(r9) /* where to go when done */ 150 lwz r9,4(r9) /* where to go when done */
153 FIX_SRR1(r10,r12)
154 mtspr SPRN_SRR0,r11 151 mtspr SPRN_SRR0,r11
155 mtspr SPRN_SRR1,r10 152 mtspr SPRN_SRR1,r10
156 mtlr r9 153 mtlr r9
@@ -158,7 +155,9 @@ transfer_to_handler_cont:
158 RFI /* jump to handler, enable MMU */ 155 RFI /* jump to handler, enable MMU */
159 156
160#ifdef CONFIG_6xx 157#ifdef CONFIG_6xx
1614: b power_save_6xx_restore 1584: rlwinm r12,r12,0,~_TLF_NAPPING
159 stw r12,TI_LOCAL_FLAGS(r9)
160 b power_save_6xx_restore
162#endif 161#endif
163 162
164/* 163/*
@@ -167,10 +166,10 @@ transfer_to_handler_cont:
167 */ 166 */
168stack_ovf: 167stack_ovf:
169 /* sometimes we use a statically-allocated stack, which is OK. */ 168 /* sometimes we use a statically-allocated stack, which is OK. */
170 lis r11,_end@h 169 lis r12,_end@h
171 ori r11,r11,_end@l 170 ori r12,r12,_end@l
172 cmplw r1,r11 171 cmplw r1,r12
173 ble 3b /* r1 <= &_end is OK */ 172 ble 5b /* r1 <= &_end is OK */
174 SAVE_NVGPRS(r11) 173 SAVE_NVGPRS(r11)
175 addi r3,r1,STACK_FRAME_OVERHEAD 174 addi r3,r1,STACK_FRAME_OVERHEAD
176 lis r1,init_thread_union@ha 175 lis r1,init_thread_union@ha
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index ec53c7d65f2b..7a2f20583be4 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -355,9 +355,7 @@ InstructionTLBMiss:
355 355
356 . = 0x1200 356 . = 0x1200
357DataStoreTLBMiss: 357DataStoreTLBMiss:
358#ifdef CONFIG_8xx_CPU6
359 stw r3, 8(r0) 358 stw r3, 8(r0)
360#endif
361 DO_8xx_CPU6(0x3f80, r3) 359 DO_8xx_CPU6(0x3f80, r3)
362 mtspr SPRN_M_TW, r10 /* Save a couple of working registers */ 360 mtspr SPRN_M_TW, r10 /* Save a couple of working registers */
363 mfcr r10 361 mfcr r10
@@ -417,9 +415,7 @@ DataStoreTLBMiss:
417 lwz r11, 0(r0) 415 lwz r11, 0(r0)
418 mtcr r11 416 mtcr r11
419 lwz r11, 4(r0) 417 lwz r11, 4(r0)
420#ifdef CONFIG_8xx_CPU6
421 lwz r3, 8(r0) 418 lwz r3, 8(r0)
422#endif
423 rfi 419 rfi
424 420
425/* This is an instruction TLB error on the MPC8xx. This could be due 421/* This is an instruction TLB error on the MPC8xx. This could be due
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 865ba74991a9..b250b1b539b6 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -94,6 +94,7 @@ EXPORT_SYMBOL(strcat);
94EXPORT_SYMBOL(strlen); 94EXPORT_SYMBOL(strlen);
95EXPORT_SYMBOL(strcmp); 95EXPORT_SYMBOL(strcmp);
96EXPORT_SYMBOL(strcasecmp); 96EXPORT_SYMBOL(strcasecmp);
97EXPORT_SYMBOL(strncasecmp);
97EXPORT_SYMBOL(__div64_32); 98EXPORT_SYMBOL(__div64_32);
98 99
99EXPORT_SYMBOL(csum_partial); 100EXPORT_SYMBOL(csum_partial);
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c
index f841972f1fa9..554776d4b8ac 100644
--- a/arch/ppc/platforms/4xx/ocotea.c
+++ b/arch/ppc/platforms/4xx/ocotea.c
@@ -331,7 +331,7 @@ static void __init ocotea_init(void)
331void __init platform_init(unsigned long r3, unsigned long r4, 331void __init platform_init(unsigned long r3, unsigned long r4,
332 unsigned long r5, unsigned long r6, unsigned long r7) 332 unsigned long r5, unsigned long r6, unsigned long r7)
333{ 333{
334 ibm44x_platform_init(r3, r4, r5, r6, r7); 334 ibm440gx_platform_init(r3, r4, r5, r6, r7);
335 335
336 ppc_md.setup_arch = ocotea_setup_arch; 336 ppc_md.setup_arch = ocotea_setup_arch;
337 ppc_md.show_cpuinfo = ocotea_show_cpuinfo; 337 ppc_md.show_cpuinfo = ocotea_show_cpuinfo;
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c
index bc9b94f77e39..abb7154de2c7 100644
--- a/arch/ppc/platforms/mpc8272ads_setup.c
+++ b/arch/ppc/platforms/mpc8272ads_setup.c
@@ -26,11 +26,35 @@
26#include <asm/irq.h> 26#include <asm/irq.h>
27#include <asm/ppc_sys.h> 27#include <asm/ppc_sys.h>
28#include <asm/ppcboot.h> 28#include <asm/ppcboot.h>
29#include <linux/fs_uart_pd.h>
29 30
30#include "pq2ads_pd.h" 31#include "pq2ads_pd.h"
31 32
32static void init_fcc1_ioports(void); 33static void init_fcc1_ioports(void);
33static void init_fcc2_ioports(void); 34static void init_fcc2_ioports(void);
35static void init_scc1_uart_ioports(void);
36static void init_scc4_uart_ioports(void);
37
38static struct fs_uart_platform_info mpc8272_uart_pdata[] = {
39 [fsid_scc1_uart] = {
40 .init_ioports = init_scc1_uart_ioports,
41 .fs_no = fsid_scc1_uart,
42 .brg = 1,
43 .tx_num_fifo = 4,
44 .tx_buf_size = 32,
45 .rx_num_fifo = 4,
46 .rx_buf_size = 32,
47 },
48 [fsid_scc4_uart] = {
49 .init_ioports = init_scc4_uart_ioports,
50 .fs_no = fsid_scc4_uart,
51 .brg = 4,
52 .tx_num_fifo = 4,
53 .tx_buf_size = 32,
54 .rx_num_fifo = 4,
55 .rx_buf_size = 32,
56 },
57};
34 58
35static struct fs_mii_bus_info mii_bus_info = { 59static struct fs_mii_bus_info mii_bus_info = {
36 .method = fsmii_bitbang, 60 .method = fsmii_bitbang,
@@ -201,12 +225,65 @@ static void __init mpc8272ads_fixup_enet_pdata(struct platform_device *pdev,
201 } 225 }
202} 226}
203 227
228static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev,
229 int idx)
230{
231 bd_t *bd = (bd_t *) __res;
232 struct fs_uart_platform_info *pinfo;
233 int num = ARRAY_SIZE(mpc8272_uart_pdata);
234 int id = fs_uart_id_scc2fsid(idx);
235
236 /* no need to alter anything if console */
237 if ((id <= num) && (!pdev->dev.platform_data)) {
238 pinfo = &mpc8272_uart_pdata[id];
239 pinfo->uart_clk = bd->bi_intfreq;
240 pdev->dev.platform_data = pinfo;
241 }
242}
243
244static void init_scc1_uart_ioports(void)
245{
246 cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
247
248 /* SCC1 is only on port D */
249 setbits32(&immap->im_ioport.iop_ppard,0x00000003);
250 clrbits32(&immap->im_ioport.iop_psord,0x00000001);
251 setbits32(&immap->im_ioport.iop_psord,0x00000002);
252 clrbits32(&immap->im_ioport.iop_pdird,0x00000001);
253 setbits32(&immap->im_ioport.iop_pdird,0x00000002);
254
255 /* Wire BRG1 to SCC1 */
256 clrbits32(&immap->im_cpmux.cmx_scr,0x00ffffff);
257
258 iounmap(immap);
259}
260
261static void init_scc4_uart_ioports(void)
262{
263 cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
264
265 setbits32(&immap->im_ioport.iop_ppard,0x00000600);
266 clrbits32(&immap->im_ioport.iop_psord,0x00000600);
267 clrbits32(&immap->im_ioport.iop_pdird,0x00000200);
268 setbits32(&immap->im_ioport.iop_pdird,0x00000400);
269
270 /* Wire BRG4 to SCC4 */
271 clrbits32(&immap->im_cpmux.cmx_scr,0x000000ff);
272 setbits32(&immap->im_cpmux.cmx_scr,0x0000001b);
273
274 iounmap(immap);
275}
276
204static int mpc8272ads_platform_notify(struct device *dev) 277static int mpc8272ads_platform_notify(struct device *dev)
205{ 278{
206 static const struct platform_notify_dev_map dev_map[] = { 279 static const struct platform_notify_dev_map dev_map[] = {
207 { 280 {
208 .bus_id = "fsl-cpm-fcc", 281 .bus_id = "fsl-cpm-fcc",
209 .rtn = mpc8272ads_fixup_enet_pdata 282 .rtn = mpc8272ads_fixup_enet_pdata,
283 },
284 {
285 .bus_id = "fsl-cpm-scc:uart",
286 .rtn = mpc8272ads_fixup_uart_pdata,
210 }, 287 },
211 { 288 {
212 .bus_id = NULL 289 .bus_id = NULL
@@ -230,7 +307,44 @@ int __init mpc8272ads_init(void)
230 ppc_sys_device_enable(MPC82xx_CPM_FCC1); 307 ppc_sys_device_enable(MPC82xx_CPM_FCC1);
231 ppc_sys_device_enable(MPC82xx_CPM_FCC2); 308 ppc_sys_device_enable(MPC82xx_CPM_FCC2);
232 309
310 /* to be ready for console, let's attach pdata here */
311#ifdef CONFIG_SERIAL_CPM_SCC1
312 ppc_sys_device_setfunc(MPC82xx_CPM_SCC1, PPC_SYS_FUNC_UART);
313 ppc_sys_device_enable(MPC82xx_CPM_SCC1);
314
315#endif
316
317#ifdef CONFIG_SERIAL_CPM_SCC4
318 ppc_sys_device_setfunc(MPC82xx_CPM_SCC4, PPC_SYS_FUNC_UART);
319 ppc_sys_device_enable(MPC82xx_CPM_SCC4);
320#endif
321
322
233 return 0; 323 return 0;
234} 324}
235 325
326/*
327 To prevent confusion, console selection is gross:
328 by 0 assumed SCC1 and by 1 assumed SCC4
329 */
330struct platform_device* early_uart_get_pdev(int index)
331{
332 bd_t *bd = (bd_t *) __res;
333 struct fs_uart_platform_info *pinfo;
334
335 struct platform_device* pdev = NULL;
336 if(index) { /*assume SCC4 here*/
337 pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
338 pinfo = &mpc8272_uart_pdata[fsid_scc4_uart];
339 } else { /*over SCC1*/
340 pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
341 pinfo = &mpc8272_uart_pdata[fsid_scc1_uart];
342 }
343
344 pinfo->uart_clk = bd->bi_intfreq;
345 pdev->dev.platform_data = pinfo;
346 ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
347 return NULL;
348}
349
236arch_initcall(mpc8272ads_init); 350arch_initcall(mpc8272ads_init);
diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c
index ac8fcc68afeb..d919dab61347 100644
--- a/arch/ppc/platforms/mpc866ads_setup.c
+++ b/arch/ppc/platforms/mpc866ads_setup.c
@@ -20,6 +20,7 @@
20#include <linux/device.h> 20#include <linux/device.h>
21 21
22#include <linux/fs_enet_pd.h> 22#include <linux/fs_enet_pd.h>
23#include <linux/fs_uart_pd.h>
23#include <linux/mii.h> 24#include <linux/mii.h>
24 25
25#include <asm/delay.h> 26#include <asm/delay.h>
@@ -37,6 +38,11 @@
37 38
38extern unsigned char __res[]; 39extern unsigned char __res[];
39 40
41static void setup_fec1_ioports(void);
42static void setup_scc1_ioports(void);
43static void setup_smc1_ioports(void);
44static void setup_smc2_ioports(void);
45
40static struct fs_mii_bus_info fec_mii_bus_info = { 46static struct fs_mii_bus_info fec_mii_bus_info = {
41 .method = fsmii_fec, 47 .method = fsmii_fec,
42 .id = 0, 48 .id = 0,
@@ -79,6 +85,28 @@ static struct fs_platform_info mpc8xx_scc_pdata = {
79 .phy_irq = -1, 85 .phy_irq = -1,
80 86
81 .bus_info = &scc_mii_bus_info, 87 .bus_info = &scc_mii_bus_info,
88
89};
90
91static struct fs_uart_platform_info mpc866_uart_pdata[] = {
92 [fsid_smc1_uart] = {
93 .brg = 1,
94 .fs_no = fsid_smc1_uart,
95 .init_ioports = setup_smc1_ioports,
96 .tx_num_fifo = 4,
97 .tx_buf_size = 32,
98 .rx_num_fifo = 4,
99 .rx_buf_size = 32,
100 },
101 [fsid_smc2_uart] = {
102 .brg = 2,
103 .fs_no = fsid_smc2_uart,
104 .init_ioports = setup_smc2_ioports,
105 .tx_num_fifo = 4,
106 .tx_buf_size = 32,
107 .rx_num_fifo = 4,
108 .rx_buf_size = 32,
109 },
82}; 110};
83 111
84void __init board_init(void) 112void __init board_init(void)
@@ -92,9 +120,12 @@ void __init board_init(void)
92 printk(KERN_CRIT "Could not remap BCSR1\n"); 120 printk(KERN_CRIT "Could not remap BCSR1\n");
93 return; 121 return;
94 } 122 }
123
95#ifdef CONFIG_SERIAL_CPM_SMC1 124#ifdef CONFIG_SERIAL_CPM_SMC1
96 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */ 125 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
97 clrbits32(bcsr_io,(0x80000000 >> 7)); 126 clrbits32(bcsr_io,(0x80000000 >> 7));
127 cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
128 cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
98#else 129#else
99 setbits32(bcsr_io,(0x80000000 >> 7)); 130 setbits32(bcsr_io,(0x80000000 >> 7));
100 131
@@ -108,6 +139,8 @@ void __init board_init(void)
108 cp->cp_simode &= ~(0xe0000000 >> 1); 139 cp->cp_simode &= ~(0xe0000000 >> 1);
109 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */ 140 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
110 clrbits32(bcsr_io,(0x80000000 >> 13)); 141 clrbits32(bcsr_io,(0x80000000 >> 13));
142 cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
143 cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
111#else 144#else
112 clrbits32(bcsr_io,(0x80000000 >> 13)); 145 clrbits32(bcsr_io,(0x80000000 >> 13));
113 cp->cp_pbpar &= ~(0x00000c00); 146 cp->cp_pbpar &= ~(0x00000c00);
@@ -232,6 +265,74 @@ static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev,
232 mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); 265 mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
233} 266}
234 267
268static void setup_smc1_ioports(void)
269{
270 immap_t *immap = (immap_t *) IMAP_ADDR;
271 unsigned *bcsr_io;
272 unsigned int iobits = 0x000000c0;
273
274 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
275
276 if (bcsr_io == NULL) {
277 printk(KERN_CRIT "Could not remap BCSR1\n");
278 return;
279 }
280
281 clrbits32(bcsr_io,BCSR1_RS232EN_1);
282 iounmap(bcsr_io);
283
284 setbits32(&immap->im_cpm.cp_pbpar, iobits);
285 clrbits32(&immap->im_cpm.cp_pbdir, iobits);
286 clrbits16(&immap->im_cpm.cp_pbodr, iobits);
287
288}
289
290static void setup_smc2_ioports(void)
291{
292 immap_t *immap = (immap_t *) IMAP_ADDR;
293 unsigned *bcsr_io;
294 unsigned int iobits = 0x00000c00;
295
296 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
297
298 if (bcsr_io == NULL) {
299 printk(KERN_CRIT "Could not remap BCSR1\n");
300 return;
301 }
302
303 clrbits32(bcsr_io,BCSR1_RS232EN_2);
304
305 iounmap(bcsr_io);
306
307#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
308 setbits32(&immap->im_cpm.cp_pbpar, iobits);
309 clrbits32(&immap->im_cpm.cp_pbdir, iobits);
310 clrbits16(&immap->im_cpm.cp_pbodr, iobits);
311#else
312 setbits16(&immap->im_ioport.iop_papar, iobits);
313 clrbits16(&immap->im_ioport.iop_padir, iobits);
314 clrbits16(&immap->im_ioport.iop_paodr, iobits);
315#endif
316
317}
318
319static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev,
320 int idx)
321{
322 bd_t *bd = (bd_t *) __res;
323 struct fs_uart_platform_info *pinfo;
324 int num = ARRAY_SIZE(mpc866_uart_pdata);
325
326 int id = fs_uart_id_smc2fsid(idx);
327
328 /* no need to alter anything if console */
329 if ((id <= num) && (!pdev->dev.platform_data)) {
330 pinfo = &mpc866_uart_pdata[id];
331 pinfo->uart_clk = bd->bi_intfreq;
332 pdev->dev.platform_data = pinfo;
333 }
334}
335
235static int mpc866ads_platform_notify(struct device *dev) 336static int mpc866ads_platform_notify(struct device *dev)
236{ 337{
237 static const struct platform_notify_dev_map dev_map[] = { 338 static const struct platform_notify_dev_map dev_map[] = {
@@ -244,6 +345,10 @@ static int mpc866ads_platform_notify(struct device *dev)
244 .rtn = mpc866ads_fixup_scc_enet_pdata, 345 .rtn = mpc866ads_fixup_scc_enet_pdata,
245 }, 346 },
246 { 347 {
348 .bus_id = "fsl-cpm-smc:uart",
349 .rtn = mpc866ads_fixup_uart_pdata
350 },
351 {
247 .bus_id = NULL 352 .bus_id = NULL
248 } 353 }
249 }; 354 };
@@ -267,7 +372,42 @@ int __init mpc866ads_init(void)
267#endif 372#endif
268 ppc_sys_device_enable(MPC8xx_CPM_FEC1); 373 ppc_sys_device_enable(MPC8xx_CPM_FEC1);
269 374
375/* Since either of the uarts could be used as console, they need to ready */
376#ifdef CONFIG_SERIAL_CPM_SMC1
377 ppc_sys_device_enable(MPC8xx_CPM_SMC1);
378 ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
379#endif
380
381#ifdef CONFIG_SERIAL_CPM_SMC
382 ppc_sys_device_enable(MPC8xx_CPM_SMC2);
383 ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
384#endif
385
270 return 0; 386 return 0;
271} 387}
272 388
389/*
390 To prevent confusion, console selection is gross:
391 by 0 assumed SMC1 and by 1 assumed SMC2
392 */
393struct platform_device* early_uart_get_pdev(int index)
394{
395 bd_t *bd = (bd_t *) __res;
396 struct fs_uart_platform_info *pinfo;
397
398 struct platform_device* pdev = NULL;
399 if(index) { /*assume SMC2 here*/
400 pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
401 pinfo = &mpc866_uart_pdata[1];
402 } else { /*over SMC1*/
403 pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
404 pinfo = &mpc866_uart_pdata[0];
405 }
406
407 pinfo->uart_clk = bd->bi_intfreq;
408 pdev->dev.platform_data = pinfo;
409 ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
410 return NULL;
411}
412
273arch_initcall(mpc866ads_init); 413arch_initcall(mpc866ads_init);
diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c
index 50a99e5f7c68..4b88679cd31c 100644
--- a/arch/ppc/platforms/mpc885ads_setup.c
+++ b/arch/ppc/platforms/mpc885ads_setup.c
@@ -20,6 +20,7 @@
20#include <linux/device.h> 20#include <linux/device.h>
21 21
22#include <linux/fs_enet_pd.h> 22#include <linux/fs_enet_pd.h>
23#include <linux/fs_uart_pd.h>
23#include <linux/mii.h> 24#include <linux/mii.h>
24 25
25#include <asm/delay.h> 26#include <asm/delay.h>
@@ -35,9 +36,32 @@
35#include <asm/ppc_sys.h> 36#include <asm/ppc_sys.h>
36 37
37extern unsigned char __res[]; 38extern unsigned char __res[];
39static void setup_smc1_ioports(void);
40static void setup_smc2_ioports(void);
38 41
39static void __init mpc885ads_scc_phy_init(char); 42static void __init mpc885ads_scc_phy_init(char);
40 43
44static struct fs_uart_platform_info mpc885_uart_pdata[] = {
45 [fsid_smc1_uart] = {
46 .brg = 1,
47 .fs_no = fsid_smc1_uart,
48 .init_ioports = setup_smc1_ioports,
49 .tx_num_fifo = 4,
50 .tx_buf_size = 32,
51 .rx_num_fifo = 4,
52 .rx_buf_size = 32,
53 },
54 [fsid_smc2_uart] = {
55 .brg = 2,
56 .fs_no = fsid_smc2_uart,
57 .init_ioports = setup_smc2_ioports,
58 .tx_num_fifo = 4,
59 .tx_buf_size = 32,
60 .rx_num_fifo = 4,
61 .rx_buf_size = 32,
62 },
63};
64
41static struct fs_mii_bus_info fec_mii_bus_info = { 65static struct fs_mii_bus_info fec_mii_bus_info = {
42 .method = fsmii_fec, 66 .method = fsmii_fec,
43 .id = 0, 67 .id = 0,
@@ -116,6 +140,8 @@ void __init board_init(void)
116#ifdef CONFIG_SERIAL_CPM_SMC1 140#ifdef CONFIG_SERIAL_CPM_SMC1
117 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */ 141 cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
118 clrbits32(bcsr_io, BCSR1_RS232EN_1); 142 clrbits32(bcsr_io, BCSR1_RS232EN_1);
143 cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
144 cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
119#else 145#else
120 setbits32(bcsr_io,BCSR1_RS232EN_1); 146 setbits32(bcsr_io,BCSR1_RS232EN_1);
121 cp->cp_smc[0].smc_smcmr = 0; 147 cp->cp_smc[0].smc_smcmr = 0;
@@ -126,6 +152,8 @@ void __init board_init(void)
126 cp->cp_simode &= ~(0xe0000000 >> 1); 152 cp->cp_simode &= ~(0xe0000000 >> 1);
127 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */ 153 cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
128 clrbits32(bcsr_io,BCSR1_RS232EN_2); 154 clrbits32(bcsr_io,BCSR1_RS232EN_2);
155 cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
156 cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
129#else 157#else
130 setbits32(bcsr_io,BCSR1_RS232EN_2); 158 setbits32(bcsr_io,BCSR1_RS232EN_2);
131 cp->cp_smc[1].smc_smcmr = 0; 159 cp->cp_smc[1].smc_smcmr = 0;
@@ -343,6 +371,70 @@ static void mpc885ads_scc_phy_init(char phy_addr)
343 out_be32(&fecp->fec_mii_speed, 0); 371 out_be32(&fecp->fec_mii_speed, 0);
344} 372}
345 373
374static void setup_smc1_ioports(void)
375{
376 immap_t *immap = (immap_t *) IMAP_ADDR;
377 unsigned *bcsr_io;
378 unsigned int iobits = 0x000000c0;
379
380 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
381
382 if (bcsr_io == NULL) {
383 printk(KERN_CRIT "Could not remap BCSR1\n");
384 return;
385 }
386 clrbits32(bcsr_io,BCSR1_RS232EN_1);
387 iounmap(bcsr_io);
388
389 setbits32(&immap->im_cpm.cp_pbpar, iobits);
390 clrbits32(&immap->im_cpm.cp_pbdir, iobits);
391 clrbits16(&immap->im_cpm.cp_pbodr, iobits);
392}
393
394static void setup_smc2_ioports(void)
395{
396 immap_t *immap = (immap_t *) IMAP_ADDR;
397 unsigned *bcsr_io;
398 unsigned int iobits = 0x00000c00;
399
400 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
401
402 if (bcsr_io == NULL) {
403 printk(KERN_CRIT "Could not remap BCSR1\n");
404 return;
405 }
406 clrbits32(bcsr_io,BCSR1_RS232EN_2);
407 iounmap(bcsr_io);
408
409#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
410 setbits32(&immap->im_cpm.cp_pbpar, iobits);
411 clrbits32(&immap->im_cpm.cp_pbdir, iobits);
412 clrbits16(&immap->im_cpm.cp_pbodr, iobits);
413#else
414 setbits16(&immap->im_ioport.iop_papar, iobits);
415 clrbits16(&immap->im_ioport.iop_padir, iobits);
416 clrbits16(&immap->im_ioport.iop_paodr, iobits);
417#endif
418}
419
420static void __init mpc885ads_fixup_uart_pdata(struct platform_device *pdev,
421 int idx)
422{
423 bd_t *bd = (bd_t *) __res;
424 struct fs_uart_platform_info *pinfo;
425 int num = ARRAY_SIZE(mpc885_uart_pdata);
426
427 int id = fs_uart_id_smc2fsid(idx);
428
429 /* no need to alter anything if console */
430 if ((id <= num) && (!pdev->dev.platform_data)) {
431 pinfo = &mpc885_uart_pdata[id];
432 pinfo->uart_clk = bd->bi_intfreq;
433 pdev->dev.platform_data = pinfo;
434 }
435}
436
437
346static int mpc885ads_platform_notify(struct device *dev) 438static int mpc885ads_platform_notify(struct device *dev)
347{ 439{
348 440
@@ -356,12 +448,17 @@ static int mpc885ads_platform_notify(struct device *dev)
356 .rtn = mpc885ads_fixup_scc_enet_pdata, 448 .rtn = mpc885ads_fixup_scc_enet_pdata,
357 }, 449 },
358 { 450 {
451 .bus_id = "fsl-cpm-smc:uart",
452 .rtn = mpc885ads_fixup_uart_pdata
453 },
454 {
359 .bus_id = NULL 455 .bus_id = NULL
360 } 456 }
361 }; 457 };
362 458
363 platform_notify_map(dev_map,dev); 459 platform_notify_map(dev_map,dev);
364 460
461 return 0;
365} 462}
366 463
367int __init mpc885ads_init(void) 464int __init mpc885ads_init(void)
@@ -383,7 +480,41 @@ int __init mpc885ads_init(void)
383 ppc_sys_device_enable(MPC8xx_CPM_FEC2); 480 ppc_sys_device_enable(MPC8xx_CPM_FEC2);
384#endif 481#endif
385 482
483#ifdef CONFIG_SERIAL_CPM_SMC1
484 ppc_sys_device_enable(MPC8xx_CPM_SMC1);
485 ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
486#endif
487
488#ifdef CONFIG_SERIAL_CPM_SMC2
489 ppc_sys_device_enable(MPC8xx_CPM_SMC2);
490 ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
491#endif
386 return 0; 492 return 0;
387} 493}
388 494
389arch_initcall(mpc885ads_init); 495arch_initcall(mpc885ads_init);
496
497/*
498 To prevent confusion, console selection is gross:
499 by 0 assumed SMC1 and by 1 assumed SMC2
500 */
501struct platform_device* early_uart_get_pdev(int index)
502{
503 bd_t *bd = (bd_t *) __res;
504 struct fs_uart_platform_info *pinfo;
505
506 struct platform_device* pdev = NULL;
507 if(index) { /*assume SMC2 here*/
508 pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
509 pinfo = &mpc885_uart_pdata[1];
510 } else { /*over SMC1*/
511 pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
512 pinfo = &mpc885_uart_pdata[0];
513 }
514
515 pinfo->uart_clk = bd->bi_intfreq;
516 pdev->dev.platform_data = pinfo;
517 ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
518 return NULL;
519}
520
diff --git a/arch/ppc/platforms/pq2ads.c b/arch/ppc/platforms/pq2ads.c
index 3365fd788a7a..7fc2e02f5246 100644
--- a/arch/ppc/platforms/pq2ads.c
+++ b/arch/ppc/platforms/pq2ads.c
@@ -14,11 +14,40 @@
14 14
15#include <linux/init.h> 15#include <linux/init.h>
16 16
17#include <asm/io.h>
17#include <asm/mpc8260.h> 18#include <asm/mpc8260.h>
19#include <asm/cpm2.h>
20#include <asm/immap_cpm2.h>
18 21
19void __init 22void __init
20m82xx_board_setup(void) 23m82xx_board_setup(void)
21{ 24{
25 cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
26 u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
27
22 /* Enable the 2nd UART port */ 28 /* Enable the 2nd UART port */
23 *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_RS232_EN2; 29 clrbits32(bcsr, BCSR1_RS232_EN2);
30
31#ifdef CONFIG_SERIAL_CPM_SCC1
32 clrbits32((u32*)&immap->im_scc[0].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
33 clrbits32((u32*)&immap->im_scc[0].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
34#endif
35
36#ifdef CONFIG_SERIAL_CPM_SCC2
37 clrbits32((u32*)&immap->im_scc[1].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
38 clrbits32((u32*)&immap->im_scc[1].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
39#endif
40
41#ifdef CONFIG_SERIAL_CPM_SCC3
42 clrbits32((u32*)&immap->im_scc[2].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
43 clrbits32((u32*)&immap->im_scc[2].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
44#endif
45
46#ifdef CONFIG_SERIAL_CPM_SCC4
47 clrbits32((u32*)&immap->im_scc[3].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
48 clrbits32((u32*)&immap->im_scc[3].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
49#endif
50
51 iounmap(bcsr);
52 iounmap(immap);
24} 53}
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c
index a7dd55f1c63e..f6cc16888527 100644
--- a/arch/ppc/syslib/ibm440gx_common.c
+++ b/arch/ppc/syslib/ibm440gx_common.c
@@ -2,7 +2,7 @@
2 * PPC440GX system library 2 * PPC440GX system library
3 * 3 *
4 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 4 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
5 * Copyright (c) 2003, 2004 Zultys Technologies 5 * Copyright (c) 2003 - 2006 Zultys Technologies
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
@@ -282,3 +282,14 @@ int ibm440gx_show_cpuinfo(struct seq_file *m){
282 return 0; 282 return 0;
283} 283}
284 284
285void __init ibm440gx_platform_init(unsigned long r3, unsigned long r4,
286 unsigned long r5, unsigned long r6,
287 unsigned long r7)
288{
289 /* Erratum 440_43 workaround, disable L1 cache parity checking */
290 if (!strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") ||
291 !strcmp(cur_cpu_spec->cpu_name, "440GX Rev. F"))
292 mtspr(SPRN_CCR1, mfspr(SPRN_CCR1) | CCR1_DPC);
293
294 ibm44x_platform_init(r3, r4, r5, r6, r7);
295}
diff --git a/arch/ppc/syslib/ibm440gx_common.h b/arch/ppc/syslib/ibm440gx_common.h
index a2ab9fab8e34..a03ec6022e8f 100644
--- a/arch/ppc/syslib/ibm440gx_common.h
+++ b/arch/ppc/syslib/ibm440gx_common.h
@@ -29,6 +29,10 @@
29void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk, 29void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk,
30 unsigned int ser_clk) __init; 30 unsigned int ser_clk) __init;
31 31
32/* common 440GX platform init */
33void ibm440gx_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
34 unsigned long r6, unsigned long r7) __init;
35
32/* Enable L2 cache */ 36/* Enable L2 cache */
33void ibm440gx_l2c_enable(void) __init; 37void ibm440gx_l2c_enable(void) __init;
34 38
diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c
index bd41ed83beb3..6f536383866e 100644
--- a/arch/ppc/syslib/mpc8xx_devices.c
+++ b/arch/ppc/syslib/mpc8xx_devices.c
@@ -170,12 +170,18 @@ struct platform_device ppc_sys_platform_devices[] = {
170 [MPC8xx_CPM_SMC1] = { 170 [MPC8xx_CPM_SMC1] = {
171 .name = "fsl-cpm-smc", 171 .name = "fsl-cpm-smc",
172 .id = 1, 172 .id = 1,
173 .num_resources = 2, 173 .num_resources = 3,
174 .resource = (struct resource[]) { 174 .resource = (struct resource[]) {
175 { 175 {
176 .name = "regs", 176 .name = "regs",
177 .start = 0xa82, 177 .start = 0xa80,
178 .end = 0xa91, 178 .end = 0xa8f,
179 .flags = IORESOURCE_MEM,
180 },
181 {
182 .name = "pram",
183 .start = 0x3e80,
184 .end = 0x3ebf,
179 .flags = IORESOURCE_MEM, 185 .flags = IORESOURCE_MEM,
180 }, 186 },
181 { 187 {
@@ -189,15 +195,22 @@ struct platform_device ppc_sys_platform_devices[] = {
189 [MPC8xx_CPM_SMC2] = { 195 [MPC8xx_CPM_SMC2] = {
190 .name = "fsl-cpm-smc", 196 .name = "fsl-cpm-smc",
191 .id = 2, 197 .id = 2,
192 .num_resources = 2, 198 .num_resources = 3,
193 .resource = (struct resource[]) { 199 .resource = (struct resource[]) {
194 { 200 {
195 .name = "regs", 201 .name = "regs",
196 .start = 0xa92, 202 .start = 0xa90,
197 .end = 0xaa1, 203 .end = 0xa9f,
198 .flags = IORESOURCE_MEM, 204 .flags = IORESOURCE_MEM,
199 }, 205 },
200 { 206 {
207 .name = "pram",
208 .start = 0x3f80,
209 .end = 0x3fbf,
210 .flags = IORESOURCE_MEM,
211
212 },
213 {
201 .name = "interrupt", 214 .name = "interrupt",
202 .start = MPC8xx_INT_SMC2, 215 .start = MPC8xx_INT_SMC2,
203 .end = MPC8xx_INT_SMC2, 216 .end = MPC8xx_INT_SMC2,
diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
index 60c724e11584..2d48018b71d9 100644
--- a/arch/ppc/syslib/ppc_sys.c
+++ b/arch/ppc/syslib/ppc_sys.c
@@ -109,9 +109,11 @@ ppc_sys_fixup_mem_resource(struct platform_device *pdev, phys_addr_t paddr)
109 int i; 109 int i;
110 for (i = 0; i < pdev->num_resources; i++) { 110 for (i = 0; i < pdev->num_resources; i++) {
111 struct resource *r = &pdev->resource[i]; 111 struct resource *r = &pdev->resource[i];
112 if ((r->flags & IORESOURCE_MEM) == IORESOURCE_MEM) { 112 if (((r->flags & IORESOURCE_MEM) == IORESOURCE_MEM) &&
113 ((r->flags & PPC_SYS_IORESOURCE_FIXUPPED) != PPC_SYS_IORESOURCE_FIXUPPED)) {
113 r->start += paddr; 114 r->start += paddr;
114 r->end += paddr; 115 r->end += paddr;
116 r->flags |= PPC_SYS_IORESOURCE_FIXUPPED;
115 } 117 }
116 } 118 }
117} 119}
@@ -156,12 +158,13 @@ void platform_notify_map(const struct platform_notify_dev_map *map,
156 while (map->bus_id != NULL) { 158 while (map->bus_id != NULL) {
157 idx = -1; 159 idx = -1;
158 s = strrchr(dev->bus_id, '.'); 160 s = strrchr(dev->bus_id, '.');
159 if (s != NULL) 161 if (s != NULL) {
160 idx = (int)simple_strtol(s + 1, NULL, 10); 162 idx = (int)simple_strtol(s + 1, NULL, 10);
161 else 163 len = s - dev->bus_id;
164 } else {
162 s = dev->bus_id; 165 s = dev->bus_id;
163 166 len = strlen(dev->bus_id);
164 len = s - dev->bus_id; 167 }
165 168
166 if (!strncmp(dev->bus_id, map->bus_id, len)) { 169 if (!strncmp(dev->bus_id, map->bus_id, len)) {
167 pdev = container_of(dev, struct platform_device, dev); 170 pdev = container_of(dev, struct platform_device, dev);
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c
index 0636aed7b827..8692d00c08c4 100644
--- a/arch/ppc/syslib/pq2_devices.c
+++ b/arch/ppc/syslib/pq2_devices.c
@@ -121,13 +121,13 @@ struct platform_device ppc_sys_platform_devices[] = {
121 .num_resources = 3, 121 .num_resources = 3,
122 .resource = (struct resource[]) { 122 .resource = (struct resource[]) {
123 { 123 {
124 .name = "scc_mem", 124 .name = "regs",
125 .start = 0x11A00, 125 .start = 0x11A00,
126 .end = 0x11A1F, 126 .end = 0x11A1F,
127 .flags = IORESOURCE_MEM, 127 .flags = IORESOURCE_MEM,
128 }, 128 },
129 { 129 {
130 .name = "scc_pram", 130 .name = "pram",
131 .start = 0x8000, 131 .start = 0x8000,
132 .end = 0x80ff, 132 .end = 0x80ff,
133 .flags = IORESOURCE_MEM, 133 .flags = IORESOURCE_MEM,
@@ -145,13 +145,13 @@ struct platform_device ppc_sys_platform_devices[] = {
145 .num_resources = 3, 145 .num_resources = 3,
146 .resource = (struct resource[]) { 146 .resource = (struct resource[]) {
147 { 147 {
148 .name = "scc_mem", 148 .name = "regs",
149 .start = 0x11A20, 149 .start = 0x11A20,
150 .end = 0x11A3F, 150 .end = 0x11A3F,
151 .flags = IORESOURCE_MEM, 151 .flags = IORESOURCE_MEM,
152 }, 152 },
153 { 153 {
154 .name = "scc_pram", 154 .name = "pram",
155 .start = 0x8100, 155 .start = 0x8100,
156 .end = 0x81ff, 156 .end = 0x81ff,
157 .flags = IORESOURCE_MEM, 157 .flags = IORESOURCE_MEM,
@@ -169,13 +169,13 @@ struct platform_device ppc_sys_platform_devices[] = {
169 .num_resources = 3, 169 .num_resources = 3,
170 .resource = (struct resource[]) { 170 .resource = (struct resource[]) {
171 { 171 {
172 .name = "scc_mem", 172 .name = "regs",
173 .start = 0x11A40, 173 .start = 0x11A40,
174 .end = 0x11A5F, 174 .end = 0x11A5F,
175 .flags = IORESOURCE_MEM, 175 .flags = IORESOURCE_MEM,
176 }, 176 },
177 { 177 {
178 .name = "scc_pram", 178 .name = "pram",
179 .start = 0x8200, 179 .start = 0x8200,
180 .end = 0x82ff, 180 .end = 0x82ff,
181 .flags = IORESOURCE_MEM, 181 .flags = IORESOURCE_MEM,
@@ -193,13 +193,13 @@ struct platform_device ppc_sys_platform_devices[] = {
193 .num_resources = 3, 193 .num_resources = 3,
194 .resource = (struct resource[]) { 194 .resource = (struct resource[]) {
195 { 195 {
196 .name = "scc_mem", 196 .name = "regs",
197 .start = 0x11A60, 197 .start = 0x11A60,
198 .end = 0x11A7F, 198 .end = 0x11A7F,
199 .flags = IORESOURCE_MEM, 199 .flags = IORESOURCE_MEM,
200 }, 200 },
201 { 201 {
202 .name = "scc_pram", 202 .name = "pram",
203 .start = 0x8300, 203 .start = 0x8300,
204 .end = 0x83ff, 204 .end = 0x83ff,
205 .flags = IORESOURCE_MEM, 205 .flags = IORESOURCE_MEM,
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c
index 75e64f1c144d..fee8948162b9 100644
--- a/arch/ppc/syslib/pq2_sys.c
+++ b/arch/ppc/syslib/pq2_sys.c
@@ -113,13 +113,13 @@ struct ppc_sys_spec ppc_sys_specs[] = {
113 .ppc_sys_name = "8248", 113 .ppc_sys_name = "8248",
114 .mask = 0x0000ff00, 114 .mask = 0x0000ff00,
115 .value = 0x00000c00, 115 .value = 0x00000c00,
116 .num_devices = 11, 116 .num_devices = 12,
117 .device_list = (enum ppc_sys_devices[]) 117 .device_list = (enum ppc_sys_devices[])
118 { 118 {
119 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, 119 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
120 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1, 120 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
121 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, 121 MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
122 MPC82xx_CPM_USB, MPC82xx_SEC1, 122 MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1,
123 }, 123 },
124 }, 124 },
125 { 125 {
@@ -139,13 +139,13 @@ struct ppc_sys_spec ppc_sys_specs[] = {
139 .ppc_sys_name = "8272", 139 .ppc_sys_name = "8272",
140 .mask = 0x0000ff00, 140 .mask = 0x0000ff00,
141 .value = 0x00000c00, 141 .value = 0x00000c00,
142 .num_devices = 11, 142 .num_devices = 12,
143 .device_list = (enum ppc_sys_devices[]) 143 .device_list = (enum ppc_sys_devices[])
144 { 144 {
145 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, 145 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
146 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1, 146 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
147 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, 147 MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
148 MPC82xx_CPM_USB, MPC82xx_SEC1, 148 MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1,
149 }, 149 },
150 }, 150 },
151 /* below is a list of the 8280 family of processors */ 151 /* below is a list of the 8280 family of processors */