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authorEugene Surovegin <ebs@ebshome.net>2005-07-27 14:44:13 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-07-27 19:25:56 -0400
commit757569295d4204b4e00dd9294790e09ed5a2ffd2 (patch)
tree1f102baff1619a00d4731dfcac7d56523abe61cf /arch/ppc
parent9f6a3d083729c76ced92106c259f0e6536a2eaea (diff)
[PATCH] ppc32: fix 440SP MAL channels count
Fix the MAL channels count in PPC 440SP OCP definition. PPC 440SP has only 1 EMAC attached to MAL. Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc')
-rw-r--r--arch/ppc/platforms/4xx/ibm440sp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/ppc/platforms/4xx/ibm440sp.c b/arch/ppc/platforms/4xx/ibm440sp.c
index a203efb47aba..fa3e003a0db9 100644
--- a/arch/ppc/platforms/4xx/ibm440sp.c
+++ b/arch/ppc/platforms/4xx/ibm440sp.c
@@ -36,8 +36,8 @@ static struct ocp_func_emac_data ibm440sp_emac0_def = {
36OCP_SYSFS_EMAC_DATA() 36OCP_SYSFS_EMAC_DATA()
37 37
38static struct ocp_func_mal_data ibm440sp_mal0_def = { 38static struct ocp_func_mal_data ibm440sp_mal0_def = {
39 .num_tx_chans = 4, /* Number of TX channels */ 39 .num_tx_chans = 1, /* Number of TX channels */
40 .num_rx_chans = 4, /* Number of RX channels */ 40 .num_rx_chans = 1, /* Number of RX channels */
41 .txeob_irq = 38, /* TX End Of Buffer IRQ */ 41 .txeob_irq = 38, /* TX End Of Buffer IRQ */
42 .rxeob_irq = 39, /* RX End Of Buffer IRQ */ 42 .rxeob_irq = 39, /* RX End Of Buffer IRQ */
43 .txde_irq = 34, /* TX Descriptor Error IRQ */ 43 .txde_irq = 34, /* TX Descriptor Error IRQ */