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authorAnton Blanchard <anton@samba.org>2005-09-10 02:01:11 -0400
committerPaul Mackerras <paulus@samba.org>2005-09-12 03:19:12 -0400
commitfd9648dff6f9797ecc509bcd181706a274dc074d (patch)
tree845b99905dc4f54171d554c14e45b55f1cfe48e2 /arch/ppc64/xmon
parenta94d308513bdb2b926b45c11d7ce7fac6d6ca865 (diff)
[PATCH] ppc64: Add ptrace data breakpoint support
Add hardware data breakpoint support. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc64/xmon')
-rw-r--r--arch/ppc64/xmon/privinst.h1
-rw-r--r--arch/ppc64/xmon/xmon.c20
2 files changed, 4 insertions, 17 deletions
diff --git a/arch/ppc64/xmon/privinst.h b/arch/ppc64/xmon/privinst.h
index 183c3e400258..02eb40dac0b3 100644
--- a/arch/ppc64/xmon/privinst.h
+++ b/arch/ppc64/xmon/privinst.h
@@ -46,7 +46,6 @@ GSETSPR(287, pvr)
46GSETSPR(1008, hid0) 46GSETSPR(1008, hid0)
47GSETSPR(1009, hid1) 47GSETSPR(1009, hid1)
48GSETSPR(1010, iabr) 48GSETSPR(1010, iabr)
49GSETSPR(1013, dabr)
50GSETSPR(1023, pir) 49GSETSPR(1023, pir)
51 50
52static inline void store_inst(void *p) 51static inline void store_inst(void *p)
diff --git a/arch/ppc64/xmon/xmon.c b/arch/ppc64/xmon/xmon.c
index 45908b10acd3..74e63a886a69 100644
--- a/arch/ppc64/xmon/xmon.c
+++ b/arch/ppc64/xmon/xmon.c
@@ -586,6 +586,8 @@ int xmon_dabr_match(struct pt_regs *regs)
586{ 586{
587 if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF)) 587 if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF))
588 return 0; 588 return 0;
589 if (dabr.enabled == 0)
590 return 0;
589 xmon_core(regs, 0); 591 xmon_core(regs, 0);
590 return 1; 592 return 1;
591} 593}
@@ -628,20 +630,6 @@ int xmon_fault_handler(struct pt_regs *regs)
628 return 0; 630 return 0;
629} 631}
630 632
631/* On systems with a hypervisor, we can't set the DABR
632 (data address breakpoint register) directly. */
633static void set_controlled_dabr(unsigned long val)
634{
635#ifdef CONFIG_PPC_PSERIES
636 if (systemcfg->platform == PLATFORM_PSERIES_LPAR) {
637 int rc = plpar_hcall_norets(H_SET_DABR, val);
638 if (rc != H_Success)
639 xmon_printf("Warning: setting DABR failed (%d)\n", rc);
640 } else
641#endif
642 set_dabr(val);
643}
644
645static struct bpt *at_breakpoint(unsigned long pc) 633static struct bpt *at_breakpoint(unsigned long pc)
646{ 634{
647 int i; 635 int i;
@@ -728,7 +716,7 @@ static void insert_bpts(void)
728static void insert_cpu_bpts(void) 716static void insert_cpu_bpts(void)
729{ 717{
730 if (dabr.enabled) 718 if (dabr.enabled)
731 set_controlled_dabr(dabr.address | (dabr.enabled & 7)); 719 set_dabr(dabr.address | (dabr.enabled & 7));
732 if (iabr && cpu_has_feature(CPU_FTR_IABR)) 720 if (iabr && cpu_has_feature(CPU_FTR_IABR))
733 set_iabr(iabr->address 721 set_iabr(iabr->address
734 | (iabr->enabled & (BP_IABR|BP_IABR_TE))); 722 | (iabr->enabled & (BP_IABR|BP_IABR_TE)));
@@ -756,7 +744,7 @@ static void remove_bpts(void)
756 744
757static void remove_cpu_bpts(void) 745static void remove_cpu_bpts(void)
758{ 746{
759 set_controlled_dabr(0); 747 set_dabr(0);
760 if (cpu_has_feature(CPU_FTR_IABR)) 748 if (cpu_has_feature(CPU_FTR_IABR))
761 set_iabr(0); 749 set_iabr(0);
762} 750}