diff options
author | David Gibson <david@gibson.dropbear.id.au> | 2005-08-11 02:55:21 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2005-08-28 20:53:38 -0400 |
commit | c594adad5653491813959277fb87a2fef54c4e05 (patch) | |
tree | baefdce10a0b490017b0a5acbe9dbeb8cb14c003 /arch/ppc64/mm/slb_low.S | |
parent | 9a5573e378c5c8976c6000a7643b52e2a0481688 (diff) |
[PATCH] Dynamic hugepage addresses for ppc64
Paulus, I think this is now a reasonable candidate for the post-2.6.13
queue.
Relax address restrictions for hugepages on ppc64
Presently, 64-bit applications on ppc64 may only use hugepages in the
address region from 1-1.5T. Furthermore, if hugepages are enabled in
the kernel config, they may only use hugepages and never normal pages
in this area. This patch relaxes this restriction, allowing any
address to be used with hugepages, but with a 1TB granularity. That
is if you map a hugepage anywhere in the region 1TB-2TB, that entire
area will be reserved exclusively for hugepages for the remainder of
the process's lifetime. This works analagously to hugepages in 32-bit
applications, where hugepages can be mapped anywhere, but with 256MB
(mmu segment) granularity.
This patch applies on top of the four level pagetable patch
(http://patchwork.ozlabs.org/linuxppc64/patch?id=1936).
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc64/mm/slb_low.S')
-rw-r--r-- | arch/ppc64/mm/slb_low.S | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/arch/ppc64/mm/slb_low.S b/arch/ppc64/mm/slb_low.S index f20fc52483a7..bab255889c58 100644 --- a/arch/ppc64/mm/slb_low.S +++ b/arch/ppc64/mm/slb_low.S | |||
@@ -89,28 +89,29 @@ END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE) | |||
89 | b 9f | 89 | b 9f |
90 | 90 | ||
91 | 0: /* user address: proto-VSID = context<<15 | ESID */ | 91 | 0: /* user address: proto-VSID = context<<15 | ESID */ |
92 | li r11,SLB_VSID_USER | ||
93 | |||
94 | srdi. r9,r3,USER_ESID_BITS | 92 | srdi. r9,r3,USER_ESID_BITS |
95 | bne- 8f /* invalid ea bits set */ | 93 | bne- 8f /* invalid ea bits set */ |
96 | 94 | ||
97 | #ifdef CONFIG_HUGETLB_PAGE | 95 | #ifdef CONFIG_HUGETLB_PAGE |
98 | BEGIN_FTR_SECTION | 96 | BEGIN_FTR_SECTION |
99 | /* check against the hugepage ranges */ | 97 | lhz r9,PACAHIGHHTLBAREAS(r13) |
100 | cmpldi r3,(TASK_HPAGE_END>>SID_SHIFT) | 98 | srdi r11,r3,(HTLB_AREA_SHIFT-SID_SHIFT) |
101 | bge 6f /* >= TASK_HPAGE_END */ | 99 | srd r9,r9,r11 |
102 | cmpldi r3,(TASK_HPAGE_BASE>>SID_SHIFT) | 100 | andi. r9,r9,1 |
103 | bge 5f /* TASK_HPAGE_BASE..TASK_HPAGE_END */ | 101 | bne 5f |
102 | |||
103 | li r11,SLB_VSID_USER | ||
104 | |||
104 | cmpldi r3,16 | 105 | cmpldi r3,16 |
105 | bge 6f /* 4GB..TASK_HPAGE_BASE */ | 106 | bge 6f |
106 | 107 | ||
107 | lhz r9,PACAHTLBSEGS(r13) | 108 | lhz r9,PACALOWHTLBAREAS(r13) |
108 | srd r9,r9,r3 | 109 | srd r9,r9,r3 |
109 | andi. r9,r9,1 | 110 | andi. r9,r9,1 |
111 | |||
110 | beq 6f | 112 | beq 6f |
111 | 113 | ||
112 | 5: /* this is a hugepage user address */ | 114 | 5: li r11,SLB_VSID_USER|SLB_VSID_L |
113 | li r11,(SLB_VSID_USER|SLB_VSID_L) | ||
114 | END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE) | 115 | END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE) |
115 | #endif /* CONFIG_HUGETLB_PAGE */ | 116 | #endif /* CONFIG_HUGETLB_PAGE */ |
116 | 117 | ||