diff options
| author | Anton Blanchard <anton@samba.org> | 2005-07-07 20:56:11 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-07-07 21:23:37 -0400 |
| commit | a2f7a9ce2a5c3d21cc0eb37a03da603b44ba4b09 (patch) | |
| tree | 20d782192f849d9f8f1eabd465246e8fd292324a /arch/ppc64/kernel | |
| parent | 315a699851722a6bc31e35f91562f31f55d4c4a2 (diff) | |
[PATCH] ppc64: Fix runlatch code to work on pseries machines
Not all ppc64 CPUs have the CTRL SPR, so we need a cputable feature for it.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc64/kernel')
| -rw-r--r-- | arch/ppc64/kernel/cputable.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/ppc64/kernel/cputable.c b/arch/ppc64/kernel/cputable.c index c301366176ef..8d4c46f6f0b6 100644 --- a/arch/ppc64/kernel/cputable.c +++ b/arch/ppc64/kernel/cputable.c | |||
| @@ -81,7 +81,7 @@ struct cpu_spec cpu_specs[] = { | |||
| 81 | .cpu_name = "RS64-II (northstar)", | 81 | .cpu_name = "RS64-II (northstar)", |
| 82 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 82 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | |
| 83 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | | 83 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | |
| 84 | CPU_FTR_PMC8 | CPU_FTR_MMCRA, | 84 | CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL, |
| 85 | .cpu_user_features = COMMON_USER_PPC64, | 85 | .cpu_user_features = COMMON_USER_PPC64, |
| 86 | .icache_bsize = 128, | 86 | .icache_bsize = 128, |
| 87 | .dcache_bsize = 128, | 87 | .dcache_bsize = 128, |
| @@ -94,7 +94,7 @@ struct cpu_spec cpu_specs[] = { | |||
| 94 | .cpu_name = "RS64-III (pulsar)", | 94 | .cpu_name = "RS64-III (pulsar)", |
| 95 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 95 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | |
| 96 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | | 96 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | |
| 97 | CPU_FTR_PMC8 | CPU_FTR_MMCRA, | 97 | CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL, |
| 98 | .cpu_user_features = COMMON_USER_PPC64, | 98 | .cpu_user_features = COMMON_USER_PPC64, |
| 99 | .icache_bsize = 128, | 99 | .icache_bsize = 128, |
| 100 | .dcache_bsize = 128, | 100 | .dcache_bsize = 128, |
| @@ -107,7 +107,7 @@ struct cpu_spec cpu_specs[] = { | |||
| 107 | .cpu_name = "RS64-III (icestar)", | 107 | .cpu_name = "RS64-III (icestar)", |
| 108 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 108 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | |
| 109 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | | 109 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | |
| 110 | CPU_FTR_PMC8 | CPU_FTR_MMCRA, | 110 | CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL, |
| 111 | .cpu_user_features = COMMON_USER_PPC64, | 111 | .cpu_user_features = COMMON_USER_PPC64, |
| 112 | .icache_bsize = 128, | 112 | .icache_bsize = 128, |
| 113 | .dcache_bsize = 128, | 113 | .dcache_bsize = 128, |
| @@ -120,7 +120,7 @@ struct cpu_spec cpu_specs[] = { | |||
| 120 | .cpu_name = "RS64-IV (sstar)", | 120 | .cpu_name = "RS64-IV (sstar)", |
| 121 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | | 121 | .cpu_features = CPU_FTR_SPLIT_ID_CACHE | |
| 122 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | | 122 | CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | |
| 123 | CPU_FTR_PMC8 | CPU_FTR_MMCRA, | 123 | CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL, |
| 124 | .cpu_user_features = COMMON_USER_PPC64, | 124 | .cpu_user_features = COMMON_USER_PPC64, |
| 125 | .icache_bsize = 128, | 125 | .icache_bsize = 128, |
| 126 | .dcache_bsize = 128, | 126 | .dcache_bsize = 128, |