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authorStephen Rothwell <sfr@canb.auug.org.au>2005-09-27 04:44:42 -0400
committerStephen Rothwell <sfr@canb.auug.org.au>2005-09-27 04:44:42 -0400
commitc8b84976f86adcd10c221d398e1d0be2b778f3c8 (patch)
tree54924b199234c014ad6d70269e24c59041a69432 /arch/ppc64/kernel/iSeries_setup.c
parent2960eb661a82131b9492cdd1b6500a5f74ccc394 (diff)
powerpc: move iSeries_setup.[ch] and mf.c into platforms/iseries
iSeries_setup.c becomes setup.c iSeries_setup.h becomes setup.h mf.c retains its name Also moved iSeries_[gs]et_rtc_time and iSeries_get_boot_time into mf.c since they are just small wrappers around mf_ functions. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'arch/ppc64/kernel/iSeries_setup.c')
-rw-r--r--arch/ppc64/kernel/iSeries_setup.c1007
1 files changed, 0 insertions, 1007 deletions
diff --git a/arch/ppc64/kernel/iSeries_setup.c b/arch/ppc64/kernel/iSeries_setup.c
deleted file mode 100644
index 9daf734adbd5..000000000000
--- a/arch/ppc64/kernel/iSeries_setup.c
+++ /dev/null
@@ -1,1007 +0,0 @@
1/*
2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4 *
5 * Module name: iSeries_setup.c
6 *
7 * Description:
8 * Architecture- / platform-specific boot-time initialization code for
9 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
10 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
11 * <dan@net4x.com>.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
17 */
18
19#undef DEBUG
20
21#include <linux/config.h>
22#include <linux/init.h>
23#include <linux/threads.h>
24#include <linux/smp.h>
25#include <linux/param.h>
26#include <linux/string.h>
27#include <linux/initrd.h>
28#include <linux/seq_file.h>
29#include <linux/kdev_t.h>
30#include <linux/major.h>
31#include <linux/root_dev.h>
32
33#include <asm/processor.h>
34#include <asm/machdep.h>
35#include <asm/page.h>
36#include <asm/mmu.h>
37#include <asm/pgtable.h>
38#include <asm/mmu_context.h>
39#include <asm/cputable.h>
40#include <asm/sections.h>
41#include <asm/iommu.h>
42#include <asm/firmware.h>
43
44#include <asm/time.h>
45#include "iSeries_setup.h"
46#include <asm/naca.h>
47#include <asm/paca.h>
48#include <asm/cache.h>
49#include <asm/sections.h>
50#include <asm/abs_addr.h>
51#include <asm/iSeries/HvCallHpt.h>
52#include <asm/iSeries/HvLpConfig.h>
53#include <asm/iSeries/HvCallEvent.h>
54#include <asm/iSeries/HvCallSm.h>
55#include <asm/iSeries/HvCallXm.h>
56#include <asm/iSeries/ItLpQueue.h>
57#include <asm/iSeries/IoHriMainStore.h>
58#include <asm/iSeries/mf.h>
59#include <asm/iSeries/HvLpEvent.h>
60#include <asm/iSeries/iSeries_irq.h>
61#include <asm/iSeries/IoHriProcessorVpd.h>
62#include <asm/iSeries/ItVpdAreas.h>
63#include <asm/iSeries/LparMap.h>
64
65extern void hvlog(char *fmt, ...);
66
67#ifdef DEBUG
68#define DBG(fmt...) hvlog(fmt)
69#else
70#define DBG(fmt...)
71#endif
72
73/* Function Prototypes */
74extern void ppcdbg_initialize(void);
75
76static void build_iSeries_Memory_Map(void);
77static int iseries_shared_idle(void);
78static int iseries_dedicated_idle(void);
79#ifdef CONFIG_PCI
80extern void iSeries_pci_final_fixup(void);
81#else
82static void iSeries_pci_final_fixup(void) { }
83#endif
84
85/* Global Variables */
86int piranha_simulator;
87
88extern int rd_size; /* Defined in drivers/block/rd.c */
89extern unsigned long klimit;
90extern unsigned long embedded_sysmap_start;
91extern unsigned long embedded_sysmap_end;
92
93extern unsigned long iSeries_recal_tb;
94extern unsigned long iSeries_recal_titan;
95
96static int mf_initialized;
97
98struct MemoryBlock {
99 unsigned long absStart;
100 unsigned long absEnd;
101 unsigned long logicalStart;
102 unsigned long logicalEnd;
103};
104
105/*
106 * Process the main store vpd to determine where the holes in memory are
107 * and return the number of physical blocks and fill in the array of
108 * block data.
109 */
110static unsigned long iSeries_process_Condor_mainstore_vpd(
111 struct MemoryBlock *mb_array, unsigned long max_entries)
112{
113 unsigned long holeFirstChunk, holeSizeChunks;
114 unsigned long numMemoryBlocks = 1;
115 struct IoHriMainStoreSegment4 *msVpd =
116 (struct IoHriMainStoreSegment4 *)xMsVpd;
117 unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
118 unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
119 unsigned long holeSize = holeEnd - holeStart;
120
121 printk("Mainstore_VPD: Condor\n");
122 /*
123 * Determine if absolute memory has any
124 * holes so that we can interpret the
125 * access map we get back from the hypervisor
126 * correctly.
127 */
128 mb_array[0].logicalStart = 0;
129 mb_array[0].logicalEnd = 0x100000000;
130 mb_array[0].absStart = 0;
131 mb_array[0].absEnd = 0x100000000;
132
133 if (holeSize) {
134 numMemoryBlocks = 2;
135 holeStart = holeStart & 0x000fffffffffffff;
136 holeStart = addr_to_chunk(holeStart);
137 holeFirstChunk = holeStart;
138 holeSize = addr_to_chunk(holeSize);
139 holeSizeChunks = holeSize;
140 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
141 holeFirstChunk, holeSizeChunks );
142 mb_array[0].logicalEnd = holeFirstChunk;
143 mb_array[0].absEnd = holeFirstChunk;
144 mb_array[1].logicalStart = holeFirstChunk;
145 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
146 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
147 mb_array[1].absEnd = 0x100000000;
148 }
149 return numMemoryBlocks;
150}
151
152#define MaxSegmentAreas 32
153#define MaxSegmentAdrRangeBlocks 128
154#define MaxAreaRangeBlocks 4
155
156static unsigned long iSeries_process_Regatta_mainstore_vpd(
157 struct MemoryBlock *mb_array, unsigned long max_entries)
158{
159 struct IoHriMainStoreSegment5 *msVpdP =
160 (struct IoHriMainStoreSegment5 *)xMsVpd;
161 unsigned long numSegmentBlocks = 0;
162 u32 existsBits = msVpdP->msAreaExists;
163 unsigned long area_num;
164
165 printk("Mainstore_VPD: Regatta\n");
166
167 for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
168 unsigned long numAreaBlocks;
169 struct IoHriMainStoreArea4 *currentArea;
170
171 if (existsBits & 0x80000000) {
172 unsigned long block_num;
173
174 currentArea = &msVpdP->msAreaArray[area_num];
175 numAreaBlocks = currentArea->numAdrRangeBlocks;
176 printk("ms_vpd: processing area %2ld blocks=%ld",
177 area_num, numAreaBlocks);
178 for (block_num = 0; block_num < numAreaBlocks;
179 ++block_num ) {
180 /* Process an address range block */
181 struct MemoryBlock tempBlock;
182 unsigned long i;
183
184 tempBlock.absStart =
185 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
186 tempBlock.absEnd =
187 (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
188 tempBlock.logicalStart = 0;
189 tempBlock.logicalEnd = 0;
190 printk("\n block %ld absStart=%016lx absEnd=%016lx",
191 block_num, tempBlock.absStart,
192 tempBlock.absEnd);
193
194 for (i = 0; i < numSegmentBlocks; ++i) {
195 if (mb_array[i].absStart ==
196 tempBlock.absStart)
197 break;
198 }
199 if (i == numSegmentBlocks) {
200 if (numSegmentBlocks == max_entries)
201 panic("iSeries_process_mainstore_vpd: too many memory blocks");
202 mb_array[numSegmentBlocks] = tempBlock;
203 ++numSegmentBlocks;
204 } else
205 printk(" (duplicate)");
206 }
207 printk("\n");
208 }
209 existsBits <<= 1;
210 }
211 /* Now sort the blocks found into ascending sequence */
212 if (numSegmentBlocks > 1) {
213 unsigned long m, n;
214
215 for (m = 0; m < numSegmentBlocks - 1; ++m) {
216 for (n = numSegmentBlocks - 1; m < n; --n) {
217 if (mb_array[n].absStart <
218 mb_array[n-1].absStart) {
219 struct MemoryBlock tempBlock;
220
221 tempBlock = mb_array[n];
222 mb_array[n] = mb_array[n-1];
223 mb_array[n-1] = tempBlock;
224 }
225 }
226 }
227 }
228 /*
229 * Assign "logical" addresses to each block. These
230 * addresses correspond to the hypervisor "bitmap" space.
231 * Convert all addresses into units of 256K chunks.
232 */
233 {
234 unsigned long i, nextBitmapAddress;
235
236 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
237 nextBitmapAddress = 0;
238 for (i = 0; i < numSegmentBlocks; ++i) {
239 unsigned long length = mb_array[i].absEnd -
240 mb_array[i].absStart;
241
242 mb_array[i].logicalStart = nextBitmapAddress;
243 mb_array[i].logicalEnd = nextBitmapAddress + length;
244 nextBitmapAddress += length;
245 printk(" Bitmap range: %016lx - %016lx\n"
246 " Absolute range: %016lx - %016lx\n",
247 mb_array[i].logicalStart,
248 mb_array[i].logicalEnd,
249 mb_array[i].absStart, mb_array[i].absEnd);
250 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
251 0x000fffffffffffff);
252 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
253 0x000fffffffffffff);
254 mb_array[i].logicalStart =
255 addr_to_chunk(mb_array[i].logicalStart);
256 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
257 }
258 }
259
260 return numSegmentBlocks;
261}
262
263static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
264 unsigned long max_entries)
265{
266 unsigned long i;
267 unsigned long mem_blocks = 0;
268
269 if (cpu_has_feature(CPU_FTR_SLB))
270 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
271 max_entries);
272 else
273 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
274 max_entries);
275
276 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
277 for (i = 0; i < mem_blocks; ++i) {
278 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
279 " abs chunks %016lx - %016lx\n",
280 i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
281 mb_array[i].absStart, mb_array[i].absEnd);
282 }
283 return mem_blocks;
284}
285
286static void __init iSeries_get_cmdline(void)
287{
288 char *p, *q;
289
290 /* copy the command line parameter from the primary VSP */
291 HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
292 HvLpDma_Direction_RemoteToLocal);
293
294 p = cmd_line;
295 q = cmd_line + 255;
296 while(p < q) {
297 if (!*p || *p == '\n')
298 break;
299 ++p;
300 }
301 *p = 0;
302}
303
304static void __init iSeries_init_early(void)
305{
306 extern unsigned long memory_limit;
307
308 DBG(" -> iSeries_init_early()\n");
309
310 ppc64_firmware_features = FW_FEATURE_ISERIES;
311
312 ppcdbg_initialize();
313
314 ppc64_interrupt_controller = IC_ISERIES;
315
316#if defined(CONFIG_BLK_DEV_INITRD)
317 /*
318 * If the init RAM disk has been configured and there is
319 * a non-zero starting address for it, set it up
320 */
321 if (naca.xRamDisk) {
322 initrd_start = (unsigned long)__va(naca.xRamDisk);
323 initrd_end = initrd_start + naca.xRamDiskSize * PAGE_SIZE;
324 initrd_below_start_ok = 1; // ramdisk in kernel space
325 ROOT_DEV = Root_RAM0;
326 if (((rd_size * 1024) / PAGE_SIZE) < naca.xRamDiskSize)
327 rd_size = (naca.xRamDiskSize * PAGE_SIZE) / 1024;
328 } else
329#endif /* CONFIG_BLK_DEV_INITRD */
330 {
331 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
332 }
333
334 iSeries_recal_tb = get_tb();
335 iSeries_recal_titan = HvCallXm_loadTod();
336
337 /*
338 * Initialize the hash table management pointers
339 */
340 hpte_init_iSeries();
341
342 /*
343 * Initialize the DMA/TCE management
344 */
345 iommu_init_early_iSeries();
346
347 iSeries_get_cmdline();
348
349 /* Save unparsed command line copy for /proc/cmdline */
350 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
351
352 /* Parse early parameters, in particular mem=x */
353 parse_early_param();
354
355 if (memory_limit) {
356 if (memory_limit < systemcfg->physicalMemorySize)
357 systemcfg->physicalMemorySize = memory_limit;
358 else {
359 printk("Ignoring mem=%lu >= ram_top.\n", memory_limit);
360 memory_limit = 0;
361 }
362 }
363
364 /* Initialize machine-dependency vectors */
365#ifdef CONFIG_SMP
366 smp_init_iSeries();
367#endif
368 if (itLpNaca.xPirEnvironMode == 0)
369 piranha_simulator = 1;
370
371 /* Associate Lp Event Queue 0 with processor 0 */
372 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
373
374 mf_init();
375 mf_initialized = 1;
376 mb();
377
378 /* If we were passed an initrd, set the ROOT_DEV properly if the values
379 * look sensible. If not, clear initrd reference.
380 */
381#ifdef CONFIG_BLK_DEV_INITRD
382 if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
383 initrd_end > initrd_start)
384 ROOT_DEV = Root_RAM0;
385 else
386 initrd_start = initrd_end = 0;
387#endif /* CONFIG_BLK_DEV_INITRD */
388
389 DBG(" <- iSeries_init_early()\n");
390}
391
392struct mschunks_map mschunks_map = {
393 /* XXX We don't use these, but Piranha might need them. */
394 .chunk_size = MSCHUNKS_CHUNK_SIZE,
395 .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
396 .chunk_mask = MSCHUNKS_OFFSET_MASK,
397};
398EXPORT_SYMBOL(mschunks_map);
399
400void mschunks_alloc(unsigned long num_chunks)
401{
402 klimit = _ALIGN(klimit, sizeof(u32));
403 mschunks_map.mapping = (u32 *)klimit;
404 klimit += num_chunks * sizeof(u32);
405 mschunks_map.num_chunks = num_chunks;
406}
407
408/*
409 * The iSeries may have very large memories ( > 128 GB ) and a partition
410 * may get memory in "chunks" that may be anywhere in the 2**52 real
411 * address space. The chunks are 256K in size. To map this to the
412 * memory model Linux expects, the AS/400 specific code builds a
413 * translation table to translate what Linux thinks are "physical"
414 * addresses to the actual real addresses. This allows us to make
415 * it appear to Linux that we have contiguous memory starting at
416 * physical address zero while in fact this could be far from the truth.
417 * To avoid confusion, I'll let the words physical and/or real address
418 * apply to the Linux addresses while I'll use "absolute address" to
419 * refer to the actual hardware real address.
420 *
421 * build_iSeries_Memory_Map gets information from the Hypervisor and
422 * looks at the Main Store VPD to determine the absolute addresses
423 * of the memory that has been assigned to our partition and builds
424 * a table used to translate Linux's physical addresses to these
425 * absolute addresses. Absolute addresses are needed when
426 * communicating with the hypervisor (e.g. to build HPT entries)
427 */
428
429static void __init build_iSeries_Memory_Map(void)
430{
431 u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
432 u32 nextPhysChunk;
433 u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
434 u32 num_ptegs;
435 u32 totalChunks,moreChunks;
436 u32 currChunk, thisChunk, absChunk;
437 u32 currDword;
438 u32 chunkBit;
439 u64 map;
440 struct MemoryBlock mb[32];
441 unsigned long numMemoryBlocks, curBlock;
442
443 /* Chunk size on iSeries is 256K bytes */
444 totalChunks = (u32)HvLpConfig_getMsChunks();
445 mschunks_alloc(totalChunks);
446
447 /*
448 * Get absolute address of our load area
449 * and map it to physical address 0
450 * This guarantees that the loadarea ends up at physical 0
451 * otherwise, it might not be returned by PLIC as the first
452 * chunks
453 */
454
455 loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
456 loadAreaSize = itLpNaca.xLoadAreaChunks;
457
458 /*
459 * Only add the pages already mapped here.
460 * Otherwise we might add the hpt pages
461 * The rest of the pages of the load area
462 * aren't in the HPT yet and can still
463 * be assigned an arbitrary physical address
464 */
465 if ((loadAreaSize * 64) > HvPagesToMap)
466 loadAreaSize = HvPagesToMap / 64;
467
468 loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
469
470 /*
471 * TODO Do we need to do something if the HPT is in the 64MB load area?
472 * This would be required if the itLpNaca.xLoadAreaChunks includes
473 * the HPT size
474 */
475
476 printk("Mapping load area - physical addr = 0000000000000000\n"
477 " absolute addr = %016lx\n",
478 chunk_to_addr(loadAreaFirstChunk));
479 printk("Load area size %dK\n", loadAreaSize * 256);
480
481 for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
482 mschunks_map.mapping[nextPhysChunk] =
483 loadAreaFirstChunk + nextPhysChunk;
484
485 /*
486 * Get absolute address of our HPT and remember it so
487 * we won't map it to any physical address
488 */
489 hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
490 hptSizePages = (u32)HvCallHpt_getHptPages();
491 hptSizeChunks = hptSizePages >> (MSCHUNKS_CHUNK_SHIFT - PAGE_SHIFT);
492 hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
493
494 printk("HPT absolute addr = %016lx, size = %dK\n",
495 chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
496
497 /* Fill in the hashed page table hash mask */
498 num_ptegs = hptSizePages *
499 (PAGE_SIZE / (sizeof(hpte_t) * HPTES_PER_GROUP));
500 htab_hash_mask = num_ptegs - 1;
501
502 /*
503 * The actual hashed page table is in the hypervisor,
504 * we have no direct access
505 */
506 htab_address = NULL;
507
508 /*
509 * Determine if absolute memory has any
510 * holes so that we can interpret the
511 * access map we get back from the hypervisor
512 * correctly.
513 */
514 numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
515
516 /*
517 * Process the main store access map from the hypervisor
518 * to build up our physical -> absolute translation table
519 */
520 curBlock = 0;
521 currChunk = 0;
522 currDword = 0;
523 moreChunks = totalChunks;
524
525 while (moreChunks) {
526 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
527 currDword);
528 thisChunk = currChunk;
529 while (map) {
530 chunkBit = map >> 63;
531 map <<= 1;
532 if (chunkBit) {
533 --moreChunks;
534 while (thisChunk >= mb[curBlock].logicalEnd) {
535 ++curBlock;
536 if (curBlock >= numMemoryBlocks)
537 panic("out of memory blocks");
538 }
539 if (thisChunk < mb[curBlock].logicalStart)
540 panic("memory block error");
541
542 absChunk = mb[curBlock].absStart +
543 (thisChunk - mb[curBlock].logicalStart);
544 if (((absChunk < hptFirstChunk) ||
545 (absChunk > hptLastChunk)) &&
546 ((absChunk < loadAreaFirstChunk) ||
547 (absChunk > loadAreaLastChunk))) {
548 mschunks_map.mapping[nextPhysChunk] =
549 absChunk;
550 ++nextPhysChunk;
551 }
552 }
553 ++thisChunk;
554 }
555 ++currDword;
556 currChunk += 64;
557 }
558
559 /*
560 * main store size (in chunks) is
561 * totalChunks - hptSizeChunks
562 * which should be equal to
563 * nextPhysChunk
564 */
565 systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
566}
567
568/*
569 * Document me.
570 */
571static void __init iSeries_setup_arch(void)
572{
573 unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
574
575 if (get_paca()->lppaca.shared_proc) {
576 ppc_md.idle_loop = iseries_shared_idle;
577 printk(KERN_INFO "Using shared processor idle loop\n");
578 } else {
579 ppc_md.idle_loop = iseries_dedicated_idle;
580 printk(KERN_INFO "Using dedicated idle loop\n");
581 }
582
583 /* Setup the Lp Event Queue */
584 setup_hvlpevent_queue();
585
586 printk("Max logical processors = %d\n",
587 itVpdAreas.xSlicMaxLogicalProcs);
588 printk("Max physical processors = %d\n",
589 itVpdAreas.xSlicMaxPhysicalProcs);
590
591 systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
592 printk("Processor version = %x\n", systemcfg->processor);
593}
594
595static void iSeries_get_cpuinfo(struct seq_file *m)
596{
597 seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
598}
599
600/*
601 * Document me.
602 * and Implement me.
603 */
604static int iSeries_get_irq(struct pt_regs *regs)
605{
606 /* -2 means ignore this interrupt */
607 return -2;
608}
609
610/*
611 * Document me.
612 */
613static void iSeries_restart(char *cmd)
614{
615 mf_reboot();
616}
617
618/*
619 * Document me.
620 */
621static void iSeries_power_off(void)
622{
623 mf_power_off();
624}
625
626/*
627 * Document me.
628 */
629static void iSeries_halt(void)
630{
631 mf_power_off();
632}
633
634static void __init iSeries_progress(char * st, unsigned short code)
635{
636 printk("Progress: [%04x] - %s\n", (unsigned)code, st);
637 if (!piranha_simulator && mf_initialized) {
638 if (code != 0xffff)
639 mf_display_progress(code);
640 else
641 mf_clear_src();
642 }
643}
644
645static void __init iSeries_fixup_klimit(void)
646{
647 /*
648 * Change klimit to take into account any ram disk
649 * that may be included
650 */
651 if (naca.xRamDisk)
652 klimit = KERNELBASE + (u64)naca.xRamDisk +
653 (naca.xRamDiskSize * PAGE_SIZE);
654 else {
655 /*
656 * No ram disk was included - check and see if there
657 * was an embedded system map. Change klimit to take
658 * into account any embedded system map
659 */
660 if (embedded_sysmap_end)
661 klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
662 0xfffffffffffff000);
663 }
664}
665
666static int __init iSeries_src_init(void)
667{
668 /* clear the progress line */
669 ppc_md.progress(" ", 0xffff);
670 return 0;
671}
672
673late_initcall(iSeries_src_init);
674
675static inline void process_iSeries_events(void)
676{
677 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
678}
679
680static void yield_shared_processor(void)
681{
682 unsigned long tb;
683
684 HvCall_setEnabledInterrupts(HvCall_MaskIPI |
685 HvCall_MaskLpEvent |
686 HvCall_MaskLpProd |
687 HvCall_MaskTimeout);
688
689 tb = get_tb();
690 /* Compute future tb value when yield should expire */
691 HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
692
693 /*
694 * The decrementer stops during the yield. Force a fake decrementer
695 * here and let the timer_interrupt code sort out the actual time.
696 */
697 get_paca()->lppaca.int_dword.fields.decr_int = 1;
698 process_iSeries_events();
699}
700
701static int iseries_shared_idle(void)
702{
703 while (1) {
704 while (!need_resched() && !hvlpevent_is_pending()) {
705 local_irq_disable();
706 ppc64_runlatch_off();
707
708 /* Recheck with irqs off */
709 if (!need_resched() && !hvlpevent_is_pending())
710 yield_shared_processor();
711
712 HMT_medium();
713 local_irq_enable();
714 }
715
716 ppc64_runlatch_on();
717
718 if (hvlpevent_is_pending())
719 process_iSeries_events();
720
721 schedule();
722 }
723
724 return 0;
725}
726
727static int iseries_dedicated_idle(void)
728{
729 long oldval;
730
731 while (1) {
732 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
733
734 if (!oldval) {
735 set_thread_flag(TIF_POLLING_NRFLAG);
736
737 while (!need_resched()) {
738 ppc64_runlatch_off();
739 HMT_low();
740
741 if (hvlpevent_is_pending()) {
742 HMT_medium();
743 ppc64_runlatch_on();
744 process_iSeries_events();
745 }
746 }
747
748 HMT_medium();
749 clear_thread_flag(TIF_POLLING_NRFLAG);
750 } else {
751 set_need_resched();
752 }
753
754 ppc64_runlatch_on();
755 schedule();
756 }
757
758 return 0;
759}
760
761#ifndef CONFIG_PCI
762void __init iSeries_init_IRQ(void) { }
763#endif
764
765static int __init iseries_probe(int platform)
766{
767 return PLATFORM_ISERIES_LPAR == platform;
768}
769
770struct machdep_calls __initdata iseries_md = {
771 .setup_arch = iSeries_setup_arch,
772 .get_cpuinfo = iSeries_get_cpuinfo,
773 .init_IRQ = iSeries_init_IRQ,
774 .get_irq = iSeries_get_irq,
775 .init_early = iSeries_init_early,
776 .pcibios_fixup = iSeries_pci_final_fixup,
777 .restart = iSeries_restart,
778 .power_off = iSeries_power_off,
779 .halt = iSeries_halt,
780 .get_boot_time = iSeries_get_boot_time,
781 .set_rtc_time = iSeries_set_rtc_time,
782 .get_rtc_time = iSeries_get_rtc_time,
783 .calibrate_decr = generic_calibrate_decr,
784 .progress = iSeries_progress,
785 .probe = iseries_probe,
786 /* XXX Implement enable_pmcs for iSeries */
787};
788
789struct blob {
790 unsigned char data[PAGE_SIZE];
791 unsigned long next;
792};
793
794struct iseries_flat_dt {
795 struct boot_param_header header;
796 u64 reserve_map[2];
797 struct blob dt;
798 struct blob strings;
799};
800
801struct iseries_flat_dt iseries_dt;
802
803void dt_init(struct iseries_flat_dt *dt)
804{
805 dt->header.off_mem_rsvmap =
806 offsetof(struct iseries_flat_dt, reserve_map);
807 dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
808 dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
809 dt->header.totalsize = sizeof(struct iseries_flat_dt);
810 dt->header.dt_strings_size = sizeof(struct blob);
811
812 /* There is no notion of hardware cpu id on iSeries */
813 dt->header.boot_cpuid_phys = smp_processor_id();
814
815 dt->dt.next = (unsigned long)&dt->dt.data;
816 dt->strings.next = (unsigned long)&dt->strings.data;
817
818 dt->header.magic = OF_DT_HEADER;
819 dt->header.version = 0x10;
820 dt->header.last_comp_version = 0x10;
821
822 dt->reserve_map[0] = 0;
823 dt->reserve_map[1] = 0;
824}
825
826void dt_check_blob(struct blob *b)
827{
828 if (b->next >= (unsigned long)&b->next) {
829 DBG("Ran out of space in flat device tree blob!\n");
830 BUG();
831 }
832}
833
834void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
835{
836 *((u32*)dt->dt.next) = value;
837 dt->dt.next += sizeof(u32);
838
839 dt_check_blob(&dt->dt);
840}
841
842void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
843{
844 *((u64*)dt->dt.next) = value;
845 dt->dt.next += sizeof(u64);
846
847 dt_check_blob(&dt->dt);
848}
849
850unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
851{
852 unsigned long start = blob->next - (unsigned long)blob->data;
853
854 memcpy((char *)blob->next, data, len);
855 blob->next = _ALIGN(blob->next + len, 4);
856
857 dt_check_blob(blob);
858
859 return start;
860}
861
862void dt_start_node(struct iseries_flat_dt *dt, char *name)
863{
864 dt_push_u32(dt, OF_DT_BEGIN_NODE);
865 dt_push_bytes(&dt->dt, name, strlen(name) + 1);
866}
867
868#define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
869
870void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
871{
872 unsigned long offset;
873
874 dt_push_u32(dt, OF_DT_PROP);
875
876 /* Length of the data */
877 dt_push_u32(dt, len);
878
879 /* Put the property name in the string blob. */
880 offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
881
882 /* The offset of the properties name in the string blob. */
883 dt_push_u32(dt, (u32)offset);
884
885 /* The actual data. */
886 dt_push_bytes(&dt->dt, data, len);
887}
888
889void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
890{
891 dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
892}
893
894void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
895{
896 dt_prop(dt, name, (char *)&data, sizeof(u32));
897}
898
899void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
900{
901 dt_prop(dt, name, (char *)&data, sizeof(u64));
902}
903
904void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
905{
906 dt_prop(dt, name, (char *)data, sizeof(u64) * n);
907}
908
909void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
910{
911 dt_prop(dt, name, NULL, 0);
912}
913
914void dt_cpus(struct iseries_flat_dt *dt)
915{
916 unsigned char buf[32];
917 unsigned char *p;
918 unsigned int i, index;
919 struct IoHriProcessorVpd *d;
920
921 /* yuck */
922 snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
923 p = strchr(buf, ' ');
924 if (!p) p = buf + strlen(buf);
925
926 dt_start_node(dt, "cpus");
927 dt_prop_u32(dt, "#address-cells", 1);
928 dt_prop_u32(dt, "#size-cells", 0);
929
930 for (i = 0; i < NR_CPUS; i++) {
931 if (paca[i].lppaca.dyn_proc_status >= 2)
932 continue;
933
934 snprintf(p, 32 - (p - buf), "@%d", i);
935 dt_start_node(dt, buf);
936
937 dt_prop_str(dt, "device_type", "cpu");
938
939 index = paca[i].lppaca.dyn_hv_phys_proc_index;
940 d = &xIoHriProcessorVpd[index];
941
942 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
943 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
944
945 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
946 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
947
948 /* magic conversions to Hz copied from old code */
949 dt_prop_u32(dt, "clock-frequency",
950 ((1UL << 34) * 1000000) / d->xProcFreq);
951 dt_prop_u32(dt, "timebase-frequency",
952 ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
953
954 dt_prop_u32(dt, "reg", i);
955
956 dt_end_node(dt);
957 }
958
959 dt_end_node(dt);
960}
961
962void build_flat_dt(struct iseries_flat_dt *dt)
963{
964 u64 tmp[2];
965
966 dt_init(dt);
967
968 dt_start_node(dt, "");
969
970 dt_prop_u32(dt, "#address-cells", 2);
971 dt_prop_u32(dt, "#size-cells", 2);
972
973 /* /memory */
974 dt_start_node(dt, "memory@0");
975 dt_prop_str(dt, "name", "memory");
976 dt_prop_str(dt, "device_type", "memory");
977 tmp[0] = 0;
978 tmp[1] = systemcfg->physicalMemorySize;
979 dt_prop_u64_list(dt, "reg", tmp, 2);
980 dt_end_node(dt);
981
982 /* /chosen */
983 dt_start_node(dt, "chosen");
984 dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
985 dt_end_node(dt);
986
987 dt_cpus(dt);
988
989 dt_end_node(dt);
990
991 dt_push_u32(dt, OF_DT_END);
992}
993
994void * __init iSeries_early_setup(void)
995{
996 iSeries_fixup_klimit();
997
998 /*
999 * Initialize the table which translate Linux physical addresses to
1000 * AS/400 absolute addresses
1001 */
1002 build_iSeries_Memory_Map();
1003
1004 build_flat_dt(&iseries_dt);
1005
1006 return (void *) __pa(&iseries_dt);
1007}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-21 17:25:27 -0500