diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/ppc64/kernel/iSeries_setup.c |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'arch/ppc64/kernel/iSeries_setup.c')
-rw-r--r-- | arch/ppc64/kernel/iSeries_setup.c | 877 |
1 files changed, 877 insertions, 0 deletions
diff --git a/arch/ppc64/kernel/iSeries_setup.c b/arch/ppc64/kernel/iSeries_setup.c new file mode 100644 index 000000000000..da20120f2261 --- /dev/null +++ b/arch/ppc64/kernel/iSeries_setup.c | |||
@@ -0,0 +1,877 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com> | ||
3 | * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu> | ||
4 | * | ||
5 | * Module name: iSeries_setup.c | ||
6 | * | ||
7 | * Description: | ||
8 | * Architecture- / platform-specific boot-time initialization code for | ||
9 | * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and | ||
10 | * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek | ||
11 | * <dan@net4x.com>. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or | ||
14 | * modify it under the terms of the GNU General Public License | ||
15 | * as published by the Free Software Foundation; either version | ||
16 | * 2 of the License, or (at your option) any later version. | ||
17 | */ | ||
18 | |||
19 | #undef DEBUG | ||
20 | |||
21 | #include <linux/config.h> | ||
22 | #include <linux/init.h> | ||
23 | #include <linux/threads.h> | ||
24 | #include <linux/smp.h> | ||
25 | #include <linux/param.h> | ||
26 | #include <linux/string.h> | ||
27 | #include <linux/bootmem.h> | ||
28 | #include <linux/initrd.h> | ||
29 | #include <linux/seq_file.h> | ||
30 | #include <linux/kdev_t.h> | ||
31 | #include <linux/major.h> | ||
32 | #include <linux/root_dev.h> | ||
33 | |||
34 | #include <asm/processor.h> | ||
35 | #include <asm/machdep.h> | ||
36 | #include <asm/page.h> | ||
37 | #include <asm/mmu.h> | ||
38 | #include <asm/pgtable.h> | ||
39 | #include <asm/mmu_context.h> | ||
40 | #include <asm/cputable.h> | ||
41 | #include <asm/sections.h> | ||
42 | #include <asm/iommu.h> | ||
43 | |||
44 | #include <asm/time.h> | ||
45 | #include "iSeries_setup.h" | ||
46 | #include <asm/naca.h> | ||
47 | #include <asm/paca.h> | ||
48 | #include <asm/cache.h> | ||
49 | #include <asm/sections.h> | ||
50 | #include <asm/iSeries/LparData.h> | ||
51 | #include <asm/iSeries/HvCallHpt.h> | ||
52 | #include <asm/iSeries/HvLpConfig.h> | ||
53 | #include <asm/iSeries/HvCallEvent.h> | ||
54 | #include <asm/iSeries/HvCallSm.h> | ||
55 | #include <asm/iSeries/HvCallXm.h> | ||
56 | #include <asm/iSeries/ItLpQueue.h> | ||
57 | #include <asm/iSeries/IoHriMainStore.h> | ||
58 | #include <asm/iSeries/iSeries_proc.h> | ||
59 | #include <asm/iSeries/mf.h> | ||
60 | #include <asm/iSeries/HvLpEvent.h> | ||
61 | #include <asm/iSeries/iSeries_irq.h> | ||
62 | |||
63 | extern void hvlog(char *fmt, ...); | ||
64 | |||
65 | #ifdef DEBUG | ||
66 | #define DBG(fmt...) hvlog(fmt) | ||
67 | #else | ||
68 | #define DBG(fmt...) | ||
69 | #endif | ||
70 | |||
71 | /* Function Prototypes */ | ||
72 | extern void ppcdbg_initialize(void); | ||
73 | |||
74 | static void build_iSeries_Memory_Map(void); | ||
75 | static void setup_iSeries_cache_sizes(void); | ||
76 | static void iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr); | ||
77 | extern void iSeries_pci_final_fixup(void); | ||
78 | |||
79 | /* Global Variables */ | ||
80 | static unsigned long procFreqHz; | ||
81 | static unsigned long procFreqMhz; | ||
82 | static unsigned long procFreqMhzHundreths; | ||
83 | |||
84 | static unsigned long tbFreqHz; | ||
85 | static unsigned long tbFreqMhz; | ||
86 | static unsigned long tbFreqMhzHundreths; | ||
87 | |||
88 | int piranha_simulator; | ||
89 | |||
90 | extern int rd_size; /* Defined in drivers/block/rd.c */ | ||
91 | extern unsigned long klimit; | ||
92 | extern unsigned long embedded_sysmap_start; | ||
93 | extern unsigned long embedded_sysmap_end; | ||
94 | |||
95 | extern unsigned long iSeries_recal_tb; | ||
96 | extern unsigned long iSeries_recal_titan; | ||
97 | |||
98 | static int mf_initialized; | ||
99 | |||
100 | struct MemoryBlock { | ||
101 | unsigned long absStart; | ||
102 | unsigned long absEnd; | ||
103 | unsigned long logicalStart; | ||
104 | unsigned long logicalEnd; | ||
105 | }; | ||
106 | |||
107 | /* | ||
108 | * Process the main store vpd to determine where the holes in memory are | ||
109 | * and return the number of physical blocks and fill in the array of | ||
110 | * block data. | ||
111 | */ | ||
112 | static unsigned long iSeries_process_Condor_mainstore_vpd( | ||
113 | struct MemoryBlock *mb_array, unsigned long max_entries) | ||
114 | { | ||
115 | unsigned long holeFirstChunk, holeSizeChunks; | ||
116 | unsigned long numMemoryBlocks = 1; | ||
117 | struct IoHriMainStoreSegment4 *msVpd = | ||
118 | (struct IoHriMainStoreSegment4 *)xMsVpd; | ||
119 | unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr; | ||
120 | unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr; | ||
121 | unsigned long holeSize = holeEnd - holeStart; | ||
122 | |||
123 | printk("Mainstore_VPD: Condor\n"); | ||
124 | /* | ||
125 | * Determine if absolute memory has any | ||
126 | * holes so that we can interpret the | ||
127 | * access map we get back from the hypervisor | ||
128 | * correctly. | ||
129 | */ | ||
130 | mb_array[0].logicalStart = 0; | ||
131 | mb_array[0].logicalEnd = 0x100000000; | ||
132 | mb_array[0].absStart = 0; | ||
133 | mb_array[0].absEnd = 0x100000000; | ||
134 | |||
135 | if (holeSize) { | ||
136 | numMemoryBlocks = 2; | ||
137 | holeStart = holeStart & 0x000fffffffffffff; | ||
138 | holeStart = addr_to_chunk(holeStart); | ||
139 | holeFirstChunk = holeStart; | ||
140 | holeSize = addr_to_chunk(holeSize); | ||
141 | holeSizeChunks = holeSize; | ||
142 | printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n", | ||
143 | holeFirstChunk, holeSizeChunks ); | ||
144 | mb_array[0].logicalEnd = holeFirstChunk; | ||
145 | mb_array[0].absEnd = holeFirstChunk; | ||
146 | mb_array[1].logicalStart = holeFirstChunk; | ||
147 | mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks; | ||
148 | mb_array[1].absStart = holeFirstChunk + holeSizeChunks; | ||
149 | mb_array[1].absEnd = 0x100000000; | ||
150 | } | ||
151 | return numMemoryBlocks; | ||
152 | } | ||
153 | |||
154 | #define MaxSegmentAreas 32 | ||
155 | #define MaxSegmentAdrRangeBlocks 128 | ||
156 | #define MaxAreaRangeBlocks 4 | ||
157 | |||
158 | static unsigned long iSeries_process_Regatta_mainstore_vpd( | ||
159 | struct MemoryBlock *mb_array, unsigned long max_entries) | ||
160 | { | ||
161 | struct IoHriMainStoreSegment5 *msVpdP = | ||
162 | (struct IoHriMainStoreSegment5 *)xMsVpd; | ||
163 | unsigned long numSegmentBlocks = 0; | ||
164 | u32 existsBits = msVpdP->msAreaExists; | ||
165 | unsigned long area_num; | ||
166 | |||
167 | printk("Mainstore_VPD: Regatta\n"); | ||
168 | |||
169 | for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) { | ||
170 | unsigned long numAreaBlocks; | ||
171 | struct IoHriMainStoreArea4 *currentArea; | ||
172 | |||
173 | if (existsBits & 0x80000000) { | ||
174 | unsigned long block_num; | ||
175 | |||
176 | currentArea = &msVpdP->msAreaArray[area_num]; | ||
177 | numAreaBlocks = currentArea->numAdrRangeBlocks; | ||
178 | printk("ms_vpd: processing area %2ld blocks=%ld", | ||
179 | area_num, numAreaBlocks); | ||
180 | for (block_num = 0; block_num < numAreaBlocks; | ||
181 | ++block_num ) { | ||
182 | /* Process an address range block */ | ||
183 | struct MemoryBlock tempBlock; | ||
184 | unsigned long i; | ||
185 | |||
186 | tempBlock.absStart = | ||
187 | (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart; | ||
188 | tempBlock.absEnd = | ||
189 | (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd; | ||
190 | tempBlock.logicalStart = 0; | ||
191 | tempBlock.logicalEnd = 0; | ||
192 | printk("\n block %ld absStart=%016lx absEnd=%016lx", | ||
193 | block_num, tempBlock.absStart, | ||
194 | tempBlock.absEnd); | ||
195 | |||
196 | for (i = 0; i < numSegmentBlocks; ++i) { | ||
197 | if (mb_array[i].absStart == | ||
198 | tempBlock.absStart) | ||
199 | break; | ||
200 | } | ||
201 | if (i == numSegmentBlocks) { | ||
202 | if (numSegmentBlocks == max_entries) | ||
203 | panic("iSeries_process_mainstore_vpd: too many memory blocks"); | ||
204 | mb_array[numSegmentBlocks] = tempBlock; | ||
205 | ++numSegmentBlocks; | ||
206 | } else | ||
207 | printk(" (duplicate)"); | ||
208 | } | ||
209 | printk("\n"); | ||
210 | } | ||
211 | existsBits <<= 1; | ||
212 | } | ||
213 | /* Now sort the blocks found into ascending sequence */ | ||
214 | if (numSegmentBlocks > 1) { | ||
215 | unsigned long m, n; | ||
216 | |||
217 | for (m = 0; m < numSegmentBlocks - 1; ++m) { | ||
218 | for (n = numSegmentBlocks - 1; m < n; --n) { | ||
219 | if (mb_array[n].absStart < | ||
220 | mb_array[n-1].absStart) { | ||
221 | struct MemoryBlock tempBlock; | ||
222 | |||
223 | tempBlock = mb_array[n]; | ||
224 | mb_array[n] = mb_array[n-1]; | ||
225 | mb_array[n-1] = tempBlock; | ||
226 | } | ||
227 | } | ||
228 | } | ||
229 | } | ||
230 | /* | ||
231 | * Assign "logical" addresses to each block. These | ||
232 | * addresses correspond to the hypervisor "bitmap" space. | ||
233 | * Convert all addresses into units of 256K chunks. | ||
234 | */ | ||
235 | { | ||
236 | unsigned long i, nextBitmapAddress; | ||
237 | |||
238 | printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks); | ||
239 | nextBitmapAddress = 0; | ||
240 | for (i = 0; i < numSegmentBlocks; ++i) { | ||
241 | unsigned long length = mb_array[i].absEnd - | ||
242 | mb_array[i].absStart; | ||
243 | |||
244 | mb_array[i].logicalStart = nextBitmapAddress; | ||
245 | mb_array[i].logicalEnd = nextBitmapAddress + length; | ||
246 | nextBitmapAddress += length; | ||
247 | printk(" Bitmap range: %016lx - %016lx\n" | ||
248 | " Absolute range: %016lx - %016lx\n", | ||
249 | mb_array[i].logicalStart, | ||
250 | mb_array[i].logicalEnd, | ||
251 | mb_array[i].absStart, mb_array[i].absEnd); | ||
252 | mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart & | ||
253 | 0x000fffffffffffff); | ||
254 | mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd & | ||
255 | 0x000fffffffffffff); | ||
256 | mb_array[i].logicalStart = | ||
257 | addr_to_chunk(mb_array[i].logicalStart); | ||
258 | mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd); | ||
259 | } | ||
260 | } | ||
261 | |||
262 | return numSegmentBlocks; | ||
263 | } | ||
264 | |||
265 | static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array, | ||
266 | unsigned long max_entries) | ||
267 | { | ||
268 | unsigned long i; | ||
269 | unsigned long mem_blocks = 0; | ||
270 | |||
271 | if (cpu_has_feature(CPU_FTR_SLB)) | ||
272 | mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array, | ||
273 | max_entries); | ||
274 | else | ||
275 | mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array, | ||
276 | max_entries); | ||
277 | |||
278 | printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks); | ||
279 | for (i = 0; i < mem_blocks; ++i) { | ||
280 | printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n" | ||
281 | " abs chunks %016lx - %016lx\n", | ||
282 | i, mb_array[i].logicalStart, mb_array[i].logicalEnd, | ||
283 | mb_array[i].absStart, mb_array[i].absEnd); | ||
284 | } | ||
285 | return mem_blocks; | ||
286 | } | ||
287 | |||
288 | static void __init iSeries_get_cmdline(void) | ||
289 | { | ||
290 | char *p, *q; | ||
291 | |||
292 | /* copy the command line parameter from the primary VSP */ | ||
293 | HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256, | ||
294 | HvLpDma_Direction_RemoteToLocal); | ||
295 | |||
296 | p = cmd_line; | ||
297 | q = cmd_line + 255; | ||
298 | while(p < q) { | ||
299 | if (!*p || *p == '\n') | ||
300 | break; | ||
301 | ++p; | ||
302 | } | ||
303 | *p = 0; | ||
304 | } | ||
305 | |||
306 | static void __init iSeries_init_early(void) | ||
307 | { | ||
308 | extern unsigned long memory_limit; | ||
309 | |||
310 | DBG(" -> iSeries_init_early()\n"); | ||
311 | |||
312 | ppcdbg_initialize(); | ||
313 | |||
314 | #if defined(CONFIG_BLK_DEV_INITRD) | ||
315 | /* | ||
316 | * If the init RAM disk has been configured and there is | ||
317 | * a non-zero starting address for it, set it up | ||
318 | */ | ||
319 | if (naca.xRamDisk) { | ||
320 | initrd_start = (unsigned long)__va(naca.xRamDisk); | ||
321 | initrd_end = initrd_start + naca.xRamDiskSize * PAGE_SIZE; | ||
322 | initrd_below_start_ok = 1; // ramdisk in kernel space | ||
323 | ROOT_DEV = Root_RAM0; | ||
324 | if (((rd_size * 1024) / PAGE_SIZE) < naca.xRamDiskSize) | ||
325 | rd_size = (naca.xRamDiskSize * PAGE_SIZE) / 1024; | ||
326 | } else | ||
327 | #endif /* CONFIG_BLK_DEV_INITRD */ | ||
328 | { | ||
329 | /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */ | ||
330 | } | ||
331 | |||
332 | iSeries_recal_tb = get_tb(); | ||
333 | iSeries_recal_titan = HvCallXm_loadTod(); | ||
334 | |||
335 | /* | ||
336 | * Cache sizes must be initialized before hpte_init_iSeries is called | ||
337 | * as the later need them for flush_icache_range() | ||
338 | */ | ||
339 | setup_iSeries_cache_sizes(); | ||
340 | |||
341 | /* | ||
342 | * Initialize the hash table management pointers | ||
343 | */ | ||
344 | hpte_init_iSeries(); | ||
345 | |||
346 | /* | ||
347 | * Initialize the DMA/TCE management | ||
348 | */ | ||
349 | iommu_init_early_iSeries(); | ||
350 | |||
351 | /* | ||
352 | * Initialize the table which translate Linux physical addresses to | ||
353 | * AS/400 absolute addresses | ||
354 | */ | ||
355 | build_iSeries_Memory_Map(); | ||
356 | |||
357 | iSeries_get_cmdline(); | ||
358 | |||
359 | /* Save unparsed command line copy for /proc/cmdline */ | ||
360 | strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE); | ||
361 | |||
362 | /* Parse early parameters, in particular mem=x */ | ||
363 | parse_early_param(); | ||
364 | |||
365 | if (memory_limit) { | ||
366 | if (memory_limit < systemcfg->physicalMemorySize) | ||
367 | systemcfg->physicalMemorySize = memory_limit; | ||
368 | else { | ||
369 | printk("Ignoring mem=%lu >= ram_top.\n", memory_limit); | ||
370 | memory_limit = 0; | ||
371 | } | ||
372 | } | ||
373 | |||
374 | /* Bolt kernel mappings for all of memory (or just a bit if we've got a limit) */ | ||
375 | iSeries_bolt_kernel(0, systemcfg->physicalMemorySize); | ||
376 | |||
377 | lmb_init(); | ||
378 | lmb_add(0, systemcfg->physicalMemorySize); | ||
379 | lmb_analyze(); | ||
380 | lmb_reserve(0, __pa(klimit)); | ||
381 | |||
382 | /* Initialize machine-dependency vectors */ | ||
383 | #ifdef CONFIG_SMP | ||
384 | smp_init_iSeries(); | ||
385 | #endif | ||
386 | if (itLpNaca.xPirEnvironMode == 0) | ||
387 | piranha_simulator = 1; | ||
388 | |||
389 | /* Associate Lp Event Queue 0 with processor 0 */ | ||
390 | HvCallEvent_setLpEventQueueInterruptProc(0, 0); | ||
391 | |||
392 | mf_init(); | ||
393 | mf_initialized = 1; | ||
394 | mb(); | ||
395 | |||
396 | /* If we were passed an initrd, set the ROOT_DEV properly if the values | ||
397 | * look sensible. If not, clear initrd reference. | ||
398 | */ | ||
399 | #ifdef CONFIG_BLK_DEV_INITRD | ||
400 | if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE && | ||
401 | initrd_end > initrd_start) | ||
402 | ROOT_DEV = Root_RAM0; | ||
403 | else | ||
404 | initrd_start = initrd_end = 0; | ||
405 | #endif /* CONFIG_BLK_DEV_INITRD */ | ||
406 | |||
407 | DBG(" <- iSeries_init_early()\n"); | ||
408 | } | ||
409 | |||
410 | /* | ||
411 | * The iSeries may have very large memories ( > 128 GB ) and a partition | ||
412 | * may get memory in "chunks" that may be anywhere in the 2**52 real | ||
413 | * address space. The chunks are 256K in size. To map this to the | ||
414 | * memory model Linux expects, the AS/400 specific code builds a | ||
415 | * translation table to translate what Linux thinks are "physical" | ||
416 | * addresses to the actual real addresses. This allows us to make | ||
417 | * it appear to Linux that we have contiguous memory starting at | ||
418 | * physical address zero while in fact this could be far from the truth. | ||
419 | * To avoid confusion, I'll let the words physical and/or real address | ||
420 | * apply to the Linux addresses while I'll use "absolute address" to | ||
421 | * refer to the actual hardware real address. | ||
422 | * | ||
423 | * build_iSeries_Memory_Map gets information from the Hypervisor and | ||
424 | * looks at the Main Store VPD to determine the absolute addresses | ||
425 | * of the memory that has been assigned to our partition and builds | ||
426 | * a table used to translate Linux's physical addresses to these | ||
427 | * absolute addresses. Absolute addresses are needed when | ||
428 | * communicating with the hypervisor (e.g. to build HPT entries) | ||
429 | */ | ||
430 | |||
431 | static void __init build_iSeries_Memory_Map(void) | ||
432 | { | ||
433 | u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize; | ||
434 | u32 nextPhysChunk; | ||
435 | u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages; | ||
436 | u32 num_ptegs; | ||
437 | u32 totalChunks,moreChunks; | ||
438 | u32 currChunk, thisChunk, absChunk; | ||
439 | u32 currDword; | ||
440 | u32 chunkBit; | ||
441 | u64 map; | ||
442 | struct MemoryBlock mb[32]; | ||
443 | unsigned long numMemoryBlocks, curBlock; | ||
444 | |||
445 | /* Chunk size on iSeries is 256K bytes */ | ||
446 | totalChunks = (u32)HvLpConfig_getMsChunks(); | ||
447 | klimit = msChunks_alloc(klimit, totalChunks, 1UL << 18); | ||
448 | |||
449 | /* | ||
450 | * Get absolute address of our load area | ||
451 | * and map it to physical address 0 | ||
452 | * This guarantees that the loadarea ends up at physical 0 | ||
453 | * otherwise, it might not be returned by PLIC as the first | ||
454 | * chunks | ||
455 | */ | ||
456 | |||
457 | loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr); | ||
458 | loadAreaSize = itLpNaca.xLoadAreaChunks; | ||
459 | |||
460 | /* | ||
461 | * Only add the pages already mapped here. | ||
462 | * Otherwise we might add the hpt pages | ||
463 | * The rest of the pages of the load area | ||
464 | * aren't in the HPT yet and can still | ||
465 | * be assigned an arbitrary physical address | ||
466 | */ | ||
467 | if ((loadAreaSize * 64) > HvPagesToMap) | ||
468 | loadAreaSize = HvPagesToMap / 64; | ||
469 | |||
470 | loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1; | ||
471 | |||
472 | /* | ||
473 | * TODO Do we need to do something if the HPT is in the 64MB load area? | ||
474 | * This would be required if the itLpNaca.xLoadAreaChunks includes | ||
475 | * the HPT size | ||
476 | */ | ||
477 | |||
478 | printk("Mapping load area - physical addr = 0000000000000000\n" | ||
479 | " absolute addr = %016lx\n", | ||
480 | chunk_to_addr(loadAreaFirstChunk)); | ||
481 | printk("Load area size %dK\n", loadAreaSize * 256); | ||
482 | |||
483 | for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk) | ||
484 | msChunks.abs[nextPhysChunk] = | ||
485 | loadAreaFirstChunk + nextPhysChunk; | ||
486 | |||
487 | /* | ||
488 | * Get absolute address of our HPT and remember it so | ||
489 | * we won't map it to any physical address | ||
490 | */ | ||
491 | hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress()); | ||
492 | hptSizePages = (u32)HvCallHpt_getHptPages(); | ||
493 | hptSizeChunks = hptSizePages >> (msChunks.chunk_shift - PAGE_SHIFT); | ||
494 | hptLastChunk = hptFirstChunk + hptSizeChunks - 1; | ||
495 | |||
496 | printk("HPT absolute addr = %016lx, size = %dK\n", | ||
497 | chunk_to_addr(hptFirstChunk), hptSizeChunks * 256); | ||
498 | |||
499 | /* Fill in the hashed page table hash mask */ | ||
500 | num_ptegs = hptSizePages * | ||
501 | (PAGE_SIZE / (sizeof(HPTE) * HPTES_PER_GROUP)); | ||
502 | htab_hash_mask = num_ptegs - 1; | ||
503 | |||
504 | /* | ||
505 | * The actual hashed page table is in the hypervisor, | ||
506 | * we have no direct access | ||
507 | */ | ||
508 | htab_address = NULL; | ||
509 | |||
510 | /* | ||
511 | * Determine if absolute memory has any | ||
512 | * holes so that we can interpret the | ||
513 | * access map we get back from the hypervisor | ||
514 | * correctly. | ||
515 | */ | ||
516 | numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32); | ||
517 | |||
518 | /* | ||
519 | * Process the main store access map from the hypervisor | ||
520 | * to build up our physical -> absolute translation table | ||
521 | */ | ||
522 | curBlock = 0; | ||
523 | currChunk = 0; | ||
524 | currDword = 0; | ||
525 | moreChunks = totalChunks; | ||
526 | |||
527 | while (moreChunks) { | ||
528 | map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex, | ||
529 | currDword); | ||
530 | thisChunk = currChunk; | ||
531 | while (map) { | ||
532 | chunkBit = map >> 63; | ||
533 | map <<= 1; | ||
534 | if (chunkBit) { | ||
535 | --moreChunks; | ||
536 | while (thisChunk >= mb[curBlock].logicalEnd) { | ||
537 | ++curBlock; | ||
538 | if (curBlock >= numMemoryBlocks) | ||
539 | panic("out of memory blocks"); | ||
540 | } | ||
541 | if (thisChunk < mb[curBlock].logicalStart) | ||
542 | panic("memory block error"); | ||
543 | |||
544 | absChunk = mb[curBlock].absStart + | ||
545 | (thisChunk - mb[curBlock].logicalStart); | ||
546 | if (((absChunk < hptFirstChunk) || | ||
547 | (absChunk > hptLastChunk)) && | ||
548 | ((absChunk < loadAreaFirstChunk) || | ||
549 | (absChunk > loadAreaLastChunk))) { | ||
550 | msChunks.abs[nextPhysChunk] = absChunk; | ||
551 | ++nextPhysChunk; | ||
552 | } | ||
553 | } | ||
554 | ++thisChunk; | ||
555 | } | ||
556 | ++currDword; | ||
557 | currChunk += 64; | ||
558 | } | ||
559 | |||
560 | /* | ||
561 | * main store size (in chunks) is | ||
562 | * totalChunks - hptSizeChunks | ||
563 | * which should be equal to | ||
564 | * nextPhysChunk | ||
565 | */ | ||
566 | systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk); | ||
567 | } | ||
568 | |||
569 | /* | ||
570 | * Set up the variables that describe the cache line sizes | ||
571 | * for this machine. | ||
572 | */ | ||
573 | static void __init setup_iSeries_cache_sizes(void) | ||
574 | { | ||
575 | unsigned int i, n; | ||
576 | unsigned int procIx = get_paca()->lppaca.dyn_hv_phys_proc_index; | ||
577 | |||
578 | systemcfg->icache_size = | ||
579 | ppc64_caches.isize = xIoHriProcessorVpd[procIx].xInstCacheSize * 1024; | ||
580 | systemcfg->icache_line_size = | ||
581 | ppc64_caches.iline_size = | ||
582 | xIoHriProcessorVpd[procIx].xInstCacheOperandSize; | ||
583 | systemcfg->dcache_size = | ||
584 | ppc64_caches.dsize = | ||
585 | xIoHriProcessorVpd[procIx].xDataL1CacheSizeKB * 1024; | ||
586 | systemcfg->dcache_line_size = | ||
587 | ppc64_caches.dline_size = | ||
588 | xIoHriProcessorVpd[procIx].xDataCacheOperandSize; | ||
589 | ppc64_caches.ilines_per_page = PAGE_SIZE / ppc64_caches.iline_size; | ||
590 | ppc64_caches.dlines_per_page = PAGE_SIZE / ppc64_caches.dline_size; | ||
591 | |||
592 | i = ppc64_caches.iline_size; | ||
593 | n = 0; | ||
594 | while ((i = (i / 2))) | ||
595 | ++n; | ||
596 | ppc64_caches.log_iline_size = n; | ||
597 | |||
598 | i = ppc64_caches.dline_size; | ||
599 | n = 0; | ||
600 | while ((i = (i / 2))) | ||
601 | ++n; | ||
602 | ppc64_caches.log_dline_size = n; | ||
603 | |||
604 | printk("D-cache line size = %d\n", | ||
605 | (unsigned int)ppc64_caches.dline_size); | ||
606 | printk("I-cache line size = %d\n", | ||
607 | (unsigned int)ppc64_caches.iline_size); | ||
608 | } | ||
609 | |||
610 | /* | ||
611 | * Create a pte. Used during initialization only. | ||
612 | */ | ||
613 | static void iSeries_make_pte(unsigned long va, unsigned long pa, | ||
614 | int mode) | ||
615 | { | ||
616 | HPTE local_hpte, rhpte; | ||
617 | unsigned long hash, vpn; | ||
618 | long slot; | ||
619 | |||
620 | vpn = va >> PAGE_SHIFT; | ||
621 | hash = hpt_hash(vpn, 0); | ||
622 | |||
623 | local_hpte.dw1.dword1 = pa | mode; | ||
624 | local_hpte.dw0.dword0 = 0; | ||
625 | local_hpte.dw0.dw0.avpn = va >> 23; | ||
626 | local_hpte.dw0.dw0.bolted = 1; /* bolted */ | ||
627 | local_hpte.dw0.dw0.v = 1; | ||
628 | |||
629 | slot = HvCallHpt_findValid(&rhpte, vpn); | ||
630 | if (slot < 0) { | ||
631 | /* Must find space in primary group */ | ||
632 | panic("hash_page: hpte already exists\n"); | ||
633 | } | ||
634 | HvCallHpt_addValidate(slot, 0, (HPTE *)&local_hpte ); | ||
635 | } | ||
636 | |||
637 | /* | ||
638 | * Bolt the kernel addr space into the HPT | ||
639 | */ | ||
640 | static void __init iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr) | ||
641 | { | ||
642 | unsigned long pa; | ||
643 | unsigned long mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX; | ||
644 | HPTE hpte; | ||
645 | |||
646 | for (pa = saddr; pa < eaddr ;pa += PAGE_SIZE) { | ||
647 | unsigned long ea = (unsigned long)__va(pa); | ||
648 | unsigned long vsid = get_kernel_vsid(ea); | ||
649 | unsigned long va = (vsid << 28) | (pa & 0xfffffff); | ||
650 | unsigned long vpn = va >> PAGE_SHIFT; | ||
651 | unsigned long slot = HvCallHpt_findValid(&hpte, vpn); | ||
652 | |||
653 | /* Make non-kernel text non-executable */ | ||
654 | if (!in_kernel_text(ea)) | ||
655 | mode_rw |= HW_NO_EXEC; | ||
656 | |||
657 | if (hpte.dw0.dw0.v) { | ||
658 | /* HPTE exists, so just bolt it */ | ||
659 | HvCallHpt_setSwBits(slot, 0x10, 0); | ||
660 | /* And make sure the pp bits are correct */ | ||
661 | HvCallHpt_setPp(slot, PP_RWXX); | ||
662 | } else | ||
663 | /* No HPTE exists, so create a new bolted one */ | ||
664 | iSeries_make_pte(va, phys_to_abs(pa), mode_rw); | ||
665 | } | ||
666 | } | ||
667 | |||
668 | extern unsigned long ppc_proc_freq; | ||
669 | extern unsigned long ppc_tb_freq; | ||
670 | |||
671 | /* | ||
672 | * Document me. | ||
673 | */ | ||
674 | static void __init iSeries_setup_arch(void) | ||
675 | { | ||
676 | void *eventStack; | ||
677 | unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index; | ||
678 | |||
679 | /* Add an eye catcher and the systemcfg layout version number */ | ||
680 | strcpy(systemcfg->eye_catcher, "SYSTEMCFG:PPC64"); | ||
681 | systemcfg->version.major = SYSTEMCFG_MAJOR; | ||
682 | systemcfg->version.minor = SYSTEMCFG_MINOR; | ||
683 | |||
684 | /* Setup the Lp Event Queue */ | ||
685 | |||
686 | /* Allocate a page for the Event Stack | ||
687 | * The hypervisor wants the absolute real address, so | ||
688 | * we subtract out the KERNELBASE and add in the | ||
689 | * absolute real address of the kernel load area | ||
690 | */ | ||
691 | eventStack = alloc_bootmem_pages(LpEventStackSize); | ||
692 | memset(eventStack, 0, LpEventStackSize); | ||
693 | |||
694 | /* Invoke the hypervisor to initialize the event stack */ | ||
695 | HvCallEvent_setLpEventStack(0, eventStack, LpEventStackSize); | ||
696 | |||
697 | /* Initialize fields in our Lp Event Queue */ | ||
698 | xItLpQueue.xSlicEventStackPtr = (char *)eventStack; | ||
699 | xItLpQueue.xSlicCurEventPtr = (char *)eventStack; | ||
700 | xItLpQueue.xSlicLastValidEventPtr = (char *)eventStack + | ||
701 | (LpEventStackSize - LpEventMaxSize); | ||
702 | xItLpQueue.xIndex = 0; | ||
703 | |||
704 | /* Compute processor frequency */ | ||
705 | procFreqHz = ((1UL << 34) * 1000000) / | ||
706 | xIoHriProcessorVpd[procIx].xProcFreq; | ||
707 | procFreqMhz = procFreqHz / 1000000; | ||
708 | procFreqMhzHundreths = (procFreqHz / 10000) - (procFreqMhz * 100); | ||
709 | ppc_proc_freq = procFreqHz; | ||
710 | |||
711 | /* Compute time base frequency */ | ||
712 | tbFreqHz = ((1UL << 32) * 1000000) / | ||
713 | xIoHriProcessorVpd[procIx].xTimeBaseFreq; | ||
714 | tbFreqMhz = tbFreqHz / 1000000; | ||
715 | tbFreqMhzHundreths = (tbFreqHz / 10000) - (tbFreqMhz * 100); | ||
716 | ppc_tb_freq = tbFreqHz; | ||
717 | |||
718 | printk("Max logical processors = %d\n", | ||
719 | itVpdAreas.xSlicMaxLogicalProcs); | ||
720 | printk("Max physical processors = %d\n", | ||
721 | itVpdAreas.xSlicMaxPhysicalProcs); | ||
722 | printk("Processor frequency = %lu.%02lu\n", procFreqMhz, | ||
723 | procFreqMhzHundreths); | ||
724 | printk("Time base frequency = %lu.%02lu\n", tbFreqMhz, | ||
725 | tbFreqMhzHundreths); | ||
726 | systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR; | ||
727 | printk("Processor version = %x\n", systemcfg->processor); | ||
728 | } | ||
729 | |||
730 | static void iSeries_get_cpuinfo(struct seq_file *m) | ||
731 | { | ||
732 | seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n"); | ||
733 | } | ||
734 | |||
735 | /* | ||
736 | * Document me. | ||
737 | * and Implement me. | ||
738 | */ | ||
739 | static int iSeries_get_irq(struct pt_regs *regs) | ||
740 | { | ||
741 | /* -2 means ignore this interrupt */ | ||
742 | return -2; | ||
743 | } | ||
744 | |||
745 | /* | ||
746 | * Document me. | ||
747 | */ | ||
748 | static void iSeries_restart(char *cmd) | ||
749 | { | ||
750 | mf_reboot(); | ||
751 | } | ||
752 | |||
753 | /* | ||
754 | * Document me. | ||
755 | */ | ||
756 | static void iSeries_power_off(void) | ||
757 | { | ||
758 | mf_power_off(); | ||
759 | } | ||
760 | |||
761 | /* | ||
762 | * Document me. | ||
763 | */ | ||
764 | static void iSeries_halt(void) | ||
765 | { | ||
766 | mf_power_off(); | ||
767 | } | ||
768 | |||
769 | extern void setup_default_decr(void); | ||
770 | |||
771 | /* | ||
772 | * void __init iSeries_calibrate_decr() | ||
773 | * | ||
774 | * Description: | ||
775 | * This routine retrieves the internal processor frequency from the VPD, | ||
776 | * and sets up the kernel timer decrementer based on that value. | ||
777 | * | ||
778 | */ | ||
779 | static void __init iSeries_calibrate_decr(void) | ||
780 | { | ||
781 | unsigned long cyclesPerUsec; | ||
782 | struct div_result divres; | ||
783 | |||
784 | /* Compute decrementer (and TB) frequency in cycles/sec */ | ||
785 | cyclesPerUsec = ppc_tb_freq / 1000000; | ||
786 | |||
787 | /* | ||
788 | * Set the amount to refresh the decrementer by. This | ||
789 | * is the number of decrementer ticks it takes for | ||
790 | * 1/HZ seconds. | ||
791 | */ | ||
792 | tb_ticks_per_jiffy = ppc_tb_freq / HZ; | ||
793 | |||
794 | #if 0 | ||
795 | /* TEST CODE FOR ADJTIME */ | ||
796 | tb_ticks_per_jiffy += tb_ticks_per_jiffy / 5000; | ||
797 | /* END OF TEST CODE */ | ||
798 | #endif | ||
799 | |||
800 | /* | ||
801 | * tb_ticks_per_sec = freq; would give better accuracy | ||
802 | * but tb_ticks_per_sec = tb_ticks_per_jiffy*HZ; assures | ||
803 | * that jiffies (and xtime) will match the time returned | ||
804 | * by do_gettimeofday. | ||
805 | */ | ||
806 | tb_ticks_per_sec = tb_ticks_per_jiffy * HZ; | ||
807 | tb_ticks_per_usec = cyclesPerUsec; | ||
808 | tb_to_us = mulhwu_scale_factor(ppc_tb_freq, 1000000); | ||
809 | div128_by_32(1024 * 1024, 0, tb_ticks_per_sec, &divres); | ||
810 | tb_to_xs = divres.result_low; | ||
811 | setup_default_decr(); | ||
812 | } | ||
813 | |||
814 | static void __init iSeries_progress(char * st, unsigned short code) | ||
815 | { | ||
816 | printk("Progress: [%04x] - %s\n", (unsigned)code, st); | ||
817 | if (!piranha_simulator && mf_initialized) { | ||
818 | if (code != 0xffff) | ||
819 | mf_display_progress(code); | ||
820 | else | ||
821 | mf_clear_src(); | ||
822 | } | ||
823 | } | ||
824 | |||
825 | static void __init iSeries_fixup_klimit(void) | ||
826 | { | ||
827 | /* | ||
828 | * Change klimit to take into account any ram disk | ||
829 | * that may be included | ||
830 | */ | ||
831 | if (naca.xRamDisk) | ||
832 | klimit = KERNELBASE + (u64)naca.xRamDisk + | ||
833 | (naca.xRamDiskSize * PAGE_SIZE); | ||
834 | else { | ||
835 | /* | ||
836 | * No ram disk was included - check and see if there | ||
837 | * was an embedded system map. Change klimit to take | ||
838 | * into account any embedded system map | ||
839 | */ | ||
840 | if (embedded_sysmap_end) | ||
841 | klimit = KERNELBASE + ((embedded_sysmap_end + 4095) & | ||
842 | 0xfffffffffffff000); | ||
843 | } | ||
844 | } | ||
845 | |||
846 | static int __init iSeries_src_init(void) | ||
847 | { | ||
848 | /* clear the progress line */ | ||
849 | ppc_md.progress(" ", 0xffff); | ||
850 | return 0; | ||
851 | } | ||
852 | |||
853 | late_initcall(iSeries_src_init); | ||
854 | |||
855 | void __init iSeries_early_setup(void) | ||
856 | { | ||
857 | iSeries_fixup_klimit(); | ||
858 | |||
859 | ppc_md.setup_arch = iSeries_setup_arch; | ||
860 | ppc_md.get_cpuinfo = iSeries_get_cpuinfo; | ||
861 | ppc_md.init_IRQ = iSeries_init_IRQ; | ||
862 | ppc_md.get_irq = iSeries_get_irq; | ||
863 | ppc_md.init_early = iSeries_init_early, | ||
864 | |||
865 | ppc_md.pcibios_fixup = iSeries_pci_final_fixup; | ||
866 | |||
867 | ppc_md.restart = iSeries_restart; | ||
868 | ppc_md.power_off = iSeries_power_off; | ||
869 | ppc_md.halt = iSeries_halt; | ||
870 | |||
871 | ppc_md.get_boot_time = iSeries_get_boot_time; | ||
872 | ppc_md.set_rtc_time = iSeries_set_rtc_time; | ||
873 | ppc_md.get_rtc_time = iSeries_get_rtc_time; | ||
874 | ppc_md.calibrate_decr = iSeries_calibrate_decr; | ||
875 | ppc_md.progress = iSeries_progress; | ||
876 | } | ||
877 | |||