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authorAnton Blanchard <anton@samba.org>2005-06-02 17:02:02 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-02 18:12:30 -0400
commit6dc2f0c7df6cefda5932ac8bcd9ca5ef45de36ee (patch)
treece3f5ba4f99adfbc7adf4242d5bc76a8d0c3fd69 /arch/ppc64/kernel/head.S
parent79f1248962cfa1e11a5610e0349bc3515687516d (diff)
[PATCH] ppc64: cleanup iseries runlight support
The iseries has a bar graph on the front panel that shows how busy it is. The operating system sets and clears a bit in the CTRL register to control it. Instead of going to the complexity of using a thread info bit, just set and clear it in the idle loop. Also create two helper functions, ppc64_runlatch_on and ppc64_runlatch_off. Finally don't use the short form of the SPR defines. Signed-off-by: Anton Blanchard <anton@samba.org> Acked-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc64/kernel/head.S')
-rw-r--r--arch/ppc64/kernel/head.S10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S
index 92a744c31ab1..346dbf606b5d 100644
--- a/arch/ppc64/kernel/head.S
+++ b/arch/ppc64/kernel/head.S
@@ -626,10 +626,10 @@ system_reset_iSeries:
626 lhz r24,PACAPACAINDEX(r13) /* Get processor # */ 626 lhz r24,PACAPACAINDEX(r13) /* Get processor # */
627 cmpwi 0,r24,0 /* Are we processor 0? */ 627 cmpwi 0,r24,0 /* Are we processor 0? */
628 beq .__start_initialization_iSeries /* Start up the first processor */ 628 beq .__start_initialization_iSeries /* Start up the first processor */
629 mfspr r4,CTRLF 629 mfspr r4,SPRN_CTRLF
630 li r5,RUNLATCH /* Turn off the run light */ 630 li r5,CTRL_RUNLATCH /* Turn off the run light */
631 andc r4,r4,r5 631 andc r4,r4,r5
632 mtspr CTRLT,r4 632 mtspr SPRN_CTRLT,r4
633 633
6341: 6341:
635 HMT_LOW 635 HMT_LOW
@@ -2082,9 +2082,9 @@ _GLOBAL(hmt_start_secondary)
2082 mfspr r4, HID0 2082 mfspr r4, HID0
2083 ori r4, r4, 0x1 2083 ori r4, r4, 0x1
2084 mtspr HID0, r4 2084 mtspr HID0, r4
2085 mfspr r4, CTRLF 2085 mfspr r4, SPRN_CTRLF
2086 oris r4, r4, 0x40 2086 oris r4, r4, 0x40
2087 mtspr CTRLT, r4 2087 mtspr SPRN_CTRLT, r4
2088 blr 2088 blr
2089#endif 2089#endif
2090 2090