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authorKumar Gala <galak@freescale.com>2005-05-28 18:52:15 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-05-28 19:46:16 -0400
commitf9e4a005827ec0b33f0c61fec1634a5a3421decd (patch)
treeb0c90680abd6d4b9f7423a7dd935d20b65ee30ee /arch/ppc/syslib
parentff945023c6a455679165b14d298316e262ceeb1f (diff)
[PATCH] ppc32: Add soft reset to MPC834x
This change allows mpc83xx_restart to issue a software reset. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/syslib')
-rw-r--r--arch/ppc/syslib/ppc83xx_setup.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c
index c28f9d679484..843cf8873e60 100644
--- a/arch/ppc/syslib/ppc83xx_setup.c
+++ b/arch/ppc/syslib/ppc83xx_setup.c
@@ -29,6 +29,7 @@
29#include <asm/mmu.h> 29#include <asm/mmu.h>
30#include <asm/ppc_sys.h> 30#include <asm/ppc_sys.h>
31#include <asm/kgdb.h> 31#include <asm/kgdb.h>
32#include <asm/delay.h>
32 33
33#include <syslib/ppc83xx_setup.h> 34#include <syslib/ppc83xx_setup.h>
34 35
@@ -117,7 +118,34 @@ mpc83xx_early_serial_map(void)
117void 118void
118mpc83xx_restart(char *cmd) 119mpc83xx_restart(char *cmd)
119{ 120{
121 volatile unsigned char __iomem *reg;
122 unsigned char tmp;
123
124 reg = ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
125
120 local_irq_disable(); 126 local_irq_disable();
127
128 /*
129 * Unlock the BCSR bits so a PRST will update the contents.
130 * Otherwise the reset asserts but doesn't clear.
131 */
132 tmp = in_8(reg + BCSR_MISC_REG3_OFF);
133 tmp |= BCSR_MISC_REG3_CNFLOCK; /* low true, high false */
134 out_8(reg + BCSR_MISC_REG3_OFF, tmp);
135
136 /*
137 * Trigger a reset via a low->high transition of the
138 * PORESET bit.
139 */
140 tmp = in_8(reg + BCSR_MISC_REG2_OFF);
141 tmp &= ~BCSR_MISC_REG2_PORESET;
142 out_8(reg + BCSR_MISC_REG2_OFF, tmp);
143
144 udelay(1);
145
146 tmp |= BCSR_MISC_REG2_PORESET;
147 out_8(reg + BCSR_MISC_REG2_OFF, tmp);
148
121 for(;;); 149 for(;;);
122} 150}
123 151