diff options
author | Sylvain Munaut <tnt@246tNt.com> | 2006-03-26 06:38:09 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-03-26 22:49:00 -0500 |
commit | 1f5e3b028c5b592b5a792a390c78d609219aebfd (patch) | |
tree | f8aec1818e99f8ee485fdc686c73299bcbb6a18a /arch/ppc/syslib | |
parent | f8dd311982c86141f4f2fd326c0edf0c2d9fd97b (diff) |
[PATCH] ppc32: Reorganize and complete MPC52xx initial cpu setup
ppc32: Reorganize and complete MPC52xx initial cpu setup
This patch splits up the CPU setup into a generic part and a
platform specific part. We also add a few missing init at the
same time.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/syslib')
-rw-r--r-- | arch/ppc/syslib/mpc52xx_setup.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c index 2ee48ce0a517..ee6379bb415e 100644 --- a/arch/ppc/syslib/mpc52xx_setup.c +++ b/arch/ppc/syslib/mpc52xx_setup.c | |||
@@ -24,6 +24,8 @@ | |||
24 | #include <asm/pgtable.h> | 24 | #include <asm/pgtable.h> |
25 | #include <asm/ppcboot.h> | 25 | #include <asm/ppcboot.h> |
26 | 26 | ||
27 | #include <syslib/mpc52xx_pci.h> | ||
28 | |||
27 | extern bd_t __res; | 29 | extern bd_t __res; |
28 | 30 | ||
29 | static int core_mult[] = { /* CPU Frequency multiplier, taken */ | 31 | static int core_mult[] = { /* CPU Frequency multiplier, taken */ |
@@ -216,6 +218,52 @@ mpc52xx_calibrate_decr(void) | |||
216 | tb_to_us = mulhwu_scale_factor(xlbfreq / divisor, 1000000); | 218 | tb_to_us = mulhwu_scale_factor(xlbfreq / divisor, 1000000); |
217 | } | 219 | } |
218 | 220 | ||
221 | |||
222 | void __init | ||
223 | mpc52xx_setup_cpu(void) | ||
224 | { | ||
225 | struct mpc52xx_cdm __iomem *cdm; | ||
226 | struct mpc52xx_xlb __iomem *xlb; | ||
227 | |||
228 | /* Map zones */ | ||
229 | cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE); | ||
230 | xlb = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE); | ||
231 | |||
232 | if (!cdm || !xlb) { | ||
233 | printk(KERN_ERR __FILE__ ": " | ||
234 | "Error while mapping CDM/XLB during " | ||
235 | "mpc52xx_setup_cpu\n"); | ||
236 | goto unmap_regs; | ||
237 | } | ||
238 | |||
239 | /* Use internal 48 Mhz */ | ||
240 | out_8(&cdm->ext_48mhz_en, 0x00); | ||
241 | out_8(&cdm->fd_enable, 0x01); | ||
242 | if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */ | ||
243 | out_be16(&cdm->fd_counters, 0x0001); | ||
244 | else | ||
245 | out_be16(&cdm->fd_counters, 0x5555); | ||
246 | |||
247 | /* Configure the XLB Arbiter priorities */ | ||
248 | out_be32(&xlb->master_pri_enable, 0xff); | ||
249 | out_be32(&xlb->master_priority, 0x11111111); | ||
250 | |||
251 | /* Enable ram snooping for 1GB window */ | ||
252 | out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP); | ||
253 | out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d); | ||
254 | |||
255 | /* Disable XLB pipelining */ | ||
256 | /* (cfr errate 292. We could do this only just before ATA PIO | ||
257 | transaction and re-enable it after ...) */ | ||
258 | out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); | ||
259 | |||
260 | /* Unmap reg zone */ | ||
261 | unmap_regs: | ||
262 | if (cdm) iounmap(cdm); | ||
263 | if (xlb) iounmap(xlb); | ||
264 | } | ||
265 | |||
266 | |||
219 | int mpc52xx_match_psc_function(int psc_idx, const char *func) | 267 | int mpc52xx_match_psc_function(int psc_idx, const char *func) |
220 | { | 268 | { |
221 | struct mpc52xx_psc_func *cf = mpc52xx_psc_functions; | 269 | struct mpc52xx_psc_func *cf = mpc52xx_psc_functions; |