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authorKumar Gala <galak@freescale.com>2005-09-03 18:55:34 -0400
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-05 03:05:56 -0400
commit8e8fff09756bdb799154d034c63033192d6f8f89 (patch)
treedb3dcdb7f7a98d983c117a0ad80941fad90df318 /arch/ppc/syslib/pq2_sys.c
parenta2f40ccd294d14e5aca464c1913e8e0d8de35fca (diff)
[PATCH] ppc32: Add ppc_sys descriptions for PowerQUICC II devices
Added ppc_sys device and system definitions for PowerQUICC II devices. This will allow drivers for PQ2 to be proper platform device drivers. Which can be shared on PQ3 processors with the same peripherals. Signed-off-by: Matt McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/syslib/pq2_sys.c')
-rw-r--r--arch/ppc/syslib/pq2_sys.c200
1 files changed, 200 insertions, 0 deletions
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c
new file mode 100644
index 000000000000..7b6c9ebdb9e3
--- /dev/null
+++ b/arch/ppc/syslib/pq2_sys.c
@@ -0,0 +1,200 @@
1/*
2 * arch/ppc/syslib/pq2_devices.c
3 *
4 * PQ2 System descriptions
5 *
6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/device.h>
16
17#include <asm/ppc_sys.h>
18
19struct ppc_sys_spec *cur_ppc_sys_spec;
20struct ppc_sys_spec ppc_sys_specs[] = {
21 /* below is a list of the 8260 family of processors */
22 {
23 .ppc_sys_name = "8250",
24 .mask = 0x0000ff00,
25 .value = 0x00000000,
26 .num_devices = 12,
27 .device_list = (enum ppc_sys_devices[])
28 {
29 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
30 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
31 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
32 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
33 }
34 },
35 {
36 .ppc_sys_name = "8255",
37 .mask = 0x0000ff00,
38 .value = 0x00000000,
39 .num_devices = 11,
40 .device_list = (enum ppc_sys_devices[])
41 {
42 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
43 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
44 MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2,
45 MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
46 }
47 },
48 {
49 .ppc_sys_name = "8260",
50 .mask = 0x0000ff00,
51 .value = 0x00000000,
52 .num_devices = 12,
53 .device_list = (enum ppc_sys_devices[])
54 {
55 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
56 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
57 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
58 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
59 }
60 },
61 {
62 .ppc_sys_name = "8264",
63 .mask = 0x0000ff00,
64 .value = 0x00000000,
65 .num_devices = 12,
66 .device_list = (enum ppc_sys_devices[])
67 {
68 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
69 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
70 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
71 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
72 }
73 },
74 {
75 .ppc_sys_name = "8265",
76 .mask = 0x0000ff00,
77 .value = 0x00000000,
78 .num_devices = 12,
79 .device_list = (enum ppc_sys_devices[])
80 {
81 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
82 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
83 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
84 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
85 }
86 },
87 {
88 .ppc_sys_name = "8266",
89 .mask = 0x0000ff00,
90 .value = 0x00000000,
91 .num_devices = 12,
92 .device_list = (enum ppc_sys_devices[])
93 {
94 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
95 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
96 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
97 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
98 }
99 },
100 /* below is a list of the 8272 family of processors */
101 {
102 .ppc_sys_name = "8247",
103 .mask = 0x0000ff00,
104 .value = 0x00000d00,
105 .num_devices = 10,
106 .device_list = (enum ppc_sys_devices[])
107 {
108 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
109 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
110 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
111 MPC82xx_CPM_USB,
112 },
113 },
114 {
115 .ppc_sys_name = "8248",
116 .mask = 0x0000ff00,
117 .value = 0x00000c00,
118 .num_devices = 11,
119 .device_list = (enum ppc_sys_devices[])
120 {
121 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
122 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
123 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
124 MPC82xx_CPM_USB, MPC82xx_SEC1,
125 },
126 },
127 {
128 .ppc_sys_name = "8271",
129 .mask = 0x0000ff00,
130 .value = 0x00000d00,
131 .num_devices = 10,
132 .device_list = (enum ppc_sys_devices[])
133 {
134 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
135 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
136 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
137 MPC82xx_CPM_USB,
138 },
139 },
140 {
141 .ppc_sys_name = "8272",
142 .mask = 0x0000ff00,
143 .value = 0x00000c00,
144 .num_devices = 11,
145 .device_list = (enum ppc_sys_devices[])
146 {
147 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
148 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
149 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
150 MPC82xx_CPM_USB, MPC82xx_SEC1,
151 },
152 },
153 /* below is a list of the 8280 family of processors */
154 {
155 .ppc_sys_name = "8270",
156 .mask = 0x0000ff00,
157 .value = 0x00000a00,
158 .num_devices = 12,
159 .device_list = (enum ppc_sys_devices[])
160 {
161 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
162 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
163 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
164 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
165 },
166 },
167 {
168 .ppc_sys_name = "8275",
169 .mask = 0x0000ff00,
170 .value = 0x00000a00,
171 .num_devices = 12,
172 .device_list = (enum ppc_sys_devices[])
173 {
174 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
175 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
176 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1,
177 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
178 },
179 },
180 {
181 .ppc_sys_name = "8280",
182 .mask = 0x0000ff00,
183 .value = 0x00000a00,
184 .num_devices = 13,
185 .device_list = (enum ppc_sys_devices[])
186 {
187 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
188 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
189 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
190 MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
191 MPC82xx_CPM_I2C,
192 },
193 },
194 {
195 /* default match */
196 .ppc_sys_name = "",
197 .mask = 0x00000000,
198 .value = 0x00000000,
199 },
200};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-18 07:39:21 -0500