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authorJames Bottomley <jejb@mulgrave.il.steeleye.com>2007-05-31 00:57:05 -0400
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2007-05-31 00:57:05 -0400
commit5bc65793cbf8da0d35f19ef025dda22887e79e80 (patch)
tree8291998abd73055de6f487fafa174ee2a5d3afee /arch/ppc/syslib/pq2_sys.c
parent6edae708bf77e012d855a7e2c7766f211d234f4f (diff)
parent3f0a6766e0cc5a577805732e5adb50a585c58175 (diff)
[SCSI] Merge up to linux-2.6 head
Conflicts: drivers/scsi/jazz_esp.c Same changes made by both SCSI and SPARC trees: problem with UTF-8 conversion in the copyright. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Diffstat (limited to 'arch/ppc/syslib/pq2_sys.c')
-rw-r--r--arch/ppc/syslib/pq2_sys.c36
1 files changed, 20 insertions, 16 deletions
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c
index f52600c0db20..9c85300846c7 100644
--- a/arch/ppc/syslib/pq2_sys.c
+++ b/arch/ppc/syslib/pq2_sys.c
@@ -26,7 +26,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
26 { 26 {
27 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, 27 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
28 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, 28 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
29 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, 29 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1,
30 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, 30 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
31 } 31 }
32 }, 32 },
@@ -39,7 +39,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
39 { 39 {
40 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, 40 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
41 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4, 41 MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
42 MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, 42 MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2,
43 MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, 43 MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
44 } 44 }
45 }, 45 },
@@ -47,52 +47,56 @@ struct ppc_sys_spec ppc_sys_specs[] = {
47 .ppc_sys_name = "8260", 47 .ppc_sys_name = "8260",
48 .mask = 0x0000ff00, 48 .mask = 0x0000ff00,
49 .value = 0x00000000, 49 .value = 0x00000000,
50 .num_devices = 12, 50 .num_devices = 13,
51 .device_list = (enum ppc_sys_devices[]) 51 .device_list = (enum ppc_sys_devices[])
52 { 52 {
53 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, 53 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
54 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, 54 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
55 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, 55 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
56 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, 56 MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
57 MPC82xx_CPM_I2C,
57 } 58 }
58 }, 59 },
59 { 60 {
60 .ppc_sys_name = "8264", 61 .ppc_sys_name = "8264",
61 .mask = 0x0000ff00, 62 .mask = 0x0000ff00,
62 .value = 0x00000000, 63 .value = 0x00000000,
63 .num_devices = 12, 64 .num_devices = 13,
64 .device_list = (enum ppc_sys_devices[]) 65 .device_list = (enum ppc_sys_devices[])
65 { 66 {
66 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, 67 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
67 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, 68 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
68 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, 69 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
69 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, 70 MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
71 MPC82xx_CPM_I2C,
70 } 72 }
71 }, 73 },
72 { 74 {
73 .ppc_sys_name = "8265", 75 .ppc_sys_name = "8265",
74 .mask = 0x0000ff00, 76 .mask = 0x0000ff00,
75 .value = 0x00000000, 77 .value = 0x00000000,
76 .num_devices = 12, 78 .num_devices = 13,
77 .device_list = (enum ppc_sys_devices[]) 79 .device_list = (enum ppc_sys_devices[])
78 { 80 {
79 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, 81 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
80 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, 82 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
81 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, 83 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
82 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, 84 MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
85 MPC82xx_CPM_I2C,
83 } 86 }
84 }, 87 },
85 { 88 {
86 .ppc_sys_name = "8266", 89 .ppc_sys_name = "8266",
87 .mask = 0x0000ff00, 90 .mask = 0x0000ff00,
88 .value = 0x00000000, 91 .value = 0x00000000,
89 .num_devices = 12, 92 .num_devices = 13,
90 .device_list = (enum ppc_sys_devices[]) 93 .device_list = (enum ppc_sys_devices[])
91 { 94 {
92 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, 95 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
93 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, 96 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
94 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, 97 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
95 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, 98 MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
99 MPC82xx_CPM_I2C,
96 } 100 }
97 }, 101 },
98 /* below is a list of the 8272 family of processors */ 102 /* below is a list of the 8272 family of processors */
@@ -159,7 +163,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
159 { 163 {
160 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, 164 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
161 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, 165 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
162 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, 166 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1,
163 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, 167 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
164 }, 168 },
165 }, 169 },
@@ -172,7 +176,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
172 { 176 {
173 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, 177 MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
174 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, 178 MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
175 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_SMC1, 179 MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1,
176 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, 180 MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
177 }, 181 },
178 }, 182 },
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 15:25:23 -0500