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authorMarcelo Tosatti <marcelo.tosatti@cyclades.com>2005-11-24 08:32:09 -0500
committerPaul Mackerras <paulus@samba.org>2006-01-08 22:50:51 -0500
commitfb64c2446b20bf0206a690e9e1df88b25ac421e6 (patch)
tree53d6e17957d29d881f8cff83ed952b4229d811bd /arch/ppc/syslib/m8xx_setup.c
parent623703f620453c798b6fa3eb79ad8ea27bfd302a (diff)
[PATCH] ppc32: m8xx watchdog update
This updates m8xx_wdt as follows: 1) Remove now obsolete fpos check in the write() function. The driver is currently non functional due to this bug. 2) Use in/out macros for register access. 3) Allows m8xx_wdt to use a kernel timer instead of the builtin RTC/PIT for keep-alive trigger (which is responsible for servicing the watchdog until an userspace application takes over). For instance Cyclades PRxK boards (MPC 855T based) have a non-functional internal RTC/PIT unit. Behaviour for boards with RTC/PIT is unchaged. 4) The last change required moving the RTCSC register setting code to a weak function which can be overriden by board specific files. Otherwise the timer init code trashes the register making it impossible for m8xx_wdt to detect the situation. Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/syslib/m8xx_setup.c')
-rw-r--r--arch/ppc/syslib/m8xx_setup.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c
index 1cc3abe6fa43..688616de3cde 100644
--- a/arch/ppc/syslib/m8xx_setup.c
+++ b/arch/ppc/syslib/m8xx_setup.c
@@ -135,6 +135,16 @@ static struct irqaction tbint_irqaction = {
135 .name = "tbint", 135 .name = "tbint",
136}; 136};
137 137
138/* per-board overridable init_internal_rtc() function. */
139void __init __attribute__ ((weak))
140init_internal_rtc(void)
141{
142 /* Disable the RTC one second and alarm interrupts. */
143 out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE));
144 /* Enable the RTC */
145 out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE));
146}
147
138/* The decrementer counts at the system (internal) clock frequency divided by 148/* The decrementer counts at the system (internal) clock frequency divided by
139 * sixteen, or external oscillator divided by four. We force the processor 149 * sixteen, or external oscillator divided by four. We force the processor
140 * to use system clock divided by sixteen. 150 * to use system clock divided by sixteen.
@@ -183,10 +193,7 @@ void __init m8xx_calibrate_decr(void)
183 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, KAPWR_KEY); 193 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, KAPWR_KEY);
184 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, KAPWR_KEY); 194 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, KAPWR_KEY);
185 195
186 /* Disable the RTC one second and alarm interrupts. */ 196 init_internal_rtc();
187 out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE));
188 /* Enable the RTC */
189 out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE));
190 197
191 /* Enabling the decrementer also enables the timebase interrupts 198 /* Enabling the decrementer also enables the timebase interrupts
192 * (or from the other point of view, to get decrementer interrupts 199 * (or from the other point of view, to get decrementer interrupts