diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/ppc/syslib/ipic.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'arch/ppc/syslib/ipic.h')
-rw-r--r-- | arch/ppc/syslib/ipic.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/ppc/syslib/ipic.h b/arch/ppc/syslib/ipic.h new file mode 100644 index 000000000000..2b56a4fcf373 --- /dev/null +++ b/arch/ppc/syslib/ipic.h | |||
@@ -0,0 +1,49 @@ | |||
1 | /* | ||
2 | * arch/ppc/kernel/ipic.h | ||
3 | * | ||
4 | * IPIC private definitions and structure. | ||
5 | * | ||
6 | * Maintainer: Kumar Gala <kumar.gala@freescale.com> | ||
7 | * | ||
8 | * Copyright 2005 Freescale Semiconductor, Inc | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | #ifndef __IPIC_H__ | ||
16 | #define __IPIC_H__ | ||
17 | |||
18 | #include <asm/ipic.h> | ||
19 | |||
20 | #define MPC83xx_IPIC_SIZE (0x00100) | ||
21 | |||
22 | /* System Global Interrupt Configuration Register */ | ||
23 | #define SICFR_IPSA 0x00010000 | ||
24 | #define SICFR_IPSD 0x00080000 | ||
25 | #define SICFR_MPSA 0x00200000 | ||
26 | #define SICFR_MPSB 0x00400000 | ||
27 | |||
28 | /* System External Interrupt Mask Register */ | ||
29 | #define SEMSR_SIRQ0 0x00008000 | ||
30 | |||
31 | /* System Error Control Register */ | ||
32 | #define SERCR_MCPR 0x00000001 | ||
33 | |||
34 | struct ipic { | ||
35 | volatile u32 __iomem *regs; | ||
36 | unsigned int irq_offset; | ||
37 | }; | ||
38 | |||
39 | struct ipic_info { | ||
40 | u8 pend; /* pending register offset from base */ | ||
41 | u8 mask; /* mask register offset from base */ | ||
42 | u8 prio; /* priority register offset from base */ | ||
43 | u8 force; /* force register offset from base */ | ||
44 | u8 bit; /* register bit position (as per doc) | ||
45 | bit mask = 1 << (31 - bit) */ | ||
46 | u8 prio_mask; /* priority mask value */ | ||
47 | }; | ||
48 | |||
49 | #endif /* __IPIC_H__ */ | ||