diff options
author | Andy Fleming <afleming@freescale.com> | 2005-10-28 20:46:27 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2005-10-29 00:42:28 -0400 |
commit | b37665e0ba1d3f05697bfae249b09a2e9cc95132 (patch) | |
tree | 22c80609e3254524038d5b690f1f886b0987f58d /arch/ppc/platforms | |
parent | dd03d25fac90ee6f394874fb4e6995866304e4ba (diff) |
[PATCH] ppc32: 85xx PHY Platform Update
This patch updates the 85xx platform code to support the new PHY Layer.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <Kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/platforms')
-rw-r--r-- | arch/ppc/platforms/85xx/mpc8540_ads.c | 30 | ||||
-rw-r--r-- | arch/ppc/platforms/85xx/mpc8560_ads.c | 25 | ||||
-rw-r--r-- | arch/ppc/platforms/85xx/mpc85xx_cds_common.c | 34 | ||||
-rw-r--r-- | arch/ppc/platforms/85xx/sbc8560.c | 22 | ||||
-rw-r--r-- | arch/ppc/platforms/85xx/stx_gp3.c | 21 |
5 files changed, 81 insertions, 51 deletions
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c index 7dc8a68acfd0..7e952c1228cb 100644 --- a/arch/ppc/platforms/85xx/mpc8540_ads.c +++ b/arch/ppc/platforms/85xx/mpc8540_ads.c | |||
@@ -52,6 +52,10 @@ | |||
52 | 52 | ||
53 | #include <syslib/ppc85xx_setup.h> | 53 | #include <syslib/ppc85xx_setup.h> |
54 | 54 | ||
55 | static const char *GFAR_PHY_0 = "phy0:0"; | ||
56 | static const char *GFAR_PHY_1 = "phy0:1"; | ||
57 | static const char *GFAR_PHY_3 = "phy0:3"; | ||
58 | |||
55 | /* ************************************************************************ | 59 | /* ************************************************************************ |
56 | * | 60 | * |
57 | * Setup the architecture | 61 | * Setup the architecture |
@@ -63,6 +67,7 @@ mpc8540ads_setup_arch(void) | |||
63 | bd_t *binfo = (bd_t *) __res; | 67 | bd_t *binfo = (bd_t *) __res; |
64 | unsigned int freq; | 68 | unsigned int freq; |
65 | struct gianfar_platform_data *pdata; | 69 | struct gianfar_platform_data *pdata; |
70 | struct gianfar_mdio_data *mdata; | ||
66 | 71 | ||
67 | /* get the core frequency */ | 72 | /* get the core frequency */ |
68 | freq = binfo->bi_intfreq; | 73 | freq = binfo->bi_intfreq; |
@@ -89,34 +94,35 @@ mpc8540ads_setup_arch(void) | |||
89 | invalidate_tlbcam_entry(num_tlbcam_entries - 1); | 94 | invalidate_tlbcam_entry(num_tlbcam_entries - 1); |
90 | #endif | 95 | #endif |
91 | 96 | ||
97 | /* setup the board related info for the MDIO bus */ | ||
98 | mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO); | ||
99 | |||
100 | mdata->irq[0] = MPC85xx_IRQ_EXT5; | ||
101 | mdata->irq[1] = MPC85xx_IRQ_EXT5; | ||
102 | mdata->irq[2] = -1; | ||
103 | mdata->irq[3] = MPC85xx_IRQ_EXT5; | ||
104 | mdata->irq[31] = -1; | ||
105 | mdata->paddr += binfo->bi_immr_base; | ||
106 | |||
92 | /* setup the board related information for the enet controllers */ | 107 | /* setup the board related information for the enet controllers */ |
93 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 108 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
94 | if (pdata) { | 109 | if (pdata) { |
95 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 110 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
96 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 111 | pdata->bus_id = GFAR_PHY_0; |
97 | pdata->phyid = 0; | ||
98 | /* fixup phy address */ | ||
99 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
100 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 112 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
101 | } | 113 | } |
102 | 114 | ||
103 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 115 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
104 | if (pdata) { | 116 | if (pdata) { |
105 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 117 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
106 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 118 | pdata->bus_id = GFAR_PHY_1; |
107 | pdata->phyid = 1; | ||
108 | /* fixup phy address */ | ||
109 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
110 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 119 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
111 | } | 120 | } |
112 | 121 | ||
113 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); | 122 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); |
114 | if (pdata) { | 123 | if (pdata) { |
115 | pdata->board_flags = 0; | 124 | pdata->board_flags = 0; |
116 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 125 | pdata->bus_id = GFAR_PHY_3; |
117 | pdata->phyid = 3; | ||
118 | /* fixup phy address */ | ||
119 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
120 | memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); | 126 | memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); |
121 | } | 127 | } |
122 | 128 | ||
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c index 8841fd7da6ee..208433f1e93a 100644 --- a/arch/ppc/platforms/85xx/mpc8560_ads.c +++ b/arch/ppc/platforms/85xx/mpc8560_ads.c | |||
@@ -56,6 +56,10 @@ | |||
56 | #include <syslib/ppc85xx_setup.h> | 56 | #include <syslib/ppc85xx_setup.h> |
57 | 57 | ||
58 | 58 | ||
59 | static const char *GFAR_PHY_0 = "phy0:0"; | ||
60 | static const char *GFAR_PHY_1 = "phy0:1"; | ||
61 | static const char *GFAR_PHY_3 = "phy0:3"; | ||
62 | |||
59 | /* ************************************************************************ | 63 | /* ************************************************************************ |
60 | * | 64 | * |
61 | * Setup the architecture | 65 | * Setup the architecture |
@@ -68,6 +72,7 @@ mpc8560ads_setup_arch(void) | |||
68 | bd_t *binfo = (bd_t *) __res; | 72 | bd_t *binfo = (bd_t *) __res; |
69 | unsigned int freq; | 73 | unsigned int freq; |
70 | struct gianfar_platform_data *pdata; | 74 | struct gianfar_platform_data *pdata; |
75 | struct gianfar_mdio_data *mdata; | ||
71 | 76 | ||
72 | cpm2_reset(); | 77 | cpm2_reset(); |
73 | 78 | ||
@@ -86,24 +91,28 @@ mpc8560ads_setup_arch(void) | |||
86 | mpc85xx_setup_hose(); | 91 | mpc85xx_setup_hose(); |
87 | #endif | 92 | #endif |
88 | 93 | ||
94 | /* setup the board related info for the MDIO bus */ | ||
95 | mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO); | ||
96 | |||
97 | mdata->irq[0] = MPC85xx_IRQ_EXT5; | ||
98 | mdata->irq[1] = MPC85xx_IRQ_EXT5; | ||
99 | mdata->irq[2] = -1; | ||
100 | mdata->irq[3] = MPC85xx_IRQ_EXT5; | ||
101 | mdata->irq[31] = -1; | ||
102 | mdata->paddr += binfo->bi_immr_base; | ||
103 | |||
89 | /* setup the board related information for the enet controllers */ | 104 | /* setup the board related information for the enet controllers */ |
90 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 105 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
91 | if (pdata) { | 106 | if (pdata) { |
92 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 107 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
93 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 108 | pdata->bus_id = GFAR_PHY_0; |
94 | pdata->phyid = 0; | ||
95 | /* fixup phy address */ | ||
96 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
97 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 109 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
98 | } | 110 | } |
99 | 111 | ||
100 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 112 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
101 | if (pdata) { | 113 | if (pdata) { |
102 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 114 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
103 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 115 | pdata->bus_id = GFAR_PHY_1; |
104 | pdata->phyid = 1; | ||
105 | /* fixup phy address */ | ||
106 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
107 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 116 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
108 | } | 117 | } |
109 | 118 | ||
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c index eda659916f24..a21156967a5e 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c +++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c | |||
@@ -391,6 +391,9 @@ mpc85xx_cds_pcibios_fixup(void) | |||
391 | 391 | ||
392 | TODC_ALLOC(); | 392 | TODC_ALLOC(); |
393 | 393 | ||
394 | static const char *GFAR_PHY_0 = "phy0:0"; | ||
395 | static const char *GFAR_PHY_1 = "phy0:1"; | ||
396 | |||
394 | /* ************************************************************************ | 397 | /* ************************************************************************ |
395 | * | 398 | * |
396 | * Setup the architecture | 399 | * Setup the architecture |
@@ -402,6 +405,7 @@ mpc85xx_cds_setup_arch(void) | |||
402 | bd_t *binfo = (bd_t *) __res; | 405 | bd_t *binfo = (bd_t *) __res; |
403 | unsigned int freq; | 406 | unsigned int freq; |
404 | struct gianfar_platform_data *pdata; | 407 | struct gianfar_platform_data *pdata; |
408 | struct gianfar_mdio_data *mdata; | ||
405 | 409 | ||
406 | /* get the core frequency */ | 410 | /* get the core frequency */ |
407 | freq = binfo->bi_intfreq; | 411 | freq = binfo->bi_intfreq; |
@@ -445,44 +449,42 @@ mpc85xx_cds_setup_arch(void) | |||
445 | invalidate_tlbcam_entry(num_tlbcam_entries - 1); | 449 | invalidate_tlbcam_entry(num_tlbcam_entries - 1); |
446 | #endif | 450 | #endif |
447 | 451 | ||
452 | /* setup the board related info for the MDIO bus */ | ||
453 | mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO); | ||
454 | |||
455 | mdata->irq[0] = MPC85xx_IRQ_EXT5; | ||
456 | mdata->irq[1] = MPC85xx_IRQ_EXT5; | ||
457 | mdata->irq[2] = -1; | ||
458 | mdata->irq[3] = -1; | ||
459 | mdata->irq[31] = -1; | ||
460 | mdata->paddr += binfo->bi_immr_base; | ||
461 | |||
448 | /* setup the board related information for the enet controllers */ | 462 | /* setup the board related information for the enet controllers */ |
449 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 463 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
450 | if (pdata) { | 464 | if (pdata) { |
451 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 465 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
452 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 466 | pdata->bus_id = GFAR_PHY_0; |
453 | pdata->phyid = 0; | ||
454 | /* fixup phy address */ | ||
455 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
456 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 467 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
457 | } | 468 | } |
458 | 469 | ||
459 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 470 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
460 | if (pdata) { | 471 | if (pdata) { |
461 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 472 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
462 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 473 | pdata->bus_id = GFAR_PHY_1; |
463 | pdata->phyid = 1; | ||
464 | /* fixup phy address */ | ||
465 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
466 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 474 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
467 | } | 475 | } |
468 | 476 | ||
469 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1); | 477 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1); |
470 | if (pdata) { | 478 | if (pdata) { |
471 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 479 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
472 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 480 | pdata->bus_id = GFAR_PHY_0; |
473 | pdata->phyid = 0; | ||
474 | /* fixup phy address */ | ||
475 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
476 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 481 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
477 | } | 482 | } |
478 | 483 | ||
479 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2); | 484 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2); |
480 | if (pdata) { | 485 | if (pdata) { |
481 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 486 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
482 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 487 | pdata->bus_id = GFAR_PHY_1; |
483 | pdata->phyid = 1; | ||
484 | /* fixup phy address */ | ||
485 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
486 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 488 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
487 | } | 489 | } |
488 | 490 | ||
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c index c76760a781c1..b4ee1707a836 100644 --- a/arch/ppc/platforms/85xx/sbc8560.c +++ b/arch/ppc/platforms/85xx/sbc8560.c | |||
@@ -91,6 +91,9 @@ sbc8560_early_serial_map(void) | |||
91 | } | 91 | } |
92 | #endif | 92 | #endif |
93 | 93 | ||
94 | static const char *GFAR_PHY_25 = "phy0:25"; | ||
95 | static const char *GFAR_PHY_26 = "phy0:26"; | ||
96 | |||
94 | /* ************************************************************************ | 97 | /* ************************************************************************ |
95 | * | 98 | * |
96 | * Setup the architecture | 99 | * Setup the architecture |
@@ -102,6 +105,7 @@ sbc8560_setup_arch(void) | |||
102 | bd_t *binfo = (bd_t *) __res; | 105 | bd_t *binfo = (bd_t *) __res; |
103 | unsigned int freq; | 106 | unsigned int freq; |
104 | struct gianfar_platform_data *pdata; | 107 | struct gianfar_platform_data *pdata; |
108 | struct gianfar_mdio_data *mdata; | ||
105 | 109 | ||
106 | /* get the core frequency */ | 110 | /* get the core frequency */ |
107 | freq = binfo->bi_intfreq; | 111 | freq = binfo->bi_intfreq; |
@@ -126,24 +130,26 @@ sbc8560_setup_arch(void) | |||
126 | invalidate_tlbcam_entry(num_tlbcam_entries - 1); | 130 | invalidate_tlbcam_entry(num_tlbcam_entries - 1); |
127 | #endif | 131 | #endif |
128 | 132 | ||
133 | /* setup the board related info for the MDIO bus */ | ||
134 | mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO); | ||
135 | |||
136 | mdata->irq[25] = MPC85xx_IRQ_EXT6; | ||
137 | mdata->irq[26] = MPC85xx_IRQ_EXT7; | ||
138 | mdata->irq[31] = -1; | ||
139 | mdata->paddr += binfo->bi_immr_base; | ||
140 | |||
129 | /* setup the board related information for the enet controllers */ | 141 | /* setup the board related information for the enet controllers */ |
130 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 142 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
131 | if (pdata) { | 143 | if (pdata) { |
132 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 144 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
133 | pdata->interruptPHY = MPC85xx_IRQ_EXT6; | 145 | pdata->bus_id = GFAR_PHY_25; |
134 | pdata->phyid = 25; | ||
135 | /* fixup phy address */ | ||
136 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
137 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 146 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
138 | } | 147 | } |
139 | 148 | ||
140 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 149 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
141 | if (pdata) { | 150 | if (pdata) { |
142 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; | 151 | pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; |
143 | pdata->interruptPHY = MPC85xx_IRQ_EXT7; | 152 | pdata->bus_id = GFAR_PHY_26; |
144 | pdata->phyid = 26; | ||
145 | /* fixup phy address */ | ||
146 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
147 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 153 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
148 | } | 154 | } |
149 | 155 | ||
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c index 20940f4044f4..1e1b85f8193a 100644 --- a/arch/ppc/platforms/85xx/stx_gp3.c +++ b/arch/ppc/platforms/85xx/stx_gp3.c | |||
@@ -91,6 +91,9 @@ static u8 gp3_openpic_initsenses[] __initdata = { | |||
91 | 0x0, /* External 11: */ | 91 | 0x0, /* External 11: */ |
92 | }; | 92 | }; |
93 | 93 | ||
94 | static const char *GFAR_PHY_2 = "phy0:2"; | ||
95 | static const char *GFAR_PHY_4 = "phy0:4"; | ||
96 | |||
94 | /* | 97 | /* |
95 | * Setup the architecture | 98 | * Setup the architecture |
96 | */ | 99 | */ |
@@ -100,6 +103,7 @@ gp3_setup_arch(void) | |||
100 | bd_t *binfo = (bd_t *) __res; | 103 | bd_t *binfo = (bd_t *) __res; |
101 | unsigned int freq; | 104 | unsigned int freq; |
102 | struct gianfar_platform_data *pdata; | 105 | struct gianfar_platform_data *pdata; |
106 | struct gianfar_mdio_data *mdata; | ||
103 | 107 | ||
104 | cpm2_reset(); | 108 | cpm2_reset(); |
105 | 109 | ||
@@ -118,23 +122,26 @@ gp3_setup_arch(void) | |||
118 | mpc85xx_setup_hose(); | 122 | mpc85xx_setup_hose(); |
119 | #endif | 123 | #endif |
120 | 124 | ||
125 | /* setup the board related info for the MDIO bus */ | ||
126 | mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO); | ||
127 | |||
128 | mdata->irq[2] = MPC85xx_IRQ_EXT5; | ||
129 | mdata->irq[4] = MPC85xx_IRQ_EXT5; | ||
130 | mdata->irq[31] = -1; | ||
131 | mdata->paddr += binfo->bi_immr_base; | ||
132 | |||
121 | /* setup the board related information for the enet controllers */ | 133 | /* setup the board related information for the enet controllers */ |
122 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); | 134 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); |
123 | if (pdata) { | 135 | if (pdata) { |
124 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ | 136 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ |
125 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 137 | pdata->bus_id = GFAR_PHY_2; |
126 | pdata->phyid = 2; | ||
127 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
128 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); | 138 | memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); |
129 | } | 139 | } |
130 | 140 | ||
131 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); | 141 | pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); |
132 | if (pdata) { | 142 | if (pdata) { |
133 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ | 143 | /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ |
134 | pdata->interruptPHY = MPC85xx_IRQ_EXT5; | 144 | pdata->bus_id = GFAR_PHY_4; |
135 | pdata->phyid = 4; | ||
136 | /* fixup phy address */ | ||
137 | pdata->phy_reg_addr += binfo->bi_immr_base; | ||
138 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 145 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
139 | } | 146 | } |
140 | 147 | ||