diff options
| author | Chris Elston <chris.elston@radstone.co.uk> | 2005-05-01 11:58:40 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-05-01 11:58:40 -0400 |
| commit | 630710e3f72b6a324a525f6e5db3f7985d0fc4a2 (patch) | |
| tree | 9088f17473108acb611b80b03f417e0591e1313d /arch/ppc/platforms/radstone_ppc7d.h | |
| parent | 443a848cd30eb5bb5c1038e6371d83404775dcfc (diff) | |
[PATCH] ppc32: fix for misreported SDRAM size on Radstone PPC7D platform
This patch fixes the SDRAM output from /proc/cpuinfo. The previous code
assumed that there was only one bank of SDRAM, and that the size in the memory
configuration register was the total size.
Signed-off-by: Chris Elston <chris.elston@radstone.co.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/platforms/radstone_ppc7d.h')
| -rw-r--r-- | arch/ppc/platforms/radstone_ppc7d.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/ppc/platforms/radstone_ppc7d.h b/arch/ppc/platforms/radstone_ppc7d.h index 4546fff2b0c3..938375510be4 100644 --- a/arch/ppc/platforms/radstone_ppc7d.h +++ b/arch/ppc/platforms/radstone_ppc7d.h | |||
| @@ -240,6 +240,7 @@ | |||
| 240 | #define PPC7D_CPLD_FLASH_CNTL 0x086E | 240 | #define PPC7D_CPLD_FLASH_CNTL 0x086E |
| 241 | 241 | ||
| 242 | /* MEMORY_CONFIG_EXTEND */ | 242 | /* MEMORY_CONFIG_EXTEND */ |
| 243 | #define PPC7D_CPLD_SDRAM_BANK_NUM_MASK 0x02 | ||
| 243 | #define PPC7D_CPLD_SDRAM_BANK_SIZE_MASK 0xc0 | 244 | #define PPC7D_CPLD_SDRAM_BANK_SIZE_MASK 0xc0 |
| 244 | #define PPC7D_CPLD_SDRAM_BANK_SIZE_128M 0 | 245 | #define PPC7D_CPLD_SDRAM_BANK_SIZE_128M 0 |
| 245 | #define PPC7D_CPLD_SDRAM_BANK_SIZE_256M 0x40 | 246 | #define PPC7D_CPLD_SDRAM_BANK_SIZE_256M 0x40 |