ppc32: use L1_CACHE_SHIFT/L1_CACHE_BYTES

instead of L1_CACHE_LINE_SIZE and LG_L1_CACHE_LINE_SIZE

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
index 3eb611e23f69..a301c5ac58dd 100644
--- a/arch/ppc/platforms/katana.c
+++ b/arch/ppc/platforms/katana.c
@@ -521,7 +521,7 @@ katana_fixup_resources(struct pci_dev *dev)
 {
         u16     v16;
 
-        pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_LINE_SIZE>>2);
+        pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES>>2);
 
         pci_read_config_word(dev, PCI_COMMAND, &v16);
         v16 |= PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK;