[PATCH] ppc32: add 440ep support

Add PPC440EP core support.  PPC440EP is a PPC440-based SoC with a classic PPC
FPU and another set of peripherals.

Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

4 files changed, 316 insertions, 2 deletions

diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig
index a0612a86455a..f7c045764e04 100644
--- a/arch/ppc/platforms/4xx/Kconfig
+++ b/arch/ppc/platforms/4xx/Kconfig
@@ -68,6 +68,11 @@ choice
         depends on 44x
         default EBONY
 
+config BAMBOO
+        bool "Bamboo"
+        help
+          This option enables support for the IBM PPC440EP evaluation board.
+
 config EBONY
         bool "Ebony"
         help
@@ -98,6 +103,12 @@ config NP405H
         depends on ASH
         default y
 
+config 440EP
+        bool
+        depends on BAMBOO
+        select PPC_FPU
+        default y
+
 config 440GP
         bool
         depends on EBONY
@@ -115,7 +126,7 @@ config 440SP
 
 config 440
         bool
-        depends on 440GP || 440SP
+        depends on 440GP || 440SP || 440EP
         default y
 
 config 440A
@@ -123,6 +134,11 @@ config 440A
         depends on 440GX
         default y
 
+config IBM440EP_ERR42
+        bool
+        depends on 440EP
+        default y
+
 # All 405-based cores up until the 405GPR and 405EP have this errata.
 config IBM405_ERR77
         bool
@@ -142,7 +158,7 @@ config BOOKE
 
 config IBM_OCP
         bool
-        depends on ASH || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
+        depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
         default y
 
 config XILINX_OCP
diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile
index ea470c6adbb6..844c3b5066e8 100644
--- a/arch/ppc/platforms/4xx/Makefile
+++ b/arch/ppc/platforms/4xx/Makefile
@@ -2,6 +2,7 @@
 # Makefile for the PowerPC 4xx linux kernel.
 
 obj-$(CONFIG_ASH)               += ash.o
+obj-$(CONFIG_BAMBOO)            += bamboo.o
 obj-$(CONFIG_CPCI405)           += cpci405.o
 obj-$(CONFIG_EBONY)             += ebony.o
 obj-$(CONFIG_EP405)             += ep405.o
@@ -19,6 +20,7 @@ obj-$(CONFIG_405GP)		+= ibm405gp.o
 obj-$(CONFIG_REDWOOD_5)         += ibmstb4.o
 obj-$(CONFIG_NP405H)            += ibmnp405h.o
 obj-$(CONFIG_REDWOOD_6)         += ibmstbx25.o
+obj-$(CONFIG_440EP)             += ibm440ep.o
 obj-$(CONFIG_440GP)             += ibm440gp.o
 obj-$(CONFIG_440GX)             += ibm440gx.o
 obj-$(CONFIG_440SP)             += ibm440sp.o
diff --git a/arch/ppc/platforms/4xx/ibm440ep.c b/arch/ppc/platforms/4xx/ibm440ep.c
new file mode 100644
index 000000000000..284da01f1ffd
--- /dev/null
+++ b/arch/ppc/platforms/4xx/ibm440ep.c
@@ -0,0 +1,220 @@
+/*
+ * arch/ppc/platforms/4xx/ibm440ep.c
+ *
+ * PPC440EP I/O descriptions
+ *
+ * Wade Farnsworth <wfarnsworth@mvista.com>
+ * Copyright 2004 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <platforms/4xx/ibm440ep.h>
+#include <asm/ocp.h>
+#include <asm/ppc4xx_pic.h>
+
+static struct ocp_func_emac_data ibm440ep_emac0_def = {
+        .rgmii_idx      = -1,           /* No RGMII */
+        .rgmii_mux      = -1,           /* No RGMII */
+        .zmii_idx       = 0,            /* ZMII device index */
+        .zmii_mux       = 0,            /* ZMII input of this EMAC */
+        .mal_idx        = 0,            /* MAL device index */
+        .mal_rx_chan    = 0,            /* MAL rx channel number */
+        .mal_tx_chan    = 0,            /* MAL tx channel number */
+        .wol_irq        = 61,           /* WOL interrupt number */
+        .mdio_idx       = -1,           /* No shared MDIO */
+        .tah_idx        = -1,           /* No TAH */
+};
+
+static struct ocp_func_emac_data ibm440ep_emac1_def = {
+        .rgmii_idx      = -1,           /* No RGMII */
+        .rgmii_mux      = -1,           /* No RGMII */
+        .zmii_idx       = 0,            /* ZMII device index */
+        .zmii_mux       = 1,            /* ZMII input of this EMAC */
+        .mal_idx        = 0,            /* MAL device index */
+        .mal_rx_chan    = 1,            /* MAL rx channel number */
+        .mal_tx_chan    = 2,            /* MAL tx channel number */
+        .wol_irq        = 63,           /* WOL interrupt number */
+        .mdio_idx       = -1,           /* No shared MDIO */
+        .tah_idx        = -1,           /* No TAH */
+};
+OCP_SYSFS_EMAC_DATA()
+
+static struct ocp_func_mal_data ibm440ep_mal0_def = {
+        .num_tx_chans   = 4,            /* Number of TX channels */
+        .num_rx_chans   = 2,            /* Number of RX channels */
+        .txeob_irq      = 10,           /* TX End Of Buffer IRQ  */
+        .rxeob_irq      = 11,           /* RX End Of Buffer IRQ  */
+        .txde_irq       = 33,           /* TX Descriptor Error IRQ */
+        .rxde_irq       = 34,           /* RX Descriptor Error IRQ */
+        .serr_irq       = 32,           /* MAL System Error IRQ    */
+};
+OCP_SYSFS_MAL_DATA()
+
+static struct ocp_func_iic_data ibm440ep_iic0_def = {
+        .fast_mode      = 0,            /* Use standad mode (100Khz) */
+};
+
+static struct ocp_func_iic_data ibm440ep_iic1_def = {
+        .fast_mode      = 0,            /* Use standad mode (100Khz) */
+};
+OCP_SYSFS_IIC_DATA()
+
+struct ocp_def core_ocp[] = {
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_OPB,
+          .index        = 0,
+          .paddr        = 0x0EF600000ULL,
+          .irq          = OCP_IRQ_NA,
+          .pm           = OCP_CPM_NA,
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_16550,
+          .index        = 0,
+          .paddr        = PPC440EP_UART0_ADDR,
+          .irq          = UART0_INT,
+          .pm           = IBM_CPM_UART0,
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_16550,
+          .index        = 1,
+          .paddr        = PPC440EP_UART1_ADDR,
+          .irq          = UART1_INT,
+          .pm           = IBM_CPM_UART1,
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_16550,
+          .index        = 2,
+          .paddr        = PPC440EP_UART2_ADDR,
+          .irq          = UART2_INT,
+          .pm           = IBM_CPM_UART2,
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_16550,
+          .index        = 3,
+          .paddr        = PPC440EP_UART3_ADDR,
+          .irq          = UART3_INT,
+          .pm           = IBM_CPM_UART3,
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_IIC,
+          .index        = 0,
+          .paddr        = 0x0EF600700ULL,
+          .irq          = 2,
+          .pm           = IBM_CPM_IIC0,
+          .additions    = &ibm440ep_iic0_def,
+          .show         = &ocp_show_iic_data
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_IIC,
+          .index        = 1,
+          .paddr        = 0x0EF600800ULL,
+          .irq          = 7,
+          .pm           = IBM_CPM_IIC1,
+          .additions    = &ibm440ep_iic1_def,
+          .show         = &ocp_show_iic_data
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_GPIO,
+          .index        = 0,
+          .paddr        = 0x0EF600B00ULL,
+          .irq          = OCP_IRQ_NA,
+          .pm           = IBM_CPM_GPIO0,
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_GPIO,
+          .index        = 1,
+          .paddr        = 0x0EF600C00ULL,
+          .irq          = OCP_IRQ_NA,
+          .pm           = OCP_CPM_NA,
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_MAL,
+          .paddr        = OCP_PADDR_NA,
+          .irq          = OCP_IRQ_NA,
+          .pm           = OCP_CPM_NA,
+          .additions    = &ibm440ep_mal0_def,
+          .show         = &ocp_show_mal_data,
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_EMAC,
+          .index        = 0,
+          .paddr        = 0x0EF600E00ULL,
+          .irq          = 60,
+          .pm           = OCP_CPM_NA,
+          .additions    = &ibm440ep_emac0_def,
+          .show         = &ocp_show_emac_data,
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_EMAC,
+          .index        = 1,
+          .paddr        = 0x0EF600F00ULL,
+          .irq          = 62,
+          .pm           = OCP_CPM_NA,
+          .additions    = &ibm440ep_emac1_def,
+          .show         = &ocp_show_emac_data,
+        },
+        { .vendor       = OCP_VENDOR_IBM,
+          .function     = OCP_FUNC_ZMII,
+          .paddr        = 0x0EF600D00ULL,
+          .irq          = OCP_IRQ_NA,
+          .pm           = OCP_CPM_NA,
+        },
+        { .vendor       = OCP_VENDOR_INVALID
+        }
+};
+
+/* Polarity and triggering settings for internal interrupt sources */
+struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
+        { .polarity     = 0xffbffe03,
+          .triggering   = 0xfffffe00,
+          .ext_irq_mask = 0x000001fc,   /* IRQ0 - IRQ6 */
+        },
+        { .polarity     = 0xffffc6ef,
+          .triggering   = 0xffffc7ff,
+          .ext_irq_mask = 0x00003800,   /* IRQ7 - IRQ9 */
+        },
+};
+
+static struct resource usb_gadget_resources[] = {
+        [0] = {
+                .start  = 0x050000100ULL,
+                .end    = 0x05000017FULL,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 55,
+                .end    = 55,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 dma_mask = 0xffffffffULL;
+
+static struct platform_device usb_gadget_device = {
+        .name           = "musbhsfc",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(usb_gadget_resources),
+        .resource       = usb_gadget_resources,
+        .dev            = {
+                .dma_mask = &dma_mask,
+                .coherent_dma_mask = 0xffffffffULL,
+        }
+};
+
+static struct platform_device *ibm440ep_devs[] __initdata = {
+        &usb_gadget_device,
+};
+
+static int __init
+ibm440ep_platform_add_devices(void)
+{
+        return platform_add_devices(ibm440ep_devs, ARRAY_SIZE(ibm440ep_devs));
+}
+arch_initcall(ibm440ep_platform_add_devices);
+
diff --git a/arch/ppc/platforms/4xx/ibm440ep.h b/arch/ppc/platforms/4xx/ibm440ep.h
new file mode 100644
index 000000000000..97c80b8e3e10
--- /dev/null
+++ b/arch/ppc/platforms/4xx/ibm440ep.h
@@ -0,0 +1,76 @@
+/*
+ * arch/ppc/platforms/4xx/ibm440ep.h
+ *
+ * PPC440EP definitions
+ *
+ * Wade Farnsworth <wfarnsworth@mvista.com>
+ *
+ * Copyright 2002 Roland Dreier
+ * Copyright 2004 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifdef __KERNEL__
+#ifndef __PPC_PLATFORMS_IBM440EP_H
+#define __PPC_PLATFORMS_IBM440EP_H
+
+#include <linux/config.h>
+#include <asm/ibm44x.h>
+
+/* UART */
+#define PPC440EP_UART0_ADDR             0x0EF600300
+#define PPC440EP_UART1_ADDR             0x0EF600400
+#define PPC440EP_UART2_ADDR             0x0EF600500
+#define PPC440EP_UART3_ADDR             0x0EF600600
+#define UART0_INT                       0
+#define UART1_INT                       1
+#define UART2_INT                       3
+#define UART3_INT                       4
+
+/* Clock and Power Management */
+#define IBM_CPM_IIC0            0x80000000      /* IIC interface */
+#define IBM_CPM_IIC1            0x40000000      /* IIC interface */
+#define IBM_CPM_PCI             0x20000000      /* PCI bridge */
+#define IBM_CPM_USB1H           0x08000000      /* USB 1.1 Host */
+#define IBM_CPM_FPU             0x04000000      /* floating point unit */
+#define IBM_CPM_CPU             0x02000000      /* processor core */
+#define IBM_CPM_DMA             0x01000000      /* DMA controller */
+#define IBM_CPM_BGO             0x00800000      /* PLB to OPB bus arbiter */
+#define IBM_CPM_BGI             0x00400000      /* OPB to PLB bridge */
+#define IBM_CPM_EBC             0x00200000      /* External Bus Controller */
+#define IBM_CPM_EBM             0x00100000      /* Ext Bus Master Interface */
+#define IBM_CPM_DMC             0x00080000      /* SDRAM peripheral controller */
+#define IBM_CPM_PLB4            0x00040000      /* PLB4 bus arbiter */
+#define IBM_CPM_PLB4x3          0x00020000      /* PLB4 to PLB3 bridge controller */
+#define IBM_CPM_PLB3x4          0x00010000      /* PLB3 to PLB4 bridge controller */
+#define IBM_CPM_PLB3            0x00008000      /* PLB3 bus arbiter */
+#define IBM_CPM_PPM             0x00002000      /* PLB Performance Monitor */
+#define IBM_CPM_UIC1            0x00001000      /* Universal Interrupt Controller */
+#define IBM_CPM_GPIO0           0x00000800      /* General Purpose IO (??) */
+#define IBM_CPM_GPT             0x00000400      /* General Purpose Timers  */
+#define IBM_CPM_UART0           0x00000200      /* serial port 0 */
+#define IBM_CPM_UART1           0x00000100      /* serial port 1 */
+#define IBM_CPM_UIC0            0x00000080      /* Universal Interrupt Controller */
+#define IBM_CPM_TMRCLK          0x00000040      /* CPU timers */
+#define IBM_CPM_EMAC0           0x00000020      /* ethernet port 0 */
+#define IBM_CPM_EMAC1           0x00000010      /* ethernet port 1 */
+#define IBM_CPM_UART2           0x00000008      /* serial port 2 */
+#define IBM_CPM_UART3           0x00000004      /* serial port 3 */
+#define IBM_CPM_USB2D           0x00000002      /* USB 2.0 Device */
+#define IBM_CPM_USB2H           0x00000001      /* USB 2.0 Host */
+
+#define DFLT_IBM4xx_PM          ~(IBM_CPM_UIC0 | IBM_CPM_UIC1 | IBM_CPM_CPU \
+                                | IBM_CPM_EBC | IBM_CPM_BGO | IBM_CPM_FPU \
+                                | IBM_CPM_EBM | IBM_CPM_PLB4 | IBM_CPM_3x4 \
+                                | IBM_CPM_PLB3 | IBM_CPM_PLB4x3 \
+                                | IBM_CPM_EMAC0 | IBM_CPM_TMRCLK \
+                                | IBM_CPM_DMA | IBM_CPM_PCI | IBM_CPM_EMAC1)
+
+
+#endif /* __PPC_PLATFORMS_IBM440EP_H */
+#endif /* __KERNEL__ */