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authorMatt Porter <mporter@kernel.crashing.org>2005-08-01 01:34:52 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-08-01 22:14:01 -0400
commitc9cf73aee140baa425429902aaed2c758401343f (patch)
tree7e28361e87950e7e66a453e4218745a4b0912119 /arch/ppc/platforms/4xx/ibm440ep.c
parente8be1c8e065691c332fd8e9bae70c7096a69c31d (diff)
[PATCH] ppc32: add 440ep support
Add PPC440EP core support. PPC440EP is a PPC440-based SoC with a classic PPC FPU and another set of peripherals. Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com> Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/platforms/4xx/ibm440ep.c')
-rw-r--r--arch/ppc/platforms/4xx/ibm440ep.c220
1 files changed, 220 insertions, 0 deletions
diff --git a/arch/ppc/platforms/4xx/ibm440ep.c b/arch/ppc/platforms/4xx/ibm440ep.c
new file mode 100644
index 000000000000..284da01f1ffd
--- /dev/null
+++ b/arch/ppc/platforms/4xx/ibm440ep.c
@@ -0,0 +1,220 @@
1/*
2 * arch/ppc/platforms/4xx/ibm440ep.c
3 *
4 * PPC440EP I/O descriptions
5 *
6 * Wade Farnsworth <wfarnsworth@mvista.com>
7 * Copyright 2004 MontaVista Software Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15#include <linux/init.h>
16#include <linux/module.h>
17#include <platforms/4xx/ibm440ep.h>
18#include <asm/ocp.h>
19#include <asm/ppc4xx_pic.h>
20
21static struct ocp_func_emac_data ibm440ep_emac0_def = {
22 .rgmii_idx = -1, /* No RGMII */
23 .rgmii_mux = -1, /* No RGMII */
24 .zmii_idx = 0, /* ZMII device index */
25 .zmii_mux = 0, /* ZMII input of this EMAC */
26 .mal_idx = 0, /* MAL device index */
27 .mal_rx_chan = 0, /* MAL rx channel number */
28 .mal_tx_chan = 0, /* MAL tx channel number */
29 .wol_irq = 61, /* WOL interrupt number */
30 .mdio_idx = -1, /* No shared MDIO */
31 .tah_idx = -1, /* No TAH */
32};
33
34static struct ocp_func_emac_data ibm440ep_emac1_def = {
35 .rgmii_idx = -1, /* No RGMII */
36 .rgmii_mux = -1, /* No RGMII */
37 .zmii_idx = 0, /* ZMII device index */
38 .zmii_mux = 1, /* ZMII input of this EMAC */
39 .mal_idx = 0, /* MAL device index */
40 .mal_rx_chan = 1, /* MAL rx channel number */
41 .mal_tx_chan = 2, /* MAL tx channel number */
42 .wol_irq = 63, /* WOL interrupt number */
43 .mdio_idx = -1, /* No shared MDIO */
44 .tah_idx = -1, /* No TAH */
45};
46OCP_SYSFS_EMAC_DATA()
47
48static struct ocp_func_mal_data ibm440ep_mal0_def = {
49 .num_tx_chans = 4, /* Number of TX channels */
50 .num_rx_chans = 2, /* Number of RX channels */
51 .txeob_irq = 10, /* TX End Of Buffer IRQ */
52 .rxeob_irq = 11, /* RX End Of Buffer IRQ */
53 .txde_irq = 33, /* TX Descriptor Error IRQ */
54 .rxde_irq = 34, /* RX Descriptor Error IRQ */
55 .serr_irq = 32, /* MAL System Error IRQ */
56};
57OCP_SYSFS_MAL_DATA()
58
59static struct ocp_func_iic_data ibm440ep_iic0_def = {
60 .fast_mode = 0, /* Use standad mode (100Khz) */
61};
62
63static struct ocp_func_iic_data ibm440ep_iic1_def = {
64 .fast_mode = 0, /* Use standad mode (100Khz) */
65};
66OCP_SYSFS_IIC_DATA()
67
68struct ocp_def core_ocp[] = {
69 { .vendor = OCP_VENDOR_IBM,
70 .function = OCP_FUNC_OPB,
71 .index = 0,
72 .paddr = 0x0EF600000ULL,
73 .irq = OCP_IRQ_NA,
74 .pm = OCP_CPM_NA,
75 },
76 { .vendor = OCP_VENDOR_IBM,
77 .function = OCP_FUNC_16550,
78 .index = 0,
79 .paddr = PPC440EP_UART0_ADDR,
80 .irq = UART0_INT,
81 .pm = IBM_CPM_UART0,
82 },
83 { .vendor = OCP_VENDOR_IBM,
84 .function = OCP_FUNC_16550,
85 .index = 1,
86 .paddr = PPC440EP_UART1_ADDR,
87 .irq = UART1_INT,
88 .pm = IBM_CPM_UART1,
89 },
90 { .vendor = OCP_VENDOR_IBM,
91 .function = OCP_FUNC_16550,
92 .index = 2,
93 .paddr = PPC440EP_UART2_ADDR,
94 .irq = UART2_INT,
95 .pm = IBM_CPM_UART2,
96 },
97 { .vendor = OCP_VENDOR_IBM,
98 .function = OCP_FUNC_16550,
99 .index = 3,
100 .paddr = PPC440EP_UART3_ADDR,
101 .irq = UART3_INT,
102 .pm = IBM_CPM_UART3,
103 },
104 { .vendor = OCP_VENDOR_IBM,
105 .function = OCP_FUNC_IIC,
106 .index = 0,
107 .paddr = 0x0EF600700ULL,
108 .irq = 2,
109 .pm = IBM_CPM_IIC0,
110 .additions = &ibm440ep_iic0_def,
111 .show = &ocp_show_iic_data
112 },
113 { .vendor = OCP_VENDOR_IBM,
114 .function = OCP_FUNC_IIC,
115 .index = 1,
116 .paddr = 0x0EF600800ULL,
117 .irq = 7,
118 .pm = IBM_CPM_IIC1,
119 .additions = &ibm440ep_iic1_def,
120 .show = &ocp_show_iic_data
121 },
122 { .vendor = OCP_VENDOR_IBM,
123 .function = OCP_FUNC_GPIO,
124 .index = 0,
125 .paddr = 0x0EF600B00ULL,
126 .irq = OCP_IRQ_NA,
127 .pm = IBM_CPM_GPIO0,
128 },
129 { .vendor = OCP_VENDOR_IBM,
130 .function = OCP_FUNC_GPIO,
131 .index = 1,
132 .paddr = 0x0EF600C00ULL,
133 .irq = OCP_IRQ_NA,
134 .pm = OCP_CPM_NA,
135 },
136 { .vendor = OCP_VENDOR_IBM,
137 .function = OCP_FUNC_MAL,
138 .paddr = OCP_PADDR_NA,
139 .irq = OCP_IRQ_NA,
140 .pm = OCP_CPM_NA,
141 .additions = &ibm440ep_mal0_def,
142 .show = &ocp_show_mal_data,
143 },
144 { .vendor = OCP_VENDOR_IBM,
145 .function = OCP_FUNC_EMAC,
146 .index = 0,
147 .paddr = 0x0EF600E00ULL,
148 .irq = 60,
149 .pm = OCP_CPM_NA,
150 .additions = &ibm440ep_emac0_def,
151 .show = &ocp_show_emac_data,
152 },
153 { .vendor = OCP_VENDOR_IBM,
154 .function = OCP_FUNC_EMAC,
155 .index = 1,
156 .paddr = 0x0EF600F00ULL,
157 .irq = 62,
158 .pm = OCP_CPM_NA,
159 .additions = &ibm440ep_emac1_def,
160 .show = &ocp_show_emac_data,
161 },
162 { .vendor = OCP_VENDOR_IBM,
163 .function = OCP_FUNC_ZMII,
164 .paddr = 0x0EF600D00ULL,
165 .irq = OCP_IRQ_NA,
166 .pm = OCP_CPM_NA,
167 },
168 { .vendor = OCP_VENDOR_INVALID
169 }
170};
171
172/* Polarity and triggering settings for internal interrupt sources */
173struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
174 { .polarity = 0xffbffe03,
175 .triggering = 0xfffffe00,
176 .ext_irq_mask = 0x000001fc, /* IRQ0 - IRQ6 */
177 },
178 { .polarity = 0xffffc6ef,
179 .triggering = 0xffffc7ff,
180 .ext_irq_mask = 0x00003800, /* IRQ7 - IRQ9 */
181 },
182};
183
184static struct resource usb_gadget_resources[] = {
185 [0] = {
186 .start = 0x050000100ULL,
187 .end = 0x05000017FULL,
188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
191 .start = 55,
192 .end = 55,
193 .flags = IORESOURCE_IRQ,
194 },
195};
196
197static u64 dma_mask = 0xffffffffULL;
198
199static struct platform_device usb_gadget_device = {
200 .name = "musbhsfc",
201 .id = 0,
202 .num_resources = ARRAY_SIZE(usb_gadget_resources),
203 .resource = usb_gadget_resources,
204 .dev = {
205 .dma_mask = &dma_mask,
206 .coherent_dma_mask = 0xffffffffULL,
207 }
208};
209
210static struct platform_device *ibm440ep_devs[] __initdata = {
211 &usb_gadget_device,
212};
213
214static int __init
215ibm440ep_platform_add_devices(void)
216{
217 return platform_add_devices(ibm440ep_devs, ARRAY_SIZE(ibm440ep_devs));
218}
219arch_initcall(ibm440ep_platform_add_devices);
220
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 07:55:59 -0500