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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2007-11-20 02:32:12 -0500
committerPaul Mackerras <paulus@samba.org>2007-11-20 02:42:00 -0500
commit0b47759db54f82df68ed179ddc5cb2becea56158 (patch)
treec9b87d76571f5a856a914c9a86bc47731df6bb27 /arch/ppc/mm
parent072ef40e08a71aae4ff2835e3c7f601b29daf227 (diff)
[POWERPC] Fix 8xx build breakage due to _tlbie changes
My changes to _tlbie to fix 4xx unfortunately broke 8xx build in a couple of places. This fixes it. Spotted by Olof Johansson. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/mm')
-rw-r--r--arch/ppc/mm/init.c2
-rw-r--r--arch/ppc/mm/mmu_decl.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c
index 390dd1995c2a..dd898d32480e 100644
--- a/arch/ppc/mm/init.c
+++ b/arch/ppc/mm/init.c
@@ -561,7 +561,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
561 * That means the zeroed TLB has to be invalidated 561 * That means the zeroed TLB has to be invalidated
562 * whenever a page miss occurs. 562 * whenever a page miss occurs.
563 */ 563 */
564 _tlbie(address); 564 _tlbie(address, 0 /* 8xx doesn't care about PID */);
565#endif 565#endif
566 if (!PageReserved(page) 566 if (!PageReserved(page)
567 && !test_bit(PG_arch_1, &page->flags)) { 567 && !test_bit(PG_arch_1, &page->flags)) {
diff --git a/arch/ppc/mm/mmu_decl.h b/arch/ppc/mm/mmu_decl.h
index f1d4f2109a99..b298b60c202f 100644
--- a/arch/ppc/mm/mmu_decl.h
+++ b/arch/ppc/mm/mmu_decl.h
@@ -49,7 +49,7 @@ extern unsigned int num_tlbcam_entries;
49 * architectures. -- Dan 49 * architectures. -- Dan
50 */ 50 */
51#if defined(CONFIG_8xx) 51#if defined(CONFIG_8xx)
52#define flush_HPTE(X, va, pg) _tlbie(va) 52#define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */)
53#define MMU_init_hw() do { } while(0) 53#define MMU_init_hw() do { } while(0)
54#define mmu_mapin_ram() (0UL) 54#define mmu_mapin_ram() (0UL)
55 55