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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2007-10-29 18:46:06 -0400
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-11-01 08:15:09 -0400
commite701d269aa28996f3502780951fe1b12d5d66b49 (patch)
treea55db7df5755bf9c69f466432786de7e7e445ba8 /arch/ppc/mm
parent57d75561be5496289601b2c94787ec38c718fcae (diff)
[POWERPC] 4xx: Fix 4xx flush_tlb_page()
On 4xx CPUs, the current implementation of flush_tlb_page() uses a low level _tlbie() assembly function that only works for the current PID. Thus, invalidations caused by, for example, a COW fault triggered by get_user_pages() from a different context will not work properly, causing among other things, gdb breakpoints to fail. This patch adds a "pid" argument to _tlbie() on 4xx processors, and uses it to flush entries in the right context. FSL BookE also gets the argument but it seems they don't need it (their tlbivax form ignores the PID when invalidating according to the document I have). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/ppc/mm')
-rw-r--r--arch/ppc/mm/fault.c2
-rw-r--r--arch/ppc/mm/mmu_decl.h4
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/ppc/mm/fault.c b/arch/ppc/mm/fault.c
index 254c23b755e6..36c0e7529edb 100644
--- a/arch/ppc/mm/fault.c
+++ b/arch/ppc/mm/fault.c
@@ -227,7 +227,7 @@ good_area:
227 set_bit(PG_arch_1, &page->flags); 227 set_bit(PG_arch_1, &page->flags);
228 } 228 }
229 pte_update(ptep, 0, _PAGE_HWEXEC); 229 pte_update(ptep, 0, _PAGE_HWEXEC);
230 _tlbie(address); 230 _tlbie(address, mm->context.id);
231 pte_unmap_unlock(ptep, ptl); 231 pte_unmap_unlock(ptep, ptl);
232 up_read(&mm->mmap_sem); 232 up_read(&mm->mmap_sem);
233 return 0; 233 return 0;
diff --git a/arch/ppc/mm/mmu_decl.h b/arch/ppc/mm/mmu_decl.h
index 540f3292b229..f1d4f2109a99 100644
--- a/arch/ppc/mm/mmu_decl.h
+++ b/arch/ppc/mm/mmu_decl.h
@@ -54,12 +54,12 @@ extern unsigned int num_tlbcam_entries;
54#define mmu_mapin_ram() (0UL) 54#define mmu_mapin_ram() (0UL)
55 55
56#elif defined(CONFIG_4xx) 56#elif defined(CONFIG_4xx)
57#define flush_HPTE(X, va, pg) _tlbie(va) 57#define flush_HPTE(pid, va, pg) _tlbie(va, pid)
58extern void MMU_init_hw(void); 58extern void MMU_init_hw(void);
59extern unsigned long mmu_mapin_ram(void); 59extern unsigned long mmu_mapin_ram(void);
60 60
61#elif defined(CONFIG_FSL_BOOKE) 61#elif defined(CONFIG_FSL_BOOKE)
62#define flush_HPTE(X, va, pg) _tlbie(va) 62#define flush_HPTE(pid, va, pg) _tlbie(va, pid)
63extern void MMU_init_hw(void); 63extern void MMU_init_hw(void);
64extern unsigned long mmu_mapin_ram(void); 64extern unsigned long mmu_mapin_ram(void);
65extern void adjust_total_lowmem(void); 65extern void adjust_total_lowmem(void);