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authorSimon Arlott <simon@fire.lp0.eu>2007-05-11 15:42:54 -0400
committerPaul Mackerras <paulus@samba.org>2007-05-11 21:32:49 -0400
commita8de5ce9895367191df9b30804a0c67cfcc9f27a (patch)
tree8f99af81affca30d868bd9ee7c043639b905c4f8 /arch/ppc/kernel
parentdab4d7984ee61c8eb25569b12e7a996f5aaef2ba (diff)
[POWERPC] Spelling fixes: arch/ppc/
Spelling fixes in arch/ppc/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/kernel')
-rw-r--r--arch/ppc/kernel/traps.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index 810f7aa72e92..aea100be52c8 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -577,7 +577,7 @@ void program_check_exception(struct pt_regs *regs)
577 * ESR_DST (!?) or 0. In the process of chasing this with the 577 * ESR_DST (!?) or 0. In the process of chasing this with the
578 * hardware people - not sure if it can happen on any illegal 578 * hardware people - not sure if it can happen on any illegal
579 * instruction or only on FP instructions, whether there is a 579 * instruction or only on FP instructions, whether there is a
580 * pattern to occurences etc. -dgibson 31/Mar/2003 */ 580 * pattern to occurrences etc. -dgibson 31/Mar/2003 */
581 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) { 581 if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
582 emulate_single_step(regs); 582 emulate_single_step(regs);
583 return; 583 return;
@@ -860,7 +860,7 @@ void SPEFloatingPointException(struct pt_regs *regs)
860 spefscr = current->thread.spefscr; 860 spefscr = current->thread.spefscr;
861 fpexc_mode = current->thread.fpexc_mode; 861 fpexc_mode = current->thread.fpexc_mode;
862 862
863 /* Hardware does not neccessarily set sticky 863 /* Hardware does not necessarily set sticky
864 * underflow/overflow/invalid flags */ 864 * underflow/overflow/invalid flags */
865 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) { 865 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
866 code = FPE_FLTOVF; 866 code = FPE_FLTOVF;