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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2006-10-24 02:42:40 -0400
committerPaul Mackerras <paulus@samba.org>2006-10-24 21:42:10 -0400
commit42c4aaadb737e0e672b3fb86b2c41ff59f0fb8bc (patch)
tree368a26a61085e567357b3974e7799e56069032eb /arch/ppc/kernel
parentfb20f65a01a97bdf4bb746eecfc24a08561e2648 (diff)
[POWERPC] Consolidate feature fixup code
There are currently two versions of the functions for applying the feature fixups, one for CPU features and one for firmware features. In addition, they are both in assembly and with separate implementations for 32 and 64 bits. identify_cpu() is also implemented in assembly and separately for 32 and 64 bits. This patch replaces them with a pair of C functions. The call sites are slightly moved on ppc64 as well to be called from C instead of from assembly, though it's a very small change, and thus shouldn't cause any problem. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/kernel')
-rw-r--r--arch/ppc/kernel/misc.S74
-rw-r--r--arch/ppc/kernel/setup.c10
2 files changed, 6 insertions, 78 deletions
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 5f6684012ded..d319f9ba2379 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -110,80 +110,6 @@ _GLOBAL(reloc_got2)
110 blr 110 blr
111 111
112/* 112/*
113 * identify_cpu,
114 * called with r3 = data offset and r4 = CPU number
115 * doesn't change r3
116 */
117_GLOBAL(identify_cpu)
118 addis r8,r3,cpu_specs@ha
119 addi r8,r8,cpu_specs@l
120 mfpvr r7
1211:
122 lwz r5,CPU_SPEC_PVR_MASK(r8)
123 and r5,r5,r7
124 lwz r6,CPU_SPEC_PVR_VALUE(r8)
125 cmplw 0,r6,r5
126 beq 1f
127 addi r8,r8,CPU_SPEC_ENTRY_SIZE
128 b 1b
1291:
130 addis r6,r3,cur_cpu_spec@ha
131 addi r6,r6,cur_cpu_spec@l
132 sub r8,r8,r3
133 stw r8,0(r6)
134 blr
135
136/*
137 * do_cpu_ftr_fixups - goes through the list of CPU feature fixups
138 * and writes nop's over sections of code that don't apply for this cpu.
139 * r3 = data offset (not changed)
140 */
141_GLOBAL(do_cpu_ftr_fixups)
142 /* Get CPU 0 features */
143 addis r6,r3,cur_cpu_spec@ha
144 addi r6,r6,cur_cpu_spec@l
145 lwz r4,0(r6)
146 add r4,r4,r3
147 lwz r4,CPU_SPEC_FEATURES(r4)
148
149 /* Get the fixup table */
150 addis r6,r3,__start___ftr_fixup@ha
151 addi r6,r6,__start___ftr_fixup@l
152 addis r7,r3,__stop___ftr_fixup@ha
153 addi r7,r7,__stop___ftr_fixup@l
154
155 /* Do the fixup */
1561: cmplw 0,r6,r7
157 bgelr
158 addi r6,r6,16
159 lwz r8,-16(r6) /* mask */
160 and r8,r8,r4
161 lwz r9,-12(r6) /* value */
162 cmplw 0,r8,r9
163 beq 1b
164 lwz r8,-8(r6) /* section begin */
165 lwz r9,-4(r6) /* section end */
166 subf. r9,r8,r9
167 beq 1b
168 /* write nops over the section of code */
169 /* todo: if large section, add a branch at the start of it */
170 srwi r9,r9,2
171 mtctr r9
172 add r8,r8,r3
173 lis r0,0x60000000@h /* nop */
1743: stw r0,0(r8)
175 andi. r10,r4,CPU_FTR_SPLIT_ID_CACHE@l
176 beq 2f
177 dcbst 0,r8 /* suboptimal, but simpler */
178 sync
179 icbi 0,r8
1802: addi r8,r8,4
181 bdnz 3b
182 sync /* additional sync needed on g4 */
183 isync
184 b 1b
185
186/*
187 * call_setup_cpu - call the setup_cpu function for this cpu 113 * call_setup_cpu - call the setup_cpu function for this cpu
188 * r3 = data offset, r24 = cpu number 114 * r3 = data offset, r24 = cpu number
189 * 115 *
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 75fe13815be2..41a640f16bdd 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -38,6 +38,7 @@
38#include <asm/nvram.h> 38#include <asm/nvram.h>
39#include <asm/xmon.h> 39#include <asm/xmon.h>
40#include <asm/ocp.h> 40#include <asm/ocp.h>
41#include <asm/prom.h>
41 42
42#define USES_PPC_SYS (defined(CONFIG_85xx) || defined(CONFIG_83xx) || \ 43#define USES_PPC_SYS (defined(CONFIG_85xx) || defined(CONFIG_83xx) || \
43 defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \ 44 defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
@@ -53,8 +54,6 @@
53 54
54extern void platform_init(unsigned long r3, unsigned long r4, 55extern void platform_init(unsigned long r3, unsigned long r4,
55 unsigned long r5, unsigned long r6, unsigned long r7); 56 unsigned long r5, unsigned long r6, unsigned long r7);
56extern void identify_cpu(unsigned long offset, unsigned long cpu);
57extern void do_cpu_ftr_fixups(unsigned long offset);
58extern void reloc_got2(unsigned long offset); 57extern void reloc_got2(unsigned long offset);
59 58
60extern void ppc6xx_idle(void); 59extern void ppc6xx_idle(void);
@@ -301,6 +300,7 @@ early_init(int r3, int r4, int r5)
301{ 300{
302 unsigned long phys; 301 unsigned long phys;
303 unsigned long offset = reloc_offset(); 302 unsigned long offset = reloc_offset();
303 struct cpu_spec *spec;
304 304
305 /* Default */ 305 /* Default */
306 phys = offset + KERNELBASE; 306 phys = offset + KERNELBASE;
@@ -313,8 +313,10 @@ early_init(int r3, int r4, int r5)
313 * Identify the CPU type and fix up code sections 313 * Identify the CPU type and fix up code sections
314 * that depend on which cpu we have. 314 * that depend on which cpu we have.
315 */ 315 */
316 identify_cpu(offset, 0); 316 spec = identify_cpu(offset);
317 do_cpu_ftr_fixups(offset); 317 do_feature_fixups(offset, spec->cpu_features,
318 PTRRELOC(&__start___ftr_fixup),
319 PTRRELOC(&__stop___ftr_fixup));
318 320
319 return phys; 321 return phys;
320} 322}