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authorStephen Rothwell <sfr@canb.auug.org.au>2005-10-12 01:55:09 -0400
committerStephen Rothwell <sfr@canb.auug.org.au>2005-10-12 19:49:45 -0400
commit4920960f577edcb0a5ef03823a53911cca5875e1 (patch)
treec37bb1a8b02f54e3a5012bac7f726208e6fc488e /arch/ppc/kernel
parent7e130edf712ac054aecf643f9d3d0142a9679e6a (diff)
powerpc: consolidate cputable.c
Also simplify arch/ppc64/kernel/Makefile Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'arch/ppc/kernel')
-rw-r--r--arch/ppc/kernel/Makefile4
-rw-r--r--arch/ppc/kernel/cputable.c806
2 files changed, 2 insertions, 808 deletions
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index 59b6b62d1120..0cba463adf9a 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -15,7 +15,7 @@ extra-y += vmlinux.lds
15obj-y := entry.o traps.o irq.o idle.o time.o misc.o \ 15obj-y := entry.o traps.o irq.o idle.o time.o misc.o \
16 process.o signal.o ptrace.o align.o \ 16 process.o signal.o ptrace.o align.o \
17 syscalls.o setup.o \ 17 syscalls.o setup.o \
18 cputable.o ppc_htab.o perfmon.o 18 ppc_htab.o perfmon.o
19obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o 19obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o
20obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o 20obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
21obj-$(CONFIG_POWER4) += cpu_setup_power4.o 21obj-$(CONFIG_POWER4) += cpu_setup_power4.o
@@ -39,7 +39,7 @@ endif
39else 39else
40obj-y := irq.o idle.o time.o \ 40obj-y := irq.o idle.o time.o \
41 signal.o ptrace.o align.o \ 41 signal.o ptrace.o align.o \
42 syscalls.o cputable.o perfmon.o 42 syscalls.o perfmon.o
43obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o 43obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o
44obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o 44obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
45obj-$(CONFIG_MODULES) += module.o 45obj-$(CONFIG_MODULES) += module.o
diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
deleted file mode 100644
index 207d4dd059d9..000000000000
--- a/arch/ppc/kernel/cputable.c
+++ /dev/null
@@ -1,806 +0,0 @@
1/*
2 * arch/ppc/kernel/cputable.c
3 *
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/config.h>
13#include <linux/string.h>
14#include <linux/sched.h>
15#include <linux/threads.h>
16#include <linux/init.h>
17#include <linux/module.h>
18
19#include <asm/oprofile_impl.h>
20#include <asm/cputable.h>
21
22struct cpu_spec* cur_cpu_spec = NULL;
23
24extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
25extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
26extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
27extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
28extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
29extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
30extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
31extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
32extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
33
34#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \
35 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
36 !defined(CONFIG_BOOKE))
37
38/* This table only contains "desktop" CPUs, it need to be filled with embedded
39 * ones as well...
40 */
41#define COMMON_PPC (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
42 PPC_FEATURE_HAS_MMU)
43
44/* We only set the spe features if the kernel was compiled with
45 * spe support
46 */
47#ifdef CONFIG_SPE
48#define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
49#else
50#define PPC_FEATURE_SPE_COMP 0
51#endif
52
53struct cpu_spec cpu_specs[] = {
54#if CLASSIC_PPC
55 { /* 601 */
56 .pvr_mask = 0xffff0000,
57 .pvr_value = 0x00010000,
58 .cpu_name = "601",
59 .cpu_features = CPU_FTRS_PPC601,
60 .cpu_user_features = COMMON_PPC | PPC_FEATURE_601_INSTR |
61 PPC_FEATURE_UNIFIED_CACHE,
62 .icache_bsize = 32,
63 .dcache_bsize = 32,
64 },
65 { /* 603 */
66 .pvr_mask = 0xffff0000,
67 .pvr_value = 0x00030000,
68 .cpu_name = "603",
69 .cpu_features = CPU_FTRS_603,
70 .cpu_user_features = COMMON_PPC,
71 .icache_bsize = 32,
72 .dcache_bsize = 32,
73 .cpu_setup = __setup_cpu_603
74 },
75 { /* 603e */
76 .pvr_mask = 0xffff0000,
77 .pvr_value = 0x00060000,
78 .cpu_name = "603e",
79 .cpu_features = CPU_FTRS_603,
80 .cpu_user_features = COMMON_PPC,
81 .icache_bsize = 32,
82 .dcache_bsize = 32,
83 .cpu_setup = __setup_cpu_603
84 },
85 { /* 603ev */
86 .pvr_mask = 0xffff0000,
87 .pvr_value = 0x00070000,
88 .cpu_name = "603ev",
89 .cpu_features = CPU_FTRS_603,
90 .cpu_user_features = COMMON_PPC,
91 .icache_bsize = 32,
92 .dcache_bsize = 32,
93 .cpu_setup = __setup_cpu_603
94 },
95 { /* 604 */
96 .pvr_mask = 0xffff0000,
97 .pvr_value = 0x00040000,
98 .cpu_name = "604",
99 .cpu_features = CPU_FTRS_604,
100 .cpu_user_features = COMMON_PPC,
101 .icache_bsize = 32,
102 .dcache_bsize = 32,
103 .num_pmcs = 2,
104 .cpu_setup = __setup_cpu_604
105 },
106 { /* 604e */
107 .pvr_mask = 0xfffff000,
108 .pvr_value = 0x00090000,
109 .cpu_name = "604e",
110 .cpu_features = CPU_FTRS_604,
111 .cpu_user_features = COMMON_PPC,
112 .icache_bsize = 32,
113 .dcache_bsize = 32,
114 .num_pmcs = 4,
115 .cpu_setup = __setup_cpu_604
116 },
117 { /* 604r */
118 .pvr_mask = 0xffff0000,
119 .pvr_value = 0x00090000,
120 .cpu_name = "604r",
121 .cpu_features = CPU_FTRS_604,
122 .cpu_user_features = COMMON_PPC,
123 .icache_bsize = 32,
124 .dcache_bsize = 32,
125 .num_pmcs = 4,
126 .cpu_setup = __setup_cpu_604
127 },
128 { /* 604ev */
129 .pvr_mask = 0xffff0000,
130 .pvr_value = 0x000a0000,
131 .cpu_name = "604ev",
132 .cpu_features = CPU_FTRS_604,
133 .cpu_user_features = COMMON_PPC,
134 .icache_bsize = 32,
135 .dcache_bsize = 32,
136 .num_pmcs = 4,
137 .cpu_setup = __setup_cpu_604
138 },
139 { /* 740/750 (0x4202, don't support TAU ?) */
140 .pvr_mask = 0xffffffff,
141 .pvr_value = 0x00084202,
142 .cpu_name = "740/750",
143 .cpu_features = CPU_FTRS_740_NOTAU,
144 .cpu_user_features = COMMON_PPC,
145 .icache_bsize = 32,
146 .dcache_bsize = 32,
147 .num_pmcs = 4,
148 .cpu_setup = __setup_cpu_750
149 },
150 { /* 750CX (80100 and 8010x?) */
151 .pvr_mask = 0xfffffff0,
152 .pvr_value = 0x00080100,
153 .cpu_name = "750CX",
154 .cpu_features = CPU_FTRS_750,
155 .cpu_user_features = COMMON_PPC,
156 .icache_bsize = 32,
157 .dcache_bsize = 32,
158 .num_pmcs = 4,
159 .cpu_setup = __setup_cpu_750cx
160 },
161 { /* 750CX (82201 and 82202) */
162 .pvr_mask = 0xfffffff0,
163 .pvr_value = 0x00082200,
164 .cpu_name = "750CX",
165 .cpu_features = CPU_FTRS_750,
166 .cpu_user_features = COMMON_PPC,
167 .icache_bsize = 32,
168 .dcache_bsize = 32,
169 .num_pmcs = 4,
170 .cpu_setup = __setup_cpu_750cx
171 },
172 { /* 750CXe (82214) */
173 .pvr_mask = 0xfffffff0,
174 .pvr_value = 0x00082210,
175 .cpu_name = "750CXe",
176 .cpu_features = CPU_FTRS_750,
177 .cpu_user_features = COMMON_PPC,
178 .icache_bsize = 32,
179 .dcache_bsize = 32,
180 .num_pmcs = 4,
181 .cpu_setup = __setup_cpu_750cx
182 },
183 { /* 750CXe "Gekko" (83214) */
184 .pvr_mask = 0xffffffff,
185 .pvr_value = 0x00083214,
186 .cpu_name = "750CXe",
187 .cpu_features = CPU_FTRS_750,
188 .cpu_user_features = COMMON_PPC,
189 .icache_bsize = 32,
190 .dcache_bsize = 32,
191 .num_pmcs = 4,
192 .cpu_setup = __setup_cpu_750cx
193 },
194 { /* 745/755 */
195 .pvr_mask = 0xfffff000,
196 .pvr_value = 0x00083000,
197 .cpu_name = "745/755",
198 .cpu_features = CPU_FTRS_750,
199 .cpu_user_features = COMMON_PPC,
200 .icache_bsize = 32,
201 .dcache_bsize = 32,
202 .num_pmcs = 4,
203 .cpu_setup = __setup_cpu_750
204 },
205 { /* 750FX rev 1.x */
206 .pvr_mask = 0xffffff00,
207 .pvr_value = 0x70000100,
208 .cpu_name = "750FX",
209 .cpu_features = CPU_FTRS_750FX1,
210 .cpu_user_features = COMMON_PPC,
211 .icache_bsize = 32,
212 .dcache_bsize = 32,
213 .num_pmcs = 4,
214 .cpu_setup = __setup_cpu_750
215 },
216 { /* 750FX rev 2.0 must disable HID0[DPM] */
217 .pvr_mask = 0xffffffff,
218 .pvr_value = 0x70000200,
219 .cpu_name = "750FX",
220 .cpu_features = CPU_FTRS_750FX2,
221 .cpu_user_features = COMMON_PPC,
222 .icache_bsize = 32,
223 .dcache_bsize = 32,
224 .num_pmcs = 4,
225 .cpu_setup = __setup_cpu_750
226 },
227 { /* 750FX (All revs except 2.0) */
228 .pvr_mask = 0xffff0000,
229 .pvr_value = 0x70000000,
230 .cpu_name = "750FX",
231 .cpu_features = CPU_FTRS_750FX,
232 .cpu_user_features = COMMON_PPC,
233 .icache_bsize = 32,
234 .dcache_bsize = 32,
235 .num_pmcs = 4,
236 .cpu_setup = __setup_cpu_750fx
237 },
238 { /* 750GX */
239 .pvr_mask = 0xffff0000,
240 .pvr_value = 0x70020000,
241 .cpu_name = "750GX",
242 .cpu_features = CPU_FTRS_750GX,
243 .cpu_user_features = COMMON_PPC,
244 .icache_bsize = 32,
245 .dcache_bsize = 32,
246 .num_pmcs = 4,
247 .cpu_setup = __setup_cpu_750fx
248 },
249 { /* 740/750 (L2CR bit need fixup for 740) */
250 .pvr_mask = 0xffff0000,
251 .pvr_value = 0x00080000,
252 .cpu_name = "740/750",
253 .cpu_features = CPU_FTRS_740,
254 .cpu_user_features = COMMON_PPC,
255 .icache_bsize = 32,
256 .dcache_bsize = 32,
257 .num_pmcs = 4,
258 .cpu_setup = __setup_cpu_750
259 },
260 { /* 7400 rev 1.1 ? (no TAU) */
261 .pvr_mask = 0xffffffff,
262 .pvr_value = 0x000c1101,
263 .cpu_name = "7400 (1.1)",
264 .cpu_features = CPU_FTRS_7400_NOTAU,
265 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
266 .icache_bsize = 32,
267 .dcache_bsize = 32,
268 .num_pmcs = 4,
269 .cpu_setup = __setup_cpu_7400
270 },
271 { /* 7400 */
272 .pvr_mask = 0xffff0000,
273 .pvr_value = 0x000c0000,
274 .cpu_name = "7400",
275 .cpu_features = CPU_FTRS_7400,
276 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
277 .icache_bsize = 32,
278 .dcache_bsize = 32,
279 .num_pmcs = 4,
280 .cpu_setup = __setup_cpu_7400
281 },
282 { /* 7410 */
283 .pvr_mask = 0xffff0000,
284 .pvr_value = 0x800c0000,
285 .cpu_name = "7410",
286 .cpu_features = CPU_FTRS_7400,
287 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
288 .icache_bsize = 32,
289 .dcache_bsize = 32,
290 .num_pmcs = 4,
291 .cpu_setup = __setup_cpu_7410
292 },
293 { /* 7450 2.0 - no doze/nap */
294 .pvr_mask = 0xffffffff,
295 .pvr_value = 0x80000200,
296 .cpu_name = "7450",
297 .cpu_features = CPU_FTRS_7450_20,
298 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
299 .icache_bsize = 32,
300 .dcache_bsize = 32,
301 .num_pmcs = 6,
302 .cpu_setup = __setup_cpu_745x
303 },
304 { /* 7450 2.1 */
305 .pvr_mask = 0xffffffff,
306 .pvr_value = 0x80000201,
307 .cpu_name = "7450",
308 .cpu_features = CPU_FTRS_7450_21,
309 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
310 .icache_bsize = 32,
311 .dcache_bsize = 32,
312 .num_pmcs = 6,
313 .cpu_setup = __setup_cpu_745x
314 },
315 { /* 7450 2.3 and newer */
316 .pvr_mask = 0xffff0000,
317 .pvr_value = 0x80000000,
318 .cpu_name = "7450",
319 .cpu_features = CPU_FTRS_7450_23,
320 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
321 .icache_bsize = 32,
322 .dcache_bsize = 32,
323 .num_pmcs = 6,
324 .cpu_setup = __setup_cpu_745x
325 },
326 { /* 7455 rev 1.x */
327 .pvr_mask = 0xffffff00,
328 .pvr_value = 0x80010100,
329 .cpu_name = "7455",
330 .cpu_features = CPU_FTRS_7455_1,
331 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
332 .icache_bsize = 32,
333 .dcache_bsize = 32,
334 .num_pmcs = 6,
335 .cpu_setup = __setup_cpu_745x
336 },
337 { /* 7455 rev 2.0 */
338 .pvr_mask = 0xffffffff,
339 .pvr_value = 0x80010200,
340 .cpu_name = "7455",
341 .cpu_features = CPU_FTRS_7455_20,
342 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
343 .icache_bsize = 32,
344 .dcache_bsize = 32,
345 .num_pmcs = 6,
346 .cpu_setup = __setup_cpu_745x
347 },
348 { /* 7455 others */
349 .pvr_mask = 0xffff0000,
350 .pvr_value = 0x80010000,
351 .cpu_name = "7455",
352 .cpu_features = CPU_FTRS_7455,
353 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
354 .icache_bsize = 32,
355 .dcache_bsize = 32,
356 .num_pmcs = 6,
357 .cpu_setup = __setup_cpu_745x
358 },
359 { /* 7447/7457 Rev 1.0 */
360 .pvr_mask = 0xffffffff,
361 .pvr_value = 0x80020100,
362 .cpu_name = "7447/7457",
363 .cpu_features = CPU_FTRS_7447_10,
364 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
365 .icache_bsize = 32,
366 .dcache_bsize = 32,
367 .num_pmcs = 6,
368 .cpu_setup = __setup_cpu_745x
369 },
370 { /* 7447/7457 Rev 1.1 */
371 .pvr_mask = 0xffffffff,
372 .pvr_value = 0x80020101,
373 .cpu_name = "7447/7457",
374 .cpu_features = CPU_FTRS_7447_10,
375 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
376 .icache_bsize = 32,
377 .dcache_bsize = 32,
378 .num_pmcs = 6,
379 .cpu_setup = __setup_cpu_745x
380 },
381 { /* 7447/7457 Rev 1.2 and later */
382 .pvr_mask = 0xffff0000,
383 .pvr_value = 0x80020000,
384 .cpu_name = "7447/7457",
385 .cpu_features = CPU_FTRS_7447,
386 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
387 .icache_bsize = 32,
388 .dcache_bsize = 32,
389 .num_pmcs = 6,
390 .cpu_setup = __setup_cpu_745x
391 },
392 { /* 7447A */
393 .pvr_mask = 0xffff0000,
394 .pvr_value = 0x80030000,
395 .cpu_name = "7447A",
396 .cpu_features = CPU_FTRS_7447A,
397 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
398 .icache_bsize = 32,
399 .dcache_bsize = 32,
400 .num_pmcs = 6,
401 .cpu_setup = __setup_cpu_745x
402 },
403 { /* 7448 */
404 .pvr_mask = 0xffff0000,
405 .pvr_value = 0x80040000,
406 .cpu_name = "7448",
407 .cpu_features = CPU_FTRS_7447A,
408 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
409 .icache_bsize = 32,
410 .dcache_bsize = 32,
411 .num_pmcs = 6,
412 .cpu_setup = __setup_cpu_745x
413 },
414 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
415 .pvr_mask = 0x7fff0000,
416 .pvr_value = 0x00810000,
417 .cpu_name = "82xx",
418 .cpu_features = CPU_FTRS_82XX,
419 .cpu_user_features = COMMON_PPC,
420 .icache_bsize = 32,
421 .dcache_bsize = 32,
422 .cpu_setup = __setup_cpu_603
423 },
424 { /* All G2_LE (603e core, plus some) have the same pvr */
425 .pvr_mask = 0x7fff0000,
426 .pvr_value = 0x00820000,
427 .cpu_name = "G2_LE",
428 .cpu_features = CPU_FTRS_G2_LE,
429 .cpu_user_features = COMMON_PPC,
430 .icache_bsize = 32,
431 .dcache_bsize = 32,
432 .cpu_setup = __setup_cpu_603
433 },
434 { /* e300 (a 603e core, plus some) on 83xx */
435 .pvr_mask = 0x7fff0000,
436 .pvr_value = 0x00830000,
437 .cpu_name = "e300",
438 .cpu_features = CPU_FTRS_E300,
439 .cpu_user_features = COMMON_PPC,
440 .icache_bsize = 32,
441 .dcache_bsize = 32,
442 .cpu_setup = __setup_cpu_603
443 },
444 { /* default match, we assume split I/D cache & TB (non-601)... */
445 .pvr_mask = 0x00000000,
446 .pvr_value = 0x00000000,
447 .cpu_name = "(generic PPC)",
448 .cpu_features = CPU_FTRS_CLASSIC32,
449 .cpu_user_features = COMMON_PPC,
450 .icache_bsize = 32,
451 .dcache_bsize = 32,
452 },
453#endif /* CLASSIC_PPC */
454#ifdef CONFIG_PPC64BRIDGE
455 { /* Power3 */
456 .pvr_mask = 0xffff0000,
457 .pvr_value = 0x00400000,
458 .cpu_name = "Power3 (630)",
459 .cpu_features = CPU_FTRS_POWER3_32,
460 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
461 .icache_bsize = 128,
462 .dcache_bsize = 128,
463 .num_pmcs = 8,
464 },
465 { /* Power3+ */
466 .pvr_mask = 0xffff0000,
467 .pvr_value = 0x00410000,
468 .cpu_name = "Power3 (630+)",
469 .cpu_features = CPU_FTRS_POWER3_32,
470 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
471 .icache_bsize = 128,
472 .dcache_bsize = 128,
473 .num_pmcs = 8,
474 },
475 { /* I-star */
476 .pvr_mask = 0xffff0000,
477 .pvr_value = 0x00360000,
478 .cpu_name = "I-star",
479 .cpu_features = CPU_FTRS_POWER3_32,
480 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
481 .icache_bsize = 128,
482 .dcache_bsize = 128,
483 .num_pmcs = 8,
484 },
485 { /* S-star */
486 .pvr_mask = 0xffff0000,
487 .pvr_value = 0x00370000,
488 .cpu_name = "S-star",
489 .cpu_features = CPU_FTRS_POWER3_32,
490 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
491 .icache_bsize = 128,
492 .dcache_bsize = 128,
493 .num_pmcs = 8,
494 },
495#endif /* CONFIG_PPC64BRIDGE */
496#ifdef CONFIG_POWER4
497 { /* PPC970FX */
498 .pvr_mask = 0xffff0000,
499 .pvr_value = 0x003c0000,
500 .cpu_name = "PPC970FX",
501 .cpu_features = CPU_FTRS_970_32,
502 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC_COMP,
503 .icache_bsize = 128,
504 .dcache_bsize = 128,
505 .num_pmcs = 8,
506 .cpu_setup = __setup_cpu_ppc970
507 },
508#endif /* CONFIG_POWER4 */
509#ifdef CONFIG_8xx
510 { /* 8xx */
511 .pvr_mask = 0xffff0000,
512 .pvr_value = 0x00500000,
513 .cpu_name = "8xx",
514 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
515 * if the 8xx code is there.... */
516 .cpu_features = CPU_FTRS_8XX,
517 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
518 .icache_bsize = 16,
519 .dcache_bsize = 16,
520 },
521#endif /* CONFIG_8xx */
522#ifdef CONFIG_40x
523 { /* 403GC */
524 .pvr_mask = 0xffffff00,
525 .pvr_value = 0x00200200,
526 .cpu_name = "403GC",
527 .cpu_features = CPU_FTRS_40X,
528 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
529 .icache_bsize = 16,
530 .dcache_bsize = 16,
531 },
532 { /* 403GCX */
533 .pvr_mask = 0xffffff00,
534 .pvr_value = 0x00201400,
535 .cpu_name = "403GCX",
536 .cpu_features = CPU_FTRS_40X,
537 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
538 .icache_bsize = 16,
539 .dcache_bsize = 16,
540 },
541 { /* 403G ?? */
542 .pvr_mask = 0xffff0000,
543 .pvr_value = 0x00200000,
544 .cpu_name = "403G ??",
545 .cpu_features = CPU_FTRS_40X,
546 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
547 .icache_bsize = 16,
548 .dcache_bsize = 16,
549 },
550 { /* 405GP */
551 .pvr_mask = 0xffff0000,
552 .pvr_value = 0x40110000,
553 .cpu_name = "405GP",
554 .cpu_features = CPU_FTRS_40X,
555 .cpu_user_features = PPC_FEATURE_32 |
556 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
557 .icache_bsize = 32,
558 .dcache_bsize = 32,
559 },
560 { /* STB 03xxx */
561 .pvr_mask = 0xffff0000,
562 .pvr_value = 0x40130000,
563 .cpu_name = "STB03xxx",
564 .cpu_features = CPU_FTRS_40X,
565 .cpu_user_features = PPC_FEATURE_32 |
566 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
567 .icache_bsize = 32,
568 .dcache_bsize = 32,
569 },
570 { /* STB 04xxx */
571 .pvr_mask = 0xffff0000,
572 .pvr_value = 0x41810000,
573 .cpu_name = "STB04xxx",
574 .cpu_features = CPU_FTRS_40X,
575 .cpu_user_features = PPC_FEATURE_32 |
576 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
577 .icache_bsize = 32,
578 .dcache_bsize = 32,
579 },
580 { /* NP405L */
581 .pvr_mask = 0xffff0000,
582 .pvr_value = 0x41610000,
583 .cpu_name = "NP405L",
584 .cpu_features = CPU_FTRS_40X,
585 .cpu_user_features = PPC_FEATURE_32 |
586 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
587 .icache_bsize = 32,
588 .dcache_bsize = 32,
589 },
590 { /* NP4GS3 */
591 .pvr_mask = 0xffff0000,
592 .pvr_value = 0x40B10000,
593 .cpu_name = "NP4GS3",
594 .cpu_features = CPU_FTRS_40X,
595 .cpu_user_features = PPC_FEATURE_32 |
596 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
597 .icache_bsize = 32,
598 .dcache_bsize = 32,
599 },
600 { /* NP405H */
601 .pvr_mask = 0xffff0000,
602 .pvr_value = 0x41410000,
603 .cpu_name = "NP405H",
604 .cpu_features = CPU_FTRS_40X,
605 .cpu_user_features = PPC_FEATURE_32 |
606 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
607 .icache_bsize = 32,
608 .dcache_bsize = 32,
609 },
610 { /* 405GPr */
611 .pvr_mask = 0xffff0000,
612 .pvr_value = 0x50910000,
613 .cpu_name = "405GPr",
614 .cpu_features = CPU_FTRS_40X,
615 .cpu_user_features = PPC_FEATURE_32 |
616 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
617 .icache_bsize = 32,
618 .dcache_bsize = 32,
619 },
620 { /* STBx25xx */
621 .pvr_mask = 0xffff0000,
622 .pvr_value = 0x51510000,
623 .cpu_name = "STBx25xx",
624 .cpu_features = CPU_FTRS_40X,
625 .cpu_user_features = PPC_FEATURE_32 |
626 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
627 .icache_bsize = 32,
628 .dcache_bsize = 32,
629 },
630 { /* 405LP */
631 .pvr_mask = 0xffff0000,
632 .pvr_value = 0x41F10000,
633 .cpu_name = "405LP",
634 .cpu_features = CPU_FTRS_40X,
635 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
636 .icache_bsize = 32,
637 .dcache_bsize = 32,
638 },
639 { /* Xilinx Virtex-II Pro */
640 .pvr_mask = 0xffff0000,
641 .pvr_value = 0x20010000,
642 .cpu_name = "Virtex-II Pro",
643 .cpu_features = CPU_FTRS_40X,
644 .cpu_user_features = PPC_FEATURE_32 |
645 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
646 .icache_bsize = 32,
647 .dcache_bsize = 32,
648 },
649 { /* 405EP */
650 .pvr_mask = 0xffff0000,
651 .pvr_value = 0x51210000,
652 .cpu_name = "405EP",
653 .cpu_features = CPU_FTRS_40X,
654 .cpu_user_features = PPC_FEATURE_32 |
655 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
656 .icache_bsize = 32,
657 .dcache_bsize = 32,
658 },
659
660#endif /* CONFIG_40x */
661#ifdef CONFIG_44x
662 {
663 .pvr_mask = 0xf0000fff,
664 .pvr_value = 0x40000850,
665 .cpu_name = "440EP Rev. A",
666 .cpu_features = CPU_FTRS_44X,
667 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
668 .icache_bsize = 32,
669 .dcache_bsize = 32,
670 },
671 {
672 .pvr_mask = 0xf0000fff,
673 .pvr_value = 0x400008d3,
674 .cpu_name = "440EP Rev. B",
675 .cpu_features = CPU_FTRS_44X,
676 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
677 .icache_bsize = 32,
678 .dcache_bsize = 32,
679 },
680 { /* 440GP Rev. B */
681 .pvr_mask = 0xf0000fff,
682 .pvr_value = 0x40000440,
683 .cpu_name = "440GP Rev. B",
684 .cpu_features = CPU_FTRS_44X,
685 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
686 .icache_bsize = 32,
687 .dcache_bsize = 32,
688 },
689 { /* 440GP Rev. C */
690 .pvr_mask = 0xf0000fff,
691 .pvr_value = 0x40000481,
692 .cpu_name = "440GP Rev. C",
693 .cpu_features = CPU_FTRS_44X,
694 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
695 .icache_bsize = 32,
696 .dcache_bsize = 32,
697 },
698 { /* 440GX Rev. A */
699 .pvr_mask = 0xf0000fff,
700 .pvr_value = 0x50000850,
701 .cpu_name = "440GX Rev. A",
702 .cpu_features = CPU_FTRS_44X,
703 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
704 .icache_bsize = 32,
705 .dcache_bsize = 32,
706 },
707 { /* 440GX Rev. B */
708 .pvr_mask = 0xf0000fff,
709 .pvr_value = 0x50000851,
710 .cpu_name = "440GX Rev. B",
711 .cpu_features = CPU_FTRS_44X,
712 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
713 .icache_bsize = 32,
714 .dcache_bsize = 32,
715 },
716 { /* 440GX Rev. C */
717 .pvr_mask = 0xf0000fff,
718 .pvr_value = 0x50000892,
719 .cpu_name = "440GX Rev. C",
720 .cpu_features = CPU_FTRS_44X,
721 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
722 .icache_bsize = 32,
723 .dcache_bsize = 32,
724 },
725 { /* 440GX Rev. F */
726 .pvr_mask = 0xf0000fff,
727 .pvr_value = 0x50000894,
728 .cpu_name = "440GX Rev. F",
729 .cpu_features = CPU_FTRS_44X,
730 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
731 .icache_bsize = 32,
732 .dcache_bsize = 32,
733 },
734 { /* 440SP Rev. A */
735 .pvr_mask = 0xff000fff,
736 .pvr_value = 0x53000891,
737 .cpu_name = "440SP Rev. A",
738 .cpu_features = CPU_FTRS_44X,
739 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
740 .icache_bsize = 32,
741 .dcache_bsize = 32,
742 },
743#endif /* CONFIG_44x */
744#ifdef CONFIG_FSL_BOOKE
745 { /* e200z5 */
746 .pvr_mask = 0xfff00000,
747 .pvr_value = 0x81000000,
748 .cpu_name = "e200z5",
749 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
750 .cpu_features = CPU_FTRS_E200,
751 .cpu_user_features = PPC_FEATURE_32 |
752 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
753 PPC_FEATURE_UNIFIED_CACHE,
754 .dcache_bsize = 32,
755 },
756 { /* e200z6 */
757 .pvr_mask = 0xfff00000,
758 .pvr_value = 0x81100000,
759 .cpu_name = "e200z6",
760 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
761 .cpu_features = CPU_FTRS_E200,
762 .cpu_user_features = PPC_FEATURE_32 |
763 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
764 PPC_FEATURE_HAS_EFP_SINGLE |
765 PPC_FEATURE_UNIFIED_CACHE,
766 .dcache_bsize = 32,
767 },
768 { /* e500 */
769 .pvr_mask = 0xffff0000,
770 .pvr_value = 0x80200000,
771 .cpu_name = "e500",
772 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
773 .cpu_features = CPU_FTRS_E500,
774 .cpu_user_features = PPC_FEATURE_32 |
775 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
776 PPC_FEATURE_HAS_EFP_SINGLE,
777 .icache_bsize = 32,
778 .dcache_bsize = 32,
779 .num_pmcs = 4,
780 },
781 { /* e500v2 */
782 .pvr_mask = 0xffff0000,
783 .pvr_value = 0x80210000,
784 .cpu_name = "e500v2",
785 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
786 .cpu_features = CPU_FTRS_E500_2,
787 .cpu_user_features = PPC_FEATURE_32 |
788 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
789 PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,
790 .icache_bsize = 32,
791 .dcache_bsize = 32,
792 .num_pmcs = 4,
793 },
794#endif
795#if !CLASSIC_PPC
796 { /* default match */
797 .pvr_mask = 0x00000000,
798 .pvr_value = 0x00000000,
799 .cpu_name = "(generic PPC)",
800 .cpu_features = CPU_FTRS_GENERIC_32,
801 .cpu_user_features = PPC_FEATURE_32,
802 .icache_bsize = 32,
803 .dcache_bsize = 32,
804 }
805#endif /* !CLASSIC_PPC */
806};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-20 01:08:02 -0500