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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/ppc/kernel/ppc_htab.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/ppc/kernel/ppc_htab.c')
-rw-r--r--arch/ppc/kernel/ppc_htab.c467
1 files changed, 467 insertions, 0 deletions
diff --git a/arch/ppc/kernel/ppc_htab.c b/arch/ppc/kernel/ppc_htab.c
new file mode 100644
index 000000000000..ca810025993f
--- /dev/null
+++ b/arch/ppc/kernel/ppc_htab.c
@@ -0,0 +1,467 @@
1/*
2 * PowerPC hash table management proc entry. Will show information
3 * about the current hash table and will allow changes to it.
4 *
5 * Written by Cort Dougan (cort@cs.nmt.edu)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/config.h>
14#include <linux/errno.h>
15#include <linux/sched.h>
16#include <linux/proc_fs.h>
17#include <linux/stat.h>
18#include <linux/sysctl.h>
19#include <linux/ctype.h>
20#include <linux/threads.h>
21#include <linux/smp_lock.h>
22#include <linux/seq_file.h>
23#include <linux/init.h>
24#include <linux/bitops.h>
25
26#include <asm/uaccess.h>
27#include <asm/mmu.h>
28#include <asm/residual.h>
29#include <asm/io.h>
30#include <asm/pgtable.h>
31#include <asm/cputable.h>
32#include <asm/system.h>
33#include <asm/reg.h>
34
35static int ppc_htab_show(struct seq_file *m, void *v);
36static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
37 size_t count, loff_t *ppos);
38extern PTE *Hash, *Hash_end;
39extern unsigned long Hash_size, Hash_mask;
40extern unsigned long _SDR1;
41extern unsigned long htab_reloads;
42extern unsigned long htab_preloads;
43extern unsigned long htab_evicts;
44extern unsigned long pte_misses;
45extern unsigned long pte_errors;
46extern unsigned int primary_pteg_full;
47extern unsigned int htab_hash_searches;
48
49static int ppc_htab_open(struct inode *inode, struct file *file)
50{
51 return single_open(file, ppc_htab_show, NULL);
52}
53
54struct file_operations ppc_htab_operations = {
55 .open = ppc_htab_open,
56 .read = seq_read,
57 .llseek = seq_lseek,
58 .write = ppc_htab_write,
59 .release = single_release,
60};
61
62static char *pmc1_lookup(unsigned long mmcr0)
63{
64 switch ( mmcr0 & (0x7f<<7) )
65 {
66 case 0x0:
67 return "none";
68 case MMCR0_PMC1_CYCLES:
69 return "cycles";
70 case MMCR0_PMC1_ICACHEMISS:
71 return "ic miss";
72 case MMCR0_PMC1_DTLB:
73 return "dtlb miss";
74 default:
75 return "unknown";
76 }
77}
78
79static char *pmc2_lookup(unsigned long mmcr0)
80{
81 switch ( mmcr0 & 0x3f )
82 {
83 case 0x0:
84 return "none";
85 case MMCR0_PMC2_CYCLES:
86 return "cycles";
87 case MMCR0_PMC2_DCACHEMISS:
88 return "dc miss";
89 case MMCR0_PMC2_ITLB:
90 return "itlb miss";
91 case MMCR0_PMC2_LOADMISSTIME:
92 return "load miss time";
93 default:
94 return "unknown";
95 }
96}
97
98/*
99 * print some useful info about the hash table. This function
100 * is _REALLY_ slow (see the nested for loops below) but nothing
101 * in here should be really timing critical. -- Cort
102 */
103static int ppc_htab_show(struct seq_file *m, void *v)
104{
105 unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
106#if defined(CONFIG_PPC_STD_MMU) && !defined(CONFIG_PPC64BRIDGE)
107 unsigned int kptes = 0, uptes = 0;
108 PTE *ptr;
109#endif /* CONFIG_PPC_STD_MMU */
110
111 if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
112 mmcr0 = mfspr(SPRN_MMCR0);
113 pmc1 = mfspr(SPRN_PMC1);
114 pmc2 = mfspr(SPRN_PMC2);
115 seq_printf(m,
116 "604 Performance Monitoring\n"
117 "MMCR0\t\t: %08lx %s%s ",
118 mmcr0,
119 ( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
120 ( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
121 seq_printf(m,
122 "\nPMC1\t\t: %08lx (%s)\n"
123 "PMC2\t\t: %08lx (%s)\n",
124 pmc1, pmc1_lookup(mmcr0),
125 pmc2, pmc2_lookup(mmcr0));
126 }
127
128#ifdef CONFIG_PPC_STD_MMU
129 /* if we don't have a htab */
130 if ( Hash_size == 0 ) {
131 seq_printf(m, "No Hash Table used\n");
132 return 0;
133 }
134
135#ifndef CONFIG_PPC64BRIDGE
136 for (ptr = Hash; ptr < Hash_end; ptr++) {
137 unsigned int mctx, vsid;
138
139 if (!ptr->v)
140 continue;
141 /* undo the esid skew */
142 vsid = ptr->vsid;
143 mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff;
144 if (mctx == 0)
145 kptes++;
146 else
147 uptes++;
148 }
149#endif
150
151 seq_printf(m,
152 "PTE Hash Table Information\n"
153 "Size\t\t: %luKb\n"
154 "Buckets\t\t: %lu\n"
155 "Address\t\t: %08lx\n"
156 "Entries\t\t: %lu\n"
157#ifndef CONFIG_PPC64BRIDGE
158 "User ptes\t: %u\n"
159 "Kernel ptes\t: %u\n"
160 "Percent full\t: %lu%%\n"
161#endif
162 , (unsigned long)(Hash_size>>10),
163 (Hash_size/(sizeof(PTE)*8)),
164 (unsigned long)Hash,
165 Hash_size/sizeof(PTE)
166#ifndef CONFIG_PPC64BRIDGE
167 , uptes,
168 kptes,
169 ((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
170#endif
171 );
172
173 seq_printf(m,
174 "Reloads\t\t: %lu\n"
175 "Preloads\t: %lu\n"
176 "Searches\t: %u\n"
177 "Overflows\t: %u\n"
178 "Evicts\t\t: %lu\n",
179 htab_reloads, htab_preloads, htab_hash_searches,
180 primary_pteg_full, htab_evicts);
181#endif /* CONFIG_PPC_STD_MMU */
182
183 seq_printf(m,
184 "Non-error misses: %lu\n"
185 "Error misses\t: %lu\n",
186 pte_misses, pte_errors);
187 return 0;
188}
189
190/*
191 * Allow user to define performance counters and resize the hash table
192 */
193static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
194 size_t count, loff_t *ppos)
195{
196#ifdef CONFIG_PPC_STD_MMU
197 unsigned long tmp;
198 char buffer[16];
199
200 if (!capable(CAP_SYS_ADMIN))
201 return -EACCES;
202 if (strncpy_from_user(buffer, ubuffer, 15))
203 return -EFAULT;
204 buffer[15] = 0;
205
206 /* don't set the htab size for now */
207 if ( !strncmp( buffer, "size ", 5) )
208 return -EBUSY;
209
210 if ( !strncmp( buffer, "reset", 5) )
211 {
212 if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
213 /* reset PMC1 and PMC2 */
214 mtspr(SPRN_PMC1, 0);
215 mtspr(SPRN_PMC2, 0);
216 }
217 htab_reloads = 0;
218 htab_evicts = 0;
219 pte_misses = 0;
220 pte_errors = 0;
221 }
222
223 /* Everything below here requires the performance monitor feature. */
224 if (!cpu_has_feature(CPU_FTR_604_PERF_MON))
225 return count;
226
227 /* turn off performance monitoring */
228 if ( !strncmp( buffer, "off", 3) )
229 {
230 mtspr(SPRN_MMCR0, 0);
231 mtspr(SPRN_PMC1, 0);
232 mtspr(SPRN_PMC2, 0);
233 }
234
235 if ( !strncmp( buffer, "user", 4) )
236 {
237 /* setup mmcr0 and clear the correct pmc */
238 tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000;
239 mtspr(SPRN_MMCR0, tmp);
240 mtspr(SPRN_PMC1, 0);
241 mtspr(SPRN_PMC2, 0);
242 }
243
244 if ( !strncmp( buffer, "kernel", 6) )
245 {
246 /* setup mmcr0 and clear the correct pmc */
247 tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000;
248 mtspr(SPRN_MMCR0, tmp);
249 mtspr(SPRN_PMC1, 0);
250 mtspr(SPRN_PMC2, 0);
251 }
252
253 /* PMC1 values */
254 if ( !strncmp( buffer, "dtlb", 4) )
255 {
256 /* setup mmcr0 and clear the correct pmc */
257 tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB;
258 mtspr(SPRN_MMCR0, tmp);
259 mtspr(SPRN_PMC1, 0);
260 }
261
262 if ( !strncmp( buffer, "ic miss", 7) )
263 {
264 /* setup mmcr0 and clear the correct pmc */
265 tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS;
266 mtspr(SPRN_MMCR0, tmp);
267 mtspr(SPRN_PMC1, 0);
268 }
269
270 /* PMC2 values */
271 if ( !strncmp( buffer, "load miss time", 14) )
272 {
273 /* setup mmcr0 and clear the correct pmc */
274 asm volatile(
275 "mfspr %0,%1\n\t" /* get current mccr0 */
276 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
277 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
278 "mtspr %1,%0 \n\t" /* set new mccr0 */
279 "mtspr %3,%4 \n\t" /* reset the pmc */
280 : "=r" (tmp)
281 : "i" (SPRN_MMCR0),
282 "i" (MMCR0_PMC2_LOADMISSTIME),
283 "i" (SPRN_PMC2), "r" (0) );
284 }
285
286 if ( !strncmp( buffer, "itlb", 4) )
287 {
288 /* setup mmcr0 and clear the correct pmc */
289 asm volatile(
290 "mfspr %0,%1\n\t" /* get current mccr0 */
291 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
292 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
293 "mtspr %1,%0 \n\t" /* set new mccr0 */
294 "mtspr %3,%4 \n\t" /* reset the pmc */
295 : "=r" (tmp)
296 : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB),
297 "i" (SPRN_PMC2), "r" (0) );
298 }
299
300 if ( !strncmp( buffer, "dc miss", 7) )
301 {
302 /* setup mmcr0 and clear the correct pmc */
303 asm volatile(
304 "mfspr %0,%1\n\t" /* get current mccr0 */
305 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
306 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
307 "mtspr %1,%0 \n\t" /* set new mccr0 */
308 "mtspr %3,%4 \n\t" /* reset the pmc */
309 : "=r" (tmp)
310 : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS),
311 "i" (SPRN_PMC2), "r" (0) );
312 }
313
314 return count;
315#else /* CONFIG_PPC_STD_MMU */
316 return 0;
317#endif /* CONFIG_PPC_STD_MMU */
318}
319
320int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
321 void __user *buffer_arg, size_t *lenp, loff_t *ppos)
322{
323 int vleft, first=1, len, left, val;
324 char __user *buffer = (char __user *) buffer_arg;
325 #define TMPBUFLEN 256
326 char buf[TMPBUFLEN], *p;
327 static const char *sizestrings[4] = {
328 "2MB", "256KB", "512KB", "1MB"
329 };
330 static const char *clockstrings[8] = {
331 "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
332 "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
333 };
334 static const char *typestrings[4] = {
335 "flow-through burst SRAM", "reserved SRAM",
336 "pipelined burst SRAM", "pipelined late-write SRAM"
337 };
338 static const char *holdstrings[4] = {
339 "0.5", "1.0", "(reserved2)", "(reserved3)"
340 };
341
342 if (!cpu_has_feature(CPU_FTR_L2CR))
343 return -EFAULT;
344
345 if ( /*!table->maxlen ||*/ (*ppos && !write)) {
346 *lenp = 0;
347 return 0;
348 }
349
350 vleft = table->maxlen / sizeof(int);
351 left = *lenp;
352
353 for (; left /*&& vleft--*/; first=0) {
354 if (write) {
355 while (left) {
356 char c;
357 if(get_user(c, buffer))
358 return -EFAULT;
359 if (!isspace(c))
360 break;
361 left--;
362 buffer++;
363 }
364 if (!left)
365 break;
366 len = left;
367 if (len > TMPBUFLEN-1)
368 len = TMPBUFLEN-1;
369 if(copy_from_user(buf, buffer, len))
370 return -EFAULT;
371 buf[len] = 0;
372 p = buf;
373 if (*p < '0' || *p > '9')
374 break;
375 val = simple_strtoul(p, &p, 0);
376 len = p-buf;
377 if ((len < left) && *p && !isspace(*p))
378 break;
379 buffer += len;
380 left -= len;
381 _set_L2CR(val);
382 } else {
383 p = buf;
384 if (!first)
385 *p++ = '\t';
386 val = _get_L2CR();
387 p += sprintf(p, "0x%08x: ", val);
388 p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" :
389 "disabled");
390 p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no ");
391 p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]);
392 p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]);
393 p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]);
394 p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : "");
395 p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": "");
396 p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" :
397 "copy-back");
398 p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : "");
399 p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]);
400 p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : "");
401 p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :"");
402 p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :"");
403
404 p += sprintf(p,"\n");
405
406 len = strlen(buf);
407 if (len > left)
408 len = left;
409 if (copy_to_user(buffer, buf, len))
410 return -EFAULT;
411 left -= len;
412 buffer += len;
413 break;
414 }
415 }
416
417 if (!write && !first && left) {
418 if(put_user('\n', (char __user *) buffer))
419 return -EFAULT;
420 left--, buffer++;
421 }
422 if (write) {
423 char __user *s = (char __user *) buffer;
424 while (left) {
425 char c;
426 if(get_user(c, s++))
427 return -EFAULT;
428 if (!isspace(c))
429 break;
430 left--;
431 }
432 }
433 if (write && first)
434 return -EINVAL;
435 *lenp -= left;
436 *ppos += *lenp;
437 return 0;
438}
439
440#ifdef CONFIG_SYSCTL
441/*
442 * Register our sysctl.
443 */
444static ctl_table htab_ctl_table[]={
445 {
446 .ctl_name = KERN_PPC_L2CR,
447 .procname = "l2cr",
448 .mode = 0644,
449 .proc_handler = &proc_dol2crvec,
450 },
451 { 0, },
452};
453static ctl_table htab_sysctl_root[] = {
454 { 1, "kernel", NULL, 0, 0755, htab_ctl_table, },
455 { 0,},
456};
457
458static int __init
459register_ppc_htab_sysctl(void)
460{
461 register_sysctl_table(htab_sysctl_root, 0);
462
463 return 0;
464}
465
466__initcall(register_ppc_htab_sysctl);
467#endif
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