[PATCH] ppc32: refactor FPU exception handling

Moved common FPU exception handling code out of head.S so it can be used by
several of the sub-architectures that might of a full PowerPC FPU.

Also, uses new CONFIG_PPC_FPU define to fix alignment exception handling
for floating point load/store instructions to only occur if we have a
hardware FPU.

Signed-off-by: Jason McMullan <jason.mcmullan@timesys.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 59 insertions, 0 deletions

diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
index 035217d6c0f1..5f075dbc4ee7 100644
--- a/arch/ppc/kernel/entry.S
+++ b/arch/ppc/kernel/entry.S
@@ -563,6 +563,65 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
         addi    r1,r1,INT_FRAME_SIZE
         blr
 
+        .globl  fast_exception_return
+fast_exception_return:
+#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
+        andi.   r10,r9,MSR_RI           /* check for recoverable interrupt */
+        beq     1f                      /* if not, we've got problems */
+#endif
+
+2:      REST_4GPRS(3, r11)
+        lwz     r10,_CCR(r11)
+        REST_GPR(1, r11)
+        mtcr    r10
+        lwz     r10,_LINK(r11)
+        mtlr    r10
+        REST_GPR(10, r11)
+        mtspr   SPRN_SRR1,r9
+        mtspr   SPRN_SRR0,r12
+        REST_GPR(9, r11)
+        REST_GPR(12, r11)
+        lwz     r11,GPR11(r11)
+        SYNC
+        RFI
+
+#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
+/* check if the exception happened in a restartable section */
+1:      lis     r3,exc_exit_restart_end@ha
+        addi    r3,r3,exc_exit_restart_end@l
+        cmplw   r12,r3
+        bge     3f
+        lis     r4,exc_exit_restart@ha
+        addi    r4,r4,exc_exit_restart@l
+        cmplw   r12,r4
+        blt     3f
+        lis     r3,fee_restarts@ha
+        tophys(r3,r3)
+        lwz     r5,fee_restarts@l(r3)
+        addi    r5,r5,1
+        stw     r5,fee_restarts@l(r3)
+        mr      r12,r4          /* restart at exc_exit_restart */
+        b       2b
+
+        .comm   fee_restarts,4
+
+/* aargh, a nonrecoverable interrupt, panic */
+/* aargh, we don't know which trap this is */
+/* but the 601 doesn't implement the RI bit, so assume it's OK */
+3:
+BEGIN_FTR_SECTION
+        b       2b
+END_FTR_SECTION_IFSET(CPU_FTR_601)
+        li      r10,-1
+        stw     r10,TRAP(r11)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        lis     r10,MSR_KERNEL@h
+        ori     r10,r10,MSR_KERNEL@l
+        bl      transfer_to_handler_full
+        .long   nonrecoverable_exception
+        .long   ret_from_except
+#endif
+
         .globl  sigreturn_exit
 sigreturn_exit:
         subi    r1,r3,STACK_FRAME_OVERHEAD