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author | Stephen Rothwell <sfr@canb.auug.org.au> | 2005-10-16 21:50:32 -0400 |
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committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2005-10-16 21:50:32 -0400 |
commit | 7dffb72028bfd909ac51a1546d182de2df4d2426 (patch) | |
tree | c465c35642872973543f710f8aa06b955b84f7e5 /arch/ppc/kernel/cpu_setup_power4.S | |
parent | cf764855620aa1aa5b134687ca18b841ac9be4c7 (diff) |
ppc32: use L1_CACHE_SHIFT/L1_CACHE_BYTES
instead of L1_CACHE_LINE_SIZE and LG_L1_CACHE_LINE_SIZE
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'arch/ppc/kernel/cpu_setup_power4.S')
-rw-r--r-- | arch/ppc/kernel/cpu_setup_power4.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/ppc/kernel/cpu_setup_power4.S b/arch/ppc/kernel/cpu_setup_power4.S index 0abb5f25b2ca..d7bfd60e21fc 100644 --- a/arch/ppc/kernel/cpu_setup_power4.S +++ b/arch/ppc/kernel/cpu_setup_power4.S | |||
@@ -86,10 +86,10 @@ _GLOBAL(__setup_cpu_ppc970) | |||
86 | #define CS_SIZE 32 | 86 | #define CS_SIZE 32 |
87 | 87 | ||
88 | .data | 88 | .data |
89 | .balign L1_CACHE_LINE_SIZE | 89 | .balign L1_CACHE_BYTES |
90 | cpu_state_storage: | 90 | cpu_state_storage: |
91 | .space CS_SIZE | 91 | .space CS_SIZE |
92 | .balign L1_CACHE_LINE_SIZE,0 | 92 | .balign L1_CACHE_BYTES,0 |
93 | .text | 93 | .text |
94 | 94 | ||
95 | /* Called in normal context to backup CPU 0 state. This | 95 | /* Called in normal context to backup CPU 0 state. This |