[PATCH] ppc: L2 cache prefetch fixes on 745x

We run into problems if we blindly enable L2 prefetching without
checking that the L2 cache is actually enabled.  Additionaly, if we
disable the L2 cache we need to ensure that we disable L2 prefetching.

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 4 insertions, 1 deletions

diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S
index 468721d9ebd2..3fb1fb619d2c 100644
--- a/arch/ppc/kernel/cpu_setup_6xx.S
+++ b/arch/ppc/kernel/cpu_setup_6xx.S
@@ -249,8 +249,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM)
         sync
         isync
 
-        /* Enable L2 HW prefetch
+        /* Enable L2 HW prefetch, if L2 is enabled
          */
+        mfspr   r3,SPRN_L2CR
+        andis.  r3,r3,L2CR_L2E@h
+        beqlr
         mfspr   r3,SPRN_MSSCR0
         ori     r3,r3,3
         sync