[PATCH] ppc32: refactor FPU exception handling

Moved common FPU exception handling code out of head.S so it can be used by
several of the sub-architectures that might of a full PowerPC FPU.

Also, uses new CONFIG_PPC_FPU define to fix alignment exception handling
for floating point load/store instructions to only occur if we have a
hardware FPU.

Signed-off-by: Jason McMullan <jason.mcmullan@timesys.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 8 insertions, 0 deletions

diff --git a/arch/ppc/kernel/align.c b/arch/ppc/kernel/align.c
index 79c929475037..40d356c66c41 100644
--- a/arch/ppc/kernel/align.c
+++ b/arch/ppc/kernel/align.c
@@ -368,16 +368,24 @@ fix_alignment(struct pt_regs *regs)
 
         /* Single-precision FP load and store require conversions... */
         case LD+F+S:
+#ifdef CONFIG_PPC_FPU
                 preempt_disable();
                 enable_kernel_fp();
                 cvt_fd(&data.f, &data.d, &current->thread.fpscr);
                 preempt_enable();
+#else
+                return 0;
+#endif
                 break;
         case ST+F+S:
+#ifdef CONFIG_PPC_FPU
                 preempt_disable();
                 enable_kernel_fp();
                 cvt_df(&data.d, &data.f, &current->thread.fpscr);
                 preempt_enable();
+#else
+                return 0;
+#endif
                 break;
         }