diff options
author | Marcelo Tosatti <marcelo.tosatti@cyclades.com> | 2005-10-28 20:46:10 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2005-10-28 23:55:27 -0400 |
commit | e37b0c9670fed2264661ade1beb5c228dec29c96 (patch) | |
tree | 4f23bc5ea578db11de39222aa046804ed9286782 /arch/ppc/8xx_io | |
parent | 9e3699ea7b8d63eabde7fefa9892e3a258c9c27d (diff) |
[PATCH] ppc32 8xx: use io accessor macros instead of direct memory reference
Convert core 8xx drivers to use in_xxxbe/in_xxx macros instead of direct
memory references.
Other than making IO accesses explicit (which is a plus for readability), a
common set of macros provides a unified place for the volatile flag to
constraint compiler code reordering.
There are several unlucky places at the moment which lack the volatile
flag.
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/ppc/8xx_io')
-rw-r--r-- | arch/ppc/8xx_io/commproc.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c index 11726e2a4ec8..b42789f8eb76 100644 --- a/arch/ppc/8xx_io/commproc.c +++ b/arch/ppc/8xx_io/commproc.c | |||
@@ -73,7 +73,7 @@ cpm_mask_irq(unsigned int irq) | |||
73 | { | 73 | { |
74 | int cpm_vec = irq - CPM_IRQ_OFFSET; | 74 | int cpm_vec = irq - CPM_IRQ_OFFSET; |
75 | 75 | ||
76 | ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << cpm_vec); | 76 | out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) & ~(1 << cpm_vec)); |
77 | } | 77 | } |
78 | 78 | ||
79 | static void | 79 | static void |
@@ -81,7 +81,7 @@ cpm_unmask_irq(unsigned int irq) | |||
81 | { | 81 | { |
82 | int cpm_vec = irq - CPM_IRQ_OFFSET; | 82 | int cpm_vec = irq - CPM_IRQ_OFFSET; |
83 | 83 | ||
84 | ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr |= (1 << cpm_vec); | 84 | out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) | (1 << cpm_vec)); |
85 | } | 85 | } |
86 | 86 | ||
87 | static void | 87 | static void |
@@ -95,7 +95,7 @@ cpm_eoi(unsigned int irq) | |||
95 | { | 95 | { |
96 | int cpm_vec = irq - CPM_IRQ_OFFSET; | 96 | int cpm_vec = irq - CPM_IRQ_OFFSET; |
97 | 97 | ||
98 | ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr = (1 << cpm_vec); | 98 | out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr, (1 << cpm_vec)); |
99 | } | 99 | } |
100 | 100 | ||
101 | struct hw_interrupt_type cpm_pic = { | 101 | struct hw_interrupt_type cpm_pic = { |
@@ -133,7 +133,7 @@ m8xx_cpm_reset(void) | |||
133 | * manual recommends it. | 133 | * manual recommends it. |
134 | * Bit 25, FAM can also be set to use FEC aggressive mode (860T). | 134 | * Bit 25, FAM can also be set to use FEC aggressive mode (860T). |
135 | */ | 135 | */ |
136 | imp->im_siu_conf.sc_sdcr = 1; | 136 | out_be32(&imp->im_siu_conf.sc_sdcr, 1), |
137 | 137 | ||
138 | /* Reclaim the DP memory for our use. */ | 138 | /* Reclaim the DP memory for our use. */ |
139 | m8xx_cpm_dpinit(); | 139 | m8xx_cpm_dpinit(); |
@@ -178,10 +178,10 @@ cpm_interrupt_init(void) | |||
178 | 178 | ||
179 | /* Initialize the CPM interrupt controller. | 179 | /* Initialize the CPM interrupt controller. |
180 | */ | 180 | */ |
181 | ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr = | 181 | out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, |
182 | (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | | 182 | (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | |
183 | ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK; | 183 | ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK); |
184 | ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0; | 184 | out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, 0); |
185 | 185 | ||
186 | /* install the CPM interrupt controller routines for the CPM | 186 | /* install the CPM interrupt controller routines for the CPM |
187 | * interrupt vectors | 187 | * interrupt vectors |
@@ -198,7 +198,7 @@ cpm_interrupt_init(void) | |||
198 | if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction)) | 198 | if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction)) |
199 | panic("Could not allocate CPM error IRQ!"); | 199 | panic("Could not allocate CPM error IRQ!"); |
200 | 200 | ||
201 | ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN; | 201 | out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr) | CICR_IEN); |
202 | } | 202 | } |
203 | 203 | ||
204 | /* | 204 | /* |
@@ -212,8 +212,8 @@ cpm_get_irq(struct pt_regs *regs) | |||
212 | /* Get the vector by setting the ACK bit and then reading | 212 | /* Get the vector by setting the ACK bit and then reading |
213 | * the register. | 213 | * the register. |
214 | */ | 214 | */ |
215 | ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr = 1; | 215 | out_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr, 1); |
216 | cpm_vec = ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr; | 216 | cpm_vec = in_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr); |
217 | cpm_vec >>= 11; | 217 | cpm_vec >>= 11; |
218 | 218 | ||
219 | return cpm_vec; | 219 | return cpm_vec; |