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authorLinus Torvalds <torvalds@linux-foundation.org>2008-04-25 15:52:16 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-25 15:52:16 -0400
commitb9fa38f75ea7e1f64bc29653ca9758303ce698e4 (patch)
tree6f6c0232ccbd9c27c923cf5cdcb0a3948e061aa9 /arch/ppc/8xx_io/enet.c
parent6e18933f2b6156d0a0ec9d5522ab6a6033cf7241 (diff)
parentf360bf0015e5b3e82be61c68e0863b3f98852ee2 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (49 commits) [POWERPC] Add zImage.iseries to arch/powerpc/boot/.gitignore [POWERPC] bootwrapper: fix build error on virtex405-head.S [POWERPC] 4xx: Fix 460GT support to not enable FPU [POWERPC] 4xx: Add NOR FLASH entries to Canyonlands and Glacier dts [POWERPC] Xilinx: of_serial support for Xilinx uart 16550. [POWERPC] Xilinx: boot support for Xilinx uart 16550. [POWERPC] celleb: Add support for PCI Express [POWERPC] celleb: Move miscellaneous files for Beat [POWERPC] celleb: Move a file for SPU on Beat [POWERPC] celleb: Move files for Beat mmu and iommu [POWERPC] celleb: Move files for Beat hvcall interfaces [POWERPC] celleb: Move the SCC related code for celleb [POWERPC] celleb: Move the files for celleb base support [POWERPC] celleb: Consolidate io-workarounds code [POWERPC] cell: Generalize io-workarounds code [POWERPC] Add CONFIG_PPC_PSERIES_DEBUG to enable debugging for platforms/pseries [POWERPC] Convert from DBG() to pr_debug() in platforms/pseries/ [POWERPC] Register udbg console early on pseries LPAR [POWERPC] Mark udbg console as CON_ANYTIME, ie. callable early in boot [POWERPC] Set udbg_console index to 0 ...
Diffstat (limited to 'arch/ppc/8xx_io/enet.c')
-rw-r--r--arch/ppc/8xx_io/enet.c23
1 files changed, 0 insertions, 23 deletions
diff --git a/arch/ppc/8xx_io/enet.c b/arch/ppc/8xx_io/enet.c
index c6d047ae77ac..5899aea1644b 100644
--- a/arch/ppc/8xx_io/enet.c
+++ b/arch/ppc/8xx_io/enet.c
@@ -946,29 +946,6 @@ static int __init scc_enet_init(void)
946 *((volatile uint *)BCSR1) &= ~BCSR1_ETHEN; 946 *((volatile uint *)BCSR1) &= ~BCSR1_ETHEN;
947#endif 947#endif
948 948
949#ifdef CONFIG_MPC885ADS
950
951 /* Deassert PHY reset and enable the PHY.
952 */
953 {
954 volatile uint __iomem *bcsr = ioremap(BCSR_ADDR, BCSR_SIZE);
955 uint tmp;
956
957 tmp = in_be32(bcsr + 1 /* BCSR1 */);
958 tmp |= BCSR1_ETHEN;
959 out_be32(bcsr + 1, tmp);
960 tmp = in_be32(bcsr + 4 /* BCSR4 */);
961 tmp |= BCSR4_ETH10_RST;
962 out_be32(bcsr + 4, tmp);
963 iounmap(bcsr);
964 }
965
966 /* On MPC885ADS SCC ethernet PHY defaults to the full duplex mode
967 * upon reset. SCC is set to half duplex by default. So this
968 * inconsistency should be better fixed by the software.
969 */
970#endif
971
972 dev->base_addr = (unsigned long)ep; 949 dev->base_addr = (unsigned long)ep;
973#if 0 950#if 0
974 dev->name = "CPM_ENET"; 951 dev->name = "CPM_ENET";