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authorDavid Gibson <david@gibson.dropbear.id.au>2007-05-08 00:09:18 -0400
committerPaul Mackerras <paulus@samba.org>2007-05-08 00:43:59 -0400
commitea20ff5d0338a0fbd78783df657f94ffa7967dd9 (patch)
treeecfc819439de45b220e094f06f10a1b716e6607e /arch/powerpc
parent2cd976477035716af52a6eff6625f32e5813c02b (diff)
[POWERPC] Add device tree for Ebony
Add a device tree for the Ebony evaluation board (440GP based). This tree is not complete or finalized. This tree needs a version of dtc recent enough to include reference-to-labels to process. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/boot/dts/ebony.dts307
1 files changed, 307 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts
new file mode 100644
index 000000000000..b67918651c48
--- /dev/null
+++ b/arch/powerpc/boot/dts/ebony.dts
@@ -0,0 +1,307 @@
1/*
2 * Device Tree Source for IBM Ebony
3 *
4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 *
13 * To build:
14 * dtc -I dts -O asm -o ebony.S -b 0 ebony.dts
15 * dtc -I dts -O dtb -o ebony.dtb -b 0 ebony.dts
16 */
17
18/ {
19 #address-cells = <2>;
20 #size-cells = <1>;
21 model = "ibm,ebony";
22 compatible = "ibm,ebony";
23 dcr-parent = <&/cpus/PowerPC,440GP@0>;
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 PowerPC,440GP@0 {
30 device_type = "cpu";
31 reg = <0>;
32 clock-frequency = <0>; // Filled in by zImage
33 timebase-frequency = <0>; // Filled in by zImage
34 i-cache-line-size = <32>;
35 d-cache-line-size = <32>;
36 i-cache-size = <0>;
37 d-cache-size = <0>;
38 dcr-controller;
39 dcr-access-method = "native";
40 };
41 };
42
43 memory {
44 device_type = "memory";
45 reg = <0 0 0>; // Filled in by zImage
46 };
47
48 UIC0: interrupt-controller0 {
49 device_type = "ibm,uic";
50 compatible = "ibm,uic-440gp", "ibm,uic";
51 interrupt-controller;
52 cell-index = <0>;
53 dcr-reg = <0c0 009>;
54 #address-cells = <0>;
55 #size-cells = <0>;
56 #interrupt-cells = <2>;
57
58 };
59
60 UIC1: interrupt-controller1 {
61 device_type = "ibm,uic";
62 compatible = "ibm,uic-440gp", "ibm,uic";
63 interrupt-controller;
64 cell-index = <1>;
65 dcr-reg = <0d0 009>;
66 #address-cells = <0>;
67 #size-cells = <0>;
68 #interrupt-cells = <2>;
69 interrupts = <1e 4 1f 4>; /* cascade */
70 interrupt-parent = <&UIC0>;
71 };
72
73 CPC0: cpc {
74 device_type = "ibm,cpc";
75 compatible = "ibm,cpc-440gp";
76 dcr-reg = <0b0 003 0e0 010>;
77 // FIXME: anything else?
78 };
79
80 plb {
81 device_type = "ibm,plb";
82 compatible = "ibm,plb-440gp", "ibm,plb4";
83 #address-cells = <2>;
84 #size-cells = <1>;
85 ranges;
86 clock-frequency = <0>; // Filled in by zImage
87
88 SDRAM0: sdram {
89 device_type = "memory-controller";
90 compatible = "ibm,sdram-440gp", "ibm,sdram";
91 dcr-reg = <010 2>;
92 // FIXME: anything else?
93 };
94
95 DMA0: dma {
96 // FIXME: ???
97 device_type = "ibm,dma-4xx";
98 compatible = "ibm,dma-440gp", "ibm,dma-4xx";
99 dcr-reg = <100 027>;
100 };
101
102 MAL0: mcmal {
103 device_type = "mcmal-dma";
104 compatible = "ibm,mcmal-440gp", "ibm,mcmal";
105 dcr-reg = <180 62>;
106 num-tx-chans = <4>;
107 num-rx-chans = <4>;
108 interrupt-parent = <&MAL0>;
109 interrupts = <0 1 2 3 4>;
110 #interrupt-cells = <1>;
111 #address-cells = <0>;
112 #size-cells = <0>;
113 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
114 /*RXEOB*/ 1 &UIC0 b 4
115 /*SERR*/ 2 &UIC1 0 4
116 /*TXDE*/ 3 &UIC1 1 4
117 /*RXDE*/ 4 &UIC1 2 4>;
118 interrupt-map-mask = <ffffffff>;
119 };
120
121 POB0: opb {
122 device_type = "ibm,opb";
123 compatible = "ibm,opb-440gp", "ibm,opb";
124 #address-cells = <1>;
125 #size-cells = <1>;
126 /* Wish there was a nicer way of specifying a full 32-bit
127 range */
128 ranges = <00000000 1 00000000 80000000
129 80000000 1 80000000 80000000>;
130 dcr-reg = <090 00b>;
131 interrupt-parent = <&UIC1>;
132 interrupts = <7 4>;
133 clock-frequency = <0>; // Filled in by zImage
134
135 EBC0: ebc {
136 device_type = "ibm,ebc";
137 compatible = "ibm,ebc-440gp";
138 dcr-reg = <012 2>;
139 #address-cells = <2>;
140 #size-cells = <1>;
141 clock-frequency = <0>; // Filled in by zImage
142 ranges = <0 00000000 fff00000 100000
143 1 00000000 48000000 100000
144 2 00000000 ff800000 400000
145 3 00000000 48200000 100000
146 7 00000000 48300000 100000>;
147 interrupts = <5 4>;
148 interrupt-parent = <&UIC1>;
149
150 small-flash@0,0 {
151 device_type = "rom";
152 compatible = "direct-mapped";
153 probe-type = "JEDEC";
154 bank-width = <1>;
155 partitions = <0 80000>;
156 partition-names = "OpenBIOS";
157 reg = <0 80000 80000>;
158 };
159
160 ds1743@1,0 {
161 /* NVRAM & RTC */
162 device_type = "nvram";
163 compatible = "ds1743";
164 reg = <1 0 2000>;
165 };
166
167 large-flash@2,0 {
168 device_type = "rom";
169 compatible = "direct-mapped";
170 probe-type = "JEDEC";
171 bank-width = <1>;
172 partitions = <0 380000
173 280000 80000>;
174 partition-names = "fs", "firmware";
175 reg = <2 0 400000>;
176 };
177
178 ir@3,0 {
179 reg = <3 0 10>;
180 };
181
182 fpga@7,0 {
183 compatible = "Ebony-FPGA";
184 reg = <7 0 10>;
185 };
186 };
187
188 UART0: serial@40000200 {
189 device_type = "serial";
190 compatible = "ns16550";
191 reg = <40000200 8>;
192 virtual-reg = <e0000200>;
193 clock-frequency = <A8C000>;
194 current-speed = <2580>;
195 interrupt-parent = <&UIC0>;
196 interrupts = <0 4>;
197 };
198
199 UART1: serial@40000300 {
200 device_type = "serial";
201 compatible = "ns16550";
202 reg = <40000300 8>;
203 virtual-reg = <e0000300>;
204 clock-frequency = <A8C000>;
205 current-speed = <2580>;
206 interrupt-parent = <&UIC0>;
207 interrupts = <1 4>;
208 };
209
210 IIC0: i2c@40000400 {
211 /* FIXME */
212 device_type = "i2c";
213 compatible = "ibm,iic-440gp", "ibm,iic";
214 reg = <40000400 14>;
215 interrupt-parent = <&UIC0>;
216 interrupts = <2 4>;
217 };
218 IIC1: i2c@40000500 {
219 /* FIXME */
220 device_type = "i2c";
221 compatible = "ibm,iic-440gp", "ibm,iic";
222 reg = <40000500 14>;
223 interrupt-parent = <&UIC0>;
224 interrupts = <3 4>;
225 };
226
227 GPIO0: gpio@40000700 {
228 /* FIXME */
229 device_type = "gpio";
230 compatible = "ibm,gpio-440gp";
231 reg = <40000700 20>;
232 };
233
234 ZMII0: emac-zmii@40000780 {
235 device_type = "emac-zmii";
236 compatible = "ibm,zmii-440gp", "ibm,zmii";
237 reg = <40000780 c>;
238 };
239
240 EMAC0: ethernet@40000800 {
241 linux,network-index = <0>;
242 device_type = "network";
243 compatible = "ibm,emac-440gp", "ibm,emac";
244 interrupt-parent = <&UIC1>;
245 interrupts = <1c 4 1d 4>;
246 reg = <40000800 70>;
247 local-mac-address = [000000000000]; // Filled in by zImage
248 mal-device = <&MAL0>;
249 mal-tx-channel = <0 1>;
250 mal-rx-channel = <0>;
251 cell-index = <0>;
252 max-frame-size = <5dc>;
253 rx-fifo-size = <1000>;
254 tx-fifo-size = <800>;
255 phy-mode = "rmii";
256 phy-map = <00000001>;
257 zmii-device = <&ZMII0>;
258 zmii-channel = <0>;
259 };
260 EMAC1: ethernet@40000900 {
261 linux,network-index = <1>;
262 device_type = "network";
263 compatible = "ibm,emac-440gp", "ibm,emac";
264 interrupt-parent = <&UIC1>;
265 interrupts = <1e 4 1f 4>;
266 reg = <40000900 70>;
267 local-mac-address = [000000000000]; // Filled in by zImage
268 mal-device = <&MAL0>;
269 mal-tx-channel = <2 3>;
270 mal-rx-channel = <1>;
271 cell-index = <1>;
272 max-frame-size = <5dc>;
273 rx-fifo-size = <1000>;
274 tx-fifo-size = <800>;
275 phy-mode = "rmii";
276 phy-map = <00000001>;
277 zmii-device = <&ZMII0>;
278 zmii-channel = <1>;
279 };
280
281
282 GPT0: gpt@40000a00 {
283 /* FIXME */
284 reg = <40000a00 d4>;
285 interrupt-parent = <&UIC0>;
286 interrupts = <12 4 13 4 14 4 15 4 16 4>;
287 };
288
289 };
290
291 PCIX0: pci@1234 {
292 device_type = "pci";
293 /* FIXME */
294 reg = <2 0ec00000 8
295 2 0ec80000 f0
296 2 0ec80100 fc>;
297 };
298 };
299
300 chosen {
301 linux,stdout-path = "/plb/opb/serial@40000200";
302// linux,initrd-start = <0>; /* FIXME */
303// linux,initrd-end = <0>;
304// bootargs = "";
305 };
306};
307