diff options
author | Michael Neuling <mikey@neuling.org> | 2012-11-04 22:40:18 -0500 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-11-14 23:08:05 -0500 |
commit | f7c32c24f5788798f17d4e520a5d238335a859cb (patch) | |
tree | 4c9882d2a9de659c694b8f80a3633dddd8a287a1 /arch/powerpc | |
parent | c1fb6816fb1b78dd94b673b0fdaa9a7a16e97bd1 (diff) |
powerpc: Move initial mfspr LPCR out of __init_LPCR
We want to change what's initially set in the LPCR, so start by taking the move
from LPCR out of the function and into the caller.
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/kernel/cpu_setup_power.S | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S index a92101d14b4e..52dd03396c5d 100644 --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S | |||
@@ -27,6 +27,7 @@ _GLOBAL(__setup_cpu_power7) | |||
27 | beqlr | 27 | beqlr |
28 | li r0,0 | 28 | li r0,0 |
29 | mtspr SPRN_LPID,r0 | 29 | mtspr SPRN_LPID,r0 |
30 | mfspr r3,SPRN_LPCR | ||
30 | bl __init_LPCR | 31 | bl __init_LPCR |
31 | bl __init_TLB | 32 | bl __init_TLB |
32 | mtlr r11 | 33 | mtlr r11 |
@@ -39,6 +40,7 @@ _GLOBAL(__restore_cpu_power7) | |||
39 | beqlr | 40 | beqlr |
40 | li r0,0 | 41 | li r0,0 |
41 | mtspr SPRN_LPID,r0 | 42 | mtspr SPRN_LPID,r0 |
43 | mfspr r3,SPRN_LPCR | ||
42 | bl __init_LPCR | 44 | bl __init_LPCR |
43 | bl __init_TLB | 45 | bl __init_TLB |
44 | mtlr r11 | 46 | mtlr r11 |
@@ -51,6 +53,7 @@ _GLOBAL(__setup_cpu_power8) | |||
51 | beqlr | 53 | beqlr |
52 | li r0,0 | 54 | li r0,0 |
53 | mtspr SPRN_LPID,r0 | 55 | mtspr SPRN_LPID,r0 |
56 | mfspr r3,SPRN_LPCR | ||
54 | bl __init_LPCR | 57 | bl __init_LPCR |
55 | bl __init_TLB | 58 | bl __init_TLB |
56 | mtlr r11 | 59 | mtlr r11 |
@@ -63,6 +66,7 @@ _GLOBAL(__restore_cpu_power8) | |||
63 | beqlr | 66 | beqlr |
64 | li r0,0 | 67 | li r0,0 |
65 | mtspr SPRN_LPID,r0 | 68 | mtspr SPRN_LPID,r0 |
69 | mfspr r3,SPRN_LPCR | ||
66 | bl __init_LPCR | 70 | bl __init_LPCR |
67 | bl __init_TLB | 71 | bl __init_TLB |
68 | mtlr r11 | 72 | mtlr r11 |
@@ -81,6 +85,7 @@ __init_hvmode_206: | |||
81 | 85 | ||
82 | __init_LPCR: | 86 | __init_LPCR: |
83 | /* Setup a sane LPCR: | 87 | /* Setup a sane LPCR: |
88 | * Called with initial LPCR in R3 | ||
84 | * | 89 | * |
85 | * LPES = 0b01 (HSRR0/1 used for 0x500) | 90 | * LPES = 0b01 (HSRR0/1 used for 0x500) |
86 | * PECE = 0b111 | 91 | * PECE = 0b111 |
@@ -91,7 +96,6 @@ __init_LPCR: | |||
91 | * | 96 | * |
92 | * Other bits untouched for now | 97 | * Other bits untouched for now |
93 | */ | 98 | */ |
94 | mfspr r3,SPRN_LPCR | ||
95 | li r5,1 | 99 | li r5,1 |
96 | rldimi r3,r5, LPCR_LPES_SH, 64-LPCR_LPES_SH-2 | 100 | rldimi r3,r5, LPCR_LPES_SH, 64-LPCR_LPES_SH-2 |
97 | ori r3,r3,(LPCR_PECE0|LPCR_PECE1|LPCR_PECE2) | 101 | ori r3,r3,(LPCR_PECE0|LPCR_PECE1|LPCR_PECE2) |