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authorTimur Tabi <timur@freescale.com>2011-07-09 16:38:14 -0400
committerPaul Mundt <lethal@linux-sh.org>2011-07-13 04:01:39 -0400
commit7653aaab775d4c205a7dce52850c8e3d4f31d4ea (patch)
tree882f66ade2dc625c5f836a83f83a433fe679fbc3 /arch/powerpc
parentc6daf05b6d7afca4c9e04a7361e284ef9e1d8dad (diff)
drivers/video: use strings to specify the Freescale DIU monitor port
Instead of using ill-defined numbers (0, 1, and 2) for the monitor port, allow the user to specify the port by name ("dvi", "lvds", or "dlvds"). This works on the kernel command line, the module command-line, and the sysfs "monitor" device. Note that changing the monitor port does not currently work on the P1022DS, because the code that talks to the PIXIS FPGA is broken. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/platforms/512x/mpc512x_shared.c22
-rw-r--r--arch/powerpc/platforms/85xx/p1022_ds.c47
-rw-r--r--arch/powerpc/platforms/86xx/mpc8610_hpcd.c55
-rw-r--r--arch/powerpc/sysdev/fsl_soc.h25
4 files changed, 73 insertions, 76 deletions
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index e41ebbdb3e12..3dc62f907a1e 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -66,8 +66,8 @@ struct fsl_diu_shared_fb {
66 bool in_use; 66 bool in_use;
67}; 67};
68 68
69unsigned int mpc512x_get_pixel_format(unsigned int bits_per_pixel, 69u32 mpc512x_get_pixel_format(enum fsl_diu_monitor_port port,
70 int monitor_port) 70 unsigned int bits_per_pixel)
71{ 71{
72 switch (bits_per_pixel) { 72 switch (bits_per_pixel) {
73 case 32: 73 case 32:
@@ -80,11 +80,12 @@ unsigned int mpc512x_get_pixel_format(unsigned int bits_per_pixel,
80 return 0x00000400; 80 return 0x00000400;
81} 81}
82 82
83void mpc512x_set_gamma_table(int monitor_port, char *gamma_table_base) 83void mpc512x_set_gamma_table(enum fsl_diu_monitor_port port,
84 char *gamma_table_base)
84{ 85{
85} 86}
86 87
87void mpc512x_set_monitor_port(int monitor_port) 88void mpc512x_set_monitor_port(enum fsl_diu_monitor_port port)
88{ 89{
89} 90}
90 91
@@ -182,14 +183,10 @@ void mpc512x_set_pixel_clock(unsigned int pixclock)
182 iounmap(ccm); 183 iounmap(ccm);
183} 184}
184 185
185ssize_t mpc512x_show_monitor_port(int monitor_port, char *buf) 186enum fsl_diu_monitor_port
187mpc512x_valid_monitor_port(enum fsl_diu_monitor_port port)
186{ 188{
187 return sprintf(buf, "0 - 5121 LCD\n"); 189 return FSL_DIU_PORT_DVI;
188}
189
190int mpc512x_set_sysfs_monitor_port(int val)
191{
192 return 0;
193} 190}
194 191
195static struct fsl_diu_shared_fb __attribute__ ((__aligned__(8))) diu_shared_fb; 192static struct fsl_diu_shared_fb __attribute__ ((__aligned__(8))) diu_shared_fb;
@@ -332,8 +329,7 @@ void __init mpc512x_setup_diu(void)
332 diu_ops.set_gamma_table = mpc512x_set_gamma_table; 329 diu_ops.set_gamma_table = mpc512x_set_gamma_table;
333 diu_ops.set_monitor_port = mpc512x_set_monitor_port; 330 diu_ops.set_monitor_port = mpc512x_set_monitor_port;
334 diu_ops.set_pixel_clock = mpc512x_set_pixel_clock; 331 diu_ops.set_pixel_clock = mpc512x_set_pixel_clock;
335 diu_ops.show_monitor_port = mpc512x_show_monitor_port; 332 diu_ops.valid_monitor_port = mpc512x_valid_monitor_port;
336 diu_ops.set_sysfs_monitor_port = mpc512x_set_sysfs_monitor_port;
337 diu_ops.release_bootmem = mpc512x_release_bootmem; 333 diu_ops.release_bootmem = mpc512x_release_bootmem;
338#endif 334#endif
339} 335}
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 7eb5c40c069f..a13d3cce413c 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -93,8 +93,8 @@
93 * The Area Descriptor is a 32-bit value that determine which bits in each 93 * The Area Descriptor is a 32-bit value that determine which bits in each
94 * pixel are to be used for each color. 94 * pixel are to be used for each color.
95 */ 95 */
96static unsigned int p1022ds_get_pixel_format(unsigned int bits_per_pixel, 96static u32 p1022ds_get_pixel_format(enum fsl_diu_monitor_port port,
97 int monitor_port) 97 unsigned int bits_per_pixel)
98{ 98{
99 switch (bits_per_pixel) { 99 switch (bits_per_pixel) {
100 case 32: 100 case 32:
@@ -118,7 +118,8 @@ static unsigned int p1022ds_get_pixel_format(unsigned int bits_per_pixel,
118 * On some boards, the gamma table for some ports may need to be modified. 118 * On some boards, the gamma table for some ports may need to be modified.
119 * This is not the case on the P1022DS, so we do nothing. 119 * This is not the case on the P1022DS, so we do nothing.
120*/ 120*/
121static void p1022ds_set_gamma_table(int monitor_port, char *gamma_table_base) 121static void p1022ds_set_gamma_table(enum fsl_diu_monitor_port port,
122 char *gamma_table_base)
122{ 123{
123} 124}
124 125
@@ -126,7 +127,7 @@ static void p1022ds_set_gamma_table(int monitor_port, char *gamma_table_base)
126 * p1022ds_set_monitor_port: switch the output to a different monitor port 127 * p1022ds_set_monitor_port: switch the output to a different monitor port
127 * 128 *
128 */ 129 */
129static void p1022ds_set_monitor_port(int monitor_port) 130static void p1022ds_set_monitor_port(enum fsl_diu_monitor_port port)
130{ 131{
131 struct device_node *pixis_node; 132 struct device_node *pixis_node;
132 u8 __iomem *brdcfg1; 133 u8 __iomem *brdcfg1;
@@ -144,19 +145,21 @@ static void p1022ds_set_monitor_port(int monitor_port)
144 } 145 }
145 brdcfg1 += 9; /* BRDCFG1 is at offset 9 in the ngPIXIS */ 146 brdcfg1 += 9; /* BRDCFG1 is at offset 9 in the ngPIXIS */
146 147
147 switch (monitor_port) { 148 switch (port) {
148 case 0: /* DVI */ 149 case FSL_DIU_PORT_DVI:
150 printk(KERN_INFO "%s:%u\n", __func__, __LINE__);
149 /* Enable the DVI port, disable the DFP and the backlight */ 151 /* Enable the DVI port, disable the DFP and the backlight */
150 clrsetbits_8(brdcfg1, PX_BRDCFG1_DFPEN | PX_BRDCFG1_BACKLIGHT, 152 clrsetbits_8(brdcfg1, PX_BRDCFG1_DFPEN | PX_BRDCFG1_BACKLIGHT,
151 PX_BRDCFG1_DVIEN); 153 PX_BRDCFG1_DVIEN);
152 break; 154 break;
153 case 1: /* Single link LVDS */ 155 case FSL_DIU_PORT_LVDS:
156 printk(KERN_INFO "%s:%u\n", __func__, __LINE__);
154 /* Enable the DFP port, disable the DVI and the backlight */ 157 /* Enable the DFP port, disable the DVI and the backlight */
155 clrsetbits_8(brdcfg1, PX_BRDCFG1_DVIEN | PX_BRDCFG1_BACKLIGHT, 158 clrsetbits_8(brdcfg1, PX_BRDCFG1_DVIEN | PX_BRDCFG1_BACKLIGHT,
156 PX_BRDCFG1_DFPEN); 159 PX_BRDCFG1_DFPEN);
157 break; 160 break;
158 default: 161 default:
159 pr_err("p1022ds: unsupported monitor port %i\n", monitor_port); 162 pr_err("p1022ds: unsupported monitor port %i\n", port);
160 } 163 }
161} 164}
162 165
@@ -204,23 +207,18 @@ void p1022ds_set_pixel_clock(unsigned int pixclock)
204} 207}
205 208
206/** 209/**
207 * p1022ds_show_monitor_port: show the current monitor 210 * p1022ds_valid_monitor_port: set the monitor port for sysfs
208 *
209 * This function returns a string indicating whether the current monitor is
210 * set to DVI or LVDS.
211 */
212ssize_t p1022ds_show_monitor_port(int monitor_port, char *buf)
213{
214 return sprintf(buf, "%c0 - DVI\n%c1 - Single link LVDS\n",
215 monitor_port == 0 ? '*' : ' ', monitor_port == 1 ? '*' : ' ');
216}
217
218/**
219 * p1022ds_set_sysfs_monitor_port: set the monitor port for sysfs
220 */ 211 */
221int p1022ds_set_sysfs_monitor_port(int val) 212enum fsl_diu_monitor_port
213p1022ds_valid_monitor_port(enum fsl_diu_monitor_port port)
222{ 214{
223 return val < 2 ? val : 0; 215 switch (port) {
216 case FSL_DIU_PORT_DVI:
217 case FSL_DIU_PORT_LVDS:
218 return port;
219 default:
220 return FSL_DIU_PORT_DVI; /* Dual-link LVDS is not supported */
221 }
224} 222}
225 223
226#endif 224#endif
@@ -295,8 +293,7 @@ static void __init p1022_ds_setup_arch(void)
295 diu_ops.set_gamma_table = p1022ds_set_gamma_table; 293 diu_ops.set_gamma_table = p1022ds_set_gamma_table;
296 diu_ops.set_monitor_port = p1022ds_set_monitor_port; 294 diu_ops.set_monitor_port = p1022ds_set_monitor_port;
297 diu_ops.set_pixel_clock = p1022ds_set_pixel_clock; 295 diu_ops.set_pixel_clock = p1022ds_set_pixel_clock;
298 diu_ops.show_monitor_port = p1022ds_show_monitor_port; 296 diu_ops.valid_monitor_port = p1022ds_valid_monitor_port;
299 diu_ops.set_sysfs_monitor_port = p1022ds_set_sysfs_monitor_port;
300#endif 297#endif
301 298
302#ifdef CONFIG_SMP 299#ifdef CONFIG_SMP
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index a896511690c2..0d80e9614f31 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -145,10 +145,10 @@ machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
145 (c2 << AD_COMP_2_SHIFT) | (c1 << AD_COMP_1_SHIFT) | \ 145 (c2 << AD_COMP_2_SHIFT) | (c1 << AD_COMP_1_SHIFT) | \
146 (c0 << AD_COMP_0_SHIFT) | (size << AD_PIXEL_S_SHIFT)) 146 (c0 << AD_COMP_0_SHIFT) | (size << AD_PIXEL_S_SHIFT))
147 147
148unsigned int mpc8610hpcd_get_pixel_format(unsigned int bits_per_pixel, 148u32 mpc8610hpcd_get_pixel_format(enum fsl_diu_monitor_port port,
149 int monitor_port) 149 unsigned int bits_per_pixel)
150{ 150{
151 static const unsigned long pixelformat[][3] = { 151 static const u32 pixelformat[][3] = {
152 { 152 {
153 MAKE_AD(3, 0, 2, 1, 3, 8, 8, 8, 8), 153 MAKE_AD(3, 0, 2, 1, 3, 8, 8, 8, 8),
154 MAKE_AD(4, 2, 0, 1, 2, 8, 8, 8, 0), 154 MAKE_AD(4, 2, 0, 1, 2, 8, 8, 8, 0),
@@ -163,7 +163,8 @@ unsigned int mpc8610hpcd_get_pixel_format(unsigned int bits_per_pixel,
163 unsigned int arch_monitor; 163 unsigned int arch_monitor;
164 164
165 /* The DVI port is mis-wired on revision 1 of this board. */ 165 /* The DVI port is mis-wired on revision 1 of this board. */
166 arch_monitor = ((*pixis_arch == 0x01) && (monitor_port == 0))? 0 : 1; 166 arch_monitor =
167 ((*pixis_arch == 0x01) && (port == FSL_DIU_PORT_DVI)) ? 0 : 1;
167 168
168 switch (bits_per_pixel) { 169 switch (bits_per_pixel) {
169 case 32: 170 case 32:
@@ -178,10 +179,11 @@ unsigned int mpc8610hpcd_get_pixel_format(unsigned int bits_per_pixel,
178 } 179 }
179} 180}
180 181
181void mpc8610hpcd_set_gamma_table(int monitor_port, char *gamma_table_base) 182void mpc8610hpcd_set_gamma_table(enum fsl_diu_monitor_port port,
183 char *gamma_table_base)
182{ 184{
183 int i; 185 int i;
184 if (monitor_port == 2) { /* dual link LVDS */ 186 if (port == FSL_DIU_PORT_DLVDS) {
185 for (i = 0; i < 256*3; i++) 187 for (i = 0; i < 256*3; i++)
186 gamma_table_base[i] = (gamma_table_base[i] << 2) | 188 gamma_table_base[i] = (gamma_table_base[i] << 2) |
187 ((gamma_table_base[i] >> 6) & 0x03); 189 ((gamma_table_base[i] >> 6) & 0x03);
@@ -192,17 +194,21 @@ void mpc8610hpcd_set_gamma_table(int monitor_port, char *gamma_table_base)
192#define PX_BRDCFG0_DLINK (1 << 4) 194#define PX_BRDCFG0_DLINK (1 << 4)
193#define PX_BRDCFG0_DIU_MASK (PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK) 195#define PX_BRDCFG0_DIU_MASK (PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK)
194 196
195void mpc8610hpcd_set_monitor_port(int monitor_port) 197void mpc8610hpcd_set_monitor_port(enum fsl_diu_monitor_port port)
196{ 198{
197 static const u8 bdcfg[] = { 199 switch (port) {
198 PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK, 200 case FSL_DIU_PORT_DVI:
199 PX_BRDCFG0_DLINK,
200 0,
201 };
202
203 if (monitor_port < 3)
204 clrsetbits_8(pixis_bdcfg0, PX_BRDCFG0_DIU_MASK, 201 clrsetbits_8(pixis_bdcfg0, PX_BRDCFG0_DIU_MASK,
205 bdcfg[monitor_port]); 202 PX_BRDCFG0_DVISEL | PX_BRDCFG0_DLINK);
203 break;
204 case FSL_DIU_PORT_LVDS:
205 clrsetbits_8(pixis_bdcfg0, PX_BRDCFG0_DIU_MASK,
206 PX_BRDCFG0_DLINK);
207 break;
208 case FSL_DIU_PORT_DLVDS:
209 clrbits8(pixis_bdcfg0, PX_BRDCFG0_DIU_MASK);
210 break;
211 }
206} 212}
207 213
208void mpc8610hpcd_set_pixel_clock(unsigned int pixclock) 214void mpc8610hpcd_set_pixel_clock(unsigned int pixclock)
@@ -273,20 +279,10 @@ void mpc8610hpcd_set_pixel_clock(unsigned int pixclock)
273 iounmap(clkdvdr); 279 iounmap(clkdvdr);
274} 280}
275 281
276ssize_t mpc8610hpcd_show_monitor_port(int monitor_port, char *buf) 282enum fsl_diu_monitor_port
277{ 283mpc8610hpcd_valid_monitor_port(enum fsl_diu_monitor_port port)
278 return snprintf(buf, PAGE_SIZE,
279 "%c0 - DVI\n"
280 "%c1 - Single link LVDS\n"
281 "%c2 - Dual link LVDS\n",
282 monitor_port == 0 ? '*' : ' ',
283 monitor_port == 1 ? '*' : ' ',
284 monitor_port == 2 ? '*' : ' ');
285}
286
287int mpc8610hpcd_set_sysfs_monitor_port(int val)
288{ 284{
289 return val < 3 ? val : 0; 285 return port;
290} 286}
291 287
292#endif 288#endif
@@ -318,8 +314,7 @@ static void __init mpc86xx_hpcd_setup_arch(void)
318 diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table; 314 diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table;
319 diu_ops.set_monitor_port = mpc8610hpcd_set_monitor_port; 315 diu_ops.set_monitor_port = mpc8610hpcd_set_monitor_port;
320 diu_ops.set_pixel_clock = mpc8610hpcd_set_pixel_clock; 316 diu_ops.set_pixel_clock = mpc8610hpcd_set_pixel_clock;
321 diu_ops.show_monitor_port = mpc8610hpcd_show_monitor_port; 317 diu_ops.valid_monitor_port = mpc8610hpcd_valid_monitor_port;
322 diu_ops.set_sysfs_monitor_port = mpc8610hpcd_set_sysfs_monitor_port;
323#endif 318#endif
324 319
325 pixis_node = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis"); 320 pixis_node = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis");
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 53609489a62b..064bc7089134 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -22,15 +22,24 @@ struct device_node;
22extern void fsl_rstcr_restart(char *cmd); 22extern void fsl_rstcr_restart(char *cmd);
23 23
24#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 24#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
25
26/* The different ports that the DIU can be connected to */
27enum fsl_diu_monitor_port {
28 FSL_DIU_PORT_DVI, /* DVI */
29 FSL_DIU_PORT_LVDS, /* Single-link LVDS */
30 FSL_DIU_PORT_DLVDS /* Dual-link LVDS */
31};
32
25struct platform_diu_data_ops { 33struct platform_diu_data_ops {
26 unsigned int (*get_pixel_format) (unsigned int bits_per_pixel, 34 u32 (*get_pixel_format)(enum fsl_diu_monitor_port port,
27 int monitor_port); 35 unsigned int bpp);
28 void (*set_gamma_table) (int monitor_port, char *gamma_table_base); 36 void (*set_gamma_table)(enum fsl_diu_monitor_port port,
29 void (*set_monitor_port) (int monitor_port); 37 char *gamma_table_base);
30 void (*set_pixel_clock) (unsigned int pixclock); 38 void (*set_monitor_port)(enum fsl_diu_monitor_port port);
31 ssize_t (*show_monitor_port) (int monitor_port, char *buf); 39 void (*set_pixel_clock)(unsigned int pixclock);
32 int (*set_sysfs_monitor_port) (int val); 40 enum fsl_diu_monitor_port (*valid_monitor_port)
33 void (*release_bootmem) (void); 41 (enum fsl_diu_monitor_port port);
42 void (*release_bootmem)(void);
34}; 43};
35 44
36extern struct platform_diu_data_ops diu_ops; 45extern struct platform_diu_data_ops diu_ops;