diff options
author | Scott Wood <scottwood@freescale.com> | 2011-06-14 19:34:35 -0400 |
---|---|---|
committer | Avi Kivity <avi@redhat.com> | 2011-07-12 06:16:34 -0400 |
commit | 0ef309956cecbaf6d96c31371bf393c296886fa6 (patch) | |
tree | 6ac269ebbf1a23490854d038314bb9abc1dc1720 /arch/powerpc | |
parent | 6fc4d1eb911cced6bc103f2b36497397e99e8c43 (diff) |
KVM: PPC: e500: don't use MAS0 as intermediate storage.
This avoids races. It also means that we use the shadow TLB way,
rather than the hardware hint -- if this is a problem, we could do
a tlbsx before inserting a TLB0 entry.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/kvm/e500_tlb.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c index e0ab2160932a..f1b37e0de86c 100644 --- a/arch/powerpc/kvm/e500_tlb.c +++ b/arch/powerpc/kvm/e500_tlb.c | |||
@@ -112,13 +112,18 @@ static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode) | |||
112 | /* | 112 | /* |
113 | * writing shadow tlb entry to host TLB | 113 | * writing shadow tlb entry to host TLB |
114 | */ | 114 | */ |
115 | static inline void __write_host_tlbe(struct tlbe *stlbe) | 115 | static inline void __write_host_tlbe(struct tlbe *stlbe, uint32_t mas0) |
116 | { | 116 | { |
117 | unsigned long flags; | ||
118 | |||
119 | local_irq_save(flags); | ||
120 | mtspr(SPRN_MAS0, mas0); | ||
117 | mtspr(SPRN_MAS1, stlbe->mas1); | 121 | mtspr(SPRN_MAS1, stlbe->mas1); |
118 | mtspr(SPRN_MAS2, stlbe->mas2); | 122 | mtspr(SPRN_MAS2, stlbe->mas2); |
119 | mtspr(SPRN_MAS3, stlbe->mas3); | 123 | mtspr(SPRN_MAS3, stlbe->mas3); |
120 | mtspr(SPRN_MAS7, stlbe->mas7); | 124 | mtspr(SPRN_MAS7, stlbe->mas7); |
121 | __asm__ __volatile__ ("tlbwe\n" : : ); | 125 | asm volatile("isync; tlbwe" : : : "memory"); |
126 | local_irq_restore(flags); | ||
122 | } | 127 | } |
123 | 128 | ||
124 | static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500, | 129 | static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500, |
@@ -126,20 +131,15 @@ static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500, | |||
126 | { | 131 | { |
127 | struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel]; | 132 | struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel]; |
128 | 133 | ||
129 | local_irq_disable(); | ||
130 | if (tlbsel == 0) { | 134 | if (tlbsel == 0) { |
131 | __write_host_tlbe(stlbe); | 135 | __write_host_tlbe(stlbe, |
136 | MAS0_TLBSEL(0) | | ||
137 | MAS0_ESEL(esel & (KVM_E500_TLB0_WAY_NUM - 1))); | ||
132 | } else { | 138 | } else { |
133 | unsigned register mas0; | 139 | __write_host_tlbe(stlbe, |
134 | 140 | MAS0_TLBSEL(1) | | |
135 | mas0 = mfspr(SPRN_MAS0); | 141 | MAS0_ESEL(to_htlb1_esel(esel))); |
136 | |||
137 | mtspr(SPRN_MAS0, MAS0_TLBSEL(1) | MAS0_ESEL(to_htlb1_esel(esel))); | ||
138 | __write_host_tlbe(stlbe); | ||
139 | |||
140 | mtspr(SPRN_MAS0, mas0); | ||
141 | } | 142 | } |
142 | local_irq_enable(); | ||
143 | } | 143 | } |
144 | 144 | ||
145 | void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu) | 145 | void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu) |