aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc
diff options
context:
space:
mode:
authorSean MacLennan <smaclennan@pikatech.com>2009-01-09 13:20:11 -0500
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2009-01-20 08:17:21 -0500
commite275e023aa69bdc6a2f43b86ca3aa93a22e47837 (patch)
tree15e691fe30f323239b3ec2688980c0f2412c815f /arch/powerpc
parent94ce1c585ed51dd9e72e812117e11f3f236a5399 (diff)
powerpc/44x: Warp patches for the new NDFC driver
Convert the Warp platform to use the newly merged NDFC driver - warp.dts changed to work with ndfc - warp-nand.c no longer needed - removed obsolete rev A support from cuboot-warp.c Signed-off-by: Sean MacLennan <smaclennan@pikatech.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/boot/cuboot-warp.c43
-rw-r--r--arch/powerpc/boot/dts/warp.dts42
-rw-r--r--arch/powerpc/platforms/44x/Makefile1
-rw-r--r--arch/powerpc/platforms/44x/warp-nand.c135
4 files changed, 41 insertions, 180 deletions
diff --git a/arch/powerpc/boot/cuboot-warp.c b/arch/powerpc/boot/cuboot-warp.c
index 21780210057d..806df693fea6 100644
--- a/arch/powerpc/boot/cuboot-warp.c
+++ b/arch/powerpc/boot/cuboot-warp.c
@@ -18,57 +18,14 @@
18 18
19static bd_t bd; 19static bd_t bd;
20 20
21static void warp_fixup_one_nor(u32 from, u32 to)
22{
23 void *devp;
24 char name[50];
25 u32 v[2];
26
27 sprintf(name, "/plb/opb/ebc/nor_flash@0,0/partition@%x", from);
28
29 devp = finddevice(name);
30 if (!devp)
31 return;
32
33 if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) {
34 v[0] = to;
35 setprop(devp, "reg", v, sizeof(v));
36
37 printf("NOR 64M fixup %x -> %x\r\n", from, to);
38 }
39}
40
41
42static void warp_fixups(void) 21static void warp_fixups(void)
43{ 22{
44 ibm440ep_fixup_clocks(66000000, 11059200, 50000000); 23 ibm440ep_fixup_clocks(66000000, 11059200, 50000000);
45 ibm4xx_sdram_fixup_memsize(); 24 ibm4xx_sdram_fixup_memsize();
46 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); 25 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
47 dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); 26 dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
48
49 /* Fixup for 64M flash on Rev A boards. */
50 if (bd.bi_flashsize == 0x4000000) {
51 void *devp;
52 u32 v[3];
53
54 devp = finddevice("/plb/opb/ebc/nor_flash@0,0");
55 if (!devp)
56 return;
57
58 /* Fixup the size */
59 if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) {
60 v[2] = bd.bi_flashsize;
61 setprop(devp, "reg", v, sizeof(v));
62 }
63
64 /* Fixup parition offsets */
65 warp_fixup_one_nor(0x300000, 0x3f00000);
66 warp_fixup_one_nor(0x340000, 0x3f40000);
67 warp_fixup_one_nor(0x380000, 0x3f80000);
68 }
69} 27}
70 28
71
72void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, 29void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
73 unsigned long r6, unsigned long r7) 30 unsigned long r6, unsigned long r7)
74{ 31{
diff --git a/arch/powerpc/boot/dts/warp.dts b/arch/powerpc/boot/dts/warp.dts
index f4e4ba69eef7..7e183ff9a317 100644
--- a/arch/powerpc/boot/dts/warp.dts
+++ b/arch/powerpc/boot/dts/warp.dts
@@ -149,12 +149,17 @@
149 reg = <0x00000002 0x00004000 0x00000A00>; 149 reg = <0x00000002 0x00004000 0x00000A00>;
150 }; 150 };
151 151
152 nor_flash@0,0 { 152 nor@0,0 {
153 compatible = "amd,s29gl032a", "cfi-flash"; 153 compatible = "amd,s29gl032a", "cfi-flash";
154 bank-width = <2>; 154 bank-width = <2>;
155 reg = <0x00000000 0x00000000 0x00400000>; 155 reg = <0x00000000 0x00000000 0x00400000>;
156 #address-cells = <1>; 156 #address-cells = <1>;
157 #size-cells = <1>; 157 #size-cells = <1>;
158
159 partition@0 {
160 label = "splash";
161 reg = <0x00000000 0x00020000>;
162 };
158 partition@300000 { 163 partition@300000 {
159 label = "fpga"; 164 label = "fpga";
160 reg = <0x0300000 0x00040000>; 165 reg = <0x0300000 0x00040000>;
@@ -168,6 +173,41 @@
168 reg = <0x0380000 0x00080000>; 173 reg = <0x0380000 0x00080000>;
169 }; 174 };
170 }; 175 };
176
177 ndfc@1,0 {
178 compatible = "ibm,ndfc";
179 reg = <0x00000001 0x00000000 0x00002000>;
180 ccr = <0x00001000>;
181 bank-settings = <0x80002222>;
182 #address-cells = <1>;
183 #size-cells = <1>;
184
185 nand {
186 #address-cells = <1>;
187 #size-cells = <1>;
188
189 partition@0 {
190 label = "kernel";
191 reg = <0x00000000 0x00200000>;
192 };
193 partition@200000 {
194 label = "root";
195 reg = <0x00200000 0x03E00000>;
196 };
197 partition@40000000 {
198 label = "persistent";
199 reg = <0x04000000 0x04000000>;
200 };
201 partition@80000000 {
202 label = "persistent1";
203 reg = <0x08000000 0x04000000>;
204 };
205 partition@C0000000 {
206 label = "persistent2";
207 reg = <0x0C000000 0x04000000>;
208 };
209 };
210 };
171 }; 211 };
172 212
173 UART0: serial@ef600300 { 213 UART0: serial@ef600300 {
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 698133180aee..01f51daace13 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -3,5 +3,4 @@ obj-$(CONFIG_PPC44x_SIMPLE) += ppc44x_simple.o
3obj-$(CONFIG_EBONY) += ebony.o 3obj-$(CONFIG_EBONY) += ebony.o
4obj-$(CONFIG_SAM440EP) += sam440ep.o 4obj-$(CONFIG_SAM440EP) += sam440ep.o
5obj-$(CONFIG_WARP) += warp.o 5obj-$(CONFIG_WARP) += warp.o
6obj-$(CONFIG_WARP) += warp-nand.o
7obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o 6obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c
deleted file mode 100644
index 89ecd76127d8..000000000000
--- a/arch/powerpc/platforms/44x/warp-nand.c
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 * PIKA Warp(tm) NAND flash specific routines
3 *
4 * Copyright (c) 2008 PIKA Technologies
5 * Sean MacLennan <smaclennan@pikatech.com>
6 */
7
8#include <linux/platform_device.h>
9#include <linux/mtd/mtd.h>
10#include <linux/mtd/map.h>
11#include <linux/mtd/partitions.h>
12#include <linux/mtd/nand.h>
13#include <linux/mtd/ndfc.h>
14#include <linux/of.h>
15#include <asm/machdep.h>
16
17
18#ifdef CONFIG_MTD_NAND_NDFC
19
20#define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */
21
22#define WARP_NAND_FLASH_REG_ADDR 0xD0000000UL
23#define WARP_NAND_FLASH_REG_SIZE 0x2000
24
25static struct resource warp_ndfc = {
26 .start = WARP_NAND_FLASH_REG_ADDR,
27 .end = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE - 1,
28 .flags = IORESOURCE_MEM,
29};
30
31static struct mtd_partition nand_parts[] = {
32 {
33 .name = "kernel",
34 .offset = 0,
35 .size = 0x0200000
36 },
37 {
38 .name = "root",
39 .offset = 0x0200000,
40 .size = 0x3E00000
41 },
42 {
43 .name = "persistent",
44 .offset = 0x4000000,
45 .size = 0x4000000
46 },
47 {
48 .name = "persistent1",
49 .offset = 0x8000000,
50 .size = 0x4000000
51 },
52 {
53 .name = "persistent2",
54 .offset = 0xC000000,
55 .size = 0x4000000
56 }
57};
58
59struct ndfc_controller_settings warp_ndfc_settings = {
60 .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1),
61 .ndfc_erpn = 0,
62};
63
64static struct ndfc_chip_settings warp_chip0_settings = {
65 .bank_settings = 0x80002222,
66};
67
68struct platform_nand_ctrl warp_nand_ctrl = {
69 .priv = &warp_ndfc_settings,
70};
71
72static struct platform_device warp_ndfc_device = {
73 .name = "ndfc-nand",
74 .id = 0,
75 .dev = {
76 .platform_data = &warp_nand_ctrl,
77 },
78 .num_resources = 1,
79 .resource = &warp_ndfc,
80};
81
82/* Do NOT set the ecclayout: let it default so it is correct for both
83 * 64M and 256M flash chips.
84 */
85static struct platform_nand_chip warp_nand_chip0 = {
86 .nr_chips = 1,
87 .chip_offset = CS_NAND_0,
88 .nr_partitions = ARRAY_SIZE(nand_parts),
89 .partitions = nand_parts,
90 .chip_delay = 20,
91 .priv = &warp_chip0_settings,
92};
93
94static struct platform_device warp_nand_device = {
95 .name = "ndfc-chip",
96 .id = 0,
97 .num_resources = 0,
98 .dev = {
99 .platform_data = &warp_nand_chip0,
100 .parent = &warp_ndfc_device.dev,
101 }
102};
103
104static int warp_setup_nand_flash(void)
105{
106 struct device_node *np;
107
108 /* Try to detect a rev A based on NOR size. */
109 np = of_find_compatible_node(NULL, NULL, "cfi-flash");
110 if (np) {
111 struct property *pp;
112
113 pp = of_find_property(np, "reg", NULL);
114 if (pp && (pp->length == 12)) {
115 u32 *v = pp->value;
116 if (v[2] == 0x4000000) {
117 /* Rev A = 64M NAND */
118 warp_nand_chip0.nr_partitions = 3;
119
120 nand_parts[1].size = 0x3000000;
121 nand_parts[2].offset = 0x3200000;
122 nand_parts[2].size = 0x0e00000;
123 }
124 }
125 of_node_put(np);
126 }
127
128 platform_device_register(&warp_ndfc_device);
129 platform_device_register(&warp_nand_device);
130
131 return 0;
132}
133machine_device_initcall(warp, warp_setup_nand_flash);
134
135#endif