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authorThomas Gleixner <tglx@linutronix.de>2010-04-06 03:44:10 -0400
committerIngo Molnar <mingo@elte.hu>2011-09-13 05:12:10 -0400
commitbccc2f7b4c1a7fd3d51e34f9dc3397312afb030b (patch)
tree06441fc7c1d084929aaa6bc7cf97c5631761497f /arch/powerpc
parent59d958d2c7de20409a0dc202adc87d3973ada13d (diff)
locking, powerpc: Annotate uic->lock as raw
uic->lock is protecting the interrupt controller hardware. This lock can not be preempted on -rt. In mainline this change documents the low level nature of the lock - otherwise there's no functional difference. Lockdep and Sparse checking will work as usual. Reported-by: Darcy L. Watkins <dwatkins@tranzeo.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/sysdev/uic.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 984cd2029158..3330feca7502 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -47,7 +47,7 @@ struct uic {
47 int index; 47 int index;
48 int dcrbase; 48 int dcrbase;
49 49
50 spinlock_t lock; 50 raw_spinlock_t lock;
51 51
52 /* The remapper for this UIC */ 52 /* The remapper for this UIC */
53 struct irq_host *irqhost; 53 struct irq_host *irqhost;
@@ -61,14 +61,14 @@ static void uic_unmask_irq(struct irq_data *d)
61 u32 er, sr; 61 u32 er, sr;
62 62
63 sr = 1 << (31-src); 63 sr = 1 << (31-src);
64 spin_lock_irqsave(&uic->lock, flags); 64 raw_spin_lock_irqsave(&uic->lock, flags);
65 /* ack level-triggered interrupts here */ 65 /* ack level-triggered interrupts here */
66 if (irqd_is_level_type(d)) 66 if (irqd_is_level_type(d))
67 mtdcr(uic->dcrbase + UIC_SR, sr); 67 mtdcr(uic->dcrbase + UIC_SR, sr);
68 er = mfdcr(uic->dcrbase + UIC_ER); 68 er = mfdcr(uic->dcrbase + UIC_ER);
69 er |= sr; 69 er |= sr;
70 mtdcr(uic->dcrbase + UIC_ER, er); 70 mtdcr(uic->dcrbase + UIC_ER, er);
71 spin_unlock_irqrestore(&uic->lock, flags); 71 raw_spin_unlock_irqrestore(&uic->lock, flags);
72} 72}
73 73
74static void uic_mask_irq(struct irq_data *d) 74static void uic_mask_irq(struct irq_data *d)
@@ -78,11 +78,11 @@ static void uic_mask_irq(struct irq_data *d)
78 unsigned long flags; 78 unsigned long flags;
79 u32 er; 79 u32 er;
80 80
81 spin_lock_irqsave(&uic->lock, flags); 81 raw_spin_lock_irqsave(&uic->lock, flags);
82 er = mfdcr(uic->dcrbase + UIC_ER); 82 er = mfdcr(uic->dcrbase + UIC_ER);
83 er &= ~(1 << (31 - src)); 83 er &= ~(1 << (31 - src));
84 mtdcr(uic->dcrbase + UIC_ER, er); 84 mtdcr(uic->dcrbase + UIC_ER, er);
85 spin_unlock_irqrestore(&uic->lock, flags); 85 raw_spin_unlock_irqrestore(&uic->lock, flags);
86} 86}
87 87
88static void uic_ack_irq(struct irq_data *d) 88static void uic_ack_irq(struct irq_data *d)
@@ -91,9 +91,9 @@ static void uic_ack_irq(struct irq_data *d)
91 unsigned int src = irqd_to_hwirq(d); 91 unsigned int src = irqd_to_hwirq(d);
92 unsigned long flags; 92 unsigned long flags;
93 93
94 spin_lock_irqsave(&uic->lock, flags); 94 raw_spin_lock_irqsave(&uic->lock, flags);
95 mtdcr(uic->dcrbase + UIC_SR, 1 << (31-src)); 95 mtdcr(uic->dcrbase + UIC_SR, 1 << (31-src));
96 spin_unlock_irqrestore(&uic->lock, flags); 96 raw_spin_unlock_irqrestore(&uic->lock, flags);
97} 97}
98 98
99static void uic_mask_ack_irq(struct irq_data *d) 99static void uic_mask_ack_irq(struct irq_data *d)
@@ -104,7 +104,7 @@ static void uic_mask_ack_irq(struct irq_data *d)
104 u32 er, sr; 104 u32 er, sr;
105 105
106 sr = 1 << (31-src); 106 sr = 1 << (31-src);
107 spin_lock_irqsave(&uic->lock, flags); 107 raw_spin_lock_irqsave(&uic->lock, flags);
108 er = mfdcr(uic->dcrbase + UIC_ER); 108 er = mfdcr(uic->dcrbase + UIC_ER);
109 er &= ~sr; 109 er &= ~sr;
110 mtdcr(uic->dcrbase + UIC_ER, er); 110 mtdcr(uic->dcrbase + UIC_ER, er);
@@ -118,7 +118,7 @@ static void uic_mask_ack_irq(struct irq_data *d)
118 */ 118 */
119 if (!irqd_is_level_type(d)) 119 if (!irqd_is_level_type(d))
120 mtdcr(uic->dcrbase + UIC_SR, sr); 120 mtdcr(uic->dcrbase + UIC_SR, sr);
121 spin_unlock_irqrestore(&uic->lock, flags); 121 raw_spin_unlock_irqrestore(&uic->lock, flags);
122} 122}
123 123
124static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) 124static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
@@ -152,7 +152,7 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
152 152
153 mask = ~(1 << (31 - src)); 153 mask = ~(1 << (31 - src));
154 154
155 spin_lock_irqsave(&uic->lock, flags); 155 raw_spin_lock_irqsave(&uic->lock, flags);
156 tr = mfdcr(uic->dcrbase + UIC_TR); 156 tr = mfdcr(uic->dcrbase + UIC_TR);
157 pr = mfdcr(uic->dcrbase + UIC_PR); 157 pr = mfdcr(uic->dcrbase + UIC_PR);
158 tr = (tr & mask) | (trigger << (31-src)); 158 tr = (tr & mask) | (trigger << (31-src));
@@ -161,7 +161,7 @@ static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
161 mtdcr(uic->dcrbase + UIC_PR, pr); 161 mtdcr(uic->dcrbase + UIC_PR, pr);
162 mtdcr(uic->dcrbase + UIC_TR, tr); 162 mtdcr(uic->dcrbase + UIC_TR, tr);
163 163
164 spin_unlock_irqrestore(&uic->lock, flags); 164 raw_spin_unlock_irqrestore(&uic->lock, flags);
165 165
166 return 0; 166 return 0;
167} 167}
@@ -254,7 +254,7 @@ static struct uic * __init uic_init_one(struct device_node *node)
254 if (! uic) 254 if (! uic)
255 return NULL; /* FIXME: panic? */ 255 return NULL; /* FIXME: panic? */
256 256
257 spin_lock_init(&uic->lock); 257 raw_spin_lock_init(&uic->lock);
258 indexp = of_get_property(node, "cell-index", &len); 258 indexp = of_get_property(node, "cell-index", &len);
259 if (!indexp || (len != sizeof(u32))) { 259 if (!indexp || (len != sizeof(u32))) {
260 printk(KERN_ERR "uic: Device node %s has missing or invalid " 260 printk(KERN_ERR "uic: Device node %s has missing or invalid "