powerpc: Setup BHRB instructions facility in HFSCR for POWER8

Make BHRB instructions available in problem and privileged states.

Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

2 files changed, 3 insertions, 1 deletions

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 5c6fbe2c5ce6..178a85844462 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -272,6 +272,7 @@
 #define   HFSCR_TAR     (1 << (63-55)) /* Enable Target Address Register */
 #define   HFSCR_TM      (1 << (63-58)) /* Enable Transactional Memory */
 #define   HFSCR_PM      (1 << (63-60)) /* Enable prob/priv access to PMU SPRs */
+#define   HFSCR_BHRB    (1 << (63-59)) /* Enable Branch History Rolling Buffer*/
 #define   HFSCR_DSCR    (1 << (63-61)) /* Enable Data Stream Control Register */
 #define   HFSCR_VECVSX  (1 << (63-62)) /* Enable VMX/VSX  */
 #define   HFSCR_FP      (1 << (63-63)) /* Enable Floating Point */
diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S
index e0c419b8d65b..7b4db965b592 100644
--- a/arch/powerpc/kernel/cpu_setup_power.S
+++ b/arch/powerpc/kernel/cpu_setup_power.S
@@ -129,7 +129,8 @@ __init_FSCR:
 
 __init_HFSCR:
         mfspr   r3,SPRN_HFSCR
-        ori     r3,r3,HFSCR_TAR|HFSCR_TM|HFSCR_DSCR|HFSCR_VECVSX|HFSCR_FP|HFSCR_PM
+        ori     r3,r3,HFSCR_TAR|HFSCR_TM|HFSCR_BHRB|HFSCR_PM|\
+                                HFSCR_DSCR|HFSCR_VECVSX|HFSCR_FP
         mtspr   SPRN_HFSCR,r3
         blr