diff options
author | Liu Yu <yu.liu@freescale.com> | 2009-03-17 04:57:46 -0400 |
---|---|---|
committer | Avi Kivity <avi@redhat.com> | 2009-03-24 05:03:15 -0400 |
commit | 046a48b35baa7c66d0d0331256ba12ca51665411 (patch) | |
tree | ffb60208848c2b4337fa6d7963acc53acbc5f9a7 /arch/powerpc | |
parent | bc35cbc85cd78213590761618a13da6a9707652c (diff) |
KVM: ppc: e500: Fix the bug that KVM is unstable in SMP
TLB entry should enable memory coherence in SMP.
And like commit 631fba9dd3aca519355322cef035730609e91593,
remove guard attribute to enable the prefetch of guest memory.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/kvm/e500_tlb.c | 4 | ||||
-rw-r--r-- | arch/powerpc/kvm/e500_tlb.h | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c index ec933209e8af..0e773fc2d5e4 100644 --- a/arch/powerpc/kvm/e500_tlb.c +++ b/arch/powerpc/kvm/e500_tlb.c | |||
@@ -99,7 +99,11 @@ static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode) | |||
99 | 99 | ||
100 | static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode) | 100 | static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode) |
101 | { | 101 | { |
102 | #ifdef CONFIG_SMP | ||
103 | return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M; | ||
104 | #else | ||
102 | return mas2 & MAS2_ATTRIB_MASK; | 105 | return mas2 & MAS2_ATTRIB_MASK; |
106 | #endif | ||
103 | } | 107 | } |
104 | 108 | ||
105 | /* | 109 | /* |
diff --git a/arch/powerpc/kvm/e500_tlb.h b/arch/powerpc/kvm/e500_tlb.h index 4d5cc0f7d796..45b064b76906 100644 --- a/arch/powerpc/kvm/e500_tlb.h +++ b/arch/powerpc/kvm/e500_tlb.h | |||
@@ -38,7 +38,7 @@ | |||
38 | #define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW) | 38 | #define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW) |
39 | #define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW) | 39 | #define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW) |
40 | #define MAS2_ATTRIB_MASK \ | 40 | #define MAS2_ATTRIB_MASK \ |
41 | (MAS2_X0 | MAS2_X1 | MAS2_W | MAS2_I | MAS2_M | MAS2_G | MAS2_E) | 41 | (MAS2_X0 | MAS2_X1) |
42 | #define MAS3_ATTRIB_MASK \ | 42 | #define MAS3_ATTRIB_MASK \ |
43 | (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \ | 43 | (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \ |
44 | | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK) | 44 | | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK) |