diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-03-30 17:53:32 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-03-30 17:53:32 -0400 |
commit | 65fb0d23fcddd8697c871047b700c78817bdaa43 (patch) | |
tree | 119e6e5f276622c4c862f6c9b6d795264ba1603a /arch/powerpc | |
parent | 8c083f081d0014057901c68a0a3e0f8ca7ac8d23 (diff) | |
parent | dfbbe89e197a77f2c8046a51c74e33e35f878080 (diff) |
Merge branch 'linus' into cpumask-for-linus
Conflicts:
arch/x86/kernel/cpu/common.c
Diffstat (limited to 'arch/powerpc')
295 files changed, 21939 insertions, 4896 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 74cc312c347c..ad6b1c084fe3 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -111,6 +111,7 @@ config PPC | |||
111 | select HAVE_FTRACE_MCOUNT_RECORD | 111 | select HAVE_FTRACE_MCOUNT_RECORD |
112 | select HAVE_DYNAMIC_FTRACE | 112 | select HAVE_DYNAMIC_FTRACE |
113 | select HAVE_FUNCTION_TRACER | 113 | select HAVE_FUNCTION_TRACER |
114 | select HAVE_FUNCTION_GRAPH_TRACER | ||
114 | select ARCH_WANT_OPTIONAL_GPIOLIB | 115 | select ARCH_WANT_OPTIONAL_GPIOLIB |
115 | select HAVE_IDE | 116 | select HAVE_IDE |
116 | select HAVE_IOREMAP_PROT | 117 | select HAVE_IOREMAP_PROT |
@@ -312,7 +313,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE | |||
312 | 313 | ||
313 | config KEXEC | 314 | config KEXEC |
314 | bool "kexec system call (EXPERIMENTAL)" | 315 | bool "kexec system call (EXPERIMENTAL)" |
315 | depends on (PPC_PRPMC2800 || PPC_MULTIPLATFORM) && EXPERIMENTAL | 316 | depends on BOOK3S && EXPERIMENTAL |
316 | help | 317 | help |
317 | kexec is a system call that implements the ability to shutdown your | 318 | kexec is a system call that implements the ability to shutdown your |
318 | current kernel, and to start another kernel. It is like a reboot | 319 | current kernel, and to start another kernel. It is like a reboot |
@@ -409,6 +410,18 @@ config PPC_HAS_HASH_64K | |||
409 | depends on PPC64 | 410 | depends on PPC64 |
410 | default n | 411 | default n |
411 | 412 | ||
413 | config STDBINUTILS | ||
414 | bool "Using standard binutils settings" | ||
415 | depends on 44x | ||
416 | default y | ||
417 | help | ||
418 | Turning this option off allows you to select 256KB PAGE_SIZE on 44x. | ||
419 | Note, that kernel will be able to run only those applications, | ||
420 | which had been compiled using binutils later than 2.17.50.0.3 with | ||
421 | '-zmax-page-size' set to 256K (the default is 64K). Or, if using | ||
422 | the older binutils, you can patch them with a trivial patch, which | ||
423 | changes the ELF_MAXPAGESIZE definition from 0x10000 to 0x40000. | ||
424 | |||
412 | choice | 425 | choice |
413 | prompt "Page size" | 426 | prompt "Page size" |
414 | default PPC_4K_PAGES | 427 | default PPC_4K_PAGES |
@@ -444,6 +457,19 @@ config PPC_64K_PAGES | |||
444 | bool "64k page size" if 44x || PPC_STD_MMU_64 | 457 | bool "64k page size" if 44x || PPC_STD_MMU_64 |
445 | select PPC_HAS_HASH_64K if PPC_STD_MMU_64 | 458 | select PPC_HAS_HASH_64K if PPC_STD_MMU_64 |
446 | 459 | ||
460 | config PPC_256K_PAGES | ||
461 | bool "256k page size" if 44x | ||
462 | depends on !STDBINUTILS && (!SHMEM || BROKEN) | ||
463 | help | ||
464 | Make the page size 256k. | ||
465 | |||
466 | As the ELF standard only requires alignment to support page | ||
467 | sizes up to 64k, you will need to compile all of your user | ||
468 | space applications with a non-standard binutils settings | ||
469 | (see the STDBINUTILS description for details). | ||
470 | |||
471 | Say N unless you know what you are doing. | ||
472 | |||
447 | endchoice | 473 | endchoice |
448 | 474 | ||
449 | config FORCE_MAX_ZONEORDER | 475 | config FORCE_MAX_ZONEORDER |
@@ -456,6 +482,8 @@ config FORCE_MAX_ZONEORDER | |||
456 | default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES | 482 | default "9" if PPC_STD_MMU_32 && PPC_16K_PAGES |
457 | range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES | 483 | range 7 64 if PPC_STD_MMU_32 && PPC_64K_PAGES |
458 | default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES | 484 | default "7" if PPC_STD_MMU_32 && PPC_64K_PAGES |
485 | range 5 64 if PPC_STD_MMU_32 && PPC_256K_PAGES | ||
486 | default "5" if PPC_STD_MMU_32 && PPC_256K_PAGES | ||
459 | range 11 64 | 487 | range 11 64 |
460 | default "11" | 488 | default "11" |
461 | help | 489 | help |
@@ -594,6 +622,7 @@ config FSL_SOC | |||
594 | config FSL_PCI | 622 | config FSL_PCI |
595 | bool | 623 | bool |
596 | select PPC_INDIRECT_PCI | 624 | select PPC_INDIRECT_PCI |
625 | select PCI_QUIRKS | ||
597 | 626 | ||
598 | config 4xx_SOC | 627 | config 4xx_SOC |
599 | bool | 628 | bool |
@@ -730,6 +759,22 @@ config LOWMEM_SIZE | |||
730 | hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL | 759 | hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL |
731 | default "0x30000000" | 760 | default "0x30000000" |
732 | 761 | ||
762 | config LOWMEM_CAM_NUM_BOOL | ||
763 | bool "Set number of CAMs to use to map low memory" | ||
764 | depends on ADVANCED_OPTIONS && FSL_BOOKE | ||
765 | help | ||
766 | This option allows you to set the maximum number of CAM slots that | ||
767 | will be used to map low memory. There are a limited number of slots | ||
768 | available and even more limited number that will fit in the L1 MMU. | ||
769 | However, using more entries will allow mapping more low memory. This | ||
770 | can be useful in optimizing the layout of kernel virtual memory. | ||
771 | |||
772 | Say N here unless you know what you are doing. | ||
773 | |||
774 | config LOWMEM_CAM_NUM | ||
775 | int "Number of CAMs to use to map low memory" if LOWMEM_CAM_NUM_BOOL | ||
776 | default 3 | ||
777 | |||
733 | config RELOCATABLE | 778 | config RELOCATABLE |
734 | bool "Build a relocatable kernel (EXPERIMENTAL)" | 779 | bool "Build a relocatable kernel (EXPERIMENTAL)" |
735 | depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE | 780 | depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE |
@@ -794,7 +839,7 @@ config PHYSICAL_START | |||
794 | 839 | ||
795 | config PHYSICAL_ALIGN | 840 | config PHYSICAL_ALIGN |
796 | hex | 841 | hex |
797 | default "0x10000000" if FSL_BOOKE | 842 | default "0x04000000" if FSL_BOOKE |
798 | help | 843 | help |
799 | This value puts the alignment restrictions on physical address | 844 | This value puts the alignment restrictions on physical address |
800 | where kernel is loaded and run from. Kernel is compiled for an | 845 | where kernel is loaded and run from. Kernel is compiled for an |
@@ -815,31 +860,6 @@ config TASK_SIZE | |||
815 | default "0x80000000" if PPC_PREP || PPC_8xx | 860 | default "0x80000000" if PPC_PREP || PPC_8xx |
816 | default "0xc0000000" | 861 | default "0xc0000000" |
817 | 862 | ||
818 | config CONSISTENT_START_BOOL | ||
819 | bool "Set custom consistent memory pool address" | ||
820 | depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE | ||
821 | help | ||
822 | This option allows you to set the base virtual address | ||
823 | of the consistent memory pool. This pool of virtual | ||
824 | memory is used to make consistent memory allocations. | ||
825 | |||
826 | config CONSISTENT_START | ||
827 | hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL | ||
828 | default "0xfd000000" if (NOT_COHERENT_CACHE && 8xx) | ||
829 | default "0xff100000" if NOT_COHERENT_CACHE | ||
830 | |||
831 | config CONSISTENT_SIZE_BOOL | ||
832 | bool "Set custom consistent memory pool size" | ||
833 | depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE | ||
834 | help | ||
835 | This option allows you to set the size of the | ||
836 | consistent memory pool. This pool of virtual memory | ||
837 | is used to make consistent memory allocations. | ||
838 | |||
839 | config CONSISTENT_SIZE | ||
840 | hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL | ||
841 | default "0x00200000" if NOT_COHERENT_CACHE | ||
842 | |||
843 | config PIN_TLB | 863 | config PIN_TLB |
844 | bool "Pinned Kernel TLBs (860 ONLY)" | 864 | bool "Pinned Kernel TLBs (860 ONLY)" |
845 | depends on ADVANCED_OPTIONS && 8xx | 865 | depends on ADVANCED_OPTIONS && 8xx |
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug index 08f7cc0a1953..22091bbfdc9b 100644 --- a/arch/powerpc/Kconfig.debug +++ b/arch/powerpc/Kconfig.debug | |||
@@ -129,7 +129,7 @@ config BDI_SWITCH | |||
129 | 129 | ||
130 | config BOOTX_TEXT | 130 | config BOOTX_TEXT |
131 | bool "Support for early boot text console (BootX or OpenFirmware only)" | 131 | bool "Support for early boot text console (BootX or OpenFirmware only)" |
132 | depends on PPC_OF && PPC_MULTIPLATFORM | 132 | depends on PPC_OF && PPC_BOOK3S |
133 | help | 133 | help |
134 | Say Y here to see progress messages from the boot firmware in text | 134 | Say Y here to see progress messages from the boot firmware in text |
135 | mode. Requires either BootX or Open Firmware. | 135 | mode. Requires either BootX or Open Firmware. |
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index 72d17f50e54f..551fc58c05cf 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile | |||
@@ -147,8 +147,8 @@ core-y += arch/powerpc/kernel/ \ | |||
147 | arch/powerpc/mm/ \ | 147 | arch/powerpc/mm/ \ |
148 | arch/powerpc/lib/ \ | 148 | arch/powerpc/lib/ \ |
149 | arch/powerpc/sysdev/ \ | 149 | arch/powerpc/sysdev/ \ |
150 | arch/powerpc/platforms/ | 150 | arch/powerpc/platforms/ \ |
151 | core-$(CONFIG_MATH_EMULATION) += arch/powerpc/math-emu/ | 151 | arch/powerpc/math-emu/ |
152 | core-$(CONFIG_XMON) += arch/powerpc/xmon/ | 152 | core-$(CONFIG_XMON) += arch/powerpc/xmon/ |
153 | core-$(CONFIG_KVM) += arch/powerpc/kvm/ | 153 | core-$(CONFIG_KVM) += arch/powerpc/kvm/ |
154 | 154 | ||
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index e84df338ea29..4458abb67c51 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile | |||
@@ -70,7 +70,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c | |||
70 | cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ | 70 | cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ |
71 | cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ | 71 | cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ |
72 | virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \ | 72 | virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \ |
73 | cuboot-acadia.c | 73 | cuboot-acadia.c cuboot-amigaone.c |
74 | src-boot := $(src-wlib) $(src-plat) empty.c | 74 | src-boot := $(src-wlib) $(src-plat) empty.c |
75 | 75 | ||
76 | src-boot := $(addprefix $(obj)/, $(src-boot)) | 76 | src-boot := $(addprefix $(obj)/, $(src-boot)) |
@@ -235,7 +235,9 @@ image-$(CONFIG_PPC_ADDER875) += cuImage.adder875-uboot \ | |||
235 | dtbImage.adder875-redboot | 235 | dtbImage.adder875-redboot |
236 | 236 | ||
237 | # Board ports in arch/powerpc/platform/52xx/Kconfig | 237 | # Board ports in arch/powerpc/platform/52xx/Kconfig |
238 | image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200 cuImage.lite5200b | 238 | image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200 lite5200.dtb |
239 | image-$(CONFIG_PPC_LITE5200) += cuImage.lite5200b lite5200b.dtb | ||
240 | image-$(CONFIG_PPC_MEDIA5200) += cuImage.media5200 media5200.dtb | ||
239 | 241 | ||
240 | # Board ports in arch/powerpc/platform/82xx/Kconfig | 242 | # Board ports in arch/powerpc/platform/82xx/Kconfig |
241 | image-$(CONFIG_MPC8272_ADS) += cuImage.mpc8272ads | 243 | image-$(CONFIG_MPC8272_ADS) += cuImage.mpc8272ads |
@@ -274,6 +276,9 @@ image-$(CONFIG_STORCENTER) += cuImage.storcenter | |||
274 | image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2 | 276 | image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2 |
275 | image-$(CONFIG_PPC_C2K) += cuImage.c2k | 277 | image-$(CONFIG_PPC_C2K) += cuImage.c2k |
276 | 278 | ||
279 | # Board port in arch/powerpc/platform/amigaone/Kconfig | ||
280 | image-$(CONFIG_AMIGAONE) += cuImage.amigaone | ||
281 | |||
277 | # For 32-bit powermacs, build the COFF and miboot images | 282 | # For 32-bit powermacs, build the COFF and miboot images |
278 | # as well as the ELF images. | 283 | # as well as the ELF images. |
279 | ifeq ($(CONFIG_PPC32),y) | 284 | ifeq ($(CONFIG_PPC32),y) |
diff --git a/arch/powerpc/boot/cuboot-amigaone.c b/arch/powerpc/boot/cuboot-amigaone.c new file mode 100644 index 000000000000..d5029674030b --- /dev/null +++ b/arch/powerpc/boot/cuboot-amigaone.c | |||
@@ -0,0 +1,35 @@ | |||
1 | /* | ||
2 | * Old U-boot compatibility for AmigaOne | ||
3 | * | ||
4 | * Author: Gerhard Pircher (gerhard_pircher@gmx.net) | ||
5 | * | ||
6 | * Based on cuboot-83xx.c | ||
7 | * Copyright (c) 2007 Freescale Semiconductor, Inc. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License version 2 as published | ||
11 | * by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include "ops.h" | ||
15 | #include "stdio.h" | ||
16 | #include "cuboot.h" | ||
17 | |||
18 | #include "ppcboot.h" | ||
19 | |||
20 | static bd_t bd; | ||
21 | |||
22 | static void platform_fixups(void) | ||
23 | { | ||
24 | dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); | ||
25 | dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq); | ||
26 | } | ||
27 | |||
28 | void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | ||
29 | unsigned long r6, unsigned long r7) | ||
30 | { | ||
31 | CUBOOT_INIT(); | ||
32 | fdt_init(_dtb_start); | ||
33 | serial_console_init(); | ||
34 | platform_ops.fixups = platform_fixups; | ||
35 | } | ||
diff --git a/arch/powerpc/boot/dts/amigaone.dts b/arch/powerpc/boot/dts/amigaone.dts new file mode 100644 index 000000000000..26549fca2ed4 --- /dev/null +++ b/arch/powerpc/boot/dts/amigaone.dts | |||
@@ -0,0 +1,173 @@ | |||
1 | /* | ||
2 | * AmigaOne Device Tree Source | ||
3 | * | ||
4 | * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | |||
14 | / { | ||
15 | model = "AmigaOne"; | ||
16 | compatible = "eyetech,amigaone"; | ||
17 | coherency-off; | ||
18 | #address-cells = <1>; | ||
19 | #size-cells = <1>; | ||
20 | |||
21 | cpus { | ||
22 | #cpus = <1>; | ||
23 | #address-cells = <1>; | ||
24 | #size-cells = <0>; | ||
25 | |||
26 | cpu@0 { | ||
27 | device_type = "cpu"; | ||
28 | reg = <0>; | ||
29 | d-cache-line-size = <32>; // 32 bytes | ||
30 | i-cache-line-size = <32>; // 32 bytes | ||
31 | d-cache-size = <32768>; // L1, 32K | ||
32 | i-cache-size = <32768>; // L1, 32K | ||
33 | timebase-frequency = <0>; // 33.3 MHz, from U-boot | ||
34 | clock-frequency = <0>; // From U-boot | ||
35 | bus-frequency = <0>; // From U-boot | ||
36 | }; | ||
37 | }; | ||
38 | |||
39 | memory { | ||
40 | device_type = "memory"; | ||
41 | reg = <0 0>; // From U-boot | ||
42 | }; | ||
43 | |||
44 | pci@80000000 { | ||
45 | device_type = "pci"; | ||
46 | compatible = "mai-logic,articia-s"; | ||
47 | bus-frequency = <33333333>; | ||
48 | bus-range = <0 0xff>; | ||
49 | ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O | ||
50 | 0x02000000 0 0x80000000 0x80000000 0 0x7d000000 // PCI memory | ||
51 | 0x02000000 0 0x00000000 0xfd000000 0 0x01000000>; // PCI alias memory (ISA) | ||
52 | // Configuration address and data register. | ||
53 | reg = <0xfec00cf8 4 | ||
54 | 0xfee00cfc 4>; | ||
55 | 8259-interrupt-acknowledge = <0xfef00000>; | ||
56 | // Do not define a interrupt-parent here, if there is no | ||
57 | // interrupt-map property. | ||
58 | #address-cells = <3>; | ||
59 | #size-cells = <2>; | ||
60 | |||
61 | isa@7 { | ||
62 | device_type = "isa"; | ||
63 | compatible = "pciclass,0601"; | ||
64 | vendor-id = <0x00001106>; | ||
65 | device-id = <0x00000686>; | ||
66 | revision-id = <0x00000010>; | ||
67 | class-code = <0x00060100>; | ||
68 | subsystem-id = <0>; | ||
69 | subsystem-vendor-id = <0>; | ||
70 | devsel-speed = <0x00000001>; | ||
71 | min-grant = <0>; | ||
72 | max-latency = <0>; | ||
73 | /* First 64k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */ | ||
74 | ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00010000>; | ||
75 | interrupt-parent = <&i8259>; | ||
76 | #interrupt-cells = <2>; | ||
77 | #address-cells = <2>; | ||
78 | #size-cells = <1>; | ||
79 | |||
80 | dma-controller@0 { | ||
81 | compatible = "pnpPNP,200"; | ||
82 | reg = <1 0x00000000 0x00000020 | ||
83 | 1 0x00000080 0x00000010 | ||
84 | 1 0x000000c0 0x00000020>; | ||
85 | }; | ||
86 | |||
87 | i8259: interrupt-controller@20 { | ||
88 | device_type = "interrupt-controller"; | ||
89 | compatible = "pnpPNP,000"; | ||
90 | interrupt-controller; | ||
91 | reg = <1 0x00000020 0x00000002 | ||
92 | 1 0x000000a0 0x00000002 | ||
93 | 1 0x000004d0 0x00000002>; | ||
94 | reserved-interrupts = <2>; | ||
95 | #interrupt-cells = <2>; | ||
96 | }; | ||
97 | |||
98 | timer@40 { | ||
99 | // Also adds pcspkr to platform devices. | ||
100 | compatible = "pnpPNP,100"; | ||
101 | reg = <1 0x00000040 0x00000020>; | ||
102 | }; | ||
103 | |||
104 | 8042@60 { | ||
105 | device_type = "8042"; | ||
106 | reg = <1 0x00000060 0x00000001 | ||
107 | 1 0x00000064 0x00000001>; | ||
108 | interrupts = <1 3 12 3>; | ||
109 | #address-cells = <1>; | ||
110 | #size-cells = <0>; | ||
111 | |||
112 | keyboard@0 { | ||
113 | compatible = "pnpPNP,303"; | ||
114 | reg = <0>; | ||
115 | }; | ||
116 | |||
117 | mouse@1 { | ||
118 | compatible = "pnpPNP,f03"; | ||
119 | reg = <1>; | ||
120 | }; | ||
121 | }; | ||
122 | |||
123 | rtc@70 { | ||
124 | compatible = "pnpPNP,b00"; | ||
125 | reg = <1 0x00000070 0x00000002>; | ||
126 | interrupts = <8 3>; | ||
127 | }; | ||
128 | |||
129 | serial@3f8 { | ||
130 | device_type = "serial"; | ||
131 | compatible = "pnpPNP,501","pnpPNP,500"; | ||
132 | reg = <1 0x000003f8 0x00000008>; | ||
133 | interrupts = <4 3>; | ||
134 | clock-frequency = <1843200>; | ||
135 | current-speed = <115200>; | ||
136 | }; | ||
137 | |||
138 | serial@2f8 { | ||
139 | device_type = "serial"; | ||
140 | compatible = "pnpPNP,501","pnpPNP,500"; | ||
141 | reg = <1 0x000002f8 0x00000008>; | ||
142 | interrupts = <3 3>; | ||
143 | clock-frequency = <1843200>; | ||
144 | current-speed = <115200>; | ||
145 | }; | ||
146 | |||
147 | parallel@378 { | ||
148 | device_type = "parallel"; | ||
149 | // No ECP support for now, otherwise add "pnpPNP,401". | ||
150 | compatible = "pnpPNP,400"; | ||
151 | reg = <1 0x00000378 0x00000003 | ||
152 | 1 0x00000778 0x00000003>; | ||
153 | }; | ||
154 | |||
155 | fdc@3f0 { | ||
156 | device_type = "fdc"; | ||
157 | compatible = "pnpPNP,700"; | ||
158 | reg = <1 0x000003f0 0x00000008>; | ||
159 | interrupts = <6 3>; | ||
160 | #address-cells = <1>; | ||
161 | #size-cells = <0>; | ||
162 | |||
163 | disk@0 { | ||
164 | reg = <0>; | ||
165 | }; | ||
166 | }; | ||
167 | }; | ||
168 | }; | ||
169 | |||
170 | chosen { | ||
171 | linux,stdout-path = "/pci@80000000/isa@7/serial@3f8"; | ||
172 | }; | ||
173 | }; | ||
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts index 524af7ef9f26..7da84fd7be93 100644 --- a/arch/powerpc/boot/dts/asp834x-redboot.dts +++ b/arch/powerpc/boot/dts/asp834x-redboot.dts | |||
@@ -181,70 +181,76 @@ | |||
181 | phy_type = "ulpi"; | 181 | phy_type = "ulpi"; |
182 | }; | 182 | }; |
183 | 183 | ||
184 | mdio@24520 { | ||
185 | #address-cells = <1>; | ||
186 | #size-cells = <0>; | ||
187 | compatible = "fsl,gianfar-mdio"; | ||
188 | reg = <0x24520 0x20>; | ||
189 | |||
190 | phy0: ethernet-phy@0 { | ||
191 | interrupt-parent = <&ipic>; | ||
192 | interrupts = <17 0x8>; | ||
193 | reg = <0x1>; | ||
194 | device_type = "ethernet-phy"; | ||
195 | }; | ||
196 | phy1: ethernet-phy@1 { | ||
197 | interrupt-parent = <&ipic>; | ||
198 | interrupts = <18 0x8>; | ||
199 | reg = <0x2>; | ||
200 | device_type = "ethernet-phy"; | ||
201 | }; | ||
202 | |||
203 | tbi0: tbi-phy@11 { | ||
204 | reg = <0x11>; | ||
205 | device_type = "tbi-phy"; | ||
206 | }; | ||
207 | }; | ||
208 | |||
209 | mdio@25520 { | ||
210 | #address-cells = <1>; | ||
211 | #size-cells = <0>; | ||
212 | compatible = "fsl,gianfar-tbi"; | ||
213 | reg = <0x25520 0x20>; | ||
214 | |||
215 | tbi1: tbi-phy@11 { | ||
216 | reg = <0x11>; | ||
217 | device_type = "tbi-phy"; | ||
218 | }; | ||
219 | }; | ||
220 | |||
221 | |||
222 | enet0: ethernet@24000 { | 184 | enet0: ethernet@24000 { |
185 | #address-cells = <1>; | ||
186 | #size-cells = <1>; | ||
223 | cell-index = <0>; | 187 | cell-index = <0>; |
224 | device_type = "network"; | 188 | device_type = "network"; |
225 | model = "TSEC"; | 189 | model = "TSEC"; |
226 | compatible = "gianfar"; | 190 | compatible = "gianfar"; |
227 | reg = <0x24000 0x1000>; | 191 | reg = <0x24000 0x1000>; |
192 | ranges = <0x0 0x24000 0x1000>; | ||
228 | local-mac-address = [ 00 08 e5 11 32 33 ]; | 193 | local-mac-address = [ 00 08 e5 11 32 33 ]; |
229 | interrupts = <32 0x8 33 0x8 34 0x8>; | 194 | interrupts = <32 0x8 33 0x8 34 0x8>; |
230 | interrupt-parent = <&ipic>; | 195 | interrupt-parent = <&ipic>; |
231 | tbi-handle = <&tbi0>; | 196 | tbi-handle = <&tbi0>; |
232 | phy-handle = <&phy0>; | 197 | phy-handle = <&phy0>; |
233 | linux,network-index = <0>; | 198 | linux,network-index = <0>; |
199 | |||
200 | mdio@520 { | ||
201 | #address-cells = <1>; | ||
202 | #size-cells = <0>; | ||
203 | compatible = "fsl,gianfar-mdio"; | ||
204 | reg = <0x520 0x20>; | ||
205 | |||
206 | phy0: ethernet-phy@0 { | ||
207 | interrupt-parent = <&ipic>; | ||
208 | interrupts = <17 0x8>; | ||
209 | reg = <0x1>; | ||
210 | device_type = "ethernet-phy"; | ||
211 | }; | ||
212 | |||
213 | phy1: ethernet-phy@1 { | ||
214 | interrupt-parent = <&ipic>; | ||
215 | interrupts = <18 0x8>; | ||
216 | reg = <0x2>; | ||
217 | device_type = "ethernet-phy"; | ||
218 | }; | ||
219 | |||
220 | tbi0: tbi-phy@11 { | ||
221 | reg = <0x11>; | ||
222 | device_type = "tbi-phy"; | ||
223 | }; | ||
224 | }; | ||
234 | }; | 225 | }; |
235 | 226 | ||
236 | enet1: ethernet@25000 { | 227 | enet1: ethernet@25000 { |
228 | #address-cells = <1>; | ||
229 | #size-cells = <1>; | ||
237 | cell-index = <1>; | 230 | cell-index = <1>; |
238 | device_type = "network"; | 231 | device_type = "network"; |
239 | model = "TSEC"; | 232 | model = "TSEC"; |
240 | compatible = "gianfar"; | 233 | compatible = "gianfar"; |
241 | reg = <0x25000 0x1000>; | 234 | reg = <0x25000 0x1000>; |
235 | ranges = <0x0 0x25000 0x1000>; | ||
242 | local-mac-address = [ 00 08 e5 11 32 34 ]; | 236 | local-mac-address = [ 00 08 e5 11 32 34 ]; |
243 | interrupts = <35 0x8 36 0x8 37 0x8>; | 237 | interrupts = <35 0x8 36 0x8 37 0x8>; |
244 | interrupt-parent = <&ipic>; | 238 | interrupt-parent = <&ipic>; |
245 | tbi-handle = <&tbi1>; | 239 | tbi-handle = <&tbi1>; |
246 | phy-handle = <&phy1>; | 240 | phy-handle = <&phy1>; |
247 | linux,network-index = <1>; | 241 | linux,network-index = <1>; |
242 | |||
243 | mdio@520 { | ||
244 | #address-cells = <1>; | ||
245 | #size-cells = <0>; | ||
246 | compatible = "fsl,gianfar-tbi"; | ||
247 | reg = <0x520 0x20>; | ||
248 | |||
249 | tbi1: tbi-phy@11 { | ||
250 | reg = <0x11>; | ||
251 | device_type = "tbi-phy"; | ||
252 | }; | ||
253 | }; | ||
248 | }; | 254 | }; |
249 | 255 | ||
250 | serial0: serial@4500 { | 256 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts index 8b5ba8261a36..5fd1ad09bdf2 100644 --- a/arch/powerpc/boot/dts/canyonlands.dts +++ b/arch/powerpc/boot/dts/canyonlands.dts | |||
@@ -127,6 +127,13 @@ | |||
127 | dcr-reg = <0x010 0x002>; | 127 | dcr-reg = <0x010 0x002>; |
128 | }; | 128 | }; |
129 | 129 | ||
130 | CRYPTO: crypto@180000 { | ||
131 | compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto"; | ||
132 | reg = <4 0x00180000 0x80400>; | ||
133 | interrupt-parent = <&UIC0>; | ||
134 | interrupts = <0x1d 0x4>; | ||
135 | }; | ||
136 | |||
130 | MAL0: mcmal { | 137 | MAL0: mcmal { |
131 | compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; | 138 | compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; |
132 | dcr-reg = <0x180 0x062>; | 139 | dcr-reg = <0x180 0x062>; |
@@ -142,6 +149,20 @@ | |||
142 | /*RXDE*/ 0x5 0x4>; | 149 | /*RXDE*/ 0x5 0x4>; |
143 | }; | 150 | }; |
144 | 151 | ||
152 | USB0: ehci@bffd0400 { | ||
153 | compatible = "ibm,usb-ehci-460ex", "usb-ehci"; | ||
154 | interrupt-parent = <&UIC2>; | ||
155 | interrupts = <0x1d 4>; | ||
156 | reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>; | ||
157 | }; | ||
158 | |||
159 | USB1: usb@bffd0000 { | ||
160 | compatible = "ohci-le"; | ||
161 | reg = <4 0xbffd0000 0x60>; | ||
162 | interrupt-parent = <&UIC2>; | ||
163 | interrupts = <0x1e 4>; | ||
164 | }; | ||
165 | |||
145 | POB0: opb { | 166 | POB0: opb { |
146 | compatible = "ibm,opb-460ex", "ibm,opb"; | 167 | compatible = "ibm,opb-460ex", "ibm,opb"; |
147 | #address-cells = <1>; | 168 | #address-cells = <1>; |
@@ -245,6 +266,20 @@ | |||
245 | reg = <0xef600700 0x00000014>; | 266 | reg = <0xef600700 0x00000014>; |
246 | interrupt-parent = <&UIC0>; | 267 | interrupt-parent = <&UIC0>; |
247 | interrupts = <0x2 0x4>; | 268 | interrupts = <0x2 0x4>; |
269 | #address-cells = <1>; | ||
270 | #size-cells = <0>; | ||
271 | rtc@68 { | ||
272 | compatible = "stm,m41t80"; | ||
273 | reg = <0x68>; | ||
274 | interrupt-parent = <&UIC2>; | ||
275 | interrupts = <0x19 0x8>; | ||
276 | }; | ||
277 | sttm@48 { | ||
278 | compatible = "ad,ad7414"; | ||
279 | reg = <0x48>; | ||
280 | interrupt-parent = <&UIC1>; | ||
281 | interrupts = <0x14 0x8>; | ||
282 | }; | ||
248 | }; | 283 | }; |
249 | 284 | ||
250 | IIC1: i2c@ef600800 { | 285 | IIC1: i2c@ef600800 { |
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts index 2f74cc4e093e..cee8080aa245 100644 --- a/arch/powerpc/boot/dts/cm5200.dts +++ b/arch/powerpc/boot/dts/cm5200.dts | |||
@@ -17,6 +17,7 @@ | |||
17 | compatible = "schindler,cm5200"; | 17 | compatible = "schindler,cm5200"; |
18 | #address-cells = <1>; | 18 | #address-cells = <1>; |
19 | #size-cells = <1>; | 19 | #size-cells = <1>; |
20 | interrupt-parent = <&mpc5200_pic>; | ||
20 | 21 | ||
21 | cpus { | 22 | cpus { |
22 | #address-cells = <1>; | 23 | #address-cells = <1>; |
@@ -66,7 +67,6 @@ | |||
66 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 67 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
67 | reg = <0x600 0x10>; | 68 | reg = <0x600 0x10>; |
68 | interrupts = <1 9 0>; | 69 | interrupts = <1 9 0>; |
69 | interrupt-parent = <&mpc5200_pic>; | ||
70 | fsl,has-wdt; | 70 | fsl,has-wdt; |
71 | }; | 71 | }; |
72 | 72 | ||
@@ -74,84 +74,76 @@ | |||
74 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 74 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
75 | reg = <0x610 0x10>; | 75 | reg = <0x610 0x10>; |
76 | interrupts = <1 10 0>; | 76 | interrupts = <1 10 0>; |
77 | interrupt-parent = <&mpc5200_pic>; | ||
78 | }; | 77 | }; |
79 | 78 | ||
80 | timer@620 { // General Purpose Timer | 79 | timer@620 { // General Purpose Timer |
81 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 80 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
82 | reg = <0x620 0x10>; | 81 | reg = <0x620 0x10>; |
83 | interrupts = <1 11 0>; | 82 | interrupts = <1 11 0>; |
84 | interrupt-parent = <&mpc5200_pic>; | ||
85 | }; | 83 | }; |
86 | 84 | ||
87 | timer@630 { // General Purpose Timer | 85 | timer@630 { // General Purpose Timer |
88 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 86 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
89 | reg = <0x630 0x10>; | 87 | reg = <0x630 0x10>; |
90 | interrupts = <1 12 0>; | 88 | interrupts = <1 12 0>; |
91 | interrupt-parent = <&mpc5200_pic>; | ||
92 | }; | 89 | }; |
93 | 90 | ||
94 | timer@640 { // General Purpose Timer | 91 | timer@640 { // General Purpose Timer |
95 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 92 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
96 | reg = <0x640 0x10>; | 93 | reg = <0x640 0x10>; |
97 | interrupts = <1 13 0>; | 94 | interrupts = <1 13 0>; |
98 | interrupt-parent = <&mpc5200_pic>; | ||
99 | }; | 95 | }; |
100 | 96 | ||
101 | timer@650 { // General Purpose Timer | 97 | timer@650 { // General Purpose Timer |
102 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 98 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
103 | reg = <0x650 0x10>; | 99 | reg = <0x650 0x10>; |
104 | interrupts = <1 14 0>; | 100 | interrupts = <1 14 0>; |
105 | interrupt-parent = <&mpc5200_pic>; | ||
106 | }; | 101 | }; |
107 | 102 | ||
108 | timer@660 { // General Purpose Timer | 103 | timer@660 { // General Purpose Timer |
109 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 104 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
110 | reg = <0x660 0x10>; | 105 | reg = <0x660 0x10>; |
111 | interrupts = <1 15 0>; | 106 | interrupts = <1 15 0>; |
112 | interrupt-parent = <&mpc5200_pic>; | ||
113 | }; | 107 | }; |
114 | 108 | ||
115 | timer@670 { // General Purpose Timer | 109 | timer@670 { // General Purpose Timer |
116 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 110 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
117 | reg = <0x670 0x10>; | 111 | reg = <0x670 0x10>; |
118 | interrupts = <1 16 0>; | 112 | interrupts = <1 16 0>; |
119 | interrupt-parent = <&mpc5200_pic>; | ||
120 | }; | 113 | }; |
121 | 114 | ||
122 | rtc@800 { // Real time clock | 115 | rtc@800 { // Real time clock |
123 | compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; | 116 | compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; |
124 | reg = <0x800 0x100>; | 117 | reg = <0x800 0x100>; |
125 | interrupts = <1 5 0 1 6 0>; | 118 | interrupts = <1 5 0 1 6 0>; |
126 | interrupt-parent = <&mpc5200_pic>; | ||
127 | }; | 119 | }; |
128 | 120 | ||
129 | gpio@b00 { | 121 | gpio_simple: gpio@b00 { |
130 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; | 122 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; |
131 | reg = <0xb00 0x40>; | 123 | reg = <0xb00 0x40>; |
132 | interrupts = <1 7 0>; | 124 | interrupts = <1 7 0>; |
133 | interrupt-parent = <&mpc5200_pic>; | 125 | gpio-controller; |
126 | #gpio-cells = <2>; | ||
134 | }; | 127 | }; |
135 | 128 | ||
136 | gpio@c00 { | 129 | gpio_wkup: gpio@c00 { |
137 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; | 130 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; |
138 | reg = <0xc00 0x40>; | 131 | reg = <0xc00 0x40>; |
139 | interrupts = <1 8 0 0 3 0>; | 132 | interrupts = <1 8 0 0 3 0>; |
140 | interrupt-parent = <&mpc5200_pic>; | 133 | gpio-controller; |
134 | #gpio-cells = <2>; | ||
141 | }; | 135 | }; |
142 | 136 | ||
143 | spi@f00 { | 137 | spi@f00 { |
144 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; | 138 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; |
145 | reg = <0xf00 0x20>; | 139 | reg = <0xf00 0x20>; |
146 | interrupts = <2 13 0 2 14 0>; | 140 | interrupts = <2 13 0 2 14 0>; |
147 | interrupt-parent = <&mpc5200_pic>; | ||
148 | }; | 141 | }; |
149 | 142 | ||
150 | usb@1000 { | 143 | usb@1000 { |
151 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; | 144 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; |
152 | reg = <0x1000 0xff>; | 145 | reg = <0x1000 0xff>; |
153 | interrupts = <2 6 0>; | 146 | interrupts = <2 6 0>; |
154 | interrupt-parent = <&mpc5200_pic>; | ||
155 | }; | 147 | }; |
156 | 148 | ||
157 | dma-controller@1200 { | 149 | dma-controller@1200 { |
@@ -161,7 +153,6 @@ | |||
161 | 3 4 0 3 5 0 3 6 0 3 7 0 | 153 | 3 4 0 3 5 0 3 6 0 3 7 0 |
162 | 3 8 0 3 9 0 3 10 0 3 11 0 | 154 | 3 8 0 3 9 0 3 10 0 3 11 0 |
163 | 3 12 0 3 13 0 3 14 0 3 15 0>; | 155 | 3 12 0 3 13 0 3 14 0 3 15 0>; |
164 | interrupt-parent = <&mpc5200_pic>; | ||
165 | }; | 156 | }; |
166 | 157 | ||
167 | xlb@1f00 { | 158 | xlb@1f00 { |
@@ -170,48 +161,34 @@ | |||
170 | }; | 161 | }; |
171 | 162 | ||
172 | serial@2000 { // PSC1 | 163 | serial@2000 { // PSC1 |
173 | device_type = "serial"; | ||
174 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 164 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
175 | port-number = <0>; // Logical port assignment | ||
176 | reg = <0x2000 0x100>; | 165 | reg = <0x2000 0x100>; |
177 | interrupts = <2 1 0>; | 166 | interrupts = <2 1 0>; |
178 | interrupt-parent = <&mpc5200_pic>; | ||
179 | }; | 167 | }; |
180 | 168 | ||
181 | serial@2200 { // PSC2 | 169 | serial@2200 { // PSC2 |
182 | device_type = "serial"; | 170 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
183 | compatible = "fsl,mpc5200-psc-uart"; | ||
184 | port-number = <1>; // Logical port assignment | ||
185 | reg = <0x2200 0x100>; | 171 | reg = <0x2200 0x100>; |
186 | interrupts = <2 2 0>; | 172 | interrupts = <2 2 0>; |
187 | interrupt-parent = <&mpc5200_pic>; | ||
188 | }; | 173 | }; |
189 | 174 | ||
190 | serial@2400 { // PSC3 | 175 | serial@2400 { // PSC3 |
191 | device_type = "serial"; | 176 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
192 | compatible = "fsl,mpc5200-psc-uart"; | ||
193 | port-number = <2>; // Logical port assignment | ||
194 | reg = <0x2400 0x100>; | 177 | reg = <0x2400 0x100>; |
195 | interrupts = <2 3 0>; | 178 | interrupts = <2 3 0>; |
196 | interrupt-parent = <&mpc5200_pic>; | ||
197 | }; | 179 | }; |
198 | 180 | ||
199 | serial@2c00 { // PSC6 | 181 | serial@2c00 { // PSC6 |
200 | device_type = "serial"; | ||
201 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 182 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
202 | port-number = <5>; // Logical port assignment | ||
203 | reg = <0x2c00 0x100>; | 183 | reg = <0x2c00 0x100>; |
204 | interrupts = <2 4 0>; | 184 | interrupts = <2 4 0>; |
205 | interrupt-parent = <&mpc5200_pic>; | ||
206 | }; | 185 | }; |
207 | 186 | ||
208 | ethernet@3000 { | 187 | ethernet@3000 { |
209 | device_type = "network"; | ||
210 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; | 188 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; |
211 | reg = <0x3000 0x400>; | 189 | reg = <0x3000 0x400>; |
212 | local-mac-address = [ 00 00 00 00 00 00 ]; | 190 | local-mac-address = [ 00 00 00 00 00 00 ]; |
213 | interrupts = <2 5 0>; | 191 | interrupts = <2 5 0>; |
214 | interrupt-parent = <&mpc5200_pic>; | ||
215 | phy-handle = <&phy0>; | 192 | phy-handle = <&phy0>; |
216 | }; | 193 | }; |
217 | 194 | ||
@@ -221,10 +198,8 @@ | |||
221 | compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; | 198 | compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; |
222 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts | 199 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts |
223 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. | 200 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. |
224 | interrupt-parent = <&mpc5200_pic>; | ||
225 | 201 | ||
226 | phy0: ethernet-phy@0 { | 202 | phy0: ethernet-phy@0 { |
227 | device_type = "ethernet-phy"; | ||
228 | reg = <0>; | 203 | reg = <0>; |
229 | }; | 204 | }; |
230 | }; | 205 | }; |
@@ -235,7 +210,6 @@ | |||
235 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | 210 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; |
236 | reg = <0x3d40 0x40>; | 211 | reg = <0x3d40 0x40>; |
237 | interrupts = <2 16 0>; | 212 | interrupts = <2 16 0>; |
238 | interrupt-parent = <&mpc5200_pic>; | ||
239 | fsl5200-clocking; | 213 | fsl5200-clocking; |
240 | }; | 214 | }; |
241 | 215 | ||
@@ -245,9 +219,8 @@ | |||
245 | }; | 219 | }; |
246 | }; | 220 | }; |
247 | 221 | ||
248 | lpb { | 222 | localbus { |
249 | model = "fsl,lpb"; | 223 | compatible = "fsl,mpc5200b-lpb","simple-bus"; |
250 | compatible = "fsl,lpb"; | ||
251 | #address-cells = <2>; | 224 | #address-cells = <2>; |
252 | #size-cells = <1>; | 225 | #size-cells = <1>; |
253 | ranges = <0 0 0xfc000000 0x2000000>; | 226 | ranges = <0 0 0xfc000000 0x2000000>; |
diff --git a/arch/powerpc/boot/dts/digsy_mtc.dts b/arch/powerpc/boot/dts/digsy_mtc.dts new file mode 100644 index 000000000000..4c36186ef946 --- /dev/null +++ b/arch/powerpc/boot/dts/digsy_mtc.dts | |||
@@ -0,0 +1,254 @@ | |||
1 | /* | ||
2 | * Digsy MTC board Device Tree Source | ||
3 | * | ||
4 | * Copyright (C) 2009 Semihalf | ||
5 | * | ||
6 | * Based on the CM5200 by M. Balakowicz | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | /dts-v1/; | ||
15 | |||
16 | / { | ||
17 | model = "intercontrol,digsy-mtc"; | ||
18 | compatible = "intercontrol,digsy-mtc"; | ||
19 | #address-cells = <1>; | ||
20 | #size-cells = <1>; | ||
21 | interrupt-parent = <&mpc5200_pic>; | ||
22 | |||
23 | cpus { | ||
24 | #address-cells = <1>; | ||
25 | #size-cells = <0>; | ||
26 | |||
27 | PowerPC,5200@0 { | ||
28 | device_type = "cpu"; | ||
29 | reg = <0>; | ||
30 | d-cache-line-size = <32>; | ||
31 | i-cache-line-size = <32>; | ||
32 | d-cache-size = <0x4000>; // L1, 16K | ||
33 | i-cache-size = <0x4000>; // L1, 16K | ||
34 | timebase-frequency = <0>; // from bootloader | ||
35 | bus-frequency = <0>; // from bootloader | ||
36 | clock-frequency = <0>; // from bootloader | ||
37 | }; | ||
38 | }; | ||
39 | |||
40 | memory { | ||
41 | device_type = "memory"; | ||
42 | reg = <0x00000000 0x02000000>; // 32MB | ||
43 | }; | ||
44 | |||
45 | soc5200@f0000000 { | ||
46 | #address-cells = <1>; | ||
47 | #size-cells = <1>; | ||
48 | compatible = "fsl,mpc5200b-immr"; | ||
49 | ranges = <0 0xf0000000 0x0000c000>; | ||
50 | reg = <0xf0000000 0x00000100>; | ||
51 | bus-frequency = <0>; // from bootloader | ||
52 | system-frequency = <0>; // from bootloader | ||
53 | |||
54 | cdm@200 { | ||
55 | compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; | ||
56 | reg = <0x200 0x38>; | ||
57 | }; | ||
58 | |||
59 | mpc5200_pic: interrupt-controller@500 { | ||
60 | // 5200 interrupts are encoded into two levels; | ||
61 | interrupt-controller; | ||
62 | #interrupt-cells = <3>; | ||
63 | compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; | ||
64 | reg = <0x500 0x80>; | ||
65 | }; | ||
66 | |||
67 | timer@600 { // General Purpose Timer | ||
68 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
69 | reg = <0x600 0x10>; | ||
70 | interrupts = <1 9 0>; | ||
71 | fsl,has-wdt; | ||
72 | }; | ||
73 | |||
74 | timer@610 { // General Purpose Timer | ||
75 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
76 | reg = <0x610 0x10>; | ||
77 | interrupts = <1 10 0>; | ||
78 | }; | ||
79 | |||
80 | timer@620 { // General Purpose Timer | ||
81 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
82 | reg = <0x620 0x10>; | ||
83 | interrupts = <1 11 0>; | ||
84 | }; | ||
85 | |||
86 | timer@630 { // General Purpose Timer | ||
87 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
88 | reg = <0x630 0x10>; | ||
89 | interrupts = <1 12 0>; | ||
90 | }; | ||
91 | |||
92 | timer@640 { // General Purpose Timer | ||
93 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
94 | reg = <0x640 0x10>; | ||
95 | interrupts = <1 13 0>; | ||
96 | }; | ||
97 | |||
98 | timer@650 { // General Purpose Timer | ||
99 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
100 | reg = <0x650 0x10>; | ||
101 | interrupts = <1 14 0>; | ||
102 | }; | ||
103 | |||
104 | timer@660 { // General Purpose Timer | ||
105 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
106 | reg = <0x660 0x10>; | ||
107 | interrupts = <1 15 0>; | ||
108 | }; | ||
109 | |||
110 | timer@670 { // General Purpose Timer | ||
111 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
112 | reg = <0x670 0x10>; | ||
113 | interrupts = <1 16 0>; | ||
114 | }; | ||
115 | |||
116 | gpio_simple: gpio@b00 { | ||
117 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; | ||
118 | reg = <0xb00 0x40>; | ||
119 | interrupts = <1 7 0>; | ||
120 | gpio-controller; | ||
121 | #gpio-cells = <2>; | ||
122 | }; | ||
123 | |||
124 | gpio_wkup: gpio@c00 { | ||
125 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; | ||
126 | reg = <0xc00 0x40>; | ||
127 | interrupts = <1 8 0 0 3 0>; | ||
128 | gpio-controller; | ||
129 | #gpio-cells = <2>; | ||
130 | }; | ||
131 | |||
132 | spi@f00 { | ||
133 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; | ||
134 | reg = <0xf00 0x20>; | ||
135 | interrupts = <2 13 0 2 14 0>; | ||
136 | }; | ||
137 | |||
138 | usb@1000 { | ||
139 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; | ||
140 | reg = <0x1000 0xff>; | ||
141 | interrupts = <2 6 0>; | ||
142 | }; | ||
143 | |||
144 | dma-controller@1200 { | ||
145 | compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; | ||
146 | reg = <0x1200 0x80>; | ||
147 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 | ||
148 | 3 4 0 3 5 0 3 6 0 3 7 0 | ||
149 | 3 8 0 3 9 0 3 10 0 3 11 0 | ||
150 | 3 12 0 3 13 0 3 14 0 3 15 0>; | ||
151 | }; | ||
152 | |||
153 | xlb@1f00 { | ||
154 | compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; | ||
155 | reg = <0x1f00 0x100>; | ||
156 | }; | ||
157 | |||
158 | serial@2600 { // PSC4 | ||
159 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | ||
160 | reg = <0x2600 0x100>; | ||
161 | interrupts = <2 11 0>; | ||
162 | }; | ||
163 | |||
164 | serial@2800 { // PSC5 | ||
165 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | ||
166 | reg = <0x2800 0x100>; | ||
167 | interrupts = <2 12 0>; | ||
168 | }; | ||
169 | |||
170 | ethernet@3000 { | ||
171 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; | ||
172 | reg = <0x3000 0x400>; | ||
173 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
174 | interrupts = <2 5 0>; | ||
175 | phy-handle = <&phy0>; | ||
176 | }; | ||
177 | |||
178 | mdio@3000 { | ||
179 | #address-cells = <1>; | ||
180 | #size-cells = <0>; | ||
181 | compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; | ||
182 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts | ||
183 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. | ||
184 | |||
185 | phy0: ethernet-phy@0 { | ||
186 | reg = <0>; | ||
187 | }; | ||
188 | }; | ||
189 | |||
190 | ata@3a00 { | ||
191 | compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; | ||
192 | reg = <0x3a00 0x100>; | ||
193 | interrupts = <2 7 0>; | ||
194 | }; | ||
195 | |||
196 | i2c@3d00 { | ||
197 | #address-cells = <1>; | ||
198 | #size-cells = <0>; | ||
199 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | ||
200 | reg = <0x3d00 0x40>; | ||
201 | interrupts = <2 15 0>; | ||
202 | fsl5200-clocking; | ||
203 | |||
204 | rtc@50 { | ||
205 | compatible = "at,24c08"; | ||
206 | reg = <0x50>; | ||
207 | }; | ||
208 | |||
209 | rtc@68 { | ||
210 | compatible = "dallas,ds1339"; | ||
211 | reg = <0x68>; | ||
212 | }; | ||
213 | }; | ||
214 | |||
215 | sram@8000 { | ||
216 | compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; | ||
217 | reg = <0x8000 0x4000>; | ||
218 | }; | ||
219 | }; | ||
220 | |||
221 | lpb { | ||
222 | compatible = "fsl,mpc5200b-lpb","simple-bus"; | ||
223 | #address-cells = <2>; | ||
224 | #size-cells = <1>; | ||
225 | ranges = <0 0 0xff000000 0x1000000>; | ||
226 | |||
227 | // 16-bit flash device at LocalPlus Bus CS0 | ||
228 | flash@0,0 { | ||
229 | compatible = "cfi-flash"; | ||
230 | reg = <0 0 0x1000000>; | ||
231 | bank-width = <2>; | ||
232 | device-width = <2>; | ||
233 | #size-cells = <1>; | ||
234 | #address-cells = <1>; | ||
235 | |||
236 | partition@0 { | ||
237 | label = "kernel"; | ||
238 | reg = <0x0 0x00200000>; | ||
239 | }; | ||
240 | partition@200000 { | ||
241 | label = "root"; | ||
242 | reg = <0x00200000 0x00300000>; | ||
243 | }; | ||
244 | partition@500000 { | ||
245 | label = "user"; | ||
246 | reg = <0x00500000 0x00a00000>; | ||
247 | }; | ||
248 | partition@f00000 { | ||
249 | label = "u-boot"; | ||
250 | reg = <0x00f00000 0x100000>; | ||
251 | }; | ||
252 | }; | ||
253 | }; | ||
254 | }; | ||
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts new file mode 100644 index 000000000000..d47ad0718759 --- /dev/null +++ b/arch/powerpc/boot/dts/gef_ppc9a.dts | |||
@@ -0,0 +1,367 @@ | |||
1 | /* | ||
2 | * GE Fanuc PPC9A Device Tree Source | ||
3 | * | ||
4 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | * | ||
11 | * Based on: SBS CM6 Device Tree Source | ||
12 | * Copyright 2007 SBS Technologies GmbH & Co. KG | ||
13 | * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source) | ||
14 | * Copyright 2006 Freescale Semiconductor Inc. | ||
15 | */ | ||
16 | |||
17 | /* | ||
18 | * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts | ||
19 | */ | ||
20 | |||
21 | /dts-v1/; | ||
22 | |||
23 | / { | ||
24 | model = "GEF_PPC9A"; | ||
25 | compatible = "gef,ppc9a"; | ||
26 | #address-cells = <1>; | ||
27 | #size-cells = <1>; | ||
28 | |||
29 | aliases { | ||
30 | ethernet0 = &enet0; | ||
31 | ethernet1 = &enet1; | ||
32 | serial0 = &serial0; | ||
33 | serial1 = &serial1; | ||
34 | pci0 = &pci0; | ||
35 | }; | ||
36 | |||
37 | cpus { | ||
38 | #address-cells = <1>; | ||
39 | #size-cells = <0>; | ||
40 | |||
41 | PowerPC,8641@0 { | ||
42 | device_type = "cpu"; | ||
43 | reg = <0>; | ||
44 | d-cache-line-size = <32>; // 32 bytes | ||
45 | i-cache-line-size = <32>; // 32 bytes | ||
46 | d-cache-size = <32768>; // L1, 32K | ||
47 | i-cache-size = <32768>; // L1, 32K | ||
48 | timebase-frequency = <0>; // From uboot | ||
49 | bus-frequency = <0>; // From uboot | ||
50 | clock-frequency = <0>; // From uboot | ||
51 | }; | ||
52 | PowerPC,8641@1 { | ||
53 | device_type = "cpu"; | ||
54 | reg = <1>; | ||
55 | d-cache-line-size = <32>; // 32 bytes | ||
56 | i-cache-line-size = <32>; // 32 bytes | ||
57 | d-cache-size = <32768>; // L1, 32K | ||
58 | i-cache-size = <32768>; // L1, 32K | ||
59 | timebase-frequency = <0>; // From uboot | ||
60 | bus-frequency = <0>; // From uboot | ||
61 | clock-frequency = <0>; // From uboot | ||
62 | }; | ||
63 | }; | ||
64 | |||
65 | memory { | ||
66 | device_type = "memory"; | ||
67 | reg = <0x0 0x40000000>; // set by uboot | ||
68 | }; | ||
69 | |||
70 | localbus@fef05000 { | ||
71 | #address-cells = <2>; | ||
72 | #size-cells = <1>; | ||
73 | compatible = "fsl,mpc8641-localbus", "simple-bus"; | ||
74 | reg = <0xfef05000 0x1000>; | ||
75 | interrupts = <19 2>; | ||
76 | interrupt-parent = <&mpic>; | ||
77 | |||
78 | ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash | ||
79 | 1 0 0xe8000000 0x08000000 // Paged Flash 0 | ||
80 | 2 0 0xe0000000 0x08000000 // Paged Flash 1 | ||
81 | 3 0 0xfc100000 0x00020000 // NVRAM | ||
82 | 4 0 0xfc000000 0x00008000 // FPGA | ||
83 | 5 0 0xfc008000 0x00008000 // AFIX FPGA | ||
84 | 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit) | ||
85 | 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit) | ||
86 | |||
87 | /* flash@0,0 is a mirror of part of the memory in flash@1,0 | ||
88 | flash@0,0 { | ||
89 | compatible = "gef,ppc9a-firmware-mirror", "cfi-flash"; | ||
90 | reg = <0x0 0x0 0x1000000>; | ||
91 | bank-width = <4>; | ||
92 | device-width = <2>; | ||
93 | #address-cells = <1>; | ||
94 | #size-cells = <1>; | ||
95 | partition@0 { | ||
96 | label = "firmware"; | ||
97 | reg = <0x0 0x1000000>; | ||
98 | read-only; | ||
99 | }; | ||
100 | }; | ||
101 | */ | ||
102 | |||
103 | flash@1,0 { | ||
104 | compatible = "gef,ppc9a-paged-flash", "cfi-flash"; | ||
105 | reg = <0x1 0x0 0x8000000>; | ||
106 | bank-width = <4>; | ||
107 | device-width = <2>; | ||
108 | #address-cells = <1>; | ||
109 | #size-cells = <1>; | ||
110 | partition@0 { | ||
111 | label = "user"; | ||
112 | reg = <0x0 0x7800000>; | ||
113 | }; | ||
114 | partition@7800000 { | ||
115 | label = "firmware"; | ||
116 | reg = <0x7800000 0x800000>; | ||
117 | read-only; | ||
118 | }; | ||
119 | }; | ||
120 | |||
121 | fpga@4,0 { | ||
122 | compatible = "gef,ppc9a-fpga-regs"; | ||
123 | reg = <0x4 0x0 0x40>; | ||
124 | }; | ||
125 | |||
126 | wdt@4,2000 { | ||
127 | compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00", | ||
128 | "gef,fpga-wdt"; | ||
129 | reg = <0x4 0x2000 0x8>; | ||
130 | interrupts = <0x1a 0x4>; | ||
131 | interrupt-parent = <&gef_pic>; | ||
132 | }; | ||
133 | /* Second watchdog available, driver currently supports one. | ||
134 | wdt@4,2010 { | ||
135 | compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00", | ||
136 | "gef,fpga-wdt"; | ||
137 | reg = <0x4 0x2010 0x8>; | ||
138 | interrupts = <0x1b 0x4>; | ||
139 | interrupt-parent = <&gef_pic>; | ||
140 | }; | ||
141 | */ | ||
142 | gef_pic: pic@4,4000 { | ||
143 | #interrupt-cells = <1>; | ||
144 | interrupt-controller; | ||
145 | compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00"; | ||
146 | reg = <0x4 0x4000 0x20>; | ||
147 | interrupts = <0x8 | ||
148 | 0x9>; | ||
149 | interrupt-parent = <&mpic>; | ||
150 | |||
151 | }; | ||
152 | gef_gpio: gpio@7,14000 { | ||
153 | #gpio-cells = <2>; | ||
154 | compatible = "gef,ppc9a-gpio", "gef,sbc610-gpio"; | ||
155 | reg = <0x7 0x14000 0x24>; | ||
156 | gpio-controller; | ||
157 | }; | ||
158 | }; | ||
159 | |||
160 | soc@fef00000 { | ||
161 | #address-cells = <1>; | ||
162 | #size-cells = <1>; | ||
163 | #interrupt-cells = <2>; | ||
164 | compatible = "fsl,mpc8641-soc", "simple-bus"; | ||
165 | ranges = <0x0 0xfef00000 0x00100000>; | ||
166 | reg = <0xfef00000 0x100000>; // CCSRBAR 1M | ||
167 | bus-frequency = <33333333>; | ||
168 | |||
169 | i2c1: i2c@3000 { | ||
170 | #address-cells = <1>; | ||
171 | #size-cells = <0>; | ||
172 | compatible = "fsl-i2c"; | ||
173 | reg = <0x3000 0x100>; | ||
174 | interrupts = <0x2b 0x2>; | ||
175 | interrupt-parent = <&mpic>; | ||
176 | dfsrr; | ||
177 | |||
178 | hwmon@48 { | ||
179 | compatible = "national,lm92"; | ||
180 | reg = <0x48>; | ||
181 | }; | ||
182 | |||
183 | hwmon@4c { | ||
184 | compatible = "adi,adt7461"; | ||
185 | reg = <0x4c>; | ||
186 | }; | ||
187 | |||
188 | rtc@51 { | ||
189 | compatible = "epson,rx8581"; | ||
190 | reg = <0x00000051>; | ||
191 | }; | ||
192 | |||
193 | eti@6b { | ||
194 | compatible = "dallas,ds1682"; | ||
195 | reg = <0x6b>; | ||
196 | }; | ||
197 | }; | ||
198 | |||
199 | i2c2: i2c@3100 { | ||
200 | #address-cells = <1>; | ||
201 | #size-cells = <0>; | ||
202 | compatible = "fsl-i2c"; | ||
203 | reg = <0x3100 0x100>; | ||
204 | interrupts = <0x2b 0x2>; | ||
205 | interrupt-parent = <&mpic>; | ||
206 | dfsrr; | ||
207 | }; | ||
208 | |||
209 | dma@21300 { | ||
210 | #address-cells = <1>; | ||
211 | #size-cells = <1>; | ||
212 | compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; | ||
213 | reg = <0x21300 0x4>; | ||
214 | ranges = <0x0 0x21100 0x200>; | ||
215 | cell-index = <0>; | ||
216 | dma-channel@0 { | ||
217 | compatible = "fsl,mpc8641-dma-channel", | ||
218 | "fsl,eloplus-dma-channel"; | ||
219 | reg = <0x0 0x80>; | ||
220 | cell-index = <0>; | ||
221 | interrupt-parent = <&mpic>; | ||
222 | interrupts = <20 2>; | ||
223 | }; | ||
224 | dma-channel@80 { | ||
225 | compatible = "fsl,mpc8641-dma-channel", | ||
226 | "fsl,eloplus-dma-channel"; | ||
227 | reg = <0x80 0x80>; | ||
228 | cell-index = <1>; | ||
229 | interrupt-parent = <&mpic>; | ||
230 | interrupts = <21 2>; | ||
231 | }; | ||
232 | dma-channel@100 { | ||
233 | compatible = "fsl,mpc8641-dma-channel", | ||
234 | "fsl,eloplus-dma-channel"; | ||
235 | reg = <0x100 0x80>; | ||
236 | cell-index = <2>; | ||
237 | interrupt-parent = <&mpic>; | ||
238 | interrupts = <22 2>; | ||
239 | }; | ||
240 | dma-channel@180 { | ||
241 | compatible = "fsl,mpc8641-dma-channel", | ||
242 | "fsl,eloplus-dma-channel"; | ||
243 | reg = <0x180 0x80>; | ||
244 | cell-index = <3>; | ||
245 | interrupt-parent = <&mpic>; | ||
246 | interrupts = <23 2>; | ||
247 | }; | ||
248 | }; | ||
249 | |||
250 | enet0: ethernet@24000 { | ||
251 | #address-cells = <1>; | ||
252 | #size-cells = <1>; | ||
253 | device_type = "network"; | ||
254 | model = "eTSEC"; | ||
255 | compatible = "gianfar"; | ||
256 | reg = <0x24000 0x1000>; | ||
257 | ranges = <0x0 0x24000 0x1000>; | ||
258 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
259 | interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; | ||
260 | interrupt-parent = <&mpic>; | ||
261 | phy-handle = <&phy0>; | ||
262 | phy-connection-type = "gmii"; | ||
263 | |||
264 | mdio@520 { | ||
265 | #address-cells = <1>; | ||
266 | #size-cells = <0>; | ||
267 | compatible = "fsl,gianfar-mdio"; | ||
268 | reg = <0x520 0x20>; | ||
269 | |||
270 | phy0: ethernet-phy@0 { | ||
271 | interrupt-parent = <&gef_pic>; | ||
272 | interrupts = <0x9 0x4>; | ||
273 | reg = <1>; | ||
274 | }; | ||
275 | phy2: ethernet-phy@2 { | ||
276 | interrupt-parent = <&gef_pic>; | ||
277 | interrupts = <0x8 0x4>; | ||
278 | reg = <3>; | ||
279 | }; | ||
280 | }; | ||
281 | }; | ||
282 | |||
283 | enet1: ethernet@26000 { | ||
284 | device_type = "network"; | ||
285 | model = "eTSEC"; | ||
286 | compatible = "gianfar"; | ||
287 | reg = <0x26000 0x1000>; | ||
288 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
289 | interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>; | ||
290 | interrupt-parent = <&mpic>; | ||
291 | phy-handle = <&phy2>; | ||
292 | phy-connection-type = "gmii"; | ||
293 | }; | ||
294 | |||
295 | serial0: serial@4500 { | ||
296 | cell-index = <0>; | ||
297 | device_type = "serial"; | ||
298 | compatible = "ns16550"; | ||
299 | reg = <0x4500 0x100>; | ||
300 | clock-frequency = <0>; | ||
301 | interrupts = <0x2a 0x2>; | ||
302 | interrupt-parent = <&mpic>; | ||
303 | }; | ||
304 | |||
305 | serial1: serial@4600 { | ||
306 | cell-index = <1>; | ||
307 | device_type = "serial"; | ||
308 | compatible = "ns16550"; | ||
309 | reg = <0x4600 0x100>; | ||
310 | clock-frequency = <0>; | ||
311 | interrupts = <0x1c 0x2>; | ||
312 | interrupt-parent = <&mpic>; | ||
313 | }; | ||
314 | |||
315 | mpic: pic@40000 { | ||
316 | clock-frequency = <0>; | ||
317 | interrupt-controller; | ||
318 | #address-cells = <0>; | ||
319 | #interrupt-cells = <2>; | ||
320 | reg = <0x40000 0x40000>; | ||
321 | compatible = "chrp,open-pic"; | ||
322 | device_type = "open-pic"; | ||
323 | }; | ||
324 | |||
325 | global-utilities@e0000 { | ||
326 | compatible = "fsl,mpc8641-guts"; | ||
327 | reg = <0xe0000 0x1000>; | ||
328 | fsl,has-rstcr; | ||
329 | }; | ||
330 | }; | ||
331 | |||
332 | pci0: pcie@fef08000 { | ||
333 | compatible = "fsl,mpc8641-pcie"; | ||
334 | device_type = "pci"; | ||
335 | #interrupt-cells = <1>; | ||
336 | #size-cells = <2>; | ||
337 | #address-cells = <3>; | ||
338 | reg = <0xfef08000 0x1000>; | ||
339 | bus-range = <0x0 0xff>; | ||
340 | ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000 | ||
341 | 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>; | ||
342 | clock-frequency = <33333333>; | ||
343 | interrupt-parent = <&mpic>; | ||
344 | interrupts = <0x18 0x2>; | ||
345 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
346 | interrupt-map = < | ||
347 | 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
348 | 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
349 | 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
350 | 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
351 | >; | ||
352 | |||
353 | pcie@0 { | ||
354 | reg = <0 0 0 0 0>; | ||
355 | #size-cells = <2>; | ||
356 | #address-cells = <3>; | ||
357 | device_type = "pci"; | ||
358 | ranges = <0x02000000 0x0 0x80000000 | ||
359 | 0x02000000 0x0 0x80000000 | ||
360 | 0x0 0x40000000 | ||
361 | |||
362 | 0x01000000 0x0 0x00000000 | ||
363 | 0x01000000 0x0 0x00000000 | ||
364 | 0x0 0x00400000>; | ||
365 | }; | ||
366 | }; | ||
367 | }; | ||
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts new file mode 100644 index 000000000000..1569117e5ddc --- /dev/null +++ b/arch/powerpc/boot/dts/gef_sbc310.dts | |||
@@ -0,0 +1,367 @@ | |||
1 | /* | ||
2 | * GE Fanuc SBC310 Device Tree Source | ||
3 | * | ||
4 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | * | ||
11 | * Based on: SBS CM6 Device Tree Source | ||
12 | * Copyright 2007 SBS Technologies GmbH & Co. KG | ||
13 | * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source) | ||
14 | * Copyright 2006 Freescale Semiconductor Inc. | ||
15 | */ | ||
16 | |||
17 | /* | ||
18 | * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts | ||
19 | */ | ||
20 | |||
21 | /dts-v1/; | ||
22 | |||
23 | / { | ||
24 | model = "GEF_SBC310"; | ||
25 | compatible = "gef,sbc310"; | ||
26 | #address-cells = <1>; | ||
27 | #size-cells = <1>; | ||
28 | |||
29 | aliases { | ||
30 | ethernet0 = &enet0; | ||
31 | ethernet1 = &enet1; | ||
32 | serial0 = &serial0; | ||
33 | serial1 = &serial1; | ||
34 | pci0 = &pci0; | ||
35 | }; | ||
36 | |||
37 | cpus { | ||
38 | #address-cells = <1>; | ||
39 | #size-cells = <0>; | ||
40 | |||
41 | PowerPC,8641@0 { | ||
42 | device_type = "cpu"; | ||
43 | reg = <0>; | ||
44 | d-cache-line-size = <32>; // 32 bytes | ||
45 | i-cache-line-size = <32>; // 32 bytes | ||
46 | d-cache-size = <32768>; // L1, 32K | ||
47 | i-cache-size = <32768>; // L1, 32K | ||
48 | timebase-frequency = <0>; // From uboot | ||
49 | bus-frequency = <0>; // From uboot | ||
50 | clock-frequency = <0>; // From uboot | ||
51 | }; | ||
52 | PowerPC,8641@1 { | ||
53 | device_type = "cpu"; | ||
54 | reg = <1>; | ||
55 | d-cache-line-size = <32>; // 32 bytes | ||
56 | i-cache-line-size = <32>; // 32 bytes | ||
57 | d-cache-size = <32768>; // L1, 32K | ||
58 | i-cache-size = <32768>; // L1, 32K | ||
59 | timebase-frequency = <0>; // From uboot | ||
60 | bus-frequency = <0>; // From uboot | ||
61 | clock-frequency = <0>; // From uboot | ||
62 | }; | ||
63 | }; | ||
64 | |||
65 | memory { | ||
66 | device_type = "memory"; | ||
67 | reg = <0x0 0x40000000>; // set by uboot | ||
68 | }; | ||
69 | |||
70 | localbus@fef05000 { | ||
71 | #address-cells = <2>; | ||
72 | #size-cells = <1>; | ||
73 | compatible = "fsl,mpc8641-localbus", "simple-bus"; | ||
74 | reg = <0xfef05000 0x1000>; | ||
75 | interrupts = <19 2>; | ||
76 | interrupt-parent = <&mpic>; | ||
77 | |||
78 | ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash | ||
79 | 1 0 0xe0000000 0x08000000 // Paged Flash 0 | ||
80 | 2 0 0xe8000000 0x08000000 // Paged Flash 1 | ||
81 | 3 0 0xfc100000 0x00020000 // NVRAM | ||
82 | 4 0 0xfc000000 0x00010000>; // FPGA | ||
83 | |||
84 | /* flash@0,0 is a mirror of part of the memory in flash@1,0 | ||
85 | flash@0,0 { | ||
86 | compatible = "cfi-flash"; | ||
87 | reg = <0 0 0x01000000>; | ||
88 | bank-width = <2>; | ||
89 | device-width = <2>; | ||
90 | #address-cells = <1>; | ||
91 | #size-cells = <1>; | ||
92 | partition@0 { | ||
93 | label = "firmware"; | ||
94 | reg = <0x00000000 0x01000000>; | ||
95 | read-only; | ||
96 | }; | ||
97 | }; | ||
98 | */ | ||
99 | |||
100 | flash@1,0 { | ||
101 | compatible = "cfi-flash"; | ||
102 | reg = <1 0 0x8000000>; | ||
103 | bank-width = <2>; | ||
104 | device-width = <2>; | ||
105 | #address-cells = <1>; | ||
106 | #size-cells = <1>; | ||
107 | partition@0 { | ||
108 | label = "user"; | ||
109 | reg = <0x00000000 0x07800000>; | ||
110 | }; | ||
111 | partition@7800000 { | ||
112 | label = "firmware"; | ||
113 | reg = <0x07800000 0x00800000>; | ||
114 | read-only; | ||
115 | }; | ||
116 | }; | ||
117 | |||
118 | fpga@4,0 { | ||
119 | compatible = "gef,fpga-regs"; | ||
120 | reg = <0x4 0x0 0x40>; | ||
121 | }; | ||
122 | |||
123 | wdt@4,2000 { | ||
124 | #interrupt-cells = <2>; | ||
125 | device_type = "watchdog"; | ||
126 | compatible = "gef,fpga-wdt"; | ||
127 | reg = <0x4 0x2000 0x8>; | ||
128 | interrupts = <0x1a 0x4>; | ||
129 | interrupt-parent = <&gef_pic>; | ||
130 | }; | ||
131 | /* | ||
132 | wdt@4,2010 { | ||
133 | #interrupt-cells = <2>; | ||
134 | device_type = "watchdog"; | ||
135 | compatible = "gef,fpga-wdt"; | ||
136 | reg = <0x4 0x2010 0x8>; | ||
137 | interrupts = <0x1b 0x4>; | ||
138 | interrupt-parent = <&gef_pic>; | ||
139 | }; | ||
140 | */ | ||
141 | gef_pic: pic@4,4000 { | ||
142 | #interrupt-cells = <1>; | ||
143 | interrupt-controller; | ||
144 | compatible = "gef,fpga-pic"; | ||
145 | reg = <0x4 0x4000 0x20>; | ||
146 | interrupts = <0x8 | ||
147 | 0x9>; | ||
148 | interrupt-parent = <&mpic>; | ||
149 | |||
150 | }; | ||
151 | gef_gpio: gpio@4,8000 { | ||
152 | #gpio-cells = <2>; | ||
153 | compatible = "gef,sbc310-gpio"; | ||
154 | reg = <0x4 0x8000 0x24>; | ||
155 | gpio-controller; | ||
156 | }; | ||
157 | }; | ||
158 | |||
159 | soc@fef00000 { | ||
160 | #address-cells = <1>; | ||
161 | #size-cells = <1>; | ||
162 | #interrupt-cells = <2>; | ||
163 | device_type = "soc"; | ||
164 | compatible = "simple-bus"; | ||
165 | ranges = <0x0 0xfef00000 0x00100000>; | ||
166 | reg = <0xfef00000 0x100000>; // CCSRBAR 1M | ||
167 | bus-frequency = <33333333>; | ||
168 | |||
169 | i2c1: i2c@3000 { | ||
170 | #address-cells = <1>; | ||
171 | #size-cells = <0>; | ||
172 | compatible = "fsl-i2c"; | ||
173 | reg = <0x3000 0x100>; | ||
174 | interrupts = <0x2b 0x2>; | ||
175 | interrupt-parent = <&mpic>; | ||
176 | dfsrr; | ||
177 | |||
178 | rtc@51 { | ||
179 | compatible = "epson,rx8581"; | ||
180 | reg = <0x00000051>; | ||
181 | }; | ||
182 | }; | ||
183 | |||
184 | i2c2: i2c@3100 { | ||
185 | #address-cells = <1>; | ||
186 | #size-cells = <0>; | ||
187 | compatible = "fsl-i2c"; | ||
188 | reg = <0x3100 0x100>; | ||
189 | interrupts = <0x2b 0x2>; | ||
190 | interrupt-parent = <&mpic>; | ||
191 | dfsrr; | ||
192 | |||
193 | hwmon@48 { | ||
194 | compatible = "national,lm92"; | ||
195 | reg = <0x48>; | ||
196 | }; | ||
197 | |||
198 | hwmon@4c { | ||
199 | compatible = "adi,adt7461"; | ||
200 | reg = <0x4c>; | ||
201 | }; | ||
202 | |||
203 | eti@6b { | ||
204 | compatible = "dallas,ds1682"; | ||
205 | reg = <0x6b>; | ||
206 | }; | ||
207 | }; | ||
208 | |||
209 | dma@21300 { | ||
210 | #address-cells = <1>; | ||
211 | #size-cells = <1>; | ||
212 | compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; | ||
213 | reg = <0x21300 0x4>; | ||
214 | ranges = <0x0 0x21100 0x200>; | ||
215 | cell-index = <0>; | ||
216 | dma-channel@0 { | ||
217 | compatible = "fsl,mpc8641-dma-channel", | ||
218 | "fsl,eloplus-dma-channel"; | ||
219 | reg = <0x0 0x80>; | ||
220 | cell-index = <0>; | ||
221 | interrupt-parent = <&mpic>; | ||
222 | interrupts = <20 2>; | ||
223 | }; | ||
224 | dma-channel@80 { | ||
225 | compatible = "fsl,mpc8641-dma-channel", | ||
226 | "fsl,eloplus-dma-channel"; | ||
227 | reg = <0x80 0x80>; | ||
228 | cell-index = <1>; | ||
229 | interrupt-parent = <&mpic>; | ||
230 | interrupts = <21 2>; | ||
231 | }; | ||
232 | dma-channel@100 { | ||
233 | compatible = "fsl,mpc8641-dma-channel", | ||
234 | "fsl,eloplus-dma-channel"; | ||
235 | reg = <0x100 0x80>; | ||
236 | cell-index = <2>; | ||
237 | interrupt-parent = <&mpic>; | ||
238 | interrupts = <22 2>; | ||
239 | }; | ||
240 | dma-channel@180 { | ||
241 | compatible = "fsl,mpc8641-dma-channel", | ||
242 | "fsl,eloplus-dma-channel"; | ||
243 | reg = <0x180 0x80>; | ||
244 | cell-index = <3>; | ||
245 | interrupt-parent = <&mpic>; | ||
246 | interrupts = <23 2>; | ||
247 | }; | ||
248 | }; | ||
249 | |||
250 | enet0: ethernet@24000 { | ||
251 | #address-cells = <1>; | ||
252 | #size-cells = <1>; | ||
253 | device_type = "network"; | ||
254 | model = "eTSEC"; | ||
255 | compatible = "gianfar"; | ||
256 | reg = <0x24000 0x1000>; | ||
257 | ranges = <0x0 0x24000 0x1000>; | ||
258 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
259 | interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; | ||
260 | interrupt-parent = <&mpic>; | ||
261 | phy-handle = <&phy0>; | ||
262 | phy-connection-type = "gmii"; | ||
263 | |||
264 | mdio@520 { | ||
265 | #address-cells = <1>; | ||
266 | #size-cells = <0>; | ||
267 | compatible = "fsl,gianfar-mdio"; | ||
268 | reg = <0x520 0x20>; | ||
269 | |||
270 | phy0: ethernet-phy@0 { | ||
271 | interrupt-parent = <&gef_pic>; | ||
272 | interrupts = <0x9 0x4>; | ||
273 | reg = <1>; | ||
274 | }; | ||
275 | phy2: ethernet-phy@2 { | ||
276 | interrupt-parent = <&gef_pic>; | ||
277 | interrupts = <0x8 0x4>; | ||
278 | reg = <3>; | ||
279 | }; | ||
280 | }; | ||
281 | }; | ||
282 | |||
283 | enet1: ethernet@26000 { | ||
284 | device_type = "network"; | ||
285 | model = "eTSEC"; | ||
286 | compatible = "gianfar"; | ||
287 | reg = <0x26000 0x1000>; | ||
288 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
289 | interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>; | ||
290 | interrupt-parent = <&mpic>; | ||
291 | phy-handle = <&phy2>; | ||
292 | phy-connection-type = "gmii"; | ||
293 | }; | ||
294 | |||
295 | serial0: serial@4500 { | ||
296 | cell-index = <0>; | ||
297 | device_type = "serial"; | ||
298 | compatible = "ns16550"; | ||
299 | reg = <0x4500 0x100>; | ||
300 | clock-frequency = <0>; | ||
301 | interrupts = <0x2a 0x2>; | ||
302 | interrupt-parent = <&mpic>; | ||
303 | }; | ||
304 | |||
305 | serial1: serial@4600 { | ||
306 | cell-index = <1>; | ||
307 | device_type = "serial"; | ||
308 | compatible = "ns16550"; | ||
309 | reg = <0x4600 0x100>; | ||
310 | clock-frequency = <0>; | ||
311 | interrupts = <0x1c 0x2>; | ||
312 | interrupt-parent = <&mpic>; | ||
313 | }; | ||
314 | |||
315 | mpic: pic@40000 { | ||
316 | clock-frequency = <0>; | ||
317 | interrupt-controller; | ||
318 | #address-cells = <0>; | ||
319 | #interrupt-cells = <2>; | ||
320 | reg = <0x40000 0x40000>; | ||
321 | compatible = "chrp,open-pic"; | ||
322 | device_type = "open-pic"; | ||
323 | }; | ||
324 | |||
325 | global-utilities@e0000 { | ||
326 | compatible = "fsl,mpc8641-guts"; | ||
327 | reg = <0xe0000 0x1000>; | ||
328 | fsl,has-rstcr; | ||
329 | }; | ||
330 | }; | ||
331 | |||
332 | pci0: pcie@fef08000 { | ||
333 | compatible = "fsl,mpc8641-pcie"; | ||
334 | device_type = "pci"; | ||
335 | #interrupt-cells = <1>; | ||
336 | #size-cells = <2>; | ||
337 | #address-cells = <3>; | ||
338 | reg = <0xfef08000 0x1000>; | ||
339 | bus-range = <0x0 0xff>; | ||
340 | ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000 | ||
341 | 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>; | ||
342 | clock-frequency = <33333333>; | ||
343 | interrupt-parent = <&mpic>; | ||
344 | interrupts = <0x18 0x2>; | ||
345 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
346 | interrupt-map = < | ||
347 | 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2 | ||
348 | 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2 | ||
349 | 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2 | ||
350 | 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2 | ||
351 | >; | ||
352 | |||
353 | pcie@0 { | ||
354 | reg = <0 0 0 0 0>; | ||
355 | #size-cells = <2>; | ||
356 | #address-cells = <3>; | ||
357 | device_type = "pci"; | ||
358 | ranges = <0x02000000 0x0 0x80000000 | ||
359 | 0x02000000 0x0 0x80000000 | ||
360 | 0x0 0x40000000 | ||
361 | |||
362 | 0x01000000 0x0 0x00000000 | ||
363 | 0x01000000 0x0 0x00000000 | ||
364 | 0x0 0x00400000>; | ||
365 | }; | ||
366 | }; | ||
367 | }; | ||
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts index e78c355c7bac..6582dbd36da7 100644 --- a/arch/powerpc/boot/dts/gef_sbc610.dts +++ b/arch/powerpc/boot/dts/gef_sbc610.dts | |||
@@ -71,7 +71,7 @@ | |||
71 | #address-cells = <2>; | 71 | #address-cells = <2>; |
72 | #size-cells = <1>; | 72 | #size-cells = <1>; |
73 | compatible = "fsl,mpc8641-localbus", "simple-bus"; | 73 | compatible = "fsl,mpc8641-localbus", "simple-bus"; |
74 | reg = <0xf8005000 0x1000>; | 74 | reg = <0xfef05000 0x1000>; |
75 | interrupts = <19 2>; | 75 | interrupts = <19 2>; |
76 | interrupt-parent = <&mpic>; | 76 | interrupt-parent = <&mpic>; |
77 | 77 | ||
@@ -202,34 +202,37 @@ | |||
202 | }; | 202 | }; |
203 | }; | 203 | }; |
204 | 204 | ||
205 | mdio@24520 { | ||
206 | #address-cells = <1>; | ||
207 | #size-cells = <0>; | ||
208 | compatible = "fsl,gianfar-mdio"; | ||
209 | reg = <0x24520 0x20>; | ||
210 | |||
211 | phy0: ethernet-phy@0 { | ||
212 | interrupt-parent = <&gef_pic>; | ||
213 | interrupts = <0x9 0x4>; | ||
214 | reg = <1>; | ||
215 | }; | ||
216 | phy2: ethernet-phy@2 { | ||
217 | interrupt-parent = <&gef_pic>; | ||
218 | interrupts = <0x8 0x4>; | ||
219 | reg = <3>; | ||
220 | }; | ||
221 | }; | ||
222 | |||
223 | enet0: ethernet@24000 { | 205 | enet0: ethernet@24000 { |
206 | #address-cells = <1>; | ||
207 | #size-cells = <1>; | ||
224 | device_type = "network"; | 208 | device_type = "network"; |
225 | model = "eTSEC"; | 209 | model = "eTSEC"; |
226 | compatible = "gianfar"; | 210 | compatible = "gianfar"; |
227 | reg = <0x24000 0x1000>; | 211 | reg = <0x24000 0x1000>; |
212 | ranges = <0x0 0x24000 0x1000>; | ||
228 | local-mac-address = [ 00 00 00 00 00 00 ]; | 213 | local-mac-address = [ 00 00 00 00 00 00 ]; |
229 | interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; | 214 | interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; |
230 | interrupt-parent = <&mpic>; | 215 | interrupt-parent = <&mpic>; |
231 | phy-handle = <&phy0>; | 216 | phy-handle = <&phy0>; |
232 | phy-connection-type = "gmii"; | 217 | phy-connection-type = "gmii"; |
218 | |||
219 | mdio@520 { | ||
220 | #address-cells = <1>; | ||
221 | #size-cells = <0>; | ||
222 | compatible = "fsl,gianfar-mdio"; | ||
223 | reg = <0x520 0x20>; | ||
224 | |||
225 | phy0: ethernet-phy@0 { | ||
226 | interrupt-parent = <&gef_pic>; | ||
227 | interrupts = <0x9 0x4>; | ||
228 | reg = <1>; | ||
229 | }; | ||
230 | phy2: ethernet-phy@2 { | ||
231 | interrupt-parent = <&gef_pic>; | ||
232 | interrupts = <0x8 0x4>; | ||
233 | reg = <3>; | ||
234 | }; | ||
235 | }; | ||
233 | }; | 236 | }; |
234 | 237 | ||
235 | enet1: ethernet@26000 { | 238 | enet1: ethernet@26000 { |
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts index 2804444812e5..5e6b08ff6f67 100644 --- a/arch/powerpc/boot/dts/kilauea.dts +++ b/arch/powerpc/boot/dts/kilauea.dts | |||
@@ -97,6 +97,13 @@ | |||
97 | 0x6 0x4>; /* ECC SEC Error */ | 97 | 0x6 0x4>; /* ECC SEC Error */ |
98 | }; | 98 | }; |
99 | 99 | ||
100 | CRYPTO: crypto@ef700000 { | ||
101 | compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto"; | ||
102 | reg = <0xef700000 0x80400>; | ||
103 | interrupt-parent = <&UIC0>; | ||
104 | interrupts = <0x17 0x2>; | ||
105 | }; | ||
106 | |||
100 | MAL0: mcmal { | 107 | MAL0: mcmal { |
101 | compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; | 108 | compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; |
102 | dcr-reg = <0x180 0x062>; | 109 | dcr-reg = <0x180 0x062>; |
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts index 3bfff47418db..308fe7c29dea 100644 --- a/arch/powerpc/boot/dts/ksi8560.dts +++ b/arch/powerpc/boot/dts/ksi8560.dts | |||
@@ -124,67 +124,72 @@ | |||
124 | }; | 124 | }; |
125 | }; | 125 | }; |
126 | 126 | ||
127 | mdio@24520 { /* For TSECs */ | ||
128 | #address-cells = <1>; | ||
129 | #size-cells = <0>; | ||
130 | compatible = "fsl,gianfar-mdio"; | ||
131 | reg = <0x24520 0x20>; | ||
132 | |||
133 | PHY1: ethernet-phy@1 { | ||
134 | interrupt-parent = <&mpic>; | ||
135 | reg = <0x1>; | ||
136 | device_type = "ethernet-phy"; | ||
137 | }; | ||
138 | |||
139 | PHY2: ethernet-phy@2 { | ||
140 | interrupt-parent = <&mpic>; | ||
141 | reg = <0x2>; | ||
142 | device_type = "ethernet-phy"; | ||
143 | }; | ||
144 | |||
145 | tbi0: tbi-phy@11 { | ||
146 | reg = <0x11>; | ||
147 | device_type = "tbi-phy"; | ||
148 | }; | ||
149 | }; | ||
150 | |||
151 | mdio@25520 { | ||
152 | #address-cells = <1>; | ||
153 | #size-cells = <0>; | ||
154 | compatible = "fsl,gianfar-tbi"; | ||
155 | reg = <0x25520 0x20>; | ||
156 | |||
157 | tbi1: tbi-phy@11 { | ||
158 | reg = <0x11>; | ||
159 | device_type = "tbi-phy"; | ||
160 | }; | ||
161 | }; | ||
162 | |||
163 | |||
164 | enet0: ethernet@24000 { | 127 | enet0: ethernet@24000 { |
128 | #address-cells = <1>; | ||
129 | #size-cells = <1>; | ||
165 | device_type = "network"; | 130 | device_type = "network"; |
166 | model = "TSEC"; | 131 | model = "TSEC"; |
167 | compatible = "gianfar"; | 132 | compatible = "gianfar"; |
168 | reg = <0x24000 0x1000>; | 133 | reg = <0x24000 0x1000>; |
134 | ranges = <0x0 0x24000 0x1000>; | ||
169 | /* Mac address filled in by bootwrapper */ | 135 | /* Mac address filled in by bootwrapper */ |
170 | local-mac-address = [ 00 00 00 00 00 00 ]; | 136 | local-mac-address = [ 00 00 00 00 00 00 ]; |
171 | interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; | 137 | interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; |
172 | interrupt-parent = <&mpic>; | 138 | interrupt-parent = <&mpic>; |
173 | tbi-handle = <&tbi0>; | 139 | tbi-handle = <&tbi0>; |
174 | phy-handle = <&PHY1>; | 140 | phy-handle = <&PHY1>; |
141 | |||
142 | mdio@520 { /* For TSECs */ | ||
143 | #address-cells = <1>; | ||
144 | #size-cells = <0>; | ||
145 | compatible = "fsl,gianfar-mdio"; | ||
146 | reg = <0x520 0x20>; | ||
147 | |||
148 | PHY1: ethernet-phy@1 { | ||
149 | interrupt-parent = <&mpic>; | ||
150 | reg = <0x1>; | ||
151 | device_type = "ethernet-phy"; | ||
152 | }; | ||
153 | |||
154 | PHY2: ethernet-phy@2 { | ||
155 | interrupt-parent = <&mpic>; | ||
156 | reg = <0x2>; | ||
157 | device_type = "ethernet-phy"; | ||
158 | }; | ||
159 | |||
160 | tbi0: tbi-phy@11 { | ||
161 | reg = <0x11>; | ||
162 | device_type = "tbi-phy"; | ||
163 | }; | ||
164 | }; | ||
175 | }; | 165 | }; |
176 | 166 | ||
177 | enet1: ethernet@25000 { | 167 | enet1: ethernet@25000 { |
168 | #address-cells = <1>; | ||
169 | #size-cells = <1>; | ||
178 | device_type = "network"; | 170 | device_type = "network"; |
179 | model = "TSEC"; | 171 | model = "TSEC"; |
180 | compatible = "gianfar"; | 172 | compatible = "gianfar"; |
181 | reg = <0x25000 0x1000>; | 173 | reg = <0x25000 0x1000>; |
174 | ranges = <0x0 0x25000 0x1000>; | ||
182 | /* Mac address filled in by bootwrapper */ | 175 | /* Mac address filled in by bootwrapper */ |
183 | local-mac-address = [ 00 00 00 00 00 00 ]; | 176 | local-mac-address = [ 00 00 00 00 00 00 ]; |
184 | interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; | 177 | interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; |
185 | interrupt-parent = <&mpic>; | 178 | interrupt-parent = <&mpic>; |
186 | tbi-handle = <&tbi1>; | 179 | tbi-handle = <&tbi1>; |
187 | phy-handle = <&PHY2>; | 180 | phy-handle = <&PHY2>; |
181 | |||
182 | mdio@520 { | ||
183 | #address-cells = <1>; | ||
184 | #size-cells = <0>; | ||
185 | compatible = "fsl,gianfar-tbi"; | ||
186 | reg = <0x520 0x20>; | ||
187 | |||
188 | tbi1: tbi-phy@11 { | ||
189 | reg = <0x11>; | ||
190 | device_type = "tbi-phy"; | ||
191 | }; | ||
192 | }; | ||
188 | }; | 193 | }; |
189 | 194 | ||
190 | mpic: pic@40000 { | 195 | mpic: pic@40000 { |
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts index 3f7a5dce8de0..de30b3f9eb26 100644 --- a/arch/powerpc/boot/dts/lite5200.dts +++ b/arch/powerpc/boot/dts/lite5200.dts | |||
@@ -17,6 +17,7 @@ | |||
17 | compatible = "fsl,lite5200"; | 17 | compatible = "fsl,lite5200"; |
18 | #address-cells = <1>; | 18 | #address-cells = <1>; |
19 | #size-cells = <1>; | 19 | #size-cells = <1>; |
20 | interrupt-parent = <&mpc5200_pic>; | ||
20 | 21 | ||
21 | cpus { | 22 | cpus { |
22 | #address-cells = <1>; | 23 | #address-cells = <1>; |
@@ -58,96 +59,74 @@ | |||
58 | // 5200 interrupts are encoded into two levels; | 59 | // 5200 interrupts are encoded into two levels; |
59 | interrupt-controller; | 60 | interrupt-controller; |
60 | #interrupt-cells = <3>; | 61 | #interrupt-cells = <3>; |
61 | device_type = "interrupt-controller"; | ||
62 | compatible = "fsl,mpc5200-pic"; | 62 | compatible = "fsl,mpc5200-pic"; |
63 | reg = <0x500 0x80>; | 63 | reg = <0x500 0x80>; |
64 | }; | 64 | }; |
65 | 65 | ||
66 | timer@600 { // General Purpose Timer | 66 | timer@600 { // General Purpose Timer |
67 | compatible = "fsl,mpc5200-gpt"; | 67 | compatible = "fsl,mpc5200-gpt"; |
68 | cell-index = <0>; | ||
69 | reg = <0x600 0x10>; | 68 | reg = <0x600 0x10>; |
70 | interrupts = <1 9 0>; | 69 | interrupts = <1 9 0>; |
71 | interrupt-parent = <&mpc5200_pic>; | ||
72 | fsl,has-wdt; | 70 | fsl,has-wdt; |
73 | }; | 71 | }; |
74 | 72 | ||
75 | timer@610 { // General Purpose Timer | 73 | timer@610 { // General Purpose Timer |
76 | compatible = "fsl,mpc5200-gpt"; | 74 | compatible = "fsl,mpc5200-gpt"; |
77 | cell-index = <1>; | ||
78 | reg = <0x610 0x10>; | 75 | reg = <0x610 0x10>; |
79 | interrupts = <1 10 0>; | 76 | interrupts = <1 10 0>; |
80 | interrupt-parent = <&mpc5200_pic>; | ||
81 | }; | 77 | }; |
82 | 78 | ||
83 | timer@620 { // General Purpose Timer | 79 | timer@620 { // General Purpose Timer |
84 | compatible = "fsl,mpc5200-gpt"; | 80 | compatible = "fsl,mpc5200-gpt"; |
85 | cell-index = <2>; | ||
86 | reg = <0x620 0x10>; | 81 | reg = <0x620 0x10>; |
87 | interrupts = <1 11 0>; | 82 | interrupts = <1 11 0>; |
88 | interrupt-parent = <&mpc5200_pic>; | ||
89 | }; | 83 | }; |
90 | 84 | ||
91 | timer@630 { // General Purpose Timer | 85 | timer@630 { // General Purpose Timer |
92 | compatible = "fsl,mpc5200-gpt"; | 86 | compatible = "fsl,mpc5200-gpt"; |
93 | cell-index = <3>; | ||
94 | reg = <0x630 0x10>; | 87 | reg = <0x630 0x10>; |
95 | interrupts = <1 12 0>; | 88 | interrupts = <1 12 0>; |
96 | interrupt-parent = <&mpc5200_pic>; | ||
97 | }; | 89 | }; |
98 | 90 | ||
99 | timer@640 { // General Purpose Timer | 91 | timer@640 { // General Purpose Timer |
100 | compatible = "fsl,mpc5200-gpt"; | 92 | compatible = "fsl,mpc5200-gpt"; |
101 | cell-index = <4>; | ||
102 | reg = <0x640 0x10>; | 93 | reg = <0x640 0x10>; |
103 | interrupts = <1 13 0>; | 94 | interrupts = <1 13 0>; |
104 | interrupt-parent = <&mpc5200_pic>; | ||
105 | }; | 95 | }; |
106 | 96 | ||
107 | timer@650 { // General Purpose Timer | 97 | timer@650 { // General Purpose Timer |
108 | compatible = "fsl,mpc5200-gpt"; | 98 | compatible = "fsl,mpc5200-gpt"; |
109 | cell-index = <5>; | ||
110 | reg = <0x650 0x10>; | 99 | reg = <0x650 0x10>; |
111 | interrupts = <1 14 0>; | 100 | interrupts = <1 14 0>; |
112 | interrupt-parent = <&mpc5200_pic>; | ||
113 | }; | 101 | }; |
114 | 102 | ||
115 | timer@660 { // General Purpose Timer | 103 | timer@660 { // General Purpose Timer |
116 | compatible = "fsl,mpc5200-gpt"; | 104 | compatible = "fsl,mpc5200-gpt"; |
117 | cell-index = <6>; | ||
118 | reg = <0x660 0x10>; | 105 | reg = <0x660 0x10>; |
119 | interrupts = <1 15 0>; | 106 | interrupts = <1 15 0>; |
120 | interrupt-parent = <&mpc5200_pic>; | ||
121 | }; | 107 | }; |
122 | 108 | ||
123 | timer@670 { // General Purpose Timer | 109 | timer@670 { // General Purpose Timer |
124 | compatible = "fsl,mpc5200-gpt"; | 110 | compatible = "fsl,mpc5200-gpt"; |
125 | cell-index = <7>; | ||
126 | reg = <0x670 0x10>; | 111 | reg = <0x670 0x10>; |
127 | interrupts = <1 16 0>; | 112 | interrupts = <1 16 0>; |
128 | interrupt-parent = <&mpc5200_pic>; | ||
129 | }; | 113 | }; |
130 | 114 | ||
131 | rtc@800 { // Real time clock | 115 | rtc@800 { // Real time clock |
132 | compatible = "fsl,mpc5200-rtc"; | 116 | compatible = "fsl,mpc5200-rtc"; |
133 | reg = <0x800 0x100>; | 117 | reg = <0x800 0x100>; |
134 | interrupts = <1 5 0 1 6 0>; | 118 | interrupts = <1 5 0 1 6 0>; |
135 | interrupt-parent = <&mpc5200_pic>; | ||
136 | }; | 119 | }; |
137 | 120 | ||
138 | can@900 { | 121 | can@900 { |
139 | compatible = "fsl,mpc5200-mscan"; | 122 | compatible = "fsl,mpc5200-mscan"; |
140 | cell-index = <0>; | ||
141 | interrupts = <2 17 0>; | 123 | interrupts = <2 17 0>; |
142 | interrupt-parent = <&mpc5200_pic>; | ||
143 | reg = <0x900 0x80>; | 124 | reg = <0x900 0x80>; |
144 | }; | 125 | }; |
145 | 126 | ||
146 | can@980 { | 127 | can@980 { |
147 | compatible = "fsl,mpc5200-mscan"; | 128 | compatible = "fsl,mpc5200-mscan"; |
148 | cell-index = <1>; | ||
149 | interrupts = <2 18 0>; | 129 | interrupts = <2 18 0>; |
150 | interrupt-parent = <&mpc5200_pic>; | ||
151 | reg = <0x980 0x80>; | 130 | reg = <0x980 0x80>; |
152 | }; | 131 | }; |
153 | 132 | ||
@@ -155,39 +134,33 @@ | |||
155 | compatible = "fsl,mpc5200-gpio"; | 134 | compatible = "fsl,mpc5200-gpio"; |
156 | reg = <0xb00 0x40>; | 135 | reg = <0xb00 0x40>; |
157 | interrupts = <1 7 0>; | 136 | interrupts = <1 7 0>; |
158 | interrupt-parent = <&mpc5200_pic>; | ||
159 | }; | 137 | }; |
160 | 138 | ||
161 | gpio@c00 { | 139 | gpio@c00 { |
162 | compatible = "fsl,mpc5200-gpio-wkup"; | 140 | compatible = "fsl,mpc5200-gpio-wkup"; |
163 | reg = <0xc00 0x40>; | 141 | reg = <0xc00 0x40>; |
164 | interrupts = <1 8 0 0 3 0>; | 142 | interrupts = <1 8 0 0 3 0>; |
165 | interrupt-parent = <&mpc5200_pic>; | ||
166 | }; | 143 | }; |
167 | 144 | ||
168 | spi@f00 { | 145 | spi@f00 { |
169 | compatible = "fsl,mpc5200-spi"; | 146 | compatible = "fsl,mpc5200-spi"; |
170 | reg = <0xf00 0x20>; | 147 | reg = <0xf00 0x20>; |
171 | interrupts = <2 13 0 2 14 0>; | 148 | interrupts = <2 13 0 2 14 0>; |
172 | interrupt-parent = <&mpc5200_pic>; | ||
173 | }; | 149 | }; |
174 | 150 | ||
175 | usb@1000 { | 151 | usb@1000 { |
176 | compatible = "fsl,mpc5200-ohci","ohci-be"; | 152 | compatible = "fsl,mpc5200-ohci","ohci-be"; |
177 | reg = <0x1000 0xff>; | 153 | reg = <0x1000 0xff>; |
178 | interrupts = <2 6 0>; | 154 | interrupts = <2 6 0>; |
179 | interrupt-parent = <&mpc5200_pic>; | ||
180 | }; | 155 | }; |
181 | 156 | ||
182 | dma-controller@1200 { | 157 | dma-controller@1200 { |
183 | device_type = "dma-controller"; | ||
184 | compatible = "fsl,mpc5200-bestcomm"; | 158 | compatible = "fsl,mpc5200-bestcomm"; |
185 | reg = <0x1200 0x80>; | 159 | reg = <0x1200 0x80>; |
186 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 | 160 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 |
187 | 3 4 0 3 5 0 3 6 0 3 7 0 | 161 | 3 4 0 3 5 0 3 6 0 3 7 0 |
188 | 3 8 0 3 9 0 3 10 0 3 11 0 | 162 | 3 8 0 3 9 0 3 10 0 3 11 0 |
189 | 3 12 0 3 13 0 3 14 0 3 15 0>; | 163 | 3 12 0 3 13 0 3 14 0 3 15 0>; |
190 | interrupt-parent = <&mpc5200_pic>; | ||
191 | }; | 164 | }; |
192 | 165 | ||
193 | xlb@1f00 { | 166 | xlb@1f00 { |
@@ -196,13 +169,10 @@ | |||
196 | }; | 169 | }; |
197 | 170 | ||
198 | serial@2000 { // PSC1 | 171 | serial@2000 { // PSC1 |
199 | device_type = "serial"; | ||
200 | compatible = "fsl,mpc5200-psc-uart"; | 172 | compatible = "fsl,mpc5200-psc-uart"; |
201 | port-number = <0>; // Logical port assignment | ||
202 | cell-index = <0>; | 173 | cell-index = <0>; |
203 | reg = <0x2000 0x100>; | 174 | reg = <0x2000 0x100>; |
204 | interrupts = <2 1 0>; | 175 | interrupts = <2 1 0>; |
205 | interrupt-parent = <&mpc5200_pic>; | ||
206 | }; | 176 | }; |
207 | 177 | ||
208 | // PSC2 in ac97 mode example | 178 | // PSC2 in ac97 mode example |
@@ -211,7 +181,6 @@ | |||
211 | // cell-index = <1>; | 181 | // cell-index = <1>; |
212 | // reg = <0x2200 0x100>; | 182 | // reg = <0x2200 0x100>; |
213 | // interrupts = <2 2 0>; | 183 | // interrupts = <2 2 0>; |
214 | // interrupt-parent = <&mpc5200_pic>; | ||
215 | //}; | 184 | //}; |
216 | 185 | ||
217 | // PSC3 in CODEC mode example | 186 | // PSC3 in CODEC mode example |
@@ -220,27 +189,22 @@ | |||
220 | // cell-index = <2>; | 189 | // cell-index = <2>; |
221 | // reg = <0x2400 0x100>; | 190 | // reg = <0x2400 0x100>; |
222 | // interrupts = <2 3 0>; | 191 | // interrupts = <2 3 0>; |
223 | // interrupt-parent = <&mpc5200_pic>; | ||
224 | //}; | 192 | //}; |
225 | 193 | ||
226 | // PSC4 in uart mode example | 194 | // PSC4 in uart mode example |
227 | //serial@2600 { // PSC4 | 195 | //serial@2600 { // PSC4 |
228 | // device_type = "serial"; | ||
229 | // compatible = "fsl,mpc5200-psc-uart"; | 196 | // compatible = "fsl,mpc5200-psc-uart"; |
230 | // cell-index = <3>; | 197 | // cell-index = <3>; |
231 | // reg = <0x2600 0x100>; | 198 | // reg = <0x2600 0x100>; |
232 | // interrupts = <2 11 0>; | 199 | // interrupts = <2 11 0>; |
233 | // interrupt-parent = <&mpc5200_pic>; | ||
234 | //}; | 200 | //}; |
235 | 201 | ||
236 | // PSC5 in uart mode example | 202 | // PSC5 in uart mode example |
237 | //serial@2800 { // PSC5 | 203 | //serial@2800 { // PSC5 |
238 | // device_type = "serial"; | ||
239 | // compatible = "fsl,mpc5200-psc-uart"; | 204 | // compatible = "fsl,mpc5200-psc-uart"; |
240 | // cell-index = <4>; | 205 | // cell-index = <4>; |
241 | // reg = <0x2800 0x100>; | 206 | // reg = <0x2800 0x100>; |
242 | // interrupts = <2 12 0>; | 207 | // interrupts = <2 12 0>; |
243 | // interrupt-parent = <&mpc5200_pic>; | ||
244 | //}; | 208 | //}; |
245 | 209 | ||
246 | // PSC6 in spi mode example | 210 | // PSC6 in spi mode example |
@@ -249,16 +213,13 @@ | |||
249 | // cell-index = <5>; | 213 | // cell-index = <5>; |
250 | // reg = <0x2c00 0x100>; | 214 | // reg = <0x2c00 0x100>; |
251 | // interrupts = <2 4 0>; | 215 | // interrupts = <2 4 0>; |
252 | // interrupt-parent = <&mpc5200_pic>; | ||
253 | //}; | 216 | //}; |
254 | 217 | ||
255 | ethernet@3000 { | 218 | ethernet@3000 { |
256 | device_type = "network"; | ||
257 | compatible = "fsl,mpc5200-fec"; | 219 | compatible = "fsl,mpc5200-fec"; |
258 | reg = <0x3000 0x400>; | 220 | reg = <0x3000 0x400>; |
259 | local-mac-address = [ 00 00 00 00 00 00 ]; | 221 | local-mac-address = [ 00 00 00 00 00 00 ]; |
260 | interrupts = <2 5 0>; | 222 | interrupts = <2 5 0>; |
261 | interrupt-parent = <&mpc5200_pic>; | ||
262 | phy-handle = <&phy0>; | 223 | phy-handle = <&phy0>; |
263 | }; | 224 | }; |
264 | 225 | ||
@@ -268,30 +229,24 @@ | |||
268 | compatible = "fsl,mpc5200-mdio"; | 229 | compatible = "fsl,mpc5200-mdio"; |
269 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts | 230 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts |
270 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. | 231 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. |
271 | interrupt-parent = <&mpc5200_pic>; | ||
272 | 232 | ||
273 | phy0: ethernet-phy@1 { | 233 | phy0: ethernet-phy@1 { |
274 | device_type = "ethernet-phy"; | ||
275 | reg = <1>; | 234 | reg = <1>; |
276 | }; | 235 | }; |
277 | }; | 236 | }; |
278 | 237 | ||
279 | ata@3a00 { | 238 | ata@3a00 { |
280 | device_type = "ata"; | ||
281 | compatible = "fsl,mpc5200-ata"; | 239 | compatible = "fsl,mpc5200-ata"; |
282 | reg = <0x3a00 0x100>; | 240 | reg = <0x3a00 0x100>; |
283 | interrupts = <2 7 0>; | 241 | interrupts = <2 7 0>; |
284 | interrupt-parent = <&mpc5200_pic>; | ||
285 | }; | 242 | }; |
286 | 243 | ||
287 | i2c@3d00 { | 244 | i2c@3d00 { |
288 | #address-cells = <1>; | 245 | #address-cells = <1>; |
289 | #size-cells = <0>; | 246 | #size-cells = <0>; |
290 | compatible = "fsl,mpc5200-i2c","fsl-i2c"; | 247 | compatible = "fsl,mpc5200-i2c","fsl-i2c"; |
291 | cell-index = <0>; | ||
292 | reg = <0x3d00 0x40>; | 248 | reg = <0x3d00 0x40>; |
293 | interrupts = <2 15 0>; | 249 | interrupts = <2 15 0>; |
294 | interrupt-parent = <&mpc5200_pic>; | ||
295 | fsl5200-clocking; | 250 | fsl5200-clocking; |
296 | }; | 251 | }; |
297 | 252 | ||
@@ -299,14 +254,12 @@ | |||
299 | #address-cells = <1>; | 254 | #address-cells = <1>; |
300 | #size-cells = <0>; | 255 | #size-cells = <0>; |
301 | compatible = "fsl,mpc5200-i2c","fsl-i2c"; | 256 | compatible = "fsl,mpc5200-i2c","fsl-i2c"; |
302 | cell-index = <1>; | ||
303 | reg = <0x3d40 0x40>; | 257 | reg = <0x3d40 0x40>; |
304 | interrupts = <2 16 0>; | 258 | interrupts = <2 16 0>; |
305 | interrupt-parent = <&mpc5200_pic>; | ||
306 | fsl5200-clocking; | 259 | fsl5200-clocking; |
307 | }; | 260 | }; |
308 | sram@8000 { | 261 | sram@8000 { |
309 | compatible = "fsl,mpc5200-sram","sram"; | 262 | compatible = "fsl,mpc5200-sram"; |
310 | reg = <0x8000 0x4000>; | 263 | reg = <0x8000 0x4000>; |
311 | }; | 264 | }; |
312 | }; | 265 | }; |
@@ -325,7 +278,6 @@ | |||
325 | 0xc000 0 0 4 &mpc5200_pic 0 0 3>; | 278 | 0xc000 0 0 4 &mpc5200_pic 0 0 3>; |
326 | clock-frequency = <0>; // From boot loader | 279 | clock-frequency = <0>; // From boot loader |
327 | interrupts = <2 8 0 2 9 0 2 10 0>; | 280 | interrupts = <2 8 0 2 9 0 2 10 0>; |
328 | interrupt-parent = <&mpc5200_pic>; | ||
329 | bus-range = <0 0>; | 281 | bus-range = <0 0>; |
330 | ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 | 282 | ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 |
331 | 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 | 283 | 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 |
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts index 63e3bb48e843..c63e3566479e 100644 --- a/arch/powerpc/boot/dts/lite5200b.dts +++ b/arch/powerpc/boot/dts/lite5200b.dts | |||
@@ -17,6 +17,7 @@ | |||
17 | compatible = "fsl,lite5200b"; | 17 | compatible = "fsl,lite5200b"; |
18 | #address-cells = <1>; | 18 | #address-cells = <1>; |
19 | #size-cells = <1>; | 19 | #size-cells = <1>; |
20 | interrupt-parent = <&mpc5200_pic>; | ||
20 | 21 | ||
21 | cpus { | 22 | cpus { |
22 | #address-cells = <1>; | 23 | #address-cells = <1>; |
@@ -58,136 +59,112 @@ | |||
58 | // 5200 interrupts are encoded into two levels; | 59 | // 5200 interrupts are encoded into two levels; |
59 | interrupt-controller; | 60 | interrupt-controller; |
60 | #interrupt-cells = <3>; | 61 | #interrupt-cells = <3>; |
61 | device_type = "interrupt-controller"; | ||
62 | compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; | 62 | compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; |
63 | reg = <0x500 0x80>; | 63 | reg = <0x500 0x80>; |
64 | }; | 64 | }; |
65 | 65 | ||
66 | timer@600 { // General Purpose Timer | 66 | timer@600 { // General Purpose Timer |
67 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 67 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
68 | cell-index = <0>; | ||
69 | reg = <0x600 0x10>; | 68 | reg = <0x600 0x10>; |
70 | interrupts = <1 9 0>; | 69 | interrupts = <1 9 0>; |
71 | interrupt-parent = <&mpc5200_pic>; | ||
72 | fsl,has-wdt; | 70 | fsl,has-wdt; |
73 | }; | 71 | }; |
74 | 72 | ||
75 | timer@610 { // General Purpose Timer | 73 | timer@610 { // General Purpose Timer |
76 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 74 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
77 | cell-index = <1>; | ||
78 | reg = <0x610 0x10>; | 75 | reg = <0x610 0x10>; |
79 | interrupts = <1 10 0>; | 76 | interrupts = <1 10 0>; |
80 | interrupt-parent = <&mpc5200_pic>; | ||
81 | }; | 77 | }; |
82 | 78 | ||
83 | timer@620 { // General Purpose Timer | 79 | timer@620 { // General Purpose Timer |
84 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 80 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
85 | cell-index = <2>; | ||
86 | reg = <0x620 0x10>; | 81 | reg = <0x620 0x10>; |
87 | interrupts = <1 11 0>; | 82 | interrupts = <1 11 0>; |
88 | interrupt-parent = <&mpc5200_pic>; | ||
89 | }; | 83 | }; |
90 | 84 | ||
91 | timer@630 { // General Purpose Timer | 85 | timer@630 { // General Purpose Timer |
92 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 86 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
93 | cell-index = <3>; | ||
94 | reg = <0x630 0x10>; | 87 | reg = <0x630 0x10>; |
95 | interrupts = <1 12 0>; | 88 | interrupts = <1 12 0>; |
96 | interrupt-parent = <&mpc5200_pic>; | ||
97 | }; | 89 | }; |
98 | 90 | ||
99 | timer@640 { // General Purpose Timer | 91 | timer@640 { // General Purpose Timer |
100 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 92 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
101 | cell-index = <4>; | ||
102 | reg = <0x640 0x10>; | 93 | reg = <0x640 0x10>; |
103 | interrupts = <1 13 0>; | 94 | interrupts = <1 13 0>; |
104 | interrupt-parent = <&mpc5200_pic>; | ||
105 | }; | 95 | }; |
106 | 96 | ||
107 | timer@650 { // General Purpose Timer | 97 | timer@650 { // General Purpose Timer |
108 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 98 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
109 | cell-index = <5>; | ||
110 | reg = <0x650 0x10>; | 99 | reg = <0x650 0x10>; |
111 | interrupts = <1 14 0>; | 100 | interrupts = <1 14 0>; |
112 | interrupt-parent = <&mpc5200_pic>; | ||
113 | }; | 101 | }; |
114 | 102 | ||
115 | timer@660 { // General Purpose Timer | 103 | timer@660 { // General Purpose Timer |
116 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 104 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
117 | cell-index = <6>; | ||
118 | reg = <0x660 0x10>; | 105 | reg = <0x660 0x10>; |
119 | interrupts = <1 15 0>; | 106 | interrupts = <1 15 0>; |
120 | interrupt-parent = <&mpc5200_pic>; | ||
121 | }; | 107 | }; |
122 | 108 | ||
123 | timer@670 { // General Purpose Timer | 109 | timer@670 { // General Purpose Timer |
124 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 110 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
125 | cell-index = <7>; | ||
126 | reg = <0x670 0x10>; | 111 | reg = <0x670 0x10>; |
127 | interrupts = <1 16 0>; | 112 | interrupts = <1 16 0>; |
128 | interrupt-parent = <&mpc5200_pic>; | ||
129 | }; | 113 | }; |
130 | 114 | ||
131 | rtc@800 { // Real time clock | 115 | rtc@800 { // Real time clock |
132 | compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; | 116 | compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; |
133 | reg = <0x800 0x100>; | 117 | reg = <0x800 0x100>; |
134 | interrupts = <1 5 0 1 6 0>; | 118 | interrupts = <1 5 0 1 6 0>; |
135 | interrupt-parent = <&mpc5200_pic>; | ||
136 | }; | 119 | }; |
137 | 120 | ||
138 | can@900 { | 121 | can@900 { |
139 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; | 122 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; |
140 | cell-index = <0>; | ||
141 | interrupts = <2 17 0>; | 123 | interrupts = <2 17 0>; |
142 | interrupt-parent = <&mpc5200_pic>; | ||
143 | reg = <0x900 0x80>; | 124 | reg = <0x900 0x80>; |
144 | }; | 125 | }; |
145 | 126 | ||
146 | can@980 { | 127 | can@980 { |
147 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; | 128 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; |
148 | cell-index = <1>; | ||
149 | interrupts = <2 18 0>; | 129 | interrupts = <2 18 0>; |
150 | interrupt-parent = <&mpc5200_pic>; | ||
151 | reg = <0x980 0x80>; | 130 | reg = <0x980 0x80>; |
152 | }; | 131 | }; |
153 | 132 | ||
154 | gpio@b00 { | 133 | gpio_simple: gpio@b00 { |
155 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; | 134 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; |
156 | reg = <0xb00 0x40>; | 135 | reg = <0xb00 0x40>; |
157 | interrupts = <1 7 0>; | 136 | interrupts = <1 7 0>; |
158 | interrupt-parent = <&mpc5200_pic>; | 137 | gpio-controller; |
138 | #gpio-cells = <2>; | ||
159 | }; | 139 | }; |
160 | 140 | ||
161 | gpio@c00 { | 141 | gpio_wkup: gpio@c00 { |
162 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; | 142 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; |
163 | reg = <0xc00 0x40>; | 143 | reg = <0xc00 0x40>; |
164 | interrupts = <1 8 0 0 3 0>; | 144 | interrupts = <1 8 0 0 3 0>; |
165 | interrupt-parent = <&mpc5200_pic>; | 145 | gpio-controller; |
146 | #gpio-cells = <2>; | ||
166 | }; | 147 | }; |
167 | 148 | ||
168 | spi@f00 { | 149 | spi@f00 { |
169 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; | 150 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; |
170 | reg = <0xf00 0x20>; | 151 | reg = <0xf00 0x20>; |
171 | interrupts = <2 13 0 2 14 0>; | 152 | interrupts = <2 13 0 2 14 0>; |
172 | interrupt-parent = <&mpc5200_pic>; | ||
173 | }; | 153 | }; |
174 | 154 | ||
175 | usb@1000 { | 155 | usb@1000 { |
176 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; | 156 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; |
177 | reg = <0x1000 0xff>; | 157 | reg = <0x1000 0xff>; |
178 | interrupts = <2 6 0>; | 158 | interrupts = <2 6 0>; |
179 | interrupt-parent = <&mpc5200_pic>; | ||
180 | }; | 159 | }; |
181 | 160 | ||
182 | dma-controller@1200 { | 161 | dma-controller@1200 { |
183 | device_type = "dma-controller"; | ||
184 | compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; | 162 | compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; |
185 | reg = <0x1200 0x80>; | 163 | reg = <0x1200 0x80>; |
186 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 | 164 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 |
187 | 3 4 0 3 5 0 3 6 0 3 7 0 | 165 | 3 4 0 3 5 0 3 6 0 3 7 0 |
188 | 3 8 0 3 9 0 3 10 0 3 11 0 | 166 | 3 8 0 3 9 0 3 10 0 3 11 0 |
189 | 3 12 0 3 13 0 3 14 0 3 15 0>; | 167 | 3 12 0 3 13 0 3 14 0 3 15 0>; |
190 | interrupt-parent = <&mpc5200_pic>; | ||
191 | }; | 168 | }; |
192 | 169 | ||
193 | xlb@1f00 { | 170 | xlb@1f00 { |
@@ -196,13 +173,10 @@ | |||
196 | }; | 173 | }; |
197 | 174 | ||
198 | serial@2000 { // PSC1 | 175 | serial@2000 { // PSC1 |
199 | device_type = "serial"; | ||
200 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 176 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
201 | port-number = <0>; // Logical port assignment | ||
202 | cell-index = <0>; | 177 | cell-index = <0>; |
203 | reg = <0x2000 0x100>; | 178 | reg = <0x2000 0x100>; |
204 | interrupts = <2 1 0>; | 179 | interrupts = <2 1 0>; |
205 | interrupt-parent = <&mpc5200_pic>; | ||
206 | }; | 180 | }; |
207 | 181 | ||
208 | // PSC2 in ac97 mode example | 182 | // PSC2 in ac97 mode example |
@@ -211,7 +185,6 @@ | |||
211 | // cell-index = <1>; | 185 | // cell-index = <1>; |
212 | // reg = <0x2200 0x100>; | 186 | // reg = <0x2200 0x100>; |
213 | // interrupts = <2 2 0>; | 187 | // interrupts = <2 2 0>; |
214 | // interrupt-parent = <&mpc5200_pic>; | ||
215 | //}; | 188 | //}; |
216 | 189 | ||
217 | // PSC3 in CODEC mode example | 190 | // PSC3 in CODEC mode example |
@@ -220,27 +193,22 @@ | |||
220 | // cell-index = <2>; | 193 | // cell-index = <2>; |
221 | // reg = <0x2400 0x100>; | 194 | // reg = <0x2400 0x100>; |
222 | // interrupts = <2 3 0>; | 195 | // interrupts = <2 3 0>; |
223 | // interrupt-parent = <&mpc5200_pic>; | ||
224 | //}; | 196 | //}; |
225 | 197 | ||
226 | // PSC4 in uart mode example | 198 | // PSC4 in uart mode example |
227 | //serial@2600 { // PSC4 | 199 | //serial@2600 { // PSC4 |
228 | // device_type = "serial"; | ||
229 | // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 200 | // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
230 | // cell-index = <3>; | 201 | // cell-index = <3>; |
231 | // reg = <0x2600 0x100>; | 202 | // reg = <0x2600 0x100>; |
232 | // interrupts = <2 11 0>; | 203 | // interrupts = <2 11 0>; |
233 | // interrupt-parent = <&mpc5200_pic>; | ||
234 | //}; | 204 | //}; |
235 | 205 | ||
236 | // PSC5 in uart mode example | 206 | // PSC5 in uart mode example |
237 | //serial@2800 { // PSC5 | 207 | //serial@2800 { // PSC5 |
238 | // device_type = "serial"; | ||
239 | // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 208 | // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
240 | // cell-index = <4>; | 209 | // cell-index = <4>; |
241 | // reg = <0x2800 0x100>; | 210 | // reg = <0x2800 0x100>; |
242 | // interrupts = <2 12 0>; | 211 | // interrupts = <2 12 0>; |
243 | // interrupt-parent = <&mpc5200_pic>; | ||
244 | //}; | 212 | //}; |
245 | 213 | ||
246 | // PSC6 in spi mode example | 214 | // PSC6 in spi mode example |
@@ -249,49 +217,40 @@ | |||
249 | // cell-index = <5>; | 217 | // cell-index = <5>; |
250 | // reg = <0x2c00 0x100>; | 218 | // reg = <0x2c00 0x100>; |
251 | // interrupts = <2 4 0>; | 219 | // interrupts = <2 4 0>; |
252 | // interrupt-parent = <&mpc5200_pic>; | ||
253 | //}; | 220 | //}; |
254 | 221 | ||
255 | ethernet@3000 { | 222 | ethernet@3000 { |
256 | device_type = "network"; | ||
257 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; | 223 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; |
258 | reg = <0x3000 0x400>; | 224 | reg = <0x3000 0x400>; |
259 | local-mac-address = [ 00 00 00 00 00 00 ]; | 225 | local-mac-address = [ 00 00 00 00 00 00 ]; |
260 | interrupts = <2 5 0>; | 226 | interrupts = <2 5 0>; |
261 | interrupt-parent = <&mpc5200_pic>; | ||
262 | phy-handle = <&phy0>; | 227 | phy-handle = <&phy0>; |
263 | }; | 228 | }; |
264 | 229 | ||
265 | mdio@3000 { | 230 | mdio@3000 { |
266 | #address-cells = <1>; | 231 | #address-cells = <1>; |
267 | #size-cells = <0>; | 232 | #size-cells = <0>; |
268 | compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio"; | 233 | compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; |
269 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts | 234 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts |
270 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. | 235 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. |
271 | interrupt-parent = <&mpc5200_pic>; | ||
272 | 236 | ||
273 | phy0: ethernet-phy@0 { | 237 | phy0: ethernet-phy@0 { |
274 | device_type = "ethernet-phy"; | ||
275 | reg = <0>; | 238 | reg = <0>; |
276 | }; | 239 | }; |
277 | }; | 240 | }; |
278 | 241 | ||
279 | ata@3a00 { | 242 | ata@3a00 { |
280 | device_type = "ata"; | ||
281 | compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; | 243 | compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; |
282 | reg = <0x3a00 0x100>; | 244 | reg = <0x3a00 0x100>; |
283 | interrupts = <2 7 0>; | 245 | interrupts = <2 7 0>; |
284 | interrupt-parent = <&mpc5200_pic>; | ||
285 | }; | 246 | }; |
286 | 247 | ||
287 | i2c@3d00 { | 248 | i2c@3d00 { |
288 | #address-cells = <1>; | 249 | #address-cells = <1>; |
289 | #size-cells = <0>; | 250 | #size-cells = <0>; |
290 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | 251 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; |
291 | cell-index = <0>; | ||
292 | reg = <0x3d00 0x40>; | 252 | reg = <0x3d00 0x40>; |
293 | interrupts = <2 15 0>; | 253 | interrupts = <2 15 0>; |
294 | interrupt-parent = <&mpc5200_pic>; | ||
295 | fsl5200-clocking; | 254 | fsl5200-clocking; |
296 | }; | 255 | }; |
297 | 256 | ||
@@ -299,14 +258,13 @@ | |||
299 | #address-cells = <1>; | 258 | #address-cells = <1>; |
300 | #size-cells = <0>; | 259 | #size-cells = <0>; |
301 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | 260 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; |
302 | cell-index = <1>; | ||
303 | reg = <0x3d40 0x40>; | 261 | reg = <0x3d40 0x40>; |
304 | interrupts = <2 16 0>; | 262 | interrupts = <2 16 0>; |
305 | interrupt-parent = <&mpc5200_pic>; | ||
306 | fsl5200-clocking; | 263 | fsl5200-clocking; |
307 | }; | 264 | }; |
265 | |||
308 | sram@8000 { | 266 | sram@8000 { |
309 | compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram"; | 267 | compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; |
310 | reg = <0x8000 0x4000>; | 268 | reg = <0x8000 0x4000>; |
311 | }; | 269 | }; |
312 | }; | 270 | }; |
@@ -330,7 +288,6 @@ | |||
330 | 0xc800 0 0 4 &mpc5200_pic 0 0 3>; | 288 | 0xc800 0 0 4 &mpc5200_pic 0 0 3>; |
331 | clock-frequency = <0>; // From boot loader | 289 | clock-frequency = <0>; // From boot loader |
332 | interrupts = <2 8 0 2 9 0 2 10 0>; | 290 | interrupts = <2 8 0 2 9 0 2 10 0>; |
333 | interrupt-parent = <&mpc5200_pic>; | ||
334 | bus-range = <0 0>; | 291 | bus-range = <0 0>; |
335 | ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 | 292 | ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 |
336 | 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 | 293 | 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 |
diff --git a/arch/powerpc/boot/dts/media5200.dts b/arch/powerpc/boot/dts/media5200.dts new file mode 100644 index 000000000000..e297d8b41875 --- /dev/null +++ b/arch/powerpc/boot/dts/media5200.dts | |||
@@ -0,0 +1,318 @@ | |||
1 | /* | ||
2 | * Freescale Media5200 board Device Tree Source | ||
3 | * | ||
4 | * Copyright 2009 Secret Lab Technologies Ltd. | ||
5 | * Grant Likely <grant.likely@secretlab.ca> | ||
6 | * Steven Cavanagh <scavanagh@secretlab.ca> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | /dts-v1/; | ||
15 | |||
16 | / { | ||
17 | model = "fsl,media5200"; | ||
18 | compatible = "fsl,media5200"; | ||
19 | #address-cells = <1>; | ||
20 | #size-cells = <1>; | ||
21 | interrupt-parent = <&mpc5200_pic>; | ||
22 | |||
23 | aliases { | ||
24 | console = &console; | ||
25 | ethernet0 = ð0; | ||
26 | }; | ||
27 | |||
28 | chosen { | ||
29 | linux,stdout-path = &console; | ||
30 | }; | ||
31 | |||
32 | cpus { | ||
33 | #address-cells = <1>; | ||
34 | #size-cells = <0>; | ||
35 | |||
36 | PowerPC,5200@0 { | ||
37 | device_type = "cpu"; | ||
38 | reg = <0>; | ||
39 | d-cache-line-size = <32>; | ||
40 | i-cache-line-size = <32>; | ||
41 | d-cache-size = <0x4000>; // L1, 16K | ||
42 | i-cache-size = <0x4000>; // L1, 16K | ||
43 | timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot | ||
44 | bus-frequency = <132000000>; // 132 MHz | ||
45 | clock-frequency = <396000000>; // 396 MHz | ||
46 | }; | ||
47 | }; | ||
48 | |||
49 | memory { | ||
50 | device_type = "memory"; | ||
51 | reg = <0x00000000 0x08000000>; // 128MB RAM | ||
52 | }; | ||
53 | |||
54 | soc@f0000000 { | ||
55 | #address-cells = <1>; | ||
56 | #size-cells = <1>; | ||
57 | compatible = "fsl,mpc5200b-immr"; | ||
58 | ranges = <0 0xf0000000 0x0000c000>; | ||
59 | reg = <0xf0000000 0x00000100>; | ||
60 | bus-frequency = <132000000>;// 132 MHz | ||
61 | system-frequency = <0>; // from bootloader | ||
62 | |||
63 | cdm@200 { | ||
64 | compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; | ||
65 | reg = <0x200 0x38>; | ||
66 | }; | ||
67 | |||
68 | mpc5200_pic: interrupt-controller@500 { | ||
69 | // 5200 interrupts are encoded into two levels; | ||
70 | interrupt-controller; | ||
71 | #interrupt-cells = <3>; | ||
72 | compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; | ||
73 | reg = <0x500 0x80>; | ||
74 | }; | ||
75 | |||
76 | timer@600 { // General Purpose Timer | ||
77 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
78 | reg = <0x600 0x10>; | ||
79 | interrupts = <1 9 0>; | ||
80 | fsl,has-wdt; | ||
81 | }; | ||
82 | |||
83 | timer@610 { // General Purpose Timer | ||
84 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
85 | reg = <0x610 0x10>; | ||
86 | interrupts = <1 10 0>; | ||
87 | }; | ||
88 | |||
89 | timer@620 { // General Purpose Timer | ||
90 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
91 | reg = <0x620 0x10>; | ||
92 | interrupts = <1 11 0>; | ||
93 | }; | ||
94 | |||
95 | timer@630 { // General Purpose Timer | ||
96 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
97 | reg = <0x630 0x10>; | ||
98 | interrupts = <1 12 0>; | ||
99 | }; | ||
100 | |||
101 | timer@640 { // General Purpose Timer | ||
102 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
103 | reg = <0x640 0x10>; | ||
104 | interrupts = <1 13 0>; | ||
105 | }; | ||
106 | |||
107 | timer@650 { // General Purpose Timer | ||
108 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
109 | reg = <0x650 0x10>; | ||
110 | interrupts = <1 14 0>; | ||
111 | }; | ||
112 | |||
113 | timer@660 { // General Purpose Timer | ||
114 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
115 | reg = <0x660 0x10>; | ||
116 | interrupts = <1 15 0>; | ||
117 | }; | ||
118 | |||
119 | timer@670 { // General Purpose Timer | ||
120 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
121 | reg = <0x670 0x10>; | ||
122 | interrupts = <1 16 0>; | ||
123 | }; | ||
124 | |||
125 | rtc@800 { // Real time clock | ||
126 | compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; | ||
127 | reg = <0x800 0x100>; | ||
128 | interrupts = <1 5 0 1 6 0>; | ||
129 | }; | ||
130 | |||
131 | can@900 { | ||
132 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; | ||
133 | interrupts = <2 17 0>; | ||
134 | reg = <0x900 0x80>; | ||
135 | }; | ||
136 | |||
137 | can@980 { | ||
138 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; | ||
139 | interrupts = <2 18 0>; | ||
140 | reg = <0x980 0x80>; | ||
141 | }; | ||
142 | |||
143 | gpio_simple: gpio@b00 { | ||
144 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; | ||
145 | reg = <0xb00 0x40>; | ||
146 | interrupts = <1 7 0>; | ||
147 | gpio-controller; | ||
148 | #gpio-cells = <2>; | ||
149 | }; | ||
150 | |||
151 | gpio_wkup: gpio@c00 { | ||
152 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; | ||
153 | reg = <0xc00 0x40>; | ||
154 | interrupts = <1 8 0 0 3 0>; | ||
155 | gpio-controller; | ||
156 | #gpio-cells = <2>; | ||
157 | }; | ||
158 | |||
159 | spi@f00 { | ||
160 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; | ||
161 | reg = <0xf00 0x20>; | ||
162 | interrupts = <2 13 0 2 14 0>; | ||
163 | }; | ||
164 | |||
165 | usb@1000 { | ||
166 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; | ||
167 | reg = <0x1000 0x100>; | ||
168 | interrupts = <2 6 0>; | ||
169 | }; | ||
170 | |||
171 | dma-controller@1200 { | ||
172 | compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; | ||
173 | reg = <0x1200 0x80>; | ||
174 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 | ||
175 | 3 4 0 3 5 0 3 6 0 3 7 0 | ||
176 | 3 8 0 3 9 0 3 10 0 3 11 0 | ||
177 | 3 12 0 3 13 0 3 14 0 3 15 0>; | ||
178 | }; | ||
179 | |||
180 | xlb@1f00 { | ||
181 | compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; | ||
182 | reg = <0x1f00 0x100>; | ||
183 | }; | ||
184 | |||
185 | // PSC6 in uart mode | ||
186 | console: serial@2c00 { // PSC6 | ||
187 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | ||
188 | cell-index = <5>; | ||
189 | port-number = <0>; // Logical port assignment | ||
190 | reg = <0x2c00 0x100>; | ||
191 | interrupts = <2 4 0>; | ||
192 | }; | ||
193 | |||
194 | eth0: ethernet@3000 { | ||
195 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; | ||
196 | reg = <0x3000 0x400>; | ||
197 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
198 | interrupts = <2 5 0>; | ||
199 | phy-handle = <&phy0>; | ||
200 | }; | ||
201 | |||
202 | mdio@3000 { | ||
203 | #address-cells = <1>; | ||
204 | #size-cells = <0>; | ||
205 | compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; | ||
206 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts | ||
207 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. | ||
208 | |||
209 | phy0: ethernet-phy@0 { | ||
210 | reg = <0>; | ||
211 | }; | ||
212 | }; | ||
213 | |||
214 | ata@3a00 { | ||
215 | compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; | ||
216 | reg = <0x3a00 0x100>; | ||
217 | interrupts = <2 7 0>; | ||
218 | }; | ||
219 | |||
220 | i2c@3d00 { | ||
221 | #address-cells = <1>; | ||
222 | #size-cells = <0>; | ||
223 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | ||
224 | reg = <0x3d00 0x40>; | ||
225 | interrupts = <2 15 0>; | ||
226 | fsl5200-clocking; | ||
227 | }; | ||
228 | |||
229 | i2c@3d40 { | ||
230 | #address-cells = <1>; | ||
231 | #size-cells = <0>; | ||
232 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | ||
233 | reg = <0x3d40 0x40>; | ||
234 | interrupts = <2 16 0>; | ||
235 | fsl5200-clocking; | ||
236 | }; | ||
237 | |||
238 | sram@8000 { | ||
239 | compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; | ||
240 | reg = <0x8000 0x4000>; | ||
241 | }; | ||
242 | }; | ||
243 | |||
244 | pci@f0000d00 { | ||
245 | #interrupt-cells = <1>; | ||
246 | #size-cells = <2>; | ||
247 | #address-cells = <3>; | ||
248 | device_type = "pci"; | ||
249 | compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; | ||
250 | reg = <0xf0000d00 0x100>; | ||
251 | interrupt-map-mask = <0xf800 0 0 7>; | ||
252 | interrupt-map = <0xc000 0 0 1 &media5200_fpga 0 2 // 1st slot | ||
253 | 0xc000 0 0 2 &media5200_fpga 0 3 | ||
254 | 0xc000 0 0 3 &media5200_fpga 0 4 | ||
255 | 0xc000 0 0 4 &media5200_fpga 0 5 | ||
256 | |||
257 | 0xc800 0 0 1 &media5200_fpga 0 3 // 2nd slot | ||
258 | 0xc800 0 0 2 &media5200_fpga 0 4 | ||
259 | 0xc800 0 0 3 &media5200_fpga 0 5 | ||
260 | 0xc800 0 0 4 &media5200_fpga 0 2 | ||
261 | |||
262 | 0xd000 0 0 1 &media5200_fpga 0 4 // miniPCI | ||
263 | 0xd000 0 0 2 &media5200_fpga 0 5 | ||
264 | |||
265 | 0xe000 0 0 1 &media5200_fpga 0 5 // CoralIP | ||
266 | >; | ||
267 | clock-frequency = <0>; // From boot loader | ||
268 | interrupts = <2 8 0 2 9 0 2 10 0>; | ||
269 | interrupt-parent = <&mpc5200_pic>; | ||
270 | bus-range = <0 0>; | ||
271 | ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 | ||
272 | 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 | ||
273 | 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; | ||
274 | }; | ||
275 | |||
276 | localbus { | ||
277 | compatible = "fsl,mpc5200b-lpb","simple-bus"; | ||
278 | #address-cells = <2>; | ||
279 | #size-cells = <1>; | ||
280 | |||
281 | ranges = < 0 0 0xfc000000 0x02000000 | ||
282 | 1 0 0xfe000000 0x02000000 | ||
283 | 2 0 0xf0010000 0x00010000 | ||
284 | 3 0 0xf0020000 0x00010000 >; | ||
285 | |||
286 | flash@0,0 { | ||
287 | compatible = "amd,am29lv28ml", "cfi-flash"; | ||
288 | reg = <0 0x0 0x2000000>; // 32 MB | ||
289 | bank-width = <4>; // Width in bytes of the flash bank | ||
290 | device-width = <2>; // Two devices on each bank | ||
291 | }; | ||
292 | |||
293 | flash@1,0 { | ||
294 | compatible = "amd,am29lv28ml", "cfi-flash"; | ||
295 | reg = <1 0 0x2000000>; // 32 MB | ||
296 | bank-width = <4>; // Width in bytes of the flash bank | ||
297 | device-width = <2>; // Two devices on each bank | ||
298 | }; | ||
299 | |||
300 | media5200_fpga: fpga@2,0 { | ||
301 | compatible = "fsl,media5200-fpga"; | ||
302 | interrupt-controller; | ||
303 | #interrupt-cells = <2>; // 0:bank 1:id; no type field | ||
304 | reg = <2 0 0x10000>; | ||
305 | |||
306 | interrupt-parent = <&mpc5200_pic>; | ||
307 | interrupts = <0 0 3 // IRQ bank 0 | ||
308 | 1 1 3>; // IRQ bank 1 | ||
309 | }; | ||
310 | |||
311 | uart@3,0 { | ||
312 | compatible = "ti,tl16c752bpt"; | ||
313 | reg = <3 0 0x10000>; | ||
314 | interrupt-parent = <&media5200_fpga>; | ||
315 | interrupts = <0 0 0 1>; // 2 irqs | ||
316 | }; | ||
317 | }; | ||
318 | }; | ||
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts index 52ba6f98b273..7be8ca038676 100644 --- a/arch/powerpc/boot/dts/motionpro.dts +++ b/arch/powerpc/boot/dts/motionpro.dts | |||
@@ -17,6 +17,7 @@ | |||
17 | compatible = "promess,motionpro"; | 17 | compatible = "promess,motionpro"; |
18 | #address-cells = <1>; | 18 | #address-cells = <1>; |
19 | #size-cells = <1>; | 19 | #size-cells = <1>; |
20 | interrupt-parent = <&mpc5200_pic>; | ||
20 | 21 | ||
21 | cpus { | 22 | cpus { |
22 | #address-cells = <1>; | 23 | #address-cells = <1>; |
@@ -66,7 +67,6 @@ | |||
66 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 67 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
67 | reg = <0x600 0x10>; | 68 | reg = <0x600 0x10>; |
68 | interrupts = <1 9 0>; | 69 | interrupts = <1 9 0>; |
69 | interrupt-parent = <&mpc5200_pic>; | ||
70 | fsl,has-wdt; | 70 | fsl,has-wdt; |
71 | }; | 71 | }; |
72 | 72 | ||
@@ -74,35 +74,30 @@ | |||
74 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 74 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
75 | reg = <0x610 0x10>; | 75 | reg = <0x610 0x10>; |
76 | interrupts = <1 10 0>; | 76 | interrupts = <1 10 0>; |
77 | interrupt-parent = <&mpc5200_pic>; | ||
78 | }; | 77 | }; |
79 | 78 | ||
80 | timer@620 { // General Purpose Timer | 79 | timer@620 { // General Purpose Timer |
81 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 80 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
82 | reg = <0x620 0x10>; | 81 | reg = <0x620 0x10>; |
83 | interrupts = <1 11 0>; | 82 | interrupts = <1 11 0>; |
84 | interrupt-parent = <&mpc5200_pic>; | ||
85 | }; | 83 | }; |
86 | 84 | ||
87 | timer@630 { // General Purpose Timer | 85 | timer@630 { // General Purpose Timer |
88 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 86 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
89 | reg = <0x630 0x10>; | 87 | reg = <0x630 0x10>; |
90 | interrupts = <1 12 0>; | 88 | interrupts = <1 12 0>; |
91 | interrupt-parent = <&mpc5200_pic>; | ||
92 | }; | 89 | }; |
93 | 90 | ||
94 | timer@640 { // General Purpose Timer | 91 | timer@640 { // General Purpose Timer |
95 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 92 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
96 | reg = <0x640 0x10>; | 93 | reg = <0x640 0x10>; |
97 | interrupts = <1 13 0>; | 94 | interrupts = <1 13 0>; |
98 | interrupt-parent = <&mpc5200_pic>; | ||
99 | }; | 95 | }; |
100 | 96 | ||
101 | timer@650 { // General Purpose Timer | 97 | timer@650 { // General Purpose Timer |
102 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 98 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
103 | reg = <0x650 0x10>; | 99 | reg = <0x650 0x10>; |
104 | interrupts = <1 14 0>; | 100 | interrupts = <1 14 0>; |
105 | interrupt-parent = <&mpc5200_pic>; | ||
106 | }; | 101 | }; |
107 | 102 | ||
108 | motionpro-led@660 { // Motion-PRO status LED | 103 | motionpro-led@660 { // Motion-PRO status LED |
@@ -110,7 +105,6 @@ | |||
110 | label = "motionpro-statusled"; | 105 | label = "motionpro-statusled"; |
111 | reg = <0x660 0x10>; | 106 | reg = <0x660 0x10>; |
112 | interrupts = <1 15 0>; | 107 | interrupts = <1 15 0>; |
113 | interrupt-parent = <&mpc5200_pic>; | ||
114 | blink-delay = <100>; // 100 msec | 108 | blink-delay = <100>; // 100 msec |
115 | }; | 109 | }; |
116 | 110 | ||
@@ -119,49 +113,46 @@ | |||
119 | label = "motionpro-readyled"; | 113 | label = "motionpro-readyled"; |
120 | reg = <0x670 0x10>; | 114 | reg = <0x670 0x10>; |
121 | interrupts = <1 16 0>; | 115 | interrupts = <1 16 0>; |
122 | interrupt-parent = <&mpc5200_pic>; | ||
123 | }; | 116 | }; |
124 | 117 | ||
125 | rtc@800 { // Real time clock | 118 | rtc@800 { // Real time clock |
126 | compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; | 119 | compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; |
127 | reg = <0x800 0x100>; | 120 | reg = <0x800 0x100>; |
128 | interrupts = <1 5 0 1 6 0>; | 121 | interrupts = <1 5 0 1 6 0>; |
129 | interrupt-parent = <&mpc5200_pic>; | ||
130 | }; | 122 | }; |
131 | 123 | ||
132 | can@980 { | 124 | can@980 { |
133 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; | 125 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; |
134 | interrupts = <2 18 0>; | 126 | interrupts = <2 18 0>; |
135 | interrupt-parent = <&mpc5200_pic>; | ||
136 | reg = <0x980 0x80>; | 127 | reg = <0x980 0x80>; |
137 | }; | 128 | }; |
138 | 129 | ||
139 | gpio@b00 { | 130 | gpio_simple: gpio@b00 { |
140 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; | 131 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; |
141 | reg = <0xb00 0x40>; | 132 | reg = <0xb00 0x40>; |
142 | interrupts = <1 7 0>; | 133 | interrupts = <1 7 0>; |
143 | interrupt-parent = <&mpc5200_pic>; | 134 | gpio-controller; |
135 | #gpio-cells = <2>; | ||
144 | }; | 136 | }; |
145 | 137 | ||
146 | gpio@c00 { | 138 | gpio_wkup: gpio@c00 { |
147 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; | 139 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; |
148 | reg = <0xc00 0x40>; | 140 | reg = <0xc00 0x40>; |
149 | interrupts = <1 8 0 0 3 0>; | 141 | interrupts = <1 8 0 0 3 0>; |
150 | interrupt-parent = <&mpc5200_pic>; | 142 | gpio-controller; |
143 | #gpio-cells = <2>; | ||
151 | }; | 144 | }; |
152 | 145 | ||
153 | spi@f00 { | 146 | spi@f00 { |
154 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; | 147 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; |
155 | reg = <0xf00 0x20>; | 148 | reg = <0xf00 0x20>; |
156 | interrupts = <2 13 0 2 14 0>; | 149 | interrupts = <2 13 0 2 14 0>; |
157 | interrupt-parent = <&mpc5200_pic>; | ||
158 | }; | 150 | }; |
159 | 151 | ||
160 | usb@1000 { | 152 | usb@1000 { |
161 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; | 153 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; |
162 | reg = <0x1000 0xff>; | 154 | reg = <0x1000 0xff>; |
163 | interrupts = <2 6 0>; | 155 | interrupts = <2 6 0>; |
164 | interrupt-parent = <&mpc5200_pic>; | ||
165 | }; | 156 | }; |
166 | 157 | ||
167 | dma-controller@1200 { | 158 | dma-controller@1200 { |
@@ -171,7 +162,6 @@ | |||
171 | 3 4 0 3 5 0 3 6 0 3 7 0 | 162 | 3 4 0 3 5 0 3 6 0 3 7 0 |
172 | 3 8 0 3 9 0 3 10 0 3 11 0 | 163 | 3 8 0 3 9 0 3 10 0 3 11 0 |
173 | 3 12 0 3 13 0 3 14 0 3 15 0>; | 164 | 3 12 0 3 13 0 3 14 0 3 15 0>; |
174 | interrupt-parent = <&mpc5200_pic>; | ||
175 | }; | 165 | }; |
176 | 166 | ||
177 | xlb@1f00 { | 167 | xlb@1f00 { |
@@ -180,12 +170,9 @@ | |||
180 | }; | 170 | }; |
181 | 171 | ||
182 | serial@2000 { // PSC1 | 172 | serial@2000 { // PSC1 |
183 | device_type = "serial"; | ||
184 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 173 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
185 | port-number = <0>; // Logical port assignment | ||
186 | reg = <0x2000 0x100>; | 174 | reg = <0x2000 0x100>; |
187 | interrupts = <2 1 0>; | 175 | interrupts = <2 1 0>; |
188 | interrupt-parent = <&mpc5200_pic>; | ||
189 | }; | 176 | }; |
190 | 177 | ||
191 | // PSC2 in spi master mode | 178 | // PSC2 in spi master mode |
@@ -194,26 +181,20 @@ | |||
194 | cell-index = <1>; | 181 | cell-index = <1>; |
195 | reg = <0x2200 0x100>; | 182 | reg = <0x2200 0x100>; |
196 | interrupts = <2 2 0>; | 183 | interrupts = <2 2 0>; |
197 | interrupt-parent = <&mpc5200_pic>; | ||
198 | }; | 184 | }; |
199 | 185 | ||
200 | // PSC5 in uart mode | 186 | // PSC5 in uart mode |
201 | serial@2800 { // PSC5 | 187 | serial@2800 { // PSC5 |
202 | device_type = "serial"; | ||
203 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 188 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
204 | port-number = <4>; // Logical port assignment | ||
205 | reg = <0x2800 0x100>; | 189 | reg = <0x2800 0x100>; |
206 | interrupts = <2 12 0>; | 190 | interrupts = <2 12 0>; |
207 | interrupt-parent = <&mpc5200_pic>; | ||
208 | }; | 191 | }; |
209 | 192 | ||
210 | ethernet@3000 { | 193 | ethernet@3000 { |
211 | device_type = "network"; | ||
212 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; | 194 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; |
213 | reg = <0x3000 0x400>; | 195 | reg = <0x3000 0x400>; |
214 | local-mac-address = [ 00 00 00 00 00 00 ]; | 196 | local-mac-address = [ 00 00 00 00 00 00 ]; |
215 | interrupts = <2 5 0>; | 197 | interrupts = <2 5 0>; |
216 | interrupt-parent = <&mpc5200_pic>; | ||
217 | phy-handle = <&phy0>; | 198 | phy-handle = <&phy0>; |
218 | }; | 199 | }; |
219 | 200 | ||
@@ -223,10 +204,8 @@ | |||
223 | compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; | 204 | compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; |
224 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts | 205 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts |
225 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. | 206 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. |
226 | interrupt-parent = <&mpc5200_pic>; | ||
227 | 207 | ||
228 | phy0: ethernet-phy@2 { | 208 | phy0: ethernet-phy@2 { |
229 | device_type = "ethernet-phy"; | ||
230 | reg = <2>; | 209 | reg = <2>; |
231 | }; | 210 | }; |
232 | }; | 211 | }; |
@@ -235,7 +214,6 @@ | |||
235 | compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; | 214 | compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; |
236 | reg = <0x3a00 0x100>; | 215 | reg = <0x3a00 0x100>; |
237 | interrupts = <2 7 0>; | 216 | interrupts = <2 7 0>; |
238 | interrupt-parent = <&mpc5200_pic>; | ||
239 | }; | 217 | }; |
240 | 218 | ||
241 | i2c@3d40 { | 219 | i2c@3d40 { |
@@ -244,7 +222,6 @@ | |||
244 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | 222 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; |
245 | reg = <0x3d40 0x40>; | 223 | reg = <0x3d40 0x40>; |
246 | interrupts = <2 16 0>; | 224 | interrupts = <2 16 0>; |
247 | interrupt-parent = <&mpc5200_pic>; | ||
248 | fsl5200-clocking; | 225 | fsl5200-clocking; |
249 | 226 | ||
250 | rtc@68 { | 227 | rtc@68 { |
@@ -259,8 +236,8 @@ | |||
259 | }; | 236 | }; |
260 | }; | 237 | }; |
261 | 238 | ||
262 | lpb { | 239 | localbus { |
263 | compatible = "fsl,lpb"; | 240 | compatible = "fsl,mpc5200b-lpb","simple-bus"; |
264 | #address-cells = <2>; | 241 | #address-cells = <2>; |
265 | #size-cells = <1>; | 242 | #size-cells = <1>; |
266 | ranges = <0 0 0xff000000 0x01000000 | 243 | ranges = <0 0 0xff000000 0x01000000 |
@@ -273,7 +250,6 @@ | |||
273 | compatible = "promess,motionpro-kollmorgen"; | 250 | compatible = "promess,motionpro-kollmorgen"; |
274 | reg = <1 0 0x10000>; | 251 | reg = <1 0 0x10000>; |
275 | interrupts = <1 1 0>; | 252 | interrupts = <1 1 0>; |
276 | interrupt-parent = <&mpc5200_pic>; | ||
277 | }; | 253 | }; |
278 | 254 | ||
279 | // 8-bit board CPLD on LocalPlus Bus CS2 | 255 | // 8-bit board CPLD on LocalPlus Bus CS2 |
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts index 3ebf7ec0484c..761faa7b6964 100644 --- a/arch/powerpc/boot/dts/mpc8313erdb.dts +++ b/arch/powerpc/boot/dts/mpc8313erdb.dts | |||
@@ -180,7 +180,7 @@ | |||
180 | #address-cells = <1>; | 180 | #address-cells = <1>; |
181 | #size-cells = <1>; | 181 | #size-cells = <1>; |
182 | sleep = <&pmc 0x20000000>; | 182 | sleep = <&pmc 0x20000000>; |
183 | ranges; | 183 | ranges = <0x0 0x24000 0x1000>; |
184 | 184 | ||
185 | cell-index = <0>; | 185 | cell-index = <0>; |
186 | device_type = "network"; | 186 | device_type = "network"; |
@@ -195,11 +195,11 @@ | |||
195 | fixed-link = <1 1 1000 0 0>; | 195 | fixed-link = <1 1 1000 0 0>; |
196 | fsl,magic-packet; | 196 | fsl,magic-packet; |
197 | 197 | ||
198 | mdio@24520 { | 198 | mdio@520 { |
199 | #address-cells = <1>; | 199 | #address-cells = <1>; |
200 | #size-cells = <0>; | 200 | #size-cells = <0>; |
201 | compatible = "fsl,gianfar-mdio"; | 201 | compatible = "fsl,gianfar-mdio"; |
202 | reg = <0x24520 0x20>; | 202 | reg = <0x520 0x20>; |
203 | phy4: ethernet-phy@4 { | 203 | phy4: ethernet-phy@4 { |
204 | interrupt-parent = <&ipic>; | 204 | interrupt-parent = <&ipic>; |
205 | interrupts = <20 0x8>; | 205 | interrupts = <20 0x8>; |
@@ -221,6 +221,7 @@ | |||
221 | model = "eTSEC"; | 221 | model = "eTSEC"; |
222 | compatible = "gianfar"; | 222 | compatible = "gianfar"; |
223 | reg = <0x25000 0x1000>; | 223 | reg = <0x25000 0x1000>; |
224 | ranges = <0x0 0x25000 0x1000>; | ||
224 | local-mac-address = [ 00 00 00 00 00 00 ]; | 225 | local-mac-address = [ 00 00 00 00 00 00 ]; |
225 | interrupts = <34 0x8 33 0x8 32 0x8>; | 226 | interrupts = <34 0x8 33 0x8 32 0x8>; |
226 | interrupt-parent = <&ipic>; | 227 | interrupt-parent = <&ipic>; |
@@ -229,11 +230,11 @@ | |||
229 | sleep = <&pmc 0x10000000>; | 230 | sleep = <&pmc 0x10000000>; |
230 | fsl,magic-packet; | 231 | fsl,magic-packet; |
231 | 232 | ||
232 | mdio@25520 { | 233 | mdio@520 { |
233 | #address-cells = <1>; | 234 | #address-cells = <1>; |
234 | #size-cells = <0>; | 235 | #size-cells = <0>; |
235 | compatible = "fsl,gianfar-tbi"; | 236 | compatible = "fsl,gianfar-tbi"; |
236 | reg = <0x25520 0x20>; | 237 | reg = <0x520 0x20>; |
237 | 238 | ||
238 | tbi1: tbi-phy@11 { | 239 | tbi1: tbi-phy@11 { |
239 | reg = <0x11>; | 240 | reg = <0x11>; |
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index 71784165b77e..3f4c5fb988a0 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts | |||
@@ -22,6 +22,8 @@ | |||
22 | serial0 = &serial0; | 22 | serial0 = &serial0; |
23 | serial1 = &serial1; | 23 | serial1 = &serial1; |
24 | pci0 = &pci0; | 24 | pci0 = &pci0; |
25 | pci1 = &pci1; | ||
26 | pci2 = &pci2; | ||
25 | }; | 27 | }; |
26 | 28 | ||
27 | cpus { | 29 | cpus { |
@@ -188,66 +190,74 @@ | |||
188 | phy_type = "utmi"; | 190 | phy_type = "utmi"; |
189 | }; | 191 | }; |
190 | 192 | ||
191 | mdio@24520 { | ||
192 | #address-cells = <1>; | ||
193 | #size-cells = <0>; | ||
194 | compatible = "fsl,gianfar-mdio"; | ||
195 | reg = <0x24520 0x20>; | ||
196 | phy0: ethernet-phy@0 { | ||
197 | interrupt-parent = <&ipic>; | ||
198 | interrupts = <20 0x8>; | ||
199 | reg = <0x0>; | ||
200 | device_type = "ethernet-phy"; | ||
201 | }; | ||
202 | phy1: ethernet-phy@1 { | ||
203 | interrupt-parent = <&ipic>; | ||
204 | interrupts = <19 0x8>; | ||
205 | reg = <0x1>; | ||
206 | device_type = "ethernet-phy"; | ||
207 | }; | ||
208 | tbi0: tbi-phy@11 { | ||
209 | reg = <0x11>; | ||
210 | device_type = "tbi-phy"; | ||
211 | }; | ||
212 | }; | ||
213 | |||
214 | mdio@25520 { | ||
215 | #address-cells = <1>; | ||
216 | #size-cells = <0>; | ||
217 | compatible = "fsl,gianfar-tbi"; | ||
218 | reg = <0x25520 0x20>; | ||
219 | |||
220 | tbi1: tbi-phy@11 { | ||
221 | reg = <0x11>; | ||
222 | device_type = "tbi-phy"; | ||
223 | }; | ||
224 | }; | ||
225 | |||
226 | |||
227 | enet0: ethernet@24000 { | 193 | enet0: ethernet@24000 { |
194 | #address-cells = <1>; | ||
195 | #size-cells = <1>; | ||
228 | cell-index = <0>; | 196 | cell-index = <0>; |
229 | device_type = "network"; | 197 | device_type = "network"; |
230 | model = "eTSEC"; | 198 | model = "eTSEC"; |
231 | compatible = "gianfar"; | 199 | compatible = "gianfar"; |
232 | reg = <0x24000 0x1000>; | 200 | reg = <0x24000 0x1000>; |
201 | ranges = <0x0 0x24000 0x1000>; | ||
233 | local-mac-address = [ 00 00 00 00 00 00 ]; | 202 | local-mac-address = [ 00 00 00 00 00 00 ]; |
234 | interrupts = <32 0x8 33 0x8 34 0x8>; | 203 | interrupts = <32 0x8 33 0x8 34 0x8>; |
235 | interrupt-parent = <&ipic>; | 204 | interrupt-parent = <&ipic>; |
236 | tbi-handle = <&tbi0>; | 205 | tbi-handle = <&tbi0>; |
237 | phy-handle = < &phy0 >; | 206 | phy-handle = < &phy0 >; |
207 | |||
208 | mdio@520 { | ||
209 | #address-cells = <1>; | ||
210 | #size-cells = <0>; | ||
211 | compatible = "fsl,gianfar-mdio"; | ||
212 | reg = <0x520 0x20>; | ||
213 | |||
214 | phy0: ethernet-phy@0 { | ||
215 | interrupt-parent = <&ipic>; | ||
216 | interrupts = <20 0x8>; | ||
217 | reg = <0x0>; | ||
218 | device_type = "ethernet-phy"; | ||
219 | }; | ||
220 | |||
221 | phy1: ethernet-phy@1 { | ||
222 | interrupt-parent = <&ipic>; | ||
223 | interrupts = <19 0x8>; | ||
224 | reg = <0x1>; | ||
225 | device_type = "ethernet-phy"; | ||
226 | }; | ||
227 | |||
228 | tbi0: tbi-phy@11 { | ||
229 | reg = <0x11>; | ||
230 | device_type = "tbi-phy"; | ||
231 | }; | ||
232 | }; | ||
238 | }; | 233 | }; |
239 | 234 | ||
240 | enet1: ethernet@25000 { | 235 | enet1: ethernet@25000 { |
236 | #address-cells = <1>; | ||
237 | #size-cells = <1>; | ||
241 | cell-index = <1>; | 238 | cell-index = <1>; |
242 | device_type = "network"; | 239 | device_type = "network"; |
243 | model = "eTSEC"; | 240 | model = "eTSEC"; |
244 | compatible = "gianfar"; | 241 | compatible = "gianfar"; |
245 | reg = <0x25000 0x1000>; | 242 | reg = <0x25000 0x1000>; |
243 | ranges = <0x0 0x25000 0x1000>; | ||
246 | local-mac-address = [ 00 00 00 00 00 00 ]; | 244 | local-mac-address = [ 00 00 00 00 00 00 ]; |
247 | interrupts = <35 0x8 36 0x8 37 0x8>; | 245 | interrupts = <35 0x8 36 0x8 37 0x8>; |
248 | interrupt-parent = <&ipic>; | 246 | interrupt-parent = <&ipic>; |
249 | tbi-handle = <&tbi1>; | 247 | tbi-handle = <&tbi1>; |
250 | phy-handle = < &phy1 >; | 248 | phy-handle = < &phy1 >; |
249 | |||
250 | mdio@520 { | ||
251 | #address-cells = <1>; | ||
252 | #size-cells = <0>; | ||
253 | compatible = "fsl,gianfar-tbi"; | ||
254 | reg = <0x520 0x20>; | ||
255 | |||
256 | tbi1: tbi-phy@11 { | ||
257 | reg = <0x11>; | ||
258 | device_type = "tbi-phy"; | ||
259 | }; | ||
260 | }; | ||
251 | }; | 261 | }; |
252 | 262 | ||
253 | serial0: serial@4500 { | 263 | serial0: serial@4500 { |
@@ -349,4 +359,66 @@ | |||
349 | compatible = "fsl,mpc8349-pci"; | 359 | compatible = "fsl,mpc8349-pci"; |
350 | device_type = "pci"; | 360 | device_type = "pci"; |
351 | }; | 361 | }; |
362 | |||
363 | pci1: pcie@e0009000 { | ||
364 | #address-cells = <3>; | ||
365 | #size-cells = <2>; | ||
366 | #interrupt-cells = <1>; | ||
367 | device_type = "pci"; | ||
368 | compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; | ||
369 | reg = <0xe0009000 0x00001000>; | ||
370 | ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 | ||
371 | 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; | ||
372 | bus-range = <0 255>; | ||
373 | interrupt-map-mask = <0xf800 0 0 7>; | ||
374 | interrupt-map = <0 0 0 1 &ipic 1 8 | ||
375 | 0 0 0 2 &ipic 1 8 | ||
376 | 0 0 0 3 &ipic 1 8 | ||
377 | 0 0 0 4 &ipic 1 8>; | ||
378 | clock-frequency = <0>; | ||
379 | |||
380 | pcie@0 { | ||
381 | #address-cells = <3>; | ||
382 | #size-cells = <2>; | ||
383 | device_type = "pci"; | ||
384 | reg = <0 0 0 0 0>; | ||
385 | ranges = <0x02000000 0 0xa0000000 | ||
386 | 0x02000000 0 0xa0000000 | ||
387 | 0 0x10000000 | ||
388 | 0x01000000 0 0x00000000 | ||
389 | 0x01000000 0 0x00000000 | ||
390 | 0 0x00800000>; | ||
391 | }; | ||
392 | }; | ||
393 | |||
394 | pci2: pcie@e000a000 { | ||
395 | #address-cells = <3>; | ||
396 | #size-cells = <2>; | ||
397 | #interrupt-cells = <1>; | ||
398 | device_type = "pci"; | ||
399 | compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; | ||
400 | reg = <0xe000a000 0x00001000>; | ||
401 | ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000 | ||
402 | 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>; | ||
403 | bus-range = <0 255>; | ||
404 | interrupt-map-mask = <0xf800 0 0 7>; | ||
405 | interrupt-map = <0 0 0 1 &ipic 2 8 | ||
406 | 0 0 0 2 &ipic 2 8 | ||
407 | 0 0 0 3 &ipic 2 8 | ||
408 | 0 0 0 4 &ipic 2 8>; | ||
409 | clock-frequency = <0>; | ||
410 | |||
411 | pcie@0 { | ||
412 | #address-cells = <3>; | ||
413 | #size-cells = <2>; | ||
414 | device_type = "pci"; | ||
415 | reg = <0 0 0 0 0>; | ||
416 | ranges = <0x02000000 0 0xc0000000 | ||
417 | 0x02000000 0 0xc0000000 | ||
418 | 0 0x10000000 | ||
419 | 0x01000000 0 0x00000000 | ||
420 | 0x01000000 0 0x00000000 | ||
421 | 0 0x00800000>; | ||
422 | }; | ||
423 | }; | ||
352 | }; | 424 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts index b5eda94a8e2a..1ae38f0ddef8 100644 --- a/arch/powerpc/boot/dts/mpc8349emitx.dts +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts | |||
@@ -170,57 +170,52 @@ | |||
170 | phy_type = "ulpi"; | 170 | phy_type = "ulpi"; |
171 | }; | 171 | }; |
172 | 172 | ||
173 | mdio@24520 { | ||
174 | #address-cells = <1>; | ||
175 | #size-cells = <0>; | ||
176 | compatible = "fsl,gianfar-mdio"; | ||
177 | reg = <0x24520 0x20>; | ||
178 | |||
179 | /* Vitesse 8201 */ | ||
180 | phy1c: ethernet-phy@1c { | ||
181 | interrupt-parent = <&ipic>; | ||
182 | interrupts = <18 0x8>; | ||
183 | reg = <0x1c>; | ||
184 | device_type = "ethernet-phy"; | ||
185 | }; | ||
186 | tbi0: tbi-phy@11 { | ||
187 | reg = <0x11>; | ||
188 | device_type = "tbi-phy"; | ||
189 | }; | ||
190 | }; | ||
191 | |||
192 | mdio@25520 { | ||
193 | #address-cells = <1>; | ||
194 | #size-cells = <0>; | ||
195 | compatible = "fsl,gianfar-tbi"; | ||
196 | reg = <0x25520 0x20>; | ||
197 | |||
198 | tbi1: tbi-phy@11 { | ||
199 | reg = <0x11>; | ||
200 | device_type = "tbi-phy"; | ||
201 | }; | ||
202 | }; | ||
203 | |||
204 | enet0: ethernet@24000 { | 173 | enet0: ethernet@24000 { |
174 | #address-cells = <1>; | ||
175 | #size-cells = <1>; | ||
205 | cell-index = <0>; | 176 | cell-index = <0>; |
206 | device_type = "network"; | 177 | device_type = "network"; |
207 | model = "TSEC"; | 178 | model = "TSEC"; |
208 | compatible = "gianfar"; | 179 | compatible = "gianfar"; |
209 | reg = <0x24000 0x1000>; | 180 | reg = <0x24000 0x1000>; |
181 | ranges = <0x0 0x24000 0x1000>; | ||
210 | local-mac-address = [ 00 00 00 00 00 00 ]; | 182 | local-mac-address = [ 00 00 00 00 00 00 ]; |
211 | interrupts = <32 0x8 33 0x8 34 0x8>; | 183 | interrupts = <32 0x8 33 0x8 34 0x8>; |
212 | interrupt-parent = <&ipic>; | 184 | interrupt-parent = <&ipic>; |
213 | tbi-handle = <&tbi0>; | 185 | tbi-handle = <&tbi0>; |
214 | phy-handle = <&phy1c>; | 186 | phy-handle = <&phy1c>; |
215 | linux,network-index = <0>; | 187 | linux,network-index = <0>; |
188 | |||
189 | mdio@520 { | ||
190 | #address-cells = <1>; | ||
191 | #size-cells = <0>; | ||
192 | compatible = "fsl,gianfar-mdio"; | ||
193 | reg = <0x520 0x20>; | ||
194 | |||
195 | /* Vitesse 8201 */ | ||
196 | phy1c: ethernet-phy@1c { | ||
197 | interrupt-parent = <&ipic>; | ||
198 | interrupts = <18 0x8>; | ||
199 | reg = <0x1c>; | ||
200 | device_type = "ethernet-phy"; | ||
201 | }; | ||
202 | |||
203 | tbi0: tbi-phy@11 { | ||
204 | reg = <0x11>; | ||
205 | device_type = "tbi-phy"; | ||
206 | }; | ||
207 | }; | ||
216 | }; | 208 | }; |
217 | 209 | ||
218 | enet1: ethernet@25000 { | 210 | enet1: ethernet@25000 { |
211 | #address-cells = <1>; | ||
212 | #size-cells = <1>; | ||
219 | cell-index = <1>; | 213 | cell-index = <1>; |
220 | device_type = "network"; | 214 | device_type = "network"; |
221 | model = "TSEC"; | 215 | model = "TSEC"; |
222 | compatible = "gianfar"; | 216 | compatible = "gianfar"; |
223 | reg = <0x25000 0x1000>; | 217 | reg = <0x25000 0x1000>; |
218 | ranges = <0x0 0x25000 0x1000>; | ||
224 | local-mac-address = [ 00 00 00 00 00 00 ]; | 219 | local-mac-address = [ 00 00 00 00 00 00 ]; |
225 | interrupts = <35 0x8 36 0x8 37 0x8>; | 220 | interrupts = <35 0x8 36 0x8 37 0x8>; |
226 | interrupt-parent = <&ipic>; | 221 | interrupt-parent = <&ipic>; |
@@ -228,6 +223,18 @@ | |||
228 | fixed-link = <1 1 1000 0 0>; | 223 | fixed-link = <1 1 1000 0 0>; |
229 | linux,network-index = <1>; | 224 | linux,network-index = <1>; |
230 | tbi-handle = <&tbi1>; | 225 | tbi-handle = <&tbi1>; |
226 | |||
227 | mdio@520 { | ||
228 | #address-cells = <1>; | ||
229 | #size-cells = <0>; | ||
230 | compatible = "fsl,gianfar-tbi"; | ||
231 | reg = <0x520 0x20>; | ||
232 | |||
233 | tbi1: tbi-phy@11 { | ||
234 | reg = <0x11>; | ||
235 | device_type = "tbi-phy"; | ||
236 | }; | ||
237 | }; | ||
231 | }; | 238 | }; |
232 | 239 | ||
233 | serial0: serial@4500 { | 240 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts index c87a6015e165..662abe1fb804 100644 --- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts | |||
@@ -149,37 +149,41 @@ | |||
149 | phy_type = "ulpi"; | 149 | phy_type = "ulpi"; |
150 | }; | 150 | }; |
151 | 151 | ||
152 | mdio@24520 { | ||
153 | #address-cells = <1>; | ||
154 | #size-cells = <0>; | ||
155 | compatible = "fsl,gianfar-mdio"; | ||
156 | reg = <0x24520 0x20>; | ||
157 | |||
158 | /* Vitesse 8201 */ | ||
159 | phy1c: ethernet-phy@1c { | ||
160 | interrupt-parent = <&ipic>; | ||
161 | interrupts = <18 0x8>; | ||
162 | reg = <0x1c>; | ||
163 | device_type = "ethernet-phy"; | ||
164 | }; | ||
165 | tbi0: tbi-phy@11 { | ||
166 | reg = <0x11>; | ||
167 | device_type = "tbi-phy"; | ||
168 | }; | ||
169 | }; | ||
170 | |||
171 | enet0: ethernet@24000 { | 152 | enet0: ethernet@24000 { |
153 | #address-cells = <1>; | ||
154 | #size-cells = <1>; | ||
172 | cell-index = <0>; | 155 | cell-index = <0>; |
173 | device_type = "network"; | 156 | device_type = "network"; |
174 | model = "TSEC"; | 157 | model = "TSEC"; |
175 | compatible = "gianfar"; | 158 | compatible = "gianfar"; |
176 | reg = <0x24000 0x1000>; | 159 | reg = <0x24000 0x1000>; |
160 | ranges = <0x0 0x24000 0x1000>; | ||
177 | local-mac-address = [ 00 00 00 00 00 00 ]; | 161 | local-mac-address = [ 00 00 00 00 00 00 ]; |
178 | interrupts = <32 0x8 33 0x8 34 0x8>; | 162 | interrupts = <32 0x8 33 0x8 34 0x8>; |
179 | interrupt-parent = <&ipic>; | 163 | interrupt-parent = <&ipic>; |
180 | tbi-handle = <&tbi0>; | 164 | tbi-handle = <&tbi0>; |
181 | phy-handle = <&phy1c>; | 165 | phy-handle = <&phy1c>; |
182 | linux,network-index = <0>; | 166 | linux,network-index = <0>; |
167 | |||
168 | mdio@520 { | ||
169 | #address-cells = <1>; | ||
170 | #size-cells = <0>; | ||
171 | compatible = "fsl,gianfar-mdio"; | ||
172 | reg = <0x520 0x20>; | ||
173 | |||
174 | /* Vitesse 8201 */ | ||
175 | phy1c: ethernet-phy@1c { | ||
176 | interrupt-parent = <&ipic>; | ||
177 | interrupts = <18 0x8>; | ||
178 | reg = <0x1c>; | ||
179 | device_type = "ethernet-phy"; | ||
180 | }; | ||
181 | |||
182 | tbi0: tbi-phy@11 { | ||
183 | reg = <0x11>; | ||
184 | device_type = "tbi-phy"; | ||
185 | }; | ||
186 | }; | ||
183 | }; | 187 | }; |
184 | 188 | ||
185 | serial0: serial@4500 { | 189 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index d9adba01c09c..d9f0a2325fa4 100644 --- a/arch/powerpc/boot/dts/mpc834x_mds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts | |||
@@ -167,69 +167,76 @@ | |||
167 | phy_type = "ulpi"; | 167 | phy_type = "ulpi"; |
168 | }; | 168 | }; |
169 | 169 | ||
170 | mdio@24520 { | ||
171 | #address-cells = <1>; | ||
172 | #size-cells = <0>; | ||
173 | compatible = "fsl,gianfar-mdio"; | ||
174 | reg = <0x24520 0x20>; | ||
175 | |||
176 | phy0: ethernet-phy@0 { | ||
177 | interrupt-parent = <&ipic>; | ||
178 | interrupts = <17 0x8>; | ||
179 | reg = <0x0>; | ||
180 | device_type = "ethernet-phy"; | ||
181 | }; | ||
182 | phy1: ethernet-phy@1 { | ||
183 | interrupt-parent = <&ipic>; | ||
184 | interrupts = <18 0x8>; | ||
185 | reg = <0x1>; | ||
186 | device_type = "ethernet-phy"; | ||
187 | }; | ||
188 | tbi0: tbi-phy@11 { | ||
189 | reg = <0x11>; | ||
190 | device_type = "tbi-phy"; | ||
191 | }; | ||
192 | }; | ||
193 | |||
194 | mdio@25520 { | ||
195 | #address-cells = <1>; | ||
196 | #size-cells = <0>; | ||
197 | compatible = "fsl,gianfar-tbi"; | ||
198 | reg = <0x25520 0x20>; | ||
199 | |||
200 | tbi1: tbi-phy@11 { | ||
201 | reg = <0x11>; | ||
202 | device_type = "tbi-phy"; | ||
203 | }; | ||
204 | }; | ||
205 | |||
206 | |||
207 | enet0: ethernet@24000 { | 170 | enet0: ethernet@24000 { |
171 | #address-cells = <1>; | ||
172 | #size-cells = <1>; | ||
208 | cell-index = <0>; | 173 | cell-index = <0>; |
209 | device_type = "network"; | 174 | device_type = "network"; |
210 | model = "TSEC"; | 175 | model = "TSEC"; |
211 | compatible = "gianfar"; | 176 | compatible = "gianfar"; |
212 | reg = <0x24000 0x1000>; | 177 | reg = <0x24000 0x1000>; |
178 | ranges = <0x0 0x24000 0x1000>; | ||
213 | local-mac-address = [ 00 00 00 00 00 00 ]; | 179 | local-mac-address = [ 00 00 00 00 00 00 ]; |
214 | interrupts = <32 0x8 33 0x8 34 0x8>; | 180 | interrupts = <32 0x8 33 0x8 34 0x8>; |
215 | interrupt-parent = <&ipic>; | 181 | interrupt-parent = <&ipic>; |
216 | tbi-handle = <&tbi0>; | 182 | tbi-handle = <&tbi0>; |
217 | phy-handle = <&phy0>; | 183 | phy-handle = <&phy0>; |
218 | linux,network-index = <0>; | 184 | linux,network-index = <0>; |
185 | |||
186 | mdio@520 { | ||
187 | #address-cells = <1>; | ||
188 | #size-cells = <0>; | ||
189 | compatible = "fsl,gianfar-mdio"; | ||
190 | reg = <0x520 0x20>; | ||
191 | |||
192 | phy0: ethernet-phy@0 { | ||
193 | interrupt-parent = <&ipic>; | ||
194 | interrupts = <17 0x8>; | ||
195 | reg = <0x0>; | ||
196 | device_type = "ethernet-phy"; | ||
197 | }; | ||
198 | |||
199 | phy1: ethernet-phy@1 { | ||
200 | interrupt-parent = <&ipic>; | ||
201 | interrupts = <18 0x8>; | ||
202 | reg = <0x1>; | ||
203 | device_type = "ethernet-phy"; | ||
204 | }; | ||
205 | |||
206 | tbi0: tbi-phy@11 { | ||
207 | reg = <0x11>; | ||
208 | device_type = "tbi-phy"; | ||
209 | }; | ||
210 | }; | ||
219 | }; | 211 | }; |
220 | 212 | ||
221 | enet1: ethernet@25000 { | 213 | enet1: ethernet@25000 { |
214 | #address-cells = <1>; | ||
215 | #size-cells = <1>; | ||
222 | cell-index = <1>; | 216 | cell-index = <1>; |
223 | device_type = "network"; | 217 | device_type = "network"; |
224 | model = "TSEC"; | 218 | model = "TSEC"; |
225 | compatible = "gianfar"; | 219 | compatible = "gianfar"; |
226 | reg = <0x25000 0x1000>; | 220 | reg = <0x25000 0x1000>; |
221 | ranges = <0x0 0x25000 0x1000>; | ||
227 | local-mac-address = [ 00 00 00 00 00 00 ]; | 222 | local-mac-address = [ 00 00 00 00 00 00 ]; |
228 | interrupts = <35 0x8 36 0x8 37 0x8>; | 223 | interrupts = <35 0x8 36 0x8 37 0x8>; |
229 | interrupt-parent = <&ipic>; | 224 | interrupt-parent = <&ipic>; |
230 | tbi-handle = <&tbi1>; | 225 | tbi-handle = <&tbi1>; |
231 | phy-handle = <&phy1>; | 226 | phy-handle = <&phy1>; |
232 | linux,network-index = <1>; | 227 | linux,network-index = <1>; |
228 | |||
229 | mdio@520 { | ||
230 | #address-cells = <1>; | ||
231 | #size-cells = <0>; | ||
232 | compatible = "fsl,gianfar-tbi"; | ||
233 | reg = <0x520 0x20>; | ||
234 | |||
235 | tbi1: tbi-phy@11 { | ||
236 | reg = <0x11>; | ||
237 | device_type = "tbi-phy"; | ||
238 | }; | ||
239 | }; | ||
233 | }; | 240 | }; |
234 | 241 | ||
235 | serial0: serial@4500 { | 242 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts index 1d14d7052e6d..963708017e6c 100644 --- a/arch/powerpc/boot/dts/mpc8377_mds.dts +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts | |||
@@ -23,6 +23,8 @@ | |||
23 | serial0 = &serial0; | 23 | serial0 = &serial0; |
24 | serial1 = &serial1; | 24 | serial1 = &serial1; |
25 | pci0 = &pci0; | 25 | pci0 = &pci0; |
26 | pci1 = &pci1; | ||
27 | pci2 = &pci2; | ||
26 | }; | 28 | }; |
27 | 29 | ||
28 | cpus { | 30 | cpus { |
@@ -127,21 +129,38 @@ | |||
127 | reg = <0x200 0x100>; | 129 | reg = <0x200 0x100>; |
128 | }; | 130 | }; |
129 | 131 | ||
130 | i2c@3000 { | 132 | sleep-nexus { |
131 | #address-cells = <1>; | 133 | #address-cells = <1>; |
132 | #size-cells = <0>; | 134 | #size-cells = <1>; |
133 | cell-index = <0>; | 135 | compatible = "simple-bus"; |
134 | compatible = "fsl-i2c"; | 136 | sleep = <&pmc 0x0c000000>; |
135 | reg = <0x3000 0x100>; | 137 | ranges; |
136 | interrupts = <14 0x8>; | 138 | |
137 | interrupt-parent = <&ipic>; | 139 | i2c@3000 { |
138 | dfsrr; | 140 | #address-cells = <1>; |
141 | #size-cells = <0>; | ||
142 | cell-index = <0>; | ||
143 | compatible = "fsl-i2c"; | ||
144 | reg = <0x3000 0x100>; | ||
145 | interrupts = <14 0x8>; | ||
146 | interrupt-parent = <&ipic>; | ||
147 | dfsrr; | ||
148 | |||
149 | rtc@68 { | ||
150 | compatible = "dallas,ds1374"; | ||
151 | reg = <0x68>; | ||
152 | interrupts = <19 0x8>; | ||
153 | interrupt-parent = <&ipic>; | ||
154 | }; | ||
155 | }; | ||
139 | 156 | ||
140 | rtc@68 { | 157 | sdhci@2e000 { |
141 | compatible = "dallas,ds1374"; | 158 | compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; |
142 | reg = <0x68>; | 159 | reg = <0x2e000 0x1000>; |
143 | interrupts = <19 0x8>; | 160 | interrupts = <42 0x8>; |
144 | interrupt-parent = <&ipic>; | 161 | interrupt-parent = <&ipic>; |
162 | /* Filled in by U-Boot */ | ||
163 | clock-frequency = <0>; | ||
145 | }; | 164 | }; |
146 | }; | 165 | }; |
147 | 166 | ||
@@ -174,70 +193,83 @@ | |||
174 | interrupts = <38 0x8>; | 193 | interrupts = <38 0x8>; |
175 | dr_mode = "host"; | 194 | dr_mode = "host"; |
176 | phy_type = "ulpi"; | 195 | phy_type = "ulpi"; |
196 | sleep = <&pmc 0x00c00000>; | ||
177 | }; | 197 | }; |
178 | 198 | ||
179 | mdio@24520 { | ||
180 | #address-cells = <1>; | ||
181 | #size-cells = <0>; | ||
182 | compatible = "fsl,gianfar-mdio"; | ||
183 | reg = <0x24520 0x20>; | ||
184 | phy2: ethernet-phy@2 { | ||
185 | interrupt-parent = <&ipic>; | ||
186 | interrupts = <17 0x8>; | ||
187 | reg = <0x2>; | ||
188 | device_type = "ethernet-phy"; | ||
189 | }; | ||
190 | phy3: ethernet-phy@3 { | ||
191 | interrupt-parent = <&ipic>; | ||
192 | interrupts = <18 0x8>; | ||
193 | reg = <0x3>; | ||
194 | device_type = "ethernet-phy"; | ||
195 | }; | ||
196 | tbi0: tbi-phy@11 { | ||
197 | reg = <0x11>; | ||
198 | device_type = "tbi-phy"; | ||
199 | }; | ||
200 | }; | ||
201 | |||
202 | mdio@25520 { | ||
203 | #address-cells = <1>; | ||
204 | #size-cells = <0>; | ||
205 | compatible = "fsl,gianfar-tbi"; | ||
206 | reg = <0x25520 0x20>; | ||
207 | |||
208 | tbi1: tbi-phy@11 { | ||
209 | reg = <0x11>; | ||
210 | device_type = "tbi-phy"; | ||
211 | }; | ||
212 | }; | ||
213 | |||
214 | |||
215 | enet0: ethernet@24000 { | 199 | enet0: ethernet@24000 { |
200 | #address-cells = <1>; | ||
201 | #size-cells = <1>; | ||
216 | cell-index = <0>; | 202 | cell-index = <0>; |
217 | device_type = "network"; | 203 | device_type = "network"; |
218 | model = "eTSEC"; | 204 | model = "eTSEC"; |
219 | compatible = "gianfar"; | 205 | compatible = "gianfar"; |
220 | reg = <0x24000 0x1000>; | 206 | reg = <0x24000 0x1000>; |
207 | ranges = <0x0 0x24000 0x1000>; | ||
221 | local-mac-address = [ 00 00 00 00 00 00 ]; | 208 | local-mac-address = [ 00 00 00 00 00 00 ]; |
222 | interrupts = <32 0x8 33 0x8 34 0x8>; | 209 | interrupts = <32 0x8 33 0x8 34 0x8>; |
223 | phy-connection-type = "mii"; | 210 | phy-connection-type = "mii"; |
224 | interrupt-parent = <&ipic>; | 211 | interrupt-parent = <&ipic>; |
225 | tbi-handle = <&tbi0>; | 212 | tbi-handle = <&tbi0>; |
226 | phy-handle = <&phy2>; | 213 | phy-handle = <&phy2>; |
214 | sleep = <&pmc 0xc0000000>; | ||
215 | fsl,magic-packet; | ||
216 | |||
217 | mdio@520 { | ||
218 | #address-cells = <1>; | ||
219 | #size-cells = <0>; | ||
220 | compatible = "fsl,gianfar-mdio"; | ||
221 | reg = <0x520 0x20>; | ||
222 | |||
223 | phy2: ethernet-phy@2 { | ||
224 | interrupt-parent = <&ipic>; | ||
225 | interrupts = <17 0x8>; | ||
226 | reg = <0x2>; | ||
227 | device_type = "ethernet-phy"; | ||
228 | }; | ||
229 | |||
230 | phy3: ethernet-phy@3 { | ||
231 | interrupt-parent = <&ipic>; | ||
232 | interrupts = <18 0x8>; | ||
233 | reg = <0x3>; | ||
234 | device_type = "ethernet-phy"; | ||
235 | }; | ||
236 | |||
237 | tbi0: tbi-phy@11 { | ||
238 | reg = <0x11>; | ||
239 | device_type = "tbi-phy"; | ||
240 | }; | ||
241 | }; | ||
227 | }; | 242 | }; |
228 | 243 | ||
229 | enet1: ethernet@25000 { | 244 | enet1: ethernet@25000 { |
245 | #address-cells = <1>; | ||
246 | #size-cells = <1>; | ||
230 | cell-index = <1>; | 247 | cell-index = <1>; |
231 | device_type = "network"; | 248 | device_type = "network"; |
232 | model = "eTSEC"; | 249 | model = "eTSEC"; |
233 | compatible = "gianfar"; | 250 | compatible = "gianfar"; |
234 | reg = <0x25000 0x1000>; | 251 | reg = <0x25000 0x1000>; |
252 | ranges = <0x0 0x25000 0x1000>; | ||
235 | local-mac-address = [ 00 00 00 00 00 00 ]; | 253 | local-mac-address = [ 00 00 00 00 00 00 ]; |
236 | interrupts = <35 0x8 36 0x8 37 0x8>; | 254 | interrupts = <35 0x8 36 0x8 37 0x8>; |
237 | phy-connection-type = "mii"; | 255 | phy-connection-type = "mii"; |
238 | interrupt-parent = <&ipic>; | 256 | interrupt-parent = <&ipic>; |
239 | tbi-handle = <&tbi1>; | 257 | tbi-handle = <&tbi1>; |
240 | phy-handle = <&phy3>; | 258 | phy-handle = <&phy3>; |
259 | sleep = <&pmc 0x30000000>; | ||
260 | fsl,magic-packet; | ||
261 | |||
262 | mdio@520 { | ||
263 | #address-cells = <1>; | ||
264 | #size-cells = <0>; | ||
265 | compatible = "fsl,gianfar-tbi"; | ||
266 | reg = <0x520 0x20>; | ||
267 | |||
268 | tbi1: tbi-phy@11 { | ||
269 | reg = <0x11>; | ||
270 | device_type = "tbi-phy"; | ||
271 | }; | ||
272 | }; | ||
241 | }; | 273 | }; |
242 | 274 | ||
243 | serial0: serial@4500 { | 275 | serial0: serial@4500 { |
@@ -309,14 +341,7 @@ | |||
309 | fsl,channel-fifo-len = <24>; | 341 | fsl,channel-fifo-len = <24>; |
310 | fsl,exec-units-mask = <0x9fe>; | 342 | fsl,exec-units-mask = <0x9fe>; |
311 | fsl,descriptor-types-mask = <0x3ab0ebf>; | 343 | fsl,descriptor-types-mask = <0x3ab0ebf>; |
312 | }; | 344 | sleep = <&pmc 0x03000000>; |
313 | |||
314 | sdhc@2e000 { | ||
315 | model = "eSDHC"; | ||
316 | compatible = "fsl,esdhc"; | ||
317 | reg = <0x2e000 0x1000>; | ||
318 | interrupts = <42 0x8>; | ||
319 | interrupt-parent = <&ipic>; | ||
320 | }; | 345 | }; |
321 | 346 | ||
322 | sata@18000 { | 347 | sata@18000 { |
@@ -324,6 +349,7 @@ | |||
324 | reg = <0x18000 0x1000>; | 349 | reg = <0x18000 0x1000>; |
325 | interrupts = <44 0x8>; | 350 | interrupts = <44 0x8>; |
326 | interrupt-parent = <&ipic>; | 351 | interrupt-parent = <&ipic>; |
352 | sleep = <&pmc 0x000000c0>; | ||
327 | }; | 353 | }; |
328 | 354 | ||
329 | sata@19000 { | 355 | sata@19000 { |
@@ -331,6 +357,7 @@ | |||
331 | reg = <0x19000 0x1000>; | 357 | reg = <0x19000 0x1000>; |
332 | interrupts = <45 0x8>; | 358 | interrupts = <45 0x8>; |
333 | interrupt-parent = <&ipic>; | 359 | interrupt-parent = <&ipic>; |
360 | sleep = <&pmc 0x00000030>; | ||
334 | }; | 361 | }; |
335 | 362 | ||
336 | /* IPIC | 363 | /* IPIC |
@@ -346,6 +373,13 @@ | |||
346 | #interrupt-cells = <2>; | 373 | #interrupt-cells = <2>; |
347 | reg = <0x700 0x100>; | 374 | reg = <0x700 0x100>; |
348 | }; | 375 | }; |
376 | |||
377 | pmc: power@b00 { | ||
378 | compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; | ||
379 | reg = <0xb00 0x100 0xa00 0x100>; | ||
380 | interrupts = <80 0x8>; | ||
381 | interrupt-parent = <&ipic>; | ||
382 | }; | ||
349 | }; | 383 | }; |
350 | 384 | ||
351 | pci0: pci@e0008500 { | 385 | pci0: pci@e0008500 { |
@@ -400,6 +434,7 @@ | |||
400 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 | 434 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 |
401 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | 435 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
402 | 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; | 436 | 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; |
437 | sleep = <&pmc 0x00010000>; | ||
403 | clock-frequency = <0>; | 438 | clock-frequency = <0>; |
404 | #interrupt-cells = <1>; | 439 | #interrupt-cells = <1>; |
405 | #size-cells = <2>; | 440 | #size-cells = <2>; |
@@ -409,4 +444,68 @@ | |||
409 | compatible = "fsl,mpc8349-pci"; | 444 | compatible = "fsl,mpc8349-pci"; |
410 | device_type = "pci"; | 445 | device_type = "pci"; |
411 | }; | 446 | }; |
447 | |||
448 | pci1: pcie@e0009000 { | ||
449 | #address-cells = <3>; | ||
450 | #size-cells = <2>; | ||
451 | #interrupt-cells = <1>; | ||
452 | device_type = "pci"; | ||
453 | compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; | ||
454 | reg = <0xe0009000 0x00001000>; | ||
455 | ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 | ||
456 | 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; | ||
457 | bus-range = <0 255>; | ||
458 | interrupt-map-mask = <0xf800 0 0 7>; | ||
459 | interrupt-map = <0 0 0 1 &ipic 1 8 | ||
460 | 0 0 0 2 &ipic 1 8 | ||
461 | 0 0 0 3 &ipic 1 8 | ||
462 | 0 0 0 4 &ipic 1 8>; | ||
463 | sleep = <&pmc 0x00300000>; | ||
464 | clock-frequency = <0>; | ||
465 | |||
466 | pcie@0 { | ||
467 | #address-cells = <3>; | ||
468 | #size-cells = <2>; | ||
469 | device_type = "pci"; | ||
470 | reg = <0 0 0 0 0>; | ||
471 | ranges = <0x02000000 0 0xa8000000 | ||
472 | 0x02000000 0 0xa8000000 | ||
473 | 0 0x10000000 | ||
474 | 0x01000000 0 0x00000000 | ||
475 | 0x01000000 0 0x00000000 | ||
476 | 0 0x00800000>; | ||
477 | }; | ||
478 | }; | ||
479 | |||
480 | pci2: pcie@e000a000 { | ||
481 | #address-cells = <3>; | ||
482 | #size-cells = <2>; | ||
483 | #interrupt-cells = <1>; | ||
484 | device_type = "pci"; | ||
485 | compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; | ||
486 | reg = <0xe000a000 0x00001000>; | ||
487 | ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 | ||
488 | 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; | ||
489 | bus-range = <0 255>; | ||
490 | interrupt-map-mask = <0xf800 0 0 7>; | ||
491 | interrupt-map = <0 0 0 1 &ipic 2 8 | ||
492 | 0 0 0 2 &ipic 2 8 | ||
493 | 0 0 0 3 &ipic 2 8 | ||
494 | 0 0 0 4 &ipic 2 8>; | ||
495 | sleep = <&pmc 0x000c0000>; | ||
496 | clock-frequency = <0>; | ||
497 | |||
498 | pcie@0 { | ||
499 | #address-cells = <3>; | ||
500 | #size-cells = <2>; | ||
501 | device_type = "pci"; | ||
502 | reg = <0 0 0 0 0>; | ||
503 | ranges = <0x02000000 0 0xc8000000 | ||
504 | 0x02000000 0 0xc8000000 | ||
505 | 0 0x10000000 | ||
506 | 0x01000000 0 0x00000000 | ||
507 | 0x01000000 0 0x00000000 | ||
508 | 0 0x00800000>; | ||
509 | }; | ||
510 | }; | ||
412 | }; | 511 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index 9413af3b9925..053339390c22 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts | |||
@@ -22,6 +22,8 @@ | |||
22 | serial0 = &serial0; | 22 | serial0 = &serial0; |
23 | serial1 = &serial1; | 23 | serial1 = &serial1; |
24 | pci0 = &pci0; | 24 | pci0 = &pci0; |
25 | pci1 = &pci1; | ||
26 | pci2 = &pci2; | ||
25 | }; | 27 | }; |
26 | 28 | ||
27 | cpus { | 29 | cpus { |
@@ -107,26 +109,72 @@ | |||
107 | reg = <0x200 0x100>; | 109 | reg = <0x200 0x100>; |
108 | }; | 110 | }; |
109 | 111 | ||
110 | i2c@3000 { | 112 | gpio1: gpio-controller@c00 { |
111 | #address-cells = <1>; | 113 | #gpio-cells = <2>; |
112 | #size-cells = <0>; | 114 | compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; |
113 | cell-index = <0>; | 115 | reg = <0xc00 0x100>; |
114 | compatible = "fsl-i2c"; | 116 | interrupts = <74 0x8>; |
115 | reg = <0x3000 0x100>; | ||
116 | interrupts = <14 0x8>; | ||
117 | interrupt-parent = <&ipic>; | 117 | interrupt-parent = <&ipic>; |
118 | dfsrr; | 118 | gpio-controller; |
119 | rtc@68 { | 119 | }; |
120 | compatible = "dallas,ds1339"; | 120 | |
121 | reg = <0x68>; | 121 | gpio2: gpio-controller@d00 { |
122 | #gpio-cells = <2>; | ||
123 | compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; | ||
124 | reg = <0xd00 0x100>; | ||
125 | interrupts = <75 0x8>; | ||
126 | interrupt-parent = <&ipic>; | ||
127 | gpio-controller; | ||
128 | }; | ||
129 | |||
130 | sleep-nexus { | ||
131 | #address-cells = <1>; | ||
132 | #size-cells = <1>; | ||
133 | compatible = "simple-bus"; | ||
134 | sleep = <&pmc 0x0c000000>; | ||
135 | ranges; | ||
136 | |||
137 | i2c@3000 { | ||
138 | #address-cells = <1>; | ||
139 | #size-cells = <0>; | ||
140 | cell-index = <0>; | ||
141 | compatible = "fsl-i2c"; | ||
142 | reg = <0x3000 0x100>; | ||
143 | interrupts = <14 0x8>; | ||
144 | interrupt-parent = <&ipic>; | ||
145 | dfsrr; | ||
146 | |||
147 | dtt@48 { | ||
148 | compatible = "national,lm75"; | ||
149 | reg = <0x48>; | ||
150 | }; | ||
151 | |||
152 | at24@50 { | ||
153 | compatible = "at24,24c256"; | ||
154 | reg = <0x50>; | ||
155 | }; | ||
156 | |||
157 | rtc@68 { | ||
158 | compatible = "dallas,ds1339"; | ||
159 | reg = <0x68>; | ||
160 | }; | ||
161 | |||
162 | mcu_pio: mcu@a { | ||
163 | #gpio-cells = <2>; | ||
164 | compatible = "fsl,mc9s08qg8-mpc8377erdb", | ||
165 | "fsl,mcu-mpc8349emitx"; | ||
166 | reg = <0x0a>; | ||
167 | gpio-controller; | ||
168 | }; | ||
122 | }; | 169 | }; |
123 | 170 | ||
124 | mcu_pio: mcu@a { | 171 | sdhci@2e000 { |
125 | #gpio-cells = <2>; | 172 | compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; |
126 | compatible = "fsl,mc9s08qg8-mpc8377erdb", | 173 | reg = <0x2e000 0x1000>; |
127 | "fsl,mcu-mpc8349emitx"; | 174 | interrupts = <42 0x8>; |
128 | reg = <0x0a>; | 175 | interrupt-parent = <&ipic>; |
129 | gpio-controller; | 176 | /* Filled in by U-Boot */ |
177 | clock-frequency = <0>; | ||
130 | }; | 178 | }; |
131 | }; | 179 | }; |
132 | 180 | ||
@@ -197,64 +245,76 @@ | |||
197 | interrupt-parent = <&ipic>; | 245 | interrupt-parent = <&ipic>; |
198 | interrupts = <38 0x8>; | 246 | interrupts = <38 0x8>; |
199 | phy_type = "ulpi"; | 247 | phy_type = "ulpi"; |
248 | sleep = <&pmc 0x00c00000>; | ||
200 | }; | 249 | }; |
201 | 250 | ||
202 | mdio@24520 { | ||
203 | #address-cells = <1>; | ||
204 | #size-cells = <0>; | ||
205 | compatible = "fsl,gianfar-mdio"; | ||
206 | reg = <0x24520 0x20>; | ||
207 | phy2: ethernet-phy@2 { | ||
208 | interrupt-parent = <&ipic>; | ||
209 | interrupts = <17 0x8>; | ||
210 | reg = <0x2>; | ||
211 | device_type = "ethernet-phy"; | ||
212 | }; | ||
213 | tbi0: tbi-phy@11 { | ||
214 | reg = <0x11>; | ||
215 | device_type = "tbi-phy"; | ||
216 | }; | ||
217 | }; | ||
218 | |||
219 | mdio@25520 { | ||
220 | #address-cells = <1>; | ||
221 | #size-cells = <0>; | ||
222 | compatible = "fsl,gianfar-tbi"; | ||
223 | reg = <0x25520 0x20>; | ||
224 | |||
225 | tbi1: tbi-phy@11 { | ||
226 | reg = <0x11>; | ||
227 | device_type = "tbi-phy"; | ||
228 | }; | ||
229 | }; | ||
230 | |||
231 | |||
232 | enet0: ethernet@24000 { | 251 | enet0: ethernet@24000 { |
252 | #address-cells = <1>; | ||
253 | #size-cells = <1>; | ||
233 | cell-index = <0>; | 254 | cell-index = <0>; |
234 | device_type = "network"; | 255 | device_type = "network"; |
235 | model = "eTSEC"; | 256 | model = "eTSEC"; |
236 | compatible = "gianfar"; | 257 | compatible = "gianfar"; |
237 | reg = <0x24000 0x1000>; | 258 | reg = <0x24000 0x1000>; |
259 | ranges = <0x0 0x24000 0x1000>; | ||
238 | local-mac-address = [ 00 00 00 00 00 00 ]; | 260 | local-mac-address = [ 00 00 00 00 00 00 ]; |
239 | interrupts = <32 0x8 33 0x8 34 0x8>; | 261 | interrupts = <32 0x8 33 0x8 34 0x8>; |
240 | phy-connection-type = "mii"; | 262 | phy-connection-type = "mii"; |
241 | interrupt-parent = <&ipic>; | 263 | interrupt-parent = <&ipic>; |
242 | tbi-handle = <&tbi0>; | 264 | tbi-handle = <&tbi0>; |
243 | phy-handle = <&phy2>; | 265 | phy-handle = <&phy2>; |
266 | sleep = <&pmc 0xc0000000>; | ||
267 | fsl,magic-packet; | ||
268 | |||
269 | mdio@520 { | ||
270 | #address-cells = <1>; | ||
271 | #size-cells = <0>; | ||
272 | compatible = "fsl,gianfar-mdio"; | ||
273 | reg = <0x520 0x20>; | ||
274 | |||
275 | phy2: ethernet-phy@2 { | ||
276 | interrupt-parent = <&ipic>; | ||
277 | interrupts = <17 0x8>; | ||
278 | reg = <0x2>; | ||
279 | device_type = "ethernet-phy"; | ||
280 | }; | ||
281 | |||
282 | tbi0: tbi-phy@11 { | ||
283 | reg = <0x11>; | ||
284 | device_type = "tbi-phy"; | ||
285 | }; | ||
286 | }; | ||
244 | }; | 287 | }; |
245 | 288 | ||
246 | enet1: ethernet@25000 { | 289 | enet1: ethernet@25000 { |
290 | #address-cells = <1>; | ||
291 | #size-cells = <1>; | ||
247 | cell-index = <1>; | 292 | cell-index = <1>; |
248 | device_type = "network"; | 293 | device_type = "network"; |
249 | model = "eTSEC"; | 294 | model = "eTSEC"; |
250 | compatible = "gianfar"; | 295 | compatible = "gianfar"; |
251 | reg = <0x25000 0x1000>; | 296 | reg = <0x25000 0x1000>; |
297 | ranges = <0x0 0x25000 0x1000>; | ||
252 | local-mac-address = [ 00 00 00 00 00 00 ]; | 298 | local-mac-address = [ 00 00 00 00 00 00 ]; |
253 | interrupts = <35 0x8 36 0x8 37 0x8>; | 299 | interrupts = <35 0x8 36 0x8 37 0x8>; |
254 | phy-connection-type = "mii"; | 300 | phy-connection-type = "mii"; |
255 | interrupt-parent = <&ipic>; | 301 | interrupt-parent = <&ipic>; |
256 | fixed-link = <1 1 1000 0 0>; | 302 | fixed-link = <1 1 1000 0 0>; |
257 | tbi-handle = <&tbi1>; | 303 | tbi-handle = <&tbi1>; |
304 | sleep = <&pmc 0x30000000>; | ||
305 | fsl,magic-packet; | ||
306 | |||
307 | mdio@520 { | ||
308 | #address-cells = <1>; | ||
309 | #size-cells = <0>; | ||
310 | compatible = "fsl,gianfar-tbi"; | ||
311 | reg = <0x520 0x20>; | ||
312 | |||
313 | tbi1: tbi-phy@11 { | ||
314 | reg = <0x11>; | ||
315 | device_type = "tbi-phy"; | ||
316 | }; | ||
317 | }; | ||
258 | }; | 318 | }; |
259 | 319 | ||
260 | serial0: serial@4500 { | 320 | serial0: serial@4500 { |
@@ -287,6 +347,7 @@ | |||
287 | fsl,channel-fifo-len = <24>; | 347 | fsl,channel-fifo-len = <24>; |
288 | fsl,exec-units-mask = <0x9fe>; | 348 | fsl,exec-units-mask = <0x9fe>; |
289 | fsl,descriptor-types-mask = <0x3ab0ebf>; | 349 | fsl,descriptor-types-mask = <0x3ab0ebf>; |
350 | sleep = <&pmc 0x03000000>; | ||
290 | }; | 351 | }; |
291 | 352 | ||
292 | sata@18000 { | 353 | sata@18000 { |
@@ -294,6 +355,7 @@ | |||
294 | reg = <0x18000 0x1000>; | 355 | reg = <0x18000 0x1000>; |
295 | interrupts = <44 0x8>; | 356 | interrupts = <44 0x8>; |
296 | interrupt-parent = <&ipic>; | 357 | interrupt-parent = <&ipic>; |
358 | sleep = <&pmc 0x000000c0>; | ||
297 | }; | 359 | }; |
298 | 360 | ||
299 | sata@19000 { | 361 | sata@19000 { |
@@ -301,6 +363,7 @@ | |||
301 | reg = <0x19000 0x1000>; | 363 | reg = <0x19000 0x1000>; |
302 | interrupts = <45 0x8>; | 364 | interrupts = <45 0x8>; |
303 | interrupt-parent = <&ipic>; | 365 | interrupt-parent = <&ipic>; |
366 | sleep = <&pmc 0x00000030>; | ||
304 | }; | 367 | }; |
305 | 368 | ||
306 | /* IPIC | 369 | /* IPIC |
@@ -316,6 +379,13 @@ | |||
316 | #interrupt-cells = <2>; | 379 | #interrupt-cells = <2>; |
317 | reg = <0x700 0x100>; | 380 | reg = <0x700 0x100>; |
318 | }; | 381 | }; |
382 | |||
383 | pmc: power@b00 { | ||
384 | compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; | ||
385 | reg = <0xb00 0x100 0xa00 0x100>; | ||
386 | interrupts = <80 0x8>; | ||
387 | interrupt-parent = <&ipic>; | ||
388 | }; | ||
319 | }; | 389 | }; |
320 | 390 | ||
321 | pci0: pci@e0008500 { | 391 | pci0: pci@e0008500 { |
@@ -341,6 +411,7 @@ | |||
341 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 | 411 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 |
342 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | 412 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
343 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; | 413 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; |
414 | sleep = <&pmc 0x00010000>; | ||
344 | clock-frequency = <66666666>; | 415 | clock-frequency = <66666666>; |
345 | #interrupt-cells = <1>; | 416 | #interrupt-cells = <1>; |
346 | #size-cells = <2>; | 417 | #size-cells = <2>; |
@@ -350,4 +421,68 @@ | |||
350 | compatible = "fsl,mpc8349-pci"; | 421 | compatible = "fsl,mpc8349-pci"; |
351 | device_type = "pci"; | 422 | device_type = "pci"; |
352 | }; | 423 | }; |
424 | |||
425 | pci1: pcie@e0009000 { | ||
426 | #address-cells = <3>; | ||
427 | #size-cells = <2>; | ||
428 | #interrupt-cells = <1>; | ||
429 | device_type = "pci"; | ||
430 | compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; | ||
431 | reg = <0xe0009000 0x00001000>; | ||
432 | ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 | ||
433 | 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; | ||
434 | bus-range = <0 255>; | ||
435 | interrupt-map-mask = <0xf800 0 0 7>; | ||
436 | interrupt-map = <0 0 0 1 &ipic 1 8 | ||
437 | 0 0 0 2 &ipic 1 8 | ||
438 | 0 0 0 3 &ipic 1 8 | ||
439 | 0 0 0 4 &ipic 1 8>; | ||
440 | sleep = <&pmc 0x00300000>; | ||
441 | clock-frequency = <0>; | ||
442 | |||
443 | pcie@0 { | ||
444 | #address-cells = <3>; | ||
445 | #size-cells = <2>; | ||
446 | device_type = "pci"; | ||
447 | reg = <0 0 0 0 0>; | ||
448 | ranges = <0x02000000 0 0xa8000000 | ||
449 | 0x02000000 0 0xa8000000 | ||
450 | 0 0x10000000 | ||
451 | 0x01000000 0 0x00000000 | ||
452 | 0x01000000 0 0x00000000 | ||
453 | 0 0x00800000>; | ||
454 | }; | ||
455 | }; | ||
456 | |||
457 | pci2: pcie@e000a000 { | ||
458 | #address-cells = <3>; | ||
459 | #size-cells = <2>; | ||
460 | #interrupt-cells = <1>; | ||
461 | device_type = "pci"; | ||
462 | compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; | ||
463 | reg = <0xe000a000 0x00001000>; | ||
464 | ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 | ||
465 | 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; | ||
466 | bus-range = <0 255>; | ||
467 | interrupt-map-mask = <0xf800 0 0 7>; | ||
468 | interrupt-map = <0 0 0 1 &ipic 2 8 | ||
469 | 0 0 0 2 &ipic 2 8 | ||
470 | 0 0 0 3 &ipic 2 8 | ||
471 | 0 0 0 4 &ipic 2 8>; | ||
472 | sleep = <&pmc 0x000c0000>; | ||
473 | clock-frequency = <0>; | ||
474 | |||
475 | pcie@0 { | ||
476 | #address-cells = <3>; | ||
477 | #size-cells = <2>; | ||
478 | device_type = "pci"; | ||
479 | reg = <0 0 0 0 0>; | ||
480 | ranges = <0x02000000 0 0xc8000000 | ||
481 | 0x02000000 0 0xc8000000 | ||
482 | 0 0x10000000 | ||
483 | 0x01000000 0 0x00000000 | ||
484 | 0x01000000 0 0x00000000 | ||
485 | 0 0x00800000>; | ||
486 | }; | ||
487 | }; | ||
353 | }; | 488 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts index b85fc02682d2..651ff2f9db2d 100644 --- a/arch/powerpc/boot/dts/mpc8378_mds.dts +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts | |||
@@ -23,6 +23,8 @@ | |||
23 | serial0 = &serial0; | 23 | serial0 = &serial0; |
24 | serial1 = &serial1; | 24 | serial1 = &serial1; |
25 | pci0 = &pci0; | 25 | pci0 = &pci0; |
26 | pci1 = &pci1; | ||
27 | pci2 = &pci2; | ||
26 | }; | 28 | }; |
27 | 29 | ||
28 | cpus { | 30 | cpus { |
@@ -127,21 +129,38 @@ | |||
127 | reg = <0x200 0x100>; | 129 | reg = <0x200 0x100>; |
128 | }; | 130 | }; |
129 | 131 | ||
130 | i2c@3000 { | 132 | sleep-nexus { |
131 | #address-cells = <1>; | 133 | #address-cells = <1>; |
132 | #size-cells = <0>; | 134 | #size-cells = <1>; |
133 | cell-index = <0>; | 135 | compatible = "simple-bus"; |
134 | compatible = "fsl-i2c"; | 136 | sleep = <&pmc 0x0c000000>; |
135 | reg = <0x3000 0x100>; | 137 | ranges; |
136 | interrupts = <14 0x8>; | 138 | |
137 | interrupt-parent = <&ipic>; | 139 | i2c@3000 { |
138 | dfsrr; | 140 | #address-cells = <1>; |
141 | #size-cells = <0>; | ||
142 | cell-index = <0>; | ||
143 | compatible = "fsl-i2c"; | ||
144 | reg = <0x3000 0x100>; | ||
145 | interrupts = <14 0x8>; | ||
146 | interrupt-parent = <&ipic>; | ||
147 | dfsrr; | ||
148 | |||
149 | rtc@68 { | ||
150 | compatible = "dallas,ds1374"; | ||
151 | reg = <0x68>; | ||
152 | interrupts = <19 0x8>; | ||
153 | interrupt-parent = <&ipic>; | ||
154 | }; | ||
155 | }; | ||
139 | 156 | ||
140 | rtc@68 { | 157 | sdhci@2e000 { |
141 | compatible = "dallas,ds1374"; | 158 | compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; |
142 | reg = <0x68>; | 159 | reg = <0x2e000 0x1000>; |
143 | interrupts = <19 0x8>; | 160 | interrupts = <42 0x8>; |
144 | interrupt-parent = <&ipic>; | 161 | interrupt-parent = <&ipic>; |
162 | /* Filled in by U-Boot */ | ||
163 | clock-frequency = <0>; | ||
145 | }; | 164 | }; |
146 | }; | 165 | }; |
147 | 166 | ||
@@ -213,70 +232,83 @@ | |||
213 | interrupts = <38 0x8>; | 232 | interrupts = <38 0x8>; |
214 | dr_mode = "host"; | 233 | dr_mode = "host"; |
215 | phy_type = "ulpi"; | 234 | phy_type = "ulpi"; |
235 | sleep = <&pmc 0x00c00000>; | ||
216 | }; | 236 | }; |
217 | 237 | ||
218 | mdio@24520 { | ||
219 | #address-cells = <1>; | ||
220 | #size-cells = <0>; | ||
221 | compatible = "fsl,gianfar-mdio"; | ||
222 | reg = <0x24520 0x20>; | ||
223 | phy2: ethernet-phy@2 { | ||
224 | interrupt-parent = <&ipic>; | ||
225 | interrupts = <17 0x8>; | ||
226 | reg = <0x2>; | ||
227 | device_type = "ethernet-phy"; | ||
228 | }; | ||
229 | phy3: ethernet-phy@3 { | ||
230 | interrupt-parent = <&ipic>; | ||
231 | interrupts = <18 0x8>; | ||
232 | reg = <0x3>; | ||
233 | device_type = "ethernet-phy"; | ||
234 | }; | ||
235 | tbi0: tbi-phy@11 { | ||
236 | reg = <0x11>; | ||
237 | device_type = "tbi-phy"; | ||
238 | }; | ||
239 | }; | ||
240 | |||
241 | mdio@25520 { | ||
242 | #address-cells = <1>; | ||
243 | #size-cells = <0>; | ||
244 | compatible = "fsl,gianfar-tbi"; | ||
245 | reg = <0x25520 0x20>; | ||
246 | |||
247 | tbi1: tbi-phy@11 { | ||
248 | reg = <0x11>; | ||
249 | device_type = "tbi-phy"; | ||
250 | }; | ||
251 | }; | ||
252 | |||
253 | |||
254 | enet0: ethernet@24000 { | 238 | enet0: ethernet@24000 { |
239 | #address-cells = <1>; | ||
240 | #size-cells = <1>; | ||
255 | cell-index = <0>; | 241 | cell-index = <0>; |
256 | device_type = "network"; | 242 | device_type = "network"; |
257 | model = "eTSEC"; | 243 | model = "eTSEC"; |
258 | compatible = "gianfar"; | 244 | compatible = "gianfar"; |
259 | reg = <0x24000 0x1000>; | 245 | reg = <0x24000 0x1000>; |
246 | ranges = <0x0 0x24000 0x1000>; | ||
260 | local-mac-address = [ 00 00 00 00 00 00 ]; | 247 | local-mac-address = [ 00 00 00 00 00 00 ]; |
261 | interrupts = <32 0x8 33 0x8 34 0x8>; | 248 | interrupts = <32 0x8 33 0x8 34 0x8>; |
262 | phy-connection-type = "mii"; | 249 | phy-connection-type = "mii"; |
263 | interrupt-parent = <&ipic>; | 250 | interrupt-parent = <&ipic>; |
264 | tbi-handle = <&tbi0>; | 251 | tbi-handle = <&tbi0>; |
265 | phy-handle = <&phy2>; | 252 | phy-handle = <&phy2>; |
253 | sleep = <&pmc 0xc0000000>; | ||
254 | fsl,magic-packet; | ||
255 | |||
256 | mdio@520 { | ||
257 | #address-cells = <1>; | ||
258 | #size-cells = <0>; | ||
259 | compatible = "fsl,gianfar-mdio"; | ||
260 | reg = <0x520 0x20>; | ||
261 | |||
262 | phy2: ethernet-phy@2 { | ||
263 | interrupt-parent = <&ipic>; | ||
264 | interrupts = <17 0x8>; | ||
265 | reg = <0x2>; | ||
266 | device_type = "ethernet-phy"; | ||
267 | }; | ||
268 | |||
269 | phy3: ethernet-phy@3 { | ||
270 | interrupt-parent = <&ipic>; | ||
271 | interrupts = <18 0x8>; | ||
272 | reg = <0x3>; | ||
273 | device_type = "ethernet-phy"; | ||
274 | }; | ||
275 | |||
276 | tbi0: tbi-phy@11 { | ||
277 | reg = <0x11>; | ||
278 | device_type = "tbi-phy"; | ||
279 | }; | ||
280 | }; | ||
266 | }; | 281 | }; |
267 | 282 | ||
268 | enet1: ethernet@25000 { | 283 | enet1: ethernet@25000 { |
284 | #address-cells = <1>; | ||
285 | #size-cells = <1>; | ||
269 | cell-index = <1>; | 286 | cell-index = <1>; |
270 | device_type = "network"; | 287 | device_type = "network"; |
271 | model = "eTSEC"; | 288 | model = "eTSEC"; |
272 | compatible = "gianfar"; | 289 | compatible = "gianfar"; |
273 | reg = <0x25000 0x1000>; | 290 | reg = <0x25000 0x1000>; |
291 | ranges = <0x0 0x25000 0x1000>; | ||
274 | local-mac-address = [ 00 00 00 00 00 00 ]; | 292 | local-mac-address = [ 00 00 00 00 00 00 ]; |
275 | interrupts = <35 0x8 36 0x8 37 0x8>; | 293 | interrupts = <35 0x8 36 0x8 37 0x8>; |
276 | phy-connection-type = "mii"; | 294 | phy-connection-type = "mii"; |
277 | interrupt-parent = <&ipic>; | 295 | interrupt-parent = <&ipic>; |
278 | tbi-handle = <&tbi1>; | 296 | tbi-handle = <&tbi1>; |
279 | phy-handle = <&phy3>; | 297 | phy-handle = <&phy3>; |
298 | sleep = <&pmc 0x30000000>; | ||
299 | fsl,magic-packet; | ||
300 | |||
301 | mdio@520 { | ||
302 | #address-cells = <1>; | ||
303 | #size-cells = <0>; | ||
304 | compatible = "fsl,gianfar-tbi"; | ||
305 | reg = <0x520 0x20>; | ||
306 | |||
307 | tbi1: tbi-phy@11 { | ||
308 | reg = <0x11>; | ||
309 | device_type = "tbi-phy"; | ||
310 | }; | ||
311 | }; | ||
280 | }; | 312 | }; |
281 | 313 | ||
282 | serial0: serial@4500 { | 314 | serial0: serial@4500 { |
@@ -309,14 +341,7 @@ | |||
309 | fsl,channel-fifo-len = <24>; | 341 | fsl,channel-fifo-len = <24>; |
310 | fsl,exec-units-mask = <0x9fe>; | 342 | fsl,exec-units-mask = <0x9fe>; |
311 | fsl,descriptor-types-mask = <0x3ab0ebf>; | 343 | fsl,descriptor-types-mask = <0x3ab0ebf>; |
312 | }; | 344 | sleep = <&pmc 0x03000000>; |
313 | |||
314 | sdhc@2e000 { | ||
315 | model = "eSDHC"; | ||
316 | compatible = "fsl,esdhc"; | ||
317 | reg = <0x2e000 0x1000>; | ||
318 | interrupts = <42 0x8>; | ||
319 | interrupt-parent = <&ipic>; | ||
320 | }; | 345 | }; |
321 | 346 | ||
322 | /* IPIC | 347 | /* IPIC |
@@ -332,6 +357,13 @@ | |||
332 | #interrupt-cells = <2>; | 357 | #interrupt-cells = <2>; |
333 | reg = <0x700 0x100>; | 358 | reg = <0x700 0x100>; |
334 | }; | 359 | }; |
360 | |||
361 | pmc: power@b00 { | ||
362 | compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc"; | ||
363 | reg = <0xb00 0x100 0xa00 0x100>; | ||
364 | interrupts = <80 0x8>; | ||
365 | interrupt-parent = <&ipic>; | ||
366 | }; | ||
335 | }; | 367 | }; |
336 | 368 | ||
337 | pci0: pci@e0008500 { | 369 | pci0: pci@e0008500 { |
@@ -387,6 +419,7 @@ | |||
387 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | 419 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
388 | 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; | 420 | 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; |
389 | clock-frequency = <0>; | 421 | clock-frequency = <0>; |
422 | sleep = <&pmc 0x00010000>; | ||
390 | #interrupt-cells = <1>; | 423 | #interrupt-cells = <1>; |
391 | #size-cells = <2>; | 424 | #size-cells = <2>; |
392 | #address-cells = <3>; | 425 | #address-cells = <3>; |
@@ -395,4 +428,68 @@ | |||
395 | compatible = "fsl,mpc8349-pci"; | 428 | compatible = "fsl,mpc8349-pci"; |
396 | device_type = "pci"; | 429 | device_type = "pci"; |
397 | }; | 430 | }; |
431 | |||
432 | pci1: pcie@e0009000 { | ||
433 | #address-cells = <3>; | ||
434 | #size-cells = <2>; | ||
435 | #interrupt-cells = <1>; | ||
436 | device_type = "pci"; | ||
437 | compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; | ||
438 | reg = <0xe0009000 0x00001000>; | ||
439 | ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 | ||
440 | 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; | ||
441 | bus-range = <0 255>; | ||
442 | interrupt-map-mask = <0xf800 0 0 7>; | ||
443 | interrupt-map = <0 0 0 1 &ipic 1 8 | ||
444 | 0 0 0 2 &ipic 1 8 | ||
445 | 0 0 0 3 &ipic 1 8 | ||
446 | 0 0 0 4 &ipic 1 8>; | ||
447 | sleep = <&pmc 0x00300000>; | ||
448 | clock-frequency = <0>; | ||
449 | |||
450 | pcie@0 { | ||
451 | #address-cells = <3>; | ||
452 | #size-cells = <2>; | ||
453 | device_type = "pci"; | ||
454 | reg = <0 0 0 0 0>; | ||
455 | ranges = <0x02000000 0 0xa8000000 | ||
456 | 0x02000000 0 0xa8000000 | ||
457 | 0 0x10000000 | ||
458 | 0x01000000 0 0x00000000 | ||
459 | 0x01000000 0 0x00000000 | ||
460 | 0 0x00800000>; | ||
461 | }; | ||
462 | }; | ||
463 | |||
464 | pci2: pcie@e000a000 { | ||
465 | #address-cells = <3>; | ||
466 | #size-cells = <2>; | ||
467 | #interrupt-cells = <1>; | ||
468 | device_type = "pci"; | ||
469 | compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; | ||
470 | reg = <0xe000a000 0x00001000>; | ||
471 | ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 | ||
472 | 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; | ||
473 | bus-range = <0 255>; | ||
474 | interrupt-map-mask = <0xf800 0 0 7>; | ||
475 | interrupt-map = <0 0 0 1 &ipic 2 8 | ||
476 | 0 0 0 2 &ipic 2 8 | ||
477 | 0 0 0 3 &ipic 2 8 | ||
478 | 0 0 0 4 &ipic 2 8>; | ||
479 | sleep = <&pmc 0x000c0000>; | ||
480 | clock-frequency = <0>; | ||
481 | |||
482 | pcie@0 { | ||
483 | #address-cells = <3>; | ||
484 | #size-cells = <2>; | ||
485 | device_type = "pci"; | ||
486 | reg = <0 0 0 0 0>; | ||
487 | ranges = <0x02000000 0 0xc8000000 | ||
488 | 0x02000000 0 0xc8000000 | ||
489 | 0 0x10000000 | ||
490 | 0x01000000 0 0x00000000 | ||
491 | 0x01000000 0 0x00000000 | ||
492 | 0 0x00800000>; | ||
493 | }; | ||
494 | }; | ||
398 | }; | 495 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index 23c10ce22c2c..5d90e85704c3 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts | |||
@@ -22,6 +22,8 @@ | |||
22 | serial0 = &serial0; | 22 | serial0 = &serial0; |
23 | serial1 = &serial1; | 23 | serial1 = &serial1; |
24 | pci0 = &pci0; | 24 | pci0 = &pci0; |
25 | pci1 = &pci1; | ||
26 | pci2 = &pci2; | ||
25 | }; | 27 | }; |
26 | 28 | ||
27 | cpus { | 29 | cpus { |
@@ -107,26 +109,72 @@ | |||
107 | reg = <0x200 0x100>; | 109 | reg = <0x200 0x100>; |
108 | }; | 110 | }; |
109 | 111 | ||
110 | i2c@3000 { | 112 | gpio1: gpio-controller@c00 { |
111 | #address-cells = <1>; | 113 | #gpio-cells = <2>; |
112 | #size-cells = <0>; | 114 | compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio"; |
113 | cell-index = <0>; | 115 | reg = <0xc00 0x100>; |
114 | compatible = "fsl-i2c"; | 116 | interrupts = <74 0x8>; |
115 | reg = <0x3000 0x100>; | ||
116 | interrupts = <14 0x8>; | ||
117 | interrupt-parent = <&ipic>; | 117 | interrupt-parent = <&ipic>; |
118 | dfsrr; | 118 | gpio-controller; |
119 | rtc@68 { | 119 | }; |
120 | compatible = "dallas,ds1339"; | 120 | |
121 | reg = <0x68>; | 121 | gpio2: gpio-controller@d00 { |
122 | #gpio-cells = <2>; | ||
123 | compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio"; | ||
124 | reg = <0xd00 0x100>; | ||
125 | interrupts = <75 0x8>; | ||
126 | interrupt-parent = <&ipic>; | ||
127 | gpio-controller; | ||
128 | }; | ||
129 | |||
130 | sleep-nexus { | ||
131 | #address-cells = <1>; | ||
132 | #size-cells = <1>; | ||
133 | compatible = "simple-bus"; | ||
134 | sleep = <&pmc 0x0c000000>; | ||
135 | ranges; | ||
136 | |||
137 | i2c@3000 { | ||
138 | #address-cells = <1>; | ||
139 | #size-cells = <0>; | ||
140 | cell-index = <0>; | ||
141 | compatible = "fsl-i2c"; | ||
142 | reg = <0x3000 0x100>; | ||
143 | interrupts = <14 0x8>; | ||
144 | interrupt-parent = <&ipic>; | ||
145 | dfsrr; | ||
146 | |||
147 | dtt@48 { | ||
148 | compatible = "national,lm75"; | ||
149 | reg = <0x48>; | ||
150 | }; | ||
151 | |||
152 | at24@50 { | ||
153 | compatible = "at24,24c256"; | ||
154 | reg = <0x50>; | ||
155 | }; | ||
156 | |||
157 | rtc@68 { | ||
158 | compatible = "dallas,ds1339"; | ||
159 | reg = <0x68>; | ||
160 | }; | ||
161 | |||
162 | mcu_pio: mcu@a { | ||
163 | #gpio-cells = <2>; | ||
164 | compatible = "fsl,mc9s08qg8-mpc8378erdb", | ||
165 | "fsl,mcu-mpc8349emitx"; | ||
166 | reg = <0x0a>; | ||
167 | gpio-controller; | ||
168 | }; | ||
122 | }; | 169 | }; |
123 | 170 | ||
124 | mcu_pio: mcu@a { | 171 | sdhci@2e000 { |
125 | #gpio-cells = <2>; | 172 | compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; |
126 | compatible = "fsl,mc9s08qg8-mpc8378erdb", | 173 | reg = <0x2e000 0x1000>; |
127 | "fsl,mcu-mpc8349emitx"; | 174 | interrupts = <42 0x8>; |
128 | reg = <0x0a>; | 175 | interrupt-parent = <&ipic>; |
129 | gpio-controller; | 176 | /* Filled in by U-Boot */ |
177 | clock-frequency = <0>; | ||
130 | }; | 178 | }; |
131 | }; | 179 | }; |
132 | 180 | ||
@@ -197,62 +245,76 @@ | |||
197 | interrupt-parent = <&ipic>; | 245 | interrupt-parent = <&ipic>; |
198 | interrupts = <38 0x8>; | 246 | interrupts = <38 0x8>; |
199 | phy_type = "ulpi"; | 247 | phy_type = "ulpi"; |
248 | sleep = <&pmc 0x00c00000>; | ||
200 | }; | 249 | }; |
201 | 250 | ||
202 | mdio@24520 { | ||
203 | #address-cells = <1>; | ||
204 | #size-cells = <0>; | ||
205 | compatible = "fsl,gianfar-mdio"; | ||
206 | reg = <0x24520 0x20>; | ||
207 | phy2: ethernet-phy@2 { | ||
208 | interrupt-parent = <&ipic>; | ||
209 | interrupts = <17 0x8>; | ||
210 | reg = <0x2>; | ||
211 | device_type = "ethernet-phy"; | ||
212 | }; | ||
213 | tbi0: tbi-phy@11 { | ||
214 | reg = <0x11>; | ||
215 | device_type = "tbi-phy"; | ||
216 | }; | ||
217 | }; | ||
218 | |||
219 | mdio@25520 { | ||
220 | #address-cells = <1>; | ||
221 | #size-cells = <0>; | ||
222 | compatible = "fsl,gianfar-tbi"; | ||
223 | reg = <0x25520 0x20>; | ||
224 | |||
225 | tbi1: tbi-phy@11 { | ||
226 | reg = <0x11>; | ||
227 | device_type = "tbi-phy"; | ||
228 | }; | ||
229 | }; | ||
230 | |||
231 | |||
232 | enet0: ethernet@24000 { | 251 | enet0: ethernet@24000 { |
252 | #address-cells = <1>; | ||
253 | #size-cells = <1>; | ||
233 | cell-index = <0>; | 254 | cell-index = <0>; |
234 | device_type = "network"; | 255 | device_type = "network"; |
235 | model = "eTSEC"; | 256 | model = "eTSEC"; |
236 | compatible = "gianfar"; | 257 | compatible = "gianfar"; |
237 | reg = <0x24000 0x1000>; | 258 | reg = <0x24000 0x1000>; |
259 | ranges = <0x0 0x24000 0x1000>; | ||
238 | local-mac-address = [ 00 00 00 00 00 00 ]; | 260 | local-mac-address = [ 00 00 00 00 00 00 ]; |
239 | interrupts = <32 0x8 33 0x8 34 0x8>; | 261 | interrupts = <32 0x8 33 0x8 34 0x8>; |
240 | phy-connection-type = "mii"; | 262 | phy-connection-type = "mii"; |
241 | interrupt-parent = <&ipic>; | 263 | interrupt-parent = <&ipic>; |
264 | tbi-handle = <&tbi0>; | ||
242 | phy-handle = <&phy2>; | 265 | phy-handle = <&phy2>; |
266 | sleep = <&pmc 0xc0000000>; | ||
267 | fsl,magic-packet; | ||
268 | |||
269 | mdio@520 { | ||
270 | #address-cells = <1>; | ||
271 | #size-cells = <0>; | ||
272 | compatible = "fsl,gianfar-mdio"; | ||
273 | reg = <0x520 0x20>; | ||
274 | |||
275 | phy2: ethernet-phy@2 { | ||
276 | interrupt-parent = <&ipic>; | ||
277 | interrupts = <17 0x8>; | ||
278 | reg = <0x2>; | ||
279 | device_type = "ethernet-phy"; | ||
280 | }; | ||
281 | |||
282 | tbi0: tbi-phy@11 { | ||
283 | reg = <0x11>; | ||
284 | device_type = "tbi-phy"; | ||
285 | }; | ||
286 | }; | ||
243 | }; | 287 | }; |
244 | 288 | ||
245 | enet1: ethernet@25000 { | 289 | enet1: ethernet@25000 { |
290 | #address-cells = <1>; | ||
291 | #size-cells = <1>; | ||
246 | cell-index = <1>; | 292 | cell-index = <1>; |
247 | device_type = "network"; | 293 | device_type = "network"; |
248 | model = "eTSEC"; | 294 | model = "eTSEC"; |
249 | compatible = "gianfar"; | 295 | compatible = "gianfar"; |
250 | reg = <0x25000 0x1000>; | 296 | reg = <0x25000 0x1000>; |
297 | ranges = <0x0 0x25000 0x1000>; | ||
251 | local-mac-address = [ 00 00 00 00 00 00 ]; | 298 | local-mac-address = [ 00 00 00 00 00 00 ]; |
252 | interrupts = <35 0x8 36 0x8 37 0x8>; | 299 | interrupts = <35 0x8 36 0x8 37 0x8>; |
253 | phy-connection-type = "mii"; | 300 | phy-connection-type = "mii"; |
254 | interrupt-parent = <&ipic>; | 301 | interrupt-parent = <&ipic>; |
255 | fixed-link = <1 1 1000 0 0>; | 302 | fixed-link = <1 1 1000 0 0>; |
303 | tbi-handle = <&tbi1>; | ||
304 | sleep = <&pmc 0x30000000>; | ||
305 | fsl,magic-packet; | ||
306 | |||
307 | mdio@520 { | ||
308 | #address-cells = <1>; | ||
309 | #size-cells = <0>; | ||
310 | compatible = "fsl,gianfar-tbi"; | ||
311 | reg = <0x520 0x20>; | ||
312 | |||
313 | tbi1: tbi-phy@11 { | ||
314 | reg = <0x11>; | ||
315 | device_type = "tbi-phy"; | ||
316 | }; | ||
317 | }; | ||
256 | }; | 318 | }; |
257 | 319 | ||
258 | serial0: serial@4500 { | 320 | serial0: serial@4500 { |
@@ -285,6 +347,7 @@ | |||
285 | fsl,channel-fifo-len = <24>; | 347 | fsl,channel-fifo-len = <24>; |
286 | fsl,exec-units-mask = <0x9fe>; | 348 | fsl,exec-units-mask = <0x9fe>; |
287 | fsl,descriptor-types-mask = <0x3ab0ebf>; | 349 | fsl,descriptor-types-mask = <0x3ab0ebf>; |
350 | sleep = <&pmc 0x03000000>; | ||
288 | }; | 351 | }; |
289 | 352 | ||
290 | /* IPIC | 353 | /* IPIC |
@@ -300,6 +363,13 @@ | |||
300 | #interrupt-cells = <2>; | 363 | #interrupt-cells = <2>; |
301 | reg = <0x700 0x100>; | 364 | reg = <0x700 0x100>; |
302 | }; | 365 | }; |
366 | |||
367 | pmc: power@b00 { | ||
368 | compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc"; | ||
369 | reg = <0xb00 0x100 0xa00 0x100>; | ||
370 | interrupts = <80 0x8>; | ||
371 | interrupt-parent = <&ipic>; | ||
372 | }; | ||
303 | }; | 373 | }; |
304 | 374 | ||
305 | pci0: pci@e0008500 { | 375 | pci0: pci@e0008500 { |
@@ -325,6 +395,7 @@ | |||
325 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 | 395 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 |
326 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | 396 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
327 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; | 397 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; |
398 | sleep = <&pmc 0x00010000>; | ||
328 | clock-frequency = <66666666>; | 399 | clock-frequency = <66666666>; |
329 | #interrupt-cells = <1>; | 400 | #interrupt-cells = <1>; |
330 | #size-cells = <2>; | 401 | #size-cells = <2>; |
@@ -334,4 +405,68 @@ | |||
334 | compatible = "fsl,mpc8349-pci"; | 405 | compatible = "fsl,mpc8349-pci"; |
335 | device_type = "pci"; | 406 | device_type = "pci"; |
336 | }; | 407 | }; |
408 | |||
409 | pci1: pcie@e0009000 { | ||
410 | #address-cells = <3>; | ||
411 | #size-cells = <2>; | ||
412 | #interrupt-cells = <1>; | ||
413 | device_type = "pci"; | ||
414 | compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; | ||
415 | reg = <0xe0009000 0x00001000>; | ||
416 | ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 | ||
417 | 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; | ||
418 | bus-range = <0 255>; | ||
419 | interrupt-map-mask = <0xf800 0 0 7>; | ||
420 | interrupt-map = <0 0 0 1 &ipic 1 8 | ||
421 | 0 0 0 2 &ipic 1 8 | ||
422 | 0 0 0 3 &ipic 1 8 | ||
423 | 0 0 0 4 &ipic 1 8>; | ||
424 | sleep = <&pmc 0x00300000>; | ||
425 | clock-frequency = <0>; | ||
426 | |||
427 | pcie@0 { | ||
428 | #address-cells = <3>; | ||
429 | #size-cells = <2>; | ||
430 | device_type = "pci"; | ||
431 | reg = <0 0 0 0 0>; | ||
432 | ranges = <0x02000000 0 0xa8000000 | ||
433 | 0x02000000 0 0xa8000000 | ||
434 | 0 0x10000000 | ||
435 | 0x01000000 0 0x00000000 | ||
436 | 0x01000000 0 0x00000000 | ||
437 | 0 0x00800000>; | ||
438 | }; | ||
439 | }; | ||
440 | |||
441 | pci2: pcie@e000a000 { | ||
442 | #address-cells = <3>; | ||
443 | #size-cells = <2>; | ||
444 | #interrupt-cells = <1>; | ||
445 | device_type = "pci"; | ||
446 | compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; | ||
447 | reg = <0xe000a000 0x00001000>; | ||
448 | ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 | ||
449 | 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; | ||
450 | bus-range = <0 255>; | ||
451 | interrupt-map-mask = <0xf800 0 0 7>; | ||
452 | interrupt-map = <0 0 0 1 &ipic 2 8 | ||
453 | 0 0 0 2 &ipic 2 8 | ||
454 | 0 0 0 3 &ipic 2 8 | ||
455 | 0 0 0 4 &ipic 2 8>; | ||
456 | sleep = <&pmc 0x000c0000>; | ||
457 | clock-frequency = <0>; | ||
458 | |||
459 | pcie@0 { | ||
460 | #address-cells = <3>; | ||
461 | #size-cells = <2>; | ||
462 | device_type = "pci"; | ||
463 | reg = <0 0 0 0 0>; | ||
464 | ranges = <0x02000000 0 0xc8000000 | ||
465 | 0x02000000 0 0xc8000000 | ||
466 | 0 0x10000000 | ||
467 | 0x01000000 0 0x00000000 | ||
468 | 0x01000000 0 0x00000000 | ||
469 | 0 0x00800000>; | ||
470 | }; | ||
471 | }; | ||
337 | }; | 472 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts index acf06c438dbf..d6f208b8297a 100644 --- a/arch/powerpc/boot/dts/mpc8379_mds.dts +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts | |||
@@ -127,21 +127,38 @@ | |||
127 | reg = <0x200 0x100>; | 127 | reg = <0x200 0x100>; |
128 | }; | 128 | }; |
129 | 129 | ||
130 | i2c@3000 { | 130 | sleep-nexus { |
131 | #address-cells = <1>; | 131 | #address-cells = <1>; |
132 | #size-cells = <0>; | 132 | #size-cells = <1>; |
133 | cell-index = <0>; | 133 | compatible = "simple-bus"; |
134 | compatible = "fsl-i2c"; | 134 | sleep = <&pmc 0x0c000000>; |
135 | reg = <0x3000 0x100>; | 135 | ranges; |
136 | interrupts = <14 0x8>; | 136 | |
137 | interrupt-parent = <&ipic>; | 137 | i2c@3000 { |
138 | dfsrr; | 138 | #address-cells = <1>; |
139 | #size-cells = <0>; | ||
140 | cell-index = <0>; | ||
141 | compatible = "fsl-i2c"; | ||
142 | reg = <0x3000 0x100>; | ||
143 | interrupts = <14 0x8>; | ||
144 | interrupt-parent = <&ipic>; | ||
145 | dfsrr; | ||
146 | |||
147 | rtc@68 { | ||
148 | compatible = "dallas,ds1374"; | ||
149 | reg = <0x68>; | ||
150 | interrupts = <19 0x8>; | ||
151 | interrupt-parent = <&ipic>; | ||
152 | }; | ||
153 | }; | ||
139 | 154 | ||
140 | rtc@68 { | 155 | sdhci@2e000 { |
141 | compatible = "dallas,ds1374"; | 156 | compatible = "fsl,mpc8379-esdhc"; |
142 | reg = <0x68>; | 157 | reg = <0x2e000 0x1000>; |
143 | interrupts = <19 0x8>; | 158 | interrupts = <42 0x8>; |
144 | interrupt-parent = <&ipic>; | 159 | interrupt-parent = <&ipic>; |
160 | /* Filled in by U-Boot */ | ||
161 | clock-frequency = <0>; | ||
145 | }; | 162 | }; |
146 | }; | 163 | }; |
147 | 164 | ||
@@ -213,69 +230,83 @@ | |||
213 | interrupts = <38 0x8>; | 230 | interrupts = <38 0x8>; |
214 | dr_mode = "host"; | 231 | dr_mode = "host"; |
215 | phy_type = "ulpi"; | 232 | phy_type = "ulpi"; |
216 | }; | 233 | sleep = <&pmc 0x00c00000>; |
217 | |||
218 | mdio@24520 { | ||
219 | #address-cells = <1>; | ||
220 | #size-cells = <0>; | ||
221 | compatible = "fsl,gianfar-mdio"; | ||
222 | reg = <0x24520 0x20>; | ||
223 | phy2: ethernet-phy@2 { | ||
224 | interrupt-parent = <&ipic>; | ||
225 | interrupts = <17 0x8>; | ||
226 | reg = <0x2>; | ||
227 | device_type = "ethernet-phy"; | ||
228 | }; | ||
229 | phy3: ethernet-phy@3 { | ||
230 | interrupt-parent = <&ipic>; | ||
231 | interrupts = <18 0x8>; | ||
232 | reg = <0x3>; | ||
233 | device_type = "ethernet-phy"; | ||
234 | }; | ||
235 | tbi0: tbi-phy@11 { | ||
236 | reg = <0x11>; | ||
237 | device_type = "tbi-phy"; | ||
238 | }; | ||
239 | }; | ||
240 | |||
241 | mdio@25520 { | ||
242 | #address-cells = <1>; | ||
243 | #size-cells = <0>; | ||
244 | compatible = "fsl,gianfar-tbi"; | ||
245 | reg = <0x25520 0x20>; | ||
246 | |||
247 | tbi1: tbi-phy@11 { | ||
248 | reg = <0x11>; | ||
249 | device_type = "tbi-phy"; | ||
250 | }; | ||
251 | }; | 234 | }; |
252 | 235 | ||
253 | enet0: ethernet@24000 { | 236 | enet0: ethernet@24000 { |
237 | #address-cells = <1>; | ||
238 | #size-cells = <1>; | ||
254 | cell-index = <0>; | 239 | cell-index = <0>; |
255 | device_type = "network"; | 240 | device_type = "network"; |
256 | model = "eTSEC"; | 241 | model = "eTSEC"; |
257 | compatible = "gianfar"; | 242 | compatible = "gianfar"; |
258 | reg = <0x24000 0x1000>; | 243 | reg = <0x24000 0x1000>; |
244 | ranges = <0x0 0x24000 0x1000>; | ||
259 | local-mac-address = [ 00 00 00 00 00 00 ]; | 245 | local-mac-address = [ 00 00 00 00 00 00 ]; |
260 | interrupts = <32 0x8 33 0x8 34 0x8>; | 246 | interrupts = <32 0x8 33 0x8 34 0x8>; |
261 | phy-connection-type = "mii"; | 247 | phy-connection-type = "mii"; |
262 | interrupt-parent = <&ipic>; | 248 | interrupt-parent = <&ipic>; |
263 | tbi-handle = <&tbi0>; | 249 | tbi-handle = <&tbi0>; |
264 | phy-handle = <&phy2>; | 250 | phy-handle = <&phy2>; |
251 | sleep = <&pmc 0xc0000000>; | ||
252 | fsl,magic-packet; | ||
253 | |||
254 | mdio@520 { | ||
255 | #address-cells = <1>; | ||
256 | #size-cells = <0>; | ||
257 | compatible = "fsl,gianfar-mdio"; | ||
258 | reg = <0x520 0x20>; | ||
259 | |||
260 | phy2: ethernet-phy@2 { | ||
261 | interrupt-parent = <&ipic>; | ||
262 | interrupts = <17 0x8>; | ||
263 | reg = <0x2>; | ||
264 | device_type = "ethernet-phy"; | ||
265 | }; | ||
266 | |||
267 | phy3: ethernet-phy@3 { | ||
268 | interrupt-parent = <&ipic>; | ||
269 | interrupts = <18 0x8>; | ||
270 | reg = <0x3>; | ||
271 | device_type = "ethernet-phy"; | ||
272 | }; | ||
273 | |||
274 | tbi0: tbi-phy@11 { | ||
275 | reg = <0x11>; | ||
276 | device_type = "tbi-phy"; | ||
277 | }; | ||
278 | }; | ||
265 | }; | 279 | }; |
266 | 280 | ||
267 | enet1: ethernet@25000 { | 281 | enet1: ethernet@25000 { |
282 | #address-cells = <1>; | ||
283 | #size-cells = <1>; | ||
268 | cell-index = <1>; | 284 | cell-index = <1>; |
269 | device_type = "network"; | 285 | device_type = "network"; |
270 | model = "eTSEC"; | 286 | model = "eTSEC"; |
271 | compatible = "gianfar"; | 287 | compatible = "gianfar"; |
272 | reg = <0x25000 0x1000>; | 288 | reg = <0x25000 0x1000>; |
289 | ranges = <0x0 0x25000 0x1000>; | ||
273 | local-mac-address = [ 00 00 00 00 00 00 ]; | 290 | local-mac-address = [ 00 00 00 00 00 00 ]; |
274 | interrupts = <35 0x8 36 0x8 37 0x8>; | 291 | interrupts = <35 0x8 36 0x8 37 0x8>; |
275 | phy-connection-type = "mii"; | 292 | phy-connection-type = "mii"; |
276 | interrupt-parent = <&ipic>; | 293 | interrupt-parent = <&ipic>; |
277 | tbi-handle = <&tbi1>; | 294 | tbi-handle = <&tbi1>; |
278 | phy-handle = <&phy3>; | 295 | phy-handle = <&phy3>; |
296 | sleep = <&pmc 0x30000000>; | ||
297 | fsl,magic-packet; | ||
298 | |||
299 | mdio@520 { | ||
300 | #address-cells = <1>; | ||
301 | #size-cells = <0>; | ||
302 | compatible = "fsl,gianfar-tbi"; | ||
303 | reg = <0x520 0x20>; | ||
304 | |||
305 | tbi1: tbi-phy@11 { | ||
306 | reg = <0x11>; | ||
307 | device_type = "tbi-phy"; | ||
308 | }; | ||
309 | }; | ||
279 | }; | 310 | }; |
280 | 311 | ||
281 | serial0: serial@4500 { | 312 | serial0: serial@4500 { |
@@ -308,14 +339,7 @@ | |||
308 | fsl,channel-fifo-len = <24>; | 339 | fsl,channel-fifo-len = <24>; |
309 | fsl,exec-units-mask = <0x9fe>; | 340 | fsl,exec-units-mask = <0x9fe>; |
310 | fsl,descriptor-types-mask = <0x3ab0ebf>; | 341 | fsl,descriptor-types-mask = <0x3ab0ebf>; |
311 | }; | 342 | sleep = <&pmc 0x03000000>; |
312 | |||
313 | sdhc@2e000 { | ||
314 | model = "eSDHC"; | ||
315 | compatible = "fsl,esdhc"; | ||
316 | reg = <0x2e000 0x1000>; | ||
317 | interrupts = <42 0x8>; | ||
318 | interrupt-parent = <&ipic>; | ||
319 | }; | 343 | }; |
320 | 344 | ||
321 | sata@18000 { | 345 | sata@18000 { |
@@ -323,6 +347,7 @@ | |||
323 | reg = <0x18000 0x1000>; | 347 | reg = <0x18000 0x1000>; |
324 | interrupts = <44 0x8>; | 348 | interrupts = <44 0x8>; |
325 | interrupt-parent = <&ipic>; | 349 | interrupt-parent = <&ipic>; |
350 | sleep = <&pmc 0x000000c0>; | ||
326 | }; | 351 | }; |
327 | 352 | ||
328 | sata@19000 { | 353 | sata@19000 { |
@@ -330,6 +355,7 @@ | |||
330 | reg = <0x19000 0x1000>; | 355 | reg = <0x19000 0x1000>; |
331 | interrupts = <45 0x8>; | 356 | interrupts = <45 0x8>; |
332 | interrupt-parent = <&ipic>; | 357 | interrupt-parent = <&ipic>; |
358 | sleep = <&pmc 0x00000030>; | ||
333 | }; | 359 | }; |
334 | 360 | ||
335 | sata@1a000 { | 361 | sata@1a000 { |
@@ -337,6 +363,7 @@ | |||
337 | reg = <0x1a000 0x1000>; | 363 | reg = <0x1a000 0x1000>; |
338 | interrupts = <46 0x8>; | 364 | interrupts = <46 0x8>; |
339 | interrupt-parent = <&ipic>; | 365 | interrupt-parent = <&ipic>; |
366 | sleep = <&pmc 0x0000000c>; | ||
340 | }; | 367 | }; |
341 | 368 | ||
342 | sata@1b000 { | 369 | sata@1b000 { |
@@ -344,6 +371,7 @@ | |||
344 | reg = <0x1b000 0x1000>; | 371 | reg = <0x1b000 0x1000>; |
345 | interrupts = <47 0x8>; | 372 | interrupts = <47 0x8>; |
346 | interrupt-parent = <&ipic>; | 373 | interrupt-parent = <&ipic>; |
374 | sleep = <&pmc 0x00000003>; | ||
347 | }; | 375 | }; |
348 | 376 | ||
349 | /* IPIC | 377 | /* IPIC |
@@ -359,6 +387,13 @@ | |||
359 | #interrupt-cells = <2>; | 387 | #interrupt-cells = <2>; |
360 | reg = <0x700 0x100>; | 388 | reg = <0x700 0x100>; |
361 | }; | 389 | }; |
390 | |||
391 | pmc: power@b00 { | ||
392 | compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc"; | ||
393 | reg = <0xb00 0x100 0xa00 0x100>; | ||
394 | interrupts = <80 0x8>; | ||
395 | interrupt-parent = <&ipic>; | ||
396 | }; | ||
362 | }; | 397 | }; |
363 | 398 | ||
364 | pci0: pci@e0008500 { | 399 | pci0: pci@e0008500 { |
@@ -413,6 +448,7 @@ | |||
413 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 | 448 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 |
414 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | 449 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
415 | 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; | 450 | 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; |
451 | sleep = <&pmc 0x00010000>; | ||
416 | clock-frequency = <0>; | 452 | clock-frequency = <0>; |
417 | #interrupt-cells = <1>; | 453 | #interrupt-cells = <1>; |
418 | #size-cells = <2>; | 454 | #size-cells = <2>; |
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 72cdc3c4c7e3..98ae95bd18f4 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts | |||
@@ -107,26 +107,72 @@ | |||
107 | reg = <0x200 0x100>; | 107 | reg = <0x200 0x100>; |
108 | }; | 108 | }; |
109 | 109 | ||
110 | i2c@3000 { | 110 | gpio1: gpio-controller@c00 { |
111 | #address-cells = <1>; | 111 | #gpio-cells = <2>; |
112 | #size-cells = <0>; | 112 | compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; |
113 | cell-index = <0>; | 113 | reg = <0xc00 0x100>; |
114 | compatible = "fsl-i2c"; | 114 | interrupts = <74 0x8>; |
115 | reg = <0x3000 0x100>; | ||
116 | interrupts = <14 0x8>; | ||
117 | interrupt-parent = <&ipic>; | 115 | interrupt-parent = <&ipic>; |
118 | dfsrr; | 116 | gpio-controller; |
119 | rtc@68 { | 117 | }; |
120 | compatible = "dallas,ds1339"; | 118 | |
121 | reg = <0x68>; | 119 | gpio2: gpio-controller@d00 { |
120 | #gpio-cells = <2>; | ||
121 | compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; | ||
122 | reg = <0xd00 0x100>; | ||
123 | interrupts = <75 0x8>; | ||
124 | interrupt-parent = <&ipic>; | ||
125 | gpio-controller; | ||
126 | }; | ||
127 | |||
128 | sleep-nexus { | ||
129 | #address-cells = <1>; | ||
130 | #size-cells = <1>; | ||
131 | compatible = "simple-bus"; | ||
132 | sleep = <&pmc 0x0c000000>; | ||
133 | ranges; | ||
134 | |||
135 | i2c@3000 { | ||
136 | #address-cells = <1>; | ||
137 | #size-cells = <0>; | ||
138 | cell-index = <0>; | ||
139 | compatible = "fsl-i2c"; | ||
140 | reg = <0x3000 0x100>; | ||
141 | interrupts = <14 0x8>; | ||
142 | interrupt-parent = <&ipic>; | ||
143 | dfsrr; | ||
144 | |||
145 | dtt@48 { | ||
146 | compatible = "national,lm75"; | ||
147 | reg = <0x48>; | ||
148 | }; | ||
149 | |||
150 | at24@50 { | ||
151 | compatible = "at24,24c256"; | ||
152 | reg = <0x50>; | ||
153 | }; | ||
154 | |||
155 | rtc@68 { | ||
156 | compatible = "dallas,ds1339"; | ||
157 | reg = <0x68>; | ||
158 | }; | ||
159 | |||
160 | mcu_pio: mcu@a { | ||
161 | #gpio-cells = <2>; | ||
162 | compatible = "fsl,mc9s08qg8-mpc8379erdb", | ||
163 | "fsl,mcu-mpc8349emitx"; | ||
164 | reg = <0x0a>; | ||
165 | gpio-controller; | ||
166 | }; | ||
122 | }; | 167 | }; |
123 | 168 | ||
124 | mcu_pio: mcu@a { | 169 | sdhci@2e000 { |
125 | #gpio-cells = <2>; | 170 | compatible = "fsl,mpc8379-esdhc"; |
126 | compatible = "fsl,mc9s08qg8-mpc8379erdb", | 171 | reg = <0x2e000 0x1000>; |
127 | "fsl,mcu-mpc8349emitx"; | 172 | interrupts = <42 0x8>; |
128 | reg = <0x0a>; | 173 | interrupt-parent = <&ipic>; |
129 | gpio-controller; | 174 | /* Filled in by U-Boot */ |
175 | clock-frequency = <0>; | ||
130 | }; | 176 | }; |
131 | }; | 177 | }; |
132 | 178 | ||
@@ -197,63 +243,76 @@ | |||
197 | interrupt-parent = <&ipic>; | 243 | interrupt-parent = <&ipic>; |
198 | interrupts = <38 0x8>; | 244 | interrupts = <38 0x8>; |
199 | phy_type = "ulpi"; | 245 | phy_type = "ulpi"; |
200 | }; | 246 | sleep = <&pmc 0x00c00000>; |
201 | |||
202 | mdio@24520 { | ||
203 | #address-cells = <1>; | ||
204 | #size-cells = <0>; | ||
205 | compatible = "fsl,gianfar-mdio"; | ||
206 | reg = <0x24520 0x20>; | ||
207 | phy2: ethernet-phy@2 { | ||
208 | interrupt-parent = <&ipic>; | ||
209 | interrupts = <17 0x8>; | ||
210 | reg = <0x2>; | ||
211 | device_type = "ethernet-phy"; | ||
212 | }; | ||
213 | tbi0: tbi-phy@11 { | ||
214 | reg = <0x11>; | ||
215 | device_type = "tbi-phy"; | ||
216 | }; | ||
217 | }; | ||
218 | |||
219 | mdio@25520 { | ||
220 | #address-cells = <1>; | ||
221 | #size-cells = <0>; | ||
222 | compatible = "fsl,gianfar-tbi"; | ||
223 | reg = <0x25520 0x20>; | ||
224 | |||
225 | tbi1: tbi-phy@11 { | ||
226 | reg = <0x11>; | ||
227 | device_type = "tbi-phy"; | ||
228 | }; | ||
229 | }; | 247 | }; |
230 | 248 | ||
231 | enet0: ethernet@24000 { | 249 | enet0: ethernet@24000 { |
250 | #address-cells = <1>; | ||
251 | #size-cells = <1>; | ||
232 | cell-index = <0>; | 252 | cell-index = <0>; |
233 | device_type = "network"; | 253 | device_type = "network"; |
234 | model = "eTSEC"; | 254 | model = "eTSEC"; |
235 | compatible = "gianfar"; | 255 | compatible = "gianfar"; |
236 | reg = <0x24000 0x1000>; | 256 | reg = <0x24000 0x1000>; |
257 | ranges = <0x0 0x24000 0x1000>; | ||
237 | local-mac-address = [ 00 00 00 00 00 00 ]; | 258 | local-mac-address = [ 00 00 00 00 00 00 ]; |
238 | interrupts = <32 0x8 33 0x8 34 0x8>; | 259 | interrupts = <32 0x8 33 0x8 34 0x8>; |
239 | phy-connection-type = "mii"; | 260 | phy-connection-type = "mii"; |
240 | interrupt-parent = <&ipic>; | 261 | interrupt-parent = <&ipic>; |
241 | tbi-handle = <&tbi0>; | 262 | tbi-handle = <&tbi0>; |
242 | phy-handle = <&phy2>; | 263 | phy-handle = <&phy2>; |
264 | sleep = <&pmc 0xc0000000>; | ||
265 | fsl,magic-packet; | ||
266 | |||
267 | mdio@520 { | ||
268 | #address-cells = <1>; | ||
269 | #size-cells = <0>; | ||
270 | compatible = "fsl,gianfar-mdio"; | ||
271 | reg = <0x520 0x20>; | ||
272 | |||
273 | phy2: ethernet-phy@2 { | ||
274 | interrupt-parent = <&ipic>; | ||
275 | interrupts = <17 0x8>; | ||
276 | reg = <0x2>; | ||
277 | device_type = "ethernet-phy"; | ||
278 | }; | ||
279 | |||
280 | tbi0: tbi-phy@11 { | ||
281 | reg = <0x11>; | ||
282 | device_type = "tbi-phy"; | ||
283 | }; | ||
284 | }; | ||
243 | }; | 285 | }; |
244 | 286 | ||
245 | enet1: ethernet@25000 { | 287 | enet1: ethernet@25000 { |
288 | #address-cells = <1>; | ||
289 | #size-cells = <1>; | ||
246 | cell-index = <1>; | 290 | cell-index = <1>; |
247 | device_type = "network"; | 291 | device_type = "network"; |
248 | model = "eTSEC"; | 292 | model = "eTSEC"; |
249 | compatible = "gianfar"; | 293 | compatible = "gianfar"; |
250 | reg = <0x25000 0x1000>; | 294 | reg = <0x25000 0x1000>; |
295 | ranges = <0x0 0x25000 0x1000>; | ||
251 | local-mac-address = [ 00 00 00 00 00 00 ]; | 296 | local-mac-address = [ 00 00 00 00 00 00 ]; |
252 | interrupts = <35 0x8 36 0x8 37 0x8>; | 297 | interrupts = <35 0x8 36 0x8 37 0x8>; |
253 | phy-connection-type = "mii"; | 298 | phy-connection-type = "mii"; |
254 | interrupt-parent = <&ipic>; | 299 | interrupt-parent = <&ipic>; |
255 | fixed-link = <1 1 1000 0 0>; | 300 | fixed-link = <1 1 1000 0 0>; |
256 | tbi-handle = <&tbi1>; | 301 | tbi-handle = <&tbi1>; |
302 | sleep = <&pmc 0x30000000>; | ||
303 | fsl,magic-packet; | ||
304 | |||
305 | mdio@520 { | ||
306 | #address-cells = <1>; | ||
307 | #size-cells = <0>; | ||
308 | compatible = "fsl,gianfar-tbi"; | ||
309 | reg = <0x520 0x20>; | ||
310 | |||
311 | tbi1: tbi-phy@11 { | ||
312 | reg = <0x11>; | ||
313 | device_type = "tbi-phy"; | ||
314 | }; | ||
315 | }; | ||
257 | }; | 316 | }; |
258 | 317 | ||
259 | serial0: serial@4500 { | 318 | serial0: serial@4500 { |
@@ -286,6 +345,7 @@ | |||
286 | fsl,channel-fifo-len = <24>; | 345 | fsl,channel-fifo-len = <24>; |
287 | fsl,exec-units-mask = <0x9fe>; | 346 | fsl,exec-units-mask = <0x9fe>; |
288 | fsl,descriptor-types-mask = <0x3ab0ebf>; | 347 | fsl,descriptor-types-mask = <0x3ab0ebf>; |
348 | sleep = <&pmc 0x03000000>; | ||
289 | }; | 349 | }; |
290 | 350 | ||
291 | sata@18000 { | 351 | sata@18000 { |
@@ -293,6 +353,7 @@ | |||
293 | reg = <0x18000 0x1000>; | 353 | reg = <0x18000 0x1000>; |
294 | interrupts = <44 0x8>; | 354 | interrupts = <44 0x8>; |
295 | interrupt-parent = <&ipic>; | 355 | interrupt-parent = <&ipic>; |
356 | sleep = <&pmc 0x000000c0>; | ||
296 | }; | 357 | }; |
297 | 358 | ||
298 | sata@19000 { | 359 | sata@19000 { |
@@ -300,6 +361,7 @@ | |||
300 | reg = <0x19000 0x1000>; | 361 | reg = <0x19000 0x1000>; |
301 | interrupts = <45 0x8>; | 362 | interrupts = <45 0x8>; |
302 | interrupt-parent = <&ipic>; | 363 | interrupt-parent = <&ipic>; |
364 | sleep = <&pmc 0x00000030>; | ||
303 | }; | 365 | }; |
304 | 366 | ||
305 | sata@1a000 { | 367 | sata@1a000 { |
@@ -307,6 +369,7 @@ | |||
307 | reg = <0x1a000 0x1000>; | 369 | reg = <0x1a000 0x1000>; |
308 | interrupts = <46 0x8>; | 370 | interrupts = <46 0x8>; |
309 | interrupt-parent = <&ipic>; | 371 | interrupt-parent = <&ipic>; |
372 | sleep = <&pmc 0x0000000c>; | ||
310 | }; | 373 | }; |
311 | 374 | ||
312 | sata@1b000 { | 375 | sata@1b000 { |
@@ -314,6 +377,7 @@ | |||
314 | reg = <0x1b000 0x1000>; | 377 | reg = <0x1b000 0x1000>; |
315 | interrupts = <47 0x8>; | 378 | interrupts = <47 0x8>; |
316 | interrupt-parent = <&ipic>; | 379 | interrupt-parent = <&ipic>; |
380 | sleep = <&pmc 0x00000003>; | ||
317 | }; | 381 | }; |
318 | 382 | ||
319 | /* IPIC | 383 | /* IPIC |
@@ -329,6 +393,13 @@ | |||
329 | #interrupt-cells = <2>; | 393 | #interrupt-cells = <2>; |
330 | reg = <0x700 0x100>; | 394 | reg = <0x700 0x100>; |
331 | }; | 395 | }; |
396 | |||
397 | pmc: power@b00 { | ||
398 | compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc"; | ||
399 | reg = <0xb00 0x100 0xa00 0x100>; | ||
400 | interrupts = <80 0x8>; | ||
401 | interrupt-parent = <&ipic>; | ||
402 | }; | ||
332 | }; | 403 | }; |
333 | 404 | ||
334 | pci0: pci@e0008500 { | 405 | pci0: pci@e0008500 { |
@@ -354,6 +425,7 @@ | |||
354 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 | 425 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 |
355 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | 426 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
356 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; | 427 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; |
428 | sleep = <&pmc 0x00010000>; | ||
357 | clock-frequency = <66666666>; | 429 | clock-frequency = <66666666>; |
358 | #interrupt-cells = <1>; | 430 | #interrupt-cells = <1>; |
359 | #size-cells = <2>; | 431 | #size-cells = <2>; |
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts index 3c905df1812c..b31c5041350b 100644 --- a/arch/powerpc/boot/dts/mpc8536ds.dts +++ b/arch/powerpc/boot/dts/mpc8536ds.dts | |||
@@ -137,42 +137,6 @@ | |||
137 | }; | 137 | }; |
138 | }; | 138 | }; |
139 | 139 | ||
140 | mdio@24520 { | ||
141 | #address-cells = <1>; | ||
142 | #size-cells = <0>; | ||
143 | compatible = "fsl,gianfar-mdio"; | ||
144 | reg = <0x24520 0x20>; | ||
145 | |||
146 | phy0: ethernet-phy@0 { | ||
147 | interrupt-parent = <&mpic>; | ||
148 | interrupts = <10 0x1>; | ||
149 | reg = <0>; | ||
150 | device_type = "ethernet-phy"; | ||
151 | }; | ||
152 | phy1: ethernet-phy@1 { | ||
153 | interrupt-parent = <&mpic>; | ||
154 | interrupts = <10 0x1>; | ||
155 | reg = <1>; | ||
156 | device_type = "ethernet-phy"; | ||
157 | }; | ||
158 | tbi0: tbi-phy@11 { | ||
159 | reg = <0x11>; | ||
160 | device_type = "tbi-phy"; | ||
161 | }; | ||
162 | }; | ||
163 | |||
164 | mdio@26520 { | ||
165 | #address-cells = <1>; | ||
166 | #size-cells = <0>; | ||
167 | compatible = "fsl,gianfar-tbi"; | ||
168 | reg = <0x26520 0x20>; | ||
169 | |||
170 | tbi1: tbi-phy@11 { | ||
171 | reg = <0x11>; | ||
172 | device_type = "tbi-phy"; | ||
173 | }; | ||
174 | }; | ||
175 | |||
176 | usb@22000 { | 140 | usb@22000 { |
177 | compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph"; | 141 | compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph"; |
178 | reg = <0x22000 0x1000>; | 142 | reg = <0x22000 0x1000>; |
@@ -194,31 +158,73 @@ | |||
194 | }; | 158 | }; |
195 | 159 | ||
196 | enet0: ethernet@24000 { | 160 | enet0: ethernet@24000 { |
161 | #address-cells = <1>; | ||
162 | #size-cells = <1>; | ||
197 | cell-index = <0>; | 163 | cell-index = <0>; |
198 | device_type = "network"; | 164 | device_type = "network"; |
199 | model = "eTSEC"; | 165 | model = "eTSEC"; |
200 | compatible = "gianfar"; | 166 | compatible = "gianfar"; |
201 | reg = <0x24000 0x1000>; | 167 | reg = <0x24000 0x1000>; |
168 | ranges = <0x0 0x24000 0x1000>; | ||
202 | local-mac-address = [ 00 00 00 00 00 00 ]; | 169 | local-mac-address = [ 00 00 00 00 00 00 ]; |
203 | interrupts = <29 2 30 2 34 2>; | 170 | interrupts = <29 2 30 2 34 2>; |
204 | interrupt-parent = <&mpic>; | 171 | interrupt-parent = <&mpic>; |
205 | tbi-handle = <&tbi0>; | 172 | tbi-handle = <&tbi0>; |
206 | phy-handle = <&phy1>; | 173 | phy-handle = <&phy1>; |
207 | phy-connection-type = "rgmii-id"; | 174 | phy-connection-type = "rgmii-id"; |
175 | |||
176 | mdio@520 { | ||
177 | #address-cells = <1>; | ||
178 | #size-cells = <0>; | ||
179 | compatible = "fsl,gianfar-mdio"; | ||
180 | reg = <0x520 0x20>; | ||
181 | |||
182 | phy0: ethernet-phy@0 { | ||
183 | interrupt-parent = <&mpic>; | ||
184 | interrupts = <10 0x1>; | ||
185 | reg = <0>; | ||
186 | device_type = "ethernet-phy"; | ||
187 | }; | ||
188 | phy1: ethernet-phy@1 { | ||
189 | interrupt-parent = <&mpic>; | ||
190 | interrupts = <10 0x1>; | ||
191 | reg = <1>; | ||
192 | device_type = "ethernet-phy"; | ||
193 | }; | ||
194 | tbi0: tbi-phy@11 { | ||
195 | reg = <0x11>; | ||
196 | device_type = "tbi-phy"; | ||
197 | }; | ||
198 | }; | ||
208 | }; | 199 | }; |
209 | 200 | ||
210 | enet1: ethernet@26000 { | 201 | enet1: ethernet@26000 { |
202 | #address-cells = <1>; | ||
203 | #size-cells = <1>; | ||
211 | cell-index = <1>; | 204 | cell-index = <1>; |
212 | device_type = "network"; | 205 | device_type = "network"; |
213 | model = "eTSEC"; | 206 | model = "eTSEC"; |
214 | compatible = "gianfar"; | 207 | compatible = "gianfar"; |
215 | reg = <0x26000 0x1000>; | 208 | reg = <0x26000 0x1000>; |
209 | ranges = <0x0 0x26000 0x1000>; | ||
216 | local-mac-address = [ 00 00 00 00 00 00 ]; | 210 | local-mac-address = [ 00 00 00 00 00 00 ]; |
217 | interrupts = <31 2 32 2 33 2>; | 211 | interrupts = <31 2 32 2 33 2>; |
218 | interrupt-parent = <&mpic>; | 212 | interrupt-parent = <&mpic>; |
219 | tbi-handle = <&tbi1>; | 213 | tbi-handle = <&tbi1>; |
220 | phy-handle = <&phy0>; | 214 | phy-handle = <&phy0>; |
221 | phy-connection-type = "rgmii-id"; | 215 | phy-connection-type = "rgmii-id"; |
216 | |||
217 | mdio@520 { | ||
218 | #address-cells = <1>; | ||
219 | #size-cells = <0>; | ||
220 | compatible = "fsl,gianfar-tbi"; | ||
221 | reg = <0x520 0x20>; | ||
222 | |||
223 | tbi1: tbi-phy@11 { | ||
224 | reg = <0x11>; | ||
225 | device_type = "tbi-phy"; | ||
226 | }; | ||
227 | }; | ||
222 | }; | 228 | }; |
223 | 229 | ||
224 | usb@2b000 { | 230 | usb@2b000 { |
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index 79570ffe41b9..ddd67be10b03 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts | |||
@@ -126,97 +126,106 @@ | |||
126 | }; | 126 | }; |
127 | }; | 127 | }; |
128 | 128 | ||
129 | mdio@24520 { | ||
130 | #address-cells = <1>; | ||
131 | #size-cells = <0>; | ||
132 | compatible = "fsl,gianfar-mdio"; | ||
133 | reg = <0x24520 0x20>; | ||
134 | |||
135 | phy0: ethernet-phy@0 { | ||
136 | interrupt-parent = <&mpic>; | ||
137 | interrupts = <5 1>; | ||
138 | reg = <0x0>; | ||
139 | device_type = "ethernet-phy"; | ||
140 | }; | ||
141 | phy1: ethernet-phy@1 { | ||
142 | interrupt-parent = <&mpic>; | ||
143 | interrupts = <5 1>; | ||
144 | reg = <0x1>; | ||
145 | device_type = "ethernet-phy"; | ||
146 | }; | ||
147 | phy3: ethernet-phy@3 { | ||
148 | interrupt-parent = <&mpic>; | ||
149 | interrupts = <7 1>; | ||
150 | reg = <0x3>; | ||
151 | device_type = "ethernet-phy"; | ||
152 | }; | ||
153 | tbi0: tbi-phy@11 { | ||
154 | reg = <0x11>; | ||
155 | device_type = "tbi-phy"; | ||
156 | }; | ||
157 | }; | ||
158 | |||
159 | mdio@25520 { | ||
160 | #address-cells = <1>; | ||
161 | #size-cells = <0>; | ||
162 | compatible = "fsl,gianfar-tbi"; | ||
163 | reg = <0x25520 0x20>; | ||
164 | |||
165 | tbi1: tbi-phy@11 { | ||
166 | reg = <0x11>; | ||
167 | device_type = "tbi-phy"; | ||
168 | }; | ||
169 | }; | ||
170 | |||
171 | mdio@26520 { | ||
172 | #address-cells = <1>; | ||
173 | #size-cells = <0>; | ||
174 | compatible = "fsl,gianfar-tbi"; | ||
175 | reg = <0x26520 0x20>; | ||
176 | |||
177 | tbi2: tbi-phy@11 { | ||
178 | reg = <0x11>; | ||
179 | device_type = "tbi-phy"; | ||
180 | }; | ||
181 | }; | ||
182 | |||
183 | enet0: ethernet@24000 { | 129 | enet0: ethernet@24000 { |
130 | #address-cells = <1>; | ||
131 | #size-cells = <1>; | ||
184 | cell-index = <0>; | 132 | cell-index = <0>; |
185 | device_type = "network"; | 133 | device_type = "network"; |
186 | model = "TSEC"; | 134 | model = "TSEC"; |
187 | compatible = "gianfar"; | 135 | compatible = "gianfar"; |
188 | reg = <0x24000 0x1000>; | 136 | reg = <0x24000 0x1000>; |
137 | ranges = <0x0 0x24000 0x1000>; | ||
189 | local-mac-address = [ 00 00 00 00 00 00 ]; | 138 | local-mac-address = [ 00 00 00 00 00 00 ]; |
190 | interrupts = <29 2 30 2 34 2>; | 139 | interrupts = <29 2 30 2 34 2>; |
191 | interrupt-parent = <&mpic>; | 140 | interrupt-parent = <&mpic>; |
192 | tbi-handle = <&tbi0>; | 141 | tbi-handle = <&tbi0>; |
193 | phy-handle = <&phy0>; | 142 | phy-handle = <&phy0>; |
143 | |||
144 | mdio@520 { | ||
145 | #address-cells = <1>; | ||
146 | #size-cells = <0>; | ||
147 | compatible = "fsl,gianfar-mdio"; | ||
148 | reg = <0x520 0x20>; | ||
149 | |||
150 | phy0: ethernet-phy@0 { | ||
151 | interrupt-parent = <&mpic>; | ||
152 | interrupts = <5 1>; | ||
153 | reg = <0x0>; | ||
154 | device_type = "ethernet-phy"; | ||
155 | }; | ||
156 | phy1: ethernet-phy@1 { | ||
157 | interrupt-parent = <&mpic>; | ||
158 | interrupts = <5 1>; | ||
159 | reg = <0x1>; | ||
160 | device_type = "ethernet-phy"; | ||
161 | }; | ||
162 | phy3: ethernet-phy@3 { | ||
163 | interrupt-parent = <&mpic>; | ||
164 | interrupts = <7 1>; | ||
165 | reg = <0x3>; | ||
166 | device_type = "ethernet-phy"; | ||
167 | }; | ||
168 | tbi0: tbi-phy@11 { | ||
169 | reg = <0x11>; | ||
170 | device_type = "tbi-phy"; | ||
171 | }; | ||
172 | }; | ||
194 | }; | 173 | }; |
195 | 174 | ||
196 | enet1: ethernet@25000 { | 175 | enet1: ethernet@25000 { |
176 | #address-cells = <1>; | ||
177 | #size-cells = <1>; | ||
197 | cell-index = <1>; | 178 | cell-index = <1>; |
198 | device_type = "network"; | 179 | device_type = "network"; |
199 | model = "TSEC"; | 180 | model = "TSEC"; |
200 | compatible = "gianfar"; | 181 | compatible = "gianfar"; |
201 | reg = <0x25000 0x1000>; | 182 | reg = <0x25000 0x1000>; |
183 | ranges = <0x0 0x25000 0x1000>; | ||
202 | local-mac-address = [ 00 00 00 00 00 00 ]; | 184 | local-mac-address = [ 00 00 00 00 00 00 ]; |
203 | interrupts = <35 2 36 2 40 2>; | 185 | interrupts = <35 2 36 2 40 2>; |
204 | interrupt-parent = <&mpic>; | 186 | interrupt-parent = <&mpic>; |
205 | tbi-handle = <&tbi1>; | 187 | tbi-handle = <&tbi1>; |
206 | phy-handle = <&phy1>; | 188 | phy-handle = <&phy1>; |
189 | |||
190 | mdio@520 { | ||
191 | #address-cells = <1>; | ||
192 | #size-cells = <0>; | ||
193 | compatible = "fsl,gianfar-tbi"; | ||
194 | reg = <0x520 0x20>; | ||
195 | |||
196 | tbi1: tbi-phy@11 { | ||
197 | reg = <0x11>; | ||
198 | device_type = "tbi-phy"; | ||
199 | }; | ||
200 | }; | ||
207 | }; | 201 | }; |
208 | 202 | ||
209 | enet2: ethernet@26000 { | 203 | enet2: ethernet@26000 { |
204 | #address-cells = <1>; | ||
205 | #size-cells = <1>; | ||
210 | cell-index = <2>; | 206 | cell-index = <2>; |
211 | device_type = "network"; | 207 | device_type = "network"; |
212 | model = "FEC"; | 208 | model = "FEC"; |
213 | compatible = "gianfar"; | 209 | compatible = "gianfar"; |
214 | reg = <0x26000 0x1000>; | 210 | reg = <0x26000 0x1000>; |
211 | ranges = <0x0 0x26000 0x1000>; | ||
215 | local-mac-address = [ 00 00 00 00 00 00 ]; | 212 | local-mac-address = [ 00 00 00 00 00 00 ]; |
216 | interrupts = <41 2>; | 213 | interrupts = <41 2>; |
217 | interrupt-parent = <&mpic>; | 214 | interrupt-parent = <&mpic>; |
218 | tbi-handle = <&tbi2>; | 215 | tbi-handle = <&tbi2>; |
219 | phy-handle = <&phy3>; | 216 | phy-handle = <&phy3>; |
217 | |||
218 | mdio@520 { | ||
219 | #address-cells = <1>; | ||
220 | #size-cells = <0>; | ||
221 | compatible = "fsl,gianfar-tbi"; | ||
222 | reg = <0x520 0x20>; | ||
223 | |||
224 | tbi2: tbi-phy@11 { | ||
225 | reg = <0x11>; | ||
226 | device_type = "tbi-phy"; | ||
227 | }; | ||
228 | }; | ||
220 | }; | 229 | }; |
221 | 230 | ||
222 | serial0: serial@4500 { | 231 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts index 221036a8ce23..e45097f44fbd 100644 --- a/arch/powerpc/boot/dts/mpc8541cds.dts +++ b/arch/powerpc/boot/dts/mpc8541cds.dts | |||
@@ -126,66 +126,72 @@ | |||
126 | }; | 126 | }; |
127 | }; | 127 | }; |
128 | 128 | ||
129 | mdio@24520 { | ||
130 | #address-cells = <1>; | ||
131 | #size-cells = <0>; | ||
132 | compatible = "fsl,gianfar-mdio"; | ||
133 | reg = <0x24520 0x20>; | ||
134 | |||
135 | phy0: ethernet-phy@0 { | ||
136 | interrupt-parent = <&mpic>; | ||
137 | interrupts = <5 1>; | ||
138 | reg = <0x0>; | ||
139 | device_type = "ethernet-phy"; | ||
140 | }; | ||
141 | phy1: ethernet-phy@1 { | ||
142 | interrupt-parent = <&mpic>; | ||
143 | interrupts = <5 1>; | ||
144 | reg = <0x1>; | ||
145 | device_type = "ethernet-phy"; | ||
146 | }; | ||
147 | tbi0: tbi-phy@11 { | ||
148 | reg = <0x11>; | ||
149 | device_type = "tbi-phy"; | ||
150 | }; | ||
151 | }; | ||
152 | |||
153 | mdio@25520 { | ||
154 | #address-cells = <1>; | ||
155 | #size-cells = <0>; | ||
156 | compatible = "fsl,gianfar-tbi"; | ||
157 | reg = <0x25520 0x20>; | ||
158 | |||
159 | tbi1: tbi-phy@11 { | ||
160 | reg = <0x11>; | ||
161 | device_type = "tbi-phy"; | ||
162 | }; | ||
163 | }; | ||
164 | |||
165 | enet0: ethernet@24000 { | 129 | enet0: ethernet@24000 { |
130 | #address-cells = <1>; | ||
131 | #size-cells = <1>; | ||
166 | cell-index = <0>; | 132 | cell-index = <0>; |
167 | device_type = "network"; | 133 | device_type = "network"; |
168 | model = "TSEC"; | 134 | model = "TSEC"; |
169 | compatible = "gianfar"; | 135 | compatible = "gianfar"; |
170 | reg = <0x24000 0x1000>; | 136 | reg = <0x24000 0x1000>; |
137 | ranges = <0x0 0x24000 0x1000>; | ||
171 | local-mac-address = [ 00 00 00 00 00 00 ]; | 138 | local-mac-address = [ 00 00 00 00 00 00 ]; |
172 | interrupts = <29 2 30 2 34 2>; | 139 | interrupts = <29 2 30 2 34 2>; |
173 | interrupt-parent = <&mpic>; | 140 | interrupt-parent = <&mpic>; |
174 | tbi-handle = <&tbi0>; | 141 | tbi-handle = <&tbi0>; |
175 | phy-handle = <&phy0>; | 142 | phy-handle = <&phy0>; |
143 | |||
144 | mdio@520 { | ||
145 | #address-cells = <1>; | ||
146 | #size-cells = <0>; | ||
147 | compatible = "fsl,gianfar-mdio"; | ||
148 | reg = <0x520 0x20>; | ||
149 | |||
150 | phy0: ethernet-phy@0 { | ||
151 | interrupt-parent = <&mpic>; | ||
152 | interrupts = <5 1>; | ||
153 | reg = <0x0>; | ||
154 | device_type = "ethernet-phy"; | ||
155 | }; | ||
156 | phy1: ethernet-phy@1 { | ||
157 | interrupt-parent = <&mpic>; | ||
158 | interrupts = <5 1>; | ||
159 | reg = <0x1>; | ||
160 | device_type = "ethernet-phy"; | ||
161 | }; | ||
162 | tbi0: tbi-phy@11 { | ||
163 | reg = <0x11>; | ||
164 | device_type = "tbi-phy"; | ||
165 | }; | ||
166 | }; | ||
176 | }; | 167 | }; |
177 | 168 | ||
178 | enet1: ethernet@25000 { | 169 | enet1: ethernet@25000 { |
170 | #address-cells = <1>; | ||
171 | #size-cells = <1>; | ||
179 | cell-index = <1>; | 172 | cell-index = <1>; |
180 | device_type = "network"; | 173 | device_type = "network"; |
181 | model = "TSEC"; | 174 | model = "TSEC"; |
182 | compatible = "gianfar"; | 175 | compatible = "gianfar"; |
183 | reg = <0x25000 0x1000>; | 176 | reg = <0x25000 0x1000>; |
177 | ranges = <0x0 0x25000 0x1000>; | ||
184 | local-mac-address = [ 00 00 00 00 00 00 ]; | 178 | local-mac-address = [ 00 00 00 00 00 00 ]; |
185 | interrupts = <35 2 36 2 40 2>; | 179 | interrupts = <35 2 36 2 40 2>; |
186 | interrupt-parent = <&mpic>; | 180 | interrupt-parent = <&mpic>; |
187 | tbi-handle = <&tbi1>; | 181 | tbi-handle = <&tbi1>; |
188 | phy-handle = <&phy1>; | 182 | phy-handle = <&phy1>; |
183 | |||
184 | mdio@520 { | ||
185 | #address-cells = <1>; | ||
186 | #size-cells = <0>; | ||
187 | compatible = "fsl,gianfar-tbi"; | ||
188 | reg = <0x520 0x20>; | ||
189 | |||
190 | tbi1: tbi-phy@11 { | ||
191 | reg = <0x11>; | ||
192 | device_type = "tbi-phy"; | ||
193 | }; | ||
194 | }; | ||
189 | }; | 195 | }; |
190 | 196 | ||
191 | serial0: serial@4500 { | 197 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 0668d1048779..7c6932be0197 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts | |||
@@ -98,44 +98,6 @@ | |||
98 | dfsrr; | 98 | dfsrr; |
99 | }; | 99 | }; |
100 | 100 | ||
101 | mdio@24520 { | ||
102 | #address-cells = <1>; | ||
103 | #size-cells = <0>; | ||
104 | compatible = "fsl,gianfar-mdio"; | ||
105 | reg = <0x24520 0x20>; | ||
106 | |||
107 | phy0: ethernet-phy@0 { | ||
108 | interrupt-parent = <&mpic>; | ||
109 | interrupts = <10 1>; | ||
110 | reg = <0x0>; | ||
111 | device_type = "ethernet-phy"; | ||
112 | }; | ||
113 | phy1: ethernet-phy@1 { | ||
114 | interrupt-parent = <&mpic>; | ||
115 | interrupts = <10 1>; | ||
116 | reg = <0x1>; | ||
117 | device_type = "ethernet-phy"; | ||
118 | }; | ||
119 | |||
120 | tbi0: tbi-phy@11 { | ||
121 | reg = <0x11>; | ||
122 | device_type = "tbi-phy"; | ||
123 | }; | ||
124 | }; | ||
125 | |||
126 | mdio@26520 { | ||
127 | #address-cells = <1>; | ||
128 | #size-cells = <0>; | ||
129 | compatible = "fsl,gianfar-tbi"; | ||
130 | reg = <0x26520 0x20>; | ||
131 | |||
132 | tbi1: tbi-phy@11 { | ||
133 | reg = <0x11>; | ||
134 | device_type = "tbi-phy"; | ||
135 | }; | ||
136 | }; | ||
137 | |||
138 | |||
139 | dma@21300 { | 101 | dma@21300 { |
140 | #address-cells = <1>; | 102 | #address-cells = <1>; |
141 | #size-cells = <1>; | 103 | #size-cells = <1>; |
@@ -178,31 +140,74 @@ | |||
178 | }; | 140 | }; |
179 | 141 | ||
180 | enet0: ethernet@24000 { | 142 | enet0: ethernet@24000 { |
143 | #address-cells = <1>; | ||
144 | #size-cells = <1>; | ||
181 | cell-index = <0>; | 145 | cell-index = <0>; |
182 | device_type = "network"; | 146 | device_type = "network"; |
183 | model = "TSEC"; | 147 | model = "TSEC"; |
184 | compatible = "gianfar"; | 148 | compatible = "gianfar"; |
185 | reg = <0x24000 0x1000>; | 149 | reg = <0x24000 0x1000>; |
150 | ranges = <0x0 0x24000 0x1000>; | ||
186 | local-mac-address = [ 00 00 00 00 00 00 ]; | 151 | local-mac-address = [ 00 00 00 00 00 00 ]; |
187 | interrupts = <29 2 30 2 34 2>; | 152 | interrupts = <29 2 30 2 34 2>; |
188 | interrupt-parent = <&mpic>; | 153 | interrupt-parent = <&mpic>; |
189 | phy-handle = <&phy0>; | 154 | phy-handle = <&phy0>; |
190 | tbi-handle = <&tbi0>; | 155 | tbi-handle = <&tbi0>; |
191 | phy-connection-type = "rgmii-id"; | 156 | phy-connection-type = "rgmii-id"; |
157 | |||
158 | mdio@520 { | ||
159 | #address-cells = <1>; | ||
160 | #size-cells = <0>; | ||
161 | compatible = "fsl,gianfar-mdio"; | ||
162 | reg = <0x520 0x20>; | ||
163 | |||
164 | phy0: ethernet-phy@0 { | ||
165 | interrupt-parent = <&mpic>; | ||
166 | interrupts = <10 1>; | ||
167 | reg = <0x0>; | ||
168 | device_type = "ethernet-phy"; | ||
169 | }; | ||
170 | phy1: ethernet-phy@1 { | ||
171 | interrupt-parent = <&mpic>; | ||
172 | interrupts = <10 1>; | ||
173 | reg = <0x1>; | ||
174 | device_type = "ethernet-phy"; | ||
175 | }; | ||
176 | |||
177 | tbi0: tbi-phy@11 { | ||
178 | reg = <0x11>; | ||
179 | device_type = "tbi-phy"; | ||
180 | }; | ||
181 | }; | ||
192 | }; | 182 | }; |
193 | 183 | ||
194 | enet1: ethernet@26000 { | 184 | enet1: ethernet@26000 { |
185 | #address-cells = <1>; | ||
186 | #size-cells = <1>; | ||
195 | cell-index = <1>; | 187 | cell-index = <1>; |
196 | device_type = "network"; | 188 | device_type = "network"; |
197 | model = "TSEC"; | 189 | model = "TSEC"; |
198 | compatible = "gianfar"; | 190 | compatible = "gianfar"; |
199 | reg = <0x26000 0x1000>; | 191 | reg = <0x26000 0x1000>; |
192 | ranges = <0x0 0x26000 0x1000>; | ||
200 | local-mac-address = [ 00 00 00 00 00 00 ]; | 193 | local-mac-address = [ 00 00 00 00 00 00 ]; |
201 | interrupts = <31 2 32 2 33 2>; | 194 | interrupts = <31 2 32 2 33 2>; |
202 | interrupt-parent = <&mpic>; | 195 | interrupt-parent = <&mpic>; |
203 | phy-handle = <&phy1>; | 196 | phy-handle = <&phy1>; |
204 | tbi-handle = <&tbi1>; | 197 | tbi-handle = <&tbi1>; |
205 | phy-connection-type = "rgmii-id"; | 198 | phy-connection-type = "rgmii-id"; |
199 | |||
200 | mdio@520 { | ||
201 | #address-cells = <1>; | ||
202 | #size-cells = <0>; | ||
203 | compatible = "fsl,gianfar-tbi"; | ||
204 | reg = <0x520 0x20>; | ||
205 | |||
206 | tbi1: tbi-phy@11 { | ||
207 | reg = <0x11>; | ||
208 | device_type = "tbi-phy"; | ||
209 | }; | ||
210 | }; | ||
206 | }; | 211 | }; |
207 | 212 | ||
208 | serial0: serial@4500 { | 213 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts index df774a7088ff..804e90353293 100644 --- a/arch/powerpc/boot/dts/mpc8548cds.dts +++ b/arch/powerpc/boot/dts/mpc8548cds.dts | |||
@@ -142,129 +142,141 @@ | |||
142 | }; | 142 | }; |
143 | }; | 143 | }; |
144 | 144 | ||
145 | mdio@24520 { | ||
146 | #address-cells = <1>; | ||
147 | #size-cells = <0>; | ||
148 | compatible = "fsl,gianfar-mdio"; | ||
149 | reg = <0x24520 0x20>; | ||
150 | |||
151 | phy0: ethernet-phy@0 { | ||
152 | interrupt-parent = <&mpic>; | ||
153 | interrupts = <5 1>; | ||
154 | reg = <0x0>; | ||
155 | device_type = "ethernet-phy"; | ||
156 | }; | ||
157 | phy1: ethernet-phy@1 { | ||
158 | interrupt-parent = <&mpic>; | ||
159 | interrupts = <5 1>; | ||
160 | reg = <0x1>; | ||
161 | device_type = "ethernet-phy"; | ||
162 | }; | ||
163 | phy2: ethernet-phy@2 { | ||
164 | interrupt-parent = <&mpic>; | ||
165 | interrupts = <5 1>; | ||
166 | reg = <0x2>; | ||
167 | device_type = "ethernet-phy"; | ||
168 | }; | ||
169 | phy3: ethernet-phy@3 { | ||
170 | interrupt-parent = <&mpic>; | ||
171 | interrupts = <5 1>; | ||
172 | reg = <0x3>; | ||
173 | device_type = "ethernet-phy"; | ||
174 | }; | ||
175 | tbi0: tbi-phy@11 { | ||
176 | reg = <0x11>; | ||
177 | device_type = "tbi-phy"; | ||
178 | }; | ||
179 | }; | ||
180 | |||
181 | mdio@25520 { | ||
182 | #address-cells = <1>; | ||
183 | #size-cells = <0>; | ||
184 | compatible = "fsl,gianfar-tbi"; | ||
185 | reg = <0x25520 0x20>; | ||
186 | |||
187 | tbi1: tbi-phy@11 { | ||
188 | reg = <0x11>; | ||
189 | device_type = "tbi-phy"; | ||
190 | }; | ||
191 | }; | ||
192 | |||
193 | mdio@26520 { | ||
194 | #address-cells = <1>; | ||
195 | #size-cells = <0>; | ||
196 | compatible = "fsl,gianfar-tbi"; | ||
197 | reg = <0x26520 0x20>; | ||
198 | |||
199 | tbi2: tbi-phy@11 { | ||
200 | reg = <0x11>; | ||
201 | device_type = "tbi-phy"; | ||
202 | }; | ||
203 | }; | ||
204 | |||
205 | mdio@27520 { | ||
206 | #address-cells = <1>; | ||
207 | #size-cells = <0>; | ||
208 | compatible = "fsl,gianfar-tbi"; | ||
209 | reg = <0x27520 0x20>; | ||
210 | |||
211 | tbi3: tbi-phy@11 { | ||
212 | reg = <0x11>; | ||
213 | device_type = "tbi-phy"; | ||
214 | }; | ||
215 | }; | ||
216 | |||
217 | enet0: ethernet@24000 { | 145 | enet0: ethernet@24000 { |
146 | #address-cells = <1>; | ||
147 | #size-cells = <1>; | ||
218 | cell-index = <0>; | 148 | cell-index = <0>; |
219 | device_type = "network"; | 149 | device_type = "network"; |
220 | model = "eTSEC"; | 150 | model = "eTSEC"; |
221 | compatible = "gianfar"; | 151 | compatible = "gianfar"; |
222 | reg = <0x24000 0x1000>; | 152 | reg = <0x24000 0x1000>; |
153 | ranges = <0x0 0x24000 0x1000>; | ||
223 | local-mac-address = [ 00 00 00 00 00 00 ]; | 154 | local-mac-address = [ 00 00 00 00 00 00 ]; |
224 | interrupts = <29 2 30 2 34 2>; | 155 | interrupts = <29 2 30 2 34 2>; |
225 | interrupt-parent = <&mpic>; | 156 | interrupt-parent = <&mpic>; |
226 | tbi-handle = <&tbi0>; | 157 | tbi-handle = <&tbi0>; |
227 | phy-handle = <&phy0>; | 158 | phy-handle = <&phy0>; |
159 | |||
160 | mdio@520 { | ||
161 | #address-cells = <1>; | ||
162 | #size-cells = <0>; | ||
163 | compatible = "fsl,gianfar-mdio"; | ||
164 | reg = <0x520 0x20>; | ||
165 | |||
166 | phy0: ethernet-phy@0 { | ||
167 | interrupt-parent = <&mpic>; | ||
168 | interrupts = <5 1>; | ||
169 | reg = <0x0>; | ||
170 | device_type = "ethernet-phy"; | ||
171 | }; | ||
172 | phy1: ethernet-phy@1 { | ||
173 | interrupt-parent = <&mpic>; | ||
174 | interrupts = <5 1>; | ||
175 | reg = <0x1>; | ||
176 | device_type = "ethernet-phy"; | ||
177 | }; | ||
178 | phy2: ethernet-phy@2 { | ||
179 | interrupt-parent = <&mpic>; | ||
180 | interrupts = <5 1>; | ||
181 | reg = <0x2>; | ||
182 | device_type = "ethernet-phy"; | ||
183 | }; | ||
184 | phy3: ethernet-phy@3 { | ||
185 | interrupt-parent = <&mpic>; | ||
186 | interrupts = <5 1>; | ||
187 | reg = <0x3>; | ||
188 | device_type = "ethernet-phy"; | ||
189 | }; | ||
190 | tbi0: tbi-phy@11 { | ||
191 | reg = <0x11>; | ||
192 | device_type = "tbi-phy"; | ||
193 | }; | ||
194 | }; | ||
228 | }; | 195 | }; |
229 | 196 | ||
230 | enet1: ethernet@25000 { | 197 | enet1: ethernet@25000 { |
198 | #address-cells = <1>; | ||
199 | #size-cells = <1>; | ||
231 | cell-index = <1>; | 200 | cell-index = <1>; |
232 | device_type = "network"; | 201 | device_type = "network"; |
233 | model = "eTSEC"; | 202 | model = "eTSEC"; |
234 | compatible = "gianfar"; | 203 | compatible = "gianfar"; |
235 | reg = <0x25000 0x1000>; | 204 | reg = <0x25000 0x1000>; |
205 | ranges = <0x0 0x25000 0x1000>; | ||
236 | local-mac-address = [ 00 00 00 00 00 00 ]; | 206 | local-mac-address = [ 00 00 00 00 00 00 ]; |
237 | interrupts = <35 2 36 2 40 2>; | 207 | interrupts = <35 2 36 2 40 2>; |
238 | interrupt-parent = <&mpic>; | 208 | interrupt-parent = <&mpic>; |
239 | tbi-handle = <&tbi1>; | 209 | tbi-handle = <&tbi1>; |
240 | phy-handle = <&phy1>; | 210 | phy-handle = <&phy1>; |
211 | |||
212 | mdio@520 { | ||
213 | #address-cells = <1>; | ||
214 | #size-cells = <0>; | ||
215 | compatible = "fsl,gianfar-tbi"; | ||
216 | reg = <0x520 0x20>; | ||
217 | |||
218 | tbi1: tbi-phy@11 { | ||
219 | reg = <0x11>; | ||
220 | device_type = "tbi-phy"; | ||
221 | }; | ||
222 | }; | ||
241 | }; | 223 | }; |
242 | 224 | ||
243 | /* eTSEC 3/4 are currently broken | 225 | /* eTSEC 3/4 are currently broken |
244 | enet2: ethernet@26000 { | 226 | enet2: ethernet@26000 { |
227 | #address-cells = <1>; | ||
228 | #size-cells = <1>; | ||
245 | cell-index = <2>; | 229 | cell-index = <2>; |
246 | device_type = "network"; | 230 | device_type = "network"; |
247 | model = "eTSEC"; | 231 | model = "eTSEC"; |
248 | compatible = "gianfar"; | 232 | compatible = "gianfar"; |
249 | reg = <0x26000 0x1000>; | 233 | reg = <0x26000 0x1000>; |
234 | ranges = <0x0 0x26000 0x1000>; | ||
250 | local-mac-address = [ 00 00 00 00 00 00 ]; | 235 | local-mac-address = [ 00 00 00 00 00 00 ]; |
251 | interrupts = <31 2 32 2 33 2>; | 236 | interrupts = <31 2 32 2 33 2>; |
252 | interrupt-parent = <&mpic>; | 237 | interrupt-parent = <&mpic>; |
253 | tbi-handle = <&tbi2>; | 238 | tbi-handle = <&tbi2>; |
254 | phy-handle = <&phy2>; | 239 | phy-handle = <&phy2>; |
240 | |||
241 | mdio@520 { | ||
242 | #address-cells = <1>; | ||
243 | #size-cells = <0>; | ||
244 | compatible = "fsl,gianfar-tbi"; | ||
245 | reg = <0x520 0x20>; | ||
246 | |||
247 | tbi2: tbi-phy@11 { | ||
248 | reg = <0x11>; | ||
249 | device_type = "tbi-phy"; | ||
250 | }; | ||
251 | }; | ||
255 | }; | 252 | }; |
256 | 253 | ||
257 | enet3: ethernet@27000 { | 254 | enet3: ethernet@27000 { |
255 | #address-cells = <1>; | ||
256 | #size-cells = <1>; | ||
258 | cell-index = <3>; | 257 | cell-index = <3>; |
259 | device_type = "network"; | 258 | device_type = "network"; |
260 | model = "eTSEC"; | 259 | model = "eTSEC"; |
261 | compatible = "gianfar"; | 260 | compatible = "gianfar"; |
262 | reg = <0x27000 0x1000>; | 261 | reg = <0x27000 0x1000>; |
262 | ranges = <0x0 0x27000 0x1000>; | ||
263 | local-mac-address = [ 00 00 00 00 00 00 ]; | 263 | local-mac-address = [ 00 00 00 00 00 00 ]; |
264 | interrupts = <37 2 38 2 39 2>; | 264 | interrupts = <37 2 38 2 39 2>; |
265 | interrupt-parent = <&mpic>; | 265 | interrupt-parent = <&mpic>; |
266 | tbi-handle = <&tbi3>; | 266 | tbi-handle = <&tbi3>; |
267 | phy-handle = <&phy3>; | 267 | phy-handle = <&phy3>; |
268 | |||
269 | mdio@520 { | ||
270 | #address-cells = <1>; | ||
271 | #size-cells = <0>; | ||
272 | compatible = "fsl,gianfar-tbi"; | ||
273 | reg = <0x520 0x20>; | ||
274 | |||
275 | tbi3: tbi-phy@11 { | ||
276 | reg = <0x11>; | ||
277 | device_type = "tbi-phy"; | ||
278 | }; | ||
279 | }; | ||
268 | }; | 280 | }; |
269 | */ | 281 | */ |
270 | 282 | ||
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts index 053b01e1c93b..9484f0729b10 100644 --- a/arch/powerpc/boot/dts/mpc8555cds.dts +++ b/arch/powerpc/boot/dts/mpc8555cds.dts | |||
@@ -126,66 +126,72 @@ | |||
126 | }; | 126 | }; |
127 | }; | 127 | }; |
128 | 128 | ||
129 | mdio@24520 { | ||
130 | #address-cells = <1>; | ||
131 | #size-cells = <0>; | ||
132 | compatible = "fsl,gianfar-mdio"; | ||
133 | reg = <0x24520 0x20>; | ||
134 | |||
135 | phy0: ethernet-phy@0 { | ||
136 | interrupt-parent = <&mpic>; | ||
137 | interrupts = <5 1>; | ||
138 | reg = <0x0>; | ||
139 | device_type = "ethernet-phy"; | ||
140 | }; | ||
141 | phy1: ethernet-phy@1 { | ||
142 | interrupt-parent = <&mpic>; | ||
143 | interrupts = <5 1>; | ||
144 | reg = <0x1>; | ||
145 | device_type = "ethernet-phy"; | ||
146 | }; | ||
147 | tbi0: tbi-phy@11 { | ||
148 | reg = <0x11>; | ||
149 | device_type = "tbi-phy"; | ||
150 | }; | ||
151 | }; | ||
152 | |||
153 | mdio@25520 { | ||
154 | #address-cells = <1>; | ||
155 | #size-cells = <0>; | ||
156 | compatible = "fsl,gianfar-tbi"; | ||
157 | reg = <0x25520 0x20>; | ||
158 | |||
159 | tbi1: tbi-phy@11 { | ||
160 | reg = <0x11>; | ||
161 | device_type = "tbi-phy"; | ||
162 | }; | ||
163 | }; | ||
164 | |||
165 | enet0: ethernet@24000 { | 129 | enet0: ethernet@24000 { |
130 | #address-cells = <1>; | ||
131 | #size-cells = <1>; | ||
166 | cell-index = <0>; | 132 | cell-index = <0>; |
167 | device_type = "network"; | 133 | device_type = "network"; |
168 | model = "TSEC"; | 134 | model = "TSEC"; |
169 | compatible = "gianfar"; | 135 | compatible = "gianfar"; |
170 | reg = <0x24000 0x1000>; | 136 | reg = <0x24000 0x1000>; |
137 | ranges = <0x0 0x24000 0x1000>; | ||
171 | local-mac-address = [ 00 00 00 00 00 00 ]; | 138 | local-mac-address = [ 00 00 00 00 00 00 ]; |
172 | interrupts = <29 2 30 2 34 2>; | 139 | interrupts = <29 2 30 2 34 2>; |
173 | interrupt-parent = <&mpic>; | 140 | interrupt-parent = <&mpic>; |
174 | tbi-handle = <&tbi0>; | 141 | tbi-handle = <&tbi0>; |
175 | phy-handle = <&phy0>; | 142 | phy-handle = <&phy0>; |
143 | |||
144 | mdio@520 { | ||
145 | #address-cells = <1>; | ||
146 | #size-cells = <0>; | ||
147 | compatible = "fsl,gianfar-mdio"; | ||
148 | reg = <0x520 0x20>; | ||
149 | |||
150 | phy0: ethernet-phy@0 { | ||
151 | interrupt-parent = <&mpic>; | ||
152 | interrupts = <5 1>; | ||
153 | reg = <0x0>; | ||
154 | device_type = "ethernet-phy"; | ||
155 | }; | ||
156 | phy1: ethernet-phy@1 { | ||
157 | interrupt-parent = <&mpic>; | ||
158 | interrupts = <5 1>; | ||
159 | reg = <0x1>; | ||
160 | device_type = "ethernet-phy"; | ||
161 | }; | ||
162 | tbi0: tbi-phy@11 { | ||
163 | reg = <0x11>; | ||
164 | device_type = "tbi-phy"; | ||
165 | }; | ||
166 | }; | ||
176 | }; | 167 | }; |
177 | 168 | ||
178 | enet1: ethernet@25000 { | 169 | enet1: ethernet@25000 { |
170 | #address-cells = <1>; | ||
171 | #size-cells = <1>; | ||
179 | cell-index = <1>; | 172 | cell-index = <1>; |
180 | device_type = "network"; | 173 | device_type = "network"; |
181 | model = "TSEC"; | 174 | model = "TSEC"; |
182 | compatible = "gianfar"; | 175 | compatible = "gianfar"; |
183 | reg = <0x25000 0x1000>; | 176 | reg = <0x25000 0x1000>; |
177 | ranges = <0x0 0x25000 0x1000>; | ||
184 | local-mac-address = [ 00 00 00 00 00 00 ]; | 178 | local-mac-address = [ 00 00 00 00 00 00 ]; |
185 | interrupts = <35 2 36 2 40 2>; | 179 | interrupts = <35 2 36 2 40 2>; |
186 | interrupt-parent = <&mpic>; | 180 | interrupt-parent = <&mpic>; |
187 | tbi-handle = <&tbi1>; | 181 | tbi-handle = <&tbi1>; |
188 | phy-handle = <&phy1>; | 182 | phy-handle = <&phy1>; |
183 | |||
184 | mdio@520 { | ||
185 | #address-cells = <1>; | ||
186 | #size-cells = <0>; | ||
187 | compatible = "fsl,gianfar-tbi"; | ||
188 | reg = <0x520 0x20>; | ||
189 | |||
190 | tbi1: tbi-phy@11 { | ||
191 | reg = <0x11>; | ||
192 | device_type = "tbi-phy"; | ||
193 | }; | ||
194 | }; | ||
189 | }; | 195 | }; |
190 | 196 | ||
191 | serial0: serial@4500 { | 197 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index 11b1bcbe14ce..cc2acf87d02f 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts | |||
@@ -115,78 +115,84 @@ | |||
115 | }; | 115 | }; |
116 | }; | 116 | }; |
117 | 117 | ||
118 | mdio@24520 { | ||
119 | #address-cells = <1>; | ||
120 | #size-cells = <0>; | ||
121 | compatible = "fsl,gianfar-mdio"; | ||
122 | reg = <0x24520 0x20>; | ||
123 | |||
124 | phy0: ethernet-phy@0 { | ||
125 | interrupt-parent = <&mpic>; | ||
126 | interrupts = <5 1>; | ||
127 | reg = <0x0>; | ||
128 | device_type = "ethernet-phy"; | ||
129 | }; | ||
130 | phy1: ethernet-phy@1 { | ||
131 | interrupt-parent = <&mpic>; | ||
132 | interrupts = <5 1>; | ||
133 | reg = <0x1>; | ||
134 | device_type = "ethernet-phy"; | ||
135 | }; | ||
136 | phy2: ethernet-phy@2 { | ||
137 | interrupt-parent = <&mpic>; | ||
138 | interrupts = <7 1>; | ||
139 | reg = <0x2>; | ||
140 | device_type = "ethernet-phy"; | ||
141 | }; | ||
142 | phy3: ethernet-phy@3 { | ||
143 | interrupt-parent = <&mpic>; | ||
144 | interrupts = <7 1>; | ||
145 | reg = <0x3>; | ||
146 | device_type = "ethernet-phy"; | ||
147 | }; | ||
148 | tbi0: tbi-phy@11 { | ||
149 | reg = <0x11>; | ||
150 | device_type = "tbi-phy"; | ||
151 | }; | ||
152 | }; | ||
153 | |||
154 | mdio@25520 { | ||
155 | #address-cells = <1>; | ||
156 | #size-cells = <0>; | ||
157 | compatible = "fsl,gianfar-tbi"; | ||
158 | reg = <0x25520 0x20>; | ||
159 | |||
160 | tbi1: tbi-phy@11 { | ||
161 | reg = <0x11>; | ||
162 | device_type = "tbi-phy"; | ||
163 | }; | ||
164 | }; | ||
165 | |||
166 | enet0: ethernet@24000 { | 118 | enet0: ethernet@24000 { |
119 | #address-cells = <1>; | ||
120 | #size-cells = <1>; | ||
167 | cell-index = <0>; | 121 | cell-index = <0>; |
168 | device_type = "network"; | 122 | device_type = "network"; |
169 | model = "TSEC"; | 123 | model = "TSEC"; |
170 | compatible = "gianfar"; | 124 | compatible = "gianfar"; |
171 | reg = <0x24000 0x1000>; | 125 | reg = <0x24000 0x1000>; |
126 | ranges = <0x0 0x24000 0x1000>; | ||
172 | local-mac-address = [ 00 00 00 00 00 00 ]; | 127 | local-mac-address = [ 00 00 00 00 00 00 ]; |
173 | interrupts = <29 2 30 2 34 2>; | 128 | interrupts = <29 2 30 2 34 2>; |
174 | interrupt-parent = <&mpic>; | 129 | interrupt-parent = <&mpic>; |
175 | tbi-handle = <&tbi0>; | 130 | tbi-handle = <&tbi0>; |
176 | phy-handle = <&phy0>; | 131 | phy-handle = <&phy0>; |
132 | |||
133 | mdio@520 { | ||
134 | #address-cells = <1>; | ||
135 | #size-cells = <0>; | ||
136 | compatible = "fsl,gianfar-mdio"; | ||
137 | reg = <0x520 0x20>; | ||
138 | |||
139 | phy0: ethernet-phy@0 { | ||
140 | interrupt-parent = <&mpic>; | ||
141 | interrupts = <5 1>; | ||
142 | reg = <0x0>; | ||
143 | device_type = "ethernet-phy"; | ||
144 | }; | ||
145 | phy1: ethernet-phy@1 { | ||
146 | interrupt-parent = <&mpic>; | ||
147 | interrupts = <5 1>; | ||
148 | reg = <0x1>; | ||
149 | device_type = "ethernet-phy"; | ||
150 | }; | ||
151 | phy2: ethernet-phy@2 { | ||
152 | interrupt-parent = <&mpic>; | ||
153 | interrupts = <7 1>; | ||
154 | reg = <0x2>; | ||
155 | device_type = "ethernet-phy"; | ||
156 | }; | ||
157 | phy3: ethernet-phy@3 { | ||
158 | interrupt-parent = <&mpic>; | ||
159 | interrupts = <7 1>; | ||
160 | reg = <0x3>; | ||
161 | device_type = "ethernet-phy"; | ||
162 | }; | ||
163 | tbi0: tbi-phy@11 { | ||
164 | reg = <0x11>; | ||
165 | device_type = "tbi-phy"; | ||
166 | }; | ||
167 | }; | ||
177 | }; | 168 | }; |
178 | 169 | ||
179 | enet1: ethernet@25000 { | 170 | enet1: ethernet@25000 { |
171 | #address-cells = <1>; | ||
172 | #size-cells = <1>; | ||
180 | cell-index = <1>; | 173 | cell-index = <1>; |
181 | device_type = "network"; | 174 | device_type = "network"; |
182 | model = "TSEC"; | 175 | model = "TSEC"; |
183 | compatible = "gianfar"; | 176 | compatible = "gianfar"; |
184 | reg = <0x25000 0x1000>; | 177 | reg = <0x25000 0x1000>; |
178 | ranges = <0x0 0x25000 0x1000>; | ||
185 | local-mac-address = [ 00 00 00 00 00 00 ]; | 179 | local-mac-address = [ 00 00 00 00 00 00 ]; |
186 | interrupts = <35 2 36 2 40 2>; | 180 | interrupts = <35 2 36 2 40 2>; |
187 | interrupt-parent = <&mpic>; | 181 | interrupt-parent = <&mpic>; |
188 | tbi-handle = <&tbi1>; | 182 | tbi-handle = <&tbi1>; |
189 | phy-handle = <&phy1>; | 183 | phy-handle = <&phy1>; |
184 | |||
185 | mdio@520 { | ||
186 | #address-cells = <1>; | ||
187 | #size-cells = <0>; | ||
188 | compatible = "fsl,gianfar-tbi"; | ||
189 | reg = <0x520 0x20>; | ||
190 | |||
191 | tbi1: tbi-phy@11 { | ||
192 | reg = <0x11>; | ||
193 | device_type = "tbi-phy"; | ||
194 | }; | ||
195 | }; | ||
190 | }; | 196 | }; |
191 | 197 | ||
192 | mpic: pic@40000 { | 198 | mpic: pic@40000 { |
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index 1955bd9e113d..9d52e3b25047 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts | |||
@@ -149,78 +149,84 @@ | |||
149 | }; | 149 | }; |
150 | }; | 150 | }; |
151 | 151 | ||
152 | mdio@24520 { | ||
153 | #address-cells = <1>; | ||
154 | #size-cells = <0>; | ||
155 | compatible = "fsl,gianfar-mdio"; | ||
156 | reg = <0x24520 0x20>; | ||
157 | |||
158 | phy0: ethernet-phy@7 { | ||
159 | interrupt-parent = <&mpic>; | ||
160 | interrupts = <1 1>; | ||
161 | reg = <0x7>; | ||
162 | device_type = "ethernet-phy"; | ||
163 | }; | ||
164 | phy1: ethernet-phy@1 { | ||
165 | interrupt-parent = <&mpic>; | ||
166 | interrupts = <2 1>; | ||
167 | reg = <0x1>; | ||
168 | device_type = "ethernet-phy"; | ||
169 | }; | ||
170 | phy2: ethernet-phy@2 { | ||
171 | interrupt-parent = <&mpic>; | ||
172 | interrupts = <1 1>; | ||
173 | reg = <0x2>; | ||
174 | device_type = "ethernet-phy"; | ||
175 | }; | ||
176 | phy3: ethernet-phy@3 { | ||
177 | interrupt-parent = <&mpic>; | ||
178 | interrupts = <2 1>; | ||
179 | reg = <0x3>; | ||
180 | device_type = "ethernet-phy"; | ||
181 | }; | ||
182 | tbi0: tbi-phy@11 { | ||
183 | reg = <0x11>; | ||
184 | device_type = "tbi-phy"; | ||
185 | }; | ||
186 | }; | ||
187 | |||
188 | mdio@25520 { | ||
189 | #address-cells = <1>; | ||
190 | #size-cells = <0>; | ||
191 | compatible = "fsl,gianfar-tbi"; | ||
192 | reg = <0x25520 0x20>; | ||
193 | |||
194 | tbi1: tbi-phy@11 { | ||
195 | reg = <0x11>; | ||
196 | device_type = "tbi-phy"; | ||
197 | }; | ||
198 | }; | ||
199 | |||
200 | enet0: ethernet@24000 { | 152 | enet0: ethernet@24000 { |
153 | #address-cells = <1>; | ||
154 | #size-cells = <1>; | ||
201 | cell-index = <0>; | 155 | cell-index = <0>; |
202 | device_type = "network"; | 156 | device_type = "network"; |
203 | model = "eTSEC"; | 157 | model = "eTSEC"; |
204 | compatible = "gianfar"; | 158 | compatible = "gianfar"; |
205 | reg = <0x24000 0x1000>; | 159 | reg = <0x24000 0x1000>; |
160 | ranges = <0x0 0x24000 0x1000>; | ||
206 | local-mac-address = [ 00 00 00 00 00 00 ]; | 161 | local-mac-address = [ 00 00 00 00 00 00 ]; |
207 | interrupts = <29 2 30 2 34 2>; | 162 | interrupts = <29 2 30 2 34 2>; |
208 | interrupt-parent = <&mpic>; | 163 | interrupt-parent = <&mpic>; |
209 | tbi-handle = <&tbi0>; | 164 | tbi-handle = <&tbi0>; |
210 | phy-handle = <&phy2>; | 165 | phy-handle = <&phy2>; |
166 | |||
167 | mdio@520 { | ||
168 | #address-cells = <1>; | ||
169 | #size-cells = <0>; | ||
170 | compatible = "fsl,gianfar-mdio"; | ||
171 | reg = <0x520 0x20>; | ||
172 | |||
173 | phy0: ethernet-phy@7 { | ||
174 | interrupt-parent = <&mpic>; | ||
175 | interrupts = <1 1>; | ||
176 | reg = <0x7>; | ||
177 | device_type = "ethernet-phy"; | ||
178 | }; | ||
179 | phy1: ethernet-phy@1 { | ||
180 | interrupt-parent = <&mpic>; | ||
181 | interrupts = <2 1>; | ||
182 | reg = <0x1>; | ||
183 | device_type = "ethernet-phy"; | ||
184 | }; | ||
185 | phy2: ethernet-phy@2 { | ||
186 | interrupt-parent = <&mpic>; | ||
187 | interrupts = <1 1>; | ||
188 | reg = <0x2>; | ||
189 | device_type = "ethernet-phy"; | ||
190 | }; | ||
191 | phy3: ethernet-phy@3 { | ||
192 | interrupt-parent = <&mpic>; | ||
193 | interrupts = <2 1>; | ||
194 | reg = <0x3>; | ||
195 | device_type = "ethernet-phy"; | ||
196 | }; | ||
197 | tbi0: tbi-phy@11 { | ||
198 | reg = <0x11>; | ||
199 | device_type = "tbi-phy"; | ||
200 | }; | ||
201 | }; | ||
211 | }; | 202 | }; |
212 | 203 | ||
213 | enet1: ethernet@25000 { | 204 | enet1: ethernet@25000 { |
205 | #address-cells = <1>; | ||
206 | #size-cells = <1>; | ||
214 | cell-index = <1>; | 207 | cell-index = <1>; |
215 | device_type = "network"; | 208 | device_type = "network"; |
216 | model = "eTSEC"; | 209 | model = "eTSEC"; |
217 | compatible = "gianfar"; | 210 | compatible = "gianfar"; |
218 | reg = <0x25000 0x1000>; | 211 | reg = <0x25000 0x1000>; |
212 | ranges = <0x0 0x25000 0x1000>; | ||
219 | local-mac-address = [ 00 00 00 00 00 00 ]; | 213 | local-mac-address = [ 00 00 00 00 00 00 ]; |
220 | interrupts = <35 2 36 2 40 2>; | 214 | interrupts = <35 2 36 2 40 2>; |
221 | interrupt-parent = <&mpic>; | 215 | interrupt-parent = <&mpic>; |
222 | tbi-handle = <&tbi1>; | 216 | tbi-handle = <&tbi1>; |
223 | phy-handle = <&phy3>; | 217 | phy-handle = <&phy3>; |
218 | |||
219 | mdio@520 { | ||
220 | #address-cells = <1>; | ||
221 | #size-cells = <0>; | ||
222 | compatible = "fsl,gianfar-tbi"; | ||
223 | reg = <0x520 0x20>; | ||
224 | |||
225 | tbi1: tbi-phy@11 { | ||
226 | reg = <0x11>; | ||
227 | device_type = "tbi-phy"; | ||
228 | }; | ||
229 | }; | ||
224 | }; | 230 | }; |
225 | 231 | ||
226 | serial0: serial@4500 { | 232 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts index 359c3b727420..6e79a4169088 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dts +++ b/arch/powerpc/boot/dts/mpc8572ds.dts | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * MPC8572 DS Device Tree Source | 2 | * MPC8572 DS Device Tree Source |
3 | * | 3 | * |
4 | * Copyright 2007, 2008 Freescale Semiconductor Inc. | 4 | * Copyright 2007-2009 Freescale Semiconductor Inc. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of the GNU General Public License as published by the | 7 | * under the terms of the GNU General Public License as published by the |
@@ -312,129 +312,141 @@ | |||
312 | }; | 312 | }; |
313 | }; | 313 | }; |
314 | 314 | ||
315 | mdio@24520 { | ||
316 | #address-cells = <1>; | ||
317 | #size-cells = <0>; | ||
318 | compatible = "fsl,gianfar-mdio"; | ||
319 | reg = <0x24520 0x20>; | ||
320 | |||
321 | phy0: ethernet-phy@0 { | ||
322 | interrupt-parent = <&mpic>; | ||
323 | interrupts = <10 1>; | ||
324 | reg = <0x0>; | ||
325 | }; | ||
326 | phy1: ethernet-phy@1 { | ||
327 | interrupt-parent = <&mpic>; | ||
328 | interrupts = <10 1>; | ||
329 | reg = <0x1>; | ||
330 | }; | ||
331 | phy2: ethernet-phy@2 { | ||
332 | interrupt-parent = <&mpic>; | ||
333 | interrupts = <10 1>; | ||
334 | reg = <0x2>; | ||
335 | }; | ||
336 | phy3: ethernet-phy@3 { | ||
337 | interrupt-parent = <&mpic>; | ||
338 | interrupts = <10 1>; | ||
339 | reg = <0x3>; | ||
340 | }; | ||
341 | |||
342 | tbi0: tbi-phy@11 { | ||
343 | reg = <0x11>; | ||
344 | device_type = "tbi-phy"; | ||
345 | }; | ||
346 | }; | ||
347 | |||
348 | mdio@25520 { | ||
349 | #address-cells = <1>; | ||
350 | #size-cells = <0>; | ||
351 | compatible = "fsl,gianfar-tbi"; | ||
352 | reg = <0x25520 0x20>; | ||
353 | |||
354 | tbi1: tbi-phy@11 { | ||
355 | reg = <0x11>; | ||
356 | device_type = "tbi-phy"; | ||
357 | }; | ||
358 | }; | ||
359 | |||
360 | mdio@26520 { | ||
361 | #address-cells = <1>; | ||
362 | #size-cells = <0>; | ||
363 | compatible = "fsl,gianfar-tbi"; | ||
364 | reg = <0x26520 0x20>; | ||
365 | |||
366 | tbi2: tbi-phy@11 { | ||
367 | reg = <0x11>; | ||
368 | device_type = "tbi-phy"; | ||
369 | }; | ||
370 | }; | ||
371 | |||
372 | mdio@27520 { | ||
373 | #address-cells = <1>; | ||
374 | #size-cells = <0>; | ||
375 | compatible = "fsl,gianfar-tbi"; | ||
376 | reg = <0x27520 0x20>; | ||
377 | |||
378 | tbi3: tbi-phy@11 { | ||
379 | reg = <0x11>; | ||
380 | device_type = "tbi-phy"; | ||
381 | }; | ||
382 | }; | ||
383 | |||
384 | enet0: ethernet@24000 { | 315 | enet0: ethernet@24000 { |
316 | #address-cells = <1>; | ||
317 | #size-cells = <1>; | ||
385 | cell-index = <0>; | 318 | cell-index = <0>; |
386 | device_type = "network"; | 319 | device_type = "network"; |
387 | model = "eTSEC"; | 320 | model = "eTSEC"; |
388 | compatible = "gianfar"; | 321 | compatible = "gianfar"; |
389 | reg = <0x24000 0x1000>; | 322 | reg = <0x24000 0x1000>; |
323 | ranges = <0x0 0x24000 0x1000>; | ||
390 | local-mac-address = [ 00 00 00 00 00 00 ]; | 324 | local-mac-address = [ 00 00 00 00 00 00 ]; |
391 | interrupts = <29 2 30 2 34 2>; | 325 | interrupts = <29 2 30 2 34 2>; |
392 | interrupt-parent = <&mpic>; | 326 | interrupt-parent = <&mpic>; |
393 | tbi-handle = <&tbi0>; | 327 | tbi-handle = <&tbi0>; |
394 | phy-handle = <&phy0>; | 328 | phy-handle = <&phy0>; |
395 | phy-connection-type = "rgmii-id"; | 329 | phy-connection-type = "rgmii-id"; |
330 | |||
331 | mdio@520 { | ||
332 | #address-cells = <1>; | ||
333 | #size-cells = <0>; | ||
334 | compatible = "fsl,gianfar-mdio"; | ||
335 | reg = <0x520 0x20>; | ||
336 | |||
337 | phy0: ethernet-phy@0 { | ||
338 | interrupt-parent = <&mpic>; | ||
339 | interrupts = <10 1>; | ||
340 | reg = <0x0>; | ||
341 | }; | ||
342 | phy1: ethernet-phy@1 { | ||
343 | interrupt-parent = <&mpic>; | ||
344 | interrupts = <10 1>; | ||
345 | reg = <0x1>; | ||
346 | }; | ||
347 | phy2: ethernet-phy@2 { | ||
348 | interrupt-parent = <&mpic>; | ||
349 | interrupts = <10 1>; | ||
350 | reg = <0x2>; | ||
351 | }; | ||
352 | phy3: ethernet-phy@3 { | ||
353 | interrupt-parent = <&mpic>; | ||
354 | interrupts = <10 1>; | ||
355 | reg = <0x3>; | ||
356 | }; | ||
357 | |||
358 | tbi0: tbi-phy@11 { | ||
359 | reg = <0x11>; | ||
360 | device_type = "tbi-phy"; | ||
361 | }; | ||
362 | }; | ||
396 | }; | 363 | }; |
397 | 364 | ||
398 | enet1: ethernet@25000 { | 365 | enet1: ethernet@25000 { |
366 | #address-cells = <1>; | ||
367 | #size-cells = <1>; | ||
399 | cell-index = <1>; | 368 | cell-index = <1>; |
400 | device_type = "network"; | 369 | device_type = "network"; |
401 | model = "eTSEC"; | 370 | model = "eTSEC"; |
402 | compatible = "gianfar"; | 371 | compatible = "gianfar"; |
403 | reg = <0x25000 0x1000>; | 372 | reg = <0x25000 0x1000>; |
373 | ranges = <0x0 0x25000 0x1000>; | ||
404 | local-mac-address = [ 00 00 00 00 00 00 ]; | 374 | local-mac-address = [ 00 00 00 00 00 00 ]; |
405 | interrupts = <35 2 36 2 40 2>; | 375 | interrupts = <35 2 36 2 40 2>; |
406 | interrupt-parent = <&mpic>; | 376 | interrupt-parent = <&mpic>; |
407 | tbi-handle = <&tbi1>; | 377 | tbi-handle = <&tbi1>; |
408 | phy-handle = <&phy1>; | 378 | phy-handle = <&phy1>; |
409 | phy-connection-type = "rgmii-id"; | 379 | phy-connection-type = "rgmii-id"; |
380 | |||
381 | mdio@520 { | ||
382 | #address-cells = <1>; | ||
383 | #size-cells = <0>; | ||
384 | compatible = "fsl,gianfar-tbi"; | ||
385 | reg = <0x520 0x20>; | ||
386 | |||
387 | tbi1: tbi-phy@11 { | ||
388 | reg = <0x11>; | ||
389 | device_type = "tbi-phy"; | ||
390 | }; | ||
391 | }; | ||
410 | }; | 392 | }; |
411 | 393 | ||
412 | enet2: ethernet@26000 { | 394 | enet2: ethernet@26000 { |
395 | #address-cells = <1>; | ||
396 | #size-cells = <1>; | ||
413 | cell-index = <2>; | 397 | cell-index = <2>; |
414 | device_type = "network"; | 398 | device_type = "network"; |
415 | model = "eTSEC"; | 399 | model = "eTSEC"; |
416 | compatible = "gianfar"; | 400 | compatible = "gianfar"; |
417 | reg = <0x26000 0x1000>; | 401 | reg = <0x26000 0x1000>; |
402 | ranges = <0x0 0x26000 0x1000>; | ||
418 | local-mac-address = [ 00 00 00 00 00 00 ]; | 403 | local-mac-address = [ 00 00 00 00 00 00 ]; |
419 | interrupts = <31 2 32 2 33 2>; | 404 | interrupts = <31 2 32 2 33 2>; |
420 | interrupt-parent = <&mpic>; | 405 | interrupt-parent = <&mpic>; |
421 | tbi-handle = <&tbi2>; | 406 | tbi-handle = <&tbi2>; |
422 | phy-handle = <&phy2>; | 407 | phy-handle = <&phy2>; |
423 | phy-connection-type = "rgmii-id"; | 408 | phy-connection-type = "rgmii-id"; |
409 | |||
410 | mdio@520 { | ||
411 | #address-cells = <1>; | ||
412 | #size-cells = <0>; | ||
413 | compatible = "fsl,gianfar-tbi"; | ||
414 | reg = <0x520 0x20>; | ||
415 | |||
416 | tbi2: tbi-phy@11 { | ||
417 | reg = <0x11>; | ||
418 | device_type = "tbi-phy"; | ||
419 | }; | ||
420 | }; | ||
424 | }; | 421 | }; |
425 | 422 | ||
426 | enet3: ethernet@27000 { | 423 | enet3: ethernet@27000 { |
424 | #address-cells = <1>; | ||
425 | #size-cells = <1>; | ||
427 | cell-index = <3>; | 426 | cell-index = <3>; |
428 | device_type = "network"; | 427 | device_type = "network"; |
429 | model = "eTSEC"; | 428 | model = "eTSEC"; |
430 | compatible = "gianfar"; | 429 | compatible = "gianfar"; |
431 | reg = <0x27000 0x1000>; | 430 | reg = <0x27000 0x1000>; |
431 | ranges = <0x0 0x27000 0x1000>; | ||
432 | local-mac-address = [ 00 00 00 00 00 00 ]; | 432 | local-mac-address = [ 00 00 00 00 00 00 ]; |
433 | interrupts = <37 2 38 2 39 2>; | 433 | interrupts = <37 2 38 2 39 2>; |
434 | interrupt-parent = <&mpic>; | 434 | interrupt-parent = <&mpic>; |
435 | tbi-handle = <&tbi3>; | 435 | tbi-handle = <&tbi3>; |
436 | phy-handle = <&phy3>; | 436 | phy-handle = <&phy3>; |
437 | phy-connection-type = "rgmii-id"; | 437 | phy-connection-type = "rgmii-id"; |
438 | |||
439 | mdio@520 { | ||
440 | #address-cells = <1>; | ||
441 | #size-cells = <0>; | ||
442 | compatible = "fsl,gianfar-tbi"; | ||
443 | reg = <0x520 0x20>; | ||
444 | |||
445 | tbi3: tbi-phy@11 { | ||
446 | reg = <0x11>; | ||
447 | device_type = "tbi-phy"; | ||
448 | }; | ||
449 | }; | ||
438 | }; | 450 | }; |
439 | 451 | ||
440 | serial0: serial@4500 { | 452 | serial0: serial@4500 { |
@@ -643,7 +655,7 @@ | |||
643 | 655 | ||
644 | 0x1000000 0x0 0x0 | 656 | 0x1000000 0x0 0x0 |
645 | 0x1000000 0x0 0x0 | 657 | 0x1000000 0x0 0x0 |
646 | 0x0 0x100000>; | 658 | 0x0 0x10000>; |
647 | uli1575@0 { | 659 | uli1575@0 { |
648 | reg = <0x0 0x0 0x0 0x0 0x0>; | 660 | reg = <0x0 0x0 0x0 0x0 0x0>; |
649 | #size-cells = <2>; | 661 | #size-cells = <2>; |
@@ -654,7 +666,7 @@ | |||
654 | 666 | ||
655 | 0x1000000 0x0 0x0 | 667 | 0x1000000 0x0 0x0 |
656 | 0x1000000 0x0 0x0 | 668 | 0x1000000 0x0 0x0 |
657 | 0x0 0x100000>; | 669 | 0x0 0x10000>; |
658 | isa@1e { | 670 | isa@1e { |
659 | device_type = "isa"; | 671 | device_type = "isa"; |
660 | #interrupt-cells = <2>; | 672 | #interrupt-cells = <2>; |
@@ -744,7 +756,7 @@ | |||
744 | 756 | ||
745 | 0x1000000 0x0 0x0 | 757 | 0x1000000 0x0 0x0 |
746 | 0x1000000 0x0 0x0 | 758 | 0x1000000 0x0 0x0 |
747 | 0x0 0x100000>; | 759 | 0x0 0x10000>; |
748 | }; | 760 | }; |
749 | }; | 761 | }; |
750 | 762 | ||
@@ -781,7 +793,7 @@ | |||
781 | 793 | ||
782 | 0x1000000 0x0 0x0 | 794 | 0x1000000 0x0 0x0 |
783 | 0x1000000 0x0 0x0 | 795 | 0x1000000 0x0 0x0 |
784 | 0x0 0x100000>; | 796 | 0x0 0x10000>; |
785 | }; | 797 | }; |
786 | }; | 798 | }; |
787 | }; | 799 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/arch/powerpc/boot/dts/mpc8572ds_36b.dts new file mode 100644 index 000000000000..dbd81a764742 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8572ds_36b.dts | |||
@@ -0,0 +1,799 @@ | |||
1 | /* | ||
2 | * MPC8572 DS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2007-2009 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | / { | ||
14 | model = "fsl,MPC8572DS"; | ||
15 | compatible = "fsl,MPC8572DS"; | ||
16 | #address-cells = <2>; | ||
17 | #size-cells = <2>; | ||
18 | |||
19 | aliases { | ||
20 | ethernet0 = &enet0; | ||
21 | ethernet1 = &enet1; | ||
22 | ethernet2 = &enet2; | ||
23 | ethernet3 = &enet3; | ||
24 | serial0 = &serial0; | ||
25 | serial1 = &serial1; | ||
26 | pci0 = &pci0; | ||
27 | pci1 = &pci1; | ||
28 | pci2 = &pci2; | ||
29 | }; | ||
30 | |||
31 | cpus { | ||
32 | #address-cells = <1>; | ||
33 | #size-cells = <0>; | ||
34 | |||
35 | PowerPC,8572@0 { | ||
36 | device_type = "cpu"; | ||
37 | reg = <0x0>; | ||
38 | d-cache-line-size = <32>; // 32 bytes | ||
39 | i-cache-line-size = <32>; // 32 bytes | ||
40 | d-cache-size = <0x8000>; // L1, 32K | ||
41 | i-cache-size = <0x8000>; // L1, 32K | ||
42 | timebase-frequency = <0>; | ||
43 | bus-frequency = <0>; | ||
44 | clock-frequency = <0>; | ||
45 | next-level-cache = <&L2>; | ||
46 | }; | ||
47 | |||
48 | PowerPC,8572@1 { | ||
49 | device_type = "cpu"; | ||
50 | reg = <0x1>; | ||
51 | d-cache-line-size = <32>; // 32 bytes | ||
52 | i-cache-line-size = <32>; // 32 bytes | ||
53 | d-cache-size = <0x8000>; // L1, 32K | ||
54 | i-cache-size = <0x8000>; // L1, 32K | ||
55 | timebase-frequency = <0>; | ||
56 | bus-frequency = <0>; | ||
57 | clock-frequency = <0>; | ||
58 | next-level-cache = <&L2>; | ||
59 | }; | ||
60 | }; | ||
61 | |||
62 | memory { | ||
63 | device_type = "memory"; | ||
64 | }; | ||
65 | |||
66 | localbus@fffe05000 { | ||
67 | #address-cells = <2>; | ||
68 | #size-cells = <1>; | ||
69 | compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; | ||
70 | reg = <0xf 0xffe05000 0 0x1000>; | ||
71 | interrupts = <19 2>; | ||
72 | interrupt-parent = <&mpic>; | ||
73 | |||
74 | ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 | ||
75 | 0x1 0x0 0xf 0xe0000000 0x08000000 | ||
76 | 0x2 0x0 0xf 0xffa00000 0x00040000 | ||
77 | 0x3 0x0 0xf 0xffdf0000 0x00008000 | ||
78 | 0x4 0x0 0xf 0xffa40000 0x00040000 | ||
79 | 0x5 0x0 0xf 0xffa80000 0x00040000 | ||
80 | 0x6 0x0 0xf 0xffac0000 0x00040000>; | ||
81 | |||
82 | nor@0,0 { | ||
83 | #address-cells = <1>; | ||
84 | #size-cells = <1>; | ||
85 | compatible = "cfi-flash"; | ||
86 | reg = <0x0 0x0 0x8000000>; | ||
87 | bank-width = <2>; | ||
88 | device-width = <1>; | ||
89 | |||
90 | ramdisk@0 { | ||
91 | reg = <0x0 0x03000000>; | ||
92 | read-only; | ||
93 | }; | ||
94 | |||
95 | diagnostic@3000000 { | ||
96 | reg = <0x03000000 0x00e00000>; | ||
97 | read-only; | ||
98 | }; | ||
99 | |||
100 | dink@3e00000 { | ||
101 | reg = <0x03e00000 0x00200000>; | ||
102 | read-only; | ||
103 | }; | ||
104 | |||
105 | kernel@4000000 { | ||
106 | reg = <0x04000000 0x00400000>; | ||
107 | read-only; | ||
108 | }; | ||
109 | |||
110 | jffs2@4400000 { | ||
111 | reg = <0x04400000 0x03b00000>; | ||
112 | }; | ||
113 | |||
114 | dtb@7f00000 { | ||
115 | reg = <0x07f00000 0x00080000>; | ||
116 | read-only; | ||
117 | }; | ||
118 | |||
119 | u-boot@7f80000 { | ||
120 | reg = <0x07f80000 0x00080000>; | ||
121 | read-only; | ||
122 | }; | ||
123 | }; | ||
124 | |||
125 | nand@2,0 { | ||
126 | #address-cells = <1>; | ||
127 | #size-cells = <1>; | ||
128 | compatible = "fsl,mpc8572-fcm-nand", | ||
129 | "fsl,elbc-fcm-nand"; | ||
130 | reg = <0x2 0x0 0x40000>; | ||
131 | |||
132 | u-boot@0 { | ||
133 | reg = <0x0 0x02000000>; | ||
134 | read-only; | ||
135 | }; | ||
136 | |||
137 | jffs2@2000000 { | ||
138 | reg = <0x02000000 0x10000000>; | ||
139 | }; | ||
140 | |||
141 | ramdisk@12000000 { | ||
142 | reg = <0x12000000 0x08000000>; | ||
143 | read-only; | ||
144 | }; | ||
145 | |||
146 | kernel@1a000000 { | ||
147 | reg = <0x1a000000 0x04000000>; | ||
148 | }; | ||
149 | |||
150 | dtb@1e000000 { | ||
151 | reg = <0x1e000000 0x01000000>; | ||
152 | read-only; | ||
153 | }; | ||
154 | |||
155 | empty@1f000000 { | ||
156 | reg = <0x1f000000 0x21000000>; | ||
157 | }; | ||
158 | }; | ||
159 | |||
160 | nand@4,0 { | ||
161 | compatible = "fsl,mpc8572-fcm-nand", | ||
162 | "fsl,elbc-fcm-nand"; | ||
163 | reg = <0x4 0x0 0x40000>; | ||
164 | }; | ||
165 | |||
166 | nand@5,0 { | ||
167 | compatible = "fsl,mpc8572-fcm-nand", | ||
168 | "fsl,elbc-fcm-nand"; | ||
169 | reg = <0x5 0x0 0x40000>; | ||
170 | }; | ||
171 | |||
172 | nand@6,0 { | ||
173 | compatible = "fsl,mpc8572-fcm-nand", | ||
174 | "fsl,elbc-fcm-nand"; | ||
175 | reg = <0x6 0x0 0x40000>; | ||
176 | }; | ||
177 | }; | ||
178 | |||
179 | soc8572@fffe00000 { | ||
180 | #address-cells = <1>; | ||
181 | #size-cells = <1>; | ||
182 | device_type = "soc"; | ||
183 | compatible = "simple-bus"; | ||
184 | ranges = <0x0 0xf 0xffe00000 0x100000>; | ||
185 | reg = <0xf 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed | ||
186 | bus-frequency = <0>; // Filled out by uboot. | ||
187 | |||
188 | memory-controller@2000 { | ||
189 | compatible = "fsl,mpc8572-memory-controller"; | ||
190 | reg = <0x2000 0x1000>; | ||
191 | interrupt-parent = <&mpic>; | ||
192 | interrupts = <18 2>; | ||
193 | }; | ||
194 | |||
195 | memory-controller@6000 { | ||
196 | compatible = "fsl,mpc8572-memory-controller"; | ||
197 | reg = <0x6000 0x1000>; | ||
198 | interrupt-parent = <&mpic>; | ||
199 | interrupts = <18 2>; | ||
200 | }; | ||
201 | |||
202 | L2: l2-cache-controller@20000 { | ||
203 | compatible = "fsl,mpc8572-l2-cache-controller"; | ||
204 | reg = <0x20000 0x1000>; | ||
205 | cache-line-size = <32>; // 32 bytes | ||
206 | cache-size = <0x100000>; // L2, 1M | ||
207 | interrupt-parent = <&mpic>; | ||
208 | interrupts = <16 2>; | ||
209 | }; | ||
210 | |||
211 | i2c@3000 { | ||
212 | #address-cells = <1>; | ||
213 | #size-cells = <0>; | ||
214 | cell-index = <0>; | ||
215 | compatible = "fsl-i2c"; | ||
216 | reg = <0x3000 0x100>; | ||
217 | interrupts = <43 2>; | ||
218 | interrupt-parent = <&mpic>; | ||
219 | dfsrr; | ||
220 | }; | ||
221 | |||
222 | i2c@3100 { | ||
223 | #address-cells = <1>; | ||
224 | #size-cells = <0>; | ||
225 | cell-index = <1>; | ||
226 | compatible = "fsl-i2c"; | ||
227 | reg = <0x3100 0x100>; | ||
228 | interrupts = <43 2>; | ||
229 | interrupt-parent = <&mpic>; | ||
230 | dfsrr; | ||
231 | }; | ||
232 | |||
233 | dma@c300 { | ||
234 | #address-cells = <1>; | ||
235 | #size-cells = <1>; | ||
236 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
237 | reg = <0xc300 0x4>; | ||
238 | ranges = <0x0 0xc100 0x200>; | ||
239 | cell-index = <1>; | ||
240 | dma-channel@0 { | ||
241 | compatible = "fsl,mpc8572-dma-channel", | ||
242 | "fsl,eloplus-dma-channel"; | ||
243 | reg = <0x0 0x80>; | ||
244 | cell-index = <0>; | ||
245 | interrupt-parent = <&mpic>; | ||
246 | interrupts = <76 2>; | ||
247 | }; | ||
248 | dma-channel@80 { | ||
249 | compatible = "fsl,mpc8572-dma-channel", | ||
250 | "fsl,eloplus-dma-channel"; | ||
251 | reg = <0x80 0x80>; | ||
252 | cell-index = <1>; | ||
253 | interrupt-parent = <&mpic>; | ||
254 | interrupts = <77 2>; | ||
255 | }; | ||
256 | dma-channel@100 { | ||
257 | compatible = "fsl,mpc8572-dma-channel", | ||
258 | "fsl,eloplus-dma-channel"; | ||
259 | reg = <0x100 0x80>; | ||
260 | cell-index = <2>; | ||
261 | interrupt-parent = <&mpic>; | ||
262 | interrupts = <78 2>; | ||
263 | }; | ||
264 | dma-channel@180 { | ||
265 | compatible = "fsl,mpc8572-dma-channel", | ||
266 | "fsl,eloplus-dma-channel"; | ||
267 | reg = <0x180 0x80>; | ||
268 | cell-index = <3>; | ||
269 | interrupt-parent = <&mpic>; | ||
270 | interrupts = <79 2>; | ||
271 | }; | ||
272 | }; | ||
273 | |||
274 | dma@21300 { | ||
275 | #address-cells = <1>; | ||
276 | #size-cells = <1>; | ||
277 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
278 | reg = <0x21300 0x4>; | ||
279 | ranges = <0x0 0x21100 0x200>; | ||
280 | cell-index = <0>; | ||
281 | dma-channel@0 { | ||
282 | compatible = "fsl,mpc8572-dma-channel", | ||
283 | "fsl,eloplus-dma-channel"; | ||
284 | reg = <0x0 0x80>; | ||
285 | cell-index = <0>; | ||
286 | interrupt-parent = <&mpic>; | ||
287 | interrupts = <20 2>; | ||
288 | }; | ||
289 | dma-channel@80 { | ||
290 | compatible = "fsl,mpc8572-dma-channel", | ||
291 | "fsl,eloplus-dma-channel"; | ||
292 | reg = <0x80 0x80>; | ||
293 | cell-index = <1>; | ||
294 | interrupt-parent = <&mpic>; | ||
295 | interrupts = <21 2>; | ||
296 | }; | ||
297 | dma-channel@100 { | ||
298 | compatible = "fsl,mpc8572-dma-channel", | ||
299 | "fsl,eloplus-dma-channel"; | ||
300 | reg = <0x100 0x80>; | ||
301 | cell-index = <2>; | ||
302 | interrupt-parent = <&mpic>; | ||
303 | interrupts = <22 2>; | ||
304 | }; | ||
305 | dma-channel@180 { | ||
306 | compatible = "fsl,mpc8572-dma-channel", | ||
307 | "fsl,eloplus-dma-channel"; | ||
308 | reg = <0x180 0x80>; | ||
309 | cell-index = <3>; | ||
310 | interrupt-parent = <&mpic>; | ||
311 | interrupts = <23 2>; | ||
312 | }; | ||
313 | }; | ||
314 | |||
315 | enet0: ethernet@24000 { | ||
316 | #address-cells = <1>; | ||
317 | #size-cells = <1>; | ||
318 | cell-index = <0>; | ||
319 | device_type = "network"; | ||
320 | model = "eTSEC"; | ||
321 | compatible = "gianfar"; | ||
322 | reg = <0x24000 0x1000>; | ||
323 | ranges = <0x0 0x24000 0x1000>; | ||
324 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
325 | interrupts = <29 2 30 2 34 2>; | ||
326 | interrupt-parent = <&mpic>; | ||
327 | tbi-handle = <&tbi0>; | ||
328 | phy-handle = <&phy0>; | ||
329 | phy-connection-type = "rgmii-id"; | ||
330 | |||
331 | mdio@520 { | ||
332 | #address-cells = <1>; | ||
333 | #size-cells = <0>; | ||
334 | compatible = "fsl,gianfar-mdio"; | ||
335 | reg = <0x520 0x20>; | ||
336 | |||
337 | phy0: ethernet-phy@0 { | ||
338 | interrupt-parent = <&mpic>; | ||
339 | interrupts = <10 1>; | ||
340 | reg = <0x0>; | ||
341 | }; | ||
342 | phy1: ethernet-phy@1 { | ||
343 | interrupt-parent = <&mpic>; | ||
344 | interrupts = <10 1>; | ||
345 | reg = <0x1>; | ||
346 | }; | ||
347 | phy2: ethernet-phy@2 { | ||
348 | interrupt-parent = <&mpic>; | ||
349 | interrupts = <10 1>; | ||
350 | reg = <0x2>; | ||
351 | }; | ||
352 | phy3: ethernet-phy@3 { | ||
353 | interrupt-parent = <&mpic>; | ||
354 | interrupts = <10 1>; | ||
355 | reg = <0x3>; | ||
356 | }; | ||
357 | |||
358 | tbi0: tbi-phy@11 { | ||
359 | reg = <0x11>; | ||
360 | device_type = "tbi-phy"; | ||
361 | }; | ||
362 | }; | ||
363 | }; | ||
364 | |||
365 | enet1: ethernet@25000 { | ||
366 | #address-cells = <1>; | ||
367 | #size-cells = <1>; | ||
368 | cell-index = <1>; | ||
369 | device_type = "network"; | ||
370 | model = "eTSEC"; | ||
371 | compatible = "gianfar"; | ||
372 | reg = <0x25000 0x1000>; | ||
373 | ranges = <0x0 0x25000 0x1000>; | ||
374 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
375 | interrupts = <35 2 36 2 40 2>; | ||
376 | interrupt-parent = <&mpic>; | ||
377 | tbi-handle = <&tbi1>; | ||
378 | phy-handle = <&phy1>; | ||
379 | phy-connection-type = "rgmii-id"; | ||
380 | |||
381 | mdio@520 { | ||
382 | #address-cells = <1>; | ||
383 | #size-cells = <0>; | ||
384 | compatible = "fsl,gianfar-tbi"; | ||
385 | reg = <0x520 0x20>; | ||
386 | |||
387 | tbi1: tbi-phy@11 { | ||
388 | reg = <0x11>; | ||
389 | device_type = "tbi-phy"; | ||
390 | }; | ||
391 | }; | ||
392 | }; | ||
393 | |||
394 | enet2: ethernet@26000 { | ||
395 | #address-cells = <1>; | ||
396 | #size-cells = <1>; | ||
397 | cell-index = <2>; | ||
398 | device_type = "network"; | ||
399 | model = "eTSEC"; | ||
400 | compatible = "gianfar"; | ||
401 | reg = <0x26000 0x1000>; | ||
402 | ranges = <0x0 0x26000 0x1000>; | ||
403 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
404 | interrupts = <31 2 32 2 33 2>; | ||
405 | interrupt-parent = <&mpic>; | ||
406 | tbi-handle = <&tbi2>; | ||
407 | phy-handle = <&phy2>; | ||
408 | phy-connection-type = "rgmii-id"; | ||
409 | |||
410 | mdio@520 { | ||
411 | #address-cells = <1>; | ||
412 | #size-cells = <0>; | ||
413 | compatible = "fsl,gianfar-tbi"; | ||
414 | reg = <0x520 0x20>; | ||
415 | |||
416 | tbi2: tbi-phy@11 { | ||
417 | reg = <0x11>; | ||
418 | device_type = "tbi-phy"; | ||
419 | }; | ||
420 | }; | ||
421 | }; | ||
422 | |||
423 | enet3: ethernet@27000 { | ||
424 | #address-cells = <1>; | ||
425 | #size-cells = <1>; | ||
426 | cell-index = <3>; | ||
427 | device_type = "network"; | ||
428 | model = "eTSEC"; | ||
429 | compatible = "gianfar"; | ||
430 | reg = <0x27000 0x1000>; | ||
431 | ranges = <0x0 0x27000 0x1000>; | ||
432 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
433 | interrupts = <37 2 38 2 39 2>; | ||
434 | interrupt-parent = <&mpic>; | ||
435 | tbi-handle = <&tbi3>; | ||
436 | phy-handle = <&phy3>; | ||
437 | phy-connection-type = "rgmii-id"; | ||
438 | |||
439 | mdio@520 { | ||
440 | #address-cells = <1>; | ||
441 | #size-cells = <0>; | ||
442 | compatible = "fsl,gianfar-tbi"; | ||
443 | reg = <0x520 0x20>; | ||
444 | |||
445 | tbi3: tbi-phy@11 { | ||
446 | reg = <0x11>; | ||
447 | device_type = "tbi-phy"; | ||
448 | }; | ||
449 | }; | ||
450 | }; | ||
451 | |||
452 | serial0: serial@4500 { | ||
453 | cell-index = <0>; | ||
454 | device_type = "serial"; | ||
455 | compatible = "ns16550"; | ||
456 | reg = <0x4500 0x100>; | ||
457 | clock-frequency = <0>; | ||
458 | interrupts = <42 2>; | ||
459 | interrupt-parent = <&mpic>; | ||
460 | }; | ||
461 | |||
462 | serial1: serial@4600 { | ||
463 | cell-index = <1>; | ||
464 | device_type = "serial"; | ||
465 | compatible = "ns16550"; | ||
466 | reg = <0x4600 0x100>; | ||
467 | clock-frequency = <0>; | ||
468 | interrupts = <42 2>; | ||
469 | interrupt-parent = <&mpic>; | ||
470 | }; | ||
471 | |||
472 | global-utilities@e0000 { //global utilities block | ||
473 | compatible = "fsl,mpc8572-guts"; | ||
474 | reg = <0xe0000 0x1000>; | ||
475 | fsl,has-rstcr; | ||
476 | }; | ||
477 | |||
478 | msi@41600 { | ||
479 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; | ||
480 | reg = <0x41600 0x80>; | ||
481 | msi-available-ranges = <0 0x100>; | ||
482 | interrupts = < | ||
483 | 0xe0 0 | ||
484 | 0xe1 0 | ||
485 | 0xe2 0 | ||
486 | 0xe3 0 | ||
487 | 0xe4 0 | ||
488 | 0xe5 0 | ||
489 | 0xe6 0 | ||
490 | 0xe7 0>; | ||
491 | interrupt-parent = <&mpic>; | ||
492 | }; | ||
493 | |||
494 | crypto@30000 { | ||
495 | compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", | ||
496 | "fsl,sec2.1", "fsl,sec2.0"; | ||
497 | reg = <0x30000 0x10000>; | ||
498 | interrupts = <45 2 58 2>; | ||
499 | interrupt-parent = <&mpic>; | ||
500 | fsl,num-channels = <4>; | ||
501 | fsl,channel-fifo-len = <24>; | ||
502 | fsl,exec-units-mask = <0x9fe>; | ||
503 | fsl,descriptor-types-mask = <0x3ab0ebf>; | ||
504 | }; | ||
505 | |||
506 | mpic: pic@40000 { | ||
507 | interrupt-controller; | ||
508 | #address-cells = <0>; | ||
509 | #interrupt-cells = <2>; | ||
510 | reg = <0x40000 0x40000>; | ||
511 | compatible = "chrp,open-pic"; | ||
512 | device_type = "open-pic"; | ||
513 | }; | ||
514 | }; | ||
515 | |||
516 | pci0: pcie@fffe08000 { | ||
517 | cell-index = <0>; | ||
518 | compatible = "fsl,mpc8548-pcie"; | ||
519 | device_type = "pci"; | ||
520 | #interrupt-cells = <1>; | ||
521 | #size-cells = <2>; | ||
522 | #address-cells = <3>; | ||
523 | reg = <0xf 0xffe08000 0 0x1000>; | ||
524 | bus-range = <0 255>; | ||
525 | ranges = <0x2000000 0x0 0xc0000000 0xc 0x00000000 0x0 0x20000000 | ||
526 | 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>; | ||
527 | clock-frequency = <33333333>; | ||
528 | interrupt-parent = <&mpic>; | ||
529 | interrupts = <24 2>; | ||
530 | interrupt-map-mask = <0xff00 0x0 0x0 0x7>; | ||
531 | interrupt-map = < | ||
532 | /* IDSEL 0x11 func 0 - PCI slot 1 */ | ||
533 | 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
534 | 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
535 | 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
536 | 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
537 | |||
538 | /* IDSEL 0x11 func 1 - PCI slot 1 */ | ||
539 | 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
540 | 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
541 | 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
542 | 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
543 | |||
544 | /* IDSEL 0x11 func 2 - PCI slot 1 */ | ||
545 | 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
546 | 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
547 | 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
548 | 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
549 | |||
550 | /* IDSEL 0x11 func 3 - PCI slot 1 */ | ||
551 | 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
552 | 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
553 | 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
554 | 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
555 | |||
556 | /* IDSEL 0x11 func 4 - PCI slot 1 */ | ||
557 | 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
558 | 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
559 | 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
560 | 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
561 | |||
562 | /* IDSEL 0x11 func 5 - PCI slot 1 */ | ||
563 | 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
564 | 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
565 | 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
566 | 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
567 | |||
568 | /* IDSEL 0x11 func 6 - PCI slot 1 */ | ||
569 | 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
570 | 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
571 | 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
572 | 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
573 | |||
574 | /* IDSEL 0x11 func 7 - PCI slot 1 */ | ||
575 | 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 | ||
576 | 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 | ||
577 | 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 | ||
578 | 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 | ||
579 | |||
580 | /* IDSEL 0x12 func 0 - PCI slot 2 */ | ||
581 | 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
582 | 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
583 | 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
584 | 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
585 | |||
586 | /* IDSEL 0x12 func 1 - PCI slot 2 */ | ||
587 | 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
588 | 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
589 | 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
590 | 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
591 | |||
592 | /* IDSEL 0x12 func 2 - PCI slot 2 */ | ||
593 | 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
594 | 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
595 | 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
596 | 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
597 | |||
598 | /* IDSEL 0x12 func 3 - PCI slot 2 */ | ||
599 | 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
600 | 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
601 | 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
602 | 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
603 | |||
604 | /* IDSEL 0x12 func 4 - PCI slot 2 */ | ||
605 | 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
606 | 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
607 | 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
608 | 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
609 | |||
610 | /* IDSEL 0x12 func 5 - PCI slot 2 */ | ||
611 | 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
612 | 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
613 | 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
614 | 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
615 | |||
616 | /* IDSEL 0x12 func 6 - PCI slot 2 */ | ||
617 | 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
618 | 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
619 | 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
620 | 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
621 | |||
622 | /* IDSEL 0x12 func 7 - PCI slot 2 */ | ||
623 | 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 | ||
624 | 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 | ||
625 | 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 | ||
626 | 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 | ||
627 | |||
628 | // IDSEL 0x1c USB | ||
629 | 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2 | ||
630 | 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2 | ||
631 | 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2 | ||
632 | 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2 | ||
633 | |||
634 | // IDSEL 0x1d Audio | ||
635 | 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 | ||
636 | |||
637 | // IDSEL 0x1e Legacy | ||
638 | 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 | ||
639 | 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 | ||
640 | |||
641 | // IDSEL 0x1f IDE/SATA | ||
642 | 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 | ||
643 | 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 | ||
644 | |||
645 | >; | ||
646 | |||
647 | pcie@0 { | ||
648 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
649 | #size-cells = <2>; | ||
650 | #address-cells = <3>; | ||
651 | device_type = "pci"; | ||
652 | ranges = <0x2000000 0x0 0xc0000000 | ||
653 | 0x2000000 0x0 0xc0000000 | ||
654 | 0x0 0x20000000 | ||
655 | |||
656 | 0x1000000 0x0 0x0 | ||
657 | 0x1000000 0x0 0x0 | ||
658 | 0x0 0x10000>; | ||
659 | uli1575@0 { | ||
660 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
661 | #size-cells = <2>; | ||
662 | #address-cells = <3>; | ||
663 | ranges = <0x2000000 0x0 0xc0000000 | ||
664 | 0x2000000 0x0 0xc0000000 | ||
665 | 0x0 0x20000000 | ||
666 | |||
667 | 0x1000000 0x0 0x0 | ||
668 | 0x1000000 0x0 0x0 | ||
669 | 0x0 0x10000>; | ||
670 | isa@1e { | ||
671 | device_type = "isa"; | ||
672 | #interrupt-cells = <2>; | ||
673 | #size-cells = <1>; | ||
674 | #address-cells = <2>; | ||
675 | reg = <0xf000 0x0 0x0 0x0 0x0>; | ||
676 | ranges = <0x1 0x0 0x1000000 0x0 0x0 | ||
677 | 0x1000>; | ||
678 | interrupt-parent = <&i8259>; | ||
679 | |||
680 | i8259: interrupt-controller@20 { | ||
681 | reg = <0x1 0x20 0x2 | ||
682 | 0x1 0xa0 0x2 | ||
683 | 0x1 0x4d0 0x2>; | ||
684 | interrupt-controller; | ||
685 | device_type = "interrupt-controller"; | ||
686 | #address-cells = <0>; | ||
687 | #interrupt-cells = <2>; | ||
688 | compatible = "chrp,iic"; | ||
689 | interrupts = <9 2>; | ||
690 | interrupt-parent = <&mpic>; | ||
691 | }; | ||
692 | |||
693 | i8042@60 { | ||
694 | #size-cells = <0>; | ||
695 | #address-cells = <1>; | ||
696 | reg = <0x1 0x60 0x1 0x1 0x64 0x1>; | ||
697 | interrupts = <1 3 12 3>; | ||
698 | interrupt-parent = | ||
699 | <&i8259>; | ||
700 | |||
701 | keyboard@0 { | ||
702 | reg = <0x0>; | ||
703 | compatible = "pnpPNP,303"; | ||
704 | }; | ||
705 | |||
706 | mouse@1 { | ||
707 | reg = <0x1>; | ||
708 | compatible = "pnpPNP,f03"; | ||
709 | }; | ||
710 | }; | ||
711 | |||
712 | rtc@70 { | ||
713 | compatible = "pnpPNP,b00"; | ||
714 | reg = <0x1 0x70 0x2>; | ||
715 | }; | ||
716 | |||
717 | gpio@400 { | ||
718 | reg = <0x1 0x400 0x80>; | ||
719 | }; | ||
720 | }; | ||
721 | }; | ||
722 | }; | ||
723 | |||
724 | }; | ||
725 | |||
726 | pci1: pcie@fffe09000 { | ||
727 | cell-index = <1>; | ||
728 | compatible = "fsl,mpc8548-pcie"; | ||
729 | device_type = "pci"; | ||
730 | #interrupt-cells = <1>; | ||
731 | #size-cells = <2>; | ||
732 | #address-cells = <3>; | ||
733 | reg = <0xf 0xffe09000 0 0x1000>; | ||
734 | bus-range = <0 255>; | ||
735 | ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 | ||
736 | 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>; | ||
737 | clock-frequency = <33333333>; | ||
738 | interrupt-parent = <&mpic>; | ||
739 | interrupts = <25 2>; | ||
740 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
741 | interrupt-map = < | ||
742 | /* IDSEL 0x0 */ | ||
743 | 0000 0x0 0x0 0x1 &mpic 0x4 0x1 | ||
744 | 0000 0x0 0x0 0x2 &mpic 0x5 0x1 | ||
745 | 0000 0x0 0x0 0x3 &mpic 0x6 0x1 | ||
746 | 0000 0x0 0x0 0x4 &mpic 0x7 0x1 | ||
747 | >; | ||
748 | pcie@0 { | ||
749 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
750 | #size-cells = <2>; | ||
751 | #address-cells = <3>; | ||
752 | device_type = "pci"; | ||
753 | ranges = <0x2000000 0x0 0xc0000000 | ||
754 | 0x2000000 0x0 0xc0000000 | ||
755 | 0x0 0x20000000 | ||
756 | |||
757 | 0x1000000 0x0 0x0 | ||
758 | 0x1000000 0x0 0x0 | ||
759 | 0x0 0x10000>; | ||
760 | }; | ||
761 | }; | ||
762 | |||
763 | pci2: pcie@fffe0a000 { | ||
764 | cell-index = <2>; | ||
765 | compatible = "fsl,mpc8548-pcie"; | ||
766 | device_type = "pci"; | ||
767 | #interrupt-cells = <1>; | ||
768 | #size-cells = <2>; | ||
769 | #address-cells = <3>; | ||
770 | reg = <0xf 0xffe0a000 0 0x1000>; | ||
771 | bus-range = <0 255>; | ||
772 | ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000 | ||
773 | 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>; | ||
774 | clock-frequency = <33333333>; | ||
775 | interrupt-parent = <&mpic>; | ||
776 | interrupts = <26 2>; | ||
777 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
778 | interrupt-map = < | ||
779 | /* IDSEL 0x0 */ | ||
780 | 0000 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
781 | 0000 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
782 | 0000 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
783 | 0000 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
784 | >; | ||
785 | pcie@0 { | ||
786 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
787 | #size-cells = <2>; | ||
788 | #address-cells = <3>; | ||
789 | device_type = "pci"; | ||
790 | ranges = <0x2000000 0x0 0xc0000000 | ||
791 | 0x2000000 0x0 0xc0000000 | ||
792 | 0x0 0x20000000 | ||
793 | |||
794 | 0x1000000 0x0 0x0 | ||
795 | 0x1000000 0x0 0x0 | ||
796 | 0x0 0x10000>; | ||
797 | }; | ||
798 | }; | ||
799 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts index fd462efa9e61..2bc0c7189653 100644 --- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts +++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | |||
@@ -6,7 +6,7 @@ | |||
6 | * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0, | 6 | * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0, |
7 | * eth1, crypto, pci0, pci1. | 7 | * eth1, crypto, pci0, pci1. |
8 | * | 8 | * |
9 | * Copyright 2007, 2008 Freescale Semiconductor Inc. | 9 | * Copyright 2007-2009 Freescale Semiconductor Inc. |
10 | * | 10 | * |
11 | * This program is free software; you can redistribute it and/or modify it | 11 | * This program is free software; you can redistribute it and/or modify it |
12 | * under the terms of the GNU General Public License as published by the | 12 | * under the terms of the GNU General Public License as published by the |
@@ -148,35 +148,38 @@ | |||
148 | }; | 148 | }; |
149 | }; | 149 | }; |
150 | 150 | ||
151 | mdio@24520 { | ||
152 | #address-cells = <1>; | ||
153 | #size-cells = <0>; | ||
154 | compatible = "fsl,gianfar-mdio"; | ||
155 | reg = <0x24520 0x20>; | ||
156 | |||
157 | phy0: ethernet-phy@0 { | ||
158 | interrupt-parent = <&mpic>; | ||
159 | interrupts = <10 1>; | ||
160 | reg = <0x0>; | ||
161 | }; | ||
162 | phy1: ethernet-phy@1 { | ||
163 | interrupt-parent = <&mpic>; | ||
164 | interrupts = <10 1>; | ||
165 | reg = <0x1>; | ||
166 | }; | ||
167 | }; | ||
168 | |||
169 | enet0: ethernet@24000 { | 151 | enet0: ethernet@24000 { |
152 | #address-cells = <1>; | ||
153 | #size-cells = <1>; | ||
170 | cell-index = <0>; | 154 | cell-index = <0>; |
171 | device_type = "network"; | 155 | device_type = "network"; |
172 | model = "eTSEC"; | 156 | model = "eTSEC"; |
173 | compatible = "gianfar"; | 157 | compatible = "gianfar"; |
174 | reg = <0x24000 0x1000>; | 158 | reg = <0x24000 0x1000>; |
159 | ranges = <0x0 0x24000 0x1000>; | ||
175 | local-mac-address = [ 00 00 00 00 00 00 ]; | 160 | local-mac-address = [ 00 00 00 00 00 00 ]; |
176 | interrupts = <29 2 30 2 34 2>; | 161 | interrupts = <29 2 30 2 34 2>; |
177 | interrupt-parent = <&mpic>; | 162 | interrupt-parent = <&mpic>; |
178 | phy-handle = <&phy0>; | 163 | phy-handle = <&phy0>; |
179 | phy-connection-type = "rgmii-id"; | 164 | phy-connection-type = "rgmii-id"; |
165 | |||
166 | mdio@520 { | ||
167 | #address-cells = <1>; | ||
168 | #size-cells = <0>; | ||
169 | compatible = "fsl,gianfar-mdio"; | ||
170 | reg = <0x520 0x20>; | ||
171 | |||
172 | phy0: ethernet-phy@0 { | ||
173 | interrupt-parent = <&mpic>; | ||
174 | interrupts = <10 1>; | ||
175 | reg = <0x0>; | ||
176 | }; | ||
177 | phy1: ethernet-phy@1 { | ||
178 | interrupt-parent = <&mpic>; | ||
179 | interrupts = <10 1>; | ||
180 | reg = <0x1>; | ||
181 | }; | ||
182 | }; | ||
180 | }; | 183 | }; |
181 | 184 | ||
182 | enet1: ethernet@25000 { | 185 | enet1: ethernet@25000 { |
@@ -227,7 +230,7 @@ | |||
227 | device_type = "open-pic"; | 230 | device_type = "open-pic"; |
228 | protected-sources = < | 231 | protected-sources = < |
229 | 31 32 33 37 38 39 /* enet2 enet3 */ | 232 | 31 32 33 37 38 39 /* enet2 enet3 */ |
230 | 76 77 78 79 27 42 /* dma2 pci2 serial*/ | 233 | 76 77 78 79 26 42 /* dma2 pci2 serial*/ |
231 | 0xe0 0xe1 0xe2 0xe3 /* msi */ | 234 | 0xe0 0xe1 0xe2 0xe3 /* msi */ |
232 | 0xe4 0xe5 0xe6 0xe7 | 235 | 0xe4 0xe5 0xe6 0xe7 |
233 | >; | 236 | >; |
@@ -376,7 +379,7 @@ | |||
376 | 379 | ||
377 | 0x1000000 0x0 0x0 | 380 | 0x1000000 0x0 0x0 |
378 | 0x1000000 0x0 0x0 | 381 | 0x1000000 0x0 0x0 |
379 | 0x0 0x100000>; | 382 | 0x0 0x10000>; |
380 | uli1575@0 { | 383 | uli1575@0 { |
381 | reg = <0x0 0x0 0x0 0x0 0x0>; | 384 | reg = <0x0 0x0 0x0 0x0 0x0>; |
382 | #size-cells = <2>; | 385 | #size-cells = <2>; |
@@ -387,7 +390,7 @@ | |||
387 | 390 | ||
388 | 0x1000000 0x0 0x0 | 391 | 0x1000000 0x0 0x0 |
389 | 0x1000000 0x0 0x0 | 392 | 0x1000000 0x0 0x0 |
390 | 0x0 0x100000>; | 393 | 0x0 0x10000>; |
391 | isa@1e { | 394 | isa@1e { |
392 | device_type = "isa"; | 395 | device_type = "isa"; |
393 | #interrupt-cells = <2>; | 396 | #interrupt-cells = <2>; |
@@ -477,7 +480,7 @@ | |||
477 | 480 | ||
478 | 0x1000000 0x0 0x0 | 481 | 0x1000000 0x0 0x0 |
479 | 0x1000000 0x0 0x0 | 482 | 0x1000000 0x0 0x0 |
480 | 0x0 0x100000>; | 483 | 0x0 0x10000>; |
481 | }; | 484 | }; |
482 | }; | 485 | }; |
483 | }; | 486 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts index e35230f2ac93..159cb3a875f0 100644 --- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts +++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | |||
@@ -7,7 +7,7 @@ | |||
7 | * | 7 | * |
8 | * Please note to add "-b 1" for core1's dts compiling. | 8 | * Please note to add "-b 1" for core1's dts compiling. |
9 | * | 9 | * |
10 | * Copyright 2007, 2008 Freescale Semiconductor Inc. | 10 | * Copyright 2007-2009 Freescale Semiconductor Inc. |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or modify it | 12 | * This program is free software; you can redistribute it and/or modify it |
13 | * under the terms of the GNU General Public License as published by the | 13 | * under the terms of the GNU General Public License as published by the |
@@ -186,7 +186,7 @@ | |||
186 | protected-sources = < | 186 | protected-sources = < |
187 | 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */ | 187 | 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */ |
188 | 29 30 34 35 36 40 /* enet0 enet1 */ | 188 | 29 30 34 35 36 40 /* enet0 enet1 */ |
189 | 24 26 20 21 22 23 /* pcie0 pcie1 dma1 */ | 189 | 24 25 20 21 22 23 /* pci0 pci1 dma1 */ |
190 | 43 /* i2c */ | 190 | 43 /* i2c */ |
191 | 0x1 0x2 0x3 0x4 /* pci slot */ | 191 | 0x1 0x2 0x3 0x4 /* pci slot */ |
192 | 0x9 0xa 0xb 0xc /* usb */ | 192 | 0x9 0xa 0xb 0xc /* usb */ |
@@ -228,7 +228,7 @@ | |||
228 | 228 | ||
229 | 0x1000000 0x0 0x0 | 229 | 0x1000000 0x0 0x0 |
230 | 0x1000000 0x0 0x0 | 230 | 0x1000000 0x0 0x0 |
231 | 0x0 0x100000>; | 231 | 0x0 0x10000>; |
232 | }; | 232 | }; |
233 | }; | 233 | }; |
234 | }; | 234 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts index f724d72c7b92..1bd3ebe11437 100644 --- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts +++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts | |||
@@ -217,6 +217,7 @@ | |||
217 | codec-handle = <&cs4270>; | 217 | codec-handle = <&cs4270>; |
218 | fsl,playback-dma = <&dma00>; | 218 | fsl,playback-dma = <&dma00>; |
219 | fsl,capture-dma = <&dma01>; | 219 | fsl,capture-dma = <&dma01>; |
220 | fsl,fifo-depth = <8>; | ||
220 | }; | 221 | }; |
221 | 222 | ||
222 | ssi@16100 { | 223 | ssi@16100 { |
@@ -225,6 +226,7 @@ | |||
225 | reg = <0x16100 0x100>; | 226 | reg = <0x16100 0x100>; |
226 | interrupt-parent = <&mpic>; | 227 | interrupt-parent = <&mpic>; |
227 | interrupts = <63 2>; | 228 | interrupts = <63 2>; |
229 | fsl,fifo-depth = <8>; | ||
228 | }; | 230 | }; |
229 | 231 | ||
230 | dma@21300 { | 232 | dma@21300 { |
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts index 4481532cbe77..d72beb192460 100644 --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts | |||
@@ -180,133 +180,144 @@ | |||
180 | }; | 180 | }; |
181 | }; | 181 | }; |
182 | 182 | ||
183 | mdio@24520 { | ||
184 | #address-cells = <1>; | ||
185 | #size-cells = <0>; | ||
186 | compatible = "fsl,gianfar-mdio"; | ||
187 | reg = <0x24520 0x20>; | ||
188 | |||
189 | phy0: ethernet-phy@0 { | ||
190 | interrupt-parent = <&mpic>; | ||
191 | interrupts = <10 1>; | ||
192 | reg = <0>; | ||
193 | device_type = "ethernet-phy"; | ||
194 | }; | ||
195 | phy1: ethernet-phy@1 { | ||
196 | interrupt-parent = <&mpic>; | ||
197 | interrupts = <10 1>; | ||
198 | reg = <1>; | ||
199 | device_type = "ethernet-phy"; | ||
200 | }; | ||
201 | phy2: ethernet-phy@2 { | ||
202 | interrupt-parent = <&mpic>; | ||
203 | interrupts = <10 1>; | ||
204 | reg = <2>; | ||
205 | device_type = "ethernet-phy"; | ||
206 | }; | ||
207 | phy3: ethernet-phy@3 { | ||
208 | interrupt-parent = <&mpic>; | ||
209 | interrupts = <10 1>; | ||
210 | reg = <3>; | ||
211 | device_type = "ethernet-phy"; | ||
212 | }; | ||
213 | tbi0: tbi-phy@11 { | ||
214 | reg = <0x11>; | ||
215 | device_type = "tbi-phy"; | ||
216 | }; | ||
217 | }; | ||
218 | |||
219 | mdio@25520 { | ||
220 | #address-cells = <1>; | ||
221 | #size-cells = <0>; | ||
222 | compatible = "fsl,gianfar-tbi"; | ||
223 | reg = <0x25520 0x20>; | ||
224 | |||
225 | tbi1: tbi-phy@11 { | ||
226 | reg = <0x11>; | ||
227 | device_type = "tbi-phy"; | ||
228 | }; | ||
229 | }; | ||
230 | |||
231 | mdio@26520 { | ||
232 | #address-cells = <1>; | ||
233 | #size-cells = <0>; | ||
234 | compatible = "fsl,gianfar-tbi"; | ||
235 | reg = <0x26520 0x20>; | ||
236 | |||
237 | tbi2: tbi-phy@11 { | ||
238 | reg = <0x11>; | ||
239 | device_type = "tbi-phy"; | ||
240 | }; | ||
241 | }; | ||
242 | |||
243 | mdio@27520 { | ||
244 | #address-cells = <1>; | ||
245 | #size-cells = <0>; | ||
246 | compatible = "fsl,gianfar-tbi"; | ||
247 | reg = <0x27520 0x20>; | ||
248 | |||
249 | tbi3: tbi-phy@11 { | ||
250 | reg = <0x11>; | ||
251 | device_type = "tbi-phy"; | ||
252 | }; | ||
253 | }; | ||
254 | |||
255 | |||
256 | enet0: ethernet@24000 { | 183 | enet0: ethernet@24000 { |
184 | #address-cells = <1>; | ||
185 | #size-cells = <1>; | ||
257 | cell-index = <0>; | 186 | cell-index = <0>; |
258 | device_type = "network"; | 187 | device_type = "network"; |
259 | model = "TSEC"; | 188 | model = "TSEC"; |
260 | compatible = "gianfar"; | 189 | compatible = "gianfar"; |
261 | reg = <0x24000 0x1000>; | 190 | reg = <0x24000 0x1000>; |
191 | ranges = <0x0 0x24000 0x1000>; | ||
262 | local-mac-address = [ 00 00 00 00 00 00 ]; | 192 | local-mac-address = [ 00 00 00 00 00 00 ]; |
263 | interrupts = <29 2 30 2 34 2>; | 193 | interrupts = <29 2 30 2 34 2>; |
264 | interrupt-parent = <&mpic>; | 194 | interrupt-parent = <&mpic>; |
265 | tbi-handle = <&tbi0>; | 195 | tbi-handle = <&tbi0>; |
266 | phy-handle = <&phy0>; | 196 | phy-handle = <&phy0>; |
267 | phy-connection-type = "rgmii-id"; | 197 | phy-connection-type = "rgmii-id"; |
198 | |||
199 | mdio@520 { | ||
200 | #address-cells = <1>; | ||
201 | #size-cells = <0>; | ||
202 | compatible = "fsl,gianfar-mdio"; | ||
203 | reg = <0x520 0x20>; | ||
204 | |||
205 | phy0: ethernet-phy@0 { | ||
206 | interrupt-parent = <&mpic>; | ||
207 | interrupts = <10 1>; | ||
208 | reg = <0>; | ||
209 | device_type = "ethernet-phy"; | ||
210 | }; | ||
211 | phy1: ethernet-phy@1 { | ||
212 | interrupt-parent = <&mpic>; | ||
213 | interrupts = <10 1>; | ||
214 | reg = <1>; | ||
215 | device_type = "ethernet-phy"; | ||
216 | }; | ||
217 | phy2: ethernet-phy@2 { | ||
218 | interrupt-parent = <&mpic>; | ||
219 | interrupts = <10 1>; | ||
220 | reg = <2>; | ||
221 | device_type = "ethernet-phy"; | ||
222 | }; | ||
223 | phy3: ethernet-phy@3 { | ||
224 | interrupt-parent = <&mpic>; | ||
225 | interrupts = <10 1>; | ||
226 | reg = <3>; | ||
227 | device_type = "ethernet-phy"; | ||
228 | }; | ||
229 | tbi0: tbi-phy@11 { | ||
230 | reg = <0x11>; | ||
231 | device_type = "tbi-phy"; | ||
232 | }; | ||
233 | }; | ||
268 | }; | 234 | }; |
269 | 235 | ||
270 | enet1: ethernet@25000 { | 236 | enet1: ethernet@25000 { |
237 | #address-cells = <1>; | ||
238 | #size-cells = <1>; | ||
271 | cell-index = <1>; | 239 | cell-index = <1>; |
272 | device_type = "network"; | 240 | device_type = "network"; |
273 | model = "TSEC"; | 241 | model = "TSEC"; |
274 | compatible = "gianfar"; | 242 | compatible = "gianfar"; |
275 | reg = <0x25000 0x1000>; | 243 | reg = <0x25000 0x1000>; |
244 | ranges = <0x0 0x25000 0x1000>; | ||
276 | local-mac-address = [ 00 00 00 00 00 00 ]; | 245 | local-mac-address = [ 00 00 00 00 00 00 ]; |
277 | interrupts = <35 2 36 2 40 2>; | 246 | interrupts = <35 2 36 2 40 2>; |
278 | interrupt-parent = <&mpic>; | 247 | interrupt-parent = <&mpic>; |
279 | tbi-handle = <&tbi1>; | 248 | tbi-handle = <&tbi1>; |
280 | phy-handle = <&phy1>; | 249 | phy-handle = <&phy1>; |
281 | phy-connection-type = "rgmii-id"; | 250 | phy-connection-type = "rgmii-id"; |
251 | |||
252 | mdio@520 { | ||
253 | #address-cells = <1>; | ||
254 | #size-cells = <0>; | ||
255 | compatible = "fsl,gianfar-tbi"; | ||
256 | reg = <0x520 0x20>; | ||
257 | |||
258 | tbi1: tbi-phy@11 { | ||
259 | reg = <0x11>; | ||
260 | device_type = "tbi-phy"; | ||
261 | }; | ||
262 | }; | ||
282 | }; | 263 | }; |
283 | 264 | ||
284 | enet2: ethernet@26000 { | 265 | enet2: ethernet@26000 { |
266 | #address-cells = <1>; | ||
267 | #size-cells = <1>; | ||
285 | cell-index = <2>; | 268 | cell-index = <2>; |
286 | device_type = "network"; | 269 | device_type = "network"; |
287 | model = "TSEC"; | 270 | model = "TSEC"; |
288 | compatible = "gianfar"; | 271 | compatible = "gianfar"; |
289 | reg = <0x26000 0x1000>; | 272 | reg = <0x26000 0x1000>; |
273 | ranges = <0x0 0x26000 0x1000>; | ||
290 | local-mac-address = [ 00 00 00 00 00 00 ]; | 274 | local-mac-address = [ 00 00 00 00 00 00 ]; |
291 | interrupts = <31 2 32 2 33 2>; | 275 | interrupts = <31 2 32 2 33 2>; |
292 | interrupt-parent = <&mpic>; | 276 | interrupt-parent = <&mpic>; |
293 | tbi-handle = <&tbi2>; | 277 | tbi-handle = <&tbi2>; |
294 | phy-handle = <&phy2>; | 278 | phy-handle = <&phy2>; |
295 | phy-connection-type = "rgmii-id"; | 279 | phy-connection-type = "rgmii-id"; |
280 | |||
281 | mdio@520 { | ||
282 | #address-cells = <1>; | ||
283 | #size-cells = <0>; | ||
284 | compatible = "fsl,gianfar-tbi"; | ||
285 | reg = <0x520 0x20>; | ||
286 | |||
287 | tbi2: tbi-phy@11 { | ||
288 | reg = <0x11>; | ||
289 | device_type = "tbi-phy"; | ||
290 | }; | ||
291 | }; | ||
296 | }; | 292 | }; |
297 | 293 | ||
298 | enet3: ethernet@27000 { | 294 | enet3: ethernet@27000 { |
295 | #address-cells = <1>; | ||
296 | #size-cells = <1>; | ||
299 | cell-index = <3>; | 297 | cell-index = <3>; |
300 | device_type = "network"; | 298 | device_type = "network"; |
301 | model = "TSEC"; | 299 | model = "TSEC"; |
302 | compatible = "gianfar"; | 300 | compatible = "gianfar"; |
303 | reg = <0x27000 0x1000>; | 301 | reg = <0x27000 0x1000>; |
302 | ranges = <0x0 0x27000 0x1000>; | ||
304 | local-mac-address = [ 00 00 00 00 00 00 ]; | 303 | local-mac-address = [ 00 00 00 00 00 00 ]; |
305 | interrupts = <37 2 38 2 39 2>; | 304 | interrupts = <37 2 38 2 39 2>; |
306 | interrupt-parent = <&mpic>; | 305 | interrupt-parent = <&mpic>; |
307 | tbi-handle = <&tbi3>; | 306 | tbi-handle = <&tbi3>; |
308 | phy-handle = <&phy3>; | 307 | phy-handle = <&phy3>; |
309 | phy-connection-type = "rgmii-id"; | 308 | phy-connection-type = "rgmii-id"; |
309 | |||
310 | mdio@520 { | ||
311 | #address-cells = <1>; | ||
312 | #size-cells = <0>; | ||
313 | compatible = "fsl,gianfar-tbi"; | ||
314 | reg = <0x520 0x20>; | ||
315 | |||
316 | tbi3: tbi-phy@11 { | ||
317 | reg = <0x11>; | ||
318 | device_type = "tbi-phy"; | ||
319 | }; | ||
320 | }; | ||
310 | }; | 321 | }; |
311 | 322 | ||
312 | serial0: serial@4500 { | 323 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts index be2c11ca0594..895834713894 100644 --- a/arch/powerpc/boot/dts/pcm030.dts +++ b/arch/powerpc/boot/dts/pcm030.dts | |||
@@ -19,6 +19,7 @@ | |||
19 | compatible = "phytec,pcm030"; | 19 | compatible = "phytec,pcm030"; |
20 | #address-cells = <1>; | 20 | #address-cells = <1>; |
21 | #size-cells = <1>; | 21 | #size-cells = <1>; |
22 | interrupt-parent = <&mpc5200_pic>; | ||
22 | 23 | ||
23 | cpus { | 24 | cpus { |
24 | #address-cells = <1>; | 25 | #address-cells = <1>; |
@@ -29,26 +30,26 @@ | |||
29 | reg = <0>; | 30 | reg = <0>; |
30 | d-cache-line-size = <32>; | 31 | d-cache-line-size = <32>; |
31 | i-cache-line-size = <32>; | 32 | i-cache-line-size = <32>; |
32 | d-cache-size = <0x4000>; /* L1, 16K */ | 33 | d-cache-size = <0x4000>; // L1, 16K |
33 | i-cache-size = <0x4000>; /* L1, 16K */ | 34 | i-cache-size = <0x4000>; // L1, 16K |
34 | timebase-frequency = <0>; /* From Bootloader */ | 35 | timebase-frequency = <0>; // from bootloader |
35 | bus-frequency = <0>; /* From Bootloader */ | 36 | bus-frequency = <0>; // from bootloader |
36 | clock-frequency = <0>; /* From Bootloader */ | 37 | clock-frequency = <0>; // from bootloader |
37 | }; | 38 | }; |
38 | }; | 39 | }; |
39 | 40 | ||
40 | memory { | 41 | memory { |
41 | device_type = "memory"; | 42 | device_type = "memory"; |
42 | reg = <0x00000000 0x04000000>; /* 64MB */ | 43 | reg = <0x00000000 0x04000000>; // 64MB |
43 | }; | 44 | }; |
44 | 45 | ||
45 | soc5200@f0000000 { | 46 | soc5200@f0000000 { |
46 | #address-cells = <1>; | 47 | #address-cells = <1>; |
47 | #size-cells = <1>; | 48 | #size-cells = <1>; |
48 | compatible = "fsl,mpc5200b-immr"; | 49 | compatible = "fsl,mpc5200b-immr"; |
49 | ranges = <0x0 0xf0000000 0x0000c000>; | 50 | ranges = <0 0xf0000000 0x0000c000>; |
50 | bus-frequency = <0>; /* From bootloader */ | 51 | bus-frequency = <0>; // from bootloader |
51 | system-frequency = <0>; /* From bootloader */ | 52 | system-frequency = <0>; // from bootloader |
52 | 53 | ||
53 | cdm@200 { | 54 | cdm@200 { |
54 | compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; | 55 | compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; |
@@ -56,87 +57,70 @@ | |||
56 | }; | 57 | }; |
57 | 58 | ||
58 | mpc5200_pic: interrupt-controller@500 { | 59 | mpc5200_pic: interrupt-controller@500 { |
59 | /* 5200 interrupts are encoded into two levels; */ | 60 | // 5200 interrupts are encoded into two levels; |
60 | interrupt-controller; | 61 | interrupt-controller; |
61 | #interrupt-cells = <3>; | 62 | #interrupt-cells = <3>; |
62 | device_type = "interrupt-controller"; | ||
63 | compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; | 63 | compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; |
64 | reg = <0x500 0x80>; | 64 | reg = <0x500 0x80>; |
65 | }; | 65 | }; |
66 | 66 | ||
67 | timer@600 { /* General Purpose Timer */ | 67 | timer@600 { // General Purpose Timer |
68 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 68 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
69 | cell-index = <0>; | ||
70 | reg = <0x600 0x10>; | 69 | reg = <0x600 0x10>; |
71 | interrupts = <0x1 0x9 0x0>; | 70 | interrupts = <1 9 0>; |
72 | interrupt-parent = <&mpc5200_pic>; | ||
73 | fsl,has-wdt; | 71 | fsl,has-wdt; |
74 | }; | 72 | }; |
75 | 73 | ||
76 | timer@610 { /* General Purpose Timer */ | 74 | timer@610 { // General Purpose Timer |
77 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | 75 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; |
78 | cell-index = <1>; | ||
79 | reg = <0x610 0x10>; | 76 | reg = <0x610 0x10>; |
80 | interrupts = <0x1 0xa 0x0>; | 77 | interrupts = <1 10 0>; |
81 | interrupt-parent = <&mpc5200_pic>; | ||
82 | }; | 78 | }; |
83 | 79 | ||
84 | gpt2: timer@620 { /* General Purpose Timer in GPIO mode */ | 80 | gpt2: timer@620 { // General Purpose Timer in GPIO mode |
85 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; | 81 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; |
86 | cell-index = <2>; | ||
87 | reg = <0x620 0x10>; | 82 | reg = <0x620 0x10>; |
88 | interrupts = <0x1 0xb 0x0>; | 83 | interrupts = <1 11 0>; |
89 | interrupt-parent = <&mpc5200_pic>; | ||
90 | gpio-controller; | 84 | gpio-controller; |
91 | #gpio-cells = <2>; | 85 | #gpio-cells = <2>; |
92 | }; | 86 | }; |
93 | 87 | ||
94 | gpt3: timer@630 { /* General Purpose Timer in GPIO mode */ | 88 | gpt3: timer@630 { // General Purpose Timer in GPIO mode |
95 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; | 89 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; |
96 | cell-index = <3>; | ||
97 | reg = <0x630 0x10>; | 90 | reg = <0x630 0x10>; |
98 | interrupts = <0x1 0xc 0x0>; | 91 | interrupts = <1 12 0>; |
99 | interrupt-parent = <&mpc5200_pic>; | ||
100 | gpio-controller; | 92 | gpio-controller; |
101 | #gpio-cells = <2>; | 93 | #gpio-cells = <2>; |
102 | }; | 94 | }; |
103 | 95 | ||
104 | gpt4: timer@640 { /* General Purpose Timer in GPIO mode */ | 96 | gpt4: timer@640 { // General Purpose Timer in GPIO mode |
105 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; | 97 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; |
106 | cell-index = <4>; | ||
107 | reg = <0x640 0x10>; | 98 | reg = <0x640 0x10>; |
108 | interrupts = <0x1 0xd 0x0>; | 99 | interrupts = <1 13 0>; |
109 | interrupt-parent = <&mpc5200_pic>; | ||
110 | gpio-controller; | 100 | gpio-controller; |
111 | #gpio-cells = <2>; | 101 | #gpio-cells = <2>; |
112 | }; | 102 | }; |
113 | 103 | ||
114 | gpt5: timer@650 { /* General Purpose Timer in GPIO mode */ | 104 | gpt5: timer@650 { // General Purpose Timer in GPIO mode |
115 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; | 105 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; |
116 | cell-index = <5>; | ||
117 | reg = <0x650 0x10>; | 106 | reg = <0x650 0x10>; |
118 | interrupts = <0x1 0xe 0x0>; | 107 | interrupts = <1 14 0>; |
119 | interrupt-parent = <&mpc5200_pic>; | ||
120 | gpio-controller; | 108 | gpio-controller; |
121 | #gpio-cells = <2>; | 109 | #gpio-cells = <2>; |
122 | }; | 110 | }; |
123 | 111 | ||
124 | gpt6: timer@660 { /* General Purpose Timer in GPIO mode */ | 112 | gpt6: timer@660 { // General Purpose Timer in GPIO mode |
125 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; | 113 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; |
126 | cell-index = <6>; | ||
127 | reg = <0x660 0x10>; | 114 | reg = <0x660 0x10>; |
128 | interrupts = <0x1 0xf 0x0>; | 115 | interrupts = <1 15 0>; |
129 | interrupt-parent = <&mpc5200_pic>; | ||
130 | gpio-controller; | 116 | gpio-controller; |
131 | #gpio-cells = <2>; | 117 | #gpio-cells = <2>; |
132 | }; | 118 | }; |
133 | 119 | ||
134 | gpt7: timer@670 { /* General Purpose Timer in GPIO mode */ | 120 | gpt7: timer@670 { // General Purpose Timer in GPIO mode |
135 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; | 121 | compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; |
136 | cell-index = <7>; | ||
137 | reg = <0x670 0x10>; | 122 | reg = <0x670 0x10>; |
138 | interrupts = <0x1 0x10 0x0>; | 123 | interrupts = <1 16 0>; |
139 | interrupt-parent = <&mpc5200_pic>; | ||
140 | gpio-controller; | 124 | gpio-controller; |
141 | #gpio-cells = <2>; | 125 | #gpio-cells = <2>; |
142 | }; | 126 | }; |
@@ -144,40 +128,33 @@ | |||
144 | rtc@800 { // Real time clock | 128 | rtc@800 { // Real time clock |
145 | compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; | 129 | compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; |
146 | reg = <0x800 0x100>; | 130 | reg = <0x800 0x100>; |
147 | interrupts = <0x1 0x5 0x0 0x1 0x6 0x0>; | 131 | interrupts = <1 5 0 1 6 0>; |
148 | interrupt-parent = <&mpc5200_pic>; | ||
149 | }; | 132 | }; |
150 | 133 | ||
151 | can@900 { | 134 | can@900 { |
152 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; | 135 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; |
153 | cell-index = <0>; | 136 | interrupts = <2 17 0>; |
154 | interrupts = <0x2 0x11 0x0>; | ||
155 | interrupt-parent = <&mpc5200_pic>; | ||
156 | reg = <0x900 0x80>; | 137 | reg = <0x900 0x80>; |
157 | }; | 138 | }; |
158 | 139 | ||
159 | can@980 { | 140 | can@980 { |
160 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; | 141 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; |
161 | cell-index = <1>; | 142 | interrupts = <2 18 0>; |
162 | interrupts = <0x2 0x12 0x0>; | ||
163 | interrupt-parent = <&mpc5200_pic>; | ||
164 | reg = <0x980 0x80>; | 143 | reg = <0x980 0x80>; |
165 | }; | 144 | }; |
166 | 145 | ||
167 | gpio_simple: gpio@b00 { | 146 | gpio_simple: gpio@b00 { |
168 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; | 147 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; |
169 | reg = <0xb00 0x40>; | 148 | reg = <0xb00 0x40>; |
170 | interrupts = <0x1 0x7 0x0>; | 149 | interrupts = <1 7 0>; |
171 | interrupt-parent = <&mpc5200_pic>; | ||
172 | gpio-controller; | 150 | gpio-controller; |
173 | #gpio-cells = <2>; | 151 | #gpio-cells = <2>; |
174 | }; | 152 | }; |
175 | 153 | ||
176 | gpio_wkup: gpio-wkup@c00 { | 154 | gpio_wkup: gpio@c00 { |
177 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; | 155 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; |
178 | reg = <0xc00 0x40>; | 156 | reg = <0xc00 0x40>; |
179 | interrupts = <0x1 0x8 0x0 0x0 0x3 0x0>; | 157 | interrupts = <1 8 0 0 3 0>; |
180 | interrupt-parent = <&mpc5200_pic>; | ||
181 | gpio-controller; | 158 | gpio-controller; |
182 | #gpio-cells = <2>; | 159 | #gpio-cells = <2>; |
183 | }; | 160 | }; |
@@ -185,26 +162,22 @@ | |||
185 | spi@f00 { | 162 | spi@f00 { |
186 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; | 163 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; |
187 | reg = <0xf00 0x20>; | 164 | reg = <0xf00 0x20>; |
188 | interrupts = <0x2 0xd 0x0 0x2 0xe 0x0>; | 165 | interrupts = <2 13 0 2 14 0>; |
189 | interrupt-parent = <&mpc5200_pic>; | ||
190 | }; | 166 | }; |
191 | 167 | ||
192 | usb@1000 { | 168 | usb@1000 { |
193 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; | 169 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; |
194 | reg = <0x1000 0xff>; | 170 | reg = <0x1000 0xff>; |
195 | interrupts = <0x2 0x6 0x0>; | 171 | interrupts = <2 6 0>; |
196 | interrupt-parent = <&mpc5200_pic>; | ||
197 | }; | 172 | }; |
198 | 173 | ||
199 | dma-controller@1200 { | 174 | dma-controller@1200 { |
200 | device_type = "dma-controller"; | ||
201 | compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; | 175 | compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; |
202 | reg = <0x1200 0x80>; | 176 | reg = <0x1200 0x80>; |
203 | interrupts = <0x3 0x0 0x0 0x3 0x1 0x0 0x3 0x2 0x0 0x3 0x3 0x0 | 177 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 |
204 | 0x3 0x4 0x0 0x3 0x5 0x0 0x3 0x6 0x0 0x3 0x7 0x0 | 178 | 3 4 0 3 5 0 3 6 0 3 7 0 |
205 | 0x3 0x8 0x0 0x3 0x9 0x0 0x3 0xa 0x0 0x3 0xb 0x0 | 179 | 3 8 0 3 9 0 3 10 0 3 11 0 |
206 | 0x3 0xc 0x0 0x3 0xd 0x0 0x3 0xe 0x0 0x3 0xf 0x0>; | 180 | 3 12 0 3 13 0 3 14 0 3 15 0>; |
207 | interrupt-parent = <&mpc5200_pic>; | ||
208 | }; | 181 | }; |
209 | 182 | ||
210 | xlb@1f00 { | 183 | xlb@1f00 { |
@@ -213,24 +186,19 @@ | |||
213 | }; | 186 | }; |
214 | 187 | ||
215 | ac97@2000 { /* PSC1 in ac97 mode */ | 188 | ac97@2000 { /* PSC1 in ac97 mode */ |
216 | device_type = "sound"; | ||
217 | compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; | 189 | compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; |
218 | cell-index = <0>; | 190 | cell-index = <0>; |
219 | reg = <0x2000 0x100>; | 191 | reg = <0x2000 0x100>; |
220 | interrupts = <0x2 0x2 0x0>; | 192 | interrupts = <2 1 0>; |
221 | interrupt-parent = <&mpc5200_pic>; | ||
222 | }; | 193 | }; |
223 | 194 | ||
224 | /* PSC2 port is used by CAN1/2 */ | 195 | /* PSC2 port is used by CAN1/2 */ |
225 | 196 | ||
226 | serial@2400 { /* PSC3 in UART mode */ | 197 | serial@2400 { /* PSC3 in UART mode */ |
227 | device_type = "serial"; | ||
228 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 198 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
229 | port-number = <0>; | ||
230 | cell-index = <2>; | 199 | cell-index = <2>; |
231 | reg = <0x2400 0x100>; | 200 | reg = <0x2400 0x100>; |
232 | interrupts = <0x2 0x3 0x0>; | 201 | interrupts = <2 3 0>; |
233 | interrupt-parent = <&mpc5200_pic>; | ||
234 | }; | 202 | }; |
235 | 203 | ||
236 | /* PSC4 is ??? */ | 204 | /* PSC4 is ??? */ |
@@ -238,55 +206,44 @@ | |||
238 | /* PSC5 is ??? */ | 206 | /* PSC5 is ??? */ |
239 | 207 | ||
240 | serial@2c00 { /* PSC6 in UART mode */ | 208 | serial@2c00 { /* PSC6 in UART mode */ |
241 | device_type = "serial"; | ||
242 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 209 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
243 | port-number = <1>; | ||
244 | cell-index = <5>; | 210 | cell-index = <5>; |
245 | reg = <0x2c00 0x100>; | 211 | reg = <0x2c00 0x100>; |
246 | interrupts = <0x2 0x4 0x0>; | 212 | interrupts = <2 4 0>; |
247 | interrupt-parent = <&mpc5200_pic>; | ||
248 | }; | 213 | }; |
249 | 214 | ||
250 | ethernet@3000 { | 215 | ethernet@3000 { |
251 | device_type = "network"; | ||
252 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; | 216 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; |
253 | reg = <0x3000 0x400>; | 217 | reg = <0x3000 0x400>; |
254 | local-mac-address = [00 00 00 00 00 00]; | 218 | local-mac-address = [ 00 00 00 00 00 00 ]; |
255 | interrupts = <0x2 0x5 0x0>; | 219 | interrupts = <2 5 0>; |
256 | interrupt-parent = <&mpc5200_pic>; | ||
257 | phy-handle = <&phy0>; | 220 | phy-handle = <&phy0>; |
258 | }; | 221 | }; |
259 | 222 | ||
260 | mdio@3000 { | 223 | mdio@3000 { |
261 | #address-cells = <1>; | 224 | #address-cells = <1>; |
262 | #size-cells = <0>; | 225 | #size-cells = <0>; |
263 | compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio"; | 226 | compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; |
264 | reg = <0x3000 0x400>; /* fec range, since we need to setup fec interrupts */ | 227 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts |
265 | interrupts = <0x2 0x5 0x0>; /* these are for "mii command finished", not link changes & co. */ | 228 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. |
266 | interrupt-parent = <&mpc5200_pic>; | 229 | |
267 | 230 | phy0: ethernet-phy@0 { | |
268 | phy0:ethernet-phy@0 { | 231 | reg = <0>; |
269 | device_type = "ethernet-phy"; | ||
270 | reg = <0x0>; | ||
271 | }; | 232 | }; |
272 | }; | 233 | }; |
273 | 234 | ||
274 | ata@3a00 { | 235 | ata@3a00 { |
275 | device_type = "ata"; | ||
276 | compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; | 236 | compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; |
277 | reg = <0x3a00 0x100>; | 237 | reg = <0x3a00 0x100>; |
278 | interrupts = <0x2 0x7 0x0>; | 238 | interrupts = <2 7 0>; |
279 | interrupt-parent = <&mpc5200_pic>; | ||
280 | }; | 239 | }; |
281 | 240 | ||
282 | i2c@3d00 { | 241 | i2c@3d00 { |
283 | #address-cells = <1>; | 242 | #address-cells = <1>; |
284 | #size-cells = <0>; | 243 | #size-cells = <0>; |
285 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | 244 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; |
286 | cell-index = <0>; | ||
287 | reg = <0x3d00 0x40>; | 245 | reg = <0x3d00 0x40>; |
288 | interrupts = <0x2 0xf 0x0>; | 246 | interrupts = <2 15 0>; |
289 | interrupt-parent = <&mpc5200_pic>; | ||
290 | fsl5200-clocking; | 247 | fsl5200-clocking; |
291 | }; | 248 | }; |
292 | 249 | ||
@@ -294,10 +251,8 @@ | |||
294 | #address-cells = <1>; | 251 | #address-cells = <1>; |
295 | #size-cells = <0>; | 252 | #size-cells = <0>; |
296 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | 253 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; |
297 | cell-index = <1>; | ||
298 | reg = <0x3d40 0x40>; | 254 | reg = <0x3d40 0x40>; |
299 | interrupts = <0x2 0x10 0x0>; | 255 | interrupts = <2 16 0>; |
300 | interrupt-parent = <&mpc5200_pic>; | ||
301 | fsl5200-clocking; | 256 | fsl5200-clocking; |
302 | rtc@51 { | 257 | rtc@51 { |
303 | compatible = "nxp,pcf8563"; | 258 | compatible = "nxp,pcf8563"; |
@@ -307,7 +262,7 @@ | |||
307 | }; | 262 | }; |
308 | 263 | ||
309 | sram@8000 { | 264 | sram@8000 { |
310 | compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram"; | 265 | compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; |
311 | reg = <0x8000 0x4000>; | 266 | reg = <0x8000 0x4000>; |
312 | }; | 267 | }; |
313 | 268 | ||
@@ -340,22 +295,21 @@ | |||
340 | device_type = "pci"; | 295 | device_type = "pci"; |
341 | compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; | 296 | compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; |
342 | reg = <0xf0000d00 0x100>; | 297 | reg = <0xf0000d00 0x100>; |
343 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 298 | interrupt-map-mask = <0xf800 0 0 7>; |
344 | interrupt-map = <0xc000 0x0 0x0 0x1 &mpc5200_pic 0x0 0x0 0x3 /* 1st slot */ | 299 | interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot |
345 | 0xc000 0x0 0x0 0x2 &mpc5200_pic 0x1 0x1 0x3 | 300 | 0xc000 0 0 2 &mpc5200_pic 1 1 3 |
346 | 0xc000 0x0 0x0 0x3 &mpc5200_pic 0x1 0x2 0x3 | 301 | 0xc000 0 0 3 &mpc5200_pic 1 2 3 |
347 | 0xc000 0x0 0x0 0x4 &mpc5200_pic 0x1 0x3 0x3 | 302 | 0xc000 0 0 4 &mpc5200_pic 1 3 3 |
348 | 303 | ||
349 | 0xc800 0x0 0x0 0x1 &mpc5200_pic 0x1 0x1 0x3 /* 2nd slot */ | 304 | 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot |
350 | 0xc800 0x0 0x0 0x2 &mpc5200_pic 0x1 0x2 0x3 | 305 | 0xc800 0 0 2 &mpc5200_pic 1 2 3 |
351 | 0xc800 0x0 0x0 0x3 &mpc5200_pic 0x1 0x3 0x3 | 306 | 0xc800 0 0 3 &mpc5200_pic 1 3 3 |
352 | 0xc800 0x0 0x0 0x4 &mpc5200_pic 0x0 0x0 0x3>; | 307 | 0xc800 0 0 4 &mpc5200_pic 0 0 3>; |
353 | clock-frequency = <0>; // From boot loader | 308 | clock-frequency = <0>; // From boot loader |
354 | interrupts = <0x2 0x8 0x0 0x2 0x9 0x0 0x2 0xa 0x0>; | 309 | interrupts = <2 8 0 2 9 0 2 10 0>; |
355 | interrupt-parent = <&mpc5200_pic>; | ||
356 | bus-range = <0 0>; | 310 | bus-range = <0 0>; |
357 | ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000 | 311 | ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 |
358 | 0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 | 312 | 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 |
359 | 0x01000000 0x0 0x00000000 0xb0000000 0x0 0x01000000>; | 313 | 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; |
360 | }; | 314 | }; |
361 | }; | 315 | }; |
diff --git a/arch/powerpc/boot/dts/pcm032.dts b/arch/powerpc/boot/dts/pcm032.dts new file mode 100644 index 000000000000..030042678392 --- /dev/null +++ b/arch/powerpc/boot/dts/pcm032.dts | |||
@@ -0,0 +1,392 @@ | |||
1 | /* | ||
2 | * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source | ||
3 | * | ||
4 | * Copyright (C) 2006-2009 Pengutronix | ||
5 | * Sascha Hauer <s.hauer@pengutronix.de> | ||
6 | * Juergen Beisert <j.beisert@pengutronix.de> | ||
7 | * Wolfram Sang <w.sang@pengutronix.de> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | */ | ||
14 | |||
15 | /dts-v1/; | ||
16 | |||
17 | / { | ||
18 | model = "phytec,pcm032"; | ||
19 | compatible = "phytec,pcm032"; | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <1>; | ||
22 | interrupt-parent = <&mpc5200_pic>; | ||
23 | |||
24 | cpus { | ||
25 | #address-cells = <1>; | ||
26 | #size-cells = <0>; | ||
27 | |||
28 | PowerPC,5200@0 { | ||
29 | device_type = "cpu"; | ||
30 | reg = <0>; | ||
31 | d-cache-line-size = <32>; | ||
32 | i-cache-line-size = <32>; | ||
33 | d-cache-size = <0x4000>; // L1, 16K | ||
34 | i-cache-size = <0x4000>; // L1, 16K | ||
35 | timebase-frequency = <0>; // from bootloader | ||
36 | bus-frequency = <0>; // from bootloader | ||
37 | clock-frequency = <0>; // from bootloader | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | memory { | ||
42 | device_type = "memory"; | ||
43 | reg = <0x00000000 0x08000000>; // 128MB | ||
44 | }; | ||
45 | |||
46 | soc5200@f0000000 { | ||
47 | #address-cells = <1>; | ||
48 | #size-cells = <1>; | ||
49 | compatible = "fsl,mpc5200b-immr"; | ||
50 | ranges = <0 0xf0000000 0x0000c000>; | ||
51 | bus-frequency = <0>; // from bootloader | ||
52 | system-frequency = <0>; // from bootloader | ||
53 | |||
54 | cdm@200 { | ||
55 | compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; | ||
56 | reg = <0x200 0x38>; | ||
57 | }; | ||
58 | |||
59 | mpc5200_pic: interrupt-controller@500 { | ||
60 | // 5200 interrupts are encoded into two levels; | ||
61 | interrupt-controller; | ||
62 | #interrupt-cells = <3>; | ||
63 | compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; | ||
64 | reg = <0x500 0x80>; | ||
65 | }; | ||
66 | |||
67 | timer@600 { // General Purpose Timer | ||
68 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
69 | reg = <0x600 0x10>; | ||
70 | interrupts = <1 9 0>; | ||
71 | fsl,has-wdt; | ||
72 | }; | ||
73 | |||
74 | timer@610 { // General Purpose Timer | ||
75 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
76 | reg = <0x610 0x10>; | ||
77 | interrupts = <1 10 0>; | ||
78 | }; | ||
79 | |||
80 | gpt2: timer@620 { // General Purpose Timer in GPIO mode | ||
81 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
82 | reg = <0x620 0x10>; | ||
83 | interrupts = <1 11 0>; | ||
84 | gpio-controller; | ||
85 | #gpio-cells = <2>; | ||
86 | }; | ||
87 | |||
88 | gpt3: timer@630 { // General Purpose Timer in GPIO mode | ||
89 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
90 | reg = <0x630 0x10>; | ||
91 | interrupts = <1 12 0>; | ||
92 | gpio-controller; | ||
93 | #gpio-cells = <2>; | ||
94 | }; | ||
95 | |||
96 | gpt4: timer@640 { // General Purpose Timer in GPIO mode | ||
97 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
98 | reg = <0x640 0x10>; | ||
99 | interrupts = <1 13 0>; | ||
100 | gpio-controller; | ||
101 | #gpio-cells = <2>; | ||
102 | }; | ||
103 | |||
104 | gpt5: timer@650 { // General Purpose Timer in GPIO mode | ||
105 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
106 | reg = <0x650 0x10>; | ||
107 | interrupts = <1 14 0>; | ||
108 | gpio-controller; | ||
109 | #gpio-cells = <2>; | ||
110 | }; | ||
111 | |||
112 | gpt6: timer@660 { // General Purpose Timer in GPIO mode | ||
113 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
114 | reg = <0x660 0x10>; | ||
115 | interrupts = <1 15 0>; | ||
116 | gpio-controller; | ||
117 | #gpio-cells = <2>; | ||
118 | }; | ||
119 | |||
120 | gpt7: timer@670 { // General Purpose Timer in GPIO mode | ||
121 | compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; | ||
122 | reg = <0x670 0x10>; | ||
123 | interrupts = <1 16 0>; | ||
124 | gpio-controller; | ||
125 | #gpio-cells = <2>; | ||
126 | }; | ||
127 | |||
128 | rtc@800 { // Real time clock | ||
129 | compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; | ||
130 | reg = <0x800 0x100>; | ||
131 | interrupts = <1 5 0 1 6 0>; | ||
132 | }; | ||
133 | |||
134 | can@900 { | ||
135 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; | ||
136 | interrupts = <2 17 0>; | ||
137 | reg = <0x900 0x80>; | ||
138 | }; | ||
139 | |||
140 | can@980 { | ||
141 | compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; | ||
142 | interrupts = <2 18 0>; | ||
143 | reg = <0x980 0x80>; | ||
144 | }; | ||
145 | |||
146 | gpio_simple: gpio@b00 { | ||
147 | compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; | ||
148 | reg = <0xb00 0x40>; | ||
149 | interrupts = <1 7 0>; | ||
150 | gpio-controller; | ||
151 | #gpio-cells = <2>; | ||
152 | }; | ||
153 | |||
154 | gpio_wkup: gpio@c00 { | ||
155 | compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; | ||
156 | reg = <0xc00 0x40>; | ||
157 | interrupts = <1 8 0 0 3 0>; | ||
158 | gpio-controller; | ||
159 | #gpio-cells = <2>; | ||
160 | }; | ||
161 | |||
162 | spi@f00 { | ||
163 | compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; | ||
164 | reg = <0xf00 0x20>; | ||
165 | interrupts = <2 13 0 2 14 0>; | ||
166 | }; | ||
167 | |||
168 | usb@1000 { | ||
169 | compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; | ||
170 | reg = <0x1000 0xff>; | ||
171 | interrupts = <2 6 0>; | ||
172 | }; | ||
173 | |||
174 | dma-controller@1200 { | ||
175 | compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; | ||
176 | reg = <0x1200 0x80>; | ||
177 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 | ||
178 | 3 4 0 3 5 0 3 6 0 3 7 0 | ||
179 | 3 8 0 3 9 0 3 10 0 3 11 0 | ||
180 | 3 12 0 3 13 0 3 14 0 3 15 0>; | ||
181 | }; | ||
182 | |||
183 | xlb@1f00 { | ||
184 | compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; | ||
185 | reg = <0x1f00 0x100>; | ||
186 | }; | ||
187 | |||
188 | ac97@2000 { /* PSC1 is ac97 */ | ||
189 | compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; | ||
190 | cell-index = <0>; | ||
191 | reg = <0x2000 0x100>; | ||
192 | interrupts = <2 1 0>; | ||
193 | }; | ||
194 | |||
195 | /* PSC2 port is used by CAN1/2 */ | ||
196 | |||
197 | serial@2400 { /* PSC3 in UART mode */ | ||
198 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | ||
199 | cell-index = <2>; | ||
200 | reg = <0x2400 0x100>; | ||
201 | interrupts = <2 3 0>; | ||
202 | }; | ||
203 | |||
204 | /* PSC4 is ??? */ | ||
205 | |||
206 | /* PSC5 is ??? */ | ||
207 | |||
208 | serial@2c00 { /* PSC6 in UART mode */ | ||
209 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | ||
210 | cell-index = <5>; | ||
211 | reg = <0x2c00 0x100>; | ||
212 | interrupts = <2 4 0>; | ||
213 | }; | ||
214 | |||
215 | ethernet@3000 { | ||
216 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; | ||
217 | reg = <0x3000 0x400>; | ||
218 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
219 | interrupts = <2 5 0>; | ||
220 | phy-handle = <&phy0>; | ||
221 | }; | ||
222 | |||
223 | mdio@3000 { | ||
224 | #address-cells = <1>; | ||
225 | #size-cells = <0>; | ||
226 | compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; | ||
227 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts | ||
228 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. | ||
229 | |||
230 | phy0: ethernet-phy@0 { | ||
231 | reg = <0>; | ||
232 | }; | ||
233 | }; | ||
234 | |||
235 | ata@3a00 { | ||
236 | compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; | ||
237 | reg = <0x3a00 0x100>; | ||
238 | interrupts = <2 7 0>; | ||
239 | }; | ||
240 | |||
241 | i2c@3d00 { | ||
242 | #address-cells = <1>; | ||
243 | #size-cells = <0>; | ||
244 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | ||
245 | reg = <0x3d00 0x40>; | ||
246 | interrupts = <2 15 0>; | ||
247 | fsl5200-clocking; | ||
248 | }; | ||
249 | |||
250 | i2c@3d40 { | ||
251 | #address-cells = <1>; | ||
252 | #size-cells = <0>; | ||
253 | compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | ||
254 | reg = <0x3d40 0x40>; | ||
255 | interrupts = <2 16 0>; | ||
256 | fsl5200-clocking; | ||
257 | rtc@51 { | ||
258 | compatible = "nxp,pcf8563"; | ||
259 | reg = <0x51>; | ||
260 | }; | ||
261 | eeprom@52 { | ||
262 | compatible = "at24,24c32"; | ||
263 | reg = <0x52>; | ||
264 | }; | ||
265 | }; | ||
266 | |||
267 | sram@8000 { | ||
268 | compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; | ||
269 | reg = <0x8000 0x4000>; | ||
270 | }; | ||
271 | }; | ||
272 | |||
273 | pci@f0000d00 { | ||
274 | #interrupt-cells = <1>; | ||
275 | #size-cells = <2>; | ||
276 | #address-cells = <3>; | ||
277 | device_type = "pci"; | ||
278 | compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; | ||
279 | reg = <0xf0000d00 0x100>; | ||
280 | interrupt-map-mask = <0xf800 0 0 7>; | ||
281 | interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot | ||
282 | 0xc000 0 0 2 &mpc5200_pic 1 1 3 | ||
283 | 0xc000 0 0 3 &mpc5200_pic 1 2 3 | ||
284 | 0xc000 0 0 4 &mpc5200_pic 1 3 3 | ||
285 | |||
286 | 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot | ||
287 | 0xc800 0 0 2 &mpc5200_pic 1 2 3 | ||
288 | 0xc800 0 0 3 &mpc5200_pic 1 3 3 | ||
289 | 0xc800 0 0 4 &mpc5200_pic 0 0 3>; | ||
290 | clock-frequency = <0>; // From boot loader | ||
291 | interrupts = <2 8 0 2 9 0 2 10 0>; | ||
292 | bus-range = <0 0>; | ||
293 | ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 | ||
294 | 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 | ||
295 | 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; | ||
296 | }; | ||
297 | |||
298 | localbus { | ||
299 | compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus"; | ||
300 | |||
301 | #address-cells = <2>; | ||
302 | #size-cells = <1>; | ||
303 | |||
304 | ranges = <0 0 0xfe000000 0x02000000 | ||
305 | 1 0 0xfc000000 0x02000000 | ||
306 | 2 0 0xfbe00000 0x00200000 | ||
307 | 3 0 0xf9e00000 0x02000000 | ||
308 | 4 0 0xf7e00000 0x02000000 | ||
309 | 5 0 0xe6000000 0x02000000 | ||
310 | 6 0 0xe8000000 0x02000000 | ||
311 | 7 0 0xea000000 0x02000000>; | ||
312 | |||
313 | flash@0,0 { | ||
314 | compatible = "cfi-flash"; | ||
315 | reg = <0 0 0x02000000>; | ||
316 | bank-width = <4>; | ||
317 | #size-cells = <1>; | ||
318 | #address-cells = <1>; | ||
319 | |||
320 | partition@0 { | ||
321 | label = "ubootl"; | ||
322 | reg = <0x00000000 0x00040000>; | ||
323 | }; | ||
324 | partition@40000 { | ||
325 | label = "kernel"; | ||
326 | reg = <0x00040000 0x001c0000>; | ||
327 | }; | ||
328 | partition@200000 { | ||
329 | label = "jffs2"; | ||
330 | reg = <0x00200000 0x01d00000>; | ||
331 | }; | ||
332 | partition@1f00000 { | ||
333 | label = "uboot"; | ||
334 | reg = <0x01f00000 0x00040000>; | ||
335 | }; | ||
336 | partition@1f40000 { | ||
337 | label = "env"; | ||
338 | reg = <0x01f40000 0x00040000>; | ||
339 | }; | ||
340 | partition@1f80000 { | ||
341 | label = "oftree"; | ||
342 | reg = <0x01f80000 0x00040000>; | ||
343 | }; | ||
344 | partition@1fc0000 { | ||
345 | label = "space"; | ||
346 | reg = <0x01fc0000 0x00040000>; | ||
347 | }; | ||
348 | }; | ||
349 | |||
350 | sram@2,0 { | ||
351 | compatible = "mtd-ram"; | ||
352 | reg = <2 0 0x00200000>; | ||
353 | bank-width = <2>; | ||
354 | }; | ||
355 | |||
356 | /* | ||
357 | * example snippets for FPGA | ||
358 | * | ||
359 | * fpga@3,0 { | ||
360 | * compatible = "fpga_driver"; | ||
361 | * reg = <3 0 0x02000000>; | ||
362 | * bank-width = <4>; | ||
363 | * }; | ||
364 | * | ||
365 | * fpga@4,0 { | ||
366 | * compatible = "fpga_driver"; | ||
367 | * reg = <4 0 0x02000000>; | ||
368 | * bank-width = <4>; | ||
369 | * }; | ||
370 | */ | ||
371 | |||
372 | /* | ||
373 | * example snippets for free chipselects | ||
374 | * | ||
375 | * device@5,0 { | ||
376 | * compatible = "custom_driver"; | ||
377 | * reg = <5 0 0x02000000>; | ||
378 | * }; | ||
379 | * | ||
380 | * device@6,0 { | ||
381 | * compatible = "custom_driver"; | ||
382 | * reg = <6 0 0x02000000>; | ||
383 | * }; | ||
384 | * | ||
385 | * device@7,0 { | ||
386 | * compatible = "custom_driver"; | ||
387 | * reg = <7 0 0x02000000>; | ||
388 | * }; | ||
389 | */ | ||
390 | }; | ||
391 | }; | ||
392 | |||
diff --git a/arch/powerpc/boot/dts/redwood.dts b/arch/powerpc/boot/dts/redwood.dts new file mode 100644 index 000000000000..ad402c488741 --- /dev/null +++ b/arch/powerpc/boot/dts/redwood.dts | |||
@@ -0,0 +1,244 @@ | |||
1 | /* | ||
2 | * Device Tree Source for AMCC Redwood(460SX) | ||
3 | * | ||
4 | * Copyright 2008 AMCC <tmarri@amcc.com> | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without | ||
8 | * any warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | /dts-v1/; | ||
12 | |||
13 | / { | ||
14 | #address-cells = <2>; | ||
15 | #size-cells = <1>; | ||
16 | model = "amcc,redwood"; | ||
17 | compatible = "amcc,redwood"; | ||
18 | dcr-parent = <&{/cpus/cpu@0}>; | ||
19 | |||
20 | aliases { | ||
21 | ethernet0 = &EMAC0; | ||
22 | serial0 = &UART0; | ||
23 | }; | ||
24 | |||
25 | cpus { | ||
26 | #address-cells = <1>; | ||
27 | #size-cells = <0>; | ||
28 | |||
29 | cpu@0 { | ||
30 | device_type = "cpu"; | ||
31 | model = "PowerPC,460SX"; | ||
32 | reg = <0x00000000>; | ||
33 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
34 | timebase-frequency = <0>; /* Filled in by U-Boot */ | ||
35 | i-cache-line-size = <32>; | ||
36 | d-cache-line-size = <32>; | ||
37 | i-cache-size = <32768>; | ||
38 | d-cache-size = <32768>; | ||
39 | dcr-controller; | ||
40 | dcr-access-method = "native"; | ||
41 | }; | ||
42 | }; | ||
43 | |||
44 | memory { | ||
45 | device_type = "memory"; | ||
46 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ | ||
47 | }; | ||
48 | |||
49 | UIC0: interrupt-controller0 { | ||
50 | compatible = "ibm,uic-460sx","ibm,uic"; | ||
51 | interrupt-controller; | ||
52 | cell-index = <0>; | ||
53 | dcr-reg = <0x0c0 0x009>; | ||
54 | #address-cells = <0>; | ||
55 | #size-cells = <0>; | ||
56 | #interrupt-cells = <2>; | ||
57 | }; | ||
58 | |||
59 | UIC1: interrupt-controller1 { | ||
60 | compatible = "ibm,uic-460sx","ibm,uic"; | ||
61 | interrupt-controller; | ||
62 | cell-index = <1>; | ||
63 | dcr-reg = <0x0d0 0x009>; | ||
64 | #address-cells = <0>; | ||
65 | #size-cells = <0>; | ||
66 | #interrupt-cells = <2>; | ||
67 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ | ||
68 | interrupt-parent = <&UIC0>; | ||
69 | }; | ||
70 | |||
71 | UIC2: interrupt-controller2 { | ||
72 | compatible = "ibm,uic-460sx","ibm,uic"; | ||
73 | interrupt-controller; | ||
74 | cell-index = <2>; | ||
75 | dcr-reg = <0x0e0 0x009>; | ||
76 | #address-cells = <0>; | ||
77 | #size-cells = <0>; | ||
78 | #interrupt-cells = <2>; | ||
79 | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ | ||
80 | interrupt-parent = <&UIC0>; | ||
81 | }; | ||
82 | |||
83 | UIC3: interrupt-controller3 { | ||
84 | compatible = "ibm,uic-460sx","ibm,uic"; | ||
85 | interrupt-controller; | ||
86 | cell-index = <3>; | ||
87 | dcr-reg = <0x0f0 0x009>; | ||
88 | #address-cells = <0>; | ||
89 | #size-cells = <0>; | ||
90 | #interrupt-cells = <2>; | ||
91 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ | ||
92 | interrupt-parent = <&UIC0>; | ||
93 | }; | ||
94 | |||
95 | SDR0: sdr { | ||
96 | compatible = "ibm,sdr-460sx"; | ||
97 | dcr-reg = <0x00e 0x002>; | ||
98 | }; | ||
99 | |||
100 | CPR0: cpr { | ||
101 | compatible = "ibm,cpr-460sx"; | ||
102 | dcr-reg = <0x00c 0x002>; | ||
103 | }; | ||
104 | |||
105 | plb { | ||
106 | compatible = "ibm,plb-460sx", "ibm,plb4"; | ||
107 | #address-cells = <2>; | ||
108 | #size-cells = <1>; | ||
109 | ranges; | ||
110 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
111 | |||
112 | SDRAM0: sdram { | ||
113 | compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; | ||
114 | dcr-reg = <0x010 0x002>; | ||
115 | }; | ||
116 | |||
117 | MAL0: mcmal { | ||
118 | compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; | ||
119 | dcr-reg = <0x180 0x62>; | ||
120 | num-tx-chans = <4>; | ||
121 | num-rx-chans = <32>; | ||
122 | #address-cells = <1>; | ||
123 | #size-cells = <1>; | ||
124 | interrupt-parent = <&UIC1>; | ||
125 | interrupts = < /*TXEOB*/ 0x6 0x4 | ||
126 | /*RXEOB*/ 0x7 0x4 | ||
127 | /*SERR*/ 0x1 0x4 | ||
128 | /*TXDE*/ 0x2 0x4 | ||
129 | /*RXDE*/ 0x3 0x4 | ||
130 | /*COAL TX0*/ 0x18 0x2 | ||
131 | /*COAL TX1*/ 0x19 0x2 | ||
132 | /*COAL TX2*/ 0x1a 0x2 | ||
133 | /*COAL TX3*/ 0x1b 0x2 | ||
134 | /*COAL RX0*/ 0x1c 0x2 | ||
135 | /*COAL RX1*/ 0x1d 0x2 | ||
136 | /*COAL RX2*/ 0x1e 0x2 | ||
137 | /*COAL RX3*/ 0x1f 0x2>; | ||
138 | }; | ||
139 | |||
140 | POB0: opb { | ||
141 | compatible = "ibm,opb-460sx", "ibm,opb"; | ||
142 | #address-cells = <1>; | ||
143 | #size-cells = <1>; | ||
144 | ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; | ||
145 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
146 | |||
147 | EBC0: ebc { | ||
148 | compatible = "ibm,ebc-460sx", "ibm,ebc"; | ||
149 | dcr-reg = <0x012 0x002>; | ||
150 | #address-cells = <2>; | ||
151 | #size-cells = <1>; | ||
152 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
153 | /* ranges property is supplied by U-Boot */ | ||
154 | interrupts = <0x6 0x4>; | ||
155 | interrupt-parent = <&UIC1>; | ||
156 | |||
157 | nor_flash@0,0 { | ||
158 | compatible = "amd,s29gl512n", "cfi-flash"; | ||
159 | bank-width = <2>; | ||
160 | reg = <0x0000000 0x00000000 0x04000000>; | ||
161 | #address-cells = <1>; | ||
162 | #size-cells = <1>; | ||
163 | partition@0 { | ||
164 | label = "kernel"; | ||
165 | reg = <0x00000000 0x001e0000>; | ||
166 | }; | ||
167 | partition@1e0000 { | ||
168 | label = "dtb"; | ||
169 | reg = <0x001e0000 0x00020000>; | ||
170 | }; | ||
171 | partition@200000 { | ||
172 | label = "ramdisk"; | ||
173 | reg = <0x00200000 0x01400000>; | ||
174 | }; | ||
175 | partition@1600000 { | ||
176 | label = "jffs2"; | ||
177 | reg = <0x01600000 0x00400000>; | ||
178 | }; | ||
179 | partition@1a00000 { | ||
180 | label = "user"; | ||
181 | reg = <0x01a00000 0x02560000>; | ||
182 | }; | ||
183 | partition@3f60000 { | ||
184 | label = "env"; | ||
185 | reg = <0x03f60000 0x00040000>; | ||
186 | }; | ||
187 | partition@3fa0000 { | ||
188 | label = "u-boot"; | ||
189 | reg = <0x03fa0000 0x00060000>; | ||
190 | }; | ||
191 | }; | ||
192 | }; | ||
193 | |||
194 | UART0: serial@ef600200 { | ||
195 | device_type = "serial"; | ||
196 | compatible = "ns16550"; | ||
197 | reg = <0xef600200 0x00000008>; | ||
198 | virtual-reg = <0xef600200>; | ||
199 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
200 | current-speed = <0>; /* Filled in by U-Boot */ | ||
201 | interrupt-parent = <&UIC0>; | ||
202 | interrupts = <0x0 0x4>; | ||
203 | }; | ||
204 | |||
205 | RGMII0: emac-rgmii@ef600900 { | ||
206 | compatible = "ibm,rgmii-460sx", "ibm,rgmii"; | ||
207 | reg = <0xef600900 0x00000008>; | ||
208 | }; | ||
209 | |||
210 | EMAC0: ethernet@ef600a00 { | ||
211 | device_type = "network"; | ||
212 | compatible = "ibm,emac-460sx", "ibm,emac4"; | ||
213 | interrupt-parent = <&EMAC0>; | ||
214 | interrupts = <0x0 0x1>; | ||
215 | #interrupt-cells = <1>; | ||
216 | #address-cells = <0>; | ||
217 | #size-cells = <0>; | ||
218 | interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 | ||
219 | /*Wake*/ 0x1 &UIC2 0x1d 0x4>; | ||
220 | reg = <0xef600a00 0x00000070>; | ||
221 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | ||
222 | mal-device = <&MAL0>; | ||
223 | mal-tx-channel = <0>; | ||
224 | mal-rx-channel = <0>; | ||
225 | cell-index = <0>; | ||
226 | max-frame-size = <9000>; | ||
227 | rx-fifo-size = <4096>; | ||
228 | tx-fifo-size = <2048>; | ||
229 | phy-mode = "rgmii"; | ||
230 | phy-map = <0x00000000>; | ||
231 | rgmii-device = <&RGMII0>; | ||
232 | rgmii-channel = <0>; | ||
233 | has-inverted-stacr-oc; | ||
234 | has-new-stacr-staopc; | ||
235 | }; | ||
236 | |||
237 | }; | ||
238 | |||
239 | }; | ||
240 | chosen { | ||
241 | linux,stdout-path = "/plb/opb/serial@ef600200"; | ||
242 | }; | ||
243 | |||
244 | }; | ||
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts index 8d365a57ebc1..a36dbbc48694 100644 --- a/arch/powerpc/boot/dts/sbc8349.dts +++ b/arch/powerpc/boot/dts/sbc8349.dts | |||
@@ -159,68 +159,76 @@ | |||
159 | phy_type = "ulpi"; | 159 | phy_type = "ulpi"; |
160 | }; | 160 | }; |
161 | 161 | ||
162 | mdio@24520 { | ||
163 | #address-cells = <1>; | ||
164 | #size-cells = <0>; | ||
165 | compatible = "fsl,gianfar-mdio"; | ||
166 | reg = <0x24520 0x20>; | ||
167 | |||
168 | phy0: ethernet-phy@19 { | ||
169 | interrupt-parent = <&ipic>; | ||
170 | interrupts = <20 0x8>; | ||
171 | reg = <0x19>; | ||
172 | device_type = "ethernet-phy"; | ||
173 | }; | ||
174 | phy1: ethernet-phy@1a { | ||
175 | interrupt-parent = <&ipic>; | ||
176 | interrupts = <21 0x8>; | ||
177 | reg = <0x1a>; | ||
178 | device_type = "ethernet-phy"; | ||
179 | }; | ||
180 | tbi0: tbi-phy@11 { | ||
181 | reg = <0x11>; | ||
182 | device_type = "tbi-phy"; | ||
183 | }; | ||
184 | }; | ||
185 | |||
186 | mdio@25520 { | ||
187 | #address-cells = <1>; | ||
188 | #size-cells = <0>; | ||
189 | compatible = "fsl,gianfar-tbi"; | ||
190 | reg = <0x25520 0x20>; | ||
191 | |||
192 | tbi1: tbi-phy@11 { | ||
193 | reg = <0x11>; | ||
194 | device_type = "tbi-phy"; | ||
195 | }; | ||
196 | }; | ||
197 | |||
198 | enet0: ethernet@24000 { | 162 | enet0: ethernet@24000 { |
163 | #address-cells = <1>; | ||
164 | #size-cells = <1>; | ||
199 | cell-index = <0>; | 165 | cell-index = <0>; |
200 | device_type = "network"; | 166 | device_type = "network"; |
201 | model = "TSEC"; | 167 | model = "TSEC"; |
202 | compatible = "gianfar"; | 168 | compatible = "gianfar"; |
203 | reg = <0x24000 0x1000>; | 169 | reg = <0x24000 0x1000>; |
170 | ranges = <0x0 0x24000 0x1000>; | ||
204 | local-mac-address = [ 00 00 00 00 00 00 ]; | 171 | local-mac-address = [ 00 00 00 00 00 00 ]; |
205 | interrupts = <32 0x8 33 0x8 34 0x8>; | 172 | interrupts = <32 0x8 33 0x8 34 0x8>; |
206 | interrupt-parent = <&ipic>; | 173 | interrupt-parent = <&ipic>; |
207 | tbi-handle = <&tbi0>; | 174 | tbi-handle = <&tbi0>; |
208 | phy-handle = <&phy0>; | 175 | phy-handle = <&phy0>; |
209 | linux,network-index = <0>; | 176 | linux,network-index = <0>; |
177 | |||
178 | mdio@520 { | ||
179 | #address-cells = <1>; | ||
180 | #size-cells = <0>; | ||
181 | compatible = "fsl,gianfar-mdio"; | ||
182 | reg = <0x520 0x20>; | ||
183 | |||
184 | phy0: ethernet-phy@19 { | ||
185 | interrupt-parent = <&ipic>; | ||
186 | interrupts = <20 0x8>; | ||
187 | reg = <0x19>; | ||
188 | device_type = "ethernet-phy"; | ||
189 | }; | ||
190 | |||
191 | phy1: ethernet-phy@1a { | ||
192 | interrupt-parent = <&ipic>; | ||
193 | interrupts = <21 0x8>; | ||
194 | reg = <0x1a>; | ||
195 | device_type = "ethernet-phy"; | ||
196 | }; | ||
197 | |||
198 | tbi0: tbi-phy@11 { | ||
199 | reg = <0x11>; | ||
200 | device_type = "tbi-phy"; | ||
201 | }; | ||
202 | }; | ||
210 | }; | 203 | }; |
211 | 204 | ||
212 | enet1: ethernet@25000 { | 205 | enet1: ethernet@25000 { |
206 | #address-cells = <1>; | ||
207 | #size-cells = <1>; | ||
213 | cell-index = <1>; | 208 | cell-index = <1>; |
214 | device_type = "network"; | 209 | device_type = "network"; |
215 | model = "TSEC"; | 210 | model = "TSEC"; |
216 | compatible = "gianfar"; | 211 | compatible = "gianfar"; |
217 | reg = <0x25000 0x1000>; | 212 | reg = <0x25000 0x1000>; |
213 | ranges = <0x0 0x25000 0x1000>; | ||
218 | local-mac-address = [ 00 00 00 00 00 00 ]; | 214 | local-mac-address = [ 00 00 00 00 00 00 ]; |
219 | interrupts = <35 0x8 36 0x8 37 0x8>; | 215 | interrupts = <35 0x8 36 0x8 37 0x8>; |
220 | interrupt-parent = <&ipic>; | 216 | interrupt-parent = <&ipic>; |
221 | tbi-handle = <&tbi1>; | 217 | tbi-handle = <&tbi1>; |
222 | phy-handle = <&phy1>; | 218 | phy-handle = <&phy1>; |
223 | linux,network-index = <1>; | 219 | linux,network-index = <1>; |
220 | |||
221 | mdio@520 { | ||
222 | #address-cells = <1>; | ||
223 | #size-cells = <0>; | ||
224 | compatible = "fsl,gianfar-tbi"; | ||
225 | reg = <0x520 0x20>; | ||
226 | |||
227 | tbi1: tbi-phy@11 { | ||
228 | reg = <0x11>; | ||
229 | device_type = "tbi-phy"; | ||
230 | }; | ||
231 | }; | ||
224 | }; | 232 | }; |
225 | 233 | ||
226 | serial0: serial@4500 { | 234 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts index 2baf4a51f224..9c5079fec4f2 100644 --- a/arch/powerpc/boot/dts/sbc8548.dts +++ b/arch/powerpc/boot/dts/sbc8548.dts | |||
@@ -234,66 +234,72 @@ | |||
234 | }; | 234 | }; |
235 | }; | 235 | }; |
236 | 236 | ||
237 | mdio@24520 { | ||
238 | #address-cells = <1>; | ||
239 | #size-cells = <0>; | ||
240 | compatible = "fsl,gianfar-mdio"; | ||
241 | reg = <0x24520 0x20>; | ||
242 | |||
243 | phy0: ethernet-phy@19 { | ||
244 | interrupt-parent = <&mpic>; | ||
245 | interrupts = <0x6 0x1>; | ||
246 | reg = <0x19>; | ||
247 | device_type = "ethernet-phy"; | ||
248 | }; | ||
249 | phy1: ethernet-phy@1a { | ||
250 | interrupt-parent = <&mpic>; | ||
251 | interrupts = <0x7 0x1>; | ||
252 | reg = <0x1a>; | ||
253 | device_type = "ethernet-phy"; | ||
254 | }; | ||
255 | tbi0: tbi-phy@11 { | ||
256 | reg = <0x11>; | ||
257 | device_type = "tbi-phy"; | ||
258 | }; | ||
259 | }; | ||
260 | |||
261 | mdio@25520 { | ||
262 | #address-cells = <1>; | ||
263 | #size-cells = <0>; | ||
264 | compatible = "fsl,gianfar-tbi"; | ||
265 | reg = <0x25520 0x20>; | ||
266 | |||
267 | tbi1: tbi-phy@11 { | ||
268 | reg = <0x11>; | ||
269 | device_type = "tbi-phy"; | ||
270 | }; | ||
271 | }; | ||
272 | |||
273 | enet0: ethernet@24000 { | 237 | enet0: ethernet@24000 { |
238 | #address-cells = <1>; | ||
239 | #size-cells = <1>; | ||
274 | cell-index = <0>; | 240 | cell-index = <0>; |
275 | device_type = "network"; | 241 | device_type = "network"; |
276 | model = "eTSEC"; | 242 | model = "eTSEC"; |
277 | compatible = "gianfar"; | 243 | compatible = "gianfar"; |
278 | reg = <0x24000 0x1000>; | 244 | reg = <0x24000 0x1000>; |
245 | ranges = <0x0 0x24000 0x1000>; | ||
279 | local-mac-address = [ 00 00 00 00 00 00 ]; | 246 | local-mac-address = [ 00 00 00 00 00 00 ]; |
280 | interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; | 247 | interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; |
281 | interrupt-parent = <&mpic>; | 248 | interrupt-parent = <&mpic>; |
282 | tbi-handle = <&tbi0>; | 249 | tbi-handle = <&tbi0>; |
283 | phy-handle = <&phy0>; | 250 | phy-handle = <&phy0>; |
251 | |||
252 | mdio@520 { | ||
253 | #address-cells = <1>; | ||
254 | #size-cells = <0>; | ||
255 | compatible = "fsl,gianfar-mdio"; | ||
256 | reg = <0x520 0x20>; | ||
257 | |||
258 | phy0: ethernet-phy@19 { | ||
259 | interrupt-parent = <&mpic>; | ||
260 | interrupts = <0x6 0x1>; | ||
261 | reg = <0x19>; | ||
262 | device_type = "ethernet-phy"; | ||
263 | }; | ||
264 | phy1: ethernet-phy@1a { | ||
265 | interrupt-parent = <&mpic>; | ||
266 | interrupts = <0x7 0x1>; | ||
267 | reg = <0x1a>; | ||
268 | device_type = "ethernet-phy"; | ||
269 | }; | ||
270 | tbi0: tbi-phy@11 { | ||
271 | reg = <0x11>; | ||
272 | device_type = "tbi-phy"; | ||
273 | }; | ||
274 | }; | ||
284 | }; | 275 | }; |
285 | 276 | ||
286 | enet1: ethernet@25000 { | 277 | enet1: ethernet@25000 { |
278 | #address-cells = <1>; | ||
279 | #size-cells = <1>; | ||
287 | cell-index = <1>; | 280 | cell-index = <1>; |
288 | device_type = "network"; | 281 | device_type = "network"; |
289 | model = "eTSEC"; | 282 | model = "eTSEC"; |
290 | compatible = "gianfar"; | 283 | compatible = "gianfar"; |
291 | reg = <0x25000 0x1000>; | 284 | reg = <0x25000 0x1000>; |
285 | ranges = <0x0 0x25000 0x1000>; | ||
292 | local-mac-address = [ 00 00 00 00 00 00 ]; | 286 | local-mac-address = [ 00 00 00 00 00 00 ]; |
293 | interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; | 287 | interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; |
294 | interrupt-parent = <&mpic>; | 288 | interrupt-parent = <&mpic>; |
295 | tbi-handle = <&tbi1>; | 289 | tbi-handle = <&tbi1>; |
296 | phy-handle = <&phy1>; | 290 | phy-handle = <&phy1>; |
291 | |||
292 | mdio@520 { | ||
293 | #address-cells = <1>; | ||
294 | #size-cells = <0>; | ||
295 | compatible = "fsl,gianfar-tbi"; | ||
296 | reg = <0x520 0x20>; | ||
297 | |||
298 | tbi1: tbi-phy@11 { | ||
299 | reg = <0x11>; | ||
300 | device_type = "tbi-phy"; | ||
301 | }; | ||
302 | }; | ||
297 | }; | 303 | }; |
298 | 304 | ||
299 | serial0: serial@4500 { | 305 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts index 01542f7062ab..b772405a9a0a 100644 --- a/arch/powerpc/boot/dts/sbc8560.dts +++ b/arch/powerpc/boot/dts/sbc8560.dts | |||
@@ -139,77 +139,83 @@ | |||
139 | }; | 139 | }; |
140 | }; | 140 | }; |
141 | 141 | ||
142 | mdio@24520 { | ||
143 | #address-cells = <1>; | ||
144 | #size-cells = <0>; | ||
145 | compatible = "fsl,gianfar-mdio"; | ||
146 | reg = <0x24520 0x20>; | ||
147 | phy0: ethernet-phy@19 { | ||
148 | interrupt-parent = <&mpic>; | ||
149 | interrupts = <0x6 0x1>; | ||
150 | reg = <0x19>; | ||
151 | device_type = "ethernet-phy"; | ||
152 | }; | ||
153 | phy1: ethernet-phy@1a { | ||
154 | interrupt-parent = <&mpic>; | ||
155 | interrupts = <0x7 0x1>; | ||
156 | reg = <0x1a>; | ||
157 | device_type = "ethernet-phy"; | ||
158 | }; | ||
159 | phy2: ethernet-phy@1b { | ||
160 | interrupt-parent = <&mpic>; | ||
161 | interrupts = <0x8 0x1>; | ||
162 | reg = <0x1b>; | ||
163 | device_type = "ethernet-phy"; | ||
164 | }; | ||
165 | phy3: ethernet-phy@1c { | ||
166 | interrupt-parent = <&mpic>; | ||
167 | interrupts = <0x8 0x1>; | ||
168 | reg = <0x1c>; | ||
169 | device_type = "ethernet-phy"; | ||
170 | }; | ||
171 | tbi0: tbi-phy@11 { | ||
172 | reg = <0x11>; | ||
173 | device_type = "tbi-phy"; | ||
174 | }; | ||
175 | }; | ||
176 | |||
177 | mdio@25520 { | ||
178 | #address-cells = <1>; | ||
179 | #size-cells = <0>; | ||
180 | compatible = "fsl,gianfar-tbi"; | ||
181 | reg = <0x25520 0x20>; | ||
182 | |||
183 | tbi1: tbi-phy@11 { | ||
184 | reg = <0x11>; | ||
185 | device_type = "tbi-phy"; | ||
186 | }; | ||
187 | }; | ||
188 | |||
189 | enet0: ethernet@24000 { | 142 | enet0: ethernet@24000 { |
143 | #address-cells = <1>; | ||
144 | #size-cells = <1>; | ||
190 | cell-index = <0>; | 145 | cell-index = <0>; |
191 | device_type = "network"; | 146 | device_type = "network"; |
192 | model = "TSEC"; | 147 | model = "TSEC"; |
193 | compatible = "gianfar"; | 148 | compatible = "gianfar"; |
194 | reg = <0x24000 0x1000>; | 149 | reg = <0x24000 0x1000>; |
150 | ranges = <0x0 0x24000 0x1000>; | ||
195 | local-mac-address = [ 00 00 00 00 00 00 ]; | 151 | local-mac-address = [ 00 00 00 00 00 00 ]; |
196 | interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; | 152 | interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; |
197 | interrupt-parent = <&mpic>; | 153 | interrupt-parent = <&mpic>; |
198 | tbi-handle = <&tbi0>; | 154 | tbi-handle = <&tbi0>; |
199 | phy-handle = <&phy0>; | 155 | phy-handle = <&phy0>; |
156 | |||
157 | mdio@520 { | ||
158 | #address-cells = <1>; | ||
159 | #size-cells = <0>; | ||
160 | compatible = "fsl,gianfar-mdio"; | ||
161 | reg = <0x520 0x20>; | ||
162 | phy0: ethernet-phy@19 { | ||
163 | interrupt-parent = <&mpic>; | ||
164 | interrupts = <0x6 0x1>; | ||
165 | reg = <0x19>; | ||
166 | device_type = "ethernet-phy"; | ||
167 | }; | ||
168 | phy1: ethernet-phy@1a { | ||
169 | interrupt-parent = <&mpic>; | ||
170 | interrupts = <0x7 0x1>; | ||
171 | reg = <0x1a>; | ||
172 | device_type = "ethernet-phy"; | ||
173 | }; | ||
174 | phy2: ethernet-phy@1b { | ||
175 | interrupt-parent = <&mpic>; | ||
176 | interrupts = <0x8 0x1>; | ||
177 | reg = <0x1b>; | ||
178 | device_type = "ethernet-phy"; | ||
179 | }; | ||
180 | phy3: ethernet-phy@1c { | ||
181 | interrupt-parent = <&mpic>; | ||
182 | interrupts = <0x8 0x1>; | ||
183 | reg = <0x1c>; | ||
184 | device_type = "ethernet-phy"; | ||
185 | }; | ||
186 | tbi0: tbi-phy@11 { | ||
187 | reg = <0x11>; | ||
188 | device_type = "tbi-phy"; | ||
189 | }; | ||
190 | }; | ||
200 | }; | 191 | }; |
201 | 192 | ||
202 | enet1: ethernet@25000 { | 193 | enet1: ethernet@25000 { |
194 | #address-cells = <1>; | ||
195 | #size-cells = <1>; | ||
203 | cell-index = <1>; | 196 | cell-index = <1>; |
204 | device_type = "network"; | 197 | device_type = "network"; |
205 | model = "TSEC"; | 198 | model = "TSEC"; |
206 | compatible = "gianfar"; | 199 | compatible = "gianfar"; |
207 | reg = <0x25000 0x1000>; | 200 | reg = <0x25000 0x1000>; |
201 | ranges = <0x0 0x25000 0x1000>; | ||
208 | local-mac-address = [ 00 00 00 00 00 00 ]; | 202 | local-mac-address = [ 00 00 00 00 00 00 ]; |
209 | interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; | 203 | interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; |
210 | interrupt-parent = <&mpic>; | 204 | interrupt-parent = <&mpic>; |
211 | tbi-handle = <&tbi1>; | 205 | tbi-handle = <&tbi1>; |
212 | phy-handle = <&phy1>; | 206 | phy-handle = <&phy1>; |
207 | |||
208 | mdio@520 { | ||
209 | #address-cells = <1>; | ||
210 | #size-cells = <0>; | ||
211 | compatible = "fsl,gianfar-tbi"; | ||
212 | reg = <0x520 0x20>; | ||
213 | |||
214 | tbi1: tbi-phy@11 { | ||
215 | reg = <0x11>; | ||
216 | device_type = "tbi-phy"; | ||
217 | }; | ||
218 | }; | ||
213 | }; | 219 | }; |
214 | 220 | ||
215 | mpic: pic@40000 { | 221 | mpic: pic@40000 { |
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts index 36db981548e4..e3e914e78caa 100644 --- a/arch/powerpc/boot/dts/sbc8641d.dts +++ b/arch/powerpc/boot/dts/sbc8641d.dts | |||
@@ -192,132 +192,144 @@ | |||
192 | }; | 192 | }; |
193 | }; | 193 | }; |
194 | 194 | ||
195 | mdio@24520 { | ||
196 | #address-cells = <1>; | ||
197 | #size-cells = <0>; | ||
198 | compatible = "fsl,gianfar-mdio"; | ||
199 | reg = <0x24520 0x20>; | ||
200 | |||
201 | phy0: ethernet-phy@1f { | ||
202 | interrupt-parent = <&mpic>; | ||
203 | interrupts = <10 1>; | ||
204 | reg = <0x1f>; | ||
205 | device_type = "ethernet-phy"; | ||
206 | }; | ||
207 | phy1: ethernet-phy@0 { | ||
208 | interrupt-parent = <&mpic>; | ||
209 | interrupts = <10 1>; | ||
210 | reg = <0>; | ||
211 | device_type = "ethernet-phy"; | ||
212 | }; | ||
213 | phy2: ethernet-phy@1 { | ||
214 | interrupt-parent = <&mpic>; | ||
215 | interrupts = <10 1>; | ||
216 | reg = <1>; | ||
217 | device_type = "ethernet-phy"; | ||
218 | }; | ||
219 | phy3: ethernet-phy@2 { | ||
220 | interrupt-parent = <&mpic>; | ||
221 | interrupts = <10 1>; | ||
222 | reg = <2>; | ||
223 | device_type = "ethernet-phy"; | ||
224 | }; | ||
225 | tbi0: tbi-phy@11 { | ||
226 | reg = <0x11>; | ||
227 | device_type = "tbi-phy"; | ||
228 | }; | ||
229 | }; | ||
230 | |||
231 | mdio@25520 { | ||
232 | #address-cells = <1>; | ||
233 | #size-cells = <0>; | ||
234 | compatible = "fsl,gianfar-tbi"; | ||
235 | reg = <0x25520 0x20>; | ||
236 | |||
237 | tbi1: tbi-phy@11 { | ||
238 | reg = <0x11>; | ||
239 | device_type = "tbi-phy"; | ||
240 | }; | ||
241 | }; | ||
242 | |||
243 | mdio@26520 { | ||
244 | #address-cells = <1>; | ||
245 | #size-cells = <0>; | ||
246 | compatible = "fsl,gianfar-tbi"; | ||
247 | reg = <0x26520 0x20>; | ||
248 | |||
249 | tbi2: tbi-phy@11 { | ||
250 | reg = <0x11>; | ||
251 | device_type = "tbi-phy"; | ||
252 | }; | ||
253 | }; | ||
254 | |||
255 | mdio@27520 { | ||
256 | #address-cells = <1>; | ||
257 | #size-cells = <0>; | ||
258 | compatible = "fsl,gianfar-tbi"; | ||
259 | reg = <0x27520 0x20>; | ||
260 | |||
261 | tbi3: tbi-phy@11 { | ||
262 | reg = <0x11>; | ||
263 | device_type = "tbi-phy"; | ||
264 | }; | ||
265 | }; | ||
266 | |||
267 | enet0: ethernet@24000 { | 195 | enet0: ethernet@24000 { |
196 | #address-cells = <1>; | ||
197 | #size-cells = <1>; | ||
268 | cell-index = <0>; | 198 | cell-index = <0>; |
269 | device_type = "network"; | 199 | device_type = "network"; |
270 | model = "TSEC"; | 200 | model = "TSEC"; |
271 | compatible = "gianfar"; | 201 | compatible = "gianfar"; |
272 | reg = <0x24000 0x1000>; | 202 | reg = <0x24000 0x1000>; |
203 | ranges = <0x0 0x24000 0x1000>; | ||
273 | local-mac-address = [ 00 00 00 00 00 00 ]; | 204 | local-mac-address = [ 00 00 00 00 00 00 ]; |
274 | interrupts = <29 2 30 2 34 2>; | 205 | interrupts = <29 2 30 2 34 2>; |
275 | interrupt-parent = <&mpic>; | 206 | interrupt-parent = <&mpic>; |
276 | tbi-handle = <&tbi0>; | 207 | tbi-handle = <&tbi0>; |
277 | phy-handle = <&phy0>; | 208 | phy-handle = <&phy0>; |
278 | phy-connection-type = "rgmii-id"; | 209 | phy-connection-type = "rgmii-id"; |
210 | |||
211 | mdio@520 { | ||
212 | #address-cells = <1>; | ||
213 | #size-cells = <0>; | ||
214 | compatible = "fsl,gianfar-mdio"; | ||
215 | reg = <0x520 0x20>; | ||
216 | |||
217 | phy0: ethernet-phy@1f { | ||
218 | interrupt-parent = <&mpic>; | ||
219 | interrupts = <10 1>; | ||
220 | reg = <0x1f>; | ||
221 | device_type = "ethernet-phy"; | ||
222 | }; | ||
223 | phy1: ethernet-phy@0 { | ||
224 | interrupt-parent = <&mpic>; | ||
225 | interrupts = <10 1>; | ||
226 | reg = <0>; | ||
227 | device_type = "ethernet-phy"; | ||
228 | }; | ||
229 | phy2: ethernet-phy@1 { | ||
230 | interrupt-parent = <&mpic>; | ||
231 | interrupts = <10 1>; | ||
232 | reg = <1>; | ||
233 | device_type = "ethernet-phy"; | ||
234 | }; | ||
235 | phy3: ethernet-phy@2 { | ||
236 | interrupt-parent = <&mpic>; | ||
237 | interrupts = <10 1>; | ||
238 | reg = <2>; | ||
239 | device_type = "ethernet-phy"; | ||
240 | }; | ||
241 | tbi0: tbi-phy@11 { | ||
242 | reg = <0x11>; | ||
243 | device_type = "tbi-phy"; | ||
244 | }; | ||
245 | }; | ||
279 | }; | 246 | }; |
280 | 247 | ||
281 | enet1: ethernet@25000 { | 248 | enet1: ethernet@25000 { |
249 | #address-cells = <1>; | ||
250 | #size-cells = <1>; | ||
282 | cell-index = <1>; | 251 | cell-index = <1>; |
283 | device_type = "network"; | 252 | device_type = "network"; |
284 | model = "TSEC"; | 253 | model = "TSEC"; |
285 | compatible = "gianfar"; | 254 | compatible = "gianfar"; |
286 | reg = <0x25000 0x1000>; | 255 | reg = <0x25000 0x1000>; |
256 | ranges = <0x0 0x25000 0x1000>; | ||
287 | local-mac-address = [ 00 00 00 00 00 00 ]; | 257 | local-mac-address = [ 00 00 00 00 00 00 ]; |
288 | interrupts = <35 2 36 2 40 2>; | 258 | interrupts = <35 2 36 2 40 2>; |
289 | interrupt-parent = <&mpic>; | 259 | interrupt-parent = <&mpic>; |
290 | tbi-handle = <&tbi1>; | 260 | tbi-handle = <&tbi1>; |
291 | phy-handle = <&phy1>; | 261 | phy-handle = <&phy1>; |
292 | phy-connection-type = "rgmii-id"; | 262 | phy-connection-type = "rgmii-id"; |
263 | |||
264 | mdio@520 { | ||
265 | #address-cells = <1>; | ||
266 | #size-cells = <0>; | ||
267 | compatible = "fsl,gianfar-tbi"; | ||
268 | reg = <0x520 0x20>; | ||
269 | |||
270 | tbi1: tbi-phy@11 { | ||
271 | reg = <0x11>; | ||
272 | device_type = "tbi-phy"; | ||
273 | }; | ||
274 | }; | ||
293 | }; | 275 | }; |
294 | 276 | ||
295 | enet2: ethernet@26000 { | 277 | enet2: ethernet@26000 { |
278 | #address-cells = <1>; | ||
279 | #size-cells = <1>; | ||
296 | cell-index = <2>; | 280 | cell-index = <2>; |
297 | device_type = "network"; | 281 | device_type = "network"; |
298 | model = "TSEC"; | 282 | model = "TSEC"; |
299 | compatible = "gianfar"; | 283 | compatible = "gianfar"; |
300 | reg = <0x26000 0x1000>; | 284 | reg = <0x26000 0x1000>; |
285 | ranges = <0x0 0x26000 0x1000>; | ||
301 | local-mac-address = [ 00 00 00 00 00 00 ]; | 286 | local-mac-address = [ 00 00 00 00 00 00 ]; |
302 | interrupts = <31 2 32 2 33 2>; | 287 | interrupts = <31 2 32 2 33 2>; |
303 | interrupt-parent = <&mpic>; | 288 | interrupt-parent = <&mpic>; |
304 | tbi-handle = <&tbi2>; | 289 | tbi-handle = <&tbi2>; |
305 | phy-handle = <&phy2>; | 290 | phy-handle = <&phy2>; |
306 | phy-connection-type = "rgmii-id"; | 291 | phy-connection-type = "rgmii-id"; |
292 | |||
293 | mdio@520 { | ||
294 | #address-cells = <1>; | ||
295 | #size-cells = <0>; | ||
296 | compatible = "fsl,gianfar-tbi"; | ||
297 | reg = <0x520 0x20>; | ||
298 | |||
299 | tbi2: tbi-phy@11 { | ||
300 | reg = <0x11>; | ||
301 | device_type = "tbi-phy"; | ||
302 | }; | ||
303 | }; | ||
307 | }; | 304 | }; |
308 | 305 | ||
309 | enet3: ethernet@27000 { | 306 | enet3: ethernet@27000 { |
307 | #address-cells = <1>; | ||
308 | #size-cells = <1>; | ||
310 | cell-index = <3>; | 309 | cell-index = <3>; |
311 | device_type = "network"; | 310 | device_type = "network"; |
312 | model = "TSEC"; | 311 | model = "TSEC"; |
313 | compatible = "gianfar"; | 312 | compatible = "gianfar"; |
314 | reg = <0x27000 0x1000>; | 313 | reg = <0x27000 0x1000>; |
314 | ranges = <0x0 0x27000 0x1000>; | ||
315 | local-mac-address = [ 00 00 00 00 00 00 ]; | 315 | local-mac-address = [ 00 00 00 00 00 00 ]; |
316 | interrupts = <37 2 38 2 39 2>; | 316 | interrupts = <37 2 38 2 39 2>; |
317 | interrupt-parent = <&mpic>; | 317 | interrupt-parent = <&mpic>; |
318 | tbi-handle = <&tbi3>; | 318 | tbi-handle = <&tbi3>; |
319 | phy-handle = <&phy3>; | 319 | phy-handle = <&phy3>; |
320 | phy-connection-type = "rgmii-id"; | 320 | phy-connection-type = "rgmii-id"; |
321 | |||
322 | mdio@520 { | ||
323 | #address-cells = <1>; | ||
324 | #size-cells = <0>; | ||
325 | compatible = "fsl,gianfar-tbi"; | ||
326 | reg = <0x520 0x20>; | ||
327 | |||
328 | tbi3: tbi-phy@11 { | ||
329 | reg = <0x11>; | ||
330 | device_type = "tbi-phy"; | ||
331 | }; | ||
332 | }; | ||
321 | }; | 333 | }; |
322 | 334 | ||
323 | serial0: serial@4500 { | 335 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/socrates.dts b/arch/powerpc/boot/dts/socrates.dts new file mode 100644 index 000000000000..b8d0fc6f0042 --- /dev/null +++ b/arch/powerpc/boot/dts/socrates.dts | |||
@@ -0,0 +1,338 @@ | |||
1 | /* | ||
2 | * Device Tree Source for the Socrates board (MPC8544). | ||
3 | * | ||
4 | * Copyright (c) 2008 Emcraft Systems. | ||
5 | * Sergei Poselenov, <sposelenov@emcraft.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | |||
13 | /dts-v1/; | ||
14 | |||
15 | / { | ||
16 | model = "abb,socrates"; | ||
17 | compatible = "abb,socrates"; | ||
18 | #address-cells = <1>; | ||
19 | #size-cells = <1>; | ||
20 | |||
21 | aliases { | ||
22 | ethernet0 = &enet0; | ||
23 | ethernet1 = &enet1; | ||
24 | serial0 = &serial0; | ||
25 | serial1 = &serial1; | ||
26 | pci0 = &pci0; | ||
27 | }; | ||
28 | |||
29 | cpus { | ||
30 | #address-cells = <1>; | ||
31 | #size-cells = <0>; | ||
32 | |||
33 | PowerPC,8544@0 { | ||
34 | device_type = "cpu"; | ||
35 | reg = <0>; | ||
36 | d-cache-line-size = <32>; | ||
37 | i-cache-line-size = <32>; | ||
38 | d-cache-size = <0x8000>; // L1, 32K | ||
39 | i-cache-size = <0x8000>; // L1, 32K | ||
40 | timebase-frequency = <0>; | ||
41 | bus-frequency = <0>; | ||
42 | clock-frequency = <0>; | ||
43 | next-level-cache = <&L2>; | ||
44 | }; | ||
45 | }; | ||
46 | |||
47 | memory { | ||
48 | device_type = "memory"; | ||
49 | reg = <0x00000000 0x00000000>; // Filled in by U-Boot | ||
50 | }; | ||
51 | |||
52 | soc8544@e0000000 { | ||
53 | #address-cells = <1>; | ||
54 | #size-cells = <1>; | ||
55 | |||
56 | ranges = <0x00000000 0xe0000000 0x00100000>; | ||
57 | reg = <0xe0000000 0x00001000>; // CCSRBAR 1M | ||
58 | bus-frequency = <0>; // Filled in by U-Boot | ||
59 | compatible = "fsl,mpc8544-immr", "simple-bus"; | ||
60 | |||
61 | memory-controller@2000 { | ||
62 | compatible = "fsl,mpc8544-memory-controller"; | ||
63 | reg = <0x2000 0x1000>; | ||
64 | interrupt-parent = <&mpic>; | ||
65 | interrupts = <18 2>; | ||
66 | }; | ||
67 | |||
68 | L2: l2-cache-controller@20000 { | ||
69 | compatible = "fsl,mpc8544-l2-cache-controller"; | ||
70 | reg = <0x20000 0x1000>; | ||
71 | cache-line-size = <32>; | ||
72 | cache-size = <0x40000>; // L2, 256K | ||
73 | interrupt-parent = <&mpic>; | ||
74 | interrupts = <16 2>; | ||
75 | }; | ||
76 | |||
77 | i2c@3000 { | ||
78 | #address-cells = <1>; | ||
79 | #size-cells = <0>; | ||
80 | cell-index = <0>; | ||
81 | compatible = "fsl-i2c"; | ||
82 | reg = <0x3000 0x100>; | ||
83 | interrupts = <43 2>; | ||
84 | interrupt-parent = <&mpic>; | ||
85 | dfsrr; | ||
86 | |||
87 | dtt@28 { | ||
88 | compatible = "winbond,w83782d"; | ||
89 | reg = <0x28>; | ||
90 | }; | ||
91 | rtc@32 { | ||
92 | compatible = "epson,rx8025"; | ||
93 | reg = <0x32>; | ||
94 | interrupts = <7 1>; | ||
95 | interrupt-parent = <&mpic>; | ||
96 | }; | ||
97 | dtt@4c { | ||
98 | compatible = "dallas,ds75"; | ||
99 | reg = <0x4c>; | ||
100 | }; | ||
101 | ts@4a { | ||
102 | compatible = "ti,tsc2003"; | ||
103 | reg = <0x4a>; | ||
104 | interrupt-parent = <&mpic>; | ||
105 | interrupts = <8 1>; | ||
106 | }; | ||
107 | }; | ||
108 | |||
109 | i2c@3100 { | ||
110 | #address-cells = <1>; | ||
111 | #size-cells = <0>; | ||
112 | cell-index = <1>; | ||
113 | compatible = "fsl-i2c"; | ||
114 | reg = <0x3100 0x100>; | ||
115 | interrupts = <43 2>; | ||
116 | interrupt-parent = <&mpic>; | ||
117 | dfsrr; | ||
118 | }; | ||
119 | |||
120 | enet0: ethernet@24000 { | ||
121 | #address-cells = <1>; | ||
122 | #size-cells = <1>; | ||
123 | cell-index = <0>; | ||
124 | device_type = "network"; | ||
125 | model = "eTSEC"; | ||
126 | compatible = "gianfar"; | ||
127 | reg = <0x24000 0x1000>; | ||
128 | ranges = <0x0 0x24000 0x1000>; | ||
129 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
130 | interrupts = <29 2 30 2 34 2>; | ||
131 | interrupt-parent = <&mpic>; | ||
132 | phy-handle = <&phy0>; | ||
133 | tbi-handle = <&tbi0>; | ||
134 | phy-connection-type = "rgmii-id"; | ||
135 | |||
136 | mdio@520 { | ||
137 | #address-cells = <1>; | ||
138 | #size-cells = <0>; | ||
139 | compatible = "fsl,gianfar-mdio"; | ||
140 | reg = <0x520 0x20>; | ||
141 | |||
142 | phy0: ethernet-phy@0 { | ||
143 | interrupt-parent = <&mpic>; | ||
144 | interrupts = <0 1>; | ||
145 | reg = <0>; | ||
146 | }; | ||
147 | phy1: ethernet-phy@1 { | ||
148 | interrupt-parent = <&mpic>; | ||
149 | interrupts = <0 1>; | ||
150 | reg = <1>; | ||
151 | }; | ||
152 | tbi0: tbi-phy@11 { | ||
153 | reg = <0x11>; | ||
154 | }; | ||
155 | }; | ||
156 | }; | ||
157 | |||
158 | enet1: ethernet@26000 { | ||
159 | #address-cells = <1>; | ||
160 | #size-cells = <1>; | ||
161 | cell-index = <1>; | ||
162 | device_type = "network"; | ||
163 | model = "eTSEC"; | ||
164 | compatible = "gianfar"; | ||
165 | reg = <0x26000 0x1000>; | ||
166 | ranges = <0x0 0x26000 0x1000>; | ||
167 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
168 | interrupts = <31 2 32 2 33 2>; | ||
169 | interrupt-parent = <&mpic>; | ||
170 | phy-handle = <&phy1>; | ||
171 | tbi-handle = <&tbi1>; | ||
172 | phy-connection-type = "rgmii-id"; | ||
173 | |||
174 | mdio@520 { | ||
175 | #address-cells = <1>; | ||
176 | #size-cells = <0>; | ||
177 | compatible = "fsl,gianfar-tbi"; | ||
178 | reg = <0x520 0x20>; | ||
179 | |||
180 | tbi1: tbi-phy@11 { | ||
181 | reg = <0x11>; | ||
182 | }; | ||
183 | }; | ||
184 | }; | ||
185 | |||
186 | serial0: serial@4500 { | ||
187 | cell-index = <0>; | ||
188 | device_type = "serial"; | ||
189 | compatible = "ns16550"; | ||
190 | reg = <0x4500 0x100>; | ||
191 | clock-frequency = <0>; | ||
192 | interrupts = <42 2>; | ||
193 | interrupt-parent = <&mpic>; | ||
194 | }; | ||
195 | |||
196 | serial1: serial@4600 { | ||
197 | cell-index = <1>; | ||
198 | device_type = "serial"; | ||
199 | compatible = "ns16550"; | ||
200 | reg = <0x4600 0x100>; | ||
201 | clock-frequency = <0>; | ||
202 | interrupts = <42 2>; | ||
203 | interrupt-parent = <&mpic>; | ||
204 | }; | ||
205 | |||
206 | global-utilities@e0000 { //global utilities block | ||
207 | compatible = "fsl,mpc8548-guts"; | ||
208 | reg = <0xe0000 0x1000>; | ||
209 | fsl,has-rstcr; | ||
210 | }; | ||
211 | |||
212 | mpic: pic@40000 { | ||
213 | interrupt-controller; | ||
214 | #address-cells = <0>; | ||
215 | #interrupt-cells = <2>; | ||
216 | reg = <0x40000 0x40000>; | ||
217 | compatible = "chrp,open-pic"; | ||
218 | device_type = "open-pic"; | ||
219 | }; | ||
220 | }; | ||
221 | |||
222 | |||
223 | localbus { | ||
224 | compatible = "fsl,mpc8544-localbus", | ||
225 | "fsl,pq3-localbus", | ||
226 | "simple-bus"; | ||
227 | #address-cells = <2>; | ||
228 | #size-cells = <1>; | ||
229 | reg = <0xe0005000 0x40>; | ||
230 | |||
231 | ranges = <0 0 0xfc000000 0x04000000 | ||
232 | 2 0 0xc8000000 0x04000000 | ||
233 | 3 0 0xc0000000 0x00100000 | ||
234 | >; /* Overwritten by U-Boot */ | ||
235 | |||
236 | nor_flash@0,0 { | ||
237 | compatible = "amd,s29gl256n", "cfi-flash"; | ||
238 | bank-width = <2>; | ||
239 | reg = <0x0 0x000000 0x4000000>; | ||
240 | #address-cells = <1>; | ||
241 | #size-cells = <1>; | ||
242 | partition@0 { | ||
243 | label = "kernel"; | ||
244 | reg = <0x0 0x1e0000>; | ||
245 | read-only; | ||
246 | }; | ||
247 | partition@1e0000 { | ||
248 | label = "dtb"; | ||
249 | reg = <0x1e0000 0x20000>; | ||
250 | }; | ||
251 | partition@200000 { | ||
252 | label = "root"; | ||
253 | reg = <0x200000 0x200000>; | ||
254 | }; | ||
255 | partition@400000 { | ||
256 | label = "user"; | ||
257 | reg = <0x400000 0x3b80000>; | ||
258 | }; | ||
259 | partition@3f80000 { | ||
260 | label = "env"; | ||
261 | reg = <0x3f80000 0x40000>; | ||
262 | read-only; | ||
263 | }; | ||
264 | partition@3fc0000 { | ||
265 | label = "u-boot"; | ||
266 | reg = <0x3fc0000 0x40000>; | ||
267 | read-only; | ||
268 | }; | ||
269 | }; | ||
270 | |||
271 | display@2,0 { | ||
272 | compatible = "fujitsu,lime"; | ||
273 | reg = <2 0x0 0x4000000>; | ||
274 | interrupt-parent = <&mpic>; | ||
275 | interrupts = <6 1>; | ||
276 | }; | ||
277 | |||
278 | fpga_pic: fpga-pic@3,10 { | ||
279 | compatible = "abb,socrates-fpga-pic"; | ||
280 | reg = <3 0x10 0x10>; | ||
281 | interrupt-controller; | ||
282 | /* IRQs 2, 10, 11, active low, level-sensitive */ | ||
283 | interrupts = <2 1 10 1 11 1>; | ||
284 | interrupt-parent = <&mpic>; | ||
285 | #interrupt-cells = <3>; | ||
286 | }; | ||
287 | |||
288 | spi@3,60 { | ||
289 | compatible = "abb,socrates-spi"; | ||
290 | reg = <3 0x60 0x10>; | ||
291 | interrupts = <8 4 0>; // number, type, routing | ||
292 | interrupt-parent = <&fpga_pic>; | ||
293 | }; | ||
294 | |||
295 | nand@3,70 { | ||
296 | compatible = "abb,socrates-nand"; | ||
297 | reg = <3 0x70 0x04>; | ||
298 | bank-width = <1>; | ||
299 | #address-cells = <1>; | ||
300 | #size-cells = <1>; | ||
301 | data@0 { | ||
302 | label = "data"; | ||
303 | reg = <0x0 0x40000000>; | ||
304 | }; | ||
305 | }; | ||
306 | |||
307 | can@3,100 { | ||
308 | compatible = "philips,sja1000"; | ||
309 | reg = <3 0x100 0x80>; | ||
310 | interrupts = <2 8 1>; // number, type, routing | ||
311 | interrupt-parent = <&fpga_pic>; | ||
312 | }; | ||
313 | }; | ||
314 | |||
315 | pci0: pci@e0008000 { | ||
316 | cell-index = <0>; | ||
317 | #interrupt-cells = <1>; | ||
318 | #size-cells = <2>; | ||
319 | #address-cells = <3>; | ||
320 | compatible = "fsl,mpc8540-pci"; | ||
321 | device_type = "pci"; | ||
322 | reg = <0xe0008000 0x1000>; | ||
323 | clock-frequency = <66666666>; | ||
324 | |||
325 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
326 | interrupt-map = < | ||
327 | /* IDSEL 0x11 */ | ||
328 | 0x8800 0x0 0x0 1 &mpic 5 1 | ||
329 | /* IDSEL 0x12 */ | ||
330 | 0x9000 0x0 0x0 1 &mpic 4 1>; | ||
331 | interrupt-parent = <&mpic>; | ||
332 | interrupts = <24 2>; | ||
333 | bus-range = <0x0 0x0>; | ||
334 | ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 | ||
335 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>; | ||
336 | }; | ||
337 | |||
338 | }; | ||
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts index fff33fe6efc6..8b173957fb5f 100644 --- a/arch/powerpc/boot/dts/stx_gp3_8560.dts +++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts | |||
@@ -124,66 +124,72 @@ | |||
124 | }; | 124 | }; |
125 | }; | 125 | }; |
126 | 126 | ||
127 | mdio@24520 { | ||
128 | #address-cells = <1>; | ||
129 | #size-cells = <0>; | ||
130 | compatible = "fsl,gianfar-mdio"; | ||
131 | reg = <0x24520 0x20>; | ||
132 | |||
133 | phy2: ethernet-phy@2 { | ||
134 | interrupt-parent = <&mpic>; | ||
135 | interrupts = <5 4>; | ||
136 | reg = <2>; | ||
137 | device_type = "ethernet-phy"; | ||
138 | }; | ||
139 | phy4: ethernet-phy@4 { | ||
140 | interrupt-parent = <&mpic>; | ||
141 | interrupts = <5 4>; | ||
142 | reg = <4>; | ||
143 | device_type = "ethernet-phy"; | ||
144 | }; | ||
145 | tbi0: tbi-phy@11 { | ||
146 | reg = <0x11>; | ||
147 | device_type = "tbi-phy"; | ||
148 | }; | ||
149 | }; | ||
150 | |||
151 | mdio@25520 { | ||
152 | #address-cells = <1>; | ||
153 | #size-cells = <0>; | ||
154 | compatible = "fsl,gianfar-tbi"; | ||
155 | reg = <0x25520 0x20>; | ||
156 | |||
157 | tbi1: tbi-phy@11 { | ||
158 | reg = <0x11>; | ||
159 | device_type = "tbi-phy"; | ||
160 | }; | ||
161 | }; | ||
162 | |||
163 | enet0: ethernet@24000 { | 127 | enet0: ethernet@24000 { |
128 | #address-cells = <1>; | ||
129 | #size-cells = <1>; | ||
164 | cell-index = <0>; | 130 | cell-index = <0>; |
165 | device_type = "network"; | 131 | device_type = "network"; |
166 | model = "TSEC"; | 132 | model = "TSEC"; |
167 | compatible = "gianfar"; | 133 | compatible = "gianfar"; |
168 | reg = <0x24000 0x1000>; | 134 | reg = <0x24000 0x1000>; |
135 | ranges = <0x0 0x24000 0x1000>; | ||
169 | local-mac-address = [ 00 00 00 00 00 00 ]; | 136 | local-mac-address = [ 00 00 00 00 00 00 ]; |
170 | interrupts = <29 2 30 2 34 2>; | 137 | interrupts = <29 2 30 2 34 2>; |
171 | interrupt-parent = <&mpic>; | 138 | interrupt-parent = <&mpic>; |
172 | tbi-handle = <&tbi0>; | 139 | tbi-handle = <&tbi0>; |
173 | phy-handle = <&phy2>; | 140 | phy-handle = <&phy2>; |
141 | |||
142 | mdio@520 { | ||
143 | #address-cells = <1>; | ||
144 | #size-cells = <0>; | ||
145 | compatible = "fsl,gianfar-mdio"; | ||
146 | reg = <0x520 0x20>; | ||
147 | |||
148 | phy2: ethernet-phy@2 { | ||
149 | interrupt-parent = <&mpic>; | ||
150 | interrupts = <5 4>; | ||
151 | reg = <2>; | ||
152 | device_type = "ethernet-phy"; | ||
153 | }; | ||
154 | phy4: ethernet-phy@4 { | ||
155 | interrupt-parent = <&mpic>; | ||
156 | interrupts = <5 4>; | ||
157 | reg = <4>; | ||
158 | device_type = "ethernet-phy"; | ||
159 | }; | ||
160 | tbi0: tbi-phy@11 { | ||
161 | reg = <0x11>; | ||
162 | device_type = "tbi-phy"; | ||
163 | }; | ||
164 | }; | ||
174 | }; | 165 | }; |
175 | 166 | ||
176 | enet1: ethernet@25000 { | 167 | enet1: ethernet@25000 { |
168 | #address-cells = <1>; | ||
169 | #size-cells = <1>; | ||
177 | cell-index = <1>; | 170 | cell-index = <1>; |
178 | device_type = "network"; | 171 | device_type = "network"; |
179 | model = "TSEC"; | 172 | model = "TSEC"; |
180 | compatible = "gianfar"; | 173 | compatible = "gianfar"; |
181 | reg = <0x25000 0x1000>; | 174 | reg = <0x25000 0x1000>; |
175 | ranges = <0x0 0x25000 0x1000>; | ||
182 | local-mac-address = [ 00 00 00 00 00 00 ]; | 176 | local-mac-address = [ 00 00 00 00 00 00 ]; |
183 | interrupts = <35 2 36 2 40 2>; | 177 | interrupts = <35 2 36 2 40 2>; |
184 | interrupt-parent = <&mpic>; | 178 | interrupt-parent = <&mpic>; |
185 | tbi-handle = <&tbi1>; | 179 | tbi-handle = <&tbi1>; |
186 | phy-handle = <&phy4>; | 180 | phy-handle = <&phy4>; |
181 | |||
182 | mdio@520 { | ||
183 | #address-cells = <1>; | ||
184 | #size-cells = <0>; | ||
185 | compatible = "fsl,gianfar-tbi"; | ||
186 | reg = <0x520 0x20>; | ||
187 | |||
188 | tbi1: tbi-phy@11 { | ||
189 | reg = <0x11>; | ||
190 | device_type = "tbi-phy"; | ||
191 | }; | ||
192 | }; | ||
187 | }; | 193 | }; |
188 | 194 | ||
189 | mpic: pic@40000 { | 195 | mpic: pic@40000 { |
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts index 906302e26a62..c9590b58b7b0 100644 --- a/arch/powerpc/boot/dts/tqm5200.dts +++ b/arch/powerpc/boot/dts/tqm5200.dts | |||
@@ -17,6 +17,7 @@ | |||
17 | compatible = "tqc,tqm5200"; | 17 | compatible = "tqc,tqm5200"; |
18 | #address-cells = <1>; | 18 | #address-cells = <1>; |
19 | #size-cells = <1>; | 19 | #size-cells = <1>; |
20 | interrupt-parent = <&mpc5200_pic>; | ||
20 | 21 | ||
21 | cpus { | 22 | cpus { |
22 | #address-cells = <1>; | 23 | #address-cells = <1>; |
@@ -66,36 +67,33 @@ | |||
66 | compatible = "fsl,mpc5200-gpt"; | 67 | compatible = "fsl,mpc5200-gpt"; |
67 | reg = <0x600 0x10>; | 68 | reg = <0x600 0x10>; |
68 | interrupts = <1 9 0>; | 69 | interrupts = <1 9 0>; |
69 | interrupt-parent = <&mpc5200_pic>; | ||
70 | fsl,has-wdt; | 70 | fsl,has-wdt; |
71 | }; | 71 | }; |
72 | 72 | ||
73 | can@900 { | 73 | can@900 { |
74 | compatible = "fsl,mpc5200-mscan"; | 74 | compatible = "fsl,mpc5200-mscan"; |
75 | interrupts = <2 17 0>; | 75 | interrupts = <2 17 0>; |
76 | interrupt-parent = <&mpc5200_pic>; | ||
77 | reg = <0x900 0x80>; | 76 | reg = <0x900 0x80>; |
78 | }; | 77 | }; |
79 | 78 | ||
80 | can@980 { | 79 | can@980 { |
81 | compatible = "fsl,mpc5200-mscan"; | 80 | compatible = "fsl,mpc5200-mscan"; |
82 | interrupts = <2 18 0>; | 81 | interrupts = <2 18 0>; |
83 | interrupt-parent = <&mpc5200_pic>; | ||
84 | reg = <0x980 0x80>; | 82 | reg = <0x980 0x80>; |
85 | }; | 83 | }; |
86 | 84 | ||
87 | gpio@b00 { | 85 | gpio_simple: gpio@b00 { |
88 | compatible = "fsl,mpc5200-gpio"; | 86 | compatible = "fsl,mpc5200-gpio"; |
89 | reg = <0xb00 0x40>; | 87 | reg = <0xb00 0x40>; |
90 | interrupts = <1 7 0>; | 88 | interrupts = <1 7 0>; |
91 | interrupt-parent = <&mpc5200_pic>; | 89 | gpio-controller; |
90 | #gpio-cells = <2>; | ||
92 | }; | 91 | }; |
93 | 92 | ||
94 | usb@1000 { | 93 | usb@1000 { |
95 | compatible = "fsl,mpc5200-ohci","ohci-be"; | 94 | compatible = "fsl,mpc5200-ohci","ohci-be"; |
96 | reg = <0x1000 0xff>; | 95 | reg = <0x1000 0xff>; |
97 | interrupts = <2 6 0>; | 96 | interrupts = <2 6 0>; |
98 | interrupt-parent = <&mpc5200_pic>; | ||
99 | }; | 97 | }; |
100 | 98 | ||
101 | dma-controller@1200 { | 99 | dma-controller@1200 { |
@@ -105,7 +103,6 @@ | |||
105 | 3 4 0 3 5 0 3 6 0 3 7 0 | 103 | 3 4 0 3 5 0 3 6 0 3 7 0 |
106 | 3 8 0 3 9 0 3 10 0 3 11 0 | 104 | 3 8 0 3 9 0 3 10 0 3 11 0 |
107 | 3 12 0 3 13 0 3 14 0 3 15 0>; | 105 | 3 12 0 3 13 0 3 14 0 3 15 0>; |
108 | interrupt-parent = <&mpc5200_pic>; | ||
109 | }; | 106 | }; |
110 | 107 | ||
111 | xlb@1f00 { | 108 | xlb@1f00 { |
@@ -114,39 +111,28 @@ | |||
114 | }; | 111 | }; |
115 | 112 | ||
116 | serial@2000 { // PSC1 | 113 | serial@2000 { // PSC1 |
117 | device_type = "serial"; | ||
118 | compatible = "fsl,mpc5200-psc-uart"; | 114 | compatible = "fsl,mpc5200-psc-uart"; |
119 | port-number = <0>; // Logical port assignment | ||
120 | reg = <0x2000 0x100>; | 115 | reg = <0x2000 0x100>; |
121 | interrupts = <2 1 0>; | 116 | interrupts = <2 1 0>; |
122 | interrupt-parent = <&mpc5200_pic>; | ||
123 | }; | 117 | }; |
124 | 118 | ||
125 | serial@2200 { // PSC2 | 119 | serial@2200 { // PSC2 |
126 | device_type = "serial"; | ||
127 | compatible = "fsl,mpc5200-psc-uart"; | 120 | compatible = "fsl,mpc5200-psc-uart"; |
128 | port-number = <1>; // Logical port assignment | ||
129 | reg = <0x2200 0x100>; | 121 | reg = <0x2200 0x100>; |
130 | interrupts = <2 2 0>; | 122 | interrupts = <2 2 0>; |
131 | interrupt-parent = <&mpc5200_pic>; | ||
132 | }; | 123 | }; |
133 | 124 | ||
134 | serial@2400 { // PSC3 | 125 | serial@2400 { // PSC3 |
135 | device_type = "serial"; | ||
136 | compatible = "fsl,mpc5200-psc-uart"; | 126 | compatible = "fsl,mpc5200-psc-uart"; |
137 | port-number = <2>; // Logical port assignment | ||
138 | reg = <0x2400 0x100>; | 127 | reg = <0x2400 0x100>; |
139 | interrupts = <2 3 0>; | 128 | interrupts = <2 3 0>; |
140 | interrupt-parent = <&mpc5200_pic>; | ||
141 | }; | 129 | }; |
142 | 130 | ||
143 | ethernet@3000 { | 131 | ethernet@3000 { |
144 | device_type = "network"; | ||
145 | compatible = "fsl,mpc5200-fec"; | 132 | compatible = "fsl,mpc5200-fec"; |
146 | reg = <0x3000 0x400>; | 133 | reg = <0x3000 0x400>; |
147 | local-mac-address = [ 00 00 00 00 00 00 ]; | 134 | local-mac-address = [ 00 00 00 00 00 00 ]; |
148 | interrupts = <2 5 0>; | 135 | interrupts = <2 5 0>; |
149 | interrupt-parent = <&mpc5200_pic>; | ||
150 | phy-handle = <&phy0>; | 136 | phy-handle = <&phy0>; |
151 | }; | 137 | }; |
152 | 138 | ||
@@ -156,10 +142,8 @@ | |||
156 | compatible = "fsl,mpc5200-mdio"; | 142 | compatible = "fsl,mpc5200-mdio"; |
157 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts | 143 | reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts |
158 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. | 144 | interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. |
159 | interrupt-parent = <&mpc5200_pic>; | ||
160 | 145 | ||
161 | phy0: ethernet-phy@0 { | 146 | phy0: ethernet-phy@0 { |
162 | device_type = "ethernet-phy"; | ||
163 | reg = <0>; | 147 | reg = <0>; |
164 | }; | 148 | }; |
165 | }; | 149 | }; |
@@ -168,7 +152,6 @@ | |||
168 | compatible = "fsl,mpc5200-ata"; | 152 | compatible = "fsl,mpc5200-ata"; |
169 | reg = <0x3a00 0x100>; | 153 | reg = <0x3a00 0x100>; |
170 | interrupts = <2 7 0>; | 154 | interrupts = <2 7 0>; |
171 | interrupt-parent = <&mpc5200_pic>; | ||
172 | }; | 155 | }; |
173 | 156 | ||
174 | i2c@3d40 { | 157 | i2c@3d40 { |
@@ -177,7 +160,6 @@ | |||
177 | compatible = "fsl,mpc5200-i2c","fsl-i2c"; | 160 | compatible = "fsl,mpc5200-i2c","fsl-i2c"; |
178 | reg = <0x3d40 0x40>; | 161 | reg = <0x3d40 0x40>; |
179 | interrupts = <2 16 0>; | 162 | interrupts = <2 16 0>; |
180 | interrupt-parent = <&mpc5200_pic>; | ||
181 | fsl5200-clocking; | 163 | fsl5200-clocking; |
182 | 164 | ||
183 | rtc@68 { | 165 | rtc@68 { |
@@ -192,9 +174,8 @@ | |||
192 | }; | 174 | }; |
193 | }; | 175 | }; |
194 | 176 | ||
195 | lpb { | 177 | localbus { |
196 | model = "fsl,lpb"; | 178 | compatible = "fsl,mpc5200-lpb","simple-bus"; |
197 | compatible = "fsl,lpb"; | ||
198 | #address-cells = <2>; | 179 | #address-cells = <2>; |
199 | #size-cells = <1>; | 180 | #size-cells = <1>; |
200 | ranges = <0 0 0xfc000000 0x02000000>; | 181 | ranges = <0 0 0xfc000000 0x02000000>; |
@@ -223,7 +204,6 @@ | |||
223 | 0xc000 0 0 4 &mpc5200_pic 0 0 3>; | 204 | 0xc000 0 0 4 &mpc5200_pic 0 0 3>; |
224 | clock-frequency = <0>; // From boot loader | 205 | clock-frequency = <0>; // From boot loader |
225 | interrupts = <2 8 0 2 9 0 2 10 0>; | 206 | interrupts = <2 8 0 2 9 0 2 10 0>; |
226 | interrupt-parent = <&mpc5200_pic>; | ||
227 | bus-range = <0 0>; | 207 | bus-range = <0 0>; |
228 | ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 | 208 | ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 |
229 | 0x02000000 0 0x90000000 0x90000000 0 0x10000000 | 209 | 0x02000000 0 0x90000000 0x90000000 0 0x10000000 |
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts index a693f01c21aa..ac9413a29f9f 100644 --- a/arch/powerpc/boot/dts/tqm8540.dts +++ b/arch/powerpc/boot/dts/tqm8540.dts | |||
@@ -84,6 +84,11 @@ | |||
84 | interrupt-parent = <&mpic>; | 84 | interrupt-parent = <&mpic>; |
85 | dfsrr; | 85 | dfsrr; |
86 | 86 | ||
87 | dtt@50 { | ||
88 | compatible = "national,lm75"; | ||
89 | reg = <0x50>; | ||
90 | }; | ||
91 | |||
87 | rtc@68 { | 92 | rtc@68 { |
88 | compatible = "dallas,ds1337"; | 93 | compatible = "dallas,ds1337"; |
89 | reg = <0x68>; | 94 | reg = <0x68>; |
@@ -131,94 +136,103 @@ | |||
131 | }; | 136 | }; |
132 | }; | 137 | }; |
133 | 138 | ||
134 | mdio@24520 { | ||
135 | #address-cells = <1>; | ||
136 | #size-cells = <0>; | ||
137 | compatible = "fsl,gianfar-mdio"; | ||
138 | reg = <0x24520 0x20>; | ||
139 | |||
140 | phy1: ethernet-phy@1 { | ||
141 | interrupt-parent = <&mpic>; | ||
142 | interrupts = <8 1>; | ||
143 | reg = <1>; | ||
144 | device_type = "ethernet-phy"; | ||
145 | }; | ||
146 | phy2: ethernet-phy@2 { | ||
147 | interrupt-parent = <&mpic>; | ||
148 | interrupts = <8 1>; | ||
149 | reg = <2>; | ||
150 | device_type = "ethernet-phy"; | ||
151 | }; | ||
152 | phy3: ethernet-phy@3 { | ||
153 | interrupt-parent = <&mpic>; | ||
154 | interrupts = <8 1>; | ||
155 | reg = <3>; | ||
156 | device_type = "ethernet-phy"; | ||
157 | }; | ||
158 | tbi0: tbi-phy@11 { | ||
159 | reg = <0x11>; | ||
160 | device_type = "tbi-phy"; | ||
161 | }; | ||
162 | }; | ||
163 | |||
164 | mdio@25520 { | ||
165 | #address-cells = <1>; | ||
166 | #size-cells = <0>; | ||
167 | compatible = "fsl,gianfar-tbi"; | ||
168 | reg = <0x25520 0x20>; | ||
169 | |||
170 | tbi1: tbi-phy@11 { | ||
171 | reg = <0x11>; | ||
172 | device_type = "tbi-phy"; | ||
173 | }; | ||
174 | }; | ||
175 | |||
176 | mdio@26520 { | ||
177 | #address-cells = <1>; | ||
178 | #size-cells = <0>; | ||
179 | compatible = "fsl,gianfar-tbi"; | ||
180 | reg = <0x26520 0x20>; | ||
181 | |||
182 | tbi2: tbi-phy@11 { | ||
183 | reg = <0x11>; | ||
184 | device_type = "tbi-phy"; | ||
185 | }; | ||
186 | }; | ||
187 | |||
188 | enet0: ethernet@24000 { | 139 | enet0: ethernet@24000 { |
140 | #address-cells = <1>; | ||
141 | #size-cells = <1>; | ||
189 | cell-index = <0>; | 142 | cell-index = <0>; |
190 | device_type = "network"; | 143 | device_type = "network"; |
191 | model = "TSEC"; | 144 | model = "TSEC"; |
192 | compatible = "gianfar"; | 145 | compatible = "gianfar"; |
193 | reg = <0x24000 0x1000>; | 146 | reg = <0x24000 0x1000>; |
147 | ranges = <0x0 0x24000 0x1000>; | ||
194 | local-mac-address = [ 00 00 00 00 00 00 ]; | 148 | local-mac-address = [ 00 00 00 00 00 00 ]; |
195 | interrupts = <29 2 30 2 34 2>; | 149 | interrupts = <29 2 30 2 34 2>; |
196 | interrupt-parent = <&mpic>; | 150 | interrupt-parent = <&mpic>; |
197 | phy-handle = <&phy2>; | 151 | phy-handle = <&phy2>; |
152 | |||
153 | mdio@520 { | ||
154 | #address-cells = <1>; | ||
155 | #size-cells = <0>; | ||
156 | compatible = "fsl,gianfar-mdio"; | ||
157 | reg = <0x520 0x20>; | ||
158 | |||
159 | phy1: ethernet-phy@1 { | ||
160 | interrupt-parent = <&mpic>; | ||
161 | interrupts = <8 1>; | ||
162 | reg = <1>; | ||
163 | device_type = "ethernet-phy"; | ||
164 | }; | ||
165 | phy2: ethernet-phy@2 { | ||
166 | interrupt-parent = <&mpic>; | ||
167 | interrupts = <8 1>; | ||
168 | reg = <2>; | ||
169 | device_type = "ethernet-phy"; | ||
170 | }; | ||
171 | phy3: ethernet-phy@3 { | ||
172 | interrupt-parent = <&mpic>; | ||
173 | interrupts = <8 1>; | ||
174 | reg = <3>; | ||
175 | device_type = "ethernet-phy"; | ||
176 | }; | ||
177 | tbi0: tbi-phy@11 { | ||
178 | reg = <0x11>; | ||
179 | device_type = "tbi-phy"; | ||
180 | }; | ||
181 | }; | ||
198 | }; | 182 | }; |
199 | 183 | ||
200 | enet1: ethernet@25000 { | 184 | enet1: ethernet@25000 { |
185 | #address-cells = <1>; | ||
186 | #size-cells = <1>; | ||
201 | cell-index = <1>; | 187 | cell-index = <1>; |
202 | device_type = "network"; | 188 | device_type = "network"; |
203 | model = "TSEC"; | 189 | model = "TSEC"; |
204 | compatible = "gianfar"; | 190 | compatible = "gianfar"; |
205 | reg = <0x25000 0x1000>; | 191 | reg = <0x25000 0x1000>; |
192 | ranges = <0x0 0x25000 0x1000>; | ||
206 | local-mac-address = [ 00 00 00 00 00 00 ]; | 193 | local-mac-address = [ 00 00 00 00 00 00 ]; |
207 | interrupts = <35 2 36 2 40 2>; | 194 | interrupts = <35 2 36 2 40 2>; |
208 | interrupt-parent = <&mpic>; | 195 | interrupt-parent = <&mpic>; |
209 | phy-handle = <&phy1>; | 196 | phy-handle = <&phy1>; |
197 | |||
198 | mdio@520 { | ||
199 | #address-cells = <1>; | ||
200 | #size-cells = <0>; | ||
201 | compatible = "fsl,gianfar-tbi"; | ||
202 | reg = <0x520 0x20>; | ||
203 | |||
204 | tbi1: tbi-phy@11 { | ||
205 | reg = <0x11>; | ||
206 | device_type = "tbi-phy"; | ||
207 | }; | ||
208 | }; | ||
210 | }; | 209 | }; |
211 | 210 | ||
212 | enet2: ethernet@26000 { | 211 | enet2: ethernet@26000 { |
212 | #address-cells = <1>; | ||
213 | #size-cells = <1>; | ||
213 | cell-index = <2>; | 214 | cell-index = <2>; |
214 | device_type = "network"; | 215 | device_type = "network"; |
215 | model = "FEC"; | 216 | model = "FEC"; |
216 | compatible = "gianfar"; | 217 | compatible = "gianfar"; |
217 | reg = <0x26000 0x1000>; | 218 | reg = <0x26000 0x1000>; |
219 | ranges = <0x0 0x26000 0x1000>; | ||
218 | local-mac-address = [ 00 00 00 00 00 00 ]; | 220 | local-mac-address = [ 00 00 00 00 00 00 ]; |
219 | interrupts = <41 2>; | 221 | interrupts = <41 2>; |
220 | interrupt-parent = <&mpic>; | 222 | interrupt-parent = <&mpic>; |
221 | phy-handle = <&phy3>; | 223 | phy-handle = <&phy3>; |
224 | |||
225 | mdio@520 { | ||
226 | #address-cells = <1>; | ||
227 | #size-cells = <0>; | ||
228 | compatible = "fsl,gianfar-tbi"; | ||
229 | reg = <0x520 0x20>; | ||
230 | |||
231 | tbi2: tbi-phy@11 { | ||
232 | reg = <0x11>; | ||
233 | device_type = "tbi-phy"; | ||
234 | }; | ||
235 | }; | ||
222 | }; | 236 | }; |
223 | 237 | ||
224 | serial0: serial@4500 { | 238 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts index 9e3f5f0dde20..c71bb5dd5e5e 100644 --- a/arch/powerpc/boot/dts/tqm8541.dts +++ b/arch/powerpc/boot/dts/tqm8541.dts | |||
@@ -83,6 +83,11 @@ | |||
83 | interrupt-parent = <&mpic>; | 83 | interrupt-parent = <&mpic>; |
84 | dfsrr; | 84 | dfsrr; |
85 | 85 | ||
86 | dtt@50 { | ||
87 | compatible = "national,lm75"; | ||
88 | reg = <0x50>; | ||
89 | }; | ||
90 | |||
86 | rtc@68 { | 91 | rtc@68 { |
87 | compatible = "dallas,ds1337"; | 92 | compatible = "dallas,ds1337"; |
88 | reg = <0x68>; | 93 | reg = <0x68>; |
@@ -130,72 +135,78 @@ | |||
130 | }; | 135 | }; |
131 | }; | 136 | }; |
132 | 137 | ||
133 | mdio@24520 { | ||
134 | #address-cells = <1>; | ||
135 | #size-cells = <0>; | ||
136 | compatible = "fsl,gianfar-mdio"; | ||
137 | reg = <0x24520 0x20>; | ||
138 | |||
139 | phy1: ethernet-phy@1 { | ||
140 | interrupt-parent = <&mpic>; | ||
141 | interrupts = <8 1>; | ||
142 | reg = <1>; | ||
143 | device_type = "ethernet-phy"; | ||
144 | }; | ||
145 | phy2: ethernet-phy@2 { | ||
146 | interrupt-parent = <&mpic>; | ||
147 | interrupts = <8 1>; | ||
148 | reg = <2>; | ||
149 | device_type = "ethernet-phy"; | ||
150 | }; | ||
151 | phy3: ethernet-phy@3 { | ||
152 | interrupt-parent = <&mpic>; | ||
153 | interrupts = <8 1>; | ||
154 | reg = <3>; | ||
155 | device_type = "ethernet-phy"; | ||
156 | }; | ||
157 | tbi0: tbi-phy@11 { | ||
158 | reg = <0x11>; | ||
159 | device_type = "tbi-phy"; | ||
160 | }; | ||
161 | }; | ||
162 | |||
163 | mdio@25520 { | ||
164 | #address-cells = <1>; | ||
165 | #size-cells = <0>; | ||
166 | compatible = "fsl,gianfar-tbi"; | ||
167 | reg = <0x25520 0x20>; | ||
168 | |||
169 | tbi1: tbi-phy@11 { | ||
170 | reg = <0x11>; | ||
171 | device_type = "tbi-phy"; | ||
172 | }; | ||
173 | }; | ||
174 | |||
175 | enet0: ethernet@24000 { | 138 | enet0: ethernet@24000 { |
139 | #address-cells = <1>; | ||
140 | #size-cells = <1>; | ||
176 | cell-index = <0>; | 141 | cell-index = <0>; |
177 | device_type = "network"; | 142 | device_type = "network"; |
178 | model = "TSEC"; | 143 | model = "TSEC"; |
179 | compatible = "gianfar"; | 144 | compatible = "gianfar"; |
180 | reg = <0x24000 0x1000>; | 145 | reg = <0x24000 0x1000>; |
146 | ranges = <0x0 0x24000 0x1000>; | ||
181 | local-mac-address = [ 00 00 00 00 00 00 ]; | 147 | local-mac-address = [ 00 00 00 00 00 00 ]; |
182 | interrupts = <29 2 30 2 34 2>; | 148 | interrupts = <29 2 30 2 34 2>; |
183 | interrupt-parent = <&mpic>; | 149 | interrupt-parent = <&mpic>; |
184 | tbi-handle = <&tbi0>; | 150 | tbi-handle = <&tbi0>; |
185 | phy-handle = <&phy2>; | 151 | phy-handle = <&phy2>; |
152 | |||
153 | mdio@520 { | ||
154 | #address-cells = <1>; | ||
155 | #size-cells = <0>; | ||
156 | compatible = "fsl,gianfar-mdio"; | ||
157 | reg = <0x520 0x20>; | ||
158 | |||
159 | phy1: ethernet-phy@1 { | ||
160 | interrupt-parent = <&mpic>; | ||
161 | interrupts = <8 1>; | ||
162 | reg = <1>; | ||
163 | device_type = "ethernet-phy"; | ||
164 | }; | ||
165 | phy2: ethernet-phy@2 { | ||
166 | interrupt-parent = <&mpic>; | ||
167 | interrupts = <8 1>; | ||
168 | reg = <2>; | ||
169 | device_type = "ethernet-phy"; | ||
170 | }; | ||
171 | phy3: ethernet-phy@3 { | ||
172 | interrupt-parent = <&mpic>; | ||
173 | interrupts = <8 1>; | ||
174 | reg = <3>; | ||
175 | device_type = "ethernet-phy"; | ||
176 | }; | ||
177 | tbi0: tbi-phy@11 { | ||
178 | reg = <0x11>; | ||
179 | device_type = "tbi-phy"; | ||
180 | }; | ||
181 | }; | ||
186 | }; | 182 | }; |
187 | 183 | ||
188 | enet1: ethernet@25000 { | 184 | enet1: ethernet@25000 { |
185 | #address-cells = <1>; | ||
186 | #size-cells = <1>; | ||
189 | cell-index = <1>; | 187 | cell-index = <1>; |
190 | device_type = "network"; | 188 | device_type = "network"; |
191 | model = "TSEC"; | 189 | model = "TSEC"; |
192 | compatible = "gianfar"; | 190 | compatible = "gianfar"; |
193 | reg = <0x25000 0x1000>; | 191 | reg = <0x25000 0x1000>; |
192 | ranges = <0x0 0x25000 0x1000>; | ||
194 | local-mac-address = [ 00 00 00 00 00 00 ]; | 193 | local-mac-address = [ 00 00 00 00 00 00 ]; |
195 | interrupts = <35 2 36 2 40 2>; | 194 | interrupts = <35 2 36 2 40 2>; |
196 | interrupt-parent = <&mpic>; | 195 | interrupt-parent = <&mpic>; |
197 | tbi-handle = <&tbi1>; | 196 | tbi-handle = <&tbi1>; |
198 | phy-handle = <&phy1>; | 197 | phy-handle = <&phy1>; |
198 | |||
199 | mdio@520 { | ||
200 | #address-cells = <1>; | ||
201 | #size-cells = <0>; | ||
202 | compatible = "fsl,gianfar-tbi"; | ||
203 | reg = <0x520 0x20>; | ||
204 | |||
205 | tbi1: tbi-phy@11 { | ||
206 | reg = <0x11>; | ||
207 | device_type = "tbi-phy"; | ||
208 | }; | ||
209 | }; | ||
199 | }; | 210 | }; |
200 | 211 | ||
201 | serial0: serial@4500 { | 212 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts index 15086eb65c50..28b1a95257cd 100644 --- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts | |||
@@ -85,6 +85,11 @@ | |||
85 | interrupt-parent = <&mpic>; | 85 | interrupt-parent = <&mpic>; |
86 | dfsrr; | 86 | dfsrr; |
87 | 87 | ||
88 | dtt@50 { | ||
89 | compatible = "national,lm75"; | ||
90 | reg = <0x50>; | ||
91 | }; | ||
92 | |||
88 | rtc@68 { | 93 | rtc@68 { |
89 | compatible = "dallas,ds1337"; | 94 | compatible = "dallas,ds1337"; |
90 | reg = <0x68>; | 95 | reg = <0x68>; |
@@ -143,134 +148,146 @@ | |||
143 | }; | 148 | }; |
144 | }; | 149 | }; |
145 | 150 | ||
146 | mdio@24520 { | ||
147 | #address-cells = <1>; | ||
148 | #size-cells = <0>; | ||
149 | compatible = "fsl,gianfar-mdio"; | ||
150 | reg = <0x24520 0x20>; | ||
151 | |||
152 | phy1: ethernet-phy@0 { | ||
153 | interrupt-parent = <&mpic>; | ||
154 | interrupts = <8 1>; | ||
155 | reg = <1>; | ||
156 | device_type = "ethernet-phy"; | ||
157 | }; | ||
158 | phy2: ethernet-phy@1 { | ||
159 | interrupt-parent = <&mpic>; | ||
160 | interrupts = <8 1>; | ||
161 | reg = <2>; | ||
162 | device_type = "ethernet-phy"; | ||
163 | }; | ||
164 | phy3: ethernet-phy@3 { | ||
165 | interrupt-parent = <&mpic>; | ||
166 | interrupts = <8 1>; | ||
167 | reg = <3>; | ||
168 | device_type = "ethernet-phy"; | ||
169 | }; | ||
170 | phy4: ethernet-phy@4 { | ||
171 | interrupt-parent = <&mpic>; | ||
172 | interrupts = <8 1>; | ||
173 | reg = <4>; | ||
174 | device_type = "ethernet-phy"; | ||
175 | }; | ||
176 | phy5: ethernet-phy@5 { | ||
177 | interrupt-parent = <&mpic>; | ||
178 | interrupts = <8 1>; | ||
179 | reg = <5>; | ||
180 | device_type = "ethernet-phy"; | ||
181 | }; | ||
182 | tbi0: tbi-phy@11 { | ||
183 | reg = <0x11>; | ||
184 | device_type = "tbi-phy"; | ||
185 | }; | ||
186 | }; | ||
187 | |||
188 | mdio@25520 { | ||
189 | #address-cells = <1>; | ||
190 | #size-cells = <0>; | ||
191 | compatible = "fsl,gianfar-tbi"; | ||
192 | reg = <0x25520 0x20>; | ||
193 | |||
194 | tbi1: tbi-phy@11 { | ||
195 | reg = <0x11>; | ||
196 | device_type = "tbi-phy"; | ||
197 | }; | ||
198 | }; | ||
199 | |||
200 | mdio@26520 { | ||
201 | #address-cells = <1>; | ||
202 | #size-cells = <0>; | ||
203 | compatible = "fsl,gianfar-tbi"; | ||
204 | reg = <0x26520 0x20>; | ||
205 | |||
206 | tbi2: tbi-phy@11 { | ||
207 | reg = <0x11>; | ||
208 | device_type = "tbi-phy"; | ||
209 | }; | ||
210 | }; | ||
211 | |||
212 | mdio@27520 { | ||
213 | #address-cells = <1>; | ||
214 | #size-cells = <0>; | ||
215 | compatible = "fsl,gianfar-tbi"; | ||
216 | reg = <0x27520 0x20>; | ||
217 | |||
218 | tbi3: tbi-phy@11 { | ||
219 | reg = <0x11>; | ||
220 | device_type = "tbi-phy"; | ||
221 | }; | ||
222 | }; | ||
223 | |||
224 | enet0: ethernet@24000 { | 151 | enet0: ethernet@24000 { |
152 | #address-cells = <1>; | ||
153 | #size-cells = <1>; | ||
225 | cell-index = <0>; | 154 | cell-index = <0>; |
226 | device_type = "network"; | 155 | device_type = "network"; |
227 | model = "eTSEC"; | 156 | model = "eTSEC"; |
228 | compatible = "gianfar"; | 157 | compatible = "gianfar"; |
229 | reg = <0x24000 0x1000>; | 158 | reg = <0x24000 0x1000>; |
159 | ranges = <0x0 0x24000 0x1000>; | ||
230 | local-mac-address = [ 00 00 00 00 00 00 ]; | 160 | local-mac-address = [ 00 00 00 00 00 00 ]; |
231 | interrupts = <29 2 30 2 34 2>; | 161 | interrupts = <29 2 30 2 34 2>; |
232 | interrupt-parent = <&mpic>; | 162 | interrupt-parent = <&mpic>; |
233 | tbi-handle = <&tbi0>; | 163 | tbi-handle = <&tbi0>; |
234 | phy-handle = <&phy2>; | 164 | phy-handle = <&phy2>; |
165 | |||
166 | mdio@520 { | ||
167 | #address-cells = <1>; | ||
168 | #size-cells = <0>; | ||
169 | compatible = "fsl,gianfar-mdio"; | ||
170 | reg = <0x520 0x20>; | ||
171 | |||
172 | phy1: ethernet-phy@0 { | ||
173 | interrupt-parent = <&mpic>; | ||
174 | interrupts = <8 1>; | ||
175 | reg = <1>; | ||
176 | device_type = "ethernet-phy"; | ||
177 | }; | ||
178 | phy2: ethernet-phy@1 { | ||
179 | interrupt-parent = <&mpic>; | ||
180 | interrupts = <8 1>; | ||
181 | reg = <2>; | ||
182 | device_type = "ethernet-phy"; | ||
183 | }; | ||
184 | phy3: ethernet-phy@3 { | ||
185 | interrupt-parent = <&mpic>; | ||
186 | interrupts = <8 1>; | ||
187 | reg = <3>; | ||
188 | device_type = "ethernet-phy"; | ||
189 | }; | ||
190 | phy4: ethernet-phy@4 { | ||
191 | interrupt-parent = <&mpic>; | ||
192 | interrupts = <8 1>; | ||
193 | reg = <4>; | ||
194 | device_type = "ethernet-phy"; | ||
195 | }; | ||
196 | phy5: ethernet-phy@5 { | ||
197 | interrupt-parent = <&mpic>; | ||
198 | interrupts = <8 1>; | ||
199 | reg = <5>; | ||
200 | device_type = "ethernet-phy"; | ||
201 | }; | ||
202 | tbi0: tbi-phy@11 { | ||
203 | reg = <0x11>; | ||
204 | device_type = "tbi-phy"; | ||
205 | }; | ||
206 | }; | ||
235 | }; | 207 | }; |
236 | 208 | ||
237 | enet1: ethernet@25000 { | 209 | enet1: ethernet@25000 { |
210 | #address-cells = <1>; | ||
211 | #size-cells = <1>; | ||
238 | cell-index = <1>; | 212 | cell-index = <1>; |
239 | device_type = "network"; | 213 | device_type = "network"; |
240 | model = "eTSEC"; | 214 | model = "eTSEC"; |
241 | compatible = "gianfar"; | 215 | compatible = "gianfar"; |
242 | reg = <0x25000 0x1000>; | 216 | reg = <0x25000 0x1000>; |
217 | ranges = <0x0 0x25000 0x1000>; | ||
243 | local-mac-address = [ 00 00 00 00 00 00 ]; | 218 | local-mac-address = [ 00 00 00 00 00 00 ]; |
244 | interrupts = <35 2 36 2 40 2>; | 219 | interrupts = <35 2 36 2 40 2>; |
245 | interrupt-parent = <&mpic>; | 220 | interrupt-parent = <&mpic>; |
246 | tbi-handle = <&tbi1>; | 221 | tbi-handle = <&tbi1>; |
247 | phy-handle = <&phy1>; | 222 | phy-handle = <&phy1>; |
223 | |||
224 | mdio@520 { | ||
225 | #address-cells = <1>; | ||
226 | #size-cells = <0>; | ||
227 | compatible = "fsl,gianfar-tbi"; | ||
228 | reg = <0x520 0x20>; | ||
229 | |||
230 | tbi1: tbi-phy@11 { | ||
231 | reg = <0x11>; | ||
232 | device_type = "tbi-phy"; | ||
233 | }; | ||
234 | }; | ||
248 | }; | 235 | }; |
249 | 236 | ||
250 | enet2: ethernet@26000 { | 237 | enet2: ethernet@26000 { |
238 | #address-cells = <1>; | ||
239 | #size-cells = <1>; | ||
251 | cell-index = <2>; | 240 | cell-index = <2>; |
252 | device_type = "network"; | 241 | device_type = "network"; |
253 | model = "eTSEC"; | 242 | model = "eTSEC"; |
254 | compatible = "gianfar"; | 243 | compatible = "gianfar"; |
255 | reg = <0x26000 0x1000>; | 244 | reg = <0x26000 0x1000>; |
245 | ranges = <0x0 0x26000 0x1000>; | ||
256 | local-mac-address = [ 00 00 00 00 00 00 ]; | 246 | local-mac-address = [ 00 00 00 00 00 00 ]; |
257 | interrupts = <31 2 32 2 33 2>; | 247 | interrupts = <31 2 32 2 33 2>; |
258 | interrupt-parent = <&mpic>; | 248 | interrupt-parent = <&mpic>; |
259 | tbi-handle = <&tbi2>; | 249 | tbi-handle = <&tbi2>; |
260 | phy-handle = <&phy3>; | 250 | phy-handle = <&phy3>; |
251 | |||
252 | mdio@520 { | ||
253 | #address-cells = <1>; | ||
254 | #size-cells = <0>; | ||
255 | compatible = "fsl,gianfar-tbi"; | ||
256 | reg = <0x520 0x20>; | ||
257 | |||
258 | tbi2: tbi-phy@11 { | ||
259 | reg = <0x11>; | ||
260 | device_type = "tbi-phy"; | ||
261 | }; | ||
262 | }; | ||
261 | }; | 263 | }; |
262 | 264 | ||
263 | enet3: ethernet@27000 { | 265 | enet3: ethernet@27000 { |
266 | #address-cells = <1>; | ||
267 | #size-cells = <1>; | ||
264 | cell-index = <3>; | 268 | cell-index = <3>; |
265 | device_type = "network"; | 269 | device_type = "network"; |
266 | model = "eTSEC"; | 270 | model = "eTSEC"; |
267 | compatible = "gianfar"; | 271 | compatible = "gianfar"; |
268 | reg = <0x27000 0x1000>; | 272 | reg = <0x27000 0x1000>; |
273 | ranges = <0x0 0x27000 0x1000>; | ||
269 | local-mac-address = [ 00 00 00 00 00 00 ]; | 274 | local-mac-address = [ 00 00 00 00 00 00 ]; |
270 | interrupts = <37 2 38 2 39 2>; | 275 | interrupts = <37 2 38 2 39 2>; |
271 | interrupt-parent = <&mpic>; | 276 | interrupt-parent = <&mpic>; |
272 | tbi-handle = <&tbi3>; | 277 | tbi-handle = <&tbi3>; |
273 | phy-handle = <&phy4>; | 278 | phy-handle = <&phy4>; |
279 | |||
280 | mdio@520 { | ||
281 | #address-cells = <1>; | ||
282 | #size-cells = <0>; | ||
283 | compatible = "fsl,gianfar-tbi"; | ||
284 | reg = <0x520 0x20>; | ||
285 | |||
286 | tbi3: tbi-phy@11 { | ||
287 | reg = <0x11>; | ||
288 | device_type = "tbi-phy"; | ||
289 | }; | ||
290 | }; | ||
274 | }; | 291 | }; |
275 | 292 | ||
276 | serial0: serial@4500 { | 293 | serial0: serial@4500 { |
@@ -365,14 +382,14 @@ | |||
365 | can0@2,0 { | 382 | can0@2,0 { |
366 | compatible = "intel,82527"; // Bosch CC770 | 383 | compatible = "intel,82527"; // Bosch CC770 |
367 | reg = <2 0x0 0x100>; | 384 | reg = <2 0x0 0x100>; |
368 | interrupts = <4 0>; | 385 | interrupts = <4 1>; |
369 | interrupt-parent = <&mpic>; | 386 | interrupt-parent = <&mpic>; |
370 | }; | 387 | }; |
371 | 388 | ||
372 | can1@2,100 { | 389 | can1@2,100 { |
373 | compatible = "intel,82527"; // Bosch CC770 | 390 | compatible = "intel,82527"; // Bosch CC770 |
374 | reg = <2 0x100 0x100>; | 391 | reg = <2 0x100 0x100>; |
375 | interrupts = <4 0>; | 392 | interrupts = <4 1>; |
376 | interrupt-parent = <&mpic>; | 393 | interrupt-parent = <&mpic>; |
377 | }; | 394 | }; |
378 | 395 | ||
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts index b7b65f5e79b6..826fb622cd3c 100644 --- a/arch/powerpc/boot/dts/tqm8548.dts +++ b/arch/powerpc/boot/dts/tqm8548.dts | |||
@@ -85,6 +85,11 @@ | |||
85 | interrupt-parent = <&mpic>; | 85 | interrupt-parent = <&mpic>; |
86 | dfsrr; | 86 | dfsrr; |
87 | 87 | ||
88 | dtt@50 { | ||
89 | compatible = "national,lm75"; | ||
90 | reg = <0x50>; | ||
91 | }; | ||
92 | |||
88 | rtc@68 { | 93 | rtc@68 { |
89 | compatible = "dallas,ds1337"; | 94 | compatible = "dallas,ds1337"; |
90 | reg = <0x68>; | 95 | reg = <0x68>; |
@@ -143,134 +148,146 @@ | |||
143 | }; | 148 | }; |
144 | }; | 149 | }; |
145 | 150 | ||
146 | mdio@24520 { | ||
147 | #address-cells = <1>; | ||
148 | #size-cells = <0>; | ||
149 | compatible = "fsl,gianfar-mdio"; | ||
150 | reg = <0x24520 0x20>; | ||
151 | |||
152 | phy1: ethernet-phy@0 { | ||
153 | interrupt-parent = <&mpic>; | ||
154 | interrupts = <8 1>; | ||
155 | reg = <1>; | ||
156 | device_type = "ethernet-phy"; | ||
157 | }; | ||
158 | phy2: ethernet-phy@1 { | ||
159 | interrupt-parent = <&mpic>; | ||
160 | interrupts = <8 1>; | ||
161 | reg = <2>; | ||
162 | device_type = "ethernet-phy"; | ||
163 | }; | ||
164 | phy3: ethernet-phy@3 { | ||
165 | interrupt-parent = <&mpic>; | ||
166 | interrupts = <8 1>; | ||
167 | reg = <3>; | ||
168 | device_type = "ethernet-phy"; | ||
169 | }; | ||
170 | phy4: ethernet-phy@4 { | ||
171 | interrupt-parent = <&mpic>; | ||
172 | interrupts = <8 1>; | ||
173 | reg = <4>; | ||
174 | device_type = "ethernet-phy"; | ||
175 | }; | ||
176 | phy5: ethernet-phy@5 { | ||
177 | interrupt-parent = <&mpic>; | ||
178 | interrupts = <8 1>; | ||
179 | reg = <5>; | ||
180 | device_type = "ethernet-phy"; | ||
181 | }; | ||
182 | tbi0: tbi-phy@11 { | ||
183 | reg = <0x11>; | ||
184 | device_type = "tbi-phy"; | ||
185 | }; | ||
186 | }; | ||
187 | |||
188 | mdio@25520 { | ||
189 | #address-cells = <1>; | ||
190 | #size-cells = <0>; | ||
191 | compatible = "fsl,gianfar-tbi"; | ||
192 | reg = <0x25520 0x20>; | ||
193 | |||
194 | tbi1: tbi-phy@11 { | ||
195 | reg = <0x11>; | ||
196 | device_type = "tbi-phy"; | ||
197 | }; | ||
198 | }; | ||
199 | |||
200 | mdio@26520 { | ||
201 | #address-cells = <1>; | ||
202 | #size-cells = <0>; | ||
203 | compatible = "fsl,gianfar-tbi"; | ||
204 | reg = <0x26520 0x20>; | ||
205 | |||
206 | tbi2: tbi-phy@11 { | ||
207 | reg = <0x11>; | ||
208 | device_type = "tbi-phy"; | ||
209 | }; | ||
210 | }; | ||
211 | |||
212 | mdio@27520 { | ||
213 | #address-cells = <1>; | ||
214 | #size-cells = <0>; | ||
215 | compatible = "fsl,gianfar-tbi"; | ||
216 | reg = <0x27520 0x20>; | ||
217 | |||
218 | tbi3: tbi-phy@11 { | ||
219 | reg = <0x11>; | ||
220 | device_type = "tbi-phy"; | ||
221 | }; | ||
222 | }; | ||
223 | |||
224 | enet0: ethernet@24000 { | 151 | enet0: ethernet@24000 { |
152 | #address-cells = <1>; | ||
153 | #size-cells = <1>; | ||
225 | cell-index = <0>; | 154 | cell-index = <0>; |
226 | device_type = "network"; | 155 | device_type = "network"; |
227 | model = "eTSEC"; | 156 | model = "eTSEC"; |
228 | compatible = "gianfar"; | 157 | compatible = "gianfar"; |
229 | reg = <0x24000 0x1000>; | 158 | reg = <0x24000 0x1000>; |
159 | ranges = <0x0 0x24000 0x1000>; | ||
230 | local-mac-address = [ 00 00 00 00 00 00 ]; | 160 | local-mac-address = [ 00 00 00 00 00 00 ]; |
231 | interrupts = <29 2 30 2 34 2>; | 161 | interrupts = <29 2 30 2 34 2>; |
232 | interrupt-parent = <&mpic>; | 162 | interrupt-parent = <&mpic>; |
233 | tbi-handle = <&tbi0>; | 163 | tbi-handle = <&tbi0>; |
234 | phy-handle = <&phy2>; | 164 | phy-handle = <&phy2>; |
165 | |||
166 | mdio@520 { | ||
167 | #address-cells = <1>; | ||
168 | #size-cells = <0>; | ||
169 | compatible = "fsl,gianfar-mdio"; | ||
170 | reg = <0x520 0x20>; | ||
171 | |||
172 | phy1: ethernet-phy@0 { | ||
173 | interrupt-parent = <&mpic>; | ||
174 | interrupts = <8 1>; | ||
175 | reg = <1>; | ||
176 | device_type = "ethernet-phy"; | ||
177 | }; | ||
178 | phy2: ethernet-phy@1 { | ||
179 | interrupt-parent = <&mpic>; | ||
180 | interrupts = <8 1>; | ||
181 | reg = <2>; | ||
182 | device_type = "ethernet-phy"; | ||
183 | }; | ||
184 | phy3: ethernet-phy@3 { | ||
185 | interrupt-parent = <&mpic>; | ||
186 | interrupts = <8 1>; | ||
187 | reg = <3>; | ||
188 | device_type = "ethernet-phy"; | ||
189 | }; | ||
190 | phy4: ethernet-phy@4 { | ||
191 | interrupt-parent = <&mpic>; | ||
192 | interrupts = <8 1>; | ||
193 | reg = <4>; | ||
194 | device_type = "ethernet-phy"; | ||
195 | }; | ||
196 | phy5: ethernet-phy@5 { | ||
197 | interrupt-parent = <&mpic>; | ||
198 | interrupts = <8 1>; | ||
199 | reg = <5>; | ||
200 | device_type = "ethernet-phy"; | ||
201 | }; | ||
202 | tbi0: tbi-phy@11 { | ||
203 | reg = <0x11>; | ||
204 | device_type = "tbi-phy"; | ||
205 | }; | ||
206 | }; | ||
235 | }; | 207 | }; |
236 | 208 | ||
237 | enet1: ethernet@25000 { | 209 | enet1: ethernet@25000 { |
210 | #address-cells = <1>; | ||
211 | #size-cells = <1>; | ||
238 | cell-index = <1>; | 212 | cell-index = <1>; |
239 | device_type = "network"; | 213 | device_type = "network"; |
240 | model = "eTSEC"; | 214 | model = "eTSEC"; |
241 | compatible = "gianfar"; | 215 | compatible = "gianfar"; |
242 | reg = <0x25000 0x1000>; | 216 | reg = <0x25000 0x1000>; |
217 | ranges = <0x0 0x25000 0x1000>; | ||
243 | local-mac-address = [ 00 00 00 00 00 00 ]; | 218 | local-mac-address = [ 00 00 00 00 00 00 ]; |
244 | interrupts = <35 2 36 2 40 2>; | 219 | interrupts = <35 2 36 2 40 2>; |
245 | interrupt-parent = <&mpic>; | 220 | interrupt-parent = <&mpic>; |
246 | tbi-handle = <&tbi1>; | 221 | tbi-handle = <&tbi1>; |
247 | phy-handle = <&phy1>; | 222 | phy-handle = <&phy1>; |
223 | |||
224 | mdio@520 { | ||
225 | #address-cells = <1>; | ||
226 | #size-cells = <0>; | ||
227 | compatible = "fsl,gianfar-tbi"; | ||
228 | reg = <0x520 0x20>; | ||
229 | |||
230 | tbi1: tbi-phy@11 { | ||
231 | reg = <0x11>; | ||
232 | device_type = "tbi-phy"; | ||
233 | }; | ||
234 | }; | ||
248 | }; | 235 | }; |
249 | 236 | ||
250 | enet2: ethernet@26000 { | 237 | enet2: ethernet@26000 { |
238 | #address-cells = <1>; | ||
239 | #size-cells = <1>; | ||
251 | cell-index = <2>; | 240 | cell-index = <2>; |
252 | device_type = "network"; | 241 | device_type = "network"; |
253 | model = "eTSEC"; | 242 | model = "eTSEC"; |
254 | compatible = "gianfar"; | 243 | compatible = "gianfar"; |
255 | reg = <0x26000 0x1000>; | 244 | reg = <0x26000 0x1000>; |
245 | ranges = <0x0 0x26000 0x1000>; | ||
256 | local-mac-address = [ 00 00 00 00 00 00 ]; | 246 | local-mac-address = [ 00 00 00 00 00 00 ]; |
257 | interrupts = <31 2 32 2 33 2>; | 247 | interrupts = <31 2 32 2 33 2>; |
258 | interrupt-parent = <&mpic>; | 248 | interrupt-parent = <&mpic>; |
259 | tbi-handle = <&tbi2>; | 249 | tbi-handle = <&tbi2>; |
260 | phy-handle = <&phy3>; | 250 | phy-handle = <&phy3>; |
251 | |||
252 | mdio@520 { | ||
253 | #address-cells = <1>; | ||
254 | #size-cells = <0>; | ||
255 | compatible = "fsl,gianfar-tbi"; | ||
256 | reg = <0x520 0x20>; | ||
257 | |||
258 | tbi2: tbi-phy@11 { | ||
259 | reg = <0x11>; | ||
260 | device_type = "tbi-phy"; | ||
261 | }; | ||
262 | }; | ||
261 | }; | 263 | }; |
262 | 264 | ||
263 | enet3: ethernet@27000 { | 265 | enet3: ethernet@27000 { |
266 | #address-cells = <1>; | ||
267 | #size-cells = <1>; | ||
264 | cell-index = <3>; | 268 | cell-index = <3>; |
265 | device_type = "network"; | 269 | device_type = "network"; |
266 | model = "eTSEC"; | 270 | model = "eTSEC"; |
267 | compatible = "gianfar"; | 271 | compatible = "gianfar"; |
268 | reg = <0x27000 0x1000>; | 272 | reg = <0x27000 0x1000>; |
273 | ranges = <0x0 0x27000 0x1000>; | ||
269 | local-mac-address = [ 00 00 00 00 00 00 ]; | 274 | local-mac-address = [ 00 00 00 00 00 00 ]; |
270 | interrupts = <37 2 38 2 39 2>; | 275 | interrupts = <37 2 38 2 39 2>; |
271 | interrupt-parent = <&mpic>; | 276 | interrupt-parent = <&mpic>; |
272 | tbi-handle = <&tbi3>; | 277 | tbi-handle = <&tbi3>; |
273 | phy-handle = <&phy4>; | 278 | phy-handle = <&phy4>; |
279 | |||
280 | mdio@520 { | ||
281 | #address-cells = <1>; | ||
282 | #size-cells = <0>; | ||
283 | compatible = "fsl,gianfar-tbi"; | ||
284 | reg = <0x520 0x20>; | ||
285 | |||
286 | tbi3: tbi-phy@11 { | ||
287 | reg = <0x11>; | ||
288 | device_type = "tbi-phy"; | ||
289 | }; | ||
290 | }; | ||
274 | }; | 291 | }; |
275 | 292 | ||
276 | serial0: serial@4500 { | 293 | serial0: serial@4500 { |
@@ -365,14 +382,14 @@ | |||
365 | can0@2,0 { | 382 | can0@2,0 { |
366 | compatible = "intel,82527"; // Bosch CC770 | 383 | compatible = "intel,82527"; // Bosch CC770 |
367 | reg = <2 0x0 0x100>; | 384 | reg = <2 0x0 0x100>; |
368 | interrupts = <4 0>; | 385 | interrupts = <4 1>; |
369 | interrupt-parent = <&mpic>; | 386 | interrupt-parent = <&mpic>; |
370 | }; | 387 | }; |
371 | 388 | ||
372 | can1@2,100 { | 389 | can1@2,100 { |
373 | compatible = "intel,82527"; // Bosch CC770 | 390 | compatible = "intel,82527"; // Bosch CC770 |
374 | reg = <2 0x100 0x100>; | 391 | reg = <2 0x100 0x100>; |
375 | interrupts = <4 0>; | 392 | interrupts = <4 1>; |
376 | interrupt-parent = <&mpic>; | 393 | interrupt-parent = <&mpic>; |
377 | }; | 394 | }; |
378 | 395 | ||
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts index cf92b4e7945e..a133ded6dddb 100644 --- a/arch/powerpc/boot/dts/tqm8555.dts +++ b/arch/powerpc/boot/dts/tqm8555.dts | |||
@@ -83,6 +83,11 @@ | |||
83 | interrupt-parent = <&mpic>; | 83 | interrupt-parent = <&mpic>; |
84 | dfsrr; | 84 | dfsrr; |
85 | 85 | ||
86 | dtt@50 { | ||
87 | compatible = "national,lm75"; | ||
88 | reg = <0x50>; | ||
89 | }; | ||
90 | |||
86 | rtc@68 { | 91 | rtc@68 { |
87 | compatible = "dallas,ds1337"; | 92 | compatible = "dallas,ds1337"; |
88 | reg = <0x68>; | 93 | reg = <0x68>; |
@@ -130,72 +135,78 @@ | |||
130 | }; | 135 | }; |
131 | }; | 136 | }; |
132 | 137 | ||
133 | mdio@24520 { | ||
134 | #address-cells = <1>; | ||
135 | #size-cells = <0>; | ||
136 | compatible = "fsl,gianfar-mdio"; | ||
137 | reg = <0x24520 0x20>; | ||
138 | |||
139 | phy1: ethernet-phy@1 { | ||
140 | interrupt-parent = <&mpic>; | ||
141 | interrupts = <8 1>; | ||
142 | reg = <1>; | ||
143 | device_type = "ethernet-phy"; | ||
144 | }; | ||
145 | phy2: ethernet-phy@2 { | ||
146 | interrupt-parent = <&mpic>; | ||
147 | interrupts = <8 1>; | ||
148 | reg = <2>; | ||
149 | device_type = "ethernet-phy"; | ||
150 | }; | ||
151 | phy3: ethernet-phy@3 { | ||
152 | interrupt-parent = <&mpic>; | ||
153 | interrupts = <8 1>; | ||
154 | reg = <3>; | ||
155 | device_type = "ethernet-phy"; | ||
156 | }; | ||
157 | tbi0: tbi-phy@11 { | ||
158 | reg = <0x11>; | ||
159 | device_type = "tbi-phy"; | ||
160 | }; | ||
161 | }; | ||
162 | |||
163 | mdio@25520 { | ||
164 | #address-cells = <1>; | ||
165 | #size-cells = <0>; | ||
166 | compatible = "fsl,gianfar-tbi"; | ||
167 | reg = <0x25520 0x20>; | ||
168 | |||
169 | tbi1: tbi-phy@11 { | ||
170 | reg = <0x11>; | ||
171 | device_type = "tbi-phy"; | ||
172 | }; | ||
173 | }; | ||
174 | |||
175 | enet0: ethernet@24000 { | 138 | enet0: ethernet@24000 { |
139 | #address-cells = <1>; | ||
140 | #size-cells = <1>; | ||
176 | cell-index = <0>; | 141 | cell-index = <0>; |
177 | device_type = "network"; | 142 | device_type = "network"; |
178 | model = "TSEC"; | 143 | model = "TSEC"; |
179 | compatible = "gianfar"; | 144 | compatible = "gianfar"; |
180 | reg = <0x24000 0x1000>; | 145 | reg = <0x24000 0x1000>; |
146 | ranges = <0x0 0x24000 0x1000>; | ||
181 | local-mac-address = [ 00 00 00 00 00 00 ]; | 147 | local-mac-address = [ 00 00 00 00 00 00 ]; |
182 | interrupts = <29 2 30 2 34 2>; | 148 | interrupts = <29 2 30 2 34 2>; |
183 | interrupt-parent = <&mpic>; | 149 | interrupt-parent = <&mpic>; |
184 | tbi-handle = <&tbi0>; | 150 | tbi-handle = <&tbi0>; |
185 | phy-handle = <&phy2>; | 151 | phy-handle = <&phy2>; |
152 | |||
153 | mdio@520 { | ||
154 | #address-cells = <1>; | ||
155 | #size-cells = <0>; | ||
156 | compatible = "fsl,gianfar-mdio"; | ||
157 | reg = <0x520 0x20>; | ||
158 | |||
159 | phy1: ethernet-phy@1 { | ||
160 | interrupt-parent = <&mpic>; | ||
161 | interrupts = <8 1>; | ||
162 | reg = <1>; | ||
163 | device_type = "ethernet-phy"; | ||
164 | }; | ||
165 | phy2: ethernet-phy@2 { | ||
166 | interrupt-parent = <&mpic>; | ||
167 | interrupts = <8 1>; | ||
168 | reg = <2>; | ||
169 | device_type = "ethernet-phy"; | ||
170 | }; | ||
171 | phy3: ethernet-phy@3 { | ||
172 | interrupt-parent = <&mpic>; | ||
173 | interrupts = <8 1>; | ||
174 | reg = <3>; | ||
175 | device_type = "ethernet-phy"; | ||
176 | }; | ||
177 | tbi0: tbi-phy@11 { | ||
178 | reg = <0x11>; | ||
179 | device_type = "tbi-phy"; | ||
180 | }; | ||
181 | }; | ||
186 | }; | 182 | }; |
187 | 183 | ||
188 | enet1: ethernet@25000 { | 184 | enet1: ethernet@25000 { |
185 | #address-cells = <1>; | ||
186 | #size-cells = <1>; | ||
189 | cell-index = <1>; | 187 | cell-index = <1>; |
190 | device_type = "network"; | 188 | device_type = "network"; |
191 | model = "TSEC"; | 189 | model = "TSEC"; |
192 | compatible = "gianfar"; | 190 | compatible = "gianfar"; |
193 | reg = <0x25000 0x1000>; | 191 | reg = <0x25000 0x1000>; |
192 | ranges = <0x0 0x25000 0x1000>; | ||
194 | local-mac-address = [ 00 00 00 00 00 00 ]; | 193 | local-mac-address = [ 00 00 00 00 00 00 ]; |
195 | interrupts = <35 2 36 2 40 2>; | 194 | interrupts = <35 2 36 2 40 2>; |
196 | interrupt-parent = <&mpic>; | 195 | interrupt-parent = <&mpic>; |
197 | tbi-handle = <&tbi1>; | 196 | tbi-handle = <&tbi1>; |
198 | phy-handle = <&phy1>; | 197 | phy-handle = <&phy1>; |
198 | |||
199 | mdio@520 { | ||
200 | #address-cells = <1>; | ||
201 | #size-cells = <0>; | ||
202 | compatible = "fsl,gianfar-tbi"; | ||
203 | reg = <0x520 0x20>; | ||
204 | |||
205 | tbi1: tbi-phy@11 { | ||
206 | reg = <0x11>; | ||
207 | device_type = "tbi-phy"; | ||
208 | }; | ||
209 | }; | ||
199 | }; | 210 | }; |
200 | 211 | ||
201 | serial0: serial@4500 { | 212 | serial0: serial@4500 { |
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts index 9e1ab2d2f669..649e2e576267 100644 --- a/arch/powerpc/boot/dts/tqm8560.dts +++ b/arch/powerpc/boot/dts/tqm8560.dts | |||
@@ -85,6 +85,11 @@ | |||
85 | interrupt-parent = <&mpic>; | 85 | interrupt-parent = <&mpic>; |
86 | dfsrr; | 86 | dfsrr; |
87 | 87 | ||
88 | dtt@50 { | ||
89 | compatible = "national,lm75"; | ||
90 | reg = <0x50>; | ||
91 | }; | ||
92 | |||
88 | rtc@68 { | 93 | rtc@68 { |
89 | compatible = "dallas,ds1337"; | 94 | compatible = "dallas,ds1337"; |
90 | reg = <0x68>; | 95 | reg = <0x68>; |
@@ -132,72 +137,78 @@ | |||
132 | }; | 137 | }; |
133 | }; | 138 | }; |
134 | 139 | ||
135 | mdio@24520 { | ||
136 | #address-cells = <1>; | ||
137 | #size-cells = <0>; | ||
138 | compatible = "fsl,gianfar-mdio"; | ||
139 | reg = <0x24520 0x20>; | ||
140 | |||
141 | phy1: ethernet-phy@1 { | ||
142 | interrupt-parent = <&mpic>; | ||
143 | interrupts = <8 1>; | ||
144 | reg = <1>; | ||
145 | device_type = "ethernet-phy"; | ||
146 | }; | ||
147 | phy2: ethernet-phy@2 { | ||
148 | interrupt-parent = <&mpic>; | ||
149 | interrupts = <8 1>; | ||
150 | reg = <2>; | ||
151 | device_type = "ethernet-phy"; | ||
152 | }; | ||
153 | phy3: ethernet-phy@3 { | ||
154 | interrupt-parent = <&mpic>; | ||
155 | interrupts = <8 1>; | ||
156 | reg = <3>; | ||
157 | device_type = "ethernet-phy"; | ||
158 | }; | ||
159 | tbi0: tbi-phy@11 { | ||
160 | reg = <0x11>; | ||
161 | device_type = "tbi-phy"; | ||
162 | }; | ||
163 | }; | ||
164 | |||
165 | mdio@25520 { | ||
166 | #address-cells = <1>; | ||
167 | #size-cells = <0>; | ||
168 | compatible = "fsl,gianfar-tbi"; | ||
169 | reg = <0x25520 0x20>; | ||
170 | |||
171 | tbi1: tbi-phy@11 { | ||
172 | reg = <0x11>; | ||
173 | device_type = "tbi-phy"; | ||
174 | }; | ||
175 | }; | ||
176 | |||
177 | enet0: ethernet@24000 { | 140 | enet0: ethernet@24000 { |
141 | #address-cells = <1>; | ||
142 | #size-cells = <1>; | ||
178 | cell-index = <0>; | 143 | cell-index = <0>; |
179 | device_type = "network"; | 144 | device_type = "network"; |
180 | model = "TSEC"; | 145 | model = "TSEC"; |
181 | compatible = "gianfar"; | 146 | compatible = "gianfar"; |
182 | reg = <0x24000 0x1000>; | 147 | reg = <0x24000 0x1000>; |
148 | ranges = <0x0 0x24000 0x1000>; | ||
183 | local-mac-address = [ 00 00 00 00 00 00 ]; | 149 | local-mac-address = [ 00 00 00 00 00 00 ]; |
184 | interrupts = <29 2 30 2 34 2>; | 150 | interrupts = <29 2 30 2 34 2>; |
185 | interrupt-parent = <&mpic>; | 151 | interrupt-parent = <&mpic>; |
186 | tbi-handle = <&tbi0>; | 152 | tbi-handle = <&tbi0>; |
187 | phy-handle = <&phy2>; | 153 | phy-handle = <&phy2>; |
154 | |||
155 | mdio@520 { | ||
156 | #address-cells = <1>; | ||
157 | #size-cells = <0>; | ||
158 | compatible = "fsl,gianfar-mdio"; | ||
159 | reg = <0x520 0x20>; | ||
160 | |||
161 | phy1: ethernet-phy@1 { | ||
162 | interrupt-parent = <&mpic>; | ||
163 | interrupts = <8 1>; | ||
164 | reg = <1>; | ||
165 | device_type = "ethernet-phy"; | ||
166 | }; | ||
167 | phy2: ethernet-phy@2 { | ||
168 | interrupt-parent = <&mpic>; | ||
169 | interrupts = <8 1>; | ||
170 | reg = <2>; | ||
171 | device_type = "ethernet-phy"; | ||
172 | }; | ||
173 | phy3: ethernet-phy@3 { | ||
174 | interrupt-parent = <&mpic>; | ||
175 | interrupts = <8 1>; | ||
176 | reg = <3>; | ||
177 | device_type = "ethernet-phy"; | ||
178 | }; | ||
179 | tbi0: tbi-phy@11 { | ||
180 | reg = <0x11>; | ||
181 | device_type = "tbi-phy"; | ||
182 | }; | ||
183 | }; | ||
188 | }; | 184 | }; |
189 | 185 | ||
190 | enet1: ethernet@25000 { | 186 | enet1: ethernet@25000 { |
187 | #address-cells = <1>; | ||
188 | #size-cells = <1>; | ||
191 | cell-index = <1>; | 189 | cell-index = <1>; |
192 | device_type = "network"; | 190 | device_type = "network"; |
193 | model = "TSEC"; | 191 | model = "TSEC"; |
194 | compatible = "gianfar"; | 192 | compatible = "gianfar"; |
195 | reg = <0x25000 0x1000>; | 193 | reg = <0x25000 0x1000>; |
194 | ranges = <0x0 0x25000 0x1000>; | ||
196 | local-mac-address = [ 00 00 00 00 00 00 ]; | 195 | local-mac-address = [ 00 00 00 00 00 00 ]; |
197 | interrupts = <35 2 36 2 40 2>; | 196 | interrupts = <35 2 36 2 40 2>; |
198 | interrupt-parent = <&mpic>; | 197 | interrupt-parent = <&mpic>; |
199 | tbi-handle = <&tbi1>; | 198 | tbi-handle = <&tbi1>; |
200 | phy-handle = <&phy1>; | 199 | phy-handle = <&phy1>; |
200 | |||
201 | mdio@520 { | ||
202 | #address-cells = <1>; | ||
203 | #size-cells = <0>; | ||
204 | compatible = "fsl,gianfar-tbi"; | ||
205 | reg = <0x520 0x20>; | ||
206 | |||
207 | tbi1: tbi-phy@11 { | ||
208 | reg = <0x11>; | ||
209 | device_type = "tbi-phy"; | ||
210 | }; | ||
211 | }; | ||
201 | }; | 212 | }; |
202 | 213 | ||
203 | mpic: pic@40000 { | 214 | mpic: pic@40000 { |
@@ -335,14 +346,14 @@ | |||
335 | can0@2,0 { | 346 | can0@2,0 { |
336 | compatible = "intel,82527"; // Bosch CC770 | 347 | compatible = "intel,82527"; // Bosch CC770 |
337 | reg = <2 0x0 0x100>; | 348 | reg = <2 0x0 0x100>; |
338 | interrupts = <4 0>; | 349 | interrupts = <4 1>; |
339 | interrupt-parent = <&mpic>; | 350 | interrupt-parent = <&mpic>; |
340 | }; | 351 | }; |
341 | 352 | ||
342 | can1@2,100 { | 353 | can1@2,100 { |
343 | compatible = "intel,82527"; // Bosch CC770 | 354 | compatible = "intel,82527"; // Bosch CC770 |
344 | reg = <2 0x100 0x100>; | 355 | reg = <2 0x100 0x100>; |
345 | interrupts = <4 0>; | 356 | interrupts = <4 1>; |
346 | interrupt-parent = <&mpic>; | 357 | interrupt-parent = <&mpic>; |
347 | }; | 358 | }; |
348 | }; | 359 | }; |
diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts index dc8e78e2dceb..52d8c1ad26a1 100644 --- a/arch/powerpc/boot/dts/virtex440-ml507.dts +++ b/arch/powerpc/boot/dts/virtex440-ml507.dts | |||
@@ -7,6 +7,15 @@ | |||
7 | * This file is licensed under the terms of the GNU General Public License | 7 | * This file is licensed under the terms of the GNU General Public License |
8 | * version 2. This program is licensed "as is" without any warranty of any | 8 | * version 2. This program is licensed "as is" without any warranty of any |
9 | * kind, whether express or implied. | 9 | * kind, whether express or implied. |
10 | * | ||
11 | * --- | ||
12 | * | ||
13 | * Device Tree Generator version: 1.1 | ||
14 | * | ||
15 | * CAUTION: This file is automatically generated by libgen. | ||
16 | * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6 | ||
17 | * | ||
18 | * XPS project directory: ml507_ppc440_emb_ref | ||
10 | */ | 19 | */ |
11 | 20 | ||
12 | /dts-v1/; | 21 | /dts-v1/; |
@@ -22,8 +31,8 @@ | |||
22 | reg = < 0 0x10000000 >; | 31 | reg = < 0 0x10000000 >; |
23 | } ; | 32 | } ; |
24 | chosen { | 33 | chosen { |
25 | bootargs = "console=ttyS0 ip=on root=/dev/ram"; | 34 | bootargs = "console=ttyS0 root=/dev/ram"; |
26 | linux,stdout-path = "/plb@0/serial@83e00000"; | 35 | linux,stdout-path = &RS232_Uart_1; |
27 | } ; | 36 | } ; |
28 | cpus { | 37 | cpus { |
29 | #address-cells = <1>; | 38 | #address-cells = <1>; |
@@ -136,19 +145,19 @@ | |||
136 | compatible = "xlnx,ll-dma-1.00.a"; | 145 | compatible = "xlnx,ll-dma-1.00.a"; |
137 | dcr-reg = < 0x80 0x11 >; | 146 | dcr-reg = < 0x80 0x11 >; |
138 | interrupt-parent = <&xps_intc_0>; | 147 | interrupt-parent = <&xps_intc_0>; |
139 | interrupts = < 9 2 0xa 2 >; | 148 | interrupts = < 10 2 11 2 >; |
140 | } ; | 149 | } ; |
141 | } ; | 150 | } ; |
142 | } ; | 151 | } ; |
143 | plb_v46_0: plb@0 { | 152 | plb_v46_0: plb@0 { |
144 | #address-cells = <1>; | 153 | #address-cells = <1>; |
145 | #size-cells = <1>; | 154 | #size-cells = <1>; |
146 | compatible = "xlnx,plb-v46-1.02.a", "simple-bus"; | 155 | compatible = "xlnx,plb-v46-1.03.a", "simple-bus"; |
147 | ranges ; | 156 | ranges ; |
148 | DIP_Switches_8Bit: gpio@81460000 { | 157 | DIP_Switches_8Bit: gpio@81460000 { |
149 | compatible = "xlnx,xps-gpio-1.00.a"; | 158 | compatible = "xlnx,xps-gpio-1.00.a"; |
150 | interrupt-parent = <&xps_intc_0>; | 159 | interrupt-parent = <&xps_intc_0>; |
151 | interrupts = < 6 2 >; | 160 | interrupts = < 7 2 >; |
152 | reg = < 0x81460000 0x10000 >; | 161 | reg = < 0x81460000 0x10000 >; |
153 | xlnx,all-inputs = <1>; | 162 | xlnx,all-inputs = <1>; |
154 | xlnx,all-inputs-2 = <0>; | 163 | xlnx,all-inputs-2 = <0>; |
@@ -163,6 +172,86 @@ | |||
163 | xlnx,tri-default = <0xffffffff>; | 172 | xlnx,tri-default = <0xffffffff>; |
164 | xlnx,tri-default-2 = <0xffffffff>; | 173 | xlnx,tri-default-2 = <0xffffffff>; |
165 | } ; | 174 | } ; |
175 | FLASH: flash@fc000000 { | ||
176 | bank-width = <2>; | ||
177 | compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash"; | ||
178 | reg = < 0xfc000000 0x2000000 >; | ||
179 | xlnx,family = "virtex5"; | ||
180 | xlnx,include-datawidth-matching-0 = <0x1>; | ||
181 | xlnx,include-datawidth-matching-1 = <0x0>; | ||
182 | xlnx,include-datawidth-matching-2 = <0x0>; | ||
183 | xlnx,include-datawidth-matching-3 = <0x0>; | ||
184 | xlnx,include-negedge-ioregs = <0x0>; | ||
185 | xlnx,include-plb-ipif = <0x1>; | ||
186 | xlnx,include-wrbuf = <0x1>; | ||
187 | xlnx,max-mem-width = <0x10>; | ||
188 | xlnx,mch-native-dwidth = <0x20>; | ||
189 | xlnx,mch-plb-clk-period-ps = <0x2710>; | ||
190 | xlnx,mch-splb-awidth = <0x20>; | ||
191 | xlnx,mch0-accessbuf-depth = <0x10>; | ||
192 | xlnx,mch0-protocol = <0x0>; | ||
193 | xlnx,mch0-rddatabuf-depth = <0x10>; | ||
194 | xlnx,mch1-accessbuf-depth = <0x10>; | ||
195 | xlnx,mch1-protocol = <0x0>; | ||
196 | xlnx,mch1-rddatabuf-depth = <0x10>; | ||
197 | xlnx,mch2-accessbuf-depth = <0x10>; | ||
198 | xlnx,mch2-protocol = <0x0>; | ||
199 | xlnx,mch2-rddatabuf-depth = <0x10>; | ||
200 | xlnx,mch3-accessbuf-depth = <0x10>; | ||
201 | xlnx,mch3-protocol = <0x0>; | ||
202 | xlnx,mch3-rddatabuf-depth = <0x10>; | ||
203 | xlnx,mem0-width = <0x10>; | ||
204 | xlnx,mem1-width = <0x20>; | ||
205 | xlnx,mem2-width = <0x20>; | ||
206 | xlnx,mem3-width = <0x20>; | ||
207 | xlnx,num-banks-mem = <0x1>; | ||
208 | xlnx,num-channels = <0x2>; | ||
209 | xlnx,priority-mode = <0x0>; | ||
210 | xlnx,synch-mem-0 = <0x0>; | ||
211 | xlnx,synch-mem-1 = <0x0>; | ||
212 | xlnx,synch-mem-2 = <0x0>; | ||
213 | xlnx,synch-mem-3 = <0x0>; | ||
214 | xlnx,synch-pipedelay-0 = <0x2>; | ||
215 | xlnx,synch-pipedelay-1 = <0x2>; | ||
216 | xlnx,synch-pipedelay-2 = <0x2>; | ||
217 | xlnx,synch-pipedelay-3 = <0x2>; | ||
218 | xlnx,tavdv-ps-mem-0 = <0x1adb0>; | ||
219 | xlnx,tavdv-ps-mem-1 = <0x3a98>; | ||
220 | xlnx,tavdv-ps-mem-2 = <0x3a98>; | ||
221 | xlnx,tavdv-ps-mem-3 = <0x3a98>; | ||
222 | xlnx,tcedv-ps-mem-0 = <0x1adb0>; | ||
223 | xlnx,tcedv-ps-mem-1 = <0x3a98>; | ||
224 | xlnx,tcedv-ps-mem-2 = <0x3a98>; | ||
225 | xlnx,tcedv-ps-mem-3 = <0x3a98>; | ||
226 | xlnx,thzce-ps-mem-0 = <0x88b8>; | ||
227 | xlnx,thzce-ps-mem-1 = <0x1b58>; | ||
228 | xlnx,thzce-ps-mem-2 = <0x1b58>; | ||
229 | xlnx,thzce-ps-mem-3 = <0x1b58>; | ||
230 | xlnx,thzoe-ps-mem-0 = <0x1b58>; | ||
231 | xlnx,thzoe-ps-mem-1 = <0x1b58>; | ||
232 | xlnx,thzoe-ps-mem-2 = <0x1b58>; | ||
233 | xlnx,thzoe-ps-mem-3 = <0x1b58>; | ||
234 | xlnx,tlzwe-ps-mem-0 = <0x88b8>; | ||
235 | xlnx,tlzwe-ps-mem-1 = <0x0>; | ||
236 | xlnx,tlzwe-ps-mem-2 = <0x0>; | ||
237 | xlnx,tlzwe-ps-mem-3 = <0x0>; | ||
238 | xlnx,twc-ps-mem-0 = <0x2af8>; | ||
239 | xlnx,twc-ps-mem-1 = <0x3a98>; | ||
240 | xlnx,twc-ps-mem-2 = <0x3a98>; | ||
241 | xlnx,twc-ps-mem-3 = <0x3a98>; | ||
242 | xlnx,twp-ps-mem-0 = <0x11170>; | ||
243 | xlnx,twp-ps-mem-1 = <0x2ee0>; | ||
244 | xlnx,twp-ps-mem-2 = <0x2ee0>; | ||
245 | xlnx,twp-ps-mem-3 = <0x2ee0>; | ||
246 | xlnx,xcl0-linesize = <0x4>; | ||
247 | xlnx,xcl0-writexfer = <0x1>; | ||
248 | xlnx,xcl1-linesize = <0x4>; | ||
249 | xlnx,xcl1-writexfer = <0x1>; | ||
250 | xlnx,xcl2-linesize = <0x4>; | ||
251 | xlnx,xcl2-writexfer = <0x1>; | ||
252 | xlnx,xcl3-linesize = <0x4>; | ||
253 | xlnx,xcl3-writexfer = <0x1>; | ||
254 | } ; | ||
166 | Hard_Ethernet_MAC: xps-ll-temac@81c00000 { | 255 | Hard_Ethernet_MAC: xps-ll-temac@81c00000 { |
167 | #address-cells = <1>; | 256 | #address-cells = <1>; |
168 | #size-cells = <1>; | 257 | #size-cells = <1>; |
@@ -185,6 +274,19 @@ | |||
185 | xlnx,txfifo = <0x1000>; | 274 | xlnx,txfifo = <0x1000>; |
186 | } ; | 275 | } ; |
187 | } ; | 276 | } ; |
277 | IIC_EEPROM: i2c@81600000 { | ||
278 | compatible = "xlnx,xps-iic-2.00.a"; | ||
279 | interrupt-parent = <&xps_intc_0>; | ||
280 | interrupts = < 6 2 >; | ||
281 | reg = < 0x81600000 0x10000 >; | ||
282 | xlnx,clk-freq = <0x5f5e100>; | ||
283 | xlnx,family = "virtex5"; | ||
284 | xlnx,gpo-width = <0x1>; | ||
285 | xlnx,iic-freq = <0x186a0>; | ||
286 | xlnx,scl-inertial-delay = <0x0>; | ||
287 | xlnx,sda-inertial-delay = <0x0>; | ||
288 | xlnx,ten-bit-adr = <0x0>; | ||
289 | } ; | ||
188 | LEDs_8Bit: gpio@81400000 { | 290 | LEDs_8Bit: gpio@81400000 { |
189 | compatible = "xlnx,xps-gpio-1.00.a"; | 291 | compatible = "xlnx,xps-gpio-1.00.a"; |
190 | reg = < 0x81400000 0x10000 >; | 292 | reg = < 0x81400000 0x10000 >; |
@@ -220,7 +322,7 @@ | |||
220 | Push_Buttons_5Bit: gpio@81440000 { | 322 | Push_Buttons_5Bit: gpio@81440000 { |
221 | compatible = "xlnx,xps-gpio-1.00.a"; | 323 | compatible = "xlnx,xps-gpio-1.00.a"; |
222 | interrupt-parent = <&xps_intc_0>; | 324 | interrupt-parent = <&xps_intc_0>; |
223 | interrupts = < 7 2 >; | 325 | interrupts = < 8 2 >; |
224 | reg = < 0x81440000 0x10000 >; | 326 | reg = < 0x81440000 0x10000 >; |
225 | xlnx,all-inputs = <1>; | 327 | xlnx,all-inputs = <1>; |
226 | xlnx,all-inputs-2 = <0>; | 328 | xlnx,all-inputs-2 = <0>; |
@@ -237,13 +339,13 @@ | |||
237 | } ; | 339 | } ; |
238 | RS232_Uart_1: serial@83e00000 { | 340 | RS232_Uart_1: serial@83e00000 { |
239 | clock-frequency = <100000000>; | 341 | clock-frequency = <100000000>; |
240 | compatible = "xlnx,xps-uart16550-2.00.a", "ns16550"; | 342 | compatible = "xlnx,xps-uart16550-2.00.b", "ns16550"; |
241 | current-speed = <0x2580>; | 343 | current-speed = <9600>; |
242 | device_type = "serial"; | 344 | device_type = "serial"; |
243 | interrupt-parent = <&xps_intc_0>; | 345 | interrupt-parent = <&xps_intc_0>; |
244 | interrupts = < 8 2 >; | 346 | interrupts = < 9 2 >; |
245 | reg = < 0x83e00000 0x10000 >; | 347 | reg = < 0x83e00000 0x10000 >; |
246 | reg-offset = <3>; | 348 | reg-offset = <0x1003>; |
247 | reg-shift = <2>; | 349 | reg-shift = <2>; |
248 | xlnx,family = "virtex5"; | 350 | xlnx,family = "virtex5"; |
249 | xlnx,has-external-rclk = <0>; | 351 | xlnx,has-external-rclk = <0>; |
@@ -268,7 +370,7 @@ | |||
268 | compatible = "xlnx,xps-intc-1.00.a"; | 370 | compatible = "xlnx,xps-intc-1.00.a"; |
269 | interrupt-controller ; | 371 | interrupt-controller ; |
270 | reg = < 0x81800000 0x10000 >; | 372 | reg = < 0x81800000 0x10000 >; |
271 | xlnx,num-intr-inputs = <0xb>; | 373 | xlnx,num-intr-inputs = <0xc>; |
272 | } ; | 374 | } ; |
273 | xps_timebase_wdt_1: xps-timebase-wdt@83a00000 { | 375 | xps_timebase_wdt_1: xps-timebase-wdt@83a00000 { |
274 | compatible = "xlnx,xps-timebase-wdt-1.00.b"; | 376 | compatible = "xlnx,xps-timebase-wdt-1.00.b"; |
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c index 8b3607cb53fb..f2156f07571f 100644 --- a/arch/powerpc/boot/serial.c +++ b/arch/powerpc/boot/serial.c | |||
@@ -117,7 +117,8 @@ int serial_console_init(void) | |||
117 | if (devp == NULL) | 117 | if (devp == NULL) |
118 | goto err_out; | 118 | goto err_out; |
119 | 119 | ||
120 | if (dt_is_compatible(devp, "ns16550")) | 120 | if (dt_is_compatible(devp, "ns16550") || |
121 | dt_is_compatible(devp, "pnpPNP,501")) | ||
121 | rc = ns16550_console_init(devp, &serial_cd); | 122 | rc = ns16550_console_init(devp, &serial_cd); |
122 | else if (dt_is_compatible(devp, "marvell,mv64360-mpsc")) | 123 | else if (dt_is_compatible(devp, "marvell,mv64360-mpsc")) |
123 | rc = mpsc_console_init(devp, &serial_cd); | 124 | rc = mpsc_console_init(devp, &serial_cd); |
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper index 965c237c122d..3ac75aecdb94 100755 --- a/arch/powerpc/boot/wrapper +++ b/arch/powerpc/boot/wrapper | |||
@@ -186,6 +186,9 @@ cuboot*) | |||
186 | *-mpc85*|*-tqm85*|*-sbc85*) | 186 | *-mpc85*|*-tqm85*|*-sbc85*) |
187 | platformo=$object/cuboot-85xx.o | 187 | platformo=$object/cuboot-85xx.o |
188 | ;; | 188 | ;; |
189 | *-amigaone) | ||
190 | link_address='0x800000' | ||
191 | ;; | ||
189 | esac | 192 | esac |
190 | ;; | 193 | ;; |
191 | ps3) | 194 | ps3) |
@@ -211,11 +214,11 @@ simpleboot-virtex405-*) | |||
211 | binary=y | 214 | binary=y |
212 | ;; | 215 | ;; |
213 | simpleboot-virtex440-*) | 216 | simpleboot-virtex440-*) |
214 | platformo="$object/simpleboot.o $object/virtex.o" | 217 | platformo="$object/fixed-head.o $object/simpleboot.o $object/virtex.o" |
215 | binary=y | 218 | binary=y |
216 | ;; | 219 | ;; |
217 | simpleboot-*) | 220 | simpleboot-*) |
218 | platformo="$object/simpleboot.o" | 221 | platformo="$object/fixed-head.o $object/simpleboot.o" |
219 | binary=y | 222 | binary=y |
220 | ;; | 223 | ;; |
221 | asp834x-redboot) | 224 | asp834x-redboot) |
diff --git a/arch/powerpc/configs/44x/canyonlands_defconfig b/arch/powerpc/configs/44x/canyonlands_defconfig index 81cdcc4b9278..f9a08ee49b96 100644 --- a/arch/powerpc/configs/44x/canyonlands_defconfig +++ b/arch/powerpc/configs/44x/canyonlands_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.29-rc2 | 3 | # Linux kernel version: 2.6.29-rc3 |
4 | # Tue Jan 20 08:22:35 2009 | 4 | # Mon Feb 2 13:13:04 2009 |
5 | # | 5 | # |
6 | # CONFIG_PPC64 is not set | 6 | # CONFIG_PPC64 is not set |
7 | 7 | ||
@@ -74,6 +74,15 @@ CONFIG_POSIX_MQUEUE=y | |||
74 | # CONFIG_BSD_PROCESS_ACCT is not set | 74 | # CONFIG_BSD_PROCESS_ACCT is not set |
75 | # CONFIG_TASKSTATS is not set | 75 | # CONFIG_TASKSTATS is not set |
76 | # CONFIG_AUDIT is not set | 76 | # CONFIG_AUDIT is not set |
77 | |||
78 | # | ||
79 | # RCU Subsystem | ||
80 | # | ||
81 | CONFIG_CLASSIC_RCU=y | ||
82 | # CONFIG_TREE_RCU is not set | ||
83 | # CONFIG_PREEMPT_RCU is not set | ||
84 | # CONFIG_TREE_RCU_TRACE is not set | ||
85 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
77 | # CONFIG_IKCONFIG is not set | 86 | # CONFIG_IKCONFIG is not set |
78 | CONFIG_LOG_BUF_SHIFT=14 | 87 | CONFIG_LOG_BUF_SHIFT=14 |
79 | # CONFIG_GROUP_SCHED is not set | 88 | # CONFIG_GROUP_SCHED is not set |
@@ -147,11 +156,6 @@ CONFIG_DEFAULT_AS=y | |||
147 | # CONFIG_DEFAULT_CFQ is not set | 156 | # CONFIG_DEFAULT_CFQ is not set |
148 | # CONFIG_DEFAULT_NOOP is not set | 157 | # CONFIG_DEFAULT_NOOP is not set |
149 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 158 | CONFIG_DEFAULT_IOSCHED="anticipatory" |
150 | CONFIG_CLASSIC_RCU=y | ||
151 | # CONFIG_TREE_RCU is not set | ||
152 | # CONFIG_PREEMPT_RCU is not set | ||
153 | # CONFIG_TREE_RCU_TRACE is not set | ||
154 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
155 | # CONFIG_FREEZER is not set | 159 | # CONFIG_FREEZER is not set |
156 | CONFIG_PPC4xx_PCI_EXPRESS=y | 160 | CONFIG_PPC4xx_PCI_EXPRESS=y |
157 | 161 | ||
@@ -373,6 +377,7 @@ CONFIG_CONNECTOR=y | |||
373 | CONFIG_PROC_EVENTS=y | 377 | CONFIG_PROC_EVENTS=y |
374 | # CONFIG_MTD is not set | 378 | # CONFIG_MTD is not set |
375 | CONFIG_OF_DEVICE=y | 379 | CONFIG_OF_DEVICE=y |
380 | CONFIG_OF_I2C=y | ||
376 | # CONFIG_PARPORT is not set | 381 | # CONFIG_PARPORT is not set |
377 | CONFIG_BLK_DEV=y | 382 | CONFIG_BLK_DEV=y |
378 | # CONFIG_BLK_DEV_FD is not set | 383 | # CONFIG_BLK_DEV_FD is not set |
@@ -384,6 +389,7 @@ CONFIG_BLK_DEV=y | |||
384 | # CONFIG_BLK_DEV_LOOP is not set | 389 | # CONFIG_BLK_DEV_LOOP is not set |
385 | # CONFIG_BLK_DEV_NBD is not set | 390 | # CONFIG_BLK_DEV_NBD is not set |
386 | # CONFIG_BLK_DEV_SX8 is not set | 391 | # CONFIG_BLK_DEV_SX8 is not set |
392 | # CONFIG_BLK_DEV_UB is not set | ||
387 | CONFIG_BLK_DEV_RAM=y | 393 | CONFIG_BLK_DEV_RAM=y |
388 | CONFIG_BLK_DEV_RAM_COUNT=16 | 394 | CONFIG_BLK_DEV_RAM_COUNT=16 |
389 | CONFIG_BLK_DEV_RAM_SIZE=35000 | 395 | CONFIG_BLK_DEV_RAM_SIZE=35000 |
@@ -466,6 +472,15 @@ CONFIG_IBM_NEW_EMAC_EMAC4=y | |||
466 | # | 472 | # |
467 | # Enable WiMAX (Networking options) to see the WiMAX drivers | 473 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
468 | # | 474 | # |
475 | |||
476 | # | ||
477 | # USB Network Adapters | ||
478 | # | ||
479 | # CONFIG_USB_CATC is not set | ||
480 | # CONFIG_USB_KAWETH is not set | ||
481 | # CONFIG_USB_PEGASUS is not set | ||
482 | # CONFIG_USB_RTL8150 is not set | ||
483 | # CONFIG_USB_USBNET is not set | ||
469 | # CONFIG_WAN is not set | 484 | # CONFIG_WAN is not set |
470 | # CONFIG_FDDI is not set | 485 | # CONFIG_FDDI is not set |
471 | # CONFIG_HIPPI is not set | 486 | # CONFIG_HIPPI is not set |
@@ -533,13 +548,136 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
533 | # CONFIG_RAW_DRIVER is not set | 548 | # CONFIG_RAW_DRIVER is not set |
534 | # CONFIG_TCG_TPM is not set | 549 | # CONFIG_TCG_TPM is not set |
535 | CONFIG_DEVPORT=y | 550 | CONFIG_DEVPORT=y |
536 | # CONFIG_I2C is not set | 551 | CONFIG_I2C=y |
552 | CONFIG_I2C_BOARDINFO=y | ||
553 | CONFIG_I2C_CHARDEV=y | ||
554 | CONFIG_I2C_HELPER_AUTO=y | ||
555 | |||
556 | # | ||
557 | # I2C Hardware Bus support | ||
558 | # | ||
559 | |||
560 | # | ||
561 | # PC SMBus host controller drivers | ||
562 | # | ||
563 | # CONFIG_I2C_ALI1535 is not set | ||
564 | # CONFIG_I2C_ALI1563 is not set | ||
565 | # CONFIG_I2C_ALI15X3 is not set | ||
566 | # CONFIG_I2C_AMD756 is not set | ||
567 | # CONFIG_I2C_AMD8111 is not set | ||
568 | # CONFIG_I2C_I801 is not set | ||
569 | # CONFIG_I2C_ISCH is not set | ||
570 | # CONFIG_I2C_PIIX4 is not set | ||
571 | # CONFIG_I2C_NFORCE2 is not set | ||
572 | # CONFIG_I2C_SIS5595 is not set | ||
573 | # CONFIG_I2C_SIS630 is not set | ||
574 | # CONFIG_I2C_SIS96X is not set | ||
575 | # CONFIG_I2C_VIA is not set | ||
576 | # CONFIG_I2C_VIAPRO is not set | ||
577 | |||
578 | # | ||
579 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
580 | # | ||
581 | CONFIG_I2C_IBM_IIC=y | ||
582 | # CONFIG_I2C_MPC is not set | ||
583 | # CONFIG_I2C_OCORES is not set | ||
584 | # CONFIG_I2C_SIMTEC is not set | ||
585 | |||
586 | # | ||
587 | # External I2C/SMBus adapter drivers | ||
588 | # | ||
589 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
590 | # CONFIG_I2C_TAOS_EVM is not set | ||
591 | # CONFIG_I2C_TINY_USB is not set | ||
592 | |||
593 | # | ||
594 | # Graphics adapter I2C/DDC channel drivers | ||
595 | # | ||
596 | # CONFIG_I2C_VOODOO3 is not set | ||
597 | |||
598 | # | ||
599 | # Other I2C/SMBus bus drivers | ||
600 | # | ||
601 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
602 | # CONFIG_I2C_STUB is not set | ||
603 | |||
604 | # | ||
605 | # Miscellaneous I2C Chip support | ||
606 | # | ||
607 | # CONFIG_DS1682 is not set | ||
608 | # CONFIG_SENSORS_PCF8574 is not set | ||
609 | # CONFIG_PCF8575 is not set | ||
610 | # CONFIG_SENSORS_PCA9539 is not set | ||
611 | # CONFIG_SENSORS_PCF8591 is not set | ||
612 | # CONFIG_SENSORS_MAX6875 is not set | ||
613 | # CONFIG_SENSORS_TSL2550 is not set | ||
614 | # CONFIG_I2C_DEBUG_CORE is not set | ||
615 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
616 | # CONFIG_I2C_DEBUG_BUS is not set | ||
617 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
537 | # CONFIG_SPI is not set | 618 | # CONFIG_SPI is not set |
538 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | 619 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y |
539 | # CONFIG_GPIOLIB is not set | 620 | # CONFIG_GPIOLIB is not set |
540 | # CONFIG_W1 is not set | 621 | # CONFIG_W1 is not set |
541 | # CONFIG_POWER_SUPPLY is not set | 622 | # CONFIG_POWER_SUPPLY is not set |
542 | # CONFIG_HWMON is not set | 623 | CONFIG_HWMON=y |
624 | # CONFIG_HWMON_VID is not set | ||
625 | CONFIG_SENSORS_AD7414=y | ||
626 | # CONFIG_SENSORS_AD7418 is not set | ||
627 | # CONFIG_SENSORS_ADM1021 is not set | ||
628 | # CONFIG_SENSORS_ADM1025 is not set | ||
629 | # CONFIG_SENSORS_ADM1026 is not set | ||
630 | # CONFIG_SENSORS_ADM1029 is not set | ||
631 | # CONFIG_SENSORS_ADM1031 is not set | ||
632 | # CONFIG_SENSORS_ADM9240 is not set | ||
633 | # CONFIG_SENSORS_ADT7462 is not set | ||
634 | # CONFIG_SENSORS_ADT7470 is not set | ||
635 | # CONFIG_SENSORS_ADT7473 is not set | ||
636 | # CONFIG_SENSORS_ADT7475 is not set | ||
637 | # CONFIG_SENSORS_ATXP1 is not set | ||
638 | # CONFIG_SENSORS_DS1621 is not set | ||
639 | # CONFIG_SENSORS_I5K_AMB is not set | ||
640 | # CONFIG_SENSORS_F71805F is not set | ||
641 | # CONFIG_SENSORS_F71882FG is not set | ||
642 | # CONFIG_SENSORS_F75375S is not set | ||
643 | # CONFIG_SENSORS_GL518SM is not set | ||
644 | # CONFIG_SENSORS_GL520SM is not set | ||
645 | # CONFIG_SENSORS_IT87 is not set | ||
646 | # CONFIG_SENSORS_LM63 is not set | ||
647 | # CONFIG_SENSORS_LM75 is not set | ||
648 | # CONFIG_SENSORS_LM77 is not set | ||
649 | # CONFIG_SENSORS_LM78 is not set | ||
650 | # CONFIG_SENSORS_LM80 is not set | ||
651 | # CONFIG_SENSORS_LM83 is not set | ||
652 | # CONFIG_SENSORS_LM85 is not set | ||
653 | # CONFIG_SENSORS_LM87 is not set | ||
654 | # CONFIG_SENSORS_LM90 is not set | ||
655 | # CONFIG_SENSORS_LM92 is not set | ||
656 | # CONFIG_SENSORS_LM93 is not set | ||
657 | # CONFIG_SENSORS_LTC4245 is not set | ||
658 | # CONFIG_SENSORS_MAX1619 is not set | ||
659 | # CONFIG_SENSORS_MAX6650 is not set | ||
660 | # CONFIG_SENSORS_PC87360 is not set | ||
661 | # CONFIG_SENSORS_PC87427 is not set | ||
662 | # CONFIG_SENSORS_SIS5595 is not set | ||
663 | # CONFIG_SENSORS_DME1737 is not set | ||
664 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
665 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
666 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
667 | # CONFIG_SENSORS_ADS7828 is not set | ||
668 | # CONFIG_SENSORS_THMC50 is not set | ||
669 | # CONFIG_SENSORS_VIA686A is not set | ||
670 | # CONFIG_SENSORS_VT1211 is not set | ||
671 | # CONFIG_SENSORS_VT8231 is not set | ||
672 | # CONFIG_SENSORS_W83781D is not set | ||
673 | # CONFIG_SENSORS_W83791D is not set | ||
674 | # CONFIG_SENSORS_W83792D is not set | ||
675 | # CONFIG_SENSORS_W83793 is not set | ||
676 | # CONFIG_SENSORS_W83L785TS is not set | ||
677 | # CONFIG_SENSORS_W83L786NG is not set | ||
678 | # CONFIG_SENSORS_W83627HF is not set | ||
679 | # CONFIG_SENSORS_W83627EHF is not set | ||
680 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
543 | # CONFIG_THERMAL is not set | 681 | # CONFIG_THERMAL is not set |
544 | # CONFIG_THERMAL_HWMON is not set | 682 | # CONFIG_THERMAL_HWMON is not set |
545 | # CONFIG_WATCHDOG is not set | 683 | # CONFIG_WATCHDOG is not set |
@@ -556,7 +694,12 @@ CONFIG_SSB_POSSIBLE=y | |||
556 | # CONFIG_MFD_CORE is not set | 694 | # CONFIG_MFD_CORE is not set |
557 | # CONFIG_MFD_SM501 is not set | 695 | # CONFIG_MFD_SM501 is not set |
558 | # CONFIG_HTC_PASIC3 is not set | 696 | # CONFIG_HTC_PASIC3 is not set |
697 | # CONFIG_TWL4030_CORE is not set | ||
559 | # CONFIG_MFD_TMIO is not set | 698 | # CONFIG_MFD_TMIO is not set |
699 | # CONFIG_PMIC_DA903X is not set | ||
700 | # CONFIG_MFD_WM8400 is not set | ||
701 | # CONFIG_MFD_WM8350_I2C is not set | ||
702 | # CONFIG_MFD_PCF50633 is not set | ||
560 | # CONFIG_REGULATOR is not set | 703 | # CONFIG_REGULATOR is not set |
561 | 704 | ||
562 | # | 705 | # |
@@ -574,6 +717,7 @@ CONFIG_SSB_POSSIBLE=y | |||
574 | # Multimedia drivers | 717 | # Multimedia drivers |
575 | # | 718 | # |
576 | CONFIG_DAB=y | 719 | CONFIG_DAB=y |
720 | # CONFIG_USB_DABUSB is not set | ||
577 | 721 | ||
578 | # | 722 | # |
579 | # Graphics support | 723 | # Graphics support |
@@ -590,7 +734,109 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m | |||
590 | # | 734 | # |
591 | # CONFIG_DISPLAY_SUPPORT is not set | 735 | # CONFIG_DISPLAY_SUPPORT is not set |
592 | # CONFIG_SOUND is not set | 736 | # CONFIG_SOUND is not set |
593 | # CONFIG_USB_SUPPORT is not set | 737 | CONFIG_USB_SUPPORT=y |
738 | CONFIG_USB_ARCH_HAS_HCD=y | ||
739 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
740 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
741 | CONFIG_USB=y | ||
742 | # CONFIG_USB_DEBUG is not set | ||
743 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
744 | |||
745 | # | ||
746 | # Miscellaneous USB options | ||
747 | # | ||
748 | CONFIG_USB_DEVICEFS=y | ||
749 | CONFIG_USB_DEVICE_CLASS=y | ||
750 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
751 | # CONFIG_USB_OTG is not set | ||
752 | # CONFIG_USB_OTG_WHITELIST is not set | ||
753 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
754 | CONFIG_USB_MON=y | ||
755 | # CONFIG_USB_WUSB is not set | ||
756 | # CONFIG_USB_WUSB_CBAF is not set | ||
757 | |||
758 | # | ||
759 | # USB Host Controller Drivers | ||
760 | # | ||
761 | # CONFIG_USB_C67X00_HCD is not set | ||
762 | CONFIG_USB_EHCI_HCD=m | ||
763 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
764 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
765 | CONFIG_USB_EHCI_HCD_PPC_OF=y | ||
766 | # CONFIG_USB_OXU210HP_HCD is not set | ||
767 | # CONFIG_USB_ISP116X_HCD is not set | ||
768 | # CONFIG_USB_ISP1760_HCD is not set | ||
769 | CONFIG_USB_OHCI_HCD=y | ||
770 | CONFIG_USB_OHCI_HCD_PPC_OF=y | ||
771 | CONFIG_USB_OHCI_HCD_PPC_OF_BE=y | ||
772 | CONFIG_USB_OHCI_HCD_PPC_OF_LE=y | ||
773 | CONFIG_USB_OHCI_HCD_PCI=y | ||
774 | CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y | ||
775 | CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y | ||
776 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
777 | # CONFIG_USB_UHCI_HCD is not set | ||
778 | # CONFIG_USB_SL811_HCD is not set | ||
779 | # CONFIG_USB_R8A66597_HCD is not set | ||
780 | # CONFIG_USB_WHCI_HCD is not set | ||
781 | # CONFIG_USB_HWA_HCD is not set | ||
782 | |||
783 | # | ||
784 | # USB Device Class drivers | ||
785 | # | ||
786 | # CONFIG_USB_ACM is not set | ||
787 | # CONFIG_USB_PRINTER is not set | ||
788 | # CONFIG_USB_WDM is not set | ||
789 | # CONFIG_USB_TMC is not set | ||
790 | |||
791 | # | ||
792 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | ||
793 | # | ||
794 | |||
795 | # | ||
796 | # see USB_STORAGE Help for more information | ||
797 | # | ||
798 | CONFIG_USB_LIBUSUAL=y | ||
799 | |||
800 | # | ||
801 | # USB Imaging devices | ||
802 | # | ||
803 | # CONFIG_USB_MDC800 is not set | ||
804 | |||
805 | # | ||
806 | # USB port drivers | ||
807 | # | ||
808 | # CONFIG_USB_SERIAL is not set | ||
809 | |||
810 | # | ||
811 | # USB Miscellaneous drivers | ||
812 | # | ||
813 | # CONFIG_USB_EMI62 is not set | ||
814 | # CONFIG_USB_EMI26 is not set | ||
815 | # CONFIG_USB_ADUTUX is not set | ||
816 | # CONFIG_USB_SEVSEG is not set | ||
817 | # CONFIG_USB_RIO500 is not set | ||
818 | # CONFIG_USB_LEGOTOWER is not set | ||
819 | # CONFIG_USB_LCD is not set | ||
820 | # CONFIG_USB_BERRY_CHARGE is not set | ||
821 | # CONFIG_USB_LED is not set | ||
822 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
823 | # CONFIG_USB_CYTHERM is not set | ||
824 | # CONFIG_USB_PHIDGET is not set | ||
825 | # CONFIG_USB_IDMOUSE is not set | ||
826 | # CONFIG_USB_FTDI_ELAN is not set | ||
827 | # CONFIG_USB_APPLEDISPLAY is not set | ||
828 | # CONFIG_USB_SISUSBVGA is not set | ||
829 | # CONFIG_USB_LD is not set | ||
830 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
831 | # CONFIG_USB_IOWARRIOR is not set | ||
832 | # CONFIG_USB_TEST is not set | ||
833 | # CONFIG_USB_ISIGHTFW is not set | ||
834 | # CONFIG_USB_VST is not set | ||
835 | # CONFIG_USB_GADGET is not set | ||
836 | |||
837 | # | ||
838 | # OTG and related infrastructure | ||
839 | # | ||
594 | # CONFIG_UWB is not set | 840 | # CONFIG_UWB is not set |
595 | # CONFIG_MMC is not set | 841 | # CONFIG_MMC is not set |
596 | # CONFIG_MEMSTICK is not set | 842 | # CONFIG_MEMSTICK is not set |
diff --git a/arch/powerpc/configs/44x/redwood_defconfig b/arch/powerpc/configs/44x/redwood_defconfig new file mode 100644 index 000000000000..e665433762ba --- /dev/null +++ b/arch/powerpc/configs/44x/redwood_defconfig | |||
@@ -0,0 +1,1176 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.29-rc3 | ||
4 | # Wed Feb 4 14:31:09 2009 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | # CONFIG_6xx is not set | ||
12 | # CONFIG_PPC_85xx is not set | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | CONFIG_44x=y | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_PPC_FPU=y | ||
18 | CONFIG_4xx=y | ||
19 | CONFIG_BOOKE=y | ||
20 | CONFIG_PTE_64BIT=y | ||
21 | CONFIG_PHYS_64BIT=y | ||
22 | CONFIG_PPC_MMU_NOHASH=y | ||
23 | # CONFIG_PPC_MM_SLICES is not set | ||
24 | CONFIG_NOT_COHERENT_CACHE=y | ||
25 | CONFIG_PPC32=y | ||
26 | CONFIG_WORD_SIZE=32 | ||
27 | CONFIG_ARCH_PHYS_ADDR_T_64BIT=y | ||
28 | CONFIG_MMU=y | ||
29 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
30 | CONFIG_GENERIC_TIME=y | ||
31 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
32 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
33 | CONFIG_GENERIC_HARDIRQS=y | ||
34 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
35 | CONFIG_IRQ_PER_CPU=y | ||
36 | CONFIG_STACKTRACE_SUPPORT=y | ||
37 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
38 | CONFIG_LOCKDEP_SUPPORT=y | ||
39 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
40 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
41 | CONFIG_GENERIC_HWEIGHT=y | ||
42 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
43 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
44 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
45 | CONFIG_PPC=y | ||
46 | CONFIG_EARLY_PRINTK=y | ||
47 | CONFIG_GENERIC_NVRAM=y | ||
48 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
49 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
50 | CONFIG_PPC_OF=y | ||
51 | CONFIG_OF=y | ||
52 | CONFIG_PPC_UDBG_16550=y | ||
53 | # CONFIG_GENERIC_TBSYNC is not set | ||
54 | CONFIG_AUDIT_ARCH=y | ||
55 | CONFIG_GENERIC_BUG=y | ||
56 | # CONFIG_DEFAULT_UIMAGE is not set | ||
57 | CONFIG_PPC_DCR_NATIVE=y | ||
58 | # CONFIG_PPC_DCR_MMIO is not set | ||
59 | CONFIG_PPC_DCR=y | ||
60 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
61 | |||
62 | # | ||
63 | # General setup | ||
64 | # | ||
65 | CONFIG_EXPERIMENTAL=y | ||
66 | CONFIG_BROKEN_ON_SMP=y | ||
67 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
68 | CONFIG_LOCALVERSION="" | ||
69 | CONFIG_LOCALVERSION_AUTO=y | ||
70 | CONFIG_SWAP=y | ||
71 | CONFIG_SYSVIPC=y | ||
72 | CONFIG_SYSVIPC_SYSCTL=y | ||
73 | CONFIG_POSIX_MQUEUE=y | ||
74 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
75 | # CONFIG_TASKSTATS is not set | ||
76 | # CONFIG_AUDIT is not set | ||
77 | |||
78 | # | ||
79 | # RCU Subsystem | ||
80 | # | ||
81 | CONFIG_CLASSIC_RCU=y | ||
82 | # CONFIG_TREE_RCU is not set | ||
83 | # CONFIG_PREEMPT_RCU is not set | ||
84 | # CONFIG_TREE_RCU_TRACE is not set | ||
85 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
86 | # CONFIG_IKCONFIG is not set | ||
87 | CONFIG_LOG_BUF_SHIFT=14 | ||
88 | # CONFIG_GROUP_SCHED is not set | ||
89 | # CONFIG_CGROUPS is not set | ||
90 | CONFIG_SYSFS_DEPRECATED=y | ||
91 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
92 | # CONFIG_RELAY is not set | ||
93 | # CONFIG_NAMESPACES is not set | ||
94 | CONFIG_BLK_DEV_INITRD=y | ||
95 | CONFIG_INITRAMFS_SOURCE="" | ||
96 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
97 | CONFIG_SYSCTL=y | ||
98 | CONFIG_EMBEDDED=y | ||
99 | CONFIG_SYSCTL_SYSCALL=y | ||
100 | CONFIG_KALLSYMS=y | ||
101 | # CONFIG_KALLSYMS_ALL is not set | ||
102 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
103 | CONFIG_HOTPLUG=y | ||
104 | CONFIG_PRINTK=y | ||
105 | CONFIG_BUG=y | ||
106 | CONFIG_ELF_CORE=y | ||
107 | CONFIG_COMPAT_BRK=y | ||
108 | CONFIG_BASE_FULL=y | ||
109 | CONFIG_FUTEX=y | ||
110 | CONFIG_ANON_INODES=y | ||
111 | CONFIG_EPOLL=y | ||
112 | CONFIG_SIGNALFD=y | ||
113 | CONFIG_TIMERFD=y | ||
114 | CONFIG_EVENTFD=y | ||
115 | CONFIG_SHMEM=y | ||
116 | CONFIG_AIO=y | ||
117 | CONFIG_VM_EVENT_COUNTERS=y | ||
118 | CONFIG_PCI_QUIRKS=y | ||
119 | CONFIG_SLUB_DEBUG=y | ||
120 | # CONFIG_SLAB is not set | ||
121 | CONFIG_SLUB=y | ||
122 | # CONFIG_SLOB is not set | ||
123 | # CONFIG_PROFILING is not set | ||
124 | CONFIG_HAVE_OPROFILE=y | ||
125 | # CONFIG_KPROBES is not set | ||
126 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | ||
127 | CONFIG_HAVE_IOREMAP_PROT=y | ||
128 | CONFIG_HAVE_KPROBES=y | ||
129 | CONFIG_HAVE_KRETPROBES=y | ||
130 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
131 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
132 | CONFIG_SLABINFO=y | ||
133 | CONFIG_RT_MUTEXES=y | ||
134 | CONFIG_BASE_SMALL=0 | ||
135 | CONFIG_MODULES=y | ||
136 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
137 | CONFIG_MODULE_UNLOAD=y | ||
138 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
139 | # CONFIG_MODVERSIONS is not set | ||
140 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
141 | CONFIG_BLOCK=y | ||
142 | CONFIG_LBD=y | ||
143 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
144 | # CONFIG_BLK_DEV_BSG is not set | ||
145 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
146 | |||
147 | # | ||
148 | # IO Schedulers | ||
149 | # | ||
150 | CONFIG_IOSCHED_NOOP=y | ||
151 | CONFIG_IOSCHED_AS=y | ||
152 | CONFIG_IOSCHED_DEADLINE=y | ||
153 | CONFIG_IOSCHED_CFQ=y | ||
154 | CONFIG_DEFAULT_AS=y | ||
155 | # CONFIG_DEFAULT_DEADLINE is not set | ||
156 | # CONFIG_DEFAULT_CFQ is not set | ||
157 | # CONFIG_DEFAULT_NOOP is not set | ||
158 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
159 | # CONFIG_FREEZER is not set | ||
160 | CONFIG_PPC4xx_PCI_EXPRESS=y | ||
161 | |||
162 | # | ||
163 | # Platform support | ||
164 | # | ||
165 | # CONFIG_PPC_CELL is not set | ||
166 | # CONFIG_PPC_CELL_NATIVE is not set | ||
167 | # CONFIG_PQ2ADS is not set | ||
168 | # CONFIG_BAMBOO is not set | ||
169 | # CONFIG_EBONY is not set | ||
170 | # CONFIG_SAM440EP is not set | ||
171 | # CONFIG_SEQUOIA is not set | ||
172 | # CONFIG_TAISHAN is not set | ||
173 | # CONFIG_KATMAI is not set | ||
174 | # CONFIG_RAINIER is not set | ||
175 | # CONFIG_WARP is not set | ||
176 | # CONFIG_ARCHES is not set | ||
177 | # CONFIG_CANYONLANDS is not set | ||
178 | # CONFIG_GLACIER is not set | ||
179 | CONFIG_REDWOOD=y | ||
180 | # CONFIG_YOSEMITE is not set | ||
181 | # CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set | ||
182 | CONFIG_PPC44x_SIMPLE=y | ||
183 | # CONFIG_PPC4xx_GPIO is not set | ||
184 | CONFIG_460SX=y | ||
185 | # CONFIG_IPIC is not set | ||
186 | # CONFIG_MPIC is not set | ||
187 | # CONFIG_MPIC_WEIRD is not set | ||
188 | # CONFIG_PPC_I8259 is not set | ||
189 | # CONFIG_PPC_RTAS is not set | ||
190 | # CONFIG_MMIO_NVRAM is not set | ||
191 | # CONFIG_PPC_MPC106 is not set | ||
192 | # CONFIG_PPC_970_NAP is not set | ||
193 | # CONFIG_PPC_INDIRECT_IO is not set | ||
194 | # CONFIG_GENERIC_IOMAP is not set | ||
195 | # CONFIG_CPU_FREQ is not set | ||
196 | # CONFIG_FSL_ULI1575 is not set | ||
197 | # CONFIG_SIMPLE_GPIO is not set | ||
198 | |||
199 | # | ||
200 | # Kernel options | ||
201 | # | ||
202 | # CONFIG_HIGHMEM is not set | ||
203 | CONFIG_TICK_ONESHOT=y | ||
204 | CONFIG_NO_HZ=y | ||
205 | CONFIG_HIGH_RES_TIMERS=y | ||
206 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
207 | # CONFIG_HZ_100 is not set | ||
208 | CONFIG_HZ_250=y | ||
209 | # CONFIG_HZ_300 is not set | ||
210 | # CONFIG_HZ_1000 is not set | ||
211 | CONFIG_HZ=250 | ||
212 | CONFIG_SCHED_HRTICK=y | ||
213 | CONFIG_PREEMPT_NONE=y | ||
214 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
215 | # CONFIG_PREEMPT is not set | ||
216 | CONFIG_BINFMT_ELF=y | ||
217 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
218 | # CONFIG_HAVE_AOUT is not set | ||
219 | # CONFIG_BINFMT_MISC is not set | ||
220 | # CONFIG_MATH_EMULATION is not set | ||
221 | # CONFIG_IOMMU_HELPER is not set | ||
222 | CONFIG_PPC_NEED_DMA_SYNC_OPS=y | ||
223 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
224 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
225 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
226 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
227 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
228 | CONFIG_SELECT_MEMORY_MODEL=y | ||
229 | CONFIG_FLATMEM_MANUAL=y | ||
230 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
231 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
232 | CONFIG_FLATMEM=y | ||
233 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
234 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
235 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
236 | CONFIG_MIGRATION=y | ||
237 | CONFIG_PHYS_ADDR_T_64BIT=y | ||
238 | CONFIG_ZONE_DMA_FLAG=1 | ||
239 | CONFIG_BOUNCE=y | ||
240 | CONFIG_VIRT_TO_BUS=y | ||
241 | CONFIG_UNEVICTABLE_LRU=y | ||
242 | CONFIG_PPC_4K_PAGES=y | ||
243 | # CONFIG_PPC_16K_PAGES is not set | ||
244 | # CONFIG_PPC_64K_PAGES is not set | ||
245 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
246 | CONFIG_PROC_DEVICETREE=y | ||
247 | CONFIG_CMDLINE_BOOL=y | ||
248 | CONFIG_CMDLINE="" | ||
249 | CONFIG_EXTRA_TARGETS="" | ||
250 | CONFIG_SECCOMP=y | ||
251 | CONFIG_ISA_DMA_API=y | ||
252 | |||
253 | # | ||
254 | # Bus options | ||
255 | # | ||
256 | CONFIG_ZONE_DMA=y | ||
257 | CONFIG_PPC_INDIRECT_PCI=y | ||
258 | CONFIG_4xx_SOC=y | ||
259 | CONFIG_PPC_PCI_CHOICE=y | ||
260 | CONFIG_PCI=y | ||
261 | CONFIG_PCI_DOMAINS=y | ||
262 | CONFIG_PCI_SYSCALL=y | ||
263 | CONFIG_PCIEPORTBUS=y | ||
264 | CONFIG_PCIEAER=y | ||
265 | # CONFIG_PCIEASPM is not set | ||
266 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
267 | # CONFIG_PCI_MSI is not set | ||
268 | CONFIG_PCI_LEGACY=y | ||
269 | # CONFIG_PCI_DEBUG is not set | ||
270 | # CONFIG_PCI_STUB is not set | ||
271 | # CONFIG_PCCARD is not set | ||
272 | # CONFIG_HOTPLUG_PCI is not set | ||
273 | # CONFIG_HAS_RAPIDIO is not set | ||
274 | |||
275 | # | ||
276 | # Advanced setup | ||
277 | # | ||
278 | # CONFIG_ADVANCED_OPTIONS is not set | ||
279 | |||
280 | # | ||
281 | # Default settings for advanced configuration options are used | ||
282 | # | ||
283 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
284 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
285 | CONFIG_KERNEL_START=0xc0000000 | ||
286 | CONFIG_PHYSICAL_START=0x00000000 | ||
287 | CONFIG_TASK_SIZE=0xc0000000 | ||
288 | CONFIG_CONSISTENT_START=0xff100000 | ||
289 | CONFIG_CONSISTENT_SIZE=0x00200000 | ||
290 | CONFIG_NET=y | ||
291 | |||
292 | # | ||
293 | # Networking options | ||
294 | # | ||
295 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
296 | CONFIG_PACKET=y | ||
297 | # CONFIG_PACKET_MMAP is not set | ||
298 | CONFIG_UNIX=y | ||
299 | # CONFIG_NET_KEY is not set | ||
300 | CONFIG_INET=y | ||
301 | # CONFIG_IP_MULTICAST is not set | ||
302 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
303 | CONFIG_IP_FIB_HASH=y | ||
304 | CONFIG_IP_PNP=y | ||
305 | CONFIG_IP_PNP_DHCP=y | ||
306 | CONFIG_IP_PNP_BOOTP=y | ||
307 | # CONFIG_IP_PNP_RARP is not set | ||
308 | # CONFIG_NET_IPIP is not set | ||
309 | # CONFIG_NET_IPGRE is not set | ||
310 | # CONFIG_ARPD is not set | ||
311 | # CONFIG_SYN_COOKIES is not set | ||
312 | # CONFIG_INET_AH is not set | ||
313 | # CONFIG_INET_ESP is not set | ||
314 | # CONFIG_INET_IPCOMP is not set | ||
315 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
316 | # CONFIG_INET_TUNNEL is not set | ||
317 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
318 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
319 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
320 | # CONFIG_INET_LRO is not set | ||
321 | CONFIG_INET_DIAG=y | ||
322 | CONFIG_INET_TCP_DIAG=y | ||
323 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
324 | CONFIG_TCP_CONG_CUBIC=y | ||
325 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
326 | # CONFIG_TCP_MD5SIG is not set | ||
327 | # CONFIG_IPV6 is not set | ||
328 | # CONFIG_NETWORK_SECMARK is not set | ||
329 | # CONFIG_NETFILTER is not set | ||
330 | # CONFIG_IP_DCCP is not set | ||
331 | # CONFIG_IP_SCTP is not set | ||
332 | # CONFIG_TIPC is not set | ||
333 | # CONFIG_ATM is not set | ||
334 | # CONFIG_BRIDGE is not set | ||
335 | # CONFIG_NET_DSA is not set | ||
336 | # CONFIG_VLAN_8021Q is not set | ||
337 | # CONFIG_DECNET is not set | ||
338 | # CONFIG_LLC2 is not set | ||
339 | # CONFIG_IPX is not set | ||
340 | # CONFIG_ATALK is not set | ||
341 | # CONFIG_X25 is not set | ||
342 | # CONFIG_LAPB is not set | ||
343 | # CONFIG_ECONET is not set | ||
344 | # CONFIG_WAN_ROUTER is not set | ||
345 | # CONFIG_NET_SCHED is not set | ||
346 | # CONFIG_DCB is not set | ||
347 | |||
348 | # | ||
349 | # Network testing | ||
350 | # | ||
351 | # CONFIG_NET_PKTGEN is not set | ||
352 | # CONFIG_HAMRADIO is not set | ||
353 | # CONFIG_CAN is not set | ||
354 | # CONFIG_IRDA is not set | ||
355 | # CONFIG_BT is not set | ||
356 | # CONFIG_AF_RXRPC is not set | ||
357 | # CONFIG_PHONET is not set | ||
358 | CONFIG_WIRELESS=y | ||
359 | # CONFIG_CFG80211 is not set | ||
360 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
361 | # CONFIG_WIRELESS_EXT is not set | ||
362 | # CONFIG_LIB80211 is not set | ||
363 | # CONFIG_MAC80211 is not set | ||
364 | # CONFIG_WIMAX is not set | ||
365 | # CONFIG_RFKILL is not set | ||
366 | # CONFIG_NET_9P is not set | ||
367 | |||
368 | # | ||
369 | # Device Drivers | ||
370 | # | ||
371 | |||
372 | # | ||
373 | # Generic Driver Options | ||
374 | # | ||
375 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
376 | CONFIG_STANDALONE=y | ||
377 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
378 | CONFIG_FW_LOADER=y | ||
379 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
380 | CONFIG_EXTRA_FIRMWARE="" | ||
381 | # CONFIG_DEBUG_DRIVER is not set | ||
382 | # CONFIG_DEBUG_DEVRES is not set | ||
383 | # CONFIG_SYS_HYPERVISOR is not set | ||
384 | CONFIG_CONNECTOR=y | ||
385 | CONFIG_PROC_EVENTS=y | ||
386 | CONFIG_MTD=y | ||
387 | # CONFIG_MTD_DEBUG is not set | ||
388 | CONFIG_MTD_CONCAT=y | ||
389 | CONFIG_MTD_PARTITIONS=y | ||
390 | # CONFIG_MTD_TESTS is not set | ||
391 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
392 | CONFIG_MTD_CMDLINE_PARTS=y | ||
393 | CONFIG_MTD_OF_PARTS=y | ||
394 | # CONFIG_MTD_AR7_PARTS is not set | ||
395 | |||
396 | # | ||
397 | # User Modules And Translation Layers | ||
398 | # | ||
399 | CONFIG_MTD_CHAR=y | ||
400 | CONFIG_MTD_BLKDEVS=y | ||
401 | CONFIG_MTD_BLOCK=y | ||
402 | # CONFIG_FTL is not set | ||
403 | # CONFIG_NFTL is not set | ||
404 | # CONFIG_INFTL is not set | ||
405 | # CONFIG_RFD_FTL is not set | ||
406 | # CONFIG_SSFDC is not set | ||
407 | # CONFIG_MTD_OOPS is not set | ||
408 | |||
409 | # | ||
410 | # RAM/ROM/Flash chip drivers | ||
411 | # | ||
412 | CONFIG_MTD_CFI=y | ||
413 | # CONFIG_MTD_JEDECPROBE is not set | ||
414 | CONFIG_MTD_GEN_PROBE=y | ||
415 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
416 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
417 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
418 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
419 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
420 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
421 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
422 | CONFIG_MTD_CFI_I1=y | ||
423 | CONFIG_MTD_CFI_I2=y | ||
424 | # CONFIG_MTD_CFI_I4 is not set | ||
425 | # CONFIG_MTD_CFI_I8 is not set | ||
426 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
427 | CONFIG_MTD_CFI_AMDSTD=y | ||
428 | # CONFIG_MTD_CFI_STAA is not set | ||
429 | CONFIG_MTD_CFI_UTIL=y | ||
430 | # CONFIG_MTD_RAM is not set | ||
431 | # CONFIG_MTD_ROM is not set | ||
432 | # CONFIG_MTD_ABSENT is not set | ||
433 | |||
434 | # | ||
435 | # Mapping drivers for chip access | ||
436 | # | ||
437 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
438 | # CONFIG_MTD_PHYSMAP is not set | ||
439 | CONFIG_MTD_PHYSMAP_OF=y | ||
440 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
441 | # CONFIG_MTD_PLATRAM is not set | ||
442 | |||
443 | # | ||
444 | # Self-contained MTD device drivers | ||
445 | # | ||
446 | # CONFIG_MTD_PMC551 is not set | ||
447 | # CONFIG_MTD_SLRAM is not set | ||
448 | # CONFIG_MTD_PHRAM is not set | ||
449 | # CONFIG_MTD_MTDRAM is not set | ||
450 | # CONFIG_MTD_BLOCK2MTD is not set | ||
451 | |||
452 | # | ||
453 | # Disk-On-Chip Device Drivers | ||
454 | # | ||
455 | # CONFIG_MTD_DOC2000 is not set | ||
456 | # CONFIG_MTD_DOC2001 is not set | ||
457 | # CONFIG_MTD_DOC2001PLUS is not set | ||
458 | # CONFIG_MTD_NAND is not set | ||
459 | # CONFIG_MTD_ONENAND is not set | ||
460 | |||
461 | # | ||
462 | # LPDDR flash memory drivers | ||
463 | # | ||
464 | # CONFIG_MTD_LPDDR is not set | ||
465 | # CONFIG_MTD_QINFO_PROBE is not set | ||
466 | |||
467 | # | ||
468 | # UBI - Unsorted block images | ||
469 | # | ||
470 | # CONFIG_MTD_UBI is not set | ||
471 | CONFIG_OF_DEVICE=y | ||
472 | CONFIG_OF_I2C=y | ||
473 | # CONFIG_PARPORT is not set | ||
474 | CONFIG_BLK_DEV=y | ||
475 | # CONFIG_BLK_DEV_FD is not set | ||
476 | # CONFIG_BLK_CPQ_DA is not set | ||
477 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
478 | # CONFIG_BLK_DEV_DAC960 is not set | ||
479 | # CONFIG_BLK_DEV_UMEM is not set | ||
480 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
481 | # CONFIG_BLK_DEV_LOOP is not set | ||
482 | # CONFIG_BLK_DEV_NBD is not set | ||
483 | # CONFIG_BLK_DEV_SX8 is not set | ||
484 | CONFIG_BLK_DEV_RAM=y | ||
485 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
486 | CONFIG_BLK_DEV_RAM_SIZE=35000 | ||
487 | # CONFIG_BLK_DEV_XIP is not set | ||
488 | # CONFIG_CDROM_PKTCDVD is not set | ||
489 | # CONFIG_ATA_OVER_ETH is not set | ||
490 | # CONFIG_XILINX_SYSACE is not set | ||
491 | # CONFIG_BLK_DEV_HD is not set | ||
492 | # CONFIG_MISC_DEVICES is not set | ||
493 | CONFIG_HAVE_IDE=y | ||
494 | # CONFIG_IDE is not set | ||
495 | |||
496 | # | ||
497 | # SCSI device support | ||
498 | # | ||
499 | # CONFIG_RAID_ATTRS is not set | ||
500 | CONFIG_SCSI=y | ||
501 | CONFIG_SCSI_DMA=y | ||
502 | # CONFIG_SCSI_TGT is not set | ||
503 | # CONFIG_SCSI_NETLINK is not set | ||
504 | CONFIG_SCSI_PROC_FS=y | ||
505 | |||
506 | # | ||
507 | # SCSI support type (disk, tape, CD-ROM) | ||
508 | # | ||
509 | CONFIG_BLK_DEV_SD=y | ||
510 | # CONFIG_CHR_DEV_ST is not set | ||
511 | # CONFIG_CHR_DEV_OSST is not set | ||
512 | # CONFIG_BLK_DEV_SR is not set | ||
513 | CONFIG_CHR_DEV_SG=y | ||
514 | # CONFIG_CHR_DEV_SCH is not set | ||
515 | |||
516 | # | ||
517 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
518 | # | ||
519 | # CONFIG_SCSI_MULTI_LUN is not set | ||
520 | # CONFIG_SCSI_CONSTANTS is not set | ||
521 | # CONFIG_SCSI_LOGGING is not set | ||
522 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
523 | CONFIG_SCSI_WAIT_SCAN=m | ||
524 | |||
525 | # | ||
526 | # SCSI Transports | ||
527 | # | ||
528 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
529 | # CONFIG_SCSI_FC_ATTRS is not set | ||
530 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
531 | CONFIG_SCSI_SAS_ATTRS=y | ||
532 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
533 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
534 | CONFIG_SCSI_LOWLEVEL=y | ||
535 | # CONFIG_ISCSI_TCP is not set | ||
536 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
537 | # CONFIG_SCSI_3W_9XXX is not set | ||
538 | # CONFIG_SCSI_ACARD is not set | ||
539 | # CONFIG_SCSI_AACRAID is not set | ||
540 | # CONFIG_SCSI_AIC7XXX is not set | ||
541 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
542 | # CONFIG_SCSI_AIC79XX is not set | ||
543 | # CONFIG_SCSI_AIC94XX is not set | ||
544 | # CONFIG_SCSI_DPT_I2O is not set | ||
545 | # CONFIG_SCSI_ADVANSYS is not set | ||
546 | # CONFIG_SCSI_ARCMSR is not set | ||
547 | # CONFIG_MEGARAID_NEWGEN is not set | ||
548 | # CONFIG_MEGARAID_LEGACY is not set | ||
549 | # CONFIG_MEGARAID_SAS is not set | ||
550 | # CONFIG_SCSI_HPTIOP is not set | ||
551 | # CONFIG_SCSI_BUSLOGIC is not set | ||
552 | # CONFIG_LIBFC is not set | ||
553 | # CONFIG_FCOE is not set | ||
554 | # CONFIG_SCSI_DMX3191D is not set | ||
555 | # CONFIG_SCSI_EATA is not set | ||
556 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
557 | # CONFIG_SCSI_GDTH is not set | ||
558 | # CONFIG_SCSI_IPS is not set | ||
559 | # CONFIG_SCSI_INITIO is not set | ||
560 | # CONFIG_SCSI_INIA100 is not set | ||
561 | # CONFIG_SCSI_MVSAS is not set | ||
562 | # CONFIG_SCSI_STEX is not set | ||
563 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
564 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
565 | # CONFIG_SCSI_QLA_FC is not set | ||
566 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
567 | # CONFIG_SCSI_LPFC is not set | ||
568 | # CONFIG_SCSI_DC395x is not set | ||
569 | # CONFIG_SCSI_DC390T is not set | ||
570 | # CONFIG_SCSI_NSP32 is not set | ||
571 | # CONFIG_SCSI_DEBUG is not set | ||
572 | # CONFIG_SCSI_SRP is not set | ||
573 | # CONFIG_SCSI_DH is not set | ||
574 | # CONFIG_ATA is not set | ||
575 | # CONFIG_MD is not set | ||
576 | CONFIG_FUSION=y | ||
577 | # CONFIG_FUSION_SPI is not set | ||
578 | # CONFIG_FUSION_FC is not set | ||
579 | CONFIG_FUSION_SAS=y | ||
580 | CONFIG_FUSION_MAX_SGE=128 | ||
581 | # CONFIG_FUSION_CTL is not set | ||
582 | # CONFIG_FUSION_LOGGING is not set | ||
583 | |||
584 | # | ||
585 | # IEEE 1394 (FireWire) support | ||
586 | # | ||
587 | |||
588 | # | ||
589 | # Enable only one of the two stacks, unless you know what you are doing | ||
590 | # | ||
591 | # CONFIG_FIREWIRE is not set | ||
592 | # CONFIG_IEEE1394 is not set | ||
593 | CONFIG_I2O=y | ||
594 | CONFIG_I2O_LCT_NOTIFY_ON_CHANGES=y | ||
595 | CONFIG_I2O_EXT_ADAPTEC=y | ||
596 | # CONFIG_I2O_CONFIG is not set | ||
597 | # CONFIG_I2O_BUS is not set | ||
598 | # CONFIG_I2O_BLOCK is not set | ||
599 | # CONFIG_I2O_SCSI is not set | ||
600 | # CONFIG_I2O_PROC is not set | ||
601 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
602 | CONFIG_NETDEVICES=y | ||
603 | # CONFIG_DUMMY is not set | ||
604 | # CONFIG_BONDING is not set | ||
605 | # CONFIG_MACVLAN is not set | ||
606 | # CONFIG_EQUALIZER is not set | ||
607 | # CONFIG_TUN is not set | ||
608 | # CONFIG_VETH is not set | ||
609 | # CONFIG_ARCNET is not set | ||
610 | # CONFIG_PHYLIB is not set | ||
611 | CONFIG_NET_ETHERNET=y | ||
612 | # CONFIG_MII is not set | ||
613 | # CONFIG_HAPPYMEAL is not set | ||
614 | # CONFIG_SUNGEM is not set | ||
615 | # CONFIG_CASSINI is not set | ||
616 | # CONFIG_NET_VENDOR_3COM is not set | ||
617 | # CONFIG_NET_TULIP is not set | ||
618 | # CONFIG_HP100 is not set | ||
619 | CONFIG_IBM_NEW_EMAC=y | ||
620 | CONFIG_IBM_NEW_EMAC_RXB=256 | ||
621 | CONFIG_IBM_NEW_EMAC_TXB=256 | ||
622 | CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32 | ||
623 | CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256 | ||
624 | CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0 | ||
625 | CONFIG_IBM_NEW_EMAC_DEBUG=y | ||
626 | CONFIG_IBM_NEW_EMAC_ZMII=y | ||
627 | CONFIG_IBM_NEW_EMAC_RGMII=y | ||
628 | CONFIG_IBM_NEW_EMAC_TAH=y | ||
629 | CONFIG_IBM_NEW_EMAC_EMAC4=y | ||
630 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
631 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
632 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
633 | # CONFIG_NET_PCI is not set | ||
634 | # CONFIG_B44 is not set | ||
635 | # CONFIG_ATL2 is not set | ||
636 | CONFIG_NETDEV_1000=y | ||
637 | # CONFIG_ACENIC is not set | ||
638 | # CONFIG_DL2K is not set | ||
639 | # CONFIG_E1000 is not set | ||
640 | CONFIG_E1000E=y | ||
641 | # CONFIG_IP1000 is not set | ||
642 | # CONFIG_IGB is not set | ||
643 | # CONFIG_NS83820 is not set | ||
644 | # CONFIG_HAMACHI is not set | ||
645 | # CONFIG_YELLOWFIN is not set | ||
646 | # CONFIG_R8169 is not set | ||
647 | # CONFIG_SIS190 is not set | ||
648 | # CONFIG_SKGE is not set | ||
649 | # CONFIG_SKY2 is not set | ||
650 | # CONFIG_VIA_VELOCITY is not set | ||
651 | # CONFIG_TIGON3 is not set | ||
652 | # CONFIG_BNX2 is not set | ||
653 | # CONFIG_QLA3XXX is not set | ||
654 | # CONFIG_ATL1 is not set | ||
655 | # CONFIG_ATL1E is not set | ||
656 | # CONFIG_JME is not set | ||
657 | # CONFIG_NETDEV_10000 is not set | ||
658 | # CONFIG_TR is not set | ||
659 | |||
660 | # | ||
661 | # Wireless LAN | ||
662 | # | ||
663 | # CONFIG_WLAN_PRE80211 is not set | ||
664 | # CONFIG_WLAN_80211 is not set | ||
665 | # CONFIG_IWLWIFI_LEDS is not set | ||
666 | |||
667 | # | ||
668 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
669 | # | ||
670 | # CONFIG_WAN is not set | ||
671 | # CONFIG_FDDI is not set | ||
672 | # CONFIG_HIPPI is not set | ||
673 | # CONFIG_PPP is not set | ||
674 | # CONFIG_SLIP is not set | ||
675 | # CONFIG_NET_FC is not set | ||
676 | # CONFIG_NETCONSOLE is not set | ||
677 | # CONFIG_NETPOLL is not set | ||
678 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
679 | # CONFIG_ISDN is not set | ||
680 | # CONFIG_PHONE is not set | ||
681 | |||
682 | # | ||
683 | # Input device support | ||
684 | # | ||
685 | # CONFIG_INPUT is not set | ||
686 | |||
687 | # | ||
688 | # Hardware I/O ports | ||
689 | # | ||
690 | # CONFIG_SERIO is not set | ||
691 | # CONFIG_GAMEPORT is not set | ||
692 | |||
693 | # | ||
694 | # Character devices | ||
695 | # | ||
696 | # CONFIG_VT is not set | ||
697 | CONFIG_DEVKMEM=y | ||
698 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
699 | # CONFIG_NOZOMI is not set | ||
700 | |||
701 | # | ||
702 | # Serial drivers | ||
703 | # | ||
704 | CONFIG_SERIAL_8250=y | ||
705 | CONFIG_SERIAL_8250_CONSOLE=y | ||
706 | # CONFIG_SERIAL_8250_PCI is not set | ||
707 | CONFIG_SERIAL_8250_NR_UARTS=1 | ||
708 | CONFIG_SERIAL_8250_RUNTIME_UARTS=1 | ||
709 | CONFIG_SERIAL_8250_EXTENDED=y | ||
710 | # CONFIG_SERIAL_8250_MANY_PORTS is not set | ||
711 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
712 | # CONFIG_SERIAL_8250_DETECT_IRQ is not set | ||
713 | # CONFIG_SERIAL_8250_RSA is not set | ||
714 | |||
715 | # | ||
716 | # Non-8250 serial port support | ||
717 | # | ||
718 | # CONFIG_SERIAL_UARTLITE is not set | ||
719 | CONFIG_SERIAL_CORE=y | ||
720 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
721 | # CONFIG_SERIAL_JSM is not set | ||
722 | CONFIG_SERIAL_OF_PLATFORM=y | ||
723 | # CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set | ||
724 | CONFIG_UNIX98_PTYS=y | ||
725 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
726 | CONFIG_LEGACY_PTYS=y | ||
727 | CONFIG_LEGACY_PTY_COUNT=256 | ||
728 | # CONFIG_HVC_UDBG is not set | ||
729 | # CONFIG_IPMI_HANDLER is not set | ||
730 | # CONFIG_HW_RANDOM is not set | ||
731 | # CONFIG_NVRAM is not set | ||
732 | # CONFIG_GEN_RTC is not set | ||
733 | # CONFIG_R3964 is not set | ||
734 | # CONFIG_APPLICOM is not set | ||
735 | # CONFIG_RAW_DRIVER is not set | ||
736 | # CONFIG_TCG_TPM is not set | ||
737 | CONFIG_DEVPORT=y | ||
738 | CONFIG_I2C=y | ||
739 | CONFIG_I2C_BOARDINFO=y | ||
740 | CONFIG_I2C_CHARDEV=y | ||
741 | CONFIG_I2C_HELPER_AUTO=y | ||
742 | |||
743 | # | ||
744 | # I2C Hardware Bus support | ||
745 | # | ||
746 | |||
747 | # | ||
748 | # PC SMBus host controller drivers | ||
749 | # | ||
750 | # CONFIG_I2C_ALI1535 is not set | ||
751 | # CONFIG_I2C_ALI1563 is not set | ||
752 | # CONFIG_I2C_ALI15X3 is not set | ||
753 | # CONFIG_I2C_AMD756 is not set | ||
754 | # CONFIG_I2C_AMD8111 is not set | ||
755 | # CONFIG_I2C_I801 is not set | ||
756 | # CONFIG_I2C_ISCH is not set | ||
757 | # CONFIG_I2C_PIIX4 is not set | ||
758 | # CONFIG_I2C_NFORCE2 is not set | ||
759 | # CONFIG_I2C_SIS5595 is not set | ||
760 | # CONFIG_I2C_SIS630 is not set | ||
761 | # CONFIG_I2C_SIS96X is not set | ||
762 | # CONFIG_I2C_VIA is not set | ||
763 | # CONFIG_I2C_VIAPRO is not set | ||
764 | |||
765 | # | ||
766 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
767 | # | ||
768 | CONFIG_I2C_IBM_IIC=y | ||
769 | # CONFIG_I2C_MPC is not set | ||
770 | # CONFIG_I2C_OCORES is not set | ||
771 | # CONFIG_I2C_SIMTEC is not set | ||
772 | |||
773 | # | ||
774 | # External I2C/SMBus adapter drivers | ||
775 | # | ||
776 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
777 | # CONFIG_I2C_TAOS_EVM is not set | ||
778 | |||
779 | # | ||
780 | # Graphics adapter I2C/DDC channel drivers | ||
781 | # | ||
782 | # CONFIG_I2C_VOODOO3 is not set | ||
783 | |||
784 | # | ||
785 | # Other I2C/SMBus bus drivers | ||
786 | # | ||
787 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
788 | # CONFIG_I2C_STUB is not set | ||
789 | |||
790 | # | ||
791 | # Miscellaneous I2C Chip support | ||
792 | # | ||
793 | # CONFIG_DS1682 is not set | ||
794 | # CONFIG_SENSORS_PCF8574 is not set | ||
795 | # CONFIG_PCF8575 is not set | ||
796 | # CONFIG_SENSORS_PCA9539 is not set | ||
797 | # CONFIG_SENSORS_PCF8591 is not set | ||
798 | # CONFIG_SENSORS_MAX6875 is not set | ||
799 | # CONFIG_SENSORS_TSL2550 is not set | ||
800 | CONFIG_I2C_DEBUG_CORE=y | ||
801 | CONFIG_I2C_DEBUG_ALGO=y | ||
802 | CONFIG_I2C_DEBUG_BUS=y | ||
803 | CONFIG_I2C_DEBUG_CHIP=y | ||
804 | # CONFIG_SPI is not set | ||
805 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
806 | # CONFIG_GPIOLIB is not set | ||
807 | # CONFIG_W1 is not set | ||
808 | # CONFIG_POWER_SUPPLY is not set | ||
809 | # CONFIG_HWMON is not set | ||
810 | # CONFIG_THERMAL is not set | ||
811 | # CONFIG_THERMAL_HWMON is not set | ||
812 | # CONFIG_WATCHDOG is not set | ||
813 | CONFIG_SSB_POSSIBLE=y | ||
814 | |||
815 | # | ||
816 | # Sonics Silicon Backplane | ||
817 | # | ||
818 | # CONFIG_SSB is not set | ||
819 | |||
820 | # | ||
821 | # Multifunction device drivers | ||
822 | # | ||
823 | # CONFIG_MFD_CORE is not set | ||
824 | # CONFIG_MFD_SM501 is not set | ||
825 | # CONFIG_HTC_PASIC3 is not set | ||
826 | # CONFIG_TWL4030_CORE is not set | ||
827 | # CONFIG_MFD_TMIO is not set | ||
828 | # CONFIG_PMIC_DA903X is not set | ||
829 | # CONFIG_MFD_WM8400 is not set | ||
830 | # CONFIG_MFD_WM8350_I2C is not set | ||
831 | # CONFIG_MFD_PCF50633 is not set | ||
832 | # CONFIG_REGULATOR is not set | ||
833 | |||
834 | # | ||
835 | # Multimedia devices | ||
836 | # | ||
837 | |||
838 | # | ||
839 | # Multimedia core support | ||
840 | # | ||
841 | # CONFIG_VIDEO_DEV is not set | ||
842 | # CONFIG_DVB_CORE is not set | ||
843 | # CONFIG_VIDEO_MEDIA is not set | ||
844 | |||
845 | # | ||
846 | # Multimedia drivers | ||
847 | # | ||
848 | CONFIG_DAB=y | ||
849 | |||
850 | # | ||
851 | # Graphics support | ||
852 | # | ||
853 | # CONFIG_AGP is not set | ||
854 | # CONFIG_DRM is not set | ||
855 | # CONFIG_VGASTATE is not set | ||
856 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
857 | # CONFIG_FB is not set | ||
858 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
859 | |||
860 | # | ||
861 | # Display device support | ||
862 | # | ||
863 | # CONFIG_DISPLAY_SUPPORT is not set | ||
864 | # CONFIG_SOUND is not set | ||
865 | # CONFIG_USB_SUPPORT is not set | ||
866 | # CONFIG_UWB is not set | ||
867 | # CONFIG_MMC is not set | ||
868 | # CONFIG_MEMSTICK is not set | ||
869 | # CONFIG_NEW_LEDS is not set | ||
870 | # CONFIG_ACCESSIBILITY is not set | ||
871 | # CONFIG_INFINIBAND is not set | ||
872 | # CONFIG_EDAC is not set | ||
873 | # CONFIG_RTC_CLASS is not set | ||
874 | CONFIG_DMADEVICES=y | ||
875 | |||
876 | # | ||
877 | # DMA Devices | ||
878 | # | ||
879 | # CONFIG_UIO is not set | ||
880 | # CONFIG_STAGING is not set | ||
881 | |||
882 | # | ||
883 | # File systems | ||
884 | # | ||
885 | CONFIG_EXT2_FS=y | ||
886 | # CONFIG_EXT2_FS_XATTR is not set | ||
887 | # CONFIG_EXT2_FS_XIP is not set | ||
888 | # CONFIG_EXT3_FS is not set | ||
889 | # CONFIG_EXT4_FS is not set | ||
890 | # CONFIG_REISERFS_FS is not set | ||
891 | # CONFIG_JFS_FS is not set | ||
892 | # CONFIG_FS_POSIX_ACL is not set | ||
893 | CONFIG_FILE_LOCKING=y | ||
894 | # CONFIG_XFS_FS is not set | ||
895 | # CONFIG_GFS2_FS is not set | ||
896 | # CONFIG_OCFS2_FS is not set | ||
897 | # CONFIG_BTRFS_FS is not set | ||
898 | CONFIG_DNOTIFY=y | ||
899 | CONFIG_INOTIFY=y | ||
900 | CONFIG_INOTIFY_USER=y | ||
901 | # CONFIG_QUOTA is not set | ||
902 | # CONFIG_AUTOFS_FS is not set | ||
903 | # CONFIG_AUTOFS4_FS is not set | ||
904 | # CONFIG_FUSE_FS is not set | ||
905 | |||
906 | # | ||
907 | # CD-ROM/DVD Filesystems | ||
908 | # | ||
909 | # CONFIG_ISO9660_FS is not set | ||
910 | # CONFIG_UDF_FS is not set | ||
911 | |||
912 | # | ||
913 | # DOS/FAT/NT Filesystems | ||
914 | # | ||
915 | # CONFIG_MSDOS_FS is not set | ||
916 | # CONFIG_VFAT_FS is not set | ||
917 | # CONFIG_NTFS_FS is not set | ||
918 | |||
919 | # | ||
920 | # Pseudo filesystems | ||
921 | # | ||
922 | CONFIG_PROC_FS=y | ||
923 | CONFIG_PROC_KCORE=y | ||
924 | CONFIG_PROC_SYSCTL=y | ||
925 | CONFIG_PROC_PAGE_MONITOR=y | ||
926 | CONFIG_SYSFS=y | ||
927 | CONFIG_TMPFS=y | ||
928 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
929 | # CONFIG_HUGETLB_PAGE is not set | ||
930 | # CONFIG_CONFIGFS_FS is not set | ||
931 | CONFIG_MISC_FILESYSTEMS=y | ||
932 | # CONFIG_ADFS_FS is not set | ||
933 | # CONFIG_AFFS_FS is not set | ||
934 | # CONFIG_HFS_FS is not set | ||
935 | # CONFIG_HFSPLUS_FS is not set | ||
936 | # CONFIG_BEFS_FS is not set | ||
937 | # CONFIG_BFS_FS is not set | ||
938 | # CONFIG_EFS_FS is not set | ||
939 | # CONFIG_JFFS2_FS is not set | ||
940 | CONFIG_CRAMFS=y | ||
941 | # CONFIG_SQUASHFS is not set | ||
942 | # CONFIG_VXFS_FS is not set | ||
943 | # CONFIG_MINIX_FS is not set | ||
944 | # CONFIG_OMFS_FS is not set | ||
945 | # CONFIG_HPFS_FS is not set | ||
946 | # CONFIG_QNX4FS_FS is not set | ||
947 | # CONFIG_ROMFS_FS is not set | ||
948 | # CONFIG_SYSV_FS is not set | ||
949 | # CONFIG_UFS_FS is not set | ||
950 | CONFIG_NETWORK_FILESYSTEMS=y | ||
951 | CONFIG_NFS_FS=y | ||
952 | CONFIG_NFS_V3=y | ||
953 | # CONFIG_NFS_V3_ACL is not set | ||
954 | # CONFIG_NFS_V4 is not set | ||
955 | CONFIG_ROOT_NFS=y | ||
956 | # CONFIG_NFSD is not set | ||
957 | CONFIG_LOCKD=y | ||
958 | CONFIG_LOCKD_V4=y | ||
959 | CONFIG_NFS_COMMON=y | ||
960 | CONFIG_SUNRPC=y | ||
961 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
962 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
963 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
964 | # CONFIG_SMB_FS is not set | ||
965 | # CONFIG_CIFS is not set | ||
966 | # CONFIG_NCP_FS is not set | ||
967 | # CONFIG_CODA_FS is not set | ||
968 | # CONFIG_AFS_FS is not set | ||
969 | |||
970 | # | ||
971 | # Partition Types | ||
972 | # | ||
973 | # CONFIG_PARTITION_ADVANCED is not set | ||
974 | CONFIG_MSDOS_PARTITION=y | ||
975 | # CONFIG_NLS is not set | ||
976 | # CONFIG_DLM is not set | ||
977 | |||
978 | # | ||
979 | # Library routines | ||
980 | # | ||
981 | CONFIG_BITREVERSE=y | ||
982 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
983 | # CONFIG_CRC_CCITT is not set | ||
984 | # CONFIG_CRC16 is not set | ||
985 | # CONFIG_CRC_T10DIF is not set | ||
986 | # CONFIG_CRC_ITU_T is not set | ||
987 | CONFIG_CRC32=y | ||
988 | # CONFIG_CRC7 is not set | ||
989 | # CONFIG_LIBCRC32C is not set | ||
990 | CONFIG_ZLIB_INFLATE=y | ||
991 | CONFIG_PLIST=y | ||
992 | CONFIG_HAS_IOMEM=y | ||
993 | CONFIG_HAS_IOPORT=y | ||
994 | CONFIG_HAS_DMA=y | ||
995 | CONFIG_HAVE_LMB=y | ||
996 | |||
997 | # | ||
998 | # Kernel hacking | ||
999 | # | ||
1000 | # CONFIG_PRINTK_TIME is not set | ||
1001 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1002 | CONFIG_ENABLE_MUST_CHECK=y | ||
1003 | CONFIG_FRAME_WARN=1024 | ||
1004 | CONFIG_MAGIC_SYSRQ=y | ||
1005 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1006 | CONFIG_DEBUG_FS=y | ||
1007 | # CONFIG_HEADERS_CHECK is not set | ||
1008 | CONFIG_DEBUG_KERNEL=y | ||
1009 | # CONFIG_DEBUG_SHIRQ is not set | ||
1010 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1011 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
1012 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
1013 | CONFIG_SCHED_DEBUG=y | ||
1014 | # CONFIG_SCHEDSTATS is not set | ||
1015 | # CONFIG_TIMER_STATS is not set | ||
1016 | # CONFIG_DEBUG_OBJECTS is not set | ||
1017 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1018 | # CONFIG_SLUB_STATS is not set | ||
1019 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1020 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1021 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1022 | # CONFIG_DEBUG_MUTEXES is not set | ||
1023 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1024 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1025 | # CONFIG_DEBUG_KOBJECT is not set | ||
1026 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1027 | # CONFIG_DEBUG_INFO is not set | ||
1028 | # CONFIG_DEBUG_VM is not set | ||
1029 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
1030 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
1031 | # CONFIG_DEBUG_LIST is not set | ||
1032 | # CONFIG_DEBUG_SG is not set | ||
1033 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
1034 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1035 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1036 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1037 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
1038 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
1039 | # CONFIG_FAULT_INJECTION is not set | ||
1040 | # CONFIG_LATENCYTOP is not set | ||
1041 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
1042 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
1043 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
1044 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
1045 | |||
1046 | # | ||
1047 | # Tracers | ||
1048 | # | ||
1049 | # CONFIG_FUNCTION_TRACER is not set | ||
1050 | # CONFIG_SCHED_TRACER is not set | ||
1051 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
1052 | # CONFIG_BOOT_TRACER is not set | ||
1053 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
1054 | # CONFIG_STACK_TRACER is not set | ||
1055 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
1056 | # CONFIG_SAMPLES is not set | ||
1057 | CONFIG_HAVE_ARCH_KGDB=y | ||
1058 | # CONFIG_KGDB is not set | ||
1059 | CONFIG_PRINT_STACK_DEPTH=64 | ||
1060 | # CONFIG_DEBUG_STACKOVERFLOW is not set | ||
1061 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
1062 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
1063 | # CONFIG_CODE_PATCHING_SELFTEST is not set | ||
1064 | # CONFIG_FTR_FIXUP_SELFTEST is not set | ||
1065 | # CONFIG_MSI_BITMAP_SELFTEST is not set | ||
1066 | # CONFIG_XMON is not set | ||
1067 | # CONFIG_IRQSTACKS is not set | ||
1068 | # CONFIG_VIRQ_DEBUG is not set | ||
1069 | # CONFIG_BDI_SWITCH is not set | ||
1070 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1071 | |||
1072 | # | ||
1073 | # Security options | ||
1074 | # | ||
1075 | # CONFIG_KEYS is not set | ||
1076 | # CONFIG_SECURITY is not set | ||
1077 | # CONFIG_SECURITYFS is not set | ||
1078 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1079 | CONFIG_CRYPTO=y | ||
1080 | |||
1081 | # | ||
1082 | # Crypto core or helper | ||
1083 | # | ||
1084 | # CONFIG_CRYPTO_FIPS is not set | ||
1085 | CONFIG_CRYPTO_ALGAPI=y | ||
1086 | CONFIG_CRYPTO_ALGAPI2=y | ||
1087 | CONFIG_CRYPTO_AEAD=y | ||
1088 | CONFIG_CRYPTO_AEAD2=y | ||
1089 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1090 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
1091 | CONFIG_CRYPTO_HASH=y | ||
1092 | CONFIG_CRYPTO_HASH2=y | ||
1093 | CONFIG_CRYPTO_RNG=y | ||
1094 | CONFIG_CRYPTO_RNG2=y | ||
1095 | CONFIG_CRYPTO_MANAGER=y | ||
1096 | CONFIG_CRYPTO_MANAGER2=y | ||
1097 | CONFIG_CRYPTO_GF128MUL=y | ||
1098 | # CONFIG_CRYPTO_NULL is not set | ||
1099 | CONFIG_CRYPTO_CRYPTD=y | ||
1100 | CONFIG_CRYPTO_AUTHENC=y | ||
1101 | # CONFIG_CRYPTO_TEST is not set | ||
1102 | |||
1103 | # | ||
1104 | # Authenticated Encryption with Associated Data | ||
1105 | # | ||
1106 | CONFIG_CRYPTO_CCM=y | ||
1107 | CONFIG_CRYPTO_GCM=y | ||
1108 | CONFIG_CRYPTO_SEQIV=y | ||
1109 | |||
1110 | # | ||
1111 | # Block modes | ||
1112 | # | ||
1113 | CONFIG_CRYPTO_CBC=y | ||
1114 | CONFIG_CRYPTO_CTR=y | ||
1115 | CONFIG_CRYPTO_CTS=y | ||
1116 | CONFIG_CRYPTO_ECB=y | ||
1117 | CONFIG_CRYPTO_LRW=y | ||
1118 | CONFIG_CRYPTO_PCBC=y | ||
1119 | CONFIG_CRYPTO_XTS=y | ||
1120 | |||
1121 | # | ||
1122 | # Hash modes | ||
1123 | # | ||
1124 | CONFIG_CRYPTO_HMAC=y | ||
1125 | CONFIG_CRYPTO_XCBC=y | ||
1126 | |||
1127 | # | ||
1128 | # Digest | ||
1129 | # | ||
1130 | # CONFIG_CRYPTO_CRC32C is not set | ||
1131 | CONFIG_CRYPTO_MD4=y | ||
1132 | CONFIG_CRYPTO_MD5=y | ||
1133 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1134 | # CONFIG_CRYPTO_RMD128 is not set | ||
1135 | # CONFIG_CRYPTO_RMD160 is not set | ||
1136 | # CONFIG_CRYPTO_RMD256 is not set | ||
1137 | # CONFIG_CRYPTO_RMD320 is not set | ||
1138 | CONFIG_CRYPTO_SHA1=y | ||
1139 | CONFIG_CRYPTO_SHA256=y | ||
1140 | CONFIG_CRYPTO_SHA512=y | ||
1141 | # CONFIG_CRYPTO_TGR192 is not set | ||
1142 | # CONFIG_CRYPTO_WP512 is not set | ||
1143 | |||
1144 | # | ||
1145 | # Ciphers | ||
1146 | # | ||
1147 | CONFIG_CRYPTO_AES=y | ||
1148 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1149 | CONFIG_CRYPTO_ARC4=y | ||
1150 | CONFIG_CRYPTO_BLOWFISH=y | ||
1151 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1152 | # CONFIG_CRYPTO_CAST5 is not set | ||
1153 | # CONFIG_CRYPTO_CAST6 is not set | ||
1154 | CONFIG_CRYPTO_DES=y | ||
1155 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1156 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1157 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1158 | # CONFIG_CRYPTO_SEED is not set | ||
1159 | # CONFIG_CRYPTO_SERPENT is not set | ||
1160 | # CONFIG_CRYPTO_TEA is not set | ||
1161 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1162 | |||
1163 | # | ||
1164 | # Compression | ||
1165 | # | ||
1166 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1167 | # CONFIG_CRYPTO_LZO is not set | ||
1168 | |||
1169 | # | ||
1170 | # Random Number Generation | ||
1171 | # | ||
1172 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1173 | CONFIG_CRYPTO_HW=y | ||
1174 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
1175 | # CONFIG_PPC_CLOCK is not set | ||
1176 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/configs/85xx/socrates_defconfig b/arch/powerpc/configs/85xx/socrates_defconfig new file mode 100644 index 000000000000..0cc9048290a8 --- /dev/null +++ b/arch/powerpc/configs/85xx/socrates_defconfig | |||
@@ -0,0 +1,1410 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.26.2 | ||
4 | # Sat Oct 18 11:06:13 2008 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | # CONFIG_6xx is not set | ||
12 | CONFIG_PPC_85xx=y | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_E500=y | ||
18 | CONFIG_BOOKE=y | ||
19 | CONFIG_FSL_BOOKE=y | ||
20 | CONFIG_FSL_EMB_PERFMON=y | ||
21 | # CONFIG_PHYS_64BIT is not set | ||
22 | CONFIG_SPE=y | ||
23 | # CONFIG_PPC_MM_SLICES is not set | ||
24 | CONFIG_PPC32=y | ||
25 | CONFIG_WORD_SIZE=32 | ||
26 | CONFIG_PPC_MERGE=y | ||
27 | CONFIG_MMU=y | ||
28 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
29 | CONFIG_GENERIC_TIME=y | ||
30 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
31 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
32 | CONFIG_GENERIC_HARDIRQS=y | ||
33 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
34 | CONFIG_IRQ_PER_CPU=y | ||
35 | CONFIG_STACKTRACE_SUPPORT=y | ||
36 | CONFIG_LOCKDEP_SUPPORT=y | ||
37 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
38 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
39 | CONFIG_GENERIC_HWEIGHT=y | ||
40 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
41 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
42 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
43 | CONFIG_PPC=y | ||
44 | CONFIG_EARLY_PRINTK=y | ||
45 | CONFIG_GENERIC_NVRAM=y | ||
46 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
47 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
48 | CONFIG_PPC_OF=y | ||
49 | CONFIG_OF=y | ||
50 | CONFIG_PPC_UDBG_16550=y | ||
51 | # CONFIG_GENERIC_TBSYNC is not set | ||
52 | CONFIG_AUDIT_ARCH=y | ||
53 | CONFIG_GENERIC_BUG=y | ||
54 | CONFIG_DEFAULT_UIMAGE=y | ||
55 | # CONFIG_PPC_DCR_NATIVE is not set | ||
56 | # CONFIG_PPC_DCR_MMIO is not set | ||
57 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
58 | |||
59 | # | ||
60 | # General setup | ||
61 | # | ||
62 | CONFIG_EXPERIMENTAL=y | ||
63 | CONFIG_BROKEN_ON_SMP=y | ||
64 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
65 | CONFIG_LOCALVERSION="" | ||
66 | CONFIG_LOCALVERSION_AUTO=y | ||
67 | CONFIG_SWAP=y | ||
68 | CONFIG_SYSVIPC=y | ||
69 | CONFIG_SYSVIPC_SYSCTL=y | ||
70 | # CONFIG_POSIX_MQUEUE is not set | ||
71 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
72 | # CONFIG_TASKSTATS is not set | ||
73 | # CONFIG_AUDIT is not set | ||
74 | # CONFIG_IKCONFIG is not set | ||
75 | CONFIG_LOG_BUF_SHIFT=16 | ||
76 | # CONFIG_CGROUPS is not set | ||
77 | CONFIG_GROUP_SCHED=y | ||
78 | CONFIG_FAIR_GROUP_SCHED=y | ||
79 | # CONFIG_RT_GROUP_SCHED is not set | ||
80 | CONFIG_USER_SCHED=y | ||
81 | # CONFIG_CGROUP_SCHED is not set | ||
82 | CONFIG_SYSFS_DEPRECATED=y | ||
83 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
84 | # CONFIG_RELAY is not set | ||
85 | # CONFIG_NAMESPACES is not set | ||
86 | CONFIG_BLK_DEV_INITRD=y | ||
87 | CONFIG_INITRAMFS_SOURCE="" | ||
88 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
89 | CONFIG_SYSCTL=y | ||
90 | CONFIG_EMBEDDED=y | ||
91 | CONFIG_SYSCTL_SYSCALL=y | ||
92 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
93 | # CONFIG_KALLSYMS is not set | ||
94 | # CONFIG_HOTPLUG is not set | ||
95 | CONFIG_PRINTK=y | ||
96 | CONFIG_BUG=y | ||
97 | CONFIG_ELF_CORE=y | ||
98 | CONFIG_COMPAT_BRK=y | ||
99 | CONFIG_BASE_FULL=y | ||
100 | CONFIG_FUTEX=y | ||
101 | CONFIG_ANON_INODES=y | ||
102 | # CONFIG_EPOLL is not set | ||
103 | CONFIG_SIGNALFD=y | ||
104 | CONFIG_TIMERFD=y | ||
105 | CONFIG_EVENTFD=y | ||
106 | CONFIG_SHMEM=y | ||
107 | CONFIG_VM_EVENT_COUNTERS=y | ||
108 | CONFIG_SLUB_DEBUG=y | ||
109 | # CONFIG_SLAB is not set | ||
110 | CONFIG_SLUB=y | ||
111 | # CONFIG_SLOB is not set | ||
112 | # CONFIG_PROFILING is not set | ||
113 | # CONFIG_MARKERS is not set | ||
114 | CONFIG_HAVE_OPROFILE=y | ||
115 | CONFIG_HAVE_KPROBES=y | ||
116 | CONFIG_HAVE_KRETPROBES=y | ||
117 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
118 | CONFIG_PROC_PAGE_MONITOR=y | ||
119 | CONFIG_SLABINFO=y | ||
120 | CONFIG_RT_MUTEXES=y | ||
121 | # CONFIG_TINY_SHMEM is not set | ||
122 | CONFIG_BASE_SMALL=0 | ||
123 | CONFIG_MODULES=y | ||
124 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
125 | CONFIG_MODULE_UNLOAD=y | ||
126 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
127 | # CONFIG_MODVERSIONS is not set | ||
128 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
129 | # CONFIG_KMOD is not set | ||
130 | CONFIG_BLOCK=y | ||
131 | # CONFIG_LBD is not set | ||
132 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
133 | # CONFIG_LSF is not set | ||
134 | # CONFIG_BLK_DEV_BSG is not set | ||
135 | |||
136 | # | ||
137 | # IO Schedulers | ||
138 | # | ||
139 | CONFIG_IOSCHED_NOOP=y | ||
140 | CONFIG_IOSCHED_AS=y | ||
141 | CONFIG_IOSCHED_DEADLINE=y | ||
142 | CONFIG_IOSCHED_CFQ=y | ||
143 | CONFIG_DEFAULT_AS=y | ||
144 | # CONFIG_DEFAULT_DEADLINE is not set | ||
145 | # CONFIG_DEFAULT_CFQ is not set | ||
146 | # CONFIG_DEFAULT_NOOP is not set | ||
147 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
148 | CONFIG_CLASSIC_RCU=y | ||
149 | |||
150 | # | ||
151 | # Platform support | ||
152 | # | ||
153 | # CONFIG_PPC_MPC512x is not set | ||
154 | # CONFIG_PPC_MPC5121 is not set | ||
155 | # CONFIG_PPC_CELL is not set | ||
156 | # CONFIG_PPC_CELL_NATIVE is not set | ||
157 | # CONFIG_PQ2ADS is not set | ||
158 | CONFIG_MPC85xx=y | ||
159 | # CONFIG_MPC8540_ADS is not set | ||
160 | # CONFIG_MPC8560_ADS is not set | ||
161 | # CONFIG_MPC85xx_CDS is not set | ||
162 | # CONFIG_MPC85xx_MDS is not set | ||
163 | # CONFIG_MPC85xx_DS is not set | ||
164 | CONFIG_SOCRATES=y | ||
165 | # CONFIG_KSI8560 is not set | ||
166 | # CONFIG_STX_GP3 is not set | ||
167 | # CONFIG_TQM8540 is not set | ||
168 | # CONFIG_TQM8541 is not set | ||
169 | # CONFIG_TQM8555 is not set | ||
170 | # CONFIG_TQM8560 is not set | ||
171 | # CONFIG_SBC8548 is not set | ||
172 | # CONFIG_SBC8560 is not set | ||
173 | # CONFIG_IPIC is not set | ||
174 | CONFIG_MPIC=y | ||
175 | # CONFIG_MPIC_WEIRD is not set | ||
176 | # CONFIG_PPC_I8259 is not set | ||
177 | # CONFIG_PPC_RTAS is not set | ||
178 | # CONFIG_MMIO_NVRAM is not set | ||
179 | # CONFIG_PPC_MPC106 is not set | ||
180 | # CONFIG_PPC_970_NAP is not set | ||
181 | # CONFIG_PPC_INDIRECT_IO is not set | ||
182 | # CONFIG_GENERIC_IOMAP is not set | ||
183 | # CONFIG_CPU_FREQ is not set | ||
184 | # CONFIG_CPM2 is not set | ||
185 | # CONFIG_FSL_ULI1575 is not set | ||
186 | |||
187 | # | ||
188 | # Kernel options | ||
189 | # | ||
190 | # CONFIG_HIGHMEM is not set | ||
191 | # CONFIG_TICK_ONESHOT is not set | ||
192 | # CONFIG_NO_HZ is not set | ||
193 | # CONFIG_HIGH_RES_TIMERS is not set | ||
194 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
195 | # CONFIG_HZ_100 is not set | ||
196 | CONFIG_HZ_250=y | ||
197 | # CONFIG_HZ_300 is not set | ||
198 | # CONFIG_HZ_1000 is not set | ||
199 | CONFIG_HZ=250 | ||
200 | # CONFIG_SCHED_HRTICK is not set | ||
201 | CONFIG_PREEMPT_NONE=y | ||
202 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
203 | # CONFIG_PREEMPT is not set | ||
204 | CONFIG_BINFMT_ELF=y | ||
205 | # CONFIG_BINFMT_MISC is not set | ||
206 | CONFIG_MATH_EMULATION=y | ||
207 | # CONFIG_IOMMU_HELPER is not set | ||
208 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
209 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
210 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
211 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
212 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
213 | CONFIG_SELECT_MEMORY_MODEL=y | ||
214 | CONFIG_FLATMEM_MANUAL=y | ||
215 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
216 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
217 | CONFIG_FLATMEM=y | ||
218 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
219 | # CONFIG_SPARSEMEM_STATIC is not set | ||
220 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
221 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
222 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
223 | # CONFIG_RESOURCES_64BIT is not set | ||
224 | CONFIG_ZONE_DMA_FLAG=1 | ||
225 | CONFIG_BOUNCE=y | ||
226 | CONFIG_VIRT_TO_BUS=y | ||
227 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
228 | # CONFIG_PROC_DEVICETREE is not set | ||
229 | # CONFIG_CMDLINE_BOOL is not set | ||
230 | # CONFIG_PM is not set | ||
231 | CONFIG_SECCOMP=y | ||
232 | CONFIG_ISA_DMA_API=y | ||
233 | |||
234 | # | ||
235 | # Bus options | ||
236 | # | ||
237 | CONFIG_ZONE_DMA=y | ||
238 | CONFIG_PPC_INDIRECT_PCI=y | ||
239 | CONFIG_FSL_SOC=y | ||
240 | CONFIG_FSL_PCI=y | ||
241 | CONFIG_PCI=y | ||
242 | CONFIG_PCI_DOMAINS=y | ||
243 | CONFIG_PCI_SYSCALL=y | ||
244 | # CONFIG_PCIEPORTBUS is not set | ||
245 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
246 | # CONFIG_PCI_MSI is not set | ||
247 | CONFIG_PCI_LEGACY=y | ||
248 | # CONFIG_HAS_RAPIDIO is not set | ||
249 | |||
250 | # | ||
251 | # Advanced setup | ||
252 | # | ||
253 | # CONFIG_ADVANCED_OPTIONS is not set | ||
254 | |||
255 | # | ||
256 | # Default settings for advanced configuration options are used | ||
257 | # | ||
258 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
259 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
260 | CONFIG_KERNEL_START=0xc0000000 | ||
261 | CONFIG_PHYSICAL_START=0x00000000 | ||
262 | CONFIG_PHYSICAL_ALIGN=0x10000000 | ||
263 | CONFIG_TASK_SIZE=0xc0000000 | ||
264 | |||
265 | # | ||
266 | # Networking | ||
267 | # | ||
268 | CONFIG_NET=y | ||
269 | |||
270 | # | ||
271 | # Networking options | ||
272 | # | ||
273 | CONFIG_PACKET=y | ||
274 | # CONFIG_PACKET_MMAP is not set | ||
275 | CONFIG_UNIX=y | ||
276 | CONFIG_XFRM=y | ||
277 | # CONFIG_XFRM_USER is not set | ||
278 | # CONFIG_XFRM_SUB_POLICY is not set | ||
279 | # CONFIG_XFRM_MIGRATE is not set | ||
280 | # CONFIG_XFRM_STATISTICS is not set | ||
281 | # CONFIG_NET_KEY is not set | ||
282 | CONFIG_INET=y | ||
283 | CONFIG_IP_MULTICAST=y | ||
284 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
285 | CONFIG_IP_FIB_HASH=y | ||
286 | CONFIG_IP_PNP=y | ||
287 | CONFIG_IP_PNP_DHCP=y | ||
288 | CONFIG_IP_PNP_BOOTP=y | ||
289 | # CONFIG_IP_PNP_RARP is not set | ||
290 | # CONFIG_NET_IPIP is not set | ||
291 | # CONFIG_NET_IPGRE is not set | ||
292 | # CONFIG_IP_MROUTE is not set | ||
293 | # CONFIG_ARPD is not set | ||
294 | CONFIG_SYN_COOKIES=y | ||
295 | # CONFIG_INET_AH is not set | ||
296 | # CONFIG_INET_ESP is not set | ||
297 | # CONFIG_INET_IPCOMP is not set | ||
298 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
299 | # CONFIG_INET_TUNNEL is not set | ||
300 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
301 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
302 | CONFIG_INET_XFRM_MODE_BEET=y | ||
303 | # CONFIG_INET_LRO is not set | ||
304 | CONFIG_INET_DIAG=y | ||
305 | CONFIG_INET_TCP_DIAG=y | ||
306 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
307 | CONFIG_TCP_CONG_CUBIC=y | ||
308 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
309 | # CONFIG_TCP_MD5SIG is not set | ||
310 | # CONFIG_IPV6 is not set | ||
311 | # CONFIG_NETWORK_SECMARK is not set | ||
312 | # CONFIG_NETFILTER is not set | ||
313 | # CONFIG_IP_DCCP is not set | ||
314 | # CONFIG_IP_SCTP is not set | ||
315 | # CONFIG_TIPC is not set | ||
316 | # CONFIG_ATM is not set | ||
317 | # CONFIG_BRIDGE is not set | ||
318 | # CONFIG_VLAN_8021Q is not set | ||
319 | # CONFIG_DECNET is not set | ||
320 | # CONFIG_LLC2 is not set | ||
321 | # CONFIG_IPX is not set | ||
322 | # CONFIG_ATALK is not set | ||
323 | # CONFIG_X25 is not set | ||
324 | # CONFIG_LAPB is not set | ||
325 | # CONFIG_ECONET is not set | ||
326 | # CONFIG_WAN_ROUTER is not set | ||
327 | # CONFIG_NET_SCHED is not set | ||
328 | |||
329 | # | ||
330 | # Network testing | ||
331 | # | ||
332 | # CONFIG_NET_PKTGEN is not set | ||
333 | # CONFIG_HAMRADIO is not set | ||
334 | CONFIG_CAN=y | ||
335 | CONFIG_CAN_RAW=y | ||
336 | CONFIG_CAN_BCM=y | ||
337 | |||
338 | # | ||
339 | # CAN Device Drivers | ||
340 | # | ||
341 | # CONFIG_CAN_VCAN is not set | ||
342 | # CONFIG_CAN_OLD_DRIVERS is not set | ||
343 | # CONFIG_CAN_SLCAN is not set | ||
344 | CONFIG_CAN_SJA1000=y | ||
345 | CONFIG_CAN_SJA1000_MEM_OF=y | ||
346 | # CONFIG_CAN_EMS_PCI is not set | ||
347 | # CONFIG_CAN_IXXAT_PCI is not set | ||
348 | # CONFIG_CAN_PEAK_PCI is not set | ||
349 | # CONFIG_CAN_KVASER_PCI is not set | ||
350 | # CONFIG_CAN_MSCAN is not set | ||
351 | # CONFIG_CAN_DEBUG_DEVICES is not set | ||
352 | # CONFIG_IRDA is not set | ||
353 | # CONFIG_BT is not set | ||
354 | # CONFIG_AF_RXRPC is not set | ||
355 | |||
356 | # | ||
357 | # Wireless | ||
358 | # | ||
359 | # CONFIG_CFG80211 is not set | ||
360 | # CONFIG_WIRELESS_EXT is not set | ||
361 | # CONFIG_MAC80211 is not set | ||
362 | # CONFIG_IEEE80211 is not set | ||
363 | # CONFIG_RFKILL is not set | ||
364 | # CONFIG_NET_9P is not set | ||
365 | |||
366 | # | ||
367 | # Device Drivers | ||
368 | # | ||
369 | |||
370 | # | ||
371 | # Generic Driver Options | ||
372 | # | ||
373 | CONFIG_STANDALONE=y | ||
374 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
375 | # CONFIG_SYS_HYPERVISOR is not set | ||
376 | # CONFIG_CONNECTOR is not set | ||
377 | CONFIG_MTD=y | ||
378 | # CONFIG_MTD_DEBUG is not set | ||
379 | CONFIG_MTD_CONCAT=y | ||
380 | CONFIG_MTD_PARTITIONS=y | ||
381 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
382 | CONFIG_MTD_CMDLINE_PARTS=y | ||
383 | CONFIG_MTD_OF_PARTS=y | ||
384 | # CONFIG_MTD_AR7_PARTS is not set | ||
385 | |||
386 | # | ||
387 | # User Modules And Translation Layers | ||
388 | # | ||
389 | CONFIG_MTD_CHAR=y | ||
390 | CONFIG_MTD_BLKDEVS=y | ||
391 | CONFIG_MTD_BLOCK=y | ||
392 | # CONFIG_FTL is not set | ||
393 | # CONFIG_NFTL is not set | ||
394 | # CONFIG_INFTL is not set | ||
395 | # CONFIG_RFD_FTL is not set | ||
396 | # CONFIG_SSFDC is not set | ||
397 | # CONFIG_MTD_OOPS is not set | ||
398 | |||
399 | # | ||
400 | # RAM/ROM/Flash chip drivers | ||
401 | # | ||
402 | CONFIG_MTD_CFI=y | ||
403 | CONFIG_MTD_JEDECPROBE=y | ||
404 | CONFIG_MTD_GEN_PROBE=y | ||
405 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
406 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
407 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
408 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
409 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
410 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
411 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
412 | CONFIG_MTD_CFI_I1=y | ||
413 | CONFIG_MTD_CFI_I2=y | ||
414 | # CONFIG_MTD_CFI_I4 is not set | ||
415 | # CONFIG_MTD_CFI_I8 is not set | ||
416 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
417 | CONFIG_MTD_CFI_AMDSTD=y | ||
418 | # CONFIG_MTD_CFI_STAA is not set | ||
419 | CONFIG_MTD_CFI_UTIL=y | ||
420 | # CONFIG_MTD_RAM is not set | ||
421 | # CONFIG_MTD_ROM is not set | ||
422 | # CONFIG_MTD_ABSENT is not set | ||
423 | |||
424 | # | ||
425 | # Mapping drivers for chip access | ||
426 | # | ||
427 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
428 | # CONFIG_MTD_PHYSMAP is not set | ||
429 | CONFIG_MTD_PHYSMAP_OF=y | ||
430 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
431 | # CONFIG_MTD_PLATRAM is not set | ||
432 | |||
433 | # | ||
434 | # Self-contained MTD device drivers | ||
435 | # | ||
436 | # CONFIG_MTD_PMC551 is not set | ||
437 | # CONFIG_MTD_DATAFLASH is not set | ||
438 | # CONFIG_MTD_M25P80 is not set | ||
439 | # CONFIG_MTD_SLRAM is not set | ||
440 | # CONFIG_MTD_PHRAM is not set | ||
441 | # CONFIG_MTD_MTDRAM is not set | ||
442 | # CONFIG_MTD_BLOCK2MTD is not set | ||
443 | |||
444 | # | ||
445 | # Disk-On-Chip Device Drivers | ||
446 | # | ||
447 | # CONFIG_MTD_DOC2000 is not set | ||
448 | # CONFIG_MTD_DOC2001 is not set | ||
449 | # CONFIG_MTD_DOC2001PLUS is not set | ||
450 | CONFIG_MTD_NAND=y | ||
451 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
452 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
453 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
454 | CONFIG_MTD_NAND_IDS=y | ||
455 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
456 | # CONFIG_MTD_NAND_CAFE is not set | ||
457 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
458 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
459 | # CONFIG_MTD_ALAUDA is not set | ||
460 | # CONFIG_MTD_NAND_FSL_ELBC is not set | ||
461 | CONFIG_MTD_NAND_SOCRATES=y | ||
462 | # CONFIG_MTD_ONENAND is not set | ||
463 | |||
464 | # | ||
465 | # UBI - Unsorted block images | ||
466 | # | ||
467 | # CONFIG_MTD_UBI is not set | ||
468 | CONFIG_OF_DEVICE=y | ||
469 | CONFIG_OF_I2C=y | ||
470 | # CONFIG_PARPORT is not set | ||
471 | CONFIG_BLK_DEV=y | ||
472 | # CONFIG_BLK_DEV_FD is not set | ||
473 | # CONFIG_BLK_CPQ_DA is not set | ||
474 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
475 | # CONFIG_BLK_DEV_DAC960 is not set | ||
476 | # CONFIG_BLK_DEV_UMEM is not set | ||
477 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
478 | CONFIG_BLK_DEV_LOOP=y | ||
479 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
480 | # CONFIG_BLK_DEV_NBD is not set | ||
481 | # CONFIG_BLK_DEV_SX8 is not set | ||
482 | # CONFIG_BLK_DEV_UB is not set | ||
483 | CONFIG_BLK_DEV_RAM=y | ||
484 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
485 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
486 | # CONFIG_BLK_DEV_XIP is not set | ||
487 | # CONFIG_CDROM_PKTCDVD is not set | ||
488 | # CONFIG_ATA_OVER_ETH is not set | ||
489 | CONFIG_MISC_DEVICES=y | ||
490 | # CONFIG_PHANTOM is not set | ||
491 | # CONFIG_EEPROM_93CX6 is not set | ||
492 | # CONFIG_SGI_IOC4 is not set | ||
493 | # CONFIG_TIFM_CORE is not set | ||
494 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
495 | CONFIG_HAVE_IDE=y | ||
496 | # CONFIG_IDE is not set | ||
497 | |||
498 | # | ||
499 | # SCSI device support | ||
500 | # | ||
501 | # CONFIG_RAID_ATTRS is not set | ||
502 | CONFIG_SCSI=y | ||
503 | CONFIG_SCSI_DMA=y | ||
504 | # CONFIG_SCSI_TGT is not set | ||
505 | # CONFIG_SCSI_NETLINK is not set | ||
506 | CONFIG_SCSI_PROC_FS=y | ||
507 | |||
508 | # | ||
509 | # SCSI support type (disk, tape, CD-ROM) | ||
510 | # | ||
511 | CONFIG_BLK_DEV_SD=y | ||
512 | # CONFIG_CHR_DEV_ST is not set | ||
513 | # CONFIG_CHR_DEV_OSST is not set | ||
514 | # CONFIG_BLK_DEV_SR is not set | ||
515 | # CONFIG_CHR_DEV_SG is not set | ||
516 | # CONFIG_CHR_DEV_SCH is not set | ||
517 | |||
518 | # | ||
519 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
520 | # | ||
521 | # CONFIG_SCSI_MULTI_LUN is not set | ||
522 | # CONFIG_SCSI_CONSTANTS is not set | ||
523 | # CONFIG_SCSI_LOGGING is not set | ||
524 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
525 | CONFIG_SCSI_WAIT_SCAN=m | ||
526 | |||
527 | # | ||
528 | # SCSI Transports | ||
529 | # | ||
530 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
531 | # CONFIG_SCSI_FC_ATTRS is not set | ||
532 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
533 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
534 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
535 | # CONFIG_SCSI_LOWLEVEL is not set | ||
536 | # CONFIG_ATA is not set | ||
537 | # CONFIG_MD is not set | ||
538 | # CONFIG_FUSION is not set | ||
539 | |||
540 | # | ||
541 | # IEEE 1394 (FireWire) support | ||
542 | # | ||
543 | |||
544 | # | ||
545 | # Enable only one of the two stacks, unless you know what you are doing | ||
546 | # | ||
547 | # CONFIG_FIREWIRE is not set | ||
548 | # CONFIG_IEEE1394 is not set | ||
549 | # CONFIG_I2O is not set | ||
550 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
551 | CONFIG_NETDEVICES=y | ||
552 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
553 | # CONFIG_DUMMY is not set | ||
554 | # CONFIG_BONDING is not set | ||
555 | # CONFIG_MACVLAN is not set | ||
556 | # CONFIG_EQUALIZER is not set | ||
557 | # CONFIG_TUN is not set | ||
558 | # CONFIG_VETH is not set | ||
559 | # CONFIG_ARCNET is not set | ||
560 | CONFIG_PHYLIB=y | ||
561 | |||
562 | # | ||
563 | # MII PHY device drivers | ||
564 | # | ||
565 | CONFIG_MARVELL_PHY=y | ||
566 | # CONFIG_DAVICOM_PHY is not set | ||
567 | # CONFIG_QSEMI_PHY is not set | ||
568 | # CONFIG_LXT_PHY is not set | ||
569 | # CONFIG_CICADA_PHY is not set | ||
570 | # CONFIG_VITESSE_PHY is not set | ||
571 | # CONFIG_SMSC_PHY is not set | ||
572 | # CONFIG_BROADCOM_PHY is not set | ||
573 | # CONFIG_ICPLUS_PHY is not set | ||
574 | # CONFIG_REALTEK_PHY is not set | ||
575 | # CONFIG_FIXED_PHY is not set | ||
576 | # CONFIG_MDIO_BITBANG is not set | ||
577 | CONFIG_NET_ETHERNET=y | ||
578 | CONFIG_MII=y | ||
579 | # CONFIG_HAPPYMEAL is not set | ||
580 | # CONFIG_SUNGEM is not set | ||
581 | # CONFIG_CASSINI is not set | ||
582 | # CONFIG_NET_VENDOR_3COM is not set | ||
583 | # CONFIG_ENC28J60 is not set | ||
584 | # CONFIG_NET_TULIP is not set | ||
585 | # CONFIG_HP100 is not set | ||
586 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
587 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
588 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
589 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
590 | # CONFIG_NET_PCI is not set | ||
591 | # CONFIG_B44 is not set | ||
592 | CONFIG_NETDEV_1000=y | ||
593 | # CONFIG_ACENIC is not set | ||
594 | # CONFIG_DL2K is not set | ||
595 | # CONFIG_E1000 is not set | ||
596 | # CONFIG_E1000E is not set | ||
597 | # CONFIG_E1000E_ENABLED is not set | ||
598 | # CONFIG_IP1000 is not set | ||
599 | # CONFIG_IGB is not set | ||
600 | # CONFIG_NS83820 is not set | ||
601 | # CONFIG_HAMACHI is not set | ||
602 | # CONFIG_YELLOWFIN is not set | ||
603 | # CONFIG_R8169 is not set | ||
604 | # CONFIG_SIS190 is not set | ||
605 | # CONFIG_SKGE is not set | ||
606 | # CONFIG_SKY2 is not set | ||
607 | # CONFIG_VIA_VELOCITY is not set | ||
608 | # CONFIG_TIGON3 is not set | ||
609 | # CONFIG_BNX2 is not set | ||
610 | CONFIG_GIANFAR=y | ||
611 | CONFIG_GFAR_NAPI=y | ||
612 | # CONFIG_QLA3XXX is not set | ||
613 | # CONFIG_ATL1 is not set | ||
614 | # CONFIG_NETDEV_10000 is not set | ||
615 | # CONFIG_TR is not set | ||
616 | |||
617 | # | ||
618 | # Wireless LAN | ||
619 | # | ||
620 | # CONFIG_WLAN_PRE80211 is not set | ||
621 | # CONFIG_WLAN_80211 is not set | ||
622 | # CONFIG_IWLWIFI_LEDS is not set | ||
623 | |||
624 | # | ||
625 | # USB Network Adapters | ||
626 | # | ||
627 | # CONFIG_USB_CATC is not set | ||
628 | # CONFIG_USB_KAWETH is not set | ||
629 | # CONFIG_USB_PEGASUS is not set | ||
630 | # CONFIG_USB_RTL8150 is not set | ||
631 | # CONFIG_USB_USBNET is not set | ||
632 | # CONFIG_WAN is not set | ||
633 | # CONFIG_FDDI is not set | ||
634 | # CONFIG_HIPPI is not set | ||
635 | # CONFIG_PPP is not set | ||
636 | # CONFIG_SLIP is not set | ||
637 | # CONFIG_NET_FC is not set | ||
638 | # CONFIG_NETCONSOLE is not set | ||
639 | # CONFIG_NETPOLL is not set | ||
640 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
641 | # CONFIG_ISDN is not set | ||
642 | # CONFIG_PHONE is not set | ||
643 | |||
644 | # | ||
645 | # Input device support | ||
646 | # | ||
647 | CONFIG_INPUT=y | ||
648 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
649 | # CONFIG_INPUT_POLLDEV is not set | ||
650 | |||
651 | # | ||
652 | # Userland interfaces | ||
653 | # | ||
654 | CONFIG_INPUT_MOUSEDEV=y | ||
655 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
656 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=800 | ||
657 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 | ||
658 | # CONFIG_INPUT_JOYDEV is not set | ||
659 | CONFIG_INPUT_EVDEV=y | ||
660 | # CONFIG_INPUT_EVBUG is not set | ||
661 | |||
662 | # | ||
663 | # Input Device Drivers | ||
664 | # | ||
665 | # CONFIG_INPUT_KEYBOARD is not set | ||
666 | # CONFIG_INPUT_MOUSE is not set | ||
667 | # CONFIG_INPUT_JOYSTICK is not set | ||
668 | # CONFIG_INPUT_TABLET is not set | ||
669 | CONFIG_INPUT_TOUCHSCREEN=y | ||
670 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
671 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
672 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
673 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
674 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
675 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
676 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
677 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
678 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
679 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
680 | CONFIG_TOUCHSCREEN_TSC2003=y | ||
681 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
682 | # CONFIG_INPUT_MISC is not set | ||
683 | |||
684 | # | ||
685 | # Hardware I/O ports | ||
686 | # | ||
687 | # CONFIG_SERIO is not set | ||
688 | # CONFIG_GAMEPORT is not set | ||
689 | |||
690 | # | ||
691 | # Character devices | ||
692 | # | ||
693 | CONFIG_VT=y | ||
694 | CONFIG_VT_CONSOLE=y | ||
695 | CONFIG_HW_CONSOLE=y | ||
696 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
697 | CONFIG_DEVKMEM=y | ||
698 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
699 | # CONFIG_NOZOMI is not set | ||
700 | |||
701 | # | ||
702 | # Serial drivers | ||
703 | # | ||
704 | CONFIG_SERIAL_8250=y | ||
705 | CONFIG_SERIAL_8250_CONSOLE=y | ||
706 | CONFIG_SERIAL_8250_PCI=y | ||
707 | CONFIG_SERIAL_8250_NR_UARTS=2 | ||
708 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | ||
709 | CONFIG_SERIAL_8250_EXTENDED=y | ||
710 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
711 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
712 | CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
713 | CONFIG_SERIAL_8250_RSA=y | ||
714 | |||
715 | # | ||
716 | # Non-8250 serial port support | ||
717 | # | ||
718 | # CONFIG_SERIAL_UARTLITE is not set | ||
719 | CONFIG_SERIAL_CORE=y | ||
720 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
721 | # CONFIG_SERIAL_JSM is not set | ||
722 | # CONFIG_SERIAL_OF_PLATFORM is not set | ||
723 | CONFIG_UNIX98_PTYS=y | ||
724 | CONFIG_LEGACY_PTYS=y | ||
725 | CONFIG_LEGACY_PTY_COUNT=256 | ||
726 | # CONFIG_IPMI_HANDLER is not set | ||
727 | CONFIG_HW_RANDOM=y | ||
728 | # CONFIG_NVRAM is not set | ||
729 | # CONFIG_R3964 is not set | ||
730 | # CONFIG_APPLICOM is not set | ||
731 | # CONFIG_RAW_DRIVER is not set | ||
732 | # CONFIG_TCG_TPM is not set | ||
733 | CONFIG_DEVPORT=y | ||
734 | CONFIG_I2C=y | ||
735 | CONFIG_I2C_BOARDINFO=y | ||
736 | CONFIG_I2C_CHARDEV=y | ||
737 | |||
738 | # | ||
739 | # I2C Hardware Bus support | ||
740 | # | ||
741 | # CONFIG_I2C_ALI1535 is not set | ||
742 | # CONFIG_I2C_ALI1563 is not set | ||
743 | # CONFIG_I2C_ALI15X3 is not set | ||
744 | # CONFIG_I2C_AMD756 is not set | ||
745 | # CONFIG_I2C_AMD8111 is not set | ||
746 | # CONFIG_I2C_I801 is not set | ||
747 | # CONFIG_I2C_I810 is not set | ||
748 | # CONFIG_I2C_PIIX4 is not set | ||
749 | CONFIG_I2C_MPC=y | ||
750 | # CONFIG_I2C_NFORCE2 is not set | ||
751 | # CONFIG_I2C_OCORES is not set | ||
752 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
753 | # CONFIG_I2C_PROSAVAGE is not set | ||
754 | # CONFIG_I2C_SAVAGE4 is not set | ||
755 | # CONFIG_I2C_SIMTEC is not set | ||
756 | # CONFIG_I2C_SIS5595 is not set | ||
757 | # CONFIG_I2C_SIS630 is not set | ||
758 | # CONFIG_I2C_SIS96X is not set | ||
759 | # CONFIG_I2C_TAOS_EVM is not set | ||
760 | # CONFIG_I2C_STUB is not set | ||
761 | # CONFIG_I2C_TINY_USB is not set | ||
762 | # CONFIG_I2C_VIA is not set | ||
763 | # CONFIG_I2C_VIAPRO is not set | ||
764 | # CONFIG_I2C_VOODOO3 is not set | ||
765 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
766 | |||
767 | # | ||
768 | # Miscellaneous I2C Chip support | ||
769 | # | ||
770 | # CONFIG_DS1682 is not set | ||
771 | # CONFIG_SENSORS_EEPROM is not set | ||
772 | # CONFIG_SENSORS_PCF8574 is not set | ||
773 | # CONFIG_PCF8575 is not set | ||
774 | # CONFIG_SENSORS_PCF8591 is not set | ||
775 | # CONFIG_SENSORS_MAX6875 is not set | ||
776 | # CONFIG_SENSORS_TSL2550 is not set | ||
777 | # CONFIG_I2C_DEBUG_CORE is not set | ||
778 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
779 | # CONFIG_I2C_DEBUG_BUS is not set | ||
780 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
781 | CONFIG_SPI=y | ||
782 | CONFIG_SPI_MASTER=y | ||
783 | |||
784 | # | ||
785 | # SPI Master Controller Drivers | ||
786 | # | ||
787 | # CONFIG_SPI_BITBANG is not set | ||
788 | CONFIG_SPI_SOCRATES=y | ||
789 | |||
790 | # | ||
791 | # SPI Protocol Masters | ||
792 | # | ||
793 | # CONFIG_SPI_AT25 is not set | ||
794 | # CONFIG_SPI_SPIDEV is not set | ||
795 | # CONFIG_SPI_TLE62X0 is not set | ||
796 | # CONFIG_W1 is not set | ||
797 | # CONFIG_POWER_SUPPLY is not set | ||
798 | CONFIG_HWMON=y | ||
799 | CONFIG_HWMON_VID=y | ||
800 | # CONFIG_SENSORS_AD7418 is not set | ||
801 | # CONFIG_SENSORS_ADM1021 is not set | ||
802 | # CONFIG_SENSORS_ADM1025 is not set | ||
803 | # CONFIG_SENSORS_ADM1026 is not set | ||
804 | # CONFIG_SENSORS_ADM1029 is not set | ||
805 | # CONFIG_SENSORS_ADM1031 is not set | ||
806 | # CONFIG_SENSORS_ADM9240 is not set | ||
807 | # CONFIG_SENSORS_ADT7470 is not set | ||
808 | # CONFIG_SENSORS_ADT7473 is not set | ||
809 | # CONFIG_SENSORS_ATXP1 is not set | ||
810 | # CONFIG_SENSORS_DS1621 is not set | ||
811 | # CONFIG_SENSORS_I5K_AMB is not set | ||
812 | # CONFIG_SENSORS_F71805F is not set | ||
813 | # CONFIG_SENSORS_F71882FG is not set | ||
814 | # CONFIG_SENSORS_F75375S is not set | ||
815 | # CONFIG_SENSORS_GL518SM is not set | ||
816 | # CONFIG_SENSORS_GL520SM is not set | ||
817 | # CONFIG_SENSORS_IT87 is not set | ||
818 | # CONFIG_SENSORS_LM63 is not set | ||
819 | # CONFIG_SENSORS_LM70 is not set | ||
820 | CONFIG_SENSORS_LM75=y | ||
821 | # CONFIG_SENSORS_LM77 is not set | ||
822 | # CONFIG_SENSORS_LM78 is not set | ||
823 | # CONFIG_SENSORS_LM80 is not set | ||
824 | # CONFIG_SENSORS_LM83 is not set | ||
825 | # CONFIG_SENSORS_LM85 is not set | ||
826 | # CONFIG_SENSORS_LM87 is not set | ||
827 | # CONFIG_SENSORS_LM90 is not set | ||
828 | # CONFIG_SENSORS_LM92 is not set | ||
829 | # CONFIG_SENSORS_LM93 is not set | ||
830 | # CONFIG_SENSORS_MAX1619 is not set | ||
831 | # CONFIG_SENSORS_MAX6650 is not set | ||
832 | # CONFIG_SENSORS_PC87360 is not set | ||
833 | # CONFIG_SENSORS_PC87427 is not set | ||
834 | # CONFIG_SENSORS_SIS5595 is not set | ||
835 | # CONFIG_SENSORS_DME1737 is not set | ||
836 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
837 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
838 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
839 | # CONFIG_SENSORS_ADS7828 is not set | ||
840 | # CONFIG_SENSORS_THMC50 is not set | ||
841 | # CONFIG_SENSORS_VIA686A is not set | ||
842 | # CONFIG_SENSORS_VT1211 is not set | ||
843 | # CONFIG_SENSORS_VT8231 is not set | ||
844 | CONFIG_SENSORS_W83781D=y | ||
845 | # CONFIG_SENSORS_W83791D is not set | ||
846 | # CONFIG_SENSORS_W83792D is not set | ||
847 | # CONFIG_SENSORS_W83793 is not set | ||
848 | # CONFIG_SENSORS_W83L785TS is not set | ||
849 | # CONFIG_SENSORS_W83L786NG is not set | ||
850 | # CONFIG_SENSORS_W83627HF is not set | ||
851 | # CONFIG_SENSORS_W83627EHF is not set | ||
852 | CONFIG_HWMON_DEBUG_CHIP=y | ||
853 | # CONFIG_THERMAL is not set | ||
854 | # CONFIG_THERMAL_HWMON is not set | ||
855 | # CONFIG_WATCHDOG is not set | ||
856 | |||
857 | # | ||
858 | # Sonics Silicon Backplane | ||
859 | # | ||
860 | CONFIG_SSB_POSSIBLE=y | ||
861 | # CONFIG_SSB is not set | ||
862 | |||
863 | # | ||
864 | # Multifunction device drivers | ||
865 | # | ||
866 | # CONFIG_MFD_SM501 is not set | ||
867 | # CONFIG_HTC_PASIC3 is not set | ||
868 | |||
869 | # | ||
870 | # Multimedia devices | ||
871 | # | ||
872 | |||
873 | # | ||
874 | # Multimedia core support | ||
875 | # | ||
876 | # CONFIG_VIDEO_DEV is not set | ||
877 | # CONFIG_DVB_CORE is not set | ||
878 | # CONFIG_VIDEO_MEDIA is not set | ||
879 | |||
880 | # | ||
881 | # Multimedia drivers | ||
882 | # | ||
883 | CONFIG_DAB=y | ||
884 | # CONFIG_USB_DABUSB is not set | ||
885 | |||
886 | # | ||
887 | # Graphics support | ||
888 | # | ||
889 | # CONFIG_AGP is not set | ||
890 | # CONFIG_DRM is not set | ||
891 | # CONFIG_VGASTATE is not set | ||
892 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
893 | CONFIG_FB=y | ||
894 | # CONFIG_FIRMWARE_EDID is not set | ||
895 | # CONFIG_FB_DDC is not set | ||
896 | CONFIG_FB_CFB_FILLRECT=y | ||
897 | CONFIG_FB_CFB_COPYAREA=y | ||
898 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
899 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
900 | # CONFIG_FB_SYS_FILLRECT is not set | ||
901 | # CONFIG_FB_SYS_COPYAREA is not set | ||
902 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
903 | CONFIG_FB_FOREIGN_ENDIAN=y | ||
904 | CONFIG_FB_BOTH_ENDIAN=y | ||
905 | # CONFIG_FB_BIG_ENDIAN is not set | ||
906 | # CONFIG_FB_LITTLE_ENDIAN is not set | ||
907 | # CONFIG_FB_SYS_FOPS is not set | ||
908 | # CONFIG_FB_SVGALIB is not set | ||
909 | # CONFIG_FB_MACMODES is not set | ||
910 | # CONFIG_FB_BACKLIGHT is not set | ||
911 | # CONFIG_FB_MODE_HELPERS is not set | ||
912 | # CONFIG_FB_TILEBLITTING is not set | ||
913 | |||
914 | # | ||
915 | # Frame buffer hardware drivers | ||
916 | # | ||
917 | CONFIG_FB_MB862XX=y | ||
918 | # CONFIG_FB_MB862XX_PCI_GDC is not set | ||
919 | CONFIG_FB_MB862XX_LIME=y | ||
920 | # CONFIG_FB_PRE_INIT_FB is not set | ||
921 | # CONFIG_FB_CIRRUS is not set | ||
922 | # CONFIG_FB_PM2 is not set | ||
923 | # CONFIG_FB_CYBER2000 is not set | ||
924 | # CONFIG_FB_OF is not set | ||
925 | # CONFIG_FB_CT65550 is not set | ||
926 | # CONFIG_FB_ASILIANT is not set | ||
927 | # CONFIG_FB_IMSTT is not set | ||
928 | # CONFIG_FB_VGA16 is not set | ||
929 | # CONFIG_FB_S1D13XXX is not set | ||
930 | # CONFIG_FB_NVIDIA is not set | ||
931 | # CONFIG_FB_RIVA is not set | ||
932 | # CONFIG_FB_MATROX is not set | ||
933 | # CONFIG_FB_RADEON is not set | ||
934 | # CONFIG_FB_ATY128 is not set | ||
935 | # CONFIG_FB_ATY is not set | ||
936 | # CONFIG_FB_S3 is not set | ||
937 | # CONFIG_FB_SAVAGE is not set | ||
938 | # CONFIG_FB_SIS is not set | ||
939 | # CONFIG_FB_NEOMAGIC is not set | ||
940 | # CONFIG_FB_KYRO is not set | ||
941 | # CONFIG_FB_3DFX is not set | ||
942 | # CONFIG_FB_VOODOO1 is not set | ||
943 | # CONFIG_FB_VT8623 is not set | ||
944 | # CONFIG_FB_TRIDENT is not set | ||
945 | # CONFIG_FB_ARK is not set | ||
946 | # CONFIG_FB_PM3 is not set | ||
947 | # CONFIG_FB_FSL_DIU is not set | ||
948 | # CONFIG_FB_IBM_GXT4500 is not set | ||
949 | # CONFIG_FB_VIRTUAL is not set | ||
950 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
951 | |||
952 | # | ||
953 | # Display device support | ||
954 | # | ||
955 | # CONFIG_DISPLAY_SUPPORT is not set | ||
956 | |||
957 | # | ||
958 | # Console display driver support | ||
959 | # | ||
960 | # CONFIG_VGA_CONSOLE is not set | ||
961 | CONFIG_DUMMY_CONSOLE=y | ||
962 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
963 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
964 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
965 | CONFIG_FONTS=y | ||
966 | # CONFIG_FONT_8x8 is not set | ||
967 | CONFIG_FONT_8x16=y | ||
968 | # CONFIG_FONT_6x11 is not set | ||
969 | # CONFIG_FONT_7x14 is not set | ||
970 | # CONFIG_FONT_PEARL_8x8 is not set | ||
971 | # CONFIG_FONT_ACORN_8x8 is not set | ||
972 | # CONFIG_FONT_MINI_4x6 is not set | ||
973 | # CONFIG_FONT_SUN8x16 is not set | ||
974 | # CONFIG_FONT_SUN12x22 is not set | ||
975 | # CONFIG_FONT_10x18 is not set | ||
976 | # CONFIG_LOGO is not set | ||
977 | |||
978 | # | ||
979 | # Sound | ||
980 | # | ||
981 | # CONFIG_SOUND is not set | ||
982 | CONFIG_HID_SUPPORT=y | ||
983 | CONFIG_HID=y | ||
984 | # CONFIG_HID_DEBUG is not set | ||
985 | # CONFIG_HIDRAW is not set | ||
986 | |||
987 | # | ||
988 | # USB Input Devices | ||
989 | # | ||
990 | CONFIG_USB_HID=y | ||
991 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
992 | # CONFIG_HID_FF is not set | ||
993 | # CONFIG_USB_HIDDEV is not set | ||
994 | CONFIG_USB_SUPPORT=y | ||
995 | CONFIG_USB_ARCH_HAS_HCD=y | ||
996 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
997 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
998 | CONFIG_USB=y | ||
999 | # CONFIG_USB_DEBUG is not set | ||
1000 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
1001 | |||
1002 | # | ||
1003 | # Miscellaneous USB options | ||
1004 | # | ||
1005 | CONFIG_USB_DEVICEFS=y | ||
1006 | CONFIG_USB_DEVICE_CLASS=y | ||
1007 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
1008 | # CONFIG_USB_OTG is not set | ||
1009 | # CONFIG_USB_OTG_WHITELIST is not set | ||
1010 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1011 | |||
1012 | # | ||
1013 | # USB Host Controller Drivers | ||
1014 | # | ||
1015 | # CONFIG_USB_C67X00_HCD is not set | ||
1016 | CONFIG_USB_EHCI_HCD=y | ||
1017 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
1018 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1019 | # CONFIG_USB_EHCI_FSL is not set | ||
1020 | CONFIG_USB_EHCI_HCD_PPC_OF=y | ||
1021 | # CONFIG_USB_ISP116X_HCD is not set | ||
1022 | # CONFIG_USB_ISP1760_HCD is not set | ||
1023 | CONFIG_USB_OHCI_HCD=y | ||
1024 | CONFIG_USB_OHCI_HCD_PPC_OF=y | ||
1025 | CONFIG_USB_OHCI_HCD_PPC_OF_BE=y | ||
1026 | # CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set | ||
1027 | CONFIG_USB_OHCI_HCD_PCI=y | ||
1028 | CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y | ||
1029 | CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y | ||
1030 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
1031 | # CONFIG_USB_UHCI_HCD is not set | ||
1032 | # CONFIG_USB_SL811_HCD is not set | ||
1033 | # CONFIG_USB_R8A66597_HCD is not set | ||
1034 | |||
1035 | # | ||
1036 | # USB Device Class drivers | ||
1037 | # | ||
1038 | # CONFIG_USB_ACM is not set | ||
1039 | # CONFIG_USB_PRINTER is not set | ||
1040 | # CONFIG_USB_WDM is not set | ||
1041 | |||
1042 | # | ||
1043 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
1044 | # | ||
1045 | |||
1046 | # | ||
1047 | # may also be needed; see USB_STORAGE Help for more information | ||
1048 | # | ||
1049 | CONFIG_USB_STORAGE=y | ||
1050 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1051 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
1052 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
1053 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1054 | # CONFIG_USB_STORAGE_DPCM is not set | ||
1055 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1056 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
1057 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
1058 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1059 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1060 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1061 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1062 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1063 | # CONFIG_USB_LIBUSUAL is not set | ||
1064 | |||
1065 | # | ||
1066 | # USB Imaging devices | ||
1067 | # | ||
1068 | # CONFIG_USB_MDC800 is not set | ||
1069 | # CONFIG_USB_MICROTEK is not set | ||
1070 | CONFIG_USB_MON=y | ||
1071 | |||
1072 | # | ||
1073 | # USB port drivers | ||
1074 | # | ||
1075 | # CONFIG_USB_SERIAL is not set | ||
1076 | |||
1077 | # | ||
1078 | # USB Miscellaneous drivers | ||
1079 | # | ||
1080 | # CONFIG_USB_EMI62 is not set | ||
1081 | # CONFIG_USB_EMI26 is not set | ||
1082 | # CONFIG_USB_ADUTUX is not set | ||
1083 | # CONFIG_USB_AUERSWALD is not set | ||
1084 | # CONFIG_USB_RIO500 is not set | ||
1085 | # CONFIG_USB_LEGOTOWER is not set | ||
1086 | # CONFIG_USB_LCD is not set | ||
1087 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1088 | # CONFIG_USB_LED is not set | ||
1089 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1090 | # CONFIG_USB_CYTHERM is not set | ||
1091 | # CONFIG_USB_PHIDGET is not set | ||
1092 | # CONFIG_USB_IDMOUSE is not set | ||
1093 | # CONFIG_USB_FTDI_ELAN is not set | ||
1094 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1095 | # CONFIG_USB_SISUSBVGA is not set | ||
1096 | # CONFIG_USB_LD is not set | ||
1097 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1098 | # CONFIG_USB_IOWARRIOR is not set | ||
1099 | # CONFIG_USB_TEST is not set | ||
1100 | # CONFIG_USB_ISIGHTFW is not set | ||
1101 | # CONFIG_USB_GADGET is not set | ||
1102 | # CONFIG_MMC is not set | ||
1103 | # CONFIG_MEMSTICK is not set | ||
1104 | # CONFIG_NEW_LEDS is not set | ||
1105 | # CONFIG_ACCESSIBILITY is not set | ||
1106 | # CONFIG_INFINIBAND is not set | ||
1107 | # CONFIG_EDAC is not set | ||
1108 | CONFIG_RTC_LIB=y | ||
1109 | CONFIG_RTC_CLASS=y | ||
1110 | CONFIG_RTC_HCTOSYS=y | ||
1111 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1112 | # CONFIG_RTC_DEBUG is not set | ||
1113 | |||
1114 | # | ||
1115 | # RTC interfaces | ||
1116 | # | ||
1117 | CONFIG_RTC_INTF_SYSFS=y | ||
1118 | CONFIG_RTC_INTF_PROC=y | ||
1119 | CONFIG_RTC_INTF_DEV=y | ||
1120 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1121 | # CONFIG_RTC_DRV_TEST is not set | ||
1122 | |||
1123 | # | ||
1124 | # I2C RTC drivers | ||
1125 | # | ||
1126 | # CONFIG_RTC_DRV_DS1307 is not set | ||
1127 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1128 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1129 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1130 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1131 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1132 | # CONFIG_RTC_DRV_X1205 is not set | ||
1133 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1134 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1135 | # CONFIG_RTC_DRV_M41T80 is not set | ||
1136 | # CONFIG_RTC_DRV_S35390A is not set | ||
1137 | # CONFIG_RTC_DRV_FM3130 is not set | ||
1138 | CONFIG_RTC_DRV_RX8025=y | ||
1139 | |||
1140 | # | ||
1141 | # SPI RTC drivers | ||
1142 | # | ||
1143 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
1144 | # CONFIG_RTC_DRV_R9701 is not set | ||
1145 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
1146 | |||
1147 | # | ||
1148 | # Platform RTC drivers | ||
1149 | # | ||
1150 | # CONFIG_RTC_DRV_CMOS is not set | ||
1151 | # CONFIG_RTC_DRV_DS1511 is not set | ||
1152 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1153 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1154 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1155 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1156 | # CONFIG_RTC_DRV_M48T59 is not set | ||
1157 | # CONFIG_RTC_DRV_V3020 is not set | ||
1158 | |||
1159 | # | ||
1160 | # on-CPU RTC drivers | ||
1161 | # | ||
1162 | CONFIG_RTC_DRV_PPC=y | ||
1163 | # CONFIG_DMADEVICES is not set | ||
1164 | # CONFIG_UIO is not set | ||
1165 | |||
1166 | # | ||
1167 | # File systems | ||
1168 | # | ||
1169 | CONFIG_EXT2_FS=y | ||
1170 | # CONFIG_EXT2_FS_XATTR is not set | ||
1171 | # CONFIG_EXT2_FS_XIP is not set | ||
1172 | CONFIG_EXT3_FS=y | ||
1173 | CONFIG_EXT3_FS_XATTR=y | ||
1174 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
1175 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1176 | # CONFIG_EXT4DEV_FS is not set | ||
1177 | CONFIG_JBD=y | ||
1178 | CONFIG_FS_MBCACHE=y | ||
1179 | # CONFIG_REISERFS_FS is not set | ||
1180 | # CONFIG_JFS_FS is not set | ||
1181 | # CONFIG_FS_POSIX_ACL is not set | ||
1182 | # CONFIG_XFS_FS is not set | ||
1183 | # CONFIG_OCFS2_FS is not set | ||
1184 | CONFIG_DNOTIFY=y | ||
1185 | CONFIG_INOTIFY=y | ||
1186 | CONFIG_INOTIFY_USER=y | ||
1187 | # CONFIG_QUOTA is not set | ||
1188 | # CONFIG_AUTOFS_FS is not set | ||
1189 | # CONFIG_AUTOFS4_FS is not set | ||
1190 | # CONFIG_FUSE_FS is not set | ||
1191 | |||
1192 | # | ||
1193 | # CD-ROM/DVD Filesystems | ||
1194 | # | ||
1195 | # CONFIG_ISO9660_FS is not set | ||
1196 | # CONFIG_UDF_FS is not set | ||
1197 | |||
1198 | # | ||
1199 | # DOS/FAT/NT Filesystems | ||
1200 | # | ||
1201 | # CONFIG_MSDOS_FS is not set | ||
1202 | # CONFIG_VFAT_FS is not set | ||
1203 | # CONFIG_NTFS_FS is not set | ||
1204 | |||
1205 | # | ||
1206 | # Pseudo filesystems | ||
1207 | # | ||
1208 | CONFIG_PROC_FS=y | ||
1209 | CONFIG_PROC_KCORE=y | ||
1210 | CONFIG_PROC_SYSCTL=y | ||
1211 | CONFIG_SYSFS=y | ||
1212 | CONFIG_TMPFS=y | ||
1213 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1214 | # CONFIG_HUGETLB_PAGE is not set | ||
1215 | # CONFIG_CONFIGFS_FS is not set | ||
1216 | |||
1217 | # | ||
1218 | # Miscellaneous filesystems | ||
1219 | # | ||
1220 | # CONFIG_ADFS_FS is not set | ||
1221 | # CONFIG_AFFS_FS is not set | ||
1222 | # CONFIG_HFS_FS is not set | ||
1223 | # CONFIG_HFSPLUS_FS is not set | ||
1224 | # CONFIG_BEFS_FS is not set | ||
1225 | # CONFIG_BFS_FS is not set | ||
1226 | # CONFIG_EFS_FS is not set | ||
1227 | CONFIG_JFFS2_FS=y | ||
1228 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1229 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1230 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1231 | # CONFIG_JFFS2_SUMMARY is not set | ||
1232 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1233 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1234 | CONFIG_JFFS2_ZLIB=y | ||
1235 | # CONFIG_JFFS2_LZO is not set | ||
1236 | CONFIG_JFFS2_RTIME=y | ||
1237 | # CONFIG_JFFS2_RUBIN is not set | ||
1238 | CONFIG_CRAMFS=y | ||
1239 | # CONFIG_VXFS_FS is not set | ||
1240 | # CONFIG_MINIX_FS is not set | ||
1241 | # CONFIG_HPFS_FS is not set | ||
1242 | # CONFIG_QNX4FS_FS is not set | ||
1243 | # CONFIG_ROMFS_FS is not set | ||
1244 | # CONFIG_SYSV_FS is not set | ||
1245 | # CONFIG_UFS_FS is not set | ||
1246 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1247 | CONFIG_NFS_FS=y | ||
1248 | CONFIG_NFS_V3=y | ||
1249 | # CONFIG_NFS_V3_ACL is not set | ||
1250 | # CONFIG_NFS_V4 is not set | ||
1251 | # CONFIG_NFSD is not set | ||
1252 | CONFIG_ROOT_NFS=y | ||
1253 | CONFIG_LOCKD=y | ||
1254 | CONFIG_LOCKD_V4=y | ||
1255 | CONFIG_NFS_COMMON=y | ||
1256 | CONFIG_SUNRPC=y | ||
1257 | # CONFIG_SUNRPC_BIND34 is not set | ||
1258 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1259 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1260 | # CONFIG_SMB_FS is not set | ||
1261 | # CONFIG_CIFS is not set | ||
1262 | # CONFIG_NCP_FS is not set | ||
1263 | # CONFIG_CODA_FS is not set | ||
1264 | # CONFIG_AFS_FS is not set | ||
1265 | |||
1266 | # | ||
1267 | # Partition Types | ||
1268 | # | ||
1269 | CONFIG_PARTITION_ADVANCED=y | ||
1270 | # CONFIG_ACORN_PARTITION is not set | ||
1271 | # CONFIG_OSF_PARTITION is not set | ||
1272 | # CONFIG_AMIGA_PARTITION is not set | ||
1273 | # CONFIG_ATARI_PARTITION is not set | ||
1274 | # CONFIG_MAC_PARTITION is not set | ||
1275 | CONFIG_MSDOS_PARTITION=y | ||
1276 | # CONFIG_BSD_DISKLABEL is not set | ||
1277 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1278 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1279 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1280 | # CONFIG_LDM_PARTITION is not set | ||
1281 | # CONFIG_SGI_PARTITION is not set | ||
1282 | # CONFIG_ULTRIX_PARTITION is not set | ||
1283 | # CONFIG_SUN_PARTITION is not set | ||
1284 | # CONFIG_KARMA_PARTITION is not set | ||
1285 | # CONFIG_EFI_PARTITION is not set | ||
1286 | # CONFIG_SYSV68_PARTITION is not set | ||
1287 | # CONFIG_NLS is not set | ||
1288 | # CONFIG_DLM is not set | ||
1289 | |||
1290 | # | ||
1291 | # Library routines | ||
1292 | # | ||
1293 | CONFIG_BITREVERSE=y | ||
1294 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | ||
1295 | # CONFIG_CRC_CCITT is not set | ||
1296 | # CONFIG_CRC16 is not set | ||
1297 | # CONFIG_CRC_ITU_T is not set | ||
1298 | CONFIG_CRC32=y | ||
1299 | # CONFIG_CRC7 is not set | ||
1300 | # CONFIG_LIBCRC32C is not set | ||
1301 | CONFIG_ZLIB_INFLATE=y | ||
1302 | CONFIG_ZLIB_DEFLATE=y | ||
1303 | CONFIG_PLIST=y | ||
1304 | CONFIG_HAS_IOMEM=y | ||
1305 | CONFIG_HAS_IOPORT=y | ||
1306 | CONFIG_HAS_DMA=y | ||
1307 | CONFIG_HAVE_LMB=y | ||
1308 | |||
1309 | # | ||
1310 | # Kernel hacking | ||
1311 | # | ||
1312 | # CONFIG_PRINTK_TIME is not set | ||
1313 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1314 | CONFIG_ENABLE_MUST_CHECK=y | ||
1315 | CONFIG_FRAME_WARN=1024 | ||
1316 | # CONFIG_MAGIC_SYSRQ is not set | ||
1317 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1318 | # CONFIG_DEBUG_FS is not set | ||
1319 | # CONFIG_HEADERS_CHECK is not set | ||
1320 | # CONFIG_DEBUG_KERNEL is not set | ||
1321 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1322 | # CONFIG_SLUB_STATS is not set | ||
1323 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1324 | # CONFIG_SAMPLES is not set | ||
1325 | # CONFIG_IRQSTACKS is not set | ||
1326 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1327 | |||
1328 | # | ||
1329 | # Security options | ||
1330 | # | ||
1331 | # CONFIG_KEYS is not set | ||
1332 | # CONFIG_SECURITY is not set | ||
1333 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1334 | CONFIG_CRYPTO=y | ||
1335 | |||
1336 | # | ||
1337 | # Crypto core or helper | ||
1338 | # | ||
1339 | # CONFIG_CRYPTO_MANAGER is not set | ||
1340 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1341 | # CONFIG_CRYPTO_NULL is not set | ||
1342 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1343 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1344 | # CONFIG_CRYPTO_TEST is not set | ||
1345 | |||
1346 | # | ||
1347 | # Authenticated Encryption with Associated Data | ||
1348 | # | ||
1349 | # CONFIG_CRYPTO_CCM is not set | ||
1350 | # CONFIG_CRYPTO_GCM is not set | ||
1351 | # CONFIG_CRYPTO_SEQIV is not set | ||
1352 | |||
1353 | # | ||
1354 | # Block modes | ||
1355 | # | ||
1356 | # CONFIG_CRYPTO_CBC is not set | ||
1357 | # CONFIG_CRYPTO_CTR is not set | ||
1358 | # CONFIG_CRYPTO_CTS is not set | ||
1359 | # CONFIG_CRYPTO_ECB is not set | ||
1360 | # CONFIG_CRYPTO_LRW is not set | ||
1361 | # CONFIG_CRYPTO_PCBC is not set | ||
1362 | # CONFIG_CRYPTO_XTS is not set | ||
1363 | |||
1364 | # | ||
1365 | # Hash modes | ||
1366 | # | ||
1367 | # CONFIG_CRYPTO_HMAC is not set | ||
1368 | # CONFIG_CRYPTO_XCBC is not set | ||
1369 | |||
1370 | # | ||
1371 | # Digest | ||
1372 | # | ||
1373 | # CONFIG_CRYPTO_CRC32C is not set | ||
1374 | # CONFIG_CRYPTO_MD4 is not set | ||
1375 | # CONFIG_CRYPTO_MD5 is not set | ||
1376 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1377 | # CONFIG_CRYPTO_SHA1 is not set | ||
1378 | # CONFIG_CRYPTO_SHA256 is not set | ||
1379 | # CONFIG_CRYPTO_SHA512 is not set | ||
1380 | # CONFIG_CRYPTO_TGR192 is not set | ||
1381 | # CONFIG_CRYPTO_WP512 is not set | ||
1382 | |||
1383 | # | ||
1384 | # Ciphers | ||
1385 | # | ||
1386 | # CONFIG_CRYPTO_AES is not set | ||
1387 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1388 | # CONFIG_CRYPTO_ARC4 is not set | ||
1389 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1390 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1391 | # CONFIG_CRYPTO_CAST5 is not set | ||
1392 | # CONFIG_CRYPTO_CAST6 is not set | ||
1393 | # CONFIG_CRYPTO_DES is not set | ||
1394 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1395 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1396 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1397 | # CONFIG_CRYPTO_SEED is not set | ||
1398 | # CONFIG_CRYPTO_SERPENT is not set | ||
1399 | # CONFIG_CRYPTO_TEA is not set | ||
1400 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1401 | |||
1402 | # | ||
1403 | # Compression | ||
1404 | # | ||
1405 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1406 | # CONFIG_CRYPTO_LZO is not set | ||
1407 | CONFIG_CRYPTO_HW=y | ||
1408 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
1409 | # CONFIG_PPC_CLOCK is not set | ||
1410 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig new file mode 100644 index 000000000000..df2c16337794 --- /dev/null +++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig | |||
@@ -0,0 +1,1889 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.29-rc7 | ||
4 | # Fri Mar 13 15:36:11 2009 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | CONFIG_6xx=y | ||
12 | # CONFIG_PPC_85xx is not set | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_PPC_FPU=y | ||
18 | # CONFIG_PHYS_64BIT is not set | ||
19 | CONFIG_ALTIVEC=y | ||
20 | CONFIG_PPC_STD_MMU=y | ||
21 | CONFIG_PPC_STD_MMU_32=y | ||
22 | # CONFIG_PPC_MM_SLICES is not set | ||
23 | CONFIG_SMP=y | ||
24 | CONFIG_NR_CPUS=2 | ||
25 | CONFIG_PPC32=y | ||
26 | CONFIG_WORD_SIZE=32 | ||
27 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | ||
28 | CONFIG_MMU=y | ||
29 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
30 | CONFIG_GENERIC_TIME=y | ||
31 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
32 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
33 | CONFIG_GENERIC_HARDIRQS=y | ||
34 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
35 | CONFIG_IRQ_PER_CPU=y | ||
36 | CONFIG_STACKTRACE_SUPPORT=y | ||
37 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
38 | CONFIG_LOCKDEP_SUPPORT=y | ||
39 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
40 | CONFIG_GENERIC_LOCKBREAK=y | ||
41 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
42 | CONFIG_GENERIC_HWEIGHT=y | ||
43 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
44 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
45 | CONFIG_GENERIC_GPIO=y | ||
46 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
47 | CONFIG_PPC=y | ||
48 | CONFIG_EARLY_PRINTK=y | ||
49 | CONFIG_GENERIC_NVRAM=y | ||
50 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
51 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
52 | CONFIG_PPC_OF=y | ||
53 | CONFIG_OF=y | ||
54 | CONFIG_PPC_UDBG_16550=y | ||
55 | CONFIG_GENERIC_TBSYNC=y | ||
56 | CONFIG_AUDIT_ARCH=y | ||
57 | CONFIG_GENERIC_BUG=y | ||
58 | CONFIG_DEFAULT_UIMAGE=y | ||
59 | # CONFIG_PPC_DCR_NATIVE is not set | ||
60 | # CONFIG_PPC_DCR_MMIO is not set | ||
61 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
62 | |||
63 | # | ||
64 | # General setup | ||
65 | # | ||
66 | CONFIG_EXPERIMENTAL=y | ||
67 | CONFIG_LOCK_KERNEL=y | ||
68 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
69 | CONFIG_LOCALVERSION="" | ||
70 | CONFIG_LOCALVERSION_AUTO=y | ||
71 | CONFIG_SWAP=y | ||
72 | CONFIG_SYSVIPC=y | ||
73 | CONFIG_SYSVIPC_SYSCTL=y | ||
74 | CONFIG_POSIX_MQUEUE=y | ||
75 | CONFIG_BSD_PROCESS_ACCT=y | ||
76 | CONFIG_BSD_PROCESS_ACCT_V3=y | ||
77 | # CONFIG_TASKSTATS is not set | ||
78 | # CONFIG_AUDIT is not set | ||
79 | |||
80 | # | ||
81 | # RCU Subsystem | ||
82 | # | ||
83 | CONFIG_CLASSIC_RCU=y | ||
84 | # CONFIG_TREE_RCU is not set | ||
85 | # CONFIG_PREEMPT_RCU is not set | ||
86 | # CONFIG_TREE_RCU_TRACE is not set | ||
87 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
88 | CONFIG_IKCONFIG=y | ||
89 | CONFIG_IKCONFIG_PROC=y | ||
90 | CONFIG_LOG_BUF_SHIFT=14 | ||
91 | CONFIG_GROUP_SCHED=y | ||
92 | CONFIG_FAIR_GROUP_SCHED=y | ||
93 | # CONFIG_RT_GROUP_SCHED is not set | ||
94 | CONFIG_USER_SCHED=y | ||
95 | # CONFIG_CGROUP_SCHED is not set | ||
96 | # CONFIG_CGROUPS is not set | ||
97 | CONFIG_SYSFS_DEPRECATED=y | ||
98 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
99 | CONFIG_RELAY=y | ||
100 | # CONFIG_NAMESPACES is not set | ||
101 | CONFIG_BLK_DEV_INITRD=y | ||
102 | CONFIG_INITRAMFS_SOURCE="" | ||
103 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
104 | CONFIG_SYSCTL=y | ||
105 | CONFIG_EMBEDDED=y | ||
106 | CONFIG_SYSCTL_SYSCALL=y | ||
107 | CONFIG_KALLSYMS=y | ||
108 | # CONFIG_KALLSYMS_ALL is not set | ||
109 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
110 | CONFIG_HOTPLUG=y | ||
111 | CONFIG_PRINTK=y | ||
112 | CONFIG_BUG=y | ||
113 | CONFIG_ELF_CORE=y | ||
114 | CONFIG_COMPAT_BRK=y | ||
115 | CONFIG_BASE_FULL=y | ||
116 | CONFIG_FUTEX=y | ||
117 | CONFIG_ANON_INODES=y | ||
118 | CONFIG_EPOLL=y | ||
119 | CONFIG_SIGNALFD=y | ||
120 | CONFIG_TIMERFD=y | ||
121 | CONFIG_EVENTFD=y | ||
122 | CONFIG_SHMEM=y | ||
123 | CONFIG_AIO=y | ||
124 | CONFIG_VM_EVENT_COUNTERS=y | ||
125 | CONFIG_PCI_QUIRKS=y | ||
126 | CONFIG_SLAB=y | ||
127 | # CONFIG_SLUB is not set | ||
128 | # CONFIG_SLOB is not set | ||
129 | # CONFIG_PROFILING is not set | ||
130 | CONFIG_HAVE_OPROFILE=y | ||
131 | # CONFIG_KPROBES is not set | ||
132 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | ||
133 | CONFIG_HAVE_IOREMAP_PROT=y | ||
134 | CONFIG_HAVE_KPROBES=y | ||
135 | CONFIG_HAVE_KRETPROBES=y | ||
136 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
137 | CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
138 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
139 | CONFIG_SLABINFO=y | ||
140 | CONFIG_RT_MUTEXES=y | ||
141 | CONFIG_BASE_SMALL=0 | ||
142 | CONFIG_MODULES=y | ||
143 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
144 | CONFIG_MODULE_UNLOAD=y | ||
145 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
146 | # CONFIG_MODVERSIONS is not set | ||
147 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
148 | CONFIG_STOP_MACHINE=y | ||
149 | CONFIG_BLOCK=y | ||
150 | # CONFIG_LBD is not set | ||
151 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
152 | # CONFIG_BLK_DEV_BSG is not set | ||
153 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
154 | |||
155 | # | ||
156 | # IO Schedulers | ||
157 | # | ||
158 | CONFIG_IOSCHED_NOOP=y | ||
159 | CONFIG_IOSCHED_AS=y | ||
160 | CONFIG_IOSCHED_DEADLINE=y | ||
161 | CONFIG_IOSCHED_CFQ=y | ||
162 | # CONFIG_DEFAULT_AS is not set | ||
163 | # CONFIG_DEFAULT_DEADLINE is not set | ||
164 | CONFIG_DEFAULT_CFQ=y | ||
165 | # CONFIG_DEFAULT_NOOP is not set | ||
166 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
167 | # CONFIG_FREEZER is not set | ||
168 | |||
169 | # | ||
170 | # Platform support | ||
171 | # | ||
172 | CONFIG_PPC_MULTIPLATFORM=y | ||
173 | CONFIG_CLASSIC32=y | ||
174 | # CONFIG_PPC_CHRP is not set | ||
175 | # CONFIG_MPC5121_ADS is not set | ||
176 | # CONFIG_MPC5121_GENERIC is not set | ||
177 | # CONFIG_PPC_MPC52xx is not set | ||
178 | # CONFIG_PPC_PMAC is not set | ||
179 | # CONFIG_PPC_CELL is not set | ||
180 | # CONFIG_PPC_CELL_NATIVE is not set | ||
181 | # CONFIG_PPC_82xx is not set | ||
182 | # CONFIG_PQ2ADS is not set | ||
183 | # CONFIG_PPC_83xx is not set | ||
184 | CONFIG_PPC_86xx=y | ||
185 | # CONFIG_MPC8641_HPCN is not set | ||
186 | # CONFIG_SBC8641D is not set | ||
187 | # CONFIG_MPC8610_HPCD is not set | ||
188 | CONFIG_GEF_PPC9A=y | ||
189 | # CONFIG_GEF_SBC310 is not set | ||
190 | # CONFIG_GEF_SBC610 is not set | ||
191 | CONFIG_MPC8641=y | ||
192 | # CONFIG_IPIC is not set | ||
193 | CONFIG_MPIC=y | ||
194 | # CONFIG_MPIC_WEIRD is not set | ||
195 | # CONFIG_PPC_I8259 is not set | ||
196 | # CONFIG_PPC_RTAS is not set | ||
197 | # CONFIG_MMIO_NVRAM is not set | ||
198 | # CONFIG_PPC_MPC106 is not set | ||
199 | # CONFIG_PPC_970_NAP is not set | ||
200 | # CONFIG_PPC_INDIRECT_IO is not set | ||
201 | # CONFIG_GENERIC_IOMAP is not set | ||
202 | # CONFIG_CPU_FREQ is not set | ||
203 | # CONFIG_TAU is not set | ||
204 | # CONFIG_QUICC_ENGINE is not set | ||
205 | # CONFIG_FSL_ULI1575 is not set | ||
206 | # CONFIG_MPC8xxx_GPIO is not set | ||
207 | # CONFIG_SIMPLE_GPIO is not set | ||
208 | |||
209 | # | ||
210 | # Kernel options | ||
211 | # | ||
212 | # CONFIG_HIGHMEM is not set | ||
213 | CONFIG_TICK_ONESHOT=y | ||
214 | # CONFIG_NO_HZ is not set | ||
215 | CONFIG_HIGH_RES_TIMERS=y | ||
216 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
217 | # CONFIG_HZ_100 is not set | ||
218 | # CONFIG_HZ_250 is not set | ||
219 | # CONFIG_HZ_300 is not set | ||
220 | CONFIG_HZ_1000=y | ||
221 | CONFIG_HZ=1000 | ||
222 | CONFIG_SCHED_HRTICK=y | ||
223 | # CONFIG_PREEMPT_NONE is not set | ||
224 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
225 | CONFIG_PREEMPT=y | ||
226 | CONFIG_BINFMT_ELF=y | ||
227 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
228 | # CONFIG_HAVE_AOUT is not set | ||
229 | CONFIG_BINFMT_MISC=m | ||
230 | # CONFIG_IOMMU_HELPER is not set | ||
231 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
232 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
233 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
234 | # CONFIG_KEXEC is not set | ||
235 | # CONFIG_CRASH_DUMP is not set | ||
236 | CONFIG_IRQ_ALL_CPUS=y | ||
237 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
238 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
239 | CONFIG_SELECT_MEMORY_MODEL=y | ||
240 | CONFIG_FLATMEM_MANUAL=y | ||
241 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
242 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
243 | CONFIG_FLATMEM=y | ||
244 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
245 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
246 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
247 | CONFIG_MIGRATION=y | ||
248 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
249 | CONFIG_ZONE_DMA_FLAG=1 | ||
250 | CONFIG_BOUNCE=y | ||
251 | CONFIG_VIRT_TO_BUS=y | ||
252 | CONFIG_UNEVICTABLE_LRU=y | ||
253 | CONFIG_PPC_4K_PAGES=y | ||
254 | # CONFIG_PPC_16K_PAGES is not set | ||
255 | # CONFIG_PPC_64K_PAGES is not set | ||
256 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
257 | # CONFIG_PROC_DEVICETREE is not set | ||
258 | # CONFIG_CMDLINE_BOOL is not set | ||
259 | CONFIG_EXTRA_TARGETS="" | ||
260 | # CONFIG_PM is not set | ||
261 | CONFIG_SECCOMP=y | ||
262 | CONFIG_ISA_DMA_API=y | ||
263 | |||
264 | # | ||
265 | # Bus options | ||
266 | # | ||
267 | CONFIG_ZONE_DMA=y | ||
268 | CONFIG_GENERIC_ISA_DMA=y | ||
269 | CONFIG_PPC_INDIRECT_PCI=y | ||
270 | CONFIG_FSL_SOC=y | ||
271 | CONFIG_FSL_PCI=y | ||
272 | CONFIG_PPC_PCI_CHOICE=y | ||
273 | CONFIG_PCI=y | ||
274 | CONFIG_PCI_DOMAINS=y | ||
275 | CONFIG_PCI_SYSCALL=y | ||
276 | CONFIG_PCIEPORTBUS=y | ||
277 | CONFIG_PCIEAER=y | ||
278 | # CONFIG_PCIEASPM is not set | ||
279 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
280 | # CONFIG_PCI_MSI is not set | ||
281 | # CONFIG_PCI_LEGACY is not set | ||
282 | CONFIG_PCI_DEBUG=y | ||
283 | # CONFIG_PCI_STUB is not set | ||
284 | # CONFIG_PCCARD is not set | ||
285 | # CONFIG_HOTPLUG_PCI is not set | ||
286 | # CONFIG_HAS_RAPIDIO is not set | ||
287 | |||
288 | # | ||
289 | # Advanced setup | ||
290 | # | ||
291 | # CONFIG_ADVANCED_OPTIONS is not set | ||
292 | |||
293 | # | ||
294 | # Default settings for advanced configuration options are used | ||
295 | # | ||
296 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
297 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
298 | CONFIG_KERNEL_START=0xc0000000 | ||
299 | CONFIG_PHYSICAL_START=0x00000000 | ||
300 | CONFIG_TASK_SIZE=0xc0000000 | ||
301 | CONFIG_NET=y | ||
302 | |||
303 | # | ||
304 | # Networking options | ||
305 | # | ||
306 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
307 | CONFIG_PACKET=y | ||
308 | CONFIG_PACKET_MMAP=y | ||
309 | CONFIG_UNIX=y | ||
310 | CONFIG_XFRM=y | ||
311 | CONFIG_XFRM_USER=m | ||
312 | # CONFIG_XFRM_SUB_POLICY is not set | ||
313 | # CONFIG_XFRM_MIGRATE is not set | ||
314 | # CONFIG_XFRM_STATISTICS is not set | ||
315 | CONFIG_XFRM_IPCOMP=m | ||
316 | CONFIG_NET_KEY=m | ||
317 | # CONFIG_NET_KEY_MIGRATE is not set | ||
318 | CONFIG_INET=y | ||
319 | CONFIG_IP_MULTICAST=y | ||
320 | CONFIG_IP_ADVANCED_ROUTER=y | ||
321 | CONFIG_ASK_IP_FIB_HASH=y | ||
322 | # CONFIG_IP_FIB_TRIE is not set | ||
323 | CONFIG_IP_FIB_HASH=y | ||
324 | CONFIG_IP_MULTIPLE_TABLES=y | ||
325 | CONFIG_IP_ROUTE_MULTIPATH=y | ||
326 | CONFIG_IP_ROUTE_VERBOSE=y | ||
327 | CONFIG_IP_PNP=y | ||
328 | CONFIG_IP_PNP_DHCP=y | ||
329 | CONFIG_IP_PNP_BOOTP=y | ||
330 | CONFIG_IP_PNP_RARP=y | ||
331 | CONFIG_NET_IPIP=m | ||
332 | CONFIG_NET_IPGRE=m | ||
333 | CONFIG_NET_IPGRE_BROADCAST=y | ||
334 | CONFIG_IP_MROUTE=y | ||
335 | CONFIG_IP_PIMSM_V1=y | ||
336 | CONFIG_IP_PIMSM_V2=y | ||
337 | # CONFIG_ARPD is not set | ||
338 | CONFIG_SYN_COOKIES=y | ||
339 | CONFIG_INET_AH=m | ||
340 | CONFIG_INET_ESP=m | ||
341 | CONFIG_INET_IPCOMP=m | ||
342 | CONFIG_INET_XFRM_TUNNEL=m | ||
343 | CONFIG_INET_TUNNEL=m | ||
344 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
345 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
346 | CONFIG_INET_XFRM_MODE_BEET=y | ||
347 | # CONFIG_INET_LRO is not set | ||
348 | CONFIG_INET_DIAG=y | ||
349 | CONFIG_INET_TCP_DIAG=y | ||
350 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
351 | CONFIG_TCP_CONG_CUBIC=y | ||
352 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
353 | # CONFIG_TCP_MD5SIG is not set | ||
354 | CONFIG_IPV6=m | ||
355 | # CONFIG_IPV6_PRIVACY is not set | ||
356 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
357 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
358 | CONFIG_INET6_AH=m | ||
359 | CONFIG_INET6_ESP=m | ||
360 | CONFIG_INET6_IPCOMP=m | ||
361 | # CONFIG_IPV6_MIP6 is not set | ||
362 | CONFIG_INET6_XFRM_TUNNEL=m | ||
363 | CONFIG_INET6_TUNNEL=m | ||
364 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
365 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
366 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
367 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
368 | CONFIG_IPV6_SIT=m | ||
369 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
370 | CONFIG_IPV6_TUNNEL=m | ||
371 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
372 | # CONFIG_IPV6_MROUTE is not set | ||
373 | # CONFIG_NETLABEL is not set | ||
374 | # CONFIG_NETWORK_SECMARK is not set | ||
375 | CONFIG_NETFILTER=y | ||
376 | # CONFIG_NETFILTER_DEBUG is not set | ||
377 | CONFIG_NETFILTER_ADVANCED=y | ||
378 | CONFIG_BRIDGE_NETFILTER=y | ||
379 | |||
380 | # | ||
381 | # Core Netfilter Configuration | ||
382 | # | ||
383 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set | ||
384 | # CONFIG_NETFILTER_NETLINK_LOG is not set | ||
385 | # CONFIG_NF_CONNTRACK is not set | ||
386 | CONFIG_NETFILTER_XTABLES=m | ||
387 | # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set | ||
388 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | ||
389 | # CONFIG_NETFILTER_XT_TARGET_MARK is not set | ||
390 | # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set | ||
391 | # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set | ||
392 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set | ||
393 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set | ||
394 | # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set | ||
395 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | ||
396 | # CONFIG_NETFILTER_XT_MATCH_COMMENT is not set | ||
397 | # CONFIG_NETFILTER_XT_MATCH_DCCP is not set | ||
398 | # CONFIG_NETFILTER_XT_MATCH_DSCP is not set | ||
399 | # CONFIG_NETFILTER_XT_MATCH_ESP is not set | ||
400 | # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set | ||
401 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set | ||
402 | # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set | ||
403 | # CONFIG_NETFILTER_XT_MATCH_LIMIT is not set | ||
404 | # CONFIG_NETFILTER_XT_MATCH_MAC is not set | ||
405 | # CONFIG_NETFILTER_XT_MATCH_MARK is not set | ||
406 | # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set | ||
407 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set | ||
408 | # CONFIG_NETFILTER_XT_MATCH_POLICY is not set | ||
409 | # CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set | ||
410 | # CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set | ||
411 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set | ||
412 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set | ||
413 | # CONFIG_NETFILTER_XT_MATCH_REALM is not set | ||
414 | # CONFIG_NETFILTER_XT_MATCH_RECENT is not set | ||
415 | # CONFIG_NETFILTER_XT_MATCH_SCTP is not set | ||
416 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set | ||
417 | # CONFIG_NETFILTER_XT_MATCH_STRING is not set | ||
418 | # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set | ||
419 | # CONFIG_NETFILTER_XT_MATCH_TIME is not set | ||
420 | # CONFIG_NETFILTER_XT_MATCH_U32 is not set | ||
421 | # CONFIG_IP_VS is not set | ||
422 | |||
423 | # | ||
424 | # IP: Netfilter Configuration | ||
425 | # | ||
426 | # CONFIG_NF_DEFRAG_IPV4 is not set | ||
427 | CONFIG_IP_NF_QUEUE=m | ||
428 | CONFIG_IP_NF_IPTABLES=m | ||
429 | CONFIG_IP_NF_MATCH_ADDRTYPE=m | ||
430 | # CONFIG_IP_NF_MATCH_AH is not set | ||
431 | CONFIG_IP_NF_MATCH_ECN=m | ||
432 | CONFIG_IP_NF_MATCH_TTL=m | ||
433 | CONFIG_IP_NF_FILTER=m | ||
434 | CONFIG_IP_NF_TARGET_REJECT=m | ||
435 | CONFIG_IP_NF_TARGET_LOG=m | ||
436 | CONFIG_IP_NF_TARGET_ULOG=m | ||
437 | CONFIG_IP_NF_MANGLE=m | ||
438 | CONFIG_IP_NF_TARGET_ECN=m | ||
439 | # CONFIG_IP_NF_TARGET_TTL is not set | ||
440 | CONFIG_IP_NF_RAW=m | ||
441 | # CONFIG_IP_NF_SECURITY is not set | ||
442 | CONFIG_IP_NF_ARPTABLES=m | ||
443 | CONFIG_IP_NF_ARPFILTER=m | ||
444 | CONFIG_IP_NF_ARP_MANGLE=m | ||
445 | |||
446 | # | ||
447 | # IPv6: Netfilter Configuration | ||
448 | # | ||
449 | CONFIG_IP6_NF_QUEUE=m | ||
450 | CONFIG_IP6_NF_IPTABLES=m | ||
451 | # CONFIG_IP6_NF_MATCH_AH is not set | ||
452 | CONFIG_IP6_NF_MATCH_EUI64=m | ||
453 | CONFIG_IP6_NF_MATCH_FRAG=m | ||
454 | CONFIG_IP6_NF_MATCH_OPTS=m | ||
455 | CONFIG_IP6_NF_MATCH_HL=m | ||
456 | CONFIG_IP6_NF_MATCH_IPV6HEADER=m | ||
457 | # CONFIG_IP6_NF_MATCH_MH is not set | ||
458 | CONFIG_IP6_NF_MATCH_RT=m | ||
459 | CONFIG_IP6_NF_TARGET_LOG=m | ||
460 | CONFIG_IP6_NF_FILTER=m | ||
461 | # CONFIG_IP6_NF_TARGET_REJECT is not set | ||
462 | CONFIG_IP6_NF_MANGLE=m | ||
463 | # CONFIG_IP6_NF_TARGET_HL is not set | ||
464 | CONFIG_IP6_NF_RAW=m | ||
465 | # CONFIG_IP6_NF_SECURITY is not set | ||
466 | # CONFIG_BRIDGE_NF_EBTABLES is not set | ||
467 | # CONFIG_IP_DCCP is not set | ||
468 | CONFIG_IP_SCTP=m | ||
469 | # CONFIG_SCTP_DBG_MSG is not set | ||
470 | # CONFIG_SCTP_DBG_OBJCNT is not set | ||
471 | # CONFIG_SCTP_HMAC_NONE is not set | ||
472 | # CONFIG_SCTP_HMAC_SHA1 is not set | ||
473 | CONFIG_SCTP_HMAC_MD5=y | ||
474 | CONFIG_TIPC=m | ||
475 | # CONFIG_TIPC_ADVANCED is not set | ||
476 | # CONFIG_TIPC_DEBUG is not set | ||
477 | CONFIG_ATM=m | ||
478 | CONFIG_ATM_CLIP=m | ||
479 | # CONFIG_ATM_CLIP_NO_ICMP is not set | ||
480 | CONFIG_ATM_LANE=m | ||
481 | CONFIG_ATM_MPOA=m | ||
482 | CONFIG_ATM_BR2684=m | ||
483 | # CONFIG_ATM_BR2684_IPFILTER is not set | ||
484 | CONFIG_STP=m | ||
485 | CONFIG_BRIDGE=m | ||
486 | # CONFIG_NET_DSA is not set | ||
487 | CONFIG_VLAN_8021Q=m | ||
488 | # CONFIG_VLAN_8021Q_GVRP is not set | ||
489 | # CONFIG_DECNET is not set | ||
490 | CONFIG_LLC=m | ||
491 | # CONFIG_LLC2 is not set | ||
492 | # CONFIG_IPX is not set | ||
493 | # CONFIG_ATALK is not set | ||
494 | # CONFIG_X25 is not set | ||
495 | # CONFIG_LAPB is not set | ||
496 | # CONFIG_ECONET is not set | ||
497 | CONFIG_WAN_ROUTER=m | ||
498 | CONFIG_NET_SCHED=y | ||
499 | |||
500 | # | ||
501 | # Queueing/Scheduling | ||
502 | # | ||
503 | CONFIG_NET_SCH_CBQ=m | ||
504 | CONFIG_NET_SCH_HTB=m | ||
505 | CONFIG_NET_SCH_HFSC=m | ||
506 | CONFIG_NET_SCH_ATM=m | ||
507 | CONFIG_NET_SCH_PRIO=m | ||
508 | # CONFIG_NET_SCH_MULTIQ is not set | ||
509 | CONFIG_NET_SCH_RED=m | ||
510 | CONFIG_NET_SCH_SFQ=m | ||
511 | CONFIG_NET_SCH_TEQL=m | ||
512 | CONFIG_NET_SCH_TBF=m | ||
513 | CONFIG_NET_SCH_GRED=m | ||
514 | CONFIG_NET_SCH_DSMARK=m | ||
515 | CONFIG_NET_SCH_NETEM=m | ||
516 | # CONFIG_NET_SCH_DRR is not set | ||
517 | |||
518 | # | ||
519 | # Classification | ||
520 | # | ||
521 | CONFIG_NET_CLS=y | ||
522 | # CONFIG_NET_CLS_BASIC is not set | ||
523 | CONFIG_NET_CLS_TCINDEX=m | ||
524 | CONFIG_NET_CLS_ROUTE4=m | ||
525 | CONFIG_NET_CLS_ROUTE=y | ||
526 | CONFIG_NET_CLS_FW=m | ||
527 | CONFIG_NET_CLS_U32=m | ||
528 | # CONFIG_CLS_U32_PERF is not set | ||
529 | # CONFIG_CLS_U32_MARK is not set | ||
530 | CONFIG_NET_CLS_RSVP=m | ||
531 | CONFIG_NET_CLS_RSVP6=m | ||
532 | # CONFIG_NET_CLS_FLOW is not set | ||
533 | # CONFIG_NET_EMATCH is not set | ||
534 | # CONFIG_NET_CLS_ACT is not set | ||
535 | # CONFIG_NET_CLS_IND is not set | ||
536 | CONFIG_NET_SCH_FIFO=y | ||
537 | # CONFIG_DCB is not set | ||
538 | |||
539 | # | ||
540 | # Network testing | ||
541 | # | ||
542 | CONFIG_NET_PKTGEN=m | ||
543 | # CONFIG_HAMRADIO is not set | ||
544 | # CONFIG_CAN is not set | ||
545 | # CONFIG_IRDA is not set | ||
546 | # CONFIG_BT is not set | ||
547 | # CONFIG_AF_RXRPC is not set | ||
548 | # CONFIG_PHONET is not set | ||
549 | CONFIG_FIB_RULES=y | ||
550 | CONFIG_WIRELESS=y | ||
551 | # CONFIG_CFG80211 is not set | ||
552 | CONFIG_WIRELESS_OLD_REGULATORY=y | ||
553 | # CONFIG_WIRELESS_EXT is not set | ||
554 | # CONFIG_LIB80211 is not set | ||
555 | # CONFIG_MAC80211 is not set | ||
556 | # CONFIG_WIMAX is not set | ||
557 | # CONFIG_RFKILL is not set | ||
558 | # CONFIG_NET_9P is not set | ||
559 | |||
560 | # | ||
561 | # Device Drivers | ||
562 | # | ||
563 | |||
564 | # | ||
565 | # Generic Driver Options | ||
566 | # | ||
567 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
568 | CONFIG_STANDALONE=y | ||
569 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
570 | # CONFIG_FW_LOADER is not set | ||
571 | # CONFIG_DEBUG_DRIVER is not set | ||
572 | # CONFIG_DEBUG_DEVRES is not set | ||
573 | # CONFIG_SYS_HYPERVISOR is not set | ||
574 | # CONFIG_CONNECTOR is not set | ||
575 | CONFIG_MTD=y | ||
576 | # CONFIG_MTD_DEBUG is not set | ||
577 | CONFIG_MTD_CONCAT=y | ||
578 | CONFIG_MTD_PARTITIONS=y | ||
579 | # CONFIG_MTD_TESTS is not set | ||
580 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
581 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
582 | CONFIG_MTD_OF_PARTS=y | ||
583 | # CONFIG_MTD_AR7_PARTS is not set | ||
584 | |||
585 | # | ||
586 | # User Modules And Translation Layers | ||
587 | # | ||
588 | CONFIG_MTD_CHAR=y | ||
589 | CONFIG_MTD_BLKDEVS=y | ||
590 | CONFIG_MTD_BLOCK=y | ||
591 | # CONFIG_FTL is not set | ||
592 | # CONFIG_NFTL is not set | ||
593 | # CONFIG_INFTL is not set | ||
594 | # CONFIG_RFD_FTL is not set | ||
595 | # CONFIG_SSFDC is not set | ||
596 | # CONFIG_MTD_OOPS is not set | ||
597 | |||
598 | # | ||
599 | # RAM/ROM/Flash chip drivers | ||
600 | # | ||
601 | CONFIG_MTD_CFI=y | ||
602 | CONFIG_MTD_JEDECPROBE=y | ||
603 | CONFIG_MTD_GEN_PROBE=y | ||
604 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
605 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
606 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
607 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
608 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
609 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
610 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
611 | CONFIG_MTD_CFI_I1=y | ||
612 | CONFIG_MTD_CFI_I2=y | ||
613 | # CONFIG_MTD_CFI_I4 is not set | ||
614 | # CONFIG_MTD_CFI_I8 is not set | ||
615 | CONFIG_MTD_CFI_INTELEXT=y | ||
616 | CONFIG_MTD_CFI_AMDSTD=y | ||
617 | # CONFIG_MTD_CFI_STAA is not set | ||
618 | CONFIG_MTD_CFI_UTIL=y | ||
619 | # CONFIG_MTD_RAM is not set | ||
620 | # CONFIG_MTD_ROM is not set | ||
621 | # CONFIG_MTD_ABSENT is not set | ||
622 | |||
623 | # | ||
624 | # Mapping drivers for chip access | ||
625 | # | ||
626 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
627 | # CONFIG_MTD_PHYSMAP is not set | ||
628 | CONFIG_MTD_PHYSMAP_OF=y | ||
629 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
630 | # CONFIG_MTD_PLATRAM is not set | ||
631 | |||
632 | # | ||
633 | # Self-contained MTD device drivers | ||
634 | # | ||
635 | # CONFIG_MTD_PMC551 is not set | ||
636 | # CONFIG_MTD_SLRAM is not set | ||
637 | # CONFIG_MTD_PHRAM is not set | ||
638 | # CONFIG_MTD_MTDRAM is not set | ||
639 | # CONFIG_MTD_BLOCK2MTD is not set | ||
640 | |||
641 | # | ||
642 | # Disk-On-Chip Device Drivers | ||
643 | # | ||
644 | # CONFIG_MTD_DOC2000 is not set | ||
645 | # CONFIG_MTD_DOC2001 is not set | ||
646 | # CONFIG_MTD_DOC2001PLUS is not set | ||
647 | # CONFIG_MTD_NAND is not set | ||
648 | # CONFIG_MTD_ONENAND is not set | ||
649 | |||
650 | # | ||
651 | # LPDDR flash memory drivers | ||
652 | # | ||
653 | # CONFIG_MTD_LPDDR is not set | ||
654 | |||
655 | # | ||
656 | # UBI - Unsorted block images | ||
657 | # | ||
658 | # CONFIG_MTD_UBI is not set | ||
659 | CONFIG_OF_DEVICE=y | ||
660 | CONFIG_OF_GPIO=y | ||
661 | CONFIG_OF_I2C=y | ||
662 | # CONFIG_PARPORT is not set | ||
663 | CONFIG_BLK_DEV=y | ||
664 | # CONFIG_BLK_DEV_FD is not set | ||
665 | # CONFIG_BLK_CPQ_DA is not set | ||
666 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
667 | # CONFIG_BLK_DEV_DAC960 is not set | ||
668 | # CONFIG_BLK_DEV_UMEM is not set | ||
669 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
670 | CONFIG_BLK_DEV_LOOP=m | ||
671 | CONFIG_BLK_DEV_CRYPTOLOOP=m | ||
672 | CONFIG_BLK_DEV_NBD=m | ||
673 | # CONFIG_BLK_DEV_SX8 is not set | ||
674 | # CONFIG_BLK_DEV_UB is not set | ||
675 | CONFIG_BLK_DEV_RAM=y | ||
676 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
677 | CONFIG_BLK_DEV_RAM_SIZE=131072 | ||
678 | # CONFIG_BLK_DEV_XIP is not set | ||
679 | # CONFIG_CDROM_PKTCDVD is not set | ||
680 | # CONFIG_ATA_OVER_ETH is not set | ||
681 | # CONFIG_BLK_DEV_HD is not set | ||
682 | CONFIG_MISC_DEVICES=y | ||
683 | # CONFIG_PHANTOM is not set | ||
684 | # CONFIG_SGI_IOC4 is not set | ||
685 | # CONFIG_TIFM_CORE is not set | ||
686 | # CONFIG_ICS932S401 is not set | ||
687 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
688 | # CONFIG_HP_ILO is not set | ||
689 | # CONFIG_C2PORT is not set | ||
690 | |||
691 | # | ||
692 | # EEPROM support | ||
693 | # | ||
694 | # CONFIG_EEPROM_AT24 is not set | ||
695 | # CONFIG_EEPROM_LEGACY is not set | ||
696 | # CONFIG_EEPROM_93CX6 is not set | ||
697 | CONFIG_HAVE_IDE=y | ||
698 | # CONFIG_IDE is not set | ||
699 | |||
700 | # | ||
701 | # SCSI device support | ||
702 | # | ||
703 | # CONFIG_RAID_ATTRS is not set | ||
704 | CONFIG_SCSI=y | ||
705 | CONFIG_SCSI_DMA=y | ||
706 | # CONFIG_SCSI_TGT is not set | ||
707 | # CONFIG_SCSI_NETLINK is not set | ||
708 | CONFIG_SCSI_PROC_FS=y | ||
709 | |||
710 | # | ||
711 | # SCSI support type (disk, tape, CD-ROM) | ||
712 | # | ||
713 | CONFIG_BLK_DEV_SD=y | ||
714 | CONFIG_CHR_DEV_ST=y | ||
715 | # CONFIG_CHR_DEV_OSST is not set | ||
716 | CONFIG_BLK_DEV_SR=y | ||
717 | # CONFIG_BLK_DEV_SR_VENDOR is not set | ||
718 | # CONFIG_CHR_DEV_SG is not set | ||
719 | # CONFIG_CHR_DEV_SCH is not set | ||
720 | |||
721 | # | ||
722 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
723 | # | ||
724 | # CONFIG_SCSI_MULTI_LUN is not set | ||
725 | # CONFIG_SCSI_CONSTANTS is not set | ||
726 | # CONFIG_SCSI_LOGGING is not set | ||
727 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
728 | CONFIG_SCSI_WAIT_SCAN=m | ||
729 | |||
730 | # | ||
731 | # SCSI Transports | ||
732 | # | ||
733 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
734 | # CONFIG_SCSI_FC_ATTRS is not set | ||
735 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
736 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
737 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
738 | CONFIG_SCSI_LOWLEVEL=y | ||
739 | # CONFIG_ISCSI_TCP is not set | ||
740 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
741 | # CONFIG_SCSI_3W_9XXX is not set | ||
742 | # CONFIG_SCSI_ACARD is not set | ||
743 | # CONFIG_SCSI_AACRAID is not set | ||
744 | # CONFIG_SCSI_AIC7XXX is not set | ||
745 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
746 | # CONFIG_SCSI_AIC79XX is not set | ||
747 | # CONFIG_SCSI_AIC94XX is not set | ||
748 | # CONFIG_SCSI_DPT_I2O is not set | ||
749 | # CONFIG_SCSI_ADVANSYS is not set | ||
750 | # CONFIG_SCSI_ARCMSR is not set | ||
751 | # CONFIG_MEGARAID_NEWGEN is not set | ||
752 | # CONFIG_MEGARAID_LEGACY is not set | ||
753 | # CONFIG_MEGARAID_SAS is not set | ||
754 | # CONFIG_SCSI_HPTIOP is not set | ||
755 | # CONFIG_SCSI_BUSLOGIC is not set | ||
756 | # CONFIG_LIBFC is not set | ||
757 | # CONFIG_FCOE is not set | ||
758 | # CONFIG_SCSI_DMX3191D is not set | ||
759 | # CONFIG_SCSI_EATA is not set | ||
760 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
761 | # CONFIG_SCSI_GDTH is not set | ||
762 | # CONFIG_SCSI_IPS is not set | ||
763 | # CONFIG_SCSI_INITIO is not set | ||
764 | # CONFIG_SCSI_INIA100 is not set | ||
765 | # CONFIG_SCSI_MVSAS is not set | ||
766 | # CONFIG_SCSI_STEX is not set | ||
767 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
768 | # CONFIG_SCSI_IPR is not set | ||
769 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
770 | # CONFIG_SCSI_QLA_FC is not set | ||
771 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
772 | # CONFIG_SCSI_LPFC is not set | ||
773 | # CONFIG_SCSI_DC395x is not set | ||
774 | # CONFIG_SCSI_DC390T is not set | ||
775 | # CONFIG_SCSI_NSP32 is not set | ||
776 | # CONFIG_SCSI_DEBUG is not set | ||
777 | # CONFIG_SCSI_SRP is not set | ||
778 | # CONFIG_SCSI_DH is not set | ||
779 | CONFIG_ATA=y | ||
780 | # CONFIG_ATA_NONSTANDARD is not set | ||
781 | CONFIG_SATA_PMP=y | ||
782 | # CONFIG_SATA_AHCI is not set | ||
783 | # CONFIG_SATA_SIL24 is not set | ||
784 | # CONFIG_SATA_FSL is not set | ||
785 | CONFIG_ATA_SFF=y | ||
786 | # CONFIG_SATA_SVW is not set | ||
787 | # CONFIG_ATA_PIIX is not set | ||
788 | # CONFIG_SATA_MV is not set | ||
789 | # CONFIG_SATA_NV is not set | ||
790 | # CONFIG_PDC_ADMA is not set | ||
791 | # CONFIG_SATA_QSTOR is not set | ||
792 | # CONFIG_SATA_PROMISE is not set | ||
793 | # CONFIG_SATA_SX4 is not set | ||
794 | CONFIG_SATA_SIL=y | ||
795 | # CONFIG_SATA_SIS is not set | ||
796 | # CONFIG_SATA_ULI is not set | ||
797 | # CONFIG_SATA_VIA is not set | ||
798 | # CONFIG_SATA_VITESSE is not set | ||
799 | # CONFIG_SATA_INIC162X is not set | ||
800 | # CONFIG_PATA_ALI is not set | ||
801 | # CONFIG_PATA_AMD is not set | ||
802 | # CONFIG_PATA_ARTOP is not set | ||
803 | # CONFIG_PATA_ATIIXP is not set | ||
804 | # CONFIG_PATA_CMD640_PCI is not set | ||
805 | # CONFIG_PATA_CMD64X is not set | ||
806 | # CONFIG_PATA_CS5520 is not set | ||
807 | # CONFIG_PATA_CS5530 is not set | ||
808 | # CONFIG_PATA_CYPRESS is not set | ||
809 | # CONFIG_PATA_EFAR is not set | ||
810 | # CONFIG_ATA_GENERIC is not set | ||
811 | # CONFIG_PATA_HPT366 is not set | ||
812 | # CONFIG_PATA_HPT37X is not set | ||
813 | # CONFIG_PATA_HPT3X2N is not set | ||
814 | # CONFIG_PATA_HPT3X3 is not set | ||
815 | # CONFIG_PATA_IT821X is not set | ||
816 | # CONFIG_PATA_IT8213 is not set | ||
817 | # CONFIG_PATA_JMICRON is not set | ||
818 | # CONFIG_PATA_TRIFLEX is not set | ||
819 | # CONFIG_PATA_MARVELL is not set | ||
820 | # CONFIG_PATA_MPIIX is not set | ||
821 | # CONFIG_PATA_OLDPIIX is not set | ||
822 | # CONFIG_PATA_NETCELL is not set | ||
823 | # CONFIG_PATA_NINJA32 is not set | ||
824 | # CONFIG_PATA_NS87410 is not set | ||
825 | # CONFIG_PATA_NS87415 is not set | ||
826 | # CONFIG_PATA_OPTI is not set | ||
827 | # CONFIG_PATA_OPTIDMA is not set | ||
828 | # CONFIG_PATA_PDC_OLD is not set | ||
829 | # CONFIG_PATA_RADISYS is not set | ||
830 | # CONFIG_PATA_RZ1000 is not set | ||
831 | # CONFIG_PATA_SC1200 is not set | ||
832 | # CONFIG_PATA_SERVERWORKS is not set | ||
833 | # CONFIG_PATA_PDC2027X is not set | ||
834 | # CONFIG_PATA_SIL680 is not set | ||
835 | # CONFIG_PATA_SIS is not set | ||
836 | # CONFIG_PATA_VIA is not set | ||
837 | # CONFIG_PATA_WINBOND is not set | ||
838 | # CONFIG_PATA_PLATFORM is not set | ||
839 | # CONFIG_PATA_SCH is not set | ||
840 | # CONFIG_MD is not set | ||
841 | # CONFIG_FUSION is not set | ||
842 | |||
843 | # | ||
844 | # IEEE 1394 (FireWire) support | ||
845 | # | ||
846 | |||
847 | # | ||
848 | # Enable only one of the two stacks, unless you know what you are doing | ||
849 | # | ||
850 | # CONFIG_FIREWIRE is not set | ||
851 | # CONFIG_IEEE1394 is not set | ||
852 | # CONFIG_I2O is not set | ||
853 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
854 | CONFIG_NETDEVICES=y | ||
855 | CONFIG_DUMMY=m | ||
856 | CONFIG_BONDING=m | ||
857 | # CONFIG_MACVLAN is not set | ||
858 | # CONFIG_EQUALIZER is not set | ||
859 | CONFIG_TUN=m | ||
860 | # CONFIG_VETH is not set | ||
861 | # CONFIG_ARCNET is not set | ||
862 | CONFIG_PHYLIB=y | ||
863 | |||
864 | # | ||
865 | # MII PHY device drivers | ||
866 | # | ||
867 | # CONFIG_MARVELL_PHY is not set | ||
868 | # CONFIG_DAVICOM_PHY is not set | ||
869 | # CONFIG_QSEMI_PHY is not set | ||
870 | # CONFIG_LXT_PHY is not set | ||
871 | # CONFIG_CICADA_PHY is not set | ||
872 | # CONFIG_VITESSE_PHY is not set | ||
873 | # CONFIG_SMSC_PHY is not set | ||
874 | # CONFIG_BROADCOM_PHY is not set | ||
875 | # CONFIG_ICPLUS_PHY is not set | ||
876 | # CONFIG_REALTEK_PHY is not set | ||
877 | # CONFIG_NATIONAL_PHY is not set | ||
878 | # CONFIG_STE10XP is not set | ||
879 | # CONFIG_LSI_ET1011C_PHY is not set | ||
880 | # CONFIG_FIXED_PHY is not set | ||
881 | # CONFIG_MDIO_BITBANG is not set | ||
882 | CONFIG_NET_ETHERNET=y | ||
883 | CONFIG_MII=y | ||
884 | # CONFIG_HAPPYMEAL is not set | ||
885 | # CONFIG_SUNGEM is not set | ||
886 | # CONFIG_CASSINI is not set | ||
887 | # CONFIG_NET_VENDOR_3COM is not set | ||
888 | # CONFIG_NET_TULIP is not set | ||
889 | # CONFIG_HP100 is not set | ||
890 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
891 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
892 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
893 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
894 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
895 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
896 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
897 | # CONFIG_NET_PCI is not set | ||
898 | # CONFIG_B44 is not set | ||
899 | # CONFIG_ATL2 is not set | ||
900 | CONFIG_NETDEV_1000=y | ||
901 | # CONFIG_ACENIC is not set | ||
902 | # CONFIG_DL2K is not set | ||
903 | # CONFIG_E1000 is not set | ||
904 | # CONFIG_E1000E is not set | ||
905 | # CONFIG_IP1000 is not set | ||
906 | # CONFIG_IGB is not set | ||
907 | # CONFIG_NS83820 is not set | ||
908 | # CONFIG_HAMACHI is not set | ||
909 | # CONFIG_YELLOWFIN is not set | ||
910 | # CONFIG_R8169 is not set | ||
911 | # CONFIG_SIS190 is not set | ||
912 | # CONFIG_SKGE is not set | ||
913 | # CONFIG_SKY2 is not set | ||
914 | # CONFIG_VIA_VELOCITY is not set | ||
915 | # CONFIG_TIGON3 is not set | ||
916 | # CONFIG_BNX2 is not set | ||
917 | CONFIG_GIANFAR=y | ||
918 | # CONFIG_MV643XX_ETH is not set | ||
919 | # CONFIG_QLA3XXX is not set | ||
920 | # CONFIG_ATL1 is not set | ||
921 | # CONFIG_ATL1E is not set | ||
922 | # CONFIG_ATL1C is not set | ||
923 | # CONFIG_JME is not set | ||
924 | # CONFIG_NETDEV_10000 is not set | ||
925 | # CONFIG_TR is not set | ||
926 | |||
927 | # | ||
928 | # Wireless LAN | ||
929 | # | ||
930 | # CONFIG_WLAN_PRE80211 is not set | ||
931 | # CONFIG_WLAN_80211 is not set | ||
932 | # CONFIG_IWLWIFI_LEDS is not set | ||
933 | |||
934 | # | ||
935 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
936 | # | ||
937 | |||
938 | # | ||
939 | # USB Network Adapters | ||
940 | # | ||
941 | # CONFIG_USB_CATC is not set | ||
942 | # CONFIG_USB_KAWETH is not set | ||
943 | # CONFIG_USB_PEGASUS is not set | ||
944 | # CONFIG_USB_RTL8150 is not set | ||
945 | # CONFIG_USB_USBNET is not set | ||
946 | # CONFIG_WAN is not set | ||
947 | CONFIG_ATM_DRIVERS=y | ||
948 | # CONFIG_ATM_DUMMY is not set | ||
949 | # CONFIG_ATM_TCP is not set | ||
950 | # CONFIG_ATM_LANAI is not set | ||
951 | # CONFIG_ATM_ENI is not set | ||
952 | # CONFIG_ATM_FIRESTREAM is not set | ||
953 | # CONFIG_ATM_ZATM is not set | ||
954 | # CONFIG_ATM_NICSTAR is not set | ||
955 | # CONFIG_ATM_IDT77252 is not set | ||
956 | # CONFIG_ATM_AMBASSADOR is not set | ||
957 | # CONFIG_ATM_HORIZON is not set | ||
958 | # CONFIG_ATM_IA is not set | ||
959 | # CONFIG_ATM_FORE200E is not set | ||
960 | # CONFIG_ATM_HE is not set | ||
961 | # CONFIG_ATM_SOLOS is not set | ||
962 | # CONFIG_FDDI is not set | ||
963 | # CONFIG_HIPPI is not set | ||
964 | CONFIG_PPP=m | ||
965 | CONFIG_PPP_MULTILINK=y | ||
966 | CONFIG_PPP_FILTER=y | ||
967 | CONFIG_PPP_ASYNC=m | ||
968 | CONFIG_PPP_SYNC_TTY=m | ||
969 | CONFIG_PPP_DEFLATE=m | ||
970 | CONFIG_PPP_BSDCOMP=m | ||
971 | # CONFIG_PPP_MPPE is not set | ||
972 | CONFIG_PPPOE=m | ||
973 | CONFIG_PPPOATM=m | ||
974 | # CONFIG_PPPOL2TP is not set | ||
975 | CONFIG_SLIP=m | ||
976 | CONFIG_SLIP_COMPRESSED=y | ||
977 | CONFIG_SLHC=m | ||
978 | CONFIG_SLIP_SMART=y | ||
979 | CONFIG_SLIP_MODE_SLIP6=y | ||
980 | # CONFIG_NET_FC is not set | ||
981 | CONFIG_NETCONSOLE=y | ||
982 | # CONFIG_NETCONSOLE_DYNAMIC is not set | ||
983 | CONFIG_NETPOLL=y | ||
984 | CONFIG_NETPOLL_TRAP=y | ||
985 | CONFIG_NET_POLL_CONTROLLER=y | ||
986 | # CONFIG_ISDN is not set | ||
987 | # CONFIG_PHONE is not set | ||
988 | |||
989 | # | ||
990 | # Input device support | ||
991 | # | ||
992 | CONFIG_INPUT=y | ||
993 | CONFIG_INPUT_FF_MEMLESS=m | ||
994 | # CONFIG_INPUT_POLLDEV is not set | ||
995 | |||
996 | # | ||
997 | # Userland interfaces | ||
998 | # | ||
999 | CONFIG_INPUT_MOUSEDEV=y | ||
1000 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
1001 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
1002 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
1003 | # CONFIG_INPUT_JOYDEV is not set | ||
1004 | # CONFIG_INPUT_EVDEV is not set | ||
1005 | # CONFIG_INPUT_EVBUG is not set | ||
1006 | |||
1007 | # | ||
1008 | # Input Device Drivers | ||
1009 | # | ||
1010 | # CONFIG_INPUT_KEYBOARD is not set | ||
1011 | # CONFIG_INPUT_MOUSE is not set | ||
1012 | # CONFIG_INPUT_JOYSTICK is not set | ||
1013 | # CONFIG_INPUT_TABLET is not set | ||
1014 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
1015 | # CONFIG_INPUT_MISC is not set | ||
1016 | |||
1017 | # | ||
1018 | # Hardware I/O ports | ||
1019 | # | ||
1020 | # CONFIG_SERIO is not set | ||
1021 | # CONFIG_GAMEPORT is not set | ||
1022 | |||
1023 | # | ||
1024 | # Character devices | ||
1025 | # | ||
1026 | CONFIG_VT=y | ||
1027 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
1028 | CONFIG_VT_CONSOLE=y | ||
1029 | CONFIG_HW_CONSOLE=y | ||
1030 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
1031 | CONFIG_DEVKMEM=y | ||
1032 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
1033 | # CONFIG_NOZOMI is not set | ||
1034 | |||
1035 | # | ||
1036 | # Serial drivers | ||
1037 | # | ||
1038 | CONFIG_SERIAL_8250=y | ||
1039 | CONFIG_SERIAL_8250_CONSOLE=y | ||
1040 | # CONFIG_SERIAL_8250_PCI is not set | ||
1041 | CONFIG_SERIAL_8250_NR_UARTS=2 | ||
1042 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | ||
1043 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
1044 | |||
1045 | # | ||
1046 | # Non-8250 serial port support | ||
1047 | # | ||
1048 | # CONFIG_SERIAL_UARTLITE is not set | ||
1049 | CONFIG_SERIAL_CORE=y | ||
1050 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
1051 | # CONFIG_SERIAL_JSM is not set | ||
1052 | # CONFIG_SERIAL_OF_PLATFORM is not set | ||
1053 | CONFIG_UNIX98_PTYS=y | ||
1054 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
1055 | # CONFIG_LEGACY_PTYS is not set | ||
1056 | # CONFIG_HVC_UDBG is not set | ||
1057 | # CONFIG_IPMI_HANDLER is not set | ||
1058 | CONFIG_HW_RANDOM=y | ||
1059 | CONFIG_NVRAM=y | ||
1060 | # CONFIG_R3964 is not set | ||
1061 | # CONFIG_APPLICOM is not set | ||
1062 | # CONFIG_RAW_DRIVER is not set | ||
1063 | # CONFIG_TCG_TPM is not set | ||
1064 | CONFIG_DEVPORT=y | ||
1065 | CONFIG_I2C=y | ||
1066 | CONFIG_I2C_BOARDINFO=y | ||
1067 | CONFIG_I2C_CHARDEV=y | ||
1068 | CONFIG_I2C_HELPER_AUTO=y | ||
1069 | |||
1070 | # | ||
1071 | # I2C Hardware Bus support | ||
1072 | # | ||
1073 | |||
1074 | # | ||
1075 | # PC SMBus host controller drivers | ||
1076 | # | ||
1077 | # CONFIG_I2C_ALI1535 is not set | ||
1078 | # CONFIG_I2C_ALI1563 is not set | ||
1079 | # CONFIG_I2C_ALI15X3 is not set | ||
1080 | # CONFIG_I2C_AMD756 is not set | ||
1081 | # CONFIG_I2C_AMD8111 is not set | ||
1082 | # CONFIG_I2C_I801 is not set | ||
1083 | # CONFIG_I2C_ISCH is not set | ||
1084 | # CONFIG_I2C_PIIX4 is not set | ||
1085 | # CONFIG_I2C_NFORCE2 is not set | ||
1086 | # CONFIG_I2C_SIS5595 is not set | ||
1087 | # CONFIG_I2C_SIS630 is not set | ||
1088 | # CONFIG_I2C_SIS96X is not set | ||
1089 | # CONFIG_I2C_VIA is not set | ||
1090 | # CONFIG_I2C_VIAPRO is not set | ||
1091 | |||
1092 | # | ||
1093 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
1094 | # | ||
1095 | # CONFIG_I2C_GPIO is not set | ||
1096 | CONFIG_I2C_MPC=y | ||
1097 | # CONFIG_I2C_OCORES is not set | ||
1098 | # CONFIG_I2C_SIMTEC is not set | ||
1099 | |||
1100 | # | ||
1101 | # External I2C/SMBus adapter drivers | ||
1102 | # | ||
1103 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
1104 | # CONFIG_I2C_TAOS_EVM is not set | ||
1105 | # CONFIG_I2C_TINY_USB is not set | ||
1106 | |||
1107 | # | ||
1108 | # Graphics adapter I2C/DDC channel drivers | ||
1109 | # | ||
1110 | # CONFIG_I2C_VOODOO3 is not set | ||
1111 | |||
1112 | # | ||
1113 | # Other I2C/SMBus bus drivers | ||
1114 | # | ||
1115 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
1116 | # CONFIG_I2C_STUB is not set | ||
1117 | |||
1118 | # | ||
1119 | # Miscellaneous I2C Chip support | ||
1120 | # | ||
1121 | CONFIG_DS1682=y | ||
1122 | # CONFIG_SENSORS_PCF8574 is not set | ||
1123 | # CONFIG_PCF8575 is not set | ||
1124 | # CONFIG_SENSORS_PCA9539 is not set | ||
1125 | # CONFIG_SENSORS_PCF8591 is not set | ||
1126 | # CONFIG_SENSORS_MAX6875 is not set | ||
1127 | # CONFIG_SENSORS_TSL2550 is not set | ||
1128 | # CONFIG_I2C_DEBUG_CORE is not set | ||
1129 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
1130 | # CONFIG_I2C_DEBUG_BUS is not set | ||
1131 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
1132 | # CONFIG_SPI is not set | ||
1133 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
1134 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
1135 | CONFIG_GPIOLIB=y | ||
1136 | # CONFIG_DEBUG_GPIO is not set | ||
1137 | # CONFIG_GPIO_SYSFS is not set | ||
1138 | |||
1139 | # | ||
1140 | # Memory mapped GPIO expanders: | ||
1141 | # | ||
1142 | # CONFIG_GPIO_XILINX is not set | ||
1143 | |||
1144 | # | ||
1145 | # I2C GPIO expanders: | ||
1146 | # | ||
1147 | # CONFIG_GPIO_MAX732X is not set | ||
1148 | # CONFIG_GPIO_PCA953X is not set | ||
1149 | # CONFIG_GPIO_PCF857X is not set | ||
1150 | |||
1151 | # | ||
1152 | # PCI GPIO expanders: | ||
1153 | # | ||
1154 | # CONFIG_GPIO_BT8XX is not set | ||
1155 | |||
1156 | # | ||
1157 | # SPI GPIO expanders: | ||
1158 | # | ||
1159 | # CONFIG_W1 is not set | ||
1160 | # CONFIG_POWER_SUPPLY is not set | ||
1161 | CONFIG_HWMON=y | ||
1162 | # CONFIG_HWMON_VID is not set | ||
1163 | # CONFIG_SENSORS_AD7414 is not set | ||
1164 | # CONFIG_SENSORS_AD7418 is not set | ||
1165 | # CONFIG_SENSORS_ADM1021 is not set | ||
1166 | # CONFIG_SENSORS_ADM1025 is not set | ||
1167 | # CONFIG_SENSORS_ADM1026 is not set | ||
1168 | # CONFIG_SENSORS_ADM1029 is not set | ||
1169 | # CONFIG_SENSORS_ADM1031 is not set | ||
1170 | # CONFIG_SENSORS_ADM9240 is not set | ||
1171 | # CONFIG_SENSORS_ADT7462 is not set | ||
1172 | # CONFIG_SENSORS_ADT7470 is not set | ||
1173 | # CONFIG_SENSORS_ADT7473 is not set | ||
1174 | # CONFIG_SENSORS_ADT7475 is not set | ||
1175 | # CONFIG_SENSORS_ATXP1 is not set | ||
1176 | # CONFIG_SENSORS_DS1621 is not set | ||
1177 | # CONFIG_SENSORS_I5K_AMB is not set | ||
1178 | # CONFIG_SENSORS_F71805F is not set | ||
1179 | # CONFIG_SENSORS_F71882FG is not set | ||
1180 | # CONFIG_SENSORS_F75375S is not set | ||
1181 | # CONFIG_SENSORS_GL518SM is not set | ||
1182 | # CONFIG_SENSORS_GL520SM is not set | ||
1183 | # CONFIG_SENSORS_IT87 is not set | ||
1184 | # CONFIG_SENSORS_LM63 is not set | ||
1185 | # CONFIG_SENSORS_LM75 is not set | ||
1186 | # CONFIG_SENSORS_LM77 is not set | ||
1187 | # CONFIG_SENSORS_LM78 is not set | ||
1188 | # CONFIG_SENSORS_LM80 is not set | ||
1189 | # CONFIG_SENSORS_LM83 is not set | ||
1190 | # CONFIG_SENSORS_LM85 is not set | ||
1191 | # CONFIG_SENSORS_LM87 is not set | ||
1192 | CONFIG_SENSORS_LM90=y | ||
1193 | CONFIG_SENSORS_LM92=y | ||
1194 | # CONFIG_SENSORS_LM93 is not set | ||
1195 | # CONFIG_SENSORS_LTC4245 is not set | ||
1196 | # CONFIG_SENSORS_MAX1619 is not set | ||
1197 | # CONFIG_SENSORS_MAX6650 is not set | ||
1198 | # CONFIG_SENSORS_PC87360 is not set | ||
1199 | # CONFIG_SENSORS_PC87427 is not set | ||
1200 | # CONFIG_SENSORS_SIS5595 is not set | ||
1201 | # CONFIG_SENSORS_DME1737 is not set | ||
1202 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
1203 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
1204 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
1205 | # CONFIG_SENSORS_ADS7828 is not set | ||
1206 | # CONFIG_SENSORS_THMC50 is not set | ||
1207 | # CONFIG_SENSORS_VIA686A is not set | ||
1208 | # CONFIG_SENSORS_VT1211 is not set | ||
1209 | # CONFIG_SENSORS_VT8231 is not set | ||
1210 | # CONFIG_SENSORS_W83781D is not set | ||
1211 | # CONFIG_SENSORS_W83791D is not set | ||
1212 | # CONFIG_SENSORS_W83792D is not set | ||
1213 | # CONFIG_SENSORS_W83793 is not set | ||
1214 | # CONFIG_SENSORS_W83L785TS is not set | ||
1215 | # CONFIG_SENSORS_W83L786NG is not set | ||
1216 | # CONFIG_SENSORS_W83627HF is not set | ||
1217 | # CONFIG_SENSORS_W83627EHF is not set | ||
1218 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
1219 | # CONFIG_THERMAL is not set | ||
1220 | # CONFIG_THERMAL_HWMON is not set | ||
1221 | CONFIG_WATCHDOG=y | ||
1222 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
1223 | |||
1224 | # | ||
1225 | # Watchdog Device Drivers | ||
1226 | # | ||
1227 | # CONFIG_SOFT_WATCHDOG is not set | ||
1228 | # CONFIG_ALIM7101_WDT is not set | ||
1229 | CONFIG_GEF_WDT=y | ||
1230 | # CONFIG_8xxx_WDT is not set | ||
1231 | |||
1232 | # | ||
1233 | # PCI-based Watchdog Cards | ||
1234 | # | ||
1235 | # CONFIG_PCIPCWATCHDOG is not set | ||
1236 | # CONFIG_WDTPCI is not set | ||
1237 | |||
1238 | # | ||
1239 | # USB-based Watchdog Cards | ||
1240 | # | ||
1241 | # CONFIG_USBPCWATCHDOG is not set | ||
1242 | CONFIG_SSB_POSSIBLE=y | ||
1243 | |||
1244 | # | ||
1245 | # Sonics Silicon Backplane | ||
1246 | # | ||
1247 | # CONFIG_SSB is not set | ||
1248 | |||
1249 | # | ||
1250 | # Multifunction device drivers | ||
1251 | # | ||
1252 | # CONFIG_MFD_CORE is not set | ||
1253 | # CONFIG_MFD_SM501 is not set | ||
1254 | # CONFIG_HTC_PASIC3 is not set | ||
1255 | # CONFIG_TPS65010 is not set | ||
1256 | # CONFIG_TWL4030_CORE is not set | ||
1257 | # CONFIG_MFD_TMIO is not set | ||
1258 | # CONFIG_PMIC_DA903X is not set | ||
1259 | # CONFIG_MFD_WM8400 is not set | ||
1260 | # CONFIG_MFD_WM8350_I2C is not set | ||
1261 | # CONFIG_MFD_PCF50633 is not set | ||
1262 | # CONFIG_REGULATOR is not set | ||
1263 | |||
1264 | # | ||
1265 | # Multimedia devices | ||
1266 | # | ||
1267 | |||
1268 | # | ||
1269 | # Multimedia core support | ||
1270 | # | ||
1271 | # CONFIG_VIDEO_DEV is not set | ||
1272 | # CONFIG_DVB_CORE is not set | ||
1273 | # CONFIG_VIDEO_MEDIA is not set | ||
1274 | |||
1275 | # | ||
1276 | # Multimedia drivers | ||
1277 | # | ||
1278 | CONFIG_DAB=y | ||
1279 | # CONFIG_USB_DABUSB is not set | ||
1280 | |||
1281 | # | ||
1282 | # Graphics support | ||
1283 | # | ||
1284 | # CONFIG_AGP is not set | ||
1285 | # CONFIG_DRM is not set | ||
1286 | # CONFIG_VGASTATE is not set | ||
1287 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
1288 | # CONFIG_FB is not set | ||
1289 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
1290 | |||
1291 | # | ||
1292 | # Display device support | ||
1293 | # | ||
1294 | # CONFIG_DISPLAY_SUPPORT is not set | ||
1295 | |||
1296 | # | ||
1297 | # Console display driver support | ||
1298 | # | ||
1299 | CONFIG_VGA_CONSOLE=y | ||
1300 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set | ||
1301 | CONFIG_DUMMY_CONSOLE=y | ||
1302 | # CONFIG_SOUND is not set | ||
1303 | CONFIG_HID_SUPPORT=y | ||
1304 | CONFIG_HID=y | ||
1305 | # CONFIG_HID_DEBUG is not set | ||
1306 | # CONFIG_HIDRAW is not set | ||
1307 | |||
1308 | # | ||
1309 | # USB Input Devices | ||
1310 | # | ||
1311 | CONFIG_USB_HID=y | ||
1312 | # CONFIG_HID_PID is not set | ||
1313 | # CONFIG_USB_HIDDEV is not set | ||
1314 | |||
1315 | # | ||
1316 | # Special HID drivers | ||
1317 | # | ||
1318 | CONFIG_HID_COMPAT=y | ||
1319 | CONFIG_HID_A4TECH=y | ||
1320 | CONFIG_HID_APPLE=y | ||
1321 | CONFIG_HID_BELKIN=y | ||
1322 | CONFIG_HID_CHERRY=y | ||
1323 | CONFIG_HID_CHICONY=y | ||
1324 | CONFIG_HID_CYPRESS=y | ||
1325 | CONFIG_HID_EZKEY=y | ||
1326 | CONFIG_HID_GYRATION=y | ||
1327 | CONFIG_HID_LOGITECH=y | ||
1328 | # CONFIG_LOGITECH_FF is not set | ||
1329 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
1330 | CONFIG_HID_MICROSOFT=y | ||
1331 | CONFIG_HID_MONTEREY=y | ||
1332 | # CONFIG_HID_NTRIG is not set | ||
1333 | CONFIG_HID_PANTHERLORD=y | ||
1334 | # CONFIG_PANTHERLORD_FF is not set | ||
1335 | CONFIG_HID_PETALYNX=y | ||
1336 | CONFIG_HID_SAMSUNG=y | ||
1337 | CONFIG_HID_SONY=y | ||
1338 | CONFIG_HID_SUNPLUS=y | ||
1339 | # CONFIG_GREENASIA_FF is not set | ||
1340 | # CONFIG_HID_TOPSEED is not set | ||
1341 | CONFIG_THRUSTMASTER_FF=m | ||
1342 | CONFIG_ZEROPLUS_FF=m | ||
1343 | CONFIG_USB_SUPPORT=y | ||
1344 | CONFIG_USB_ARCH_HAS_HCD=y | ||
1345 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
1346 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
1347 | CONFIG_USB=y | ||
1348 | # CONFIG_USB_DEBUG is not set | ||
1349 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
1350 | |||
1351 | # | ||
1352 | # Miscellaneous USB options | ||
1353 | # | ||
1354 | # CONFIG_USB_DEVICEFS is not set | ||
1355 | # CONFIG_USB_DEVICE_CLASS is not set | ||
1356 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
1357 | # CONFIG_USB_OTG is not set | ||
1358 | # CONFIG_USB_OTG_WHITELIST is not set | ||
1359 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1360 | # CONFIG_USB_MON is not set | ||
1361 | # CONFIG_USB_WUSB is not set | ||
1362 | # CONFIG_USB_WUSB_CBAF is not set | ||
1363 | |||
1364 | # | ||
1365 | # USB Host Controller Drivers | ||
1366 | # | ||
1367 | # CONFIG_USB_C67X00_HCD is not set | ||
1368 | CONFIG_USB_EHCI_HCD=y | ||
1369 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
1370 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1371 | # CONFIG_USB_EHCI_FSL is not set | ||
1372 | # CONFIG_USB_EHCI_HCD_PPC_OF is not set | ||
1373 | # CONFIG_USB_OXU210HP_HCD is not set | ||
1374 | # CONFIG_USB_ISP116X_HCD is not set | ||
1375 | # CONFIG_USB_ISP1760_HCD is not set | ||
1376 | CONFIG_USB_OHCI_HCD=y | ||
1377 | # CONFIG_USB_OHCI_HCD_PPC_OF is not set | ||
1378 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
1379 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
1380 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
1381 | # CONFIG_USB_UHCI_HCD is not set | ||
1382 | # CONFIG_USB_SL811_HCD is not set | ||
1383 | # CONFIG_USB_R8A66597_HCD is not set | ||
1384 | # CONFIG_USB_WHCI_HCD is not set | ||
1385 | # CONFIG_USB_HWA_HCD is not set | ||
1386 | |||
1387 | # | ||
1388 | # USB Device Class drivers | ||
1389 | # | ||
1390 | # CONFIG_USB_ACM is not set | ||
1391 | # CONFIG_USB_PRINTER is not set | ||
1392 | # CONFIG_USB_WDM is not set | ||
1393 | # CONFIG_USB_TMC is not set | ||
1394 | |||
1395 | # | ||
1396 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | ||
1397 | # | ||
1398 | |||
1399 | # | ||
1400 | # see USB_STORAGE Help for more information | ||
1401 | # | ||
1402 | CONFIG_USB_STORAGE=y | ||
1403 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1404 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
1405 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
1406 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1407 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1408 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
1409 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
1410 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1411 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1412 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1413 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1414 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1415 | # CONFIG_USB_LIBUSUAL is not set | ||
1416 | |||
1417 | # | ||
1418 | # USB Imaging devices | ||
1419 | # | ||
1420 | # CONFIG_USB_MDC800 is not set | ||
1421 | # CONFIG_USB_MICROTEK is not set | ||
1422 | |||
1423 | # | ||
1424 | # USB port drivers | ||
1425 | # | ||
1426 | # CONFIG_USB_SERIAL is not set | ||
1427 | |||
1428 | # | ||
1429 | # USB Miscellaneous drivers | ||
1430 | # | ||
1431 | # CONFIG_USB_EMI62 is not set | ||
1432 | # CONFIG_USB_EMI26 is not set | ||
1433 | # CONFIG_USB_ADUTUX is not set | ||
1434 | # CONFIG_USB_SEVSEG is not set | ||
1435 | # CONFIG_USB_RIO500 is not set | ||
1436 | # CONFIG_USB_LEGOTOWER is not set | ||
1437 | # CONFIG_USB_LCD is not set | ||
1438 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1439 | # CONFIG_USB_LED is not set | ||
1440 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1441 | # CONFIG_USB_CYTHERM is not set | ||
1442 | # CONFIG_USB_PHIDGET is not set | ||
1443 | # CONFIG_USB_IDMOUSE is not set | ||
1444 | # CONFIG_USB_FTDI_ELAN is not set | ||
1445 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1446 | # CONFIG_USB_SISUSBVGA is not set | ||
1447 | # CONFIG_USB_LD is not set | ||
1448 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1449 | # CONFIG_USB_IOWARRIOR is not set | ||
1450 | # CONFIG_USB_ISIGHTFW is not set | ||
1451 | # CONFIG_USB_VST is not set | ||
1452 | # CONFIG_USB_ATM is not set | ||
1453 | # CONFIG_USB_GADGET is not set | ||
1454 | |||
1455 | # | ||
1456 | # OTG and related infrastructure | ||
1457 | # | ||
1458 | # CONFIG_USB_GPIO_VBUS is not set | ||
1459 | # CONFIG_UWB is not set | ||
1460 | # CONFIG_MMC is not set | ||
1461 | # CONFIG_MEMSTICK is not set | ||
1462 | # CONFIG_NEW_LEDS is not set | ||
1463 | # CONFIG_ACCESSIBILITY is not set | ||
1464 | # CONFIG_INFINIBAND is not set | ||
1465 | # CONFIG_EDAC is not set | ||
1466 | CONFIG_RTC_LIB=y | ||
1467 | CONFIG_RTC_CLASS=y | ||
1468 | CONFIG_RTC_HCTOSYS=y | ||
1469 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1470 | # CONFIG_RTC_DEBUG is not set | ||
1471 | |||
1472 | # | ||
1473 | # RTC interfaces | ||
1474 | # | ||
1475 | CONFIG_RTC_INTF_SYSFS=y | ||
1476 | # CONFIG_RTC_INTF_PROC is not set | ||
1477 | CONFIG_RTC_INTF_DEV=y | ||
1478 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1479 | # CONFIG_RTC_DRV_TEST is not set | ||
1480 | |||
1481 | # | ||
1482 | # I2C RTC drivers | ||
1483 | # | ||
1484 | # CONFIG_RTC_DRV_DS1307 is not set | ||
1485 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1486 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1487 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1488 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1489 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1490 | # CONFIG_RTC_DRV_X1205 is not set | ||
1491 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1492 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1493 | # CONFIG_RTC_DRV_M41T80 is not set | ||
1494 | # CONFIG_RTC_DRV_S35390A is not set | ||
1495 | # CONFIG_RTC_DRV_FM3130 is not set | ||
1496 | CONFIG_RTC_DRV_RX8581=y | ||
1497 | |||
1498 | # | ||
1499 | # SPI RTC drivers | ||
1500 | # | ||
1501 | |||
1502 | # | ||
1503 | # Platform RTC drivers | ||
1504 | # | ||
1505 | # CONFIG_RTC_DRV_CMOS is not set | ||
1506 | # CONFIG_RTC_DRV_DS1286 is not set | ||
1507 | # CONFIG_RTC_DRV_DS1511 is not set | ||
1508 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1509 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1510 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1511 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1512 | # CONFIG_RTC_DRV_M48T35 is not set | ||
1513 | # CONFIG_RTC_DRV_M48T59 is not set | ||
1514 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
1515 | # CONFIG_RTC_DRV_V3020 is not set | ||
1516 | |||
1517 | # | ||
1518 | # on-CPU RTC drivers | ||
1519 | # | ||
1520 | # CONFIG_RTC_DRV_PPC is not set | ||
1521 | # CONFIG_DMADEVICES is not set | ||
1522 | # CONFIG_UIO is not set | ||
1523 | # CONFIG_STAGING is not set | ||
1524 | |||
1525 | # | ||
1526 | # File systems | ||
1527 | # | ||
1528 | CONFIG_EXT2_FS=y | ||
1529 | CONFIG_EXT2_FS_XATTR=y | ||
1530 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
1531 | # CONFIG_EXT2_FS_SECURITY is not set | ||
1532 | # CONFIG_EXT2_FS_XIP is not set | ||
1533 | CONFIG_EXT3_FS=y | ||
1534 | CONFIG_EXT3_FS_XATTR=y | ||
1535 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
1536 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1537 | # CONFIG_EXT4_FS is not set | ||
1538 | CONFIG_JBD=y | ||
1539 | CONFIG_FS_MBCACHE=y | ||
1540 | # CONFIG_REISERFS_FS is not set | ||
1541 | # CONFIG_JFS_FS is not set | ||
1542 | CONFIG_FS_POSIX_ACL=y | ||
1543 | CONFIG_FILE_LOCKING=y | ||
1544 | # CONFIG_XFS_FS is not set | ||
1545 | # CONFIG_OCFS2_FS is not set | ||
1546 | # CONFIG_BTRFS_FS is not set | ||
1547 | CONFIG_DNOTIFY=y | ||
1548 | CONFIG_INOTIFY=y | ||
1549 | CONFIG_INOTIFY_USER=y | ||
1550 | # CONFIG_QUOTA is not set | ||
1551 | # CONFIG_AUTOFS_FS is not set | ||
1552 | # CONFIG_AUTOFS4_FS is not set | ||
1553 | # CONFIG_FUSE_FS is not set | ||
1554 | |||
1555 | # | ||
1556 | # CD-ROM/DVD Filesystems | ||
1557 | # | ||
1558 | # CONFIG_ISO9660_FS is not set | ||
1559 | # CONFIG_UDF_FS is not set | ||
1560 | |||
1561 | # | ||
1562 | # DOS/FAT/NT Filesystems | ||
1563 | # | ||
1564 | CONFIG_FAT_FS=y | ||
1565 | CONFIG_MSDOS_FS=y | ||
1566 | CONFIG_VFAT_FS=y | ||
1567 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1568 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1569 | # CONFIG_NTFS_FS is not set | ||
1570 | |||
1571 | # | ||
1572 | # Pseudo filesystems | ||
1573 | # | ||
1574 | CONFIG_PROC_FS=y | ||
1575 | CONFIG_PROC_KCORE=y | ||
1576 | CONFIG_PROC_SYSCTL=y | ||
1577 | CONFIG_PROC_PAGE_MONITOR=y | ||
1578 | CONFIG_SYSFS=y | ||
1579 | CONFIG_TMPFS=y | ||
1580 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1581 | # CONFIG_HUGETLB_PAGE is not set | ||
1582 | # CONFIG_CONFIGFS_FS is not set | ||
1583 | CONFIG_MISC_FILESYSTEMS=y | ||
1584 | # CONFIG_ADFS_FS is not set | ||
1585 | # CONFIG_AFFS_FS is not set | ||
1586 | # CONFIG_HFS_FS is not set | ||
1587 | # CONFIG_HFSPLUS_FS is not set | ||
1588 | # CONFIG_BEFS_FS is not set | ||
1589 | # CONFIG_BFS_FS is not set | ||
1590 | # CONFIG_EFS_FS is not set | ||
1591 | CONFIG_JFFS2_FS=y | ||
1592 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1593 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1594 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1595 | # CONFIG_JFFS2_SUMMARY is not set | ||
1596 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1597 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1598 | CONFIG_JFFS2_ZLIB=y | ||
1599 | # CONFIG_JFFS2_LZO is not set | ||
1600 | CONFIG_JFFS2_RTIME=y | ||
1601 | # CONFIG_JFFS2_RUBIN is not set | ||
1602 | # CONFIG_CRAMFS is not set | ||
1603 | # CONFIG_SQUASHFS is not set | ||
1604 | # CONFIG_VXFS_FS is not set | ||
1605 | # CONFIG_MINIX_FS is not set | ||
1606 | # CONFIG_OMFS_FS is not set | ||
1607 | # CONFIG_HPFS_FS is not set | ||
1608 | # CONFIG_QNX4FS_FS is not set | ||
1609 | # CONFIG_ROMFS_FS is not set | ||
1610 | # CONFIG_SYSV_FS is not set | ||
1611 | # CONFIG_UFS_FS is not set | ||
1612 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1613 | CONFIG_NFS_FS=y | ||
1614 | CONFIG_NFS_V3=y | ||
1615 | # CONFIG_NFS_V3_ACL is not set | ||
1616 | CONFIG_NFS_V4=y | ||
1617 | CONFIG_ROOT_NFS=y | ||
1618 | # CONFIG_NFSD is not set | ||
1619 | CONFIG_LOCKD=y | ||
1620 | CONFIG_LOCKD_V4=y | ||
1621 | CONFIG_NFS_COMMON=y | ||
1622 | CONFIG_SUNRPC=y | ||
1623 | CONFIG_SUNRPC_GSS=y | ||
1624 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
1625 | CONFIG_RPCSEC_GSS_KRB5=y | ||
1626 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1627 | # CONFIG_SMB_FS is not set | ||
1628 | CONFIG_CIFS=m | ||
1629 | # CONFIG_CIFS_STATS is not set | ||
1630 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1631 | CONFIG_CIFS_XATTR=y | ||
1632 | CONFIG_CIFS_POSIX=y | ||
1633 | # CONFIG_CIFS_DEBUG2 is not set | ||
1634 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
1635 | # CONFIG_NCP_FS is not set | ||
1636 | # CONFIG_CODA_FS is not set | ||
1637 | # CONFIG_AFS_FS is not set | ||
1638 | |||
1639 | # | ||
1640 | # Partition Types | ||
1641 | # | ||
1642 | # CONFIG_PARTITION_ADVANCED is not set | ||
1643 | CONFIG_MSDOS_PARTITION=y | ||
1644 | CONFIG_NLS=y | ||
1645 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1646 | CONFIG_NLS_CODEPAGE_437=m | ||
1647 | CONFIG_NLS_CODEPAGE_737=m | ||
1648 | CONFIG_NLS_CODEPAGE_775=m | ||
1649 | CONFIG_NLS_CODEPAGE_850=m | ||
1650 | CONFIG_NLS_CODEPAGE_852=m | ||
1651 | CONFIG_NLS_CODEPAGE_855=m | ||
1652 | CONFIG_NLS_CODEPAGE_857=m | ||
1653 | CONFIG_NLS_CODEPAGE_860=m | ||
1654 | CONFIG_NLS_CODEPAGE_861=m | ||
1655 | CONFIG_NLS_CODEPAGE_862=m | ||
1656 | CONFIG_NLS_CODEPAGE_863=m | ||
1657 | CONFIG_NLS_CODEPAGE_864=m | ||
1658 | CONFIG_NLS_CODEPAGE_865=m | ||
1659 | CONFIG_NLS_CODEPAGE_866=m | ||
1660 | CONFIG_NLS_CODEPAGE_869=m | ||
1661 | CONFIG_NLS_CODEPAGE_936=m | ||
1662 | CONFIG_NLS_CODEPAGE_950=m | ||
1663 | CONFIG_NLS_CODEPAGE_932=m | ||
1664 | CONFIG_NLS_CODEPAGE_949=m | ||
1665 | CONFIG_NLS_CODEPAGE_874=m | ||
1666 | CONFIG_NLS_ISO8859_8=m | ||
1667 | CONFIG_NLS_CODEPAGE_1250=m | ||
1668 | CONFIG_NLS_CODEPAGE_1251=m | ||
1669 | CONFIG_NLS_ASCII=m | ||
1670 | CONFIG_NLS_ISO8859_1=m | ||
1671 | CONFIG_NLS_ISO8859_2=m | ||
1672 | CONFIG_NLS_ISO8859_3=m | ||
1673 | CONFIG_NLS_ISO8859_4=m | ||
1674 | CONFIG_NLS_ISO8859_5=m | ||
1675 | CONFIG_NLS_ISO8859_6=m | ||
1676 | CONFIG_NLS_ISO8859_7=m | ||
1677 | CONFIG_NLS_ISO8859_9=m | ||
1678 | CONFIG_NLS_ISO8859_13=m | ||
1679 | CONFIG_NLS_ISO8859_14=m | ||
1680 | CONFIG_NLS_ISO8859_15=m | ||
1681 | CONFIG_NLS_KOI8_R=m | ||
1682 | CONFIG_NLS_KOI8_U=m | ||
1683 | CONFIG_NLS_UTF8=m | ||
1684 | # CONFIG_DLM is not set | ||
1685 | |||
1686 | # | ||
1687 | # Library routines | ||
1688 | # | ||
1689 | CONFIG_BITREVERSE=y | ||
1690 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
1691 | CONFIG_CRC_CCITT=m | ||
1692 | # CONFIG_CRC16 is not set | ||
1693 | # CONFIG_CRC_T10DIF is not set | ||
1694 | # CONFIG_CRC_ITU_T is not set | ||
1695 | CONFIG_CRC32=y | ||
1696 | # CONFIG_CRC7 is not set | ||
1697 | CONFIG_LIBCRC32C=m | ||
1698 | CONFIG_ZLIB_INFLATE=y | ||
1699 | CONFIG_ZLIB_DEFLATE=y | ||
1700 | CONFIG_PLIST=y | ||
1701 | CONFIG_HAS_IOMEM=y | ||
1702 | CONFIG_HAS_IOPORT=y | ||
1703 | CONFIG_HAS_DMA=y | ||
1704 | CONFIG_HAVE_LMB=y | ||
1705 | |||
1706 | # | ||
1707 | # Kernel hacking | ||
1708 | # | ||
1709 | # CONFIG_PRINTK_TIME is not set | ||
1710 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1711 | CONFIG_ENABLE_MUST_CHECK=y | ||
1712 | CONFIG_FRAME_WARN=1024 | ||
1713 | CONFIG_MAGIC_SYSRQ=y | ||
1714 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1715 | # CONFIG_DEBUG_FS is not set | ||
1716 | # CONFIG_HEADERS_CHECK is not set | ||
1717 | CONFIG_DEBUG_KERNEL=y | ||
1718 | # CONFIG_DEBUG_SHIRQ is not set | ||
1719 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1720 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
1721 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
1722 | CONFIG_SCHED_DEBUG=y | ||
1723 | # CONFIG_SCHEDSTATS is not set | ||
1724 | # CONFIG_TIMER_STATS is not set | ||
1725 | # CONFIG_DEBUG_OBJECTS is not set | ||
1726 | # CONFIG_DEBUG_SLAB is not set | ||
1727 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1728 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1729 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1730 | # CONFIG_DEBUG_MUTEXES is not set | ||
1731 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1732 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1733 | # CONFIG_DEBUG_KOBJECT is not set | ||
1734 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1735 | CONFIG_DEBUG_INFO=y | ||
1736 | # CONFIG_DEBUG_VM is not set | ||
1737 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
1738 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
1739 | # CONFIG_DEBUG_LIST is not set | ||
1740 | # CONFIG_DEBUG_SG is not set | ||
1741 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
1742 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1743 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1744 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1745 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
1746 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
1747 | # CONFIG_FAULT_INJECTION is not set | ||
1748 | # CONFIG_LATENCYTOP is not set | ||
1749 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
1750 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
1751 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
1752 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
1753 | |||
1754 | # | ||
1755 | # Tracers | ||
1756 | # | ||
1757 | # CONFIG_FUNCTION_TRACER is not set | ||
1758 | # CONFIG_PREEMPT_TRACER is not set | ||
1759 | # CONFIG_SCHED_TRACER is not set | ||
1760 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
1761 | # CONFIG_BOOT_TRACER is not set | ||
1762 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
1763 | # CONFIG_STACK_TRACER is not set | ||
1764 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
1765 | # CONFIG_SAMPLES is not set | ||
1766 | CONFIG_HAVE_ARCH_KGDB=y | ||
1767 | # CONFIG_KGDB is not set | ||
1768 | CONFIG_PRINT_STACK_DEPTH=64 | ||
1769 | # CONFIG_DEBUG_STACKOVERFLOW is not set | ||
1770 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
1771 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
1772 | # CONFIG_CODE_PATCHING_SELFTEST is not set | ||
1773 | # CONFIG_FTR_FIXUP_SELFTEST is not set | ||
1774 | # CONFIG_MSI_BITMAP_SELFTEST is not set | ||
1775 | # CONFIG_XMON is not set | ||
1776 | # CONFIG_IRQSTACKS is not set | ||
1777 | # CONFIG_BDI_SWITCH is not set | ||
1778 | # CONFIG_BOOTX_TEXT is not set | ||
1779 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1780 | |||
1781 | # | ||
1782 | # Security options | ||
1783 | # | ||
1784 | # CONFIG_KEYS is not set | ||
1785 | CONFIG_SECURITY=y | ||
1786 | # CONFIG_SECURITYFS is not set | ||
1787 | CONFIG_SECURITY_NETWORK=y | ||
1788 | # CONFIG_SECURITY_NETWORK_XFRM is not set | ||
1789 | # CONFIG_SECURITY_PATH is not set | ||
1790 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1791 | # CONFIG_SECURITY_ROOTPLUG is not set | ||
1792 | CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 | ||
1793 | CONFIG_CRYPTO=y | ||
1794 | |||
1795 | # | ||
1796 | # Crypto core or helper | ||
1797 | # | ||
1798 | # CONFIG_CRYPTO_FIPS is not set | ||
1799 | CONFIG_CRYPTO_ALGAPI=y | ||
1800 | CONFIG_CRYPTO_ALGAPI2=y | ||
1801 | CONFIG_CRYPTO_AEAD=m | ||
1802 | CONFIG_CRYPTO_AEAD2=y | ||
1803 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1804 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
1805 | CONFIG_CRYPTO_HASH=y | ||
1806 | CONFIG_CRYPTO_HASH2=y | ||
1807 | CONFIG_CRYPTO_RNG2=y | ||
1808 | CONFIG_CRYPTO_MANAGER=y | ||
1809 | CONFIG_CRYPTO_MANAGER2=y | ||
1810 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1811 | CONFIG_CRYPTO_NULL=m | ||
1812 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1813 | CONFIG_CRYPTO_AUTHENC=m | ||
1814 | CONFIG_CRYPTO_TEST=m | ||
1815 | |||
1816 | # | ||
1817 | # Authenticated Encryption with Associated Data | ||
1818 | # | ||
1819 | # CONFIG_CRYPTO_CCM is not set | ||
1820 | # CONFIG_CRYPTO_GCM is not set | ||
1821 | # CONFIG_CRYPTO_SEQIV is not set | ||
1822 | |||
1823 | # | ||
1824 | # Block modes | ||
1825 | # | ||
1826 | CONFIG_CRYPTO_CBC=y | ||
1827 | # CONFIG_CRYPTO_CTR is not set | ||
1828 | # CONFIG_CRYPTO_CTS is not set | ||
1829 | CONFIG_CRYPTO_ECB=m | ||
1830 | # CONFIG_CRYPTO_LRW is not set | ||
1831 | CONFIG_CRYPTO_PCBC=m | ||
1832 | # CONFIG_CRYPTO_XTS is not set | ||
1833 | |||
1834 | # | ||
1835 | # Hash modes | ||
1836 | # | ||
1837 | CONFIG_CRYPTO_HMAC=y | ||
1838 | # CONFIG_CRYPTO_XCBC is not set | ||
1839 | |||
1840 | # | ||
1841 | # Digest | ||
1842 | # | ||
1843 | CONFIG_CRYPTO_CRC32C=m | ||
1844 | CONFIG_CRYPTO_MD4=m | ||
1845 | CONFIG_CRYPTO_MD5=y | ||
1846 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
1847 | # CONFIG_CRYPTO_RMD128 is not set | ||
1848 | # CONFIG_CRYPTO_RMD160 is not set | ||
1849 | # CONFIG_CRYPTO_RMD256 is not set | ||
1850 | # CONFIG_CRYPTO_RMD320 is not set | ||
1851 | CONFIG_CRYPTO_SHA1=m | ||
1852 | CONFIG_CRYPTO_SHA256=m | ||
1853 | CONFIG_CRYPTO_SHA512=m | ||
1854 | # CONFIG_CRYPTO_TGR192 is not set | ||
1855 | CONFIG_CRYPTO_WP512=m | ||
1856 | |||
1857 | # | ||
1858 | # Ciphers | ||
1859 | # | ||
1860 | CONFIG_CRYPTO_AES=m | ||
1861 | CONFIG_CRYPTO_ANUBIS=m | ||
1862 | CONFIG_CRYPTO_ARC4=m | ||
1863 | CONFIG_CRYPTO_BLOWFISH=m | ||
1864 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1865 | CONFIG_CRYPTO_CAST5=m | ||
1866 | CONFIG_CRYPTO_CAST6=m | ||
1867 | CONFIG_CRYPTO_DES=y | ||
1868 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1869 | CONFIG_CRYPTO_KHAZAD=m | ||
1870 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1871 | # CONFIG_CRYPTO_SEED is not set | ||
1872 | CONFIG_CRYPTO_SERPENT=m | ||
1873 | CONFIG_CRYPTO_TEA=m | ||
1874 | CONFIG_CRYPTO_TWOFISH=m | ||
1875 | CONFIG_CRYPTO_TWOFISH_COMMON=m | ||
1876 | |||
1877 | # | ||
1878 | # Compression | ||
1879 | # | ||
1880 | CONFIG_CRYPTO_DEFLATE=m | ||
1881 | # CONFIG_CRYPTO_LZO is not set | ||
1882 | |||
1883 | # | ||
1884 | # Random Number Generation | ||
1885 | # | ||
1886 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1887 | # CONFIG_CRYPTO_HW is not set | ||
1888 | # CONFIG_PPC_CLOCK is not set | ||
1889 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig b/arch/powerpc/configs/86xx/gef_sbc310_defconfig new file mode 100644 index 000000000000..bd236b3d915a --- /dev/null +++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig | |||
@@ -0,0 +1,1613 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.29-rc3 | ||
4 | # Wed Jan 28 23:05:34 2009 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | CONFIG_6xx=y | ||
12 | # CONFIG_PPC_85xx is not set | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_PPC_FPU=y | ||
18 | # CONFIG_PHYS_64BIT is not set | ||
19 | CONFIG_ALTIVEC=y | ||
20 | CONFIG_PPC_STD_MMU=y | ||
21 | CONFIG_PPC_STD_MMU_32=y | ||
22 | # CONFIG_PPC_MM_SLICES is not set | ||
23 | CONFIG_SMP=y | ||
24 | CONFIG_NR_CPUS=2 | ||
25 | CONFIG_PPC32=y | ||
26 | CONFIG_WORD_SIZE=32 | ||
27 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | ||
28 | CONFIG_MMU=y | ||
29 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
30 | CONFIG_GENERIC_TIME=y | ||
31 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
32 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
33 | CONFIG_GENERIC_HARDIRQS=y | ||
34 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
35 | CONFIG_IRQ_PER_CPU=y | ||
36 | CONFIG_STACKTRACE_SUPPORT=y | ||
37 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
38 | CONFIG_LOCKDEP_SUPPORT=y | ||
39 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
40 | CONFIG_GENERIC_LOCKBREAK=y | ||
41 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
42 | CONFIG_GENERIC_HWEIGHT=y | ||
43 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
44 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
45 | CONFIG_GENERIC_GPIO=y | ||
46 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
47 | CONFIG_PPC=y | ||
48 | CONFIG_EARLY_PRINTK=y | ||
49 | CONFIG_GENERIC_NVRAM=y | ||
50 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
51 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
52 | CONFIG_PPC_OF=y | ||
53 | CONFIG_OF=y | ||
54 | CONFIG_PPC_UDBG_16550=y | ||
55 | CONFIG_GENERIC_TBSYNC=y | ||
56 | CONFIG_AUDIT_ARCH=y | ||
57 | CONFIG_GENERIC_BUG=y | ||
58 | CONFIG_DEFAULT_UIMAGE=y | ||
59 | # CONFIG_PPC_DCR_NATIVE is not set | ||
60 | # CONFIG_PPC_DCR_MMIO is not set | ||
61 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
62 | |||
63 | # | ||
64 | # General setup | ||
65 | # | ||
66 | CONFIG_EXPERIMENTAL=y | ||
67 | CONFIG_LOCK_KERNEL=y | ||
68 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
69 | CONFIG_LOCALVERSION="" | ||
70 | CONFIG_LOCALVERSION_AUTO=y | ||
71 | CONFIG_SWAP=y | ||
72 | CONFIG_SYSVIPC=y | ||
73 | CONFIG_SYSVIPC_SYSCTL=y | ||
74 | CONFIG_POSIX_MQUEUE=y | ||
75 | CONFIG_BSD_PROCESS_ACCT=y | ||
76 | CONFIG_BSD_PROCESS_ACCT_V3=y | ||
77 | # CONFIG_TASKSTATS is not set | ||
78 | # CONFIG_AUDIT is not set | ||
79 | |||
80 | # | ||
81 | # RCU Subsystem | ||
82 | # | ||
83 | CONFIG_CLASSIC_RCU=y | ||
84 | # CONFIG_TREE_RCU is not set | ||
85 | # CONFIG_PREEMPT_RCU is not set | ||
86 | # CONFIG_TREE_RCU_TRACE is not set | ||
87 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
88 | CONFIG_IKCONFIG=y | ||
89 | CONFIG_IKCONFIG_PROC=y | ||
90 | CONFIG_LOG_BUF_SHIFT=14 | ||
91 | # CONFIG_GROUP_SCHED is not set | ||
92 | # CONFIG_CGROUPS is not set | ||
93 | CONFIG_SYSFS_DEPRECATED=y | ||
94 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
95 | CONFIG_RELAY=y | ||
96 | # CONFIG_NAMESPACES is not set | ||
97 | CONFIG_BLK_DEV_INITRD=y | ||
98 | CONFIG_INITRAMFS_SOURCE="" | ||
99 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
100 | CONFIG_SYSCTL=y | ||
101 | CONFIG_EMBEDDED=y | ||
102 | CONFIG_SYSCTL_SYSCALL=y | ||
103 | CONFIG_KALLSYMS=y | ||
104 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
105 | CONFIG_HOTPLUG=y | ||
106 | CONFIG_PRINTK=y | ||
107 | CONFIG_BUG=y | ||
108 | CONFIG_ELF_CORE=y | ||
109 | CONFIG_COMPAT_BRK=y | ||
110 | CONFIG_BASE_FULL=y | ||
111 | CONFIG_FUTEX=y | ||
112 | CONFIG_ANON_INODES=y | ||
113 | CONFIG_EPOLL=y | ||
114 | CONFIG_SIGNALFD=y | ||
115 | CONFIG_TIMERFD=y | ||
116 | CONFIG_EVENTFD=y | ||
117 | CONFIG_SHMEM=y | ||
118 | CONFIG_AIO=y | ||
119 | CONFIG_VM_EVENT_COUNTERS=y | ||
120 | CONFIG_PCI_QUIRKS=y | ||
121 | CONFIG_SLAB=y | ||
122 | # CONFIG_SLUB is not set | ||
123 | # CONFIG_SLOB is not set | ||
124 | # CONFIG_PROFILING is not set | ||
125 | CONFIG_HAVE_OPROFILE=y | ||
126 | # CONFIG_KPROBES is not set | ||
127 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | ||
128 | CONFIG_HAVE_IOREMAP_PROT=y | ||
129 | CONFIG_HAVE_KPROBES=y | ||
130 | CONFIG_HAVE_KRETPROBES=y | ||
131 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
132 | CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
133 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
134 | CONFIG_SLABINFO=y | ||
135 | CONFIG_RT_MUTEXES=y | ||
136 | CONFIG_BASE_SMALL=0 | ||
137 | CONFIG_MODULES=y | ||
138 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
139 | CONFIG_MODULE_UNLOAD=y | ||
140 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
141 | # CONFIG_MODVERSIONS is not set | ||
142 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
143 | CONFIG_STOP_MACHINE=y | ||
144 | CONFIG_BLOCK=y | ||
145 | # CONFIG_LBD is not set | ||
146 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
147 | # CONFIG_BLK_DEV_BSG is not set | ||
148 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
149 | |||
150 | # | ||
151 | # IO Schedulers | ||
152 | # | ||
153 | CONFIG_IOSCHED_NOOP=y | ||
154 | CONFIG_IOSCHED_AS=y | ||
155 | CONFIG_IOSCHED_DEADLINE=y | ||
156 | CONFIG_IOSCHED_CFQ=y | ||
157 | # CONFIG_DEFAULT_AS is not set | ||
158 | # CONFIG_DEFAULT_DEADLINE is not set | ||
159 | CONFIG_DEFAULT_CFQ=y | ||
160 | # CONFIG_DEFAULT_NOOP is not set | ||
161 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
162 | # CONFIG_FREEZER is not set | ||
163 | CONFIG_PPC_MSI_BITMAP=y | ||
164 | |||
165 | # | ||
166 | # Platform support | ||
167 | # | ||
168 | CONFIG_PPC_MULTIPLATFORM=y | ||
169 | CONFIG_CLASSIC32=y | ||
170 | # CONFIG_PPC_CHRP is not set | ||
171 | # CONFIG_MPC5121_ADS is not set | ||
172 | # CONFIG_MPC5121_GENERIC is not set | ||
173 | # CONFIG_PPC_MPC52xx is not set | ||
174 | # CONFIG_PPC_PMAC is not set | ||
175 | # CONFIG_PPC_CELL is not set | ||
176 | # CONFIG_PPC_CELL_NATIVE is not set | ||
177 | # CONFIG_PPC_82xx is not set | ||
178 | # CONFIG_PQ2ADS is not set | ||
179 | # CONFIG_PPC_83xx is not set | ||
180 | CONFIG_PPC_86xx=y | ||
181 | # CONFIG_MPC8641_HPCN is not set | ||
182 | # CONFIG_SBC8641D is not set | ||
183 | # CONFIG_MPC8610_HPCD is not set | ||
184 | CONFIG_GEF_SBC310=y | ||
185 | # CONFIG_GEF_SBC610 is not set | ||
186 | CONFIG_MPC8641=y | ||
187 | # CONFIG_IPIC is not set | ||
188 | CONFIG_MPIC=y | ||
189 | # CONFIG_MPIC_WEIRD is not set | ||
190 | # CONFIG_PPC_I8259 is not set | ||
191 | # CONFIG_PPC_RTAS is not set | ||
192 | # CONFIG_MMIO_NVRAM is not set | ||
193 | # CONFIG_PPC_MPC106 is not set | ||
194 | # CONFIG_PPC_970_NAP is not set | ||
195 | # CONFIG_PPC_INDIRECT_IO is not set | ||
196 | # CONFIG_GENERIC_IOMAP is not set | ||
197 | # CONFIG_CPU_FREQ is not set | ||
198 | # CONFIG_TAU is not set | ||
199 | # CONFIG_QUICC_ENGINE is not set | ||
200 | # CONFIG_FSL_ULI1575 is not set | ||
201 | # CONFIG_MPC8xxx_GPIO is not set | ||
202 | # CONFIG_SIMPLE_GPIO is not set | ||
203 | |||
204 | # | ||
205 | # Kernel options | ||
206 | # | ||
207 | # CONFIG_HIGHMEM is not set | ||
208 | CONFIG_TICK_ONESHOT=y | ||
209 | # CONFIG_NO_HZ is not set | ||
210 | CONFIG_HIGH_RES_TIMERS=y | ||
211 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
212 | # CONFIG_HZ_100 is not set | ||
213 | # CONFIG_HZ_250 is not set | ||
214 | # CONFIG_HZ_300 is not set | ||
215 | CONFIG_HZ_1000=y | ||
216 | CONFIG_HZ=1000 | ||
217 | CONFIG_SCHED_HRTICK=y | ||
218 | # CONFIG_PREEMPT_NONE is not set | ||
219 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
220 | CONFIG_PREEMPT=y | ||
221 | CONFIG_BINFMT_ELF=y | ||
222 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
223 | # CONFIG_HAVE_AOUT is not set | ||
224 | CONFIG_BINFMT_MISC=y | ||
225 | # CONFIG_IOMMU_HELPER is not set | ||
226 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
227 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
228 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
229 | # CONFIG_KEXEC is not set | ||
230 | # CONFIG_CRASH_DUMP is not set | ||
231 | CONFIG_IRQ_ALL_CPUS=y | ||
232 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
233 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
234 | CONFIG_SELECT_MEMORY_MODEL=y | ||
235 | CONFIG_FLATMEM_MANUAL=y | ||
236 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
237 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
238 | CONFIG_FLATMEM=y | ||
239 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
240 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
241 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
242 | CONFIG_MIGRATION=y | ||
243 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
244 | CONFIG_ZONE_DMA_FLAG=1 | ||
245 | CONFIG_BOUNCE=y | ||
246 | CONFIG_VIRT_TO_BUS=y | ||
247 | CONFIG_UNEVICTABLE_LRU=y | ||
248 | CONFIG_PPC_4K_PAGES=y | ||
249 | # CONFIG_PPC_16K_PAGES is not set | ||
250 | # CONFIG_PPC_64K_PAGES is not set | ||
251 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
252 | # CONFIG_PROC_DEVICETREE is not set | ||
253 | # CONFIG_CMDLINE_BOOL is not set | ||
254 | CONFIG_EXTRA_TARGETS="" | ||
255 | # CONFIG_PM is not set | ||
256 | CONFIG_SECCOMP=y | ||
257 | CONFIG_ISA_DMA_API=y | ||
258 | |||
259 | # | ||
260 | # Bus options | ||
261 | # | ||
262 | CONFIG_ZONE_DMA=y | ||
263 | CONFIG_GENERIC_ISA_DMA=y | ||
264 | CONFIG_PPC_INDIRECT_PCI=y | ||
265 | CONFIG_FSL_SOC=y | ||
266 | CONFIG_FSL_PCI=y | ||
267 | CONFIG_PPC_PCI_CHOICE=y | ||
268 | CONFIG_PCI=y | ||
269 | CONFIG_PCI_DOMAINS=y | ||
270 | CONFIG_PCI_SYSCALL=y | ||
271 | CONFIG_PCIEPORTBUS=y | ||
272 | CONFIG_PCIEAER=y | ||
273 | # CONFIG_PCIEASPM is not set | ||
274 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
275 | CONFIG_PCI_MSI=y | ||
276 | # CONFIG_PCI_LEGACY is not set | ||
277 | # CONFIG_PCI_STUB is not set | ||
278 | # CONFIG_PCCARD is not set | ||
279 | # CONFIG_HOTPLUG_PCI is not set | ||
280 | # CONFIG_HAS_RAPIDIO is not set | ||
281 | |||
282 | # | ||
283 | # Advanced setup | ||
284 | # | ||
285 | # CONFIG_ADVANCED_OPTIONS is not set | ||
286 | |||
287 | # | ||
288 | # Default settings for advanced configuration options are used | ||
289 | # | ||
290 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
291 | CONFIG_LOWMEM_CAM_NUM=3 | ||
292 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
293 | CONFIG_KERNEL_START=0xc0000000 | ||
294 | CONFIG_PHYSICAL_START=0x00000000 | ||
295 | CONFIG_TASK_SIZE=0xc0000000 | ||
296 | CONFIG_NET=y | ||
297 | |||
298 | # | ||
299 | # Networking options | ||
300 | # | ||
301 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
302 | CONFIG_PACKET=y | ||
303 | CONFIG_PACKET_MMAP=y | ||
304 | CONFIG_UNIX=y | ||
305 | CONFIG_XFRM=y | ||
306 | CONFIG_XFRM_USER=m | ||
307 | # CONFIG_XFRM_SUB_POLICY is not set | ||
308 | # CONFIG_XFRM_MIGRATE is not set | ||
309 | # CONFIG_XFRM_STATISTICS is not set | ||
310 | CONFIG_XFRM_IPCOMP=m | ||
311 | CONFIG_NET_KEY=m | ||
312 | # CONFIG_NET_KEY_MIGRATE is not set | ||
313 | CONFIG_INET=y | ||
314 | CONFIG_IP_MULTICAST=y | ||
315 | CONFIG_IP_ADVANCED_ROUTER=y | ||
316 | CONFIG_ASK_IP_FIB_HASH=y | ||
317 | # CONFIG_IP_FIB_TRIE is not set | ||
318 | CONFIG_IP_FIB_HASH=y | ||
319 | CONFIG_IP_MULTIPLE_TABLES=y | ||
320 | CONFIG_IP_ROUTE_MULTIPATH=y | ||
321 | CONFIG_IP_ROUTE_VERBOSE=y | ||
322 | CONFIG_IP_PNP=y | ||
323 | CONFIG_IP_PNP_DHCP=y | ||
324 | CONFIG_IP_PNP_BOOTP=y | ||
325 | CONFIG_IP_PNP_RARP=y | ||
326 | CONFIG_NET_IPIP=m | ||
327 | CONFIG_NET_IPGRE=m | ||
328 | CONFIG_NET_IPGRE_BROADCAST=y | ||
329 | CONFIG_IP_MROUTE=y | ||
330 | CONFIG_IP_PIMSM_V1=y | ||
331 | CONFIG_IP_PIMSM_V2=y | ||
332 | # CONFIG_ARPD is not set | ||
333 | CONFIG_SYN_COOKIES=y | ||
334 | CONFIG_INET_AH=m | ||
335 | CONFIG_INET_ESP=m | ||
336 | CONFIG_INET_IPCOMP=m | ||
337 | CONFIG_INET_XFRM_TUNNEL=m | ||
338 | CONFIG_INET_TUNNEL=m | ||
339 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
340 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
341 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
342 | CONFIG_INET_LRO=y | ||
343 | CONFIG_INET_DIAG=y | ||
344 | CONFIG_INET_TCP_DIAG=y | ||
345 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
346 | CONFIG_TCP_CONG_CUBIC=y | ||
347 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
348 | # CONFIG_TCP_MD5SIG is not set | ||
349 | CONFIG_IPV6=m | ||
350 | # CONFIG_IPV6_PRIVACY is not set | ||
351 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
352 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
353 | CONFIG_INET6_AH=m | ||
354 | CONFIG_INET6_ESP=m | ||
355 | CONFIG_INET6_IPCOMP=m | ||
356 | # CONFIG_IPV6_MIP6 is not set | ||
357 | CONFIG_INET6_XFRM_TUNNEL=m | ||
358 | CONFIG_INET6_TUNNEL=m | ||
359 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
360 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
361 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
362 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
363 | CONFIG_IPV6_SIT=m | ||
364 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
365 | CONFIG_IPV6_TUNNEL=m | ||
366 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
367 | # CONFIG_IPV6_MROUTE is not set | ||
368 | # CONFIG_NETWORK_SECMARK is not set | ||
369 | # CONFIG_NETFILTER is not set | ||
370 | # CONFIG_IP_DCCP is not set | ||
371 | # CONFIG_IP_SCTP is not set | ||
372 | # CONFIG_TIPC is not set | ||
373 | # CONFIG_ATM is not set | ||
374 | # CONFIG_BRIDGE is not set | ||
375 | # CONFIG_NET_DSA is not set | ||
376 | # CONFIG_VLAN_8021Q is not set | ||
377 | # CONFIG_DECNET is not set | ||
378 | # CONFIG_LLC2 is not set | ||
379 | # CONFIG_IPX is not set | ||
380 | # CONFIG_ATALK is not set | ||
381 | # CONFIG_X25 is not set | ||
382 | # CONFIG_LAPB is not set | ||
383 | # CONFIG_ECONET is not set | ||
384 | # CONFIG_WAN_ROUTER is not set | ||
385 | # CONFIG_NET_SCHED is not set | ||
386 | # CONFIG_DCB is not set | ||
387 | |||
388 | # | ||
389 | # Network testing | ||
390 | # | ||
391 | CONFIG_NET_PKTGEN=m | ||
392 | # CONFIG_HAMRADIO is not set | ||
393 | # CONFIG_CAN is not set | ||
394 | # CONFIG_IRDA is not set | ||
395 | # CONFIG_BT is not set | ||
396 | # CONFIG_AF_RXRPC is not set | ||
397 | # CONFIG_PHONET is not set | ||
398 | CONFIG_FIB_RULES=y | ||
399 | # CONFIG_WIRELESS is not set | ||
400 | # CONFIG_WIMAX is not set | ||
401 | # CONFIG_RFKILL is not set | ||
402 | # CONFIG_NET_9P is not set | ||
403 | |||
404 | # | ||
405 | # Device Drivers | ||
406 | # | ||
407 | |||
408 | # | ||
409 | # Generic Driver Options | ||
410 | # | ||
411 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
412 | CONFIG_STANDALONE=y | ||
413 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
414 | # CONFIG_FW_LOADER is not set | ||
415 | # CONFIG_SYS_HYPERVISOR is not set | ||
416 | # CONFIG_CONNECTOR is not set | ||
417 | CONFIG_MTD=y | ||
418 | # CONFIG_MTD_DEBUG is not set | ||
419 | CONFIG_MTD_CONCAT=y | ||
420 | CONFIG_MTD_PARTITIONS=y | ||
421 | # CONFIG_MTD_TESTS is not set | ||
422 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
423 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
424 | CONFIG_MTD_OF_PARTS=y | ||
425 | # CONFIG_MTD_AR7_PARTS is not set | ||
426 | |||
427 | # | ||
428 | # User Modules And Translation Layers | ||
429 | # | ||
430 | CONFIG_MTD_CHAR=y | ||
431 | CONFIG_MTD_BLKDEVS=y | ||
432 | CONFIG_MTD_BLOCK=y | ||
433 | # CONFIG_FTL is not set | ||
434 | # CONFIG_NFTL is not set | ||
435 | # CONFIG_INFTL is not set | ||
436 | # CONFIG_RFD_FTL is not set | ||
437 | # CONFIG_SSFDC is not set | ||
438 | # CONFIG_MTD_OOPS is not set | ||
439 | |||
440 | # | ||
441 | # RAM/ROM/Flash chip drivers | ||
442 | # | ||
443 | CONFIG_MTD_CFI=y | ||
444 | CONFIG_MTD_JEDECPROBE=y | ||
445 | CONFIG_MTD_GEN_PROBE=y | ||
446 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
447 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
448 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
449 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
450 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
451 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
452 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
453 | CONFIG_MTD_CFI_I1=y | ||
454 | CONFIG_MTD_CFI_I2=y | ||
455 | # CONFIG_MTD_CFI_I4 is not set | ||
456 | # CONFIG_MTD_CFI_I8 is not set | ||
457 | CONFIG_MTD_CFI_INTELEXT=y | ||
458 | CONFIG_MTD_CFI_AMDSTD=y | ||
459 | # CONFIG_MTD_CFI_STAA is not set | ||
460 | CONFIG_MTD_CFI_UTIL=y | ||
461 | # CONFIG_MTD_RAM is not set | ||
462 | # CONFIG_MTD_ROM is not set | ||
463 | # CONFIG_MTD_ABSENT is not set | ||
464 | |||
465 | # | ||
466 | # Mapping drivers for chip access | ||
467 | # | ||
468 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
469 | # CONFIG_MTD_PHYSMAP is not set | ||
470 | CONFIG_MTD_PHYSMAP_OF=y | ||
471 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
472 | # CONFIG_MTD_PLATRAM is not set | ||
473 | |||
474 | # | ||
475 | # Self-contained MTD device drivers | ||
476 | # | ||
477 | # CONFIG_MTD_PMC551 is not set | ||
478 | # CONFIG_MTD_SLRAM is not set | ||
479 | # CONFIG_MTD_PHRAM is not set | ||
480 | # CONFIG_MTD_MTDRAM is not set | ||
481 | # CONFIG_MTD_BLOCK2MTD is not set | ||
482 | |||
483 | # | ||
484 | # Disk-On-Chip Device Drivers | ||
485 | # | ||
486 | # CONFIG_MTD_DOC2000 is not set | ||
487 | # CONFIG_MTD_DOC2001 is not set | ||
488 | # CONFIG_MTD_DOC2001PLUS is not set | ||
489 | # CONFIG_MTD_NAND is not set | ||
490 | # CONFIG_MTD_ONENAND is not set | ||
491 | |||
492 | # | ||
493 | # LPDDR flash memory drivers | ||
494 | # | ||
495 | # CONFIG_MTD_LPDDR is not set | ||
496 | # CONFIG_MTD_QINFO_PROBE is not set | ||
497 | |||
498 | # | ||
499 | # UBI - Unsorted block images | ||
500 | # | ||
501 | # CONFIG_MTD_UBI is not set | ||
502 | CONFIG_OF_DEVICE=y | ||
503 | CONFIG_OF_GPIO=y | ||
504 | CONFIG_OF_I2C=y | ||
505 | # CONFIG_PARPORT is not set | ||
506 | CONFIG_BLK_DEV=y | ||
507 | # CONFIG_BLK_DEV_FD is not set | ||
508 | # CONFIG_BLK_CPQ_DA is not set | ||
509 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
510 | # CONFIG_BLK_DEV_DAC960 is not set | ||
511 | # CONFIG_BLK_DEV_UMEM is not set | ||
512 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
513 | CONFIG_BLK_DEV_LOOP=m | ||
514 | CONFIG_BLK_DEV_CRYPTOLOOP=m | ||
515 | CONFIG_BLK_DEV_NBD=m | ||
516 | # CONFIG_BLK_DEV_SX8 is not set | ||
517 | # CONFIG_BLK_DEV_UB is not set | ||
518 | CONFIG_BLK_DEV_RAM=y | ||
519 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
520 | CONFIG_BLK_DEV_RAM_SIZE=131072 | ||
521 | # CONFIG_BLK_DEV_XIP is not set | ||
522 | # CONFIG_CDROM_PKTCDVD is not set | ||
523 | # CONFIG_ATA_OVER_ETH is not set | ||
524 | # CONFIG_BLK_DEV_HD is not set | ||
525 | CONFIG_MISC_DEVICES=y | ||
526 | # CONFIG_PHANTOM is not set | ||
527 | # CONFIG_SGI_IOC4 is not set | ||
528 | # CONFIG_TIFM_CORE is not set | ||
529 | # CONFIG_ICS932S401 is not set | ||
530 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
531 | # CONFIG_HP_ILO is not set | ||
532 | # CONFIG_C2PORT is not set | ||
533 | |||
534 | # | ||
535 | # EEPROM support | ||
536 | # | ||
537 | # CONFIG_EEPROM_AT24 is not set | ||
538 | # CONFIG_EEPROM_LEGACY is not set | ||
539 | # CONFIG_EEPROM_93CX6 is not set | ||
540 | CONFIG_HAVE_IDE=y | ||
541 | # CONFIG_IDE is not set | ||
542 | |||
543 | # | ||
544 | # SCSI device support | ||
545 | # | ||
546 | # CONFIG_RAID_ATTRS is not set | ||
547 | CONFIG_SCSI=y | ||
548 | CONFIG_SCSI_DMA=y | ||
549 | # CONFIG_SCSI_TGT is not set | ||
550 | # CONFIG_SCSI_NETLINK is not set | ||
551 | CONFIG_SCSI_PROC_FS=y | ||
552 | |||
553 | # | ||
554 | # SCSI support type (disk, tape, CD-ROM) | ||
555 | # | ||
556 | CONFIG_BLK_DEV_SD=y | ||
557 | CONFIG_CHR_DEV_ST=y | ||
558 | # CONFIG_CHR_DEV_OSST is not set | ||
559 | CONFIG_BLK_DEV_SR=y | ||
560 | # CONFIG_BLK_DEV_SR_VENDOR is not set | ||
561 | # CONFIG_CHR_DEV_SG is not set | ||
562 | # CONFIG_CHR_DEV_SCH is not set | ||
563 | |||
564 | # | ||
565 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
566 | # | ||
567 | # CONFIG_SCSI_MULTI_LUN is not set | ||
568 | # CONFIG_SCSI_CONSTANTS is not set | ||
569 | # CONFIG_SCSI_LOGGING is not set | ||
570 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
571 | CONFIG_SCSI_WAIT_SCAN=m | ||
572 | |||
573 | # | ||
574 | # SCSI Transports | ||
575 | # | ||
576 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
577 | # CONFIG_SCSI_FC_ATTRS is not set | ||
578 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
579 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
580 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
581 | CONFIG_SCSI_LOWLEVEL=y | ||
582 | # CONFIG_ISCSI_TCP is not set | ||
583 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
584 | # CONFIG_SCSI_3W_9XXX is not set | ||
585 | # CONFIG_SCSI_ACARD is not set | ||
586 | # CONFIG_SCSI_AACRAID is not set | ||
587 | # CONFIG_SCSI_AIC7XXX is not set | ||
588 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
589 | # CONFIG_SCSI_AIC79XX is not set | ||
590 | # CONFIG_SCSI_AIC94XX is not set | ||
591 | # CONFIG_SCSI_DPT_I2O is not set | ||
592 | # CONFIG_SCSI_ADVANSYS is not set | ||
593 | # CONFIG_SCSI_ARCMSR is not set | ||
594 | # CONFIG_MEGARAID_NEWGEN is not set | ||
595 | # CONFIG_MEGARAID_LEGACY is not set | ||
596 | # CONFIG_MEGARAID_SAS is not set | ||
597 | # CONFIG_SCSI_HPTIOP is not set | ||
598 | # CONFIG_SCSI_BUSLOGIC is not set | ||
599 | # CONFIG_LIBFC is not set | ||
600 | # CONFIG_FCOE is not set | ||
601 | # CONFIG_SCSI_DMX3191D is not set | ||
602 | # CONFIG_SCSI_EATA is not set | ||
603 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
604 | # CONFIG_SCSI_GDTH is not set | ||
605 | # CONFIG_SCSI_IPS is not set | ||
606 | # CONFIG_SCSI_INITIO is not set | ||
607 | # CONFIG_SCSI_INIA100 is not set | ||
608 | # CONFIG_SCSI_MVSAS is not set | ||
609 | # CONFIG_SCSI_STEX is not set | ||
610 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
611 | # CONFIG_SCSI_IPR is not set | ||
612 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
613 | # CONFIG_SCSI_QLA_FC is not set | ||
614 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
615 | # CONFIG_SCSI_LPFC is not set | ||
616 | # CONFIG_SCSI_DC395x is not set | ||
617 | # CONFIG_SCSI_DC390T is not set | ||
618 | # CONFIG_SCSI_NSP32 is not set | ||
619 | # CONFIG_SCSI_DEBUG is not set | ||
620 | # CONFIG_SCSI_SRP is not set | ||
621 | # CONFIG_SCSI_DH is not set | ||
622 | CONFIG_ATA=y | ||
623 | # CONFIG_ATA_NONSTANDARD is not set | ||
624 | CONFIG_SATA_PMP=y | ||
625 | # CONFIG_SATA_AHCI is not set | ||
626 | CONFIG_SATA_SIL24=y | ||
627 | # CONFIG_SATA_FSL is not set | ||
628 | # CONFIG_ATA_SFF is not set | ||
629 | # CONFIG_MD is not set | ||
630 | # CONFIG_FUSION is not set | ||
631 | |||
632 | # | ||
633 | # IEEE 1394 (FireWire) support | ||
634 | # | ||
635 | |||
636 | # | ||
637 | # Enable only one of the two stacks, unless you know what you are doing | ||
638 | # | ||
639 | # CONFIG_FIREWIRE is not set | ||
640 | # CONFIG_IEEE1394 is not set | ||
641 | # CONFIG_I2O is not set | ||
642 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
643 | CONFIG_NETDEVICES=y | ||
644 | CONFIG_DUMMY=m | ||
645 | CONFIG_BONDING=m | ||
646 | # CONFIG_MACVLAN is not set | ||
647 | # CONFIG_EQUALIZER is not set | ||
648 | CONFIG_TUN=m | ||
649 | # CONFIG_VETH is not set | ||
650 | # CONFIG_ARCNET is not set | ||
651 | CONFIG_PHYLIB=y | ||
652 | |||
653 | # | ||
654 | # MII PHY device drivers | ||
655 | # | ||
656 | # CONFIG_MARVELL_PHY is not set | ||
657 | # CONFIG_DAVICOM_PHY is not set | ||
658 | # CONFIG_QSEMI_PHY is not set | ||
659 | # CONFIG_LXT_PHY is not set | ||
660 | # CONFIG_CICADA_PHY is not set | ||
661 | # CONFIG_VITESSE_PHY is not set | ||
662 | # CONFIG_SMSC_PHY is not set | ||
663 | # CONFIG_BROADCOM_PHY is not set | ||
664 | # CONFIG_ICPLUS_PHY is not set | ||
665 | # CONFIG_REALTEK_PHY is not set | ||
666 | # CONFIG_NATIONAL_PHY is not set | ||
667 | # CONFIG_STE10XP is not set | ||
668 | # CONFIG_LSI_ET1011C_PHY is not set | ||
669 | # CONFIG_FIXED_PHY is not set | ||
670 | # CONFIG_MDIO_BITBANG is not set | ||
671 | CONFIG_NET_ETHERNET=y | ||
672 | CONFIG_MII=y | ||
673 | # CONFIG_HAPPYMEAL is not set | ||
674 | # CONFIG_SUNGEM is not set | ||
675 | # CONFIG_CASSINI is not set | ||
676 | # CONFIG_NET_VENDOR_3COM is not set | ||
677 | # CONFIG_NET_TULIP is not set | ||
678 | # CONFIG_HP100 is not set | ||
679 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
680 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
681 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
682 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
683 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
684 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
685 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
686 | # CONFIG_NET_PCI is not set | ||
687 | # CONFIG_B44 is not set | ||
688 | # CONFIG_ATL2 is not set | ||
689 | CONFIG_NETDEV_1000=y | ||
690 | # CONFIG_ACENIC is not set | ||
691 | # CONFIG_DL2K is not set | ||
692 | # CONFIG_E1000 is not set | ||
693 | # CONFIG_E1000E is not set | ||
694 | # CONFIG_IP1000 is not set | ||
695 | # CONFIG_IGB is not set | ||
696 | # CONFIG_NS83820 is not set | ||
697 | # CONFIG_HAMACHI is not set | ||
698 | # CONFIG_YELLOWFIN is not set | ||
699 | # CONFIG_R8169 is not set | ||
700 | # CONFIG_SIS190 is not set | ||
701 | # CONFIG_SKGE is not set | ||
702 | # CONFIG_SKY2 is not set | ||
703 | # CONFIG_VIA_VELOCITY is not set | ||
704 | # CONFIG_TIGON3 is not set | ||
705 | # CONFIG_BNX2 is not set | ||
706 | CONFIG_GIANFAR=y | ||
707 | # CONFIG_MV643XX_ETH is not set | ||
708 | # CONFIG_QLA3XXX is not set | ||
709 | # CONFIG_ATL1 is not set | ||
710 | # CONFIG_ATL1E is not set | ||
711 | # CONFIG_JME is not set | ||
712 | # CONFIG_NETDEV_10000 is not set | ||
713 | # CONFIG_TR is not set | ||
714 | |||
715 | # | ||
716 | # Wireless LAN | ||
717 | # | ||
718 | # CONFIG_WLAN_PRE80211 is not set | ||
719 | # CONFIG_WLAN_80211 is not set | ||
720 | # CONFIG_IWLWIFI_LEDS is not set | ||
721 | |||
722 | # | ||
723 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
724 | # | ||
725 | |||
726 | # | ||
727 | # USB Network Adapters | ||
728 | # | ||
729 | # CONFIG_USB_CATC is not set | ||
730 | # CONFIG_USB_KAWETH is not set | ||
731 | # CONFIG_USB_PEGASUS is not set | ||
732 | # CONFIG_USB_RTL8150 is not set | ||
733 | # CONFIG_USB_USBNET is not set | ||
734 | # CONFIG_WAN is not set | ||
735 | # CONFIG_FDDI is not set | ||
736 | # CONFIG_HIPPI is not set | ||
737 | CONFIG_PPP=m | ||
738 | CONFIG_PPP_MULTILINK=y | ||
739 | CONFIG_PPP_FILTER=y | ||
740 | CONFIG_PPP_ASYNC=m | ||
741 | CONFIG_PPP_SYNC_TTY=m | ||
742 | CONFIG_PPP_DEFLATE=m | ||
743 | CONFIG_PPP_BSDCOMP=m | ||
744 | # CONFIG_PPP_MPPE is not set | ||
745 | CONFIG_PPPOE=m | ||
746 | # CONFIG_PPPOL2TP is not set | ||
747 | CONFIG_SLIP=m | ||
748 | CONFIG_SLIP_COMPRESSED=y | ||
749 | CONFIG_SLHC=m | ||
750 | CONFIG_SLIP_SMART=y | ||
751 | CONFIG_SLIP_MODE_SLIP6=y | ||
752 | # CONFIG_NET_FC is not set | ||
753 | CONFIG_NETCONSOLE=y | ||
754 | # CONFIG_NETCONSOLE_DYNAMIC is not set | ||
755 | CONFIG_NETPOLL=y | ||
756 | CONFIG_NETPOLL_TRAP=y | ||
757 | CONFIG_NET_POLL_CONTROLLER=y | ||
758 | # CONFIG_ISDN is not set | ||
759 | # CONFIG_PHONE is not set | ||
760 | |||
761 | # | ||
762 | # Input device support | ||
763 | # | ||
764 | CONFIG_INPUT=y | ||
765 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
766 | # CONFIG_INPUT_POLLDEV is not set | ||
767 | |||
768 | # | ||
769 | # Userland interfaces | ||
770 | # | ||
771 | CONFIG_INPUT_MOUSEDEV=y | ||
772 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
773 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
774 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
775 | # CONFIG_INPUT_JOYDEV is not set | ||
776 | # CONFIG_INPUT_EVDEV is not set | ||
777 | # CONFIG_INPUT_EVBUG is not set | ||
778 | |||
779 | # | ||
780 | # Input Device Drivers | ||
781 | # | ||
782 | # CONFIG_INPUT_KEYBOARD is not set | ||
783 | # CONFIG_INPUT_MOUSE is not set | ||
784 | # CONFIG_INPUT_JOYSTICK is not set | ||
785 | # CONFIG_INPUT_TABLET is not set | ||
786 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
787 | # CONFIG_INPUT_MISC is not set | ||
788 | |||
789 | # | ||
790 | # Hardware I/O ports | ||
791 | # | ||
792 | # CONFIG_SERIO is not set | ||
793 | # CONFIG_GAMEPORT is not set | ||
794 | |||
795 | # | ||
796 | # Character devices | ||
797 | # | ||
798 | CONFIG_VT=y | ||
799 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
800 | CONFIG_VT_CONSOLE=y | ||
801 | CONFIG_HW_CONSOLE=y | ||
802 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
803 | CONFIG_DEVKMEM=y | ||
804 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
805 | # CONFIG_NOZOMI is not set | ||
806 | |||
807 | # | ||
808 | # Serial drivers | ||
809 | # | ||
810 | CONFIG_SERIAL_8250=y | ||
811 | CONFIG_SERIAL_8250_CONSOLE=y | ||
812 | # CONFIG_SERIAL_8250_PCI is not set | ||
813 | CONFIG_SERIAL_8250_NR_UARTS=2 | ||
814 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | ||
815 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
816 | |||
817 | # | ||
818 | # Non-8250 serial port support | ||
819 | # | ||
820 | # CONFIG_SERIAL_UARTLITE is not set | ||
821 | CONFIG_SERIAL_CORE=y | ||
822 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
823 | # CONFIG_SERIAL_JSM is not set | ||
824 | # CONFIG_SERIAL_OF_PLATFORM is not set | ||
825 | CONFIG_UNIX98_PTYS=y | ||
826 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
827 | # CONFIG_LEGACY_PTYS is not set | ||
828 | # CONFIG_HVC_UDBG is not set | ||
829 | # CONFIG_IPMI_HANDLER is not set | ||
830 | CONFIG_HW_RANDOM=y | ||
831 | CONFIG_NVRAM=y | ||
832 | # CONFIG_R3964 is not set | ||
833 | # CONFIG_APPLICOM is not set | ||
834 | # CONFIG_RAW_DRIVER is not set | ||
835 | # CONFIG_TCG_TPM is not set | ||
836 | CONFIG_DEVPORT=y | ||
837 | CONFIG_I2C=y | ||
838 | CONFIG_I2C_BOARDINFO=y | ||
839 | CONFIG_I2C_CHARDEV=y | ||
840 | CONFIG_I2C_HELPER_AUTO=y | ||
841 | |||
842 | # | ||
843 | # I2C Hardware Bus support | ||
844 | # | ||
845 | |||
846 | # | ||
847 | # PC SMBus host controller drivers | ||
848 | # | ||
849 | # CONFIG_I2C_ALI1535 is not set | ||
850 | # CONFIG_I2C_ALI1563 is not set | ||
851 | # CONFIG_I2C_ALI15X3 is not set | ||
852 | # CONFIG_I2C_AMD756 is not set | ||
853 | # CONFIG_I2C_AMD8111 is not set | ||
854 | # CONFIG_I2C_I801 is not set | ||
855 | # CONFIG_I2C_ISCH is not set | ||
856 | # CONFIG_I2C_PIIX4 is not set | ||
857 | # CONFIG_I2C_NFORCE2 is not set | ||
858 | # CONFIG_I2C_SIS5595 is not set | ||
859 | # CONFIG_I2C_SIS630 is not set | ||
860 | # CONFIG_I2C_SIS96X is not set | ||
861 | # CONFIG_I2C_VIA is not set | ||
862 | # CONFIG_I2C_VIAPRO is not set | ||
863 | |||
864 | # | ||
865 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
866 | # | ||
867 | # CONFIG_I2C_GPIO is not set | ||
868 | CONFIG_I2C_MPC=y | ||
869 | # CONFIG_I2C_OCORES is not set | ||
870 | # CONFIG_I2C_SIMTEC is not set | ||
871 | |||
872 | # | ||
873 | # External I2C/SMBus adapter drivers | ||
874 | # | ||
875 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
876 | # CONFIG_I2C_TAOS_EVM is not set | ||
877 | # CONFIG_I2C_TINY_USB is not set | ||
878 | |||
879 | # | ||
880 | # Graphics adapter I2C/DDC channel drivers | ||
881 | # | ||
882 | # CONFIG_I2C_VOODOO3 is not set | ||
883 | |||
884 | # | ||
885 | # Other I2C/SMBus bus drivers | ||
886 | # | ||
887 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
888 | # CONFIG_I2C_STUB is not set | ||
889 | |||
890 | # | ||
891 | # Miscellaneous I2C Chip support | ||
892 | # | ||
893 | CONFIG_DS1682=y | ||
894 | # CONFIG_SENSORS_PCF8574 is not set | ||
895 | # CONFIG_PCF8575 is not set | ||
896 | # CONFIG_SENSORS_PCA9539 is not set | ||
897 | # CONFIG_SENSORS_PCF8591 is not set | ||
898 | # CONFIG_SENSORS_MAX6875 is not set | ||
899 | # CONFIG_SENSORS_TSL2550 is not set | ||
900 | # CONFIG_I2C_DEBUG_CORE is not set | ||
901 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
902 | # CONFIG_I2C_DEBUG_BUS is not set | ||
903 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
904 | # CONFIG_SPI is not set | ||
905 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
906 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
907 | CONFIG_GPIOLIB=y | ||
908 | CONFIG_GPIO_SYSFS=y | ||
909 | |||
910 | # | ||
911 | # Memory mapped GPIO expanders: | ||
912 | # | ||
913 | # CONFIG_GPIO_XILINX is not set | ||
914 | |||
915 | # | ||
916 | # I2C GPIO expanders: | ||
917 | # | ||
918 | # CONFIG_GPIO_MAX732X is not set | ||
919 | # CONFIG_GPIO_PCA953X is not set | ||
920 | # CONFIG_GPIO_PCF857X is not set | ||
921 | |||
922 | # | ||
923 | # PCI GPIO expanders: | ||
924 | # | ||
925 | # CONFIG_GPIO_BT8XX is not set | ||
926 | |||
927 | # | ||
928 | # SPI GPIO expanders: | ||
929 | # | ||
930 | # CONFIG_W1 is not set | ||
931 | # CONFIG_POWER_SUPPLY is not set | ||
932 | CONFIG_HWMON=y | ||
933 | # CONFIG_HWMON_VID is not set | ||
934 | # CONFIG_SENSORS_AD7414 is not set | ||
935 | # CONFIG_SENSORS_AD7418 is not set | ||
936 | # CONFIG_SENSORS_ADM1021 is not set | ||
937 | # CONFIG_SENSORS_ADM1025 is not set | ||
938 | # CONFIG_SENSORS_ADM1026 is not set | ||
939 | # CONFIG_SENSORS_ADM1029 is not set | ||
940 | # CONFIG_SENSORS_ADM1031 is not set | ||
941 | # CONFIG_SENSORS_ADM9240 is not set | ||
942 | # CONFIG_SENSORS_ADT7462 is not set | ||
943 | # CONFIG_SENSORS_ADT7470 is not set | ||
944 | # CONFIG_SENSORS_ADT7473 is not set | ||
945 | # CONFIG_SENSORS_ADT7475 is not set | ||
946 | # CONFIG_SENSORS_ATXP1 is not set | ||
947 | # CONFIG_SENSORS_DS1621 is not set | ||
948 | # CONFIG_SENSORS_I5K_AMB is not set | ||
949 | # CONFIG_SENSORS_F71805F is not set | ||
950 | # CONFIG_SENSORS_F71882FG is not set | ||
951 | # CONFIG_SENSORS_F75375S is not set | ||
952 | # CONFIG_SENSORS_GL518SM is not set | ||
953 | # CONFIG_SENSORS_GL520SM is not set | ||
954 | # CONFIG_SENSORS_IT87 is not set | ||
955 | # CONFIG_SENSORS_LM63 is not set | ||
956 | # CONFIG_SENSORS_LM75 is not set | ||
957 | # CONFIG_SENSORS_LM77 is not set | ||
958 | # CONFIG_SENSORS_LM78 is not set | ||
959 | # CONFIG_SENSORS_LM80 is not set | ||
960 | # CONFIG_SENSORS_LM83 is not set | ||
961 | # CONFIG_SENSORS_LM85 is not set | ||
962 | # CONFIG_SENSORS_LM87 is not set | ||
963 | CONFIG_SENSORS_LM90=y | ||
964 | CONFIG_SENSORS_LM92=y | ||
965 | # CONFIG_SENSORS_LM93 is not set | ||
966 | # CONFIG_SENSORS_LTC4245 is not set | ||
967 | # CONFIG_SENSORS_MAX1619 is not set | ||
968 | # CONFIG_SENSORS_MAX6650 is not set | ||
969 | # CONFIG_SENSORS_PC87360 is not set | ||
970 | # CONFIG_SENSORS_PC87427 is not set | ||
971 | # CONFIG_SENSORS_SIS5595 is not set | ||
972 | # CONFIG_SENSORS_DME1737 is not set | ||
973 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
974 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
975 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
976 | # CONFIG_SENSORS_ADS7828 is not set | ||
977 | # CONFIG_SENSORS_THMC50 is not set | ||
978 | # CONFIG_SENSORS_VIA686A is not set | ||
979 | # CONFIG_SENSORS_VT1211 is not set | ||
980 | # CONFIG_SENSORS_VT8231 is not set | ||
981 | # CONFIG_SENSORS_W83781D is not set | ||
982 | # CONFIG_SENSORS_W83791D is not set | ||
983 | # CONFIG_SENSORS_W83792D is not set | ||
984 | # CONFIG_SENSORS_W83793 is not set | ||
985 | # CONFIG_SENSORS_W83L785TS is not set | ||
986 | # CONFIG_SENSORS_W83L786NG is not set | ||
987 | # CONFIG_SENSORS_W83627HF is not set | ||
988 | # CONFIG_SENSORS_W83627EHF is not set | ||
989 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
990 | # CONFIG_THERMAL is not set | ||
991 | # CONFIG_THERMAL_HWMON is not set | ||
992 | CONFIG_WATCHDOG=y | ||
993 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
994 | |||
995 | # | ||
996 | # Watchdog Device Drivers | ||
997 | # | ||
998 | # CONFIG_SOFT_WATCHDOG is not set | ||
999 | # CONFIG_ALIM7101_WDT is not set | ||
1000 | CONFIG_GEF_WDT=y | ||
1001 | # CONFIG_8xxx_WDT is not set | ||
1002 | |||
1003 | # | ||
1004 | # PCI-based Watchdog Cards | ||
1005 | # | ||
1006 | # CONFIG_PCIPCWATCHDOG is not set | ||
1007 | # CONFIG_WDTPCI is not set | ||
1008 | |||
1009 | # | ||
1010 | # USB-based Watchdog Cards | ||
1011 | # | ||
1012 | # CONFIG_USBPCWATCHDOG is not set | ||
1013 | CONFIG_SSB_POSSIBLE=y | ||
1014 | |||
1015 | # | ||
1016 | # Sonics Silicon Backplane | ||
1017 | # | ||
1018 | # CONFIG_SSB is not set | ||
1019 | |||
1020 | # | ||
1021 | # Multifunction device drivers | ||
1022 | # | ||
1023 | # CONFIG_MFD_CORE is not set | ||
1024 | # CONFIG_MFD_SM501 is not set | ||
1025 | # CONFIG_HTC_PASIC3 is not set | ||
1026 | # CONFIG_TPS65010 is not set | ||
1027 | # CONFIG_TWL4030_CORE is not set | ||
1028 | # CONFIG_MFD_TMIO is not set | ||
1029 | # CONFIG_PMIC_DA903X is not set | ||
1030 | # CONFIG_MFD_WM8400 is not set | ||
1031 | # CONFIG_MFD_WM8350_I2C is not set | ||
1032 | # CONFIG_MFD_PCF50633 is not set | ||
1033 | # CONFIG_REGULATOR is not set | ||
1034 | |||
1035 | # | ||
1036 | # Multimedia devices | ||
1037 | # | ||
1038 | |||
1039 | # | ||
1040 | # Multimedia core support | ||
1041 | # | ||
1042 | # CONFIG_VIDEO_DEV is not set | ||
1043 | # CONFIG_DVB_CORE is not set | ||
1044 | # CONFIG_VIDEO_MEDIA is not set | ||
1045 | |||
1046 | # | ||
1047 | # Multimedia drivers | ||
1048 | # | ||
1049 | CONFIG_DAB=y | ||
1050 | # CONFIG_USB_DABUSB is not set | ||
1051 | |||
1052 | # | ||
1053 | # Graphics support | ||
1054 | # | ||
1055 | # CONFIG_AGP is not set | ||
1056 | # CONFIG_DRM is not set | ||
1057 | # CONFIG_VGASTATE is not set | ||
1058 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
1059 | # CONFIG_FB is not set | ||
1060 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
1061 | |||
1062 | # | ||
1063 | # Display device support | ||
1064 | # | ||
1065 | # CONFIG_DISPLAY_SUPPORT is not set | ||
1066 | |||
1067 | # | ||
1068 | # Console display driver support | ||
1069 | # | ||
1070 | CONFIG_VGA_CONSOLE=y | ||
1071 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set | ||
1072 | CONFIG_DUMMY_CONSOLE=y | ||
1073 | # CONFIG_SOUND is not set | ||
1074 | CONFIG_HID_SUPPORT=y | ||
1075 | CONFIG_HID=y | ||
1076 | # CONFIG_HID_DEBUG is not set | ||
1077 | # CONFIG_HIDRAW is not set | ||
1078 | |||
1079 | # | ||
1080 | # USB Input Devices | ||
1081 | # | ||
1082 | CONFIG_USB_HID=y | ||
1083 | # CONFIG_HID_PID is not set | ||
1084 | # CONFIG_USB_HIDDEV is not set | ||
1085 | |||
1086 | # | ||
1087 | # Special HID drivers | ||
1088 | # | ||
1089 | CONFIG_HID_COMPAT=y | ||
1090 | CONFIG_HID_A4TECH=y | ||
1091 | CONFIG_HID_APPLE=y | ||
1092 | CONFIG_HID_BELKIN=y | ||
1093 | CONFIG_HID_CHERRY=y | ||
1094 | CONFIG_HID_CHICONY=y | ||
1095 | CONFIG_HID_CYPRESS=y | ||
1096 | CONFIG_HID_EZKEY=y | ||
1097 | CONFIG_HID_GYRATION=y | ||
1098 | CONFIG_HID_LOGITECH=y | ||
1099 | # CONFIG_LOGITECH_FF is not set | ||
1100 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
1101 | CONFIG_HID_MICROSOFT=y | ||
1102 | CONFIG_HID_MONTEREY=y | ||
1103 | # CONFIG_HID_NTRIG is not set | ||
1104 | CONFIG_HID_PANTHERLORD=y | ||
1105 | # CONFIG_PANTHERLORD_FF is not set | ||
1106 | CONFIG_HID_PETALYNX=y | ||
1107 | CONFIG_HID_SAMSUNG=y | ||
1108 | CONFIG_HID_SONY=y | ||
1109 | CONFIG_HID_SUNPLUS=y | ||
1110 | # CONFIG_GREENASIA_FF is not set | ||
1111 | # CONFIG_HID_TOPSEED is not set | ||
1112 | # CONFIG_THRUSTMASTER_FF is not set | ||
1113 | # CONFIG_ZEROPLUS_FF is not set | ||
1114 | CONFIG_USB_SUPPORT=y | ||
1115 | CONFIG_USB_ARCH_HAS_HCD=y | ||
1116 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
1117 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
1118 | CONFIG_USB=y | ||
1119 | # CONFIG_USB_DEBUG is not set | ||
1120 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
1121 | |||
1122 | # | ||
1123 | # Miscellaneous USB options | ||
1124 | # | ||
1125 | # CONFIG_USB_DEVICEFS is not set | ||
1126 | # CONFIG_USB_DEVICE_CLASS is not set | ||
1127 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
1128 | # CONFIG_USB_OTG is not set | ||
1129 | # CONFIG_USB_OTG_WHITELIST is not set | ||
1130 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1131 | # CONFIG_USB_MON is not set | ||
1132 | # CONFIG_USB_WUSB is not set | ||
1133 | # CONFIG_USB_WUSB_CBAF is not set | ||
1134 | |||
1135 | # | ||
1136 | # USB Host Controller Drivers | ||
1137 | # | ||
1138 | # CONFIG_USB_C67X00_HCD is not set | ||
1139 | CONFIG_USB_EHCI_HCD=y | ||
1140 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
1141 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1142 | # CONFIG_USB_EHCI_FSL is not set | ||
1143 | # CONFIG_USB_EHCI_HCD_PPC_OF is not set | ||
1144 | # CONFIG_USB_OXU210HP_HCD is not set | ||
1145 | # CONFIG_USB_ISP116X_HCD is not set | ||
1146 | # CONFIG_USB_ISP1760_HCD is not set | ||
1147 | CONFIG_USB_OHCI_HCD=y | ||
1148 | # CONFIG_USB_OHCI_HCD_PPC_OF is not set | ||
1149 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
1150 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
1151 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
1152 | # CONFIG_USB_UHCI_HCD is not set | ||
1153 | # CONFIG_USB_SL811_HCD is not set | ||
1154 | # CONFIG_USB_R8A66597_HCD is not set | ||
1155 | # CONFIG_USB_WHCI_HCD is not set | ||
1156 | # CONFIG_USB_HWA_HCD is not set | ||
1157 | |||
1158 | # | ||
1159 | # USB Device Class drivers | ||
1160 | # | ||
1161 | # CONFIG_USB_ACM is not set | ||
1162 | # CONFIG_USB_PRINTER is not set | ||
1163 | # CONFIG_USB_WDM is not set | ||
1164 | # CONFIG_USB_TMC is not set | ||
1165 | |||
1166 | # | ||
1167 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | ||
1168 | # | ||
1169 | |||
1170 | # | ||
1171 | # see USB_STORAGE Help for more information | ||
1172 | # | ||
1173 | CONFIG_USB_STORAGE=y | ||
1174 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1175 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
1176 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
1177 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1178 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1179 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
1180 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
1181 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1182 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1183 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1184 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1185 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1186 | # CONFIG_USB_LIBUSUAL is not set | ||
1187 | |||
1188 | # | ||
1189 | # USB Imaging devices | ||
1190 | # | ||
1191 | # CONFIG_USB_MDC800 is not set | ||
1192 | # CONFIG_USB_MICROTEK is not set | ||
1193 | |||
1194 | # | ||
1195 | # USB port drivers | ||
1196 | # | ||
1197 | # CONFIG_USB_SERIAL is not set | ||
1198 | |||
1199 | # | ||
1200 | # USB Miscellaneous drivers | ||
1201 | # | ||
1202 | # CONFIG_USB_EMI62 is not set | ||
1203 | # CONFIG_USB_EMI26 is not set | ||
1204 | # CONFIG_USB_ADUTUX is not set | ||
1205 | # CONFIG_USB_SEVSEG is not set | ||
1206 | # CONFIG_USB_RIO500 is not set | ||
1207 | # CONFIG_USB_LEGOTOWER is not set | ||
1208 | # CONFIG_USB_LCD is not set | ||
1209 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1210 | # CONFIG_USB_LED is not set | ||
1211 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1212 | # CONFIG_USB_CYTHERM is not set | ||
1213 | # CONFIG_USB_PHIDGET is not set | ||
1214 | # CONFIG_USB_IDMOUSE is not set | ||
1215 | # CONFIG_USB_FTDI_ELAN is not set | ||
1216 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1217 | # CONFIG_USB_SISUSBVGA is not set | ||
1218 | # CONFIG_USB_LD is not set | ||
1219 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1220 | # CONFIG_USB_IOWARRIOR is not set | ||
1221 | # CONFIG_USB_ISIGHTFW is not set | ||
1222 | # CONFIG_USB_VST is not set | ||
1223 | # CONFIG_USB_GADGET is not set | ||
1224 | |||
1225 | # | ||
1226 | # OTG and related infrastructure | ||
1227 | # | ||
1228 | # CONFIG_USB_GPIO_VBUS is not set | ||
1229 | # CONFIG_UWB is not set | ||
1230 | # CONFIG_MMC is not set | ||
1231 | # CONFIG_MEMSTICK is not set | ||
1232 | # CONFIG_NEW_LEDS is not set | ||
1233 | # CONFIG_ACCESSIBILITY is not set | ||
1234 | # CONFIG_INFINIBAND is not set | ||
1235 | # CONFIG_EDAC is not set | ||
1236 | CONFIG_RTC_LIB=y | ||
1237 | CONFIG_RTC_CLASS=y | ||
1238 | CONFIG_RTC_HCTOSYS=y | ||
1239 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1240 | # CONFIG_RTC_DEBUG is not set | ||
1241 | |||
1242 | # | ||
1243 | # RTC interfaces | ||
1244 | # | ||
1245 | CONFIG_RTC_INTF_SYSFS=y | ||
1246 | # CONFIG_RTC_INTF_PROC is not set | ||
1247 | CONFIG_RTC_INTF_DEV=y | ||
1248 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1249 | # CONFIG_RTC_DRV_TEST is not set | ||
1250 | |||
1251 | # | ||
1252 | # I2C RTC drivers | ||
1253 | # | ||
1254 | # CONFIG_RTC_DRV_DS1307 is not set | ||
1255 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1256 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1257 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1258 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1259 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1260 | # CONFIG_RTC_DRV_X1205 is not set | ||
1261 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1262 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1263 | # CONFIG_RTC_DRV_M41T80 is not set | ||
1264 | # CONFIG_RTC_DRV_S35390A is not set | ||
1265 | # CONFIG_RTC_DRV_FM3130 is not set | ||
1266 | CONFIG_RTC_DRV_RX8581=y | ||
1267 | |||
1268 | # | ||
1269 | # SPI RTC drivers | ||
1270 | # | ||
1271 | |||
1272 | # | ||
1273 | # Platform RTC drivers | ||
1274 | # | ||
1275 | # CONFIG_RTC_DRV_CMOS is not set | ||
1276 | # CONFIG_RTC_DRV_DS1286 is not set | ||
1277 | # CONFIG_RTC_DRV_DS1511 is not set | ||
1278 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1279 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1280 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1281 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1282 | # CONFIG_RTC_DRV_M48T35 is not set | ||
1283 | # CONFIG_RTC_DRV_M48T59 is not set | ||
1284 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
1285 | # CONFIG_RTC_DRV_V3020 is not set | ||
1286 | |||
1287 | # | ||
1288 | # on-CPU RTC drivers | ||
1289 | # | ||
1290 | # CONFIG_RTC_DRV_PPC is not set | ||
1291 | # CONFIG_DMADEVICES is not set | ||
1292 | # CONFIG_UIO is not set | ||
1293 | # CONFIG_STAGING is not set | ||
1294 | |||
1295 | # | ||
1296 | # File systems | ||
1297 | # | ||
1298 | CONFIG_EXT2_FS=y | ||
1299 | CONFIG_EXT2_FS_XATTR=y | ||
1300 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
1301 | # CONFIG_EXT2_FS_SECURITY is not set | ||
1302 | # CONFIG_EXT2_FS_XIP is not set | ||
1303 | CONFIG_EXT3_FS=y | ||
1304 | CONFIG_EXT3_FS_XATTR=y | ||
1305 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
1306 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1307 | # CONFIG_EXT4_FS is not set | ||
1308 | CONFIG_JBD=y | ||
1309 | CONFIG_FS_MBCACHE=y | ||
1310 | # CONFIG_REISERFS_FS is not set | ||
1311 | # CONFIG_JFS_FS is not set | ||
1312 | CONFIG_FS_POSIX_ACL=y | ||
1313 | CONFIG_FILE_LOCKING=y | ||
1314 | # CONFIG_XFS_FS is not set | ||
1315 | # CONFIG_OCFS2_FS is not set | ||
1316 | # CONFIG_BTRFS_FS is not set | ||
1317 | CONFIG_DNOTIFY=y | ||
1318 | CONFIG_INOTIFY=y | ||
1319 | CONFIG_INOTIFY_USER=y | ||
1320 | # CONFIG_QUOTA is not set | ||
1321 | # CONFIG_AUTOFS_FS is not set | ||
1322 | # CONFIG_AUTOFS4_FS is not set | ||
1323 | # CONFIG_FUSE_FS is not set | ||
1324 | |||
1325 | # | ||
1326 | # CD-ROM/DVD Filesystems | ||
1327 | # | ||
1328 | CONFIG_ISO9660_FS=y | ||
1329 | CONFIG_JOLIET=y | ||
1330 | CONFIG_ZISOFS=y | ||
1331 | CONFIG_UDF_FS=y | ||
1332 | CONFIG_UDF_NLS=y | ||
1333 | |||
1334 | # | ||
1335 | # DOS/FAT/NT Filesystems | ||
1336 | # | ||
1337 | CONFIG_FAT_FS=y | ||
1338 | CONFIG_MSDOS_FS=y | ||
1339 | CONFIG_VFAT_FS=y | ||
1340 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
1341 | CONFIG_FAT_DEFAULT_IOCHARSET="ascii" | ||
1342 | # CONFIG_NTFS_FS is not set | ||
1343 | |||
1344 | # | ||
1345 | # Pseudo filesystems | ||
1346 | # | ||
1347 | CONFIG_PROC_FS=y | ||
1348 | CONFIG_PROC_KCORE=y | ||
1349 | CONFIG_PROC_SYSCTL=y | ||
1350 | CONFIG_PROC_PAGE_MONITOR=y | ||
1351 | CONFIG_SYSFS=y | ||
1352 | CONFIG_TMPFS=y | ||
1353 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1354 | # CONFIG_HUGETLB_PAGE is not set | ||
1355 | # CONFIG_CONFIGFS_FS is not set | ||
1356 | CONFIG_MISC_FILESYSTEMS=y | ||
1357 | # CONFIG_ADFS_FS is not set | ||
1358 | # CONFIG_AFFS_FS is not set | ||
1359 | # CONFIG_HFS_FS is not set | ||
1360 | # CONFIG_HFSPLUS_FS is not set | ||
1361 | # CONFIG_BEFS_FS is not set | ||
1362 | # CONFIG_BFS_FS is not set | ||
1363 | # CONFIG_EFS_FS is not set | ||
1364 | CONFIG_JFFS2_FS=y | ||
1365 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1366 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1367 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1368 | # CONFIG_JFFS2_SUMMARY is not set | ||
1369 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1370 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1371 | CONFIG_JFFS2_ZLIB=y | ||
1372 | # CONFIG_JFFS2_LZO is not set | ||
1373 | CONFIG_JFFS2_RTIME=y | ||
1374 | # CONFIG_JFFS2_RUBIN is not set | ||
1375 | # CONFIG_CRAMFS is not set | ||
1376 | # CONFIG_SQUASHFS is not set | ||
1377 | # CONFIG_VXFS_FS is not set | ||
1378 | # CONFIG_MINIX_FS is not set | ||
1379 | # CONFIG_OMFS_FS is not set | ||
1380 | # CONFIG_HPFS_FS is not set | ||
1381 | # CONFIG_QNX4FS_FS is not set | ||
1382 | # CONFIG_ROMFS_FS is not set | ||
1383 | # CONFIG_SYSV_FS is not set | ||
1384 | # CONFIG_UFS_FS is not set | ||
1385 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1386 | CONFIG_NFS_FS=y | ||
1387 | CONFIG_NFS_V3=y | ||
1388 | # CONFIG_NFS_V3_ACL is not set | ||
1389 | CONFIG_NFS_V4=y | ||
1390 | CONFIG_ROOT_NFS=y | ||
1391 | # CONFIG_NFSD is not set | ||
1392 | CONFIG_LOCKD=y | ||
1393 | CONFIG_LOCKD_V4=y | ||
1394 | CONFIG_NFS_COMMON=y | ||
1395 | CONFIG_SUNRPC=y | ||
1396 | CONFIG_SUNRPC_GSS=y | ||
1397 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
1398 | CONFIG_RPCSEC_GSS_KRB5=y | ||
1399 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1400 | # CONFIG_SMB_FS is not set | ||
1401 | CONFIG_CIFS=m | ||
1402 | # CONFIG_CIFS_STATS is not set | ||
1403 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1404 | CONFIG_CIFS_XATTR=y | ||
1405 | CONFIG_CIFS_POSIX=y | ||
1406 | # CONFIG_CIFS_DEBUG2 is not set | ||
1407 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
1408 | # CONFIG_NCP_FS is not set | ||
1409 | # CONFIG_CODA_FS is not set | ||
1410 | # CONFIG_AFS_FS is not set | ||
1411 | |||
1412 | # | ||
1413 | # Partition Types | ||
1414 | # | ||
1415 | # CONFIG_PARTITION_ADVANCED is not set | ||
1416 | CONFIG_MSDOS_PARTITION=y | ||
1417 | CONFIG_NLS=y | ||
1418 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1419 | CONFIG_NLS_CODEPAGE_437=m | ||
1420 | CONFIG_NLS_CODEPAGE_737=m | ||
1421 | CONFIG_NLS_CODEPAGE_775=m | ||
1422 | CONFIG_NLS_CODEPAGE_850=m | ||
1423 | CONFIG_NLS_CODEPAGE_852=m | ||
1424 | CONFIG_NLS_CODEPAGE_855=m | ||
1425 | CONFIG_NLS_CODEPAGE_857=m | ||
1426 | CONFIG_NLS_CODEPAGE_860=m | ||
1427 | CONFIG_NLS_CODEPAGE_861=m | ||
1428 | CONFIG_NLS_CODEPAGE_862=m | ||
1429 | CONFIG_NLS_CODEPAGE_863=m | ||
1430 | CONFIG_NLS_CODEPAGE_864=m | ||
1431 | CONFIG_NLS_CODEPAGE_865=m | ||
1432 | CONFIG_NLS_CODEPAGE_866=m | ||
1433 | CONFIG_NLS_CODEPAGE_869=m | ||
1434 | CONFIG_NLS_CODEPAGE_936=m | ||
1435 | CONFIG_NLS_CODEPAGE_950=m | ||
1436 | CONFIG_NLS_CODEPAGE_932=m | ||
1437 | CONFIG_NLS_CODEPAGE_949=m | ||
1438 | CONFIG_NLS_CODEPAGE_874=m | ||
1439 | CONFIG_NLS_ISO8859_8=m | ||
1440 | CONFIG_NLS_CODEPAGE_1250=m | ||
1441 | CONFIG_NLS_CODEPAGE_1251=m | ||
1442 | CONFIG_NLS_ASCII=m | ||
1443 | CONFIG_NLS_ISO8859_1=m | ||
1444 | CONFIG_NLS_ISO8859_2=m | ||
1445 | CONFIG_NLS_ISO8859_3=m | ||
1446 | CONFIG_NLS_ISO8859_4=m | ||
1447 | CONFIG_NLS_ISO8859_5=m | ||
1448 | CONFIG_NLS_ISO8859_6=m | ||
1449 | CONFIG_NLS_ISO8859_7=m | ||
1450 | CONFIG_NLS_ISO8859_9=m | ||
1451 | CONFIG_NLS_ISO8859_13=m | ||
1452 | CONFIG_NLS_ISO8859_14=m | ||
1453 | CONFIG_NLS_ISO8859_15=m | ||
1454 | CONFIG_NLS_KOI8_R=m | ||
1455 | CONFIG_NLS_KOI8_U=m | ||
1456 | CONFIG_NLS_UTF8=m | ||
1457 | # CONFIG_DLM is not set | ||
1458 | |||
1459 | # | ||
1460 | # Library routines | ||
1461 | # | ||
1462 | CONFIG_BITREVERSE=y | ||
1463 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
1464 | CONFIG_CRC_CCITT=y | ||
1465 | # CONFIG_CRC16 is not set | ||
1466 | CONFIG_CRC_T10DIF=y | ||
1467 | CONFIG_CRC_ITU_T=y | ||
1468 | CONFIG_CRC32=y | ||
1469 | # CONFIG_CRC7 is not set | ||
1470 | CONFIG_LIBCRC32C=y | ||
1471 | CONFIG_ZLIB_INFLATE=y | ||
1472 | CONFIG_ZLIB_DEFLATE=y | ||
1473 | CONFIG_PLIST=y | ||
1474 | CONFIG_HAS_IOMEM=y | ||
1475 | CONFIG_HAS_IOPORT=y | ||
1476 | CONFIG_HAS_DMA=y | ||
1477 | CONFIG_HAVE_LMB=y | ||
1478 | |||
1479 | # | ||
1480 | # Kernel hacking | ||
1481 | # | ||
1482 | # CONFIG_PRINTK_TIME is not set | ||
1483 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1484 | CONFIG_ENABLE_MUST_CHECK=y | ||
1485 | CONFIG_FRAME_WARN=1024 | ||
1486 | CONFIG_MAGIC_SYSRQ=y | ||
1487 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1488 | # CONFIG_DEBUG_FS is not set | ||
1489 | # CONFIG_HEADERS_CHECK is not set | ||
1490 | # CONFIG_DEBUG_KERNEL is not set | ||
1491 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1492 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
1493 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1494 | # CONFIG_LATENCYTOP is not set | ||
1495 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
1496 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
1497 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
1498 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
1499 | |||
1500 | # | ||
1501 | # Tracers | ||
1502 | # | ||
1503 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
1504 | # CONFIG_SAMPLES is not set | ||
1505 | CONFIG_HAVE_ARCH_KGDB=y | ||
1506 | CONFIG_PRINT_STACK_DEPTH=64 | ||
1507 | # CONFIG_IRQSTACKS is not set | ||
1508 | # CONFIG_BOOTX_TEXT is not set | ||
1509 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1510 | |||
1511 | # | ||
1512 | # Security options | ||
1513 | # | ||
1514 | # CONFIG_KEYS is not set | ||
1515 | # CONFIG_SECURITY is not set | ||
1516 | # CONFIG_SECURITYFS is not set | ||
1517 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1518 | CONFIG_CRYPTO=y | ||
1519 | |||
1520 | # | ||
1521 | # Crypto core or helper | ||
1522 | # | ||
1523 | # CONFIG_CRYPTO_FIPS is not set | ||
1524 | CONFIG_CRYPTO_ALGAPI=y | ||
1525 | CONFIG_CRYPTO_ALGAPI2=y | ||
1526 | CONFIG_CRYPTO_AEAD=m | ||
1527 | CONFIG_CRYPTO_AEAD2=y | ||
1528 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1529 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
1530 | CONFIG_CRYPTO_HASH=y | ||
1531 | CONFIG_CRYPTO_HASH2=y | ||
1532 | CONFIG_CRYPTO_RNG2=y | ||
1533 | CONFIG_CRYPTO_MANAGER=y | ||
1534 | CONFIG_CRYPTO_MANAGER2=y | ||
1535 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1536 | # CONFIG_CRYPTO_NULL is not set | ||
1537 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1538 | CONFIG_CRYPTO_AUTHENC=m | ||
1539 | # CONFIG_CRYPTO_TEST is not set | ||
1540 | |||
1541 | # | ||
1542 | # Authenticated Encryption with Associated Data | ||
1543 | # | ||
1544 | # CONFIG_CRYPTO_CCM is not set | ||
1545 | # CONFIG_CRYPTO_GCM is not set | ||
1546 | # CONFIG_CRYPTO_SEQIV is not set | ||
1547 | |||
1548 | # | ||
1549 | # Block modes | ||
1550 | # | ||
1551 | CONFIG_CRYPTO_CBC=y | ||
1552 | # CONFIG_CRYPTO_CTR is not set | ||
1553 | # CONFIG_CRYPTO_CTS is not set | ||
1554 | # CONFIG_CRYPTO_ECB is not set | ||
1555 | # CONFIG_CRYPTO_LRW is not set | ||
1556 | # CONFIG_CRYPTO_PCBC is not set | ||
1557 | # CONFIG_CRYPTO_XTS is not set | ||
1558 | |||
1559 | # | ||
1560 | # Hash modes | ||
1561 | # | ||
1562 | CONFIG_CRYPTO_HMAC=m | ||
1563 | # CONFIG_CRYPTO_XCBC is not set | ||
1564 | |||
1565 | # | ||
1566 | # Digest | ||
1567 | # | ||
1568 | CONFIG_CRYPTO_CRC32C=y | ||
1569 | # CONFIG_CRYPTO_MD4 is not set | ||
1570 | CONFIG_CRYPTO_MD5=y | ||
1571 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1572 | # CONFIG_CRYPTO_RMD128 is not set | ||
1573 | # CONFIG_CRYPTO_RMD160 is not set | ||
1574 | # CONFIG_CRYPTO_RMD256 is not set | ||
1575 | # CONFIG_CRYPTO_RMD320 is not set | ||
1576 | CONFIG_CRYPTO_SHA1=m | ||
1577 | # CONFIG_CRYPTO_SHA256 is not set | ||
1578 | # CONFIG_CRYPTO_SHA512 is not set | ||
1579 | # CONFIG_CRYPTO_TGR192 is not set | ||
1580 | # CONFIG_CRYPTO_WP512 is not set | ||
1581 | |||
1582 | # | ||
1583 | # Ciphers | ||
1584 | # | ||
1585 | # CONFIG_CRYPTO_AES is not set | ||
1586 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1587 | # CONFIG_CRYPTO_ARC4 is not set | ||
1588 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1589 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1590 | # CONFIG_CRYPTO_CAST5 is not set | ||
1591 | # CONFIG_CRYPTO_CAST6 is not set | ||
1592 | CONFIG_CRYPTO_DES=y | ||
1593 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1594 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1595 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1596 | # CONFIG_CRYPTO_SEED is not set | ||
1597 | # CONFIG_CRYPTO_SERPENT is not set | ||
1598 | # CONFIG_CRYPTO_TEA is not set | ||
1599 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1600 | |||
1601 | # | ||
1602 | # Compression | ||
1603 | # | ||
1604 | CONFIG_CRYPTO_DEFLATE=m | ||
1605 | # CONFIG_CRYPTO_LZO is not set | ||
1606 | |||
1607 | # | ||
1608 | # Random Number Generation | ||
1609 | # | ||
1610 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1611 | # CONFIG_CRYPTO_HW is not set | ||
1612 | # CONFIG_PPC_CLOCK is not set | ||
1613 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/configs/amigaone_defconfig b/arch/powerpc/configs/amigaone_defconfig new file mode 100644 index 000000000000..b63cc38df6b1 --- /dev/null +++ b/arch/powerpc/configs/amigaone_defconfig | |||
@@ -0,0 +1,1636 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.29-rc3 | ||
4 | # Sun Feb 1 14:22:42 2009 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | CONFIG_6xx=y | ||
12 | # CONFIG_PPC_85xx is not set | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_PPC_FPU=y | ||
18 | CONFIG_ALTIVEC=y | ||
19 | CONFIG_PPC_STD_MMU=y | ||
20 | CONFIG_PPC_STD_MMU_32=y | ||
21 | # CONFIG_PPC_MM_SLICES is not set | ||
22 | # CONFIG_SMP is not set | ||
23 | CONFIG_NOT_COHERENT_CACHE=y | ||
24 | CONFIG_CHECK_CACHE_COHERENCY=y | ||
25 | CONFIG_PPC32=y | ||
26 | CONFIG_WORD_SIZE=32 | ||
27 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | ||
28 | CONFIG_MMU=y | ||
29 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
30 | CONFIG_GENERIC_TIME=y | ||
31 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
32 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
33 | CONFIG_GENERIC_HARDIRQS=y | ||
34 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
35 | CONFIG_IRQ_PER_CPU=y | ||
36 | CONFIG_STACKTRACE_SUPPORT=y | ||
37 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
38 | CONFIG_LOCKDEP_SUPPORT=y | ||
39 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
40 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
41 | CONFIG_GENERIC_HWEIGHT=y | ||
42 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
43 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
44 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
45 | CONFIG_PPC=y | ||
46 | CONFIG_EARLY_PRINTK=y | ||
47 | CONFIG_GENERIC_NVRAM=y | ||
48 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
49 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
50 | CONFIG_PPC_OF=y | ||
51 | CONFIG_OF=y | ||
52 | CONFIG_PPC_UDBG_16550=y | ||
53 | # CONFIG_GENERIC_TBSYNC is not set | ||
54 | CONFIG_AUDIT_ARCH=y | ||
55 | CONFIG_GENERIC_BUG=y | ||
56 | CONFIG_DEFAULT_UIMAGE=y | ||
57 | # CONFIG_PPC_DCR_NATIVE is not set | ||
58 | # CONFIG_PPC_DCR_MMIO is not set | ||
59 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
60 | |||
61 | # | ||
62 | # General setup | ||
63 | # | ||
64 | CONFIG_EXPERIMENTAL=y | ||
65 | CONFIG_BROKEN_ON_SMP=y | ||
66 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
67 | CONFIG_LOCALVERSION="" | ||
68 | # CONFIG_LOCALVERSION_AUTO is not set | ||
69 | CONFIG_SWAP=y | ||
70 | CONFIG_SYSVIPC=y | ||
71 | CONFIG_SYSVIPC_SYSCTL=y | ||
72 | CONFIG_POSIX_MQUEUE=y | ||
73 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
74 | # CONFIG_TASKSTATS is not set | ||
75 | # CONFIG_AUDIT is not set | ||
76 | |||
77 | # | ||
78 | # RCU Subsystem | ||
79 | # | ||
80 | CONFIG_CLASSIC_RCU=y | ||
81 | # CONFIG_TREE_RCU is not set | ||
82 | # CONFIG_PREEMPT_RCU is not set | ||
83 | # CONFIG_TREE_RCU_TRACE is not set | ||
84 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
85 | CONFIG_IKCONFIG=y | ||
86 | CONFIG_IKCONFIG_PROC=y | ||
87 | CONFIG_LOG_BUF_SHIFT=15 | ||
88 | # CONFIG_GROUP_SCHED is not set | ||
89 | # CONFIG_CGROUPS is not set | ||
90 | CONFIG_SYSFS_DEPRECATED=y | ||
91 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
92 | # CONFIG_RELAY is not set | ||
93 | CONFIG_NAMESPACES=y | ||
94 | # CONFIG_UTS_NS is not set | ||
95 | # CONFIG_IPC_NS is not set | ||
96 | # CONFIG_USER_NS is not set | ||
97 | # CONFIG_PID_NS is not set | ||
98 | # CONFIG_NET_NS is not set | ||
99 | CONFIG_BLK_DEV_INITRD=y | ||
100 | CONFIG_INITRAMFS_SOURCE="" | ||
101 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
102 | CONFIG_SYSCTL=y | ||
103 | # CONFIG_EMBEDDED is not set | ||
104 | CONFIG_SYSCTL_SYSCALL=y | ||
105 | CONFIG_KALLSYMS=y | ||
106 | # CONFIG_KALLSYMS_ALL is not set | ||
107 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
108 | CONFIG_HOTPLUG=y | ||
109 | CONFIG_PRINTK=y | ||
110 | CONFIG_BUG=y | ||
111 | CONFIG_ELF_CORE=y | ||
112 | CONFIG_PCSPKR_PLATFORM=y | ||
113 | # CONFIG_COMPAT_BRK is not set | ||
114 | CONFIG_BASE_FULL=y | ||
115 | CONFIG_FUTEX=y | ||
116 | CONFIG_ANON_INODES=y | ||
117 | CONFIG_EPOLL=y | ||
118 | CONFIG_SIGNALFD=y | ||
119 | CONFIG_TIMERFD=y | ||
120 | CONFIG_EVENTFD=y | ||
121 | CONFIG_SHMEM=y | ||
122 | CONFIG_AIO=y | ||
123 | CONFIG_VM_EVENT_COUNTERS=y | ||
124 | CONFIG_PCI_QUIRKS=y | ||
125 | CONFIG_SLUB_DEBUG=y | ||
126 | # CONFIG_SLAB is not set | ||
127 | CONFIG_SLUB=y | ||
128 | # CONFIG_SLOB is not set | ||
129 | # CONFIG_PROFILING is not set | ||
130 | CONFIG_HAVE_OPROFILE=y | ||
131 | # CONFIG_KPROBES is not set | ||
132 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | ||
133 | CONFIG_HAVE_IOREMAP_PROT=y | ||
134 | CONFIG_HAVE_KPROBES=y | ||
135 | CONFIG_HAVE_KRETPROBES=y | ||
136 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
137 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
138 | CONFIG_SLABINFO=y | ||
139 | CONFIG_RT_MUTEXES=y | ||
140 | CONFIG_BASE_SMALL=0 | ||
141 | CONFIG_MODULES=y | ||
142 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
143 | CONFIG_MODULE_UNLOAD=y | ||
144 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
145 | # CONFIG_MODVERSIONS is not set | ||
146 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
147 | CONFIG_BLOCK=y | ||
148 | CONFIG_LBD=y | ||
149 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
150 | # CONFIG_BLK_DEV_BSG is not set | ||
151 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
152 | |||
153 | # | ||
154 | # IO Schedulers | ||
155 | # | ||
156 | CONFIG_IOSCHED_NOOP=y | ||
157 | CONFIG_IOSCHED_AS=y | ||
158 | CONFIG_IOSCHED_DEADLINE=y | ||
159 | CONFIG_IOSCHED_CFQ=y | ||
160 | CONFIG_DEFAULT_AS=y | ||
161 | # CONFIG_DEFAULT_DEADLINE is not set | ||
162 | # CONFIG_DEFAULT_CFQ is not set | ||
163 | # CONFIG_DEFAULT_NOOP is not set | ||
164 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
165 | # CONFIG_FREEZER is not set | ||
166 | |||
167 | # | ||
168 | # Platform support | ||
169 | # | ||
170 | CONFIG_PPC_MULTIPLATFORM=y | ||
171 | CONFIG_CLASSIC32=y | ||
172 | # CONFIG_PPC_CHRP is not set | ||
173 | # CONFIG_MPC5121_ADS is not set | ||
174 | # CONFIG_MPC5121_GENERIC is not set | ||
175 | # CONFIG_PPC_MPC52xx is not set | ||
176 | # CONFIG_PPC_PMAC is not set | ||
177 | # CONFIG_PPC_CELL is not set | ||
178 | # CONFIG_PPC_CELL_NATIVE is not set | ||
179 | # CONFIG_PPC_82xx is not set | ||
180 | # CONFIG_PQ2ADS is not set | ||
181 | # CONFIG_PPC_83xx is not set | ||
182 | # CONFIG_PPC_86xx is not set | ||
183 | # CONFIG_EMBEDDED6xx is not set | ||
184 | CONFIG_AMIGAONE=y | ||
185 | # CONFIG_IPIC is not set | ||
186 | # CONFIG_MPIC is not set | ||
187 | # CONFIG_MPIC_WEIRD is not set | ||
188 | CONFIG_PPC_I8259=y | ||
189 | # CONFIG_PPC_RTAS is not set | ||
190 | # CONFIG_MMIO_NVRAM is not set | ||
191 | # CONFIG_PPC_MPC106 is not set | ||
192 | # CONFIG_PPC_970_NAP is not set | ||
193 | # CONFIG_PPC_INDIRECT_IO is not set | ||
194 | # CONFIG_GENERIC_IOMAP is not set | ||
195 | # CONFIG_CPU_FREQ is not set | ||
196 | # CONFIG_TAU is not set | ||
197 | # CONFIG_FSL_ULI1575 is not set | ||
198 | # CONFIG_SIMPLE_GPIO is not set | ||
199 | |||
200 | # | ||
201 | # Kernel options | ||
202 | # | ||
203 | CONFIG_HIGHMEM=y | ||
204 | CONFIG_TICK_ONESHOT=y | ||
205 | CONFIG_NO_HZ=y | ||
206 | CONFIG_HIGH_RES_TIMERS=y | ||
207 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
208 | # CONFIG_HZ_100 is not set | ||
209 | CONFIG_HZ_250=y | ||
210 | # CONFIG_HZ_300 is not set | ||
211 | # CONFIG_HZ_1000 is not set | ||
212 | CONFIG_HZ=250 | ||
213 | CONFIG_SCHED_HRTICK=y | ||
214 | CONFIG_PREEMPT_NONE=y | ||
215 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
216 | # CONFIG_PREEMPT is not set | ||
217 | CONFIG_BINFMT_ELF=y | ||
218 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
219 | # CONFIG_HAVE_AOUT is not set | ||
220 | CONFIG_BINFMT_MISC=y | ||
221 | # CONFIG_IOMMU_HELPER is not set | ||
222 | CONFIG_PPC_NEED_DMA_SYNC_OPS=y | ||
223 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
224 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
225 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
226 | # CONFIG_KEXEC is not set | ||
227 | # CONFIG_CRASH_DUMP is not set | ||
228 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
229 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
230 | CONFIG_SELECT_MEMORY_MODEL=y | ||
231 | CONFIG_FLATMEM_MANUAL=y | ||
232 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
233 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
234 | CONFIG_FLATMEM=y | ||
235 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
236 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
237 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
238 | # CONFIG_MIGRATION is not set | ||
239 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
240 | CONFIG_ZONE_DMA_FLAG=1 | ||
241 | CONFIG_BOUNCE=y | ||
242 | CONFIG_VIRT_TO_BUS=y | ||
243 | CONFIG_UNEVICTABLE_LRU=y | ||
244 | CONFIG_PPC_4K_PAGES=y | ||
245 | # CONFIG_PPC_16K_PAGES is not set | ||
246 | # CONFIG_PPC_64K_PAGES is not set | ||
247 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
248 | CONFIG_PROC_DEVICETREE=y | ||
249 | # CONFIG_CMDLINE_BOOL is not set | ||
250 | CONFIG_EXTRA_TARGETS="" | ||
251 | # CONFIG_PM is not set | ||
252 | CONFIG_SECCOMP=y | ||
253 | CONFIG_ISA_DMA_API=y | ||
254 | |||
255 | # | ||
256 | # Bus options | ||
257 | # | ||
258 | CONFIG_ZONE_DMA=y | ||
259 | CONFIG_GENERIC_ISA_DMA=y | ||
260 | CONFIG_PPC_INDIRECT_PCI=y | ||
261 | CONFIG_PCI=y | ||
262 | CONFIG_PCI_DOMAINS=y | ||
263 | CONFIG_PCI_SYSCALL=y | ||
264 | # CONFIG_PCIEPORTBUS is not set | ||
265 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
266 | # CONFIG_PCI_MSI is not set | ||
267 | # CONFIG_PCI_LEGACY is not set | ||
268 | # CONFIG_PCI_DEBUG is not set | ||
269 | # CONFIG_PCI_STUB is not set | ||
270 | # CONFIG_PCCARD is not set | ||
271 | # CONFIG_HOTPLUG_PCI is not set | ||
272 | # CONFIG_HAS_RAPIDIO is not set | ||
273 | |||
274 | # | ||
275 | # Advanced setup | ||
276 | # | ||
277 | # CONFIG_ADVANCED_OPTIONS is not set | ||
278 | |||
279 | # | ||
280 | # Default settings for advanced configuration options are used | ||
281 | # | ||
282 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
283 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
284 | CONFIG_KERNEL_START=0xc0000000 | ||
285 | CONFIG_PHYSICAL_START=0x00000000 | ||
286 | CONFIG_TASK_SIZE=0xc0000000 | ||
287 | CONFIG_CONSISTENT_START=0xff100000 | ||
288 | CONFIG_CONSISTENT_SIZE=0x00200000 | ||
289 | CONFIG_NET=y | ||
290 | |||
291 | # | ||
292 | # Networking options | ||
293 | # | ||
294 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
295 | CONFIG_PACKET=y | ||
296 | # CONFIG_PACKET_MMAP is not set | ||
297 | CONFIG_UNIX=y | ||
298 | # CONFIG_NET_KEY is not set | ||
299 | CONFIG_INET=y | ||
300 | CONFIG_IP_MULTICAST=y | ||
301 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
302 | CONFIG_IP_FIB_HASH=y | ||
303 | # CONFIG_IP_PNP is not set | ||
304 | # CONFIG_NET_IPIP is not set | ||
305 | # CONFIG_NET_IPGRE is not set | ||
306 | # CONFIG_IP_MROUTE is not set | ||
307 | # CONFIG_ARPD is not set | ||
308 | CONFIG_SYN_COOKIES=y | ||
309 | # CONFIG_INET_AH is not set | ||
310 | # CONFIG_INET_ESP is not set | ||
311 | # CONFIG_INET_IPCOMP is not set | ||
312 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
313 | # CONFIG_INET_TUNNEL is not set | ||
314 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
315 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
316 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
317 | # CONFIG_INET_LRO is not set | ||
318 | CONFIG_INET_DIAG=y | ||
319 | CONFIG_INET_TCP_DIAG=y | ||
320 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
321 | CONFIG_TCP_CONG_CUBIC=y | ||
322 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
323 | # CONFIG_TCP_MD5SIG is not set | ||
324 | # CONFIG_IPV6 is not set | ||
325 | # CONFIG_NETWORK_SECMARK is not set | ||
326 | CONFIG_NETFILTER=y | ||
327 | # CONFIG_NETFILTER_DEBUG is not set | ||
328 | # CONFIG_NETFILTER_ADVANCED is not set | ||
329 | |||
330 | # | ||
331 | # Core Netfilter Configuration | ||
332 | # | ||
333 | CONFIG_NETFILTER_NETLINK=m | ||
334 | CONFIG_NETFILTER_NETLINK_LOG=m | ||
335 | CONFIG_NF_CONNTRACK=m | ||
336 | CONFIG_NF_CONNTRACK_FTP=m | ||
337 | CONFIG_NF_CONNTRACK_IRC=m | ||
338 | CONFIG_NF_CONNTRACK_SIP=m | ||
339 | CONFIG_NF_CT_NETLINK=m | ||
340 | CONFIG_NETFILTER_XTABLES=m | ||
341 | # CONFIG_NETFILTER_XT_TARGET_MARK is not set | ||
342 | # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set | ||
343 | # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set | ||
344 | # CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set | ||
345 | # CONFIG_NETFILTER_XT_MATCH_MARK is not set | ||
346 | # CONFIG_NETFILTER_XT_MATCH_STATE is not set | ||
347 | # CONFIG_IP_VS is not set | ||
348 | |||
349 | # | ||
350 | # IP: Netfilter Configuration | ||
351 | # | ||
352 | CONFIG_NF_DEFRAG_IPV4=m | ||
353 | CONFIG_NF_CONNTRACK_IPV4=m | ||
354 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y | ||
355 | CONFIG_IP_NF_IPTABLES=m | ||
356 | CONFIG_IP_NF_FILTER=m | ||
357 | CONFIG_IP_NF_TARGET_REJECT=m | ||
358 | CONFIG_IP_NF_TARGET_LOG=m | ||
359 | # CONFIG_IP_NF_TARGET_ULOG is not set | ||
360 | CONFIG_NF_NAT=m | ||
361 | CONFIG_NF_NAT_NEEDED=y | ||
362 | CONFIG_IP_NF_TARGET_MASQUERADE=m | ||
363 | CONFIG_NF_NAT_FTP=m | ||
364 | CONFIG_NF_NAT_IRC=m | ||
365 | # CONFIG_NF_NAT_TFTP is not set | ||
366 | # CONFIG_NF_NAT_AMANDA is not set | ||
367 | # CONFIG_NF_NAT_PPTP is not set | ||
368 | # CONFIG_NF_NAT_H323 is not set | ||
369 | CONFIG_NF_NAT_SIP=m | ||
370 | # CONFIG_IP_NF_MANGLE is not set | ||
371 | # CONFIG_IP_DCCP is not set | ||
372 | # CONFIG_IP_SCTP is not set | ||
373 | # CONFIG_TIPC is not set | ||
374 | # CONFIG_ATM is not set | ||
375 | # CONFIG_BRIDGE is not set | ||
376 | # CONFIG_NET_DSA is not set | ||
377 | # CONFIG_VLAN_8021Q is not set | ||
378 | # CONFIG_DECNET is not set | ||
379 | # CONFIG_LLC2 is not set | ||
380 | # CONFIG_IPX is not set | ||
381 | # CONFIG_ATALK is not set | ||
382 | # CONFIG_X25 is not set | ||
383 | # CONFIG_LAPB is not set | ||
384 | # CONFIG_ECONET is not set | ||
385 | # CONFIG_WAN_ROUTER is not set | ||
386 | # CONFIG_NET_SCHED is not set | ||
387 | # CONFIG_DCB is not set | ||
388 | |||
389 | # | ||
390 | # Network testing | ||
391 | # | ||
392 | # CONFIG_NET_PKTGEN is not set | ||
393 | # CONFIG_HAMRADIO is not set | ||
394 | # CONFIG_CAN is not set | ||
395 | # CONFIG_IRDA is not set | ||
396 | # CONFIG_BT is not set | ||
397 | # CONFIG_AF_RXRPC is not set | ||
398 | # CONFIG_PHONET is not set | ||
399 | # CONFIG_WIRELESS is not set | ||
400 | # CONFIG_WIMAX is not set | ||
401 | # CONFIG_RFKILL is not set | ||
402 | # CONFIG_NET_9P is not set | ||
403 | |||
404 | # | ||
405 | # Device Drivers | ||
406 | # | ||
407 | |||
408 | # | ||
409 | # Generic Driver Options | ||
410 | # | ||
411 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
412 | # CONFIG_STANDALONE is not set | ||
413 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
414 | CONFIG_FW_LOADER=y | ||
415 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
416 | CONFIG_EXTRA_FIRMWARE="" | ||
417 | # CONFIG_DEBUG_DRIVER is not set | ||
418 | # CONFIG_DEBUG_DEVRES is not set | ||
419 | # CONFIG_SYS_HYPERVISOR is not set | ||
420 | # CONFIG_CONNECTOR is not set | ||
421 | # CONFIG_MTD is not set | ||
422 | CONFIG_OF_DEVICE=y | ||
423 | CONFIG_OF_I2C=y | ||
424 | CONFIG_PARPORT=y | ||
425 | CONFIG_PARPORT_PC=y | ||
426 | # CONFIG_PARPORT_SERIAL is not set | ||
427 | CONFIG_PARPORT_PC_FIFO=y | ||
428 | # CONFIG_PARPORT_PC_SUPERIO is not set | ||
429 | # CONFIG_PARPORT_GSC is not set | ||
430 | # CONFIG_PARPORT_AX88796 is not set | ||
431 | # CONFIG_PARPORT_1284 is not set | ||
432 | CONFIG_BLK_DEV=y | ||
433 | CONFIG_BLK_DEV_FD=y | ||
434 | # CONFIG_PARIDE is not set | ||
435 | # CONFIG_BLK_CPQ_DA is not set | ||
436 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
437 | # CONFIG_BLK_DEV_DAC960 is not set | ||
438 | # CONFIG_BLK_DEV_UMEM is not set | ||
439 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
440 | CONFIG_BLK_DEV_LOOP=y | ||
441 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
442 | # CONFIG_BLK_DEV_NBD is not set | ||
443 | # CONFIG_BLK_DEV_SX8 is not set | ||
444 | # CONFIG_BLK_DEV_UB is not set | ||
445 | CONFIG_BLK_DEV_RAM=y | ||
446 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
447 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
448 | # CONFIG_BLK_DEV_XIP is not set | ||
449 | # CONFIG_CDROM_PKTCDVD is not set | ||
450 | # CONFIG_ATA_OVER_ETH is not set | ||
451 | # CONFIG_BLK_DEV_HD is not set | ||
452 | CONFIG_MISC_DEVICES=y | ||
453 | # CONFIG_PHANTOM is not set | ||
454 | # CONFIG_SGI_IOC4 is not set | ||
455 | # CONFIG_TIFM_CORE is not set | ||
456 | # CONFIG_ICS932S401 is not set | ||
457 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
458 | # CONFIG_HP_ILO is not set | ||
459 | # CONFIG_C2PORT is not set | ||
460 | |||
461 | # | ||
462 | # EEPROM support | ||
463 | # | ||
464 | # CONFIG_EEPROM_AT24 is not set | ||
465 | # CONFIG_EEPROM_LEGACY is not set | ||
466 | # CONFIG_EEPROM_93CX6 is not set | ||
467 | CONFIG_HAVE_IDE=y | ||
468 | CONFIG_IDE=y | ||
469 | |||
470 | # | ||
471 | # Please see Documentation/ide/ide.txt for help/info on IDE drives | ||
472 | # | ||
473 | CONFIG_IDE_TIMINGS=y | ||
474 | CONFIG_IDE_ATAPI=y | ||
475 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
476 | CONFIG_IDE_GD=y | ||
477 | CONFIG_IDE_GD_ATA=y | ||
478 | # CONFIG_IDE_GD_ATAPI is not set | ||
479 | CONFIG_BLK_DEV_IDECD=y | ||
480 | CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y | ||
481 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
482 | # CONFIG_IDE_TASK_IOCTL is not set | ||
483 | CONFIG_IDE_PROC_FS=y | ||
484 | |||
485 | # | ||
486 | # IDE chipset support/bugfixes | ||
487 | # | ||
488 | # CONFIG_BLK_DEV_PLATFORM is not set | ||
489 | CONFIG_BLK_DEV_IDEDMA_SFF=y | ||
490 | |||
491 | # | ||
492 | # PCI IDE chipsets support | ||
493 | # | ||
494 | CONFIG_BLK_DEV_IDEPCI=y | ||
495 | # CONFIG_IDEPCI_PCIBUS_ORDER is not set | ||
496 | # CONFIG_BLK_DEV_OFFBOARD is not set | ||
497 | CONFIG_BLK_DEV_GENERIC=y | ||
498 | # CONFIG_BLK_DEV_OPTI621 is not set | ||
499 | CONFIG_BLK_DEV_IDEDMA_PCI=y | ||
500 | # CONFIG_BLK_DEV_AEC62XX is not set | ||
501 | # CONFIG_BLK_DEV_ALI15X3 is not set | ||
502 | # CONFIG_BLK_DEV_AMD74XX is not set | ||
503 | # CONFIG_BLK_DEV_CMD64X is not set | ||
504 | # CONFIG_BLK_DEV_TRIFLEX is not set | ||
505 | # CONFIG_BLK_DEV_CS5520 is not set | ||
506 | # CONFIG_BLK_DEV_CS5530 is not set | ||
507 | # CONFIG_BLK_DEV_HPT366 is not set | ||
508 | # CONFIG_BLK_DEV_JMICRON is not set | ||
509 | # CONFIG_BLK_DEV_SC1200 is not set | ||
510 | # CONFIG_BLK_DEV_PIIX is not set | ||
511 | # CONFIG_BLK_DEV_IT8172 is not set | ||
512 | # CONFIG_BLK_DEV_IT8213 is not set | ||
513 | # CONFIG_BLK_DEV_IT821X is not set | ||
514 | # CONFIG_BLK_DEV_NS87415 is not set | ||
515 | # CONFIG_BLK_DEV_PDC202XX_OLD is not set | ||
516 | # CONFIG_BLK_DEV_PDC202XX_NEW is not set | ||
517 | # CONFIG_BLK_DEV_SVWKS is not set | ||
518 | CONFIG_BLK_DEV_SIIMAGE=y | ||
519 | # CONFIG_BLK_DEV_SL82C105 is not set | ||
520 | # CONFIG_BLK_DEV_SLC90E66 is not set | ||
521 | # CONFIG_BLK_DEV_TRM290 is not set | ||
522 | CONFIG_BLK_DEV_VIA82CXXX=y | ||
523 | # CONFIG_BLK_DEV_TC86C001 is not set | ||
524 | CONFIG_BLK_DEV_IDEDMA=y | ||
525 | |||
526 | # | ||
527 | # SCSI device support | ||
528 | # | ||
529 | # CONFIG_RAID_ATTRS is not set | ||
530 | CONFIG_SCSI=y | ||
531 | CONFIG_SCSI_DMA=y | ||
532 | # CONFIG_SCSI_TGT is not set | ||
533 | # CONFIG_SCSI_NETLINK is not set | ||
534 | CONFIG_SCSI_PROC_FS=y | ||
535 | |||
536 | # | ||
537 | # SCSI support type (disk, tape, CD-ROM) | ||
538 | # | ||
539 | CONFIG_BLK_DEV_SD=y | ||
540 | CONFIG_CHR_DEV_ST=y | ||
541 | # CONFIG_CHR_DEV_OSST is not set | ||
542 | CONFIG_BLK_DEV_SR=y | ||
543 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
544 | CONFIG_CHR_DEV_SG=y | ||
545 | # CONFIG_CHR_DEV_SCH is not set | ||
546 | |||
547 | # | ||
548 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
549 | # | ||
550 | # CONFIG_SCSI_MULTI_LUN is not set | ||
551 | CONFIG_SCSI_CONSTANTS=y | ||
552 | # CONFIG_SCSI_LOGGING is not set | ||
553 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
554 | CONFIG_SCSI_WAIT_SCAN=m | ||
555 | |||
556 | # | ||
557 | # SCSI Transports | ||
558 | # | ||
559 | CONFIG_SCSI_SPI_ATTRS=y | ||
560 | # CONFIG_SCSI_FC_ATTRS is not set | ||
561 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
562 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
563 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
564 | CONFIG_SCSI_LOWLEVEL=y | ||
565 | # CONFIG_ISCSI_TCP is not set | ||
566 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
567 | # CONFIG_SCSI_3W_9XXX is not set | ||
568 | # CONFIG_SCSI_ACARD is not set | ||
569 | # CONFIG_SCSI_AACRAID is not set | ||
570 | # CONFIG_SCSI_AIC7XXX is not set | ||
571 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
572 | # CONFIG_SCSI_AIC79XX is not set | ||
573 | # CONFIG_SCSI_AIC94XX is not set | ||
574 | # CONFIG_SCSI_DPT_I2O is not set | ||
575 | # CONFIG_SCSI_ADVANSYS is not set | ||
576 | # CONFIG_SCSI_ARCMSR is not set | ||
577 | # CONFIG_MEGARAID_NEWGEN is not set | ||
578 | # CONFIG_MEGARAID_LEGACY is not set | ||
579 | # CONFIG_MEGARAID_SAS is not set | ||
580 | # CONFIG_SCSI_HPTIOP is not set | ||
581 | # CONFIG_SCSI_BUSLOGIC is not set | ||
582 | # CONFIG_LIBFC is not set | ||
583 | # CONFIG_FCOE is not set | ||
584 | # CONFIG_SCSI_DMX3191D is not set | ||
585 | # CONFIG_SCSI_EATA is not set | ||
586 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
587 | # CONFIG_SCSI_GDTH is not set | ||
588 | # CONFIG_SCSI_IPS is not set | ||
589 | # CONFIG_SCSI_INITIO is not set | ||
590 | # CONFIG_SCSI_INIA100 is not set | ||
591 | # CONFIG_SCSI_PPA is not set | ||
592 | # CONFIG_SCSI_IMM is not set | ||
593 | # CONFIG_SCSI_MVSAS is not set | ||
594 | # CONFIG_SCSI_STEX is not set | ||
595 | CONFIG_SCSI_SYM53C8XX_2=y | ||
596 | CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0 | ||
597 | CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 | ||
598 | CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 | ||
599 | # CONFIG_SCSI_SYM53C8XX_MMIO is not set | ||
600 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
601 | # CONFIG_SCSI_QLA_FC is not set | ||
602 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
603 | # CONFIG_SCSI_LPFC is not set | ||
604 | # CONFIG_SCSI_DC395x is not set | ||
605 | # CONFIG_SCSI_DC390T is not set | ||
606 | # CONFIG_SCSI_NSP32 is not set | ||
607 | # CONFIG_SCSI_DEBUG is not set | ||
608 | # CONFIG_SCSI_SRP is not set | ||
609 | # CONFIG_SCSI_DH is not set | ||
610 | # CONFIG_ATA is not set | ||
611 | # CONFIG_MD is not set | ||
612 | # CONFIG_FUSION is not set | ||
613 | |||
614 | # | ||
615 | # IEEE 1394 (FireWire) support | ||
616 | # | ||
617 | |||
618 | # | ||
619 | # Enable only one of the two stacks, unless you know what you are doing | ||
620 | # | ||
621 | # CONFIG_FIREWIRE is not set | ||
622 | # CONFIG_IEEE1394 is not set | ||
623 | # CONFIG_I2O is not set | ||
624 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
625 | CONFIG_NETDEVICES=y | ||
626 | # CONFIG_DUMMY is not set | ||
627 | # CONFIG_BONDING is not set | ||
628 | # CONFIG_MACVLAN is not set | ||
629 | # CONFIG_EQUALIZER is not set | ||
630 | # CONFIG_TUN is not set | ||
631 | # CONFIG_VETH is not set | ||
632 | # CONFIG_ARCNET is not set | ||
633 | CONFIG_PHYLIB=y | ||
634 | |||
635 | # | ||
636 | # MII PHY device drivers | ||
637 | # | ||
638 | # CONFIG_MARVELL_PHY is not set | ||
639 | # CONFIG_DAVICOM_PHY is not set | ||
640 | # CONFIG_QSEMI_PHY is not set | ||
641 | # CONFIG_LXT_PHY is not set | ||
642 | # CONFIG_CICADA_PHY is not set | ||
643 | # CONFIG_VITESSE_PHY is not set | ||
644 | # CONFIG_SMSC_PHY is not set | ||
645 | # CONFIG_BROADCOM_PHY is not set | ||
646 | # CONFIG_ICPLUS_PHY is not set | ||
647 | # CONFIG_REALTEK_PHY is not set | ||
648 | # CONFIG_NATIONAL_PHY is not set | ||
649 | # CONFIG_STE10XP is not set | ||
650 | # CONFIG_LSI_ET1011C_PHY is not set | ||
651 | # CONFIG_FIXED_PHY is not set | ||
652 | # CONFIG_MDIO_BITBANG is not set | ||
653 | CONFIG_NET_ETHERNET=y | ||
654 | CONFIG_MII=y | ||
655 | # CONFIG_HAPPYMEAL is not set | ||
656 | # CONFIG_SUNGEM is not set | ||
657 | # CONFIG_CASSINI is not set | ||
658 | CONFIG_NET_VENDOR_3COM=y | ||
659 | CONFIG_VORTEX=y | ||
660 | # CONFIG_TYPHOON is not set | ||
661 | # CONFIG_NET_TULIP is not set | ||
662 | # CONFIG_HP100 is not set | ||
663 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
664 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
665 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
666 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
667 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
668 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
669 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
670 | CONFIG_NET_PCI=y | ||
671 | # CONFIG_PCNET32 is not set | ||
672 | # CONFIG_AMD8111_ETH is not set | ||
673 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
674 | # CONFIG_B44 is not set | ||
675 | # CONFIG_FORCEDETH is not set | ||
676 | # CONFIG_E100 is not set | ||
677 | # CONFIG_FEALNX is not set | ||
678 | # CONFIG_NATSEMI is not set | ||
679 | # CONFIG_NE2K_PCI is not set | ||
680 | CONFIG_8139CP=y | ||
681 | CONFIG_8139TOO=y | ||
682 | CONFIG_8139TOO_PIO=y | ||
683 | # CONFIG_8139TOO_TUNE_TWISTER is not set | ||
684 | # CONFIG_8139TOO_8129 is not set | ||
685 | # CONFIG_8139_OLD_RX_RESET is not set | ||
686 | # CONFIG_R6040 is not set | ||
687 | # CONFIG_SIS900 is not set | ||
688 | # CONFIG_EPIC100 is not set | ||
689 | # CONFIG_SMSC9420 is not set | ||
690 | # CONFIG_SUNDANCE is not set | ||
691 | # CONFIG_TLAN is not set | ||
692 | # CONFIG_VIA_RHINE is not set | ||
693 | # CONFIG_SC92031 is not set | ||
694 | # CONFIG_NET_POCKET is not set | ||
695 | # CONFIG_ATL2 is not set | ||
696 | # CONFIG_NETDEV_1000 is not set | ||
697 | # CONFIG_NETDEV_10000 is not set | ||
698 | # CONFIG_TR is not set | ||
699 | |||
700 | # | ||
701 | # Wireless LAN | ||
702 | # | ||
703 | # CONFIG_WLAN_PRE80211 is not set | ||
704 | # CONFIG_WLAN_80211 is not set | ||
705 | # CONFIG_IWLWIFI_LEDS is not set | ||
706 | |||
707 | # | ||
708 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
709 | # | ||
710 | |||
711 | # | ||
712 | # USB Network Adapters | ||
713 | # | ||
714 | # CONFIG_USB_CATC is not set | ||
715 | # CONFIG_USB_KAWETH is not set | ||
716 | # CONFIG_USB_PEGASUS is not set | ||
717 | # CONFIG_USB_RTL8150 is not set | ||
718 | # CONFIG_USB_USBNET is not set | ||
719 | # CONFIG_WAN is not set | ||
720 | # CONFIG_FDDI is not set | ||
721 | # CONFIG_HIPPI is not set | ||
722 | # CONFIG_PLIP is not set | ||
723 | CONFIG_PPP=m | ||
724 | CONFIG_PPP_MULTILINK=y | ||
725 | CONFIG_PPP_FILTER=y | ||
726 | CONFIG_PPP_ASYNC=m | ||
727 | CONFIG_PPP_SYNC_TTY=m | ||
728 | CONFIG_PPP_DEFLATE=m | ||
729 | CONFIG_PPP_BSDCOMP=m | ||
730 | CONFIG_PPP_MPPE=m | ||
731 | CONFIG_PPPOE=m | ||
732 | # CONFIG_PPPOL2TP is not set | ||
733 | # CONFIG_SLIP is not set | ||
734 | CONFIG_SLHC=m | ||
735 | # CONFIG_NET_FC is not set | ||
736 | # CONFIG_NETCONSOLE is not set | ||
737 | # CONFIG_NETPOLL is not set | ||
738 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
739 | # CONFIG_ISDN is not set | ||
740 | # CONFIG_PHONE is not set | ||
741 | |||
742 | # | ||
743 | # Input device support | ||
744 | # | ||
745 | CONFIG_INPUT=y | ||
746 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
747 | # CONFIG_INPUT_POLLDEV is not set | ||
748 | |||
749 | # | ||
750 | # Userland interfaces | ||
751 | # | ||
752 | CONFIG_INPUT_MOUSEDEV=y | ||
753 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
754 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
755 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
756 | # CONFIG_INPUT_JOYDEV is not set | ||
757 | CONFIG_INPUT_EVDEV=y | ||
758 | # CONFIG_INPUT_EVBUG is not set | ||
759 | |||
760 | # | ||
761 | # Input Device Drivers | ||
762 | # | ||
763 | CONFIG_INPUT_KEYBOARD=y | ||
764 | CONFIG_KEYBOARD_ATKBD=y | ||
765 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
766 | # CONFIG_KEYBOARD_LKKBD is not set | ||
767 | # CONFIG_KEYBOARD_XTKBD is not set | ||
768 | # CONFIG_KEYBOARD_NEWTON is not set | ||
769 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
770 | CONFIG_INPUT_MOUSE=y | ||
771 | CONFIG_MOUSE_PS2=y | ||
772 | CONFIG_MOUSE_PS2_ALPS=y | ||
773 | CONFIG_MOUSE_PS2_LOGIPS2PP=y | ||
774 | CONFIG_MOUSE_PS2_SYNAPTICS=y | ||
775 | CONFIG_MOUSE_PS2_LIFEBOOK=y | ||
776 | CONFIG_MOUSE_PS2_TRACKPOINT=y | ||
777 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
778 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
779 | # CONFIG_MOUSE_SERIAL is not set | ||
780 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
781 | # CONFIG_MOUSE_BCM5974 is not set | ||
782 | # CONFIG_MOUSE_VSXXXAA is not set | ||
783 | # CONFIG_INPUT_JOYSTICK is not set | ||
784 | # CONFIG_INPUT_TABLET is not set | ||
785 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
786 | CONFIG_INPUT_MISC=y | ||
787 | CONFIG_INPUT_PCSPKR=y | ||
788 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
789 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
790 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
791 | # CONFIG_INPUT_POWERMATE is not set | ||
792 | # CONFIG_INPUT_YEALINK is not set | ||
793 | # CONFIG_INPUT_CM109 is not set | ||
794 | CONFIG_INPUT_UINPUT=y | ||
795 | |||
796 | # | ||
797 | # Hardware I/O ports | ||
798 | # | ||
799 | CONFIG_SERIO=y | ||
800 | CONFIG_SERIO_I8042=y | ||
801 | CONFIG_SERIO_SERPORT=y | ||
802 | # CONFIG_SERIO_PARKBD is not set | ||
803 | # CONFIG_SERIO_PCIPS2 is not set | ||
804 | CONFIG_SERIO_LIBPS2=y | ||
805 | # CONFIG_SERIO_RAW is not set | ||
806 | # CONFIG_SERIO_XILINX_XPS_PS2 is not set | ||
807 | # CONFIG_GAMEPORT is not set | ||
808 | |||
809 | # | ||
810 | # Character devices | ||
811 | # | ||
812 | CONFIG_VT=y | ||
813 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
814 | CONFIG_VT_CONSOLE=y | ||
815 | CONFIG_HW_CONSOLE=y | ||
816 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
817 | CONFIG_DEVKMEM=y | ||
818 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
819 | # CONFIG_NOZOMI is not set | ||
820 | |||
821 | # | ||
822 | # Serial drivers | ||
823 | # | ||
824 | CONFIG_SERIAL_8250=y | ||
825 | CONFIG_SERIAL_8250_CONSOLE=y | ||
826 | CONFIG_SERIAL_8250_PCI=y | ||
827 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
828 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
829 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
830 | |||
831 | # | ||
832 | # Non-8250 serial port support | ||
833 | # | ||
834 | # CONFIG_SERIAL_UARTLITE is not set | ||
835 | CONFIG_SERIAL_CORE=y | ||
836 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
837 | # CONFIG_SERIAL_JSM is not set | ||
838 | # CONFIG_SERIAL_OF_PLATFORM is not set | ||
839 | CONFIG_UNIX98_PTYS=y | ||
840 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
841 | CONFIG_LEGACY_PTYS=y | ||
842 | CONFIG_LEGACY_PTY_COUNT=256 | ||
843 | # CONFIG_PRINTER is not set | ||
844 | # CONFIG_PPDEV is not set | ||
845 | # CONFIG_HVC_UDBG is not set | ||
846 | # CONFIG_IPMI_HANDLER is not set | ||
847 | # CONFIG_HW_RANDOM is not set | ||
848 | # CONFIG_NVRAM is not set | ||
849 | # CONFIG_R3964 is not set | ||
850 | # CONFIG_APPLICOM is not set | ||
851 | # CONFIG_RAW_DRIVER is not set | ||
852 | # CONFIG_TCG_TPM is not set | ||
853 | CONFIG_DEVPORT=y | ||
854 | CONFIG_I2C=y | ||
855 | CONFIG_I2C_BOARDINFO=y | ||
856 | # CONFIG_I2C_CHARDEV is not set | ||
857 | CONFIG_I2C_HELPER_AUTO=y | ||
858 | CONFIG_I2C_ALGOBIT=y | ||
859 | |||
860 | # | ||
861 | # I2C Hardware Bus support | ||
862 | # | ||
863 | |||
864 | # | ||
865 | # PC SMBus host controller drivers | ||
866 | # | ||
867 | # CONFIG_I2C_ALI1535 is not set | ||
868 | # CONFIG_I2C_ALI1563 is not set | ||
869 | # CONFIG_I2C_ALI15X3 is not set | ||
870 | # CONFIG_I2C_AMD756 is not set | ||
871 | # CONFIG_I2C_AMD8111 is not set | ||
872 | # CONFIG_I2C_I801 is not set | ||
873 | # CONFIG_I2C_ISCH is not set | ||
874 | # CONFIG_I2C_PIIX4 is not set | ||
875 | # CONFIG_I2C_NFORCE2 is not set | ||
876 | # CONFIG_I2C_SIS5595 is not set | ||
877 | # CONFIG_I2C_SIS630 is not set | ||
878 | # CONFIG_I2C_SIS96X is not set | ||
879 | # CONFIG_I2C_VIA is not set | ||
880 | # CONFIG_I2C_VIAPRO is not set | ||
881 | |||
882 | # | ||
883 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
884 | # | ||
885 | # CONFIG_I2C_MPC is not set | ||
886 | # CONFIG_I2C_OCORES is not set | ||
887 | # CONFIG_I2C_SIMTEC is not set | ||
888 | |||
889 | # | ||
890 | # External I2C/SMBus adapter drivers | ||
891 | # | ||
892 | # CONFIG_I2C_PARPORT is not set | ||
893 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
894 | # CONFIG_I2C_TAOS_EVM is not set | ||
895 | # CONFIG_I2C_TINY_USB is not set | ||
896 | |||
897 | # | ||
898 | # Graphics adapter I2C/DDC channel drivers | ||
899 | # | ||
900 | # CONFIG_I2C_VOODOO3 is not set | ||
901 | |||
902 | # | ||
903 | # Other I2C/SMBus bus drivers | ||
904 | # | ||
905 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
906 | # CONFIG_I2C_STUB is not set | ||
907 | |||
908 | # | ||
909 | # Miscellaneous I2C Chip support | ||
910 | # | ||
911 | # CONFIG_DS1682 is not set | ||
912 | # CONFIG_SENSORS_PCF8574 is not set | ||
913 | # CONFIG_PCF8575 is not set | ||
914 | # CONFIG_SENSORS_PCA9539 is not set | ||
915 | # CONFIG_SENSORS_PCF8591 is not set | ||
916 | # CONFIG_SENSORS_MAX6875 is not set | ||
917 | # CONFIG_SENSORS_TSL2550 is not set | ||
918 | # CONFIG_I2C_DEBUG_CORE is not set | ||
919 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
920 | # CONFIG_I2C_DEBUG_BUS is not set | ||
921 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
922 | # CONFIG_SPI is not set | ||
923 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
924 | # CONFIG_GPIOLIB is not set | ||
925 | # CONFIG_W1 is not set | ||
926 | # CONFIG_POWER_SUPPLY is not set | ||
927 | # CONFIG_HWMON is not set | ||
928 | # CONFIG_THERMAL is not set | ||
929 | # CONFIG_THERMAL_HWMON is not set | ||
930 | # CONFIG_WATCHDOG is not set | ||
931 | CONFIG_SSB_POSSIBLE=y | ||
932 | |||
933 | # | ||
934 | # Sonics Silicon Backplane | ||
935 | # | ||
936 | # CONFIG_SSB is not set | ||
937 | |||
938 | # | ||
939 | # Multifunction device drivers | ||
940 | # | ||
941 | # CONFIG_MFD_CORE is not set | ||
942 | # CONFIG_MFD_SM501 is not set | ||
943 | # CONFIG_HTC_PASIC3 is not set | ||
944 | # CONFIG_TWL4030_CORE is not set | ||
945 | # CONFIG_MFD_TMIO is not set | ||
946 | # CONFIG_PMIC_DA903X is not set | ||
947 | # CONFIG_MFD_WM8400 is not set | ||
948 | # CONFIG_MFD_WM8350_I2C is not set | ||
949 | # CONFIG_MFD_PCF50633 is not set | ||
950 | # CONFIG_REGULATOR is not set | ||
951 | |||
952 | # | ||
953 | # Multimedia devices | ||
954 | # | ||
955 | |||
956 | # | ||
957 | # Multimedia core support | ||
958 | # | ||
959 | # CONFIG_VIDEO_DEV is not set | ||
960 | # CONFIG_DVB_CORE is not set | ||
961 | # CONFIG_VIDEO_MEDIA is not set | ||
962 | |||
963 | # | ||
964 | # Multimedia drivers | ||
965 | # | ||
966 | # CONFIG_DAB is not set | ||
967 | |||
968 | # | ||
969 | # Graphics support | ||
970 | # | ||
971 | # CONFIG_AGP is not set | ||
972 | # CONFIG_DRM is not set | ||
973 | # CONFIG_VGASTATE is not set | ||
974 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
975 | CONFIG_FB=y | ||
976 | CONFIG_FIRMWARE_EDID=y | ||
977 | CONFIG_FB_DDC=y | ||
978 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
979 | CONFIG_FB_CFB_FILLRECT=y | ||
980 | CONFIG_FB_CFB_COPYAREA=y | ||
981 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
982 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
983 | # CONFIG_FB_SYS_FILLRECT is not set | ||
984 | # CONFIG_FB_SYS_COPYAREA is not set | ||
985 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
986 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
987 | # CONFIG_FB_SYS_FOPS is not set | ||
988 | # CONFIG_FB_SVGALIB is not set | ||
989 | CONFIG_FB_MACMODES=y | ||
990 | CONFIG_FB_BACKLIGHT=y | ||
991 | CONFIG_FB_MODE_HELPERS=y | ||
992 | CONFIG_FB_TILEBLITTING=y | ||
993 | |||
994 | # | ||
995 | # Frame buffer hardware drivers | ||
996 | # | ||
997 | # CONFIG_FB_CIRRUS is not set | ||
998 | # CONFIG_FB_PM2 is not set | ||
999 | # CONFIG_FB_CYBER2000 is not set | ||
1000 | # CONFIG_FB_OF is not set | ||
1001 | # CONFIG_FB_CT65550 is not set | ||
1002 | # CONFIG_FB_ASILIANT is not set | ||
1003 | # CONFIG_FB_IMSTT is not set | ||
1004 | # CONFIG_FB_VGA16 is not set | ||
1005 | # CONFIG_FB_S1D13XXX is not set | ||
1006 | # CONFIG_FB_NVIDIA is not set | ||
1007 | # CONFIG_FB_RIVA is not set | ||
1008 | # CONFIG_FB_MATROX is not set | ||
1009 | CONFIG_FB_RADEON=y | ||
1010 | CONFIG_FB_RADEON_I2C=y | ||
1011 | CONFIG_FB_RADEON_BACKLIGHT=y | ||
1012 | # CONFIG_FB_RADEON_DEBUG is not set | ||
1013 | # CONFIG_FB_ATY128 is not set | ||
1014 | # CONFIG_FB_ATY is not set | ||
1015 | # CONFIG_FB_S3 is not set | ||
1016 | # CONFIG_FB_SAVAGE is not set | ||
1017 | # CONFIG_FB_SIS is not set | ||
1018 | # CONFIG_FB_VIA is not set | ||
1019 | # CONFIG_FB_NEOMAGIC is not set | ||
1020 | # CONFIG_FB_KYRO is not set | ||
1021 | CONFIG_FB_3DFX=y | ||
1022 | # CONFIG_FB_3DFX_ACCEL is not set | ||
1023 | # CONFIG_FB_VOODOO1 is not set | ||
1024 | # CONFIG_FB_VT8623 is not set | ||
1025 | # CONFIG_FB_TRIDENT is not set | ||
1026 | # CONFIG_FB_ARK is not set | ||
1027 | # CONFIG_FB_PM3 is not set | ||
1028 | # CONFIG_FB_CARMINE is not set | ||
1029 | # CONFIG_FB_IBM_GXT4500 is not set | ||
1030 | # CONFIG_FB_VIRTUAL is not set | ||
1031 | # CONFIG_FB_METRONOME is not set | ||
1032 | # CONFIG_FB_MB862XX is not set | ||
1033 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
1034 | CONFIG_LCD_CLASS_DEVICE=m | ||
1035 | # CONFIG_LCD_ILI9320 is not set | ||
1036 | # CONFIG_LCD_PLATFORM is not set | ||
1037 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
1038 | CONFIG_BACKLIGHT_GENERIC=y | ||
1039 | |||
1040 | # | ||
1041 | # Display device support | ||
1042 | # | ||
1043 | CONFIG_DISPLAY_SUPPORT=m | ||
1044 | |||
1045 | # | ||
1046 | # Display hardware drivers | ||
1047 | # | ||
1048 | |||
1049 | # | ||
1050 | # Console display driver support | ||
1051 | # | ||
1052 | CONFIG_VGA_CONSOLE=y | ||
1053 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set | ||
1054 | CONFIG_DUMMY_CONSOLE=y | ||
1055 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
1056 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
1057 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
1058 | # CONFIG_FONTS is not set | ||
1059 | CONFIG_FONT_8x8=y | ||
1060 | CONFIG_FONT_8x16=y | ||
1061 | CONFIG_LOGO=y | ||
1062 | CONFIG_LOGO_LINUX_MONO=y | ||
1063 | CONFIG_LOGO_LINUX_VGA16=y | ||
1064 | CONFIG_LOGO_LINUX_CLUT224=y | ||
1065 | # CONFIG_SOUND is not set | ||
1066 | CONFIG_HID_SUPPORT=y | ||
1067 | CONFIG_HID=y | ||
1068 | # CONFIG_HID_DEBUG is not set | ||
1069 | # CONFIG_HIDRAW is not set | ||
1070 | |||
1071 | # | ||
1072 | # USB Input Devices | ||
1073 | # | ||
1074 | CONFIG_USB_HID=y | ||
1075 | # CONFIG_HID_PID is not set | ||
1076 | # CONFIG_USB_HIDDEV is not set | ||
1077 | |||
1078 | # | ||
1079 | # Special HID drivers | ||
1080 | # | ||
1081 | CONFIG_HID_COMPAT=y | ||
1082 | CONFIG_HID_A4TECH=y | ||
1083 | CONFIG_HID_APPLE=y | ||
1084 | CONFIG_HID_BELKIN=y | ||
1085 | CONFIG_HID_CHERRY=y | ||
1086 | CONFIG_HID_CHICONY=y | ||
1087 | CONFIG_HID_CYPRESS=y | ||
1088 | CONFIG_HID_EZKEY=y | ||
1089 | CONFIG_HID_GYRATION=y | ||
1090 | CONFIG_HID_LOGITECH=y | ||
1091 | # CONFIG_LOGITECH_FF is not set | ||
1092 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
1093 | CONFIG_HID_MICROSOFT=y | ||
1094 | CONFIG_HID_MONTEREY=y | ||
1095 | CONFIG_HID_NTRIG=y | ||
1096 | CONFIG_HID_PANTHERLORD=y | ||
1097 | # CONFIG_PANTHERLORD_FF is not set | ||
1098 | CONFIG_HID_PETALYNX=y | ||
1099 | CONFIG_HID_SAMSUNG=y | ||
1100 | CONFIG_HID_SONY=y | ||
1101 | CONFIG_HID_SUNPLUS=y | ||
1102 | # CONFIG_GREENASIA_FF is not set | ||
1103 | CONFIG_HID_TOPSEED=y | ||
1104 | # CONFIG_THRUSTMASTER_FF is not set | ||
1105 | # CONFIG_ZEROPLUS_FF is not set | ||
1106 | CONFIG_USB_SUPPORT=y | ||
1107 | CONFIG_USB_ARCH_HAS_HCD=y | ||
1108 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
1109 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
1110 | CONFIG_USB=y | ||
1111 | # CONFIG_USB_DEBUG is not set | ||
1112 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
1113 | |||
1114 | # | ||
1115 | # Miscellaneous USB options | ||
1116 | # | ||
1117 | CONFIG_USB_DEVICEFS=y | ||
1118 | CONFIG_USB_DEVICE_CLASS=y | ||
1119 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
1120 | # CONFIG_USB_OTG is not set | ||
1121 | CONFIG_USB_MON=y | ||
1122 | # CONFIG_USB_WUSB is not set | ||
1123 | # CONFIG_USB_WUSB_CBAF is not set | ||
1124 | |||
1125 | # | ||
1126 | # USB Host Controller Drivers | ||
1127 | # | ||
1128 | # CONFIG_USB_C67X00_HCD is not set | ||
1129 | # CONFIG_USB_EHCI_HCD is not set | ||
1130 | # CONFIG_USB_OXU210HP_HCD is not set | ||
1131 | # CONFIG_USB_ISP116X_HCD is not set | ||
1132 | # CONFIG_USB_ISP1760_HCD is not set | ||
1133 | CONFIG_USB_OHCI_HCD=y | ||
1134 | # CONFIG_USB_OHCI_HCD_PPC_OF is not set | ||
1135 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
1136 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
1137 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
1138 | CONFIG_USB_UHCI_HCD=y | ||
1139 | # CONFIG_USB_SL811_HCD is not set | ||
1140 | # CONFIG_USB_R8A66597_HCD is not set | ||
1141 | # CONFIG_USB_WHCI_HCD is not set | ||
1142 | # CONFIG_USB_HWA_HCD is not set | ||
1143 | |||
1144 | # | ||
1145 | # USB Device Class drivers | ||
1146 | # | ||
1147 | # CONFIG_USB_ACM is not set | ||
1148 | # CONFIG_USB_PRINTER is not set | ||
1149 | # CONFIG_USB_WDM is not set | ||
1150 | # CONFIG_USB_TMC is not set | ||
1151 | |||
1152 | # | ||
1153 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | ||
1154 | # | ||
1155 | |||
1156 | # | ||
1157 | # see USB_STORAGE Help for more information | ||
1158 | # | ||
1159 | CONFIG_USB_STORAGE=m | ||
1160 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1161 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
1162 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
1163 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1164 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1165 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
1166 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
1167 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1168 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1169 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1170 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1171 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1172 | # CONFIG_USB_LIBUSUAL is not set | ||
1173 | |||
1174 | # | ||
1175 | # USB Imaging devices | ||
1176 | # | ||
1177 | # CONFIG_USB_MDC800 is not set | ||
1178 | # CONFIG_USB_MICROTEK is not set | ||
1179 | |||
1180 | # | ||
1181 | # USB port drivers | ||
1182 | # | ||
1183 | # CONFIG_USB_USS720 is not set | ||
1184 | # CONFIG_USB_SERIAL is not set | ||
1185 | |||
1186 | # | ||
1187 | # USB Miscellaneous drivers | ||
1188 | # | ||
1189 | # CONFIG_USB_EMI62 is not set | ||
1190 | # CONFIG_USB_EMI26 is not set | ||
1191 | # CONFIG_USB_ADUTUX is not set | ||
1192 | # CONFIG_USB_SEVSEG is not set | ||
1193 | # CONFIG_USB_RIO500 is not set | ||
1194 | # CONFIG_USB_LEGOTOWER is not set | ||
1195 | # CONFIG_USB_LCD is not set | ||
1196 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1197 | # CONFIG_USB_LED is not set | ||
1198 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1199 | # CONFIG_USB_CYTHERM is not set | ||
1200 | # CONFIG_USB_PHIDGET is not set | ||
1201 | # CONFIG_USB_IDMOUSE is not set | ||
1202 | # CONFIG_USB_FTDI_ELAN is not set | ||
1203 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1204 | # CONFIG_USB_LD is not set | ||
1205 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1206 | # CONFIG_USB_IOWARRIOR is not set | ||
1207 | # CONFIG_USB_TEST is not set | ||
1208 | # CONFIG_USB_ISIGHTFW is not set | ||
1209 | # CONFIG_USB_VST is not set | ||
1210 | # CONFIG_USB_GADGET is not set | ||
1211 | |||
1212 | # | ||
1213 | # OTG and related infrastructure | ||
1214 | # | ||
1215 | # CONFIG_UWB is not set | ||
1216 | # CONFIG_MMC is not set | ||
1217 | # CONFIG_MEMSTICK is not set | ||
1218 | # CONFIG_NEW_LEDS is not set | ||
1219 | # CONFIG_ACCESSIBILITY is not set | ||
1220 | # CONFIG_INFINIBAND is not set | ||
1221 | # CONFIG_EDAC is not set | ||
1222 | CONFIG_RTC_LIB=y | ||
1223 | CONFIG_RTC_CLASS=y | ||
1224 | CONFIG_RTC_HCTOSYS=y | ||
1225 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1226 | # CONFIG_RTC_DEBUG is not set | ||
1227 | |||
1228 | # | ||
1229 | # RTC interfaces | ||
1230 | # | ||
1231 | CONFIG_RTC_INTF_SYSFS=y | ||
1232 | CONFIG_RTC_INTF_PROC=y | ||
1233 | CONFIG_RTC_INTF_DEV=y | ||
1234 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1235 | # CONFIG_RTC_DRV_TEST is not set | ||
1236 | |||
1237 | # | ||
1238 | # I2C RTC drivers | ||
1239 | # | ||
1240 | # CONFIG_RTC_DRV_DS1307 is not set | ||
1241 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1242 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1243 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1244 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1245 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1246 | # CONFIG_RTC_DRV_X1205 is not set | ||
1247 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1248 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1249 | # CONFIG_RTC_DRV_M41T80 is not set | ||
1250 | # CONFIG_RTC_DRV_S35390A is not set | ||
1251 | # CONFIG_RTC_DRV_FM3130 is not set | ||
1252 | # CONFIG_RTC_DRV_RX8581 is not set | ||
1253 | |||
1254 | # | ||
1255 | # SPI RTC drivers | ||
1256 | # | ||
1257 | |||
1258 | # | ||
1259 | # Platform RTC drivers | ||
1260 | # | ||
1261 | CONFIG_RTC_DRV_CMOS=y | ||
1262 | # CONFIG_RTC_DRV_DS1286 is not set | ||
1263 | # CONFIG_RTC_DRV_DS1511 is not set | ||
1264 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1265 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1266 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1267 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1268 | # CONFIG_RTC_DRV_M48T35 is not set | ||
1269 | # CONFIG_RTC_DRV_M48T59 is not set | ||
1270 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
1271 | # CONFIG_RTC_DRV_V3020 is not set | ||
1272 | |||
1273 | # | ||
1274 | # on-CPU RTC drivers | ||
1275 | # | ||
1276 | # CONFIG_RTC_DRV_PPC is not set | ||
1277 | # CONFIG_DMADEVICES is not set | ||
1278 | # CONFIG_AUXDISPLAY is not set | ||
1279 | # CONFIG_UIO is not set | ||
1280 | # CONFIG_STAGING is not set | ||
1281 | |||
1282 | # | ||
1283 | # File systems | ||
1284 | # | ||
1285 | CONFIG_EXT2_FS=y | ||
1286 | # CONFIG_EXT2_FS_XATTR is not set | ||
1287 | # CONFIG_EXT2_FS_XIP is not set | ||
1288 | CONFIG_EXT3_FS=y | ||
1289 | CONFIG_EXT3_FS_XATTR=y | ||
1290 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
1291 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1292 | CONFIG_EXT4_FS=y | ||
1293 | # CONFIG_EXT4DEV_COMPAT is not set | ||
1294 | CONFIG_EXT4_FS_XATTR=y | ||
1295 | # CONFIG_EXT4_FS_POSIX_ACL is not set | ||
1296 | # CONFIG_EXT4_FS_SECURITY is not set | ||
1297 | CONFIG_JBD=y | ||
1298 | CONFIG_JBD2=y | ||
1299 | CONFIG_FS_MBCACHE=y | ||
1300 | # CONFIG_REISERFS_FS is not set | ||
1301 | # CONFIG_JFS_FS is not set | ||
1302 | # CONFIG_FS_POSIX_ACL is not set | ||
1303 | CONFIG_FILE_LOCKING=y | ||
1304 | # CONFIG_XFS_FS is not set | ||
1305 | # CONFIG_GFS2_FS is not set | ||
1306 | # CONFIG_OCFS2_FS is not set | ||
1307 | # CONFIG_BTRFS_FS is not set | ||
1308 | CONFIG_DNOTIFY=y | ||
1309 | CONFIG_INOTIFY=y | ||
1310 | CONFIG_INOTIFY_USER=y | ||
1311 | # CONFIG_QUOTA is not set | ||
1312 | # CONFIG_AUTOFS_FS is not set | ||
1313 | # CONFIG_AUTOFS4_FS is not set | ||
1314 | # CONFIG_FUSE_FS is not set | ||
1315 | |||
1316 | # | ||
1317 | # CD-ROM/DVD Filesystems | ||
1318 | # | ||
1319 | CONFIG_ISO9660_FS=y | ||
1320 | # CONFIG_JOLIET is not set | ||
1321 | # CONFIG_ZISOFS is not set | ||
1322 | # CONFIG_UDF_FS is not set | ||
1323 | |||
1324 | # | ||
1325 | # DOS/FAT/NT Filesystems | ||
1326 | # | ||
1327 | CONFIG_FAT_FS=m | ||
1328 | CONFIG_MSDOS_FS=m | ||
1329 | CONFIG_VFAT_FS=m | ||
1330 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1331 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1332 | # CONFIG_NTFS_FS is not set | ||
1333 | |||
1334 | # | ||
1335 | # Pseudo filesystems | ||
1336 | # | ||
1337 | CONFIG_PROC_FS=y | ||
1338 | CONFIG_PROC_KCORE=y | ||
1339 | CONFIG_PROC_SYSCTL=y | ||
1340 | CONFIG_PROC_PAGE_MONITOR=y | ||
1341 | CONFIG_SYSFS=y | ||
1342 | CONFIG_TMPFS=y | ||
1343 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1344 | # CONFIG_HUGETLB_PAGE is not set | ||
1345 | # CONFIG_CONFIGFS_FS is not set | ||
1346 | CONFIG_MISC_FILESYSTEMS=y | ||
1347 | # CONFIG_ADFS_FS is not set | ||
1348 | CONFIG_AFFS_FS=m | ||
1349 | # CONFIG_HFS_FS is not set | ||
1350 | # CONFIG_HFSPLUS_FS is not set | ||
1351 | # CONFIG_BEFS_FS is not set | ||
1352 | # CONFIG_BFS_FS is not set | ||
1353 | # CONFIG_EFS_FS is not set | ||
1354 | # CONFIG_CRAMFS is not set | ||
1355 | # CONFIG_SQUASHFS is not set | ||
1356 | # CONFIG_VXFS_FS is not set | ||
1357 | # CONFIG_MINIX_FS is not set | ||
1358 | # CONFIG_OMFS_FS is not set | ||
1359 | # CONFIG_HPFS_FS is not set | ||
1360 | # CONFIG_QNX4FS_FS is not set | ||
1361 | # CONFIG_ROMFS_FS is not set | ||
1362 | # CONFIG_SYSV_FS is not set | ||
1363 | # CONFIG_UFS_FS is not set | ||
1364 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1365 | # CONFIG_NFS_FS is not set | ||
1366 | # CONFIG_NFSD is not set | ||
1367 | # CONFIG_SMB_FS is not set | ||
1368 | # CONFIG_CIFS is not set | ||
1369 | # CONFIG_NCP_FS is not set | ||
1370 | # CONFIG_CODA_FS is not set | ||
1371 | # CONFIG_AFS_FS is not set | ||
1372 | |||
1373 | # | ||
1374 | # Partition Types | ||
1375 | # | ||
1376 | CONFIG_PARTITION_ADVANCED=y | ||
1377 | # CONFIG_ACORN_PARTITION is not set | ||
1378 | # CONFIG_OSF_PARTITION is not set | ||
1379 | CONFIG_AMIGA_PARTITION=y | ||
1380 | # CONFIG_ATARI_PARTITION is not set | ||
1381 | # CONFIG_MAC_PARTITION is not set | ||
1382 | CONFIG_MSDOS_PARTITION=y | ||
1383 | # CONFIG_BSD_DISKLABEL is not set | ||
1384 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1385 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1386 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1387 | # CONFIG_LDM_PARTITION is not set | ||
1388 | # CONFIG_SGI_PARTITION is not set | ||
1389 | # CONFIG_ULTRIX_PARTITION is not set | ||
1390 | # CONFIG_SUN_PARTITION is not set | ||
1391 | # CONFIG_KARMA_PARTITION is not set | ||
1392 | # CONFIG_EFI_PARTITION is not set | ||
1393 | # CONFIG_SYSV68_PARTITION is not set | ||
1394 | CONFIG_NLS=y | ||
1395 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1396 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
1397 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1398 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1399 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1400 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1401 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1402 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1403 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1404 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1405 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1406 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1407 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1408 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1409 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1410 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1411 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1412 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1413 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1414 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1415 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1416 | # CONFIG_NLS_ISO8859_8 is not set | ||
1417 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1418 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1419 | CONFIG_NLS_ASCII=y | ||
1420 | CONFIG_NLS_ISO8859_1=m | ||
1421 | # CONFIG_NLS_ISO8859_2 is not set | ||
1422 | # CONFIG_NLS_ISO8859_3 is not set | ||
1423 | # CONFIG_NLS_ISO8859_4 is not set | ||
1424 | # CONFIG_NLS_ISO8859_5 is not set | ||
1425 | # CONFIG_NLS_ISO8859_6 is not set | ||
1426 | # CONFIG_NLS_ISO8859_7 is not set | ||
1427 | # CONFIG_NLS_ISO8859_9 is not set | ||
1428 | # CONFIG_NLS_ISO8859_13 is not set | ||
1429 | # CONFIG_NLS_ISO8859_14 is not set | ||
1430 | # CONFIG_NLS_ISO8859_15 is not set | ||
1431 | # CONFIG_NLS_KOI8_R is not set | ||
1432 | # CONFIG_NLS_KOI8_U is not set | ||
1433 | # CONFIG_NLS_UTF8 is not set | ||
1434 | # CONFIG_DLM is not set | ||
1435 | |||
1436 | # | ||
1437 | # Library routines | ||
1438 | # | ||
1439 | CONFIG_BITREVERSE=y | ||
1440 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
1441 | CONFIG_CRC_CCITT=m | ||
1442 | CONFIG_CRC16=y | ||
1443 | CONFIG_CRC_T10DIF=y | ||
1444 | # CONFIG_CRC_ITU_T is not set | ||
1445 | CONFIG_CRC32=y | ||
1446 | # CONFIG_CRC7 is not set | ||
1447 | # CONFIG_LIBCRC32C is not set | ||
1448 | CONFIG_ZLIB_INFLATE=m | ||
1449 | CONFIG_ZLIB_DEFLATE=m | ||
1450 | CONFIG_PLIST=y | ||
1451 | CONFIG_HAS_IOMEM=y | ||
1452 | CONFIG_HAS_IOPORT=y | ||
1453 | CONFIG_HAS_DMA=y | ||
1454 | CONFIG_HAVE_LMB=y | ||
1455 | |||
1456 | # | ||
1457 | # Kernel hacking | ||
1458 | # | ||
1459 | # CONFIG_PRINTK_TIME is not set | ||
1460 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1461 | CONFIG_ENABLE_MUST_CHECK=y | ||
1462 | CONFIG_FRAME_WARN=1024 | ||
1463 | CONFIG_MAGIC_SYSRQ=y | ||
1464 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1465 | # CONFIG_DEBUG_FS is not set | ||
1466 | # CONFIG_HEADERS_CHECK is not set | ||
1467 | CONFIG_DEBUG_KERNEL=y | ||
1468 | # CONFIG_DEBUG_SHIRQ is not set | ||
1469 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1470 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
1471 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
1472 | CONFIG_SCHED_DEBUG=y | ||
1473 | # CONFIG_SCHEDSTATS is not set | ||
1474 | # CONFIG_TIMER_STATS is not set | ||
1475 | # CONFIG_DEBUG_OBJECTS is not set | ||
1476 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1477 | # CONFIG_SLUB_STATS is not set | ||
1478 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1479 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1480 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1481 | CONFIG_DEBUG_MUTEXES=y | ||
1482 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | ||
1483 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1484 | # CONFIG_DEBUG_KOBJECT is not set | ||
1485 | # CONFIG_DEBUG_HIGHMEM is not set | ||
1486 | CONFIG_DEBUG_BUGVERBOSE=y | ||
1487 | # CONFIG_DEBUG_INFO is not set | ||
1488 | # CONFIG_DEBUG_VM is not set | ||
1489 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
1490 | CONFIG_DEBUG_MEMORY_INIT=y | ||
1491 | # CONFIG_DEBUG_LIST is not set | ||
1492 | # CONFIG_DEBUG_SG is not set | ||
1493 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
1494 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1495 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1496 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1497 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
1498 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
1499 | # CONFIG_FAULT_INJECTION is not set | ||
1500 | # CONFIG_LATENCYTOP is not set | ||
1501 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
1502 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
1503 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
1504 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
1505 | |||
1506 | # | ||
1507 | # Tracers | ||
1508 | # | ||
1509 | # CONFIG_FUNCTION_TRACER is not set | ||
1510 | # CONFIG_SCHED_TRACER is not set | ||
1511 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
1512 | # CONFIG_BOOT_TRACER is not set | ||
1513 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
1514 | # CONFIG_STACK_TRACER is not set | ||
1515 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
1516 | # CONFIG_SAMPLES is not set | ||
1517 | CONFIG_HAVE_ARCH_KGDB=y | ||
1518 | # CONFIG_KGDB is not set | ||
1519 | CONFIG_PRINT_STACK_DEPTH=64 | ||
1520 | # CONFIG_DEBUG_STACKOVERFLOW is not set | ||
1521 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
1522 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
1523 | # CONFIG_CODE_PATCHING_SELFTEST is not set | ||
1524 | # CONFIG_FTR_FIXUP_SELFTEST is not set | ||
1525 | # CONFIG_MSI_BITMAP_SELFTEST is not set | ||
1526 | CONFIG_XMON=y | ||
1527 | CONFIG_XMON_DEFAULT=y | ||
1528 | CONFIG_XMON_DISASSEMBLY=y | ||
1529 | CONFIG_DEBUGGER=y | ||
1530 | CONFIG_IRQSTACKS=y | ||
1531 | # CONFIG_BDI_SWITCH is not set | ||
1532 | # CONFIG_BOOTX_TEXT is not set | ||
1533 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1534 | |||
1535 | # | ||
1536 | # Security options | ||
1537 | # | ||
1538 | # CONFIG_KEYS is not set | ||
1539 | # CONFIG_SECURITY is not set | ||
1540 | # CONFIG_SECURITYFS is not set | ||
1541 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1542 | CONFIG_CRYPTO=y | ||
1543 | |||
1544 | # | ||
1545 | # Crypto core or helper | ||
1546 | # | ||
1547 | # CONFIG_CRYPTO_FIPS is not set | ||
1548 | CONFIG_CRYPTO_ALGAPI=m | ||
1549 | CONFIG_CRYPTO_ALGAPI2=m | ||
1550 | CONFIG_CRYPTO_AEAD2=m | ||
1551 | CONFIG_CRYPTO_BLKCIPHER=m | ||
1552 | CONFIG_CRYPTO_BLKCIPHER2=m | ||
1553 | CONFIG_CRYPTO_HASH=m | ||
1554 | CONFIG_CRYPTO_HASH2=m | ||
1555 | CONFIG_CRYPTO_RNG2=m | ||
1556 | CONFIG_CRYPTO_MANAGER=m | ||
1557 | CONFIG_CRYPTO_MANAGER2=m | ||
1558 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1559 | # CONFIG_CRYPTO_NULL is not set | ||
1560 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1561 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1562 | # CONFIG_CRYPTO_TEST is not set | ||
1563 | |||
1564 | # | ||
1565 | # Authenticated Encryption with Associated Data | ||
1566 | # | ||
1567 | # CONFIG_CRYPTO_CCM is not set | ||
1568 | # CONFIG_CRYPTO_GCM is not set | ||
1569 | # CONFIG_CRYPTO_SEQIV is not set | ||
1570 | |||
1571 | # | ||
1572 | # Block modes | ||
1573 | # | ||
1574 | CONFIG_CRYPTO_CBC=m | ||
1575 | # CONFIG_CRYPTO_CTR is not set | ||
1576 | # CONFIG_CRYPTO_CTS is not set | ||
1577 | CONFIG_CRYPTO_ECB=m | ||
1578 | # CONFIG_CRYPTO_LRW is not set | ||
1579 | CONFIG_CRYPTO_PCBC=m | ||
1580 | # CONFIG_CRYPTO_XTS is not set | ||
1581 | |||
1582 | # | ||
1583 | # Hash modes | ||
1584 | # | ||
1585 | # CONFIG_CRYPTO_HMAC is not set | ||
1586 | # CONFIG_CRYPTO_XCBC is not set | ||
1587 | |||
1588 | # | ||
1589 | # Digest | ||
1590 | # | ||
1591 | # CONFIG_CRYPTO_CRC32C is not set | ||
1592 | # CONFIG_CRYPTO_MD4 is not set | ||
1593 | # CONFIG_CRYPTO_MD5 is not set | ||
1594 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1595 | # CONFIG_CRYPTO_RMD128 is not set | ||
1596 | # CONFIG_CRYPTO_RMD160 is not set | ||
1597 | # CONFIG_CRYPTO_RMD256 is not set | ||
1598 | # CONFIG_CRYPTO_RMD320 is not set | ||
1599 | CONFIG_CRYPTO_SHA1=m | ||
1600 | # CONFIG_CRYPTO_SHA256 is not set | ||
1601 | # CONFIG_CRYPTO_SHA512 is not set | ||
1602 | # CONFIG_CRYPTO_TGR192 is not set | ||
1603 | # CONFIG_CRYPTO_WP512 is not set | ||
1604 | |||
1605 | # | ||
1606 | # Ciphers | ||
1607 | # | ||
1608 | # CONFIG_CRYPTO_AES is not set | ||
1609 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1610 | CONFIG_CRYPTO_ARC4=m | ||
1611 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1612 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1613 | # CONFIG_CRYPTO_CAST5 is not set | ||
1614 | # CONFIG_CRYPTO_CAST6 is not set | ||
1615 | # CONFIG_CRYPTO_DES is not set | ||
1616 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1617 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1618 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1619 | # CONFIG_CRYPTO_SEED is not set | ||
1620 | # CONFIG_CRYPTO_SERPENT is not set | ||
1621 | # CONFIG_CRYPTO_TEA is not set | ||
1622 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1623 | |||
1624 | # | ||
1625 | # Compression | ||
1626 | # | ||
1627 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1628 | # CONFIG_CRYPTO_LZO is not set | ||
1629 | |||
1630 | # | ||
1631 | # Random Number Generation | ||
1632 | # | ||
1633 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1634 | # CONFIG_CRYPTO_HW is not set | ||
1635 | # CONFIG_PPC_CLOCK is not set | ||
1636 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig index 81afc8b373d7..af0cd55605d0 100644 --- a/arch/powerpc/configs/mpc5200_defconfig +++ b/arch/powerpc/configs/mpc5200_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.29-rc2 | 3 | # Linux kernel version: 2.6.29-rc3 |
4 | # Mon Jan 26 21:40:44 2009 | 4 | # Fri Feb 6 09:48:53 2009 |
5 | # | 5 | # |
6 | # CONFIG_PPC64 is not set | 6 | # CONFIG_PPC64 is not set |
7 | 7 | ||
@@ -388,7 +388,10 @@ CONFIG_MTD=y | |||
388 | CONFIG_MTD_CONCAT=y | 388 | CONFIG_MTD_CONCAT=y |
389 | CONFIG_MTD_PARTITIONS=y | 389 | CONFIG_MTD_PARTITIONS=y |
390 | # CONFIG_MTD_TESTS is not set | 390 | # CONFIG_MTD_TESTS is not set |
391 | # CONFIG_MTD_REDBOOT_PARTS is not set | 391 | CONFIG_MTD_REDBOOT_PARTS=y |
392 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | ||
393 | # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set | ||
394 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set | ||
392 | CONFIG_MTD_CMDLINE_PARTS=y | 395 | CONFIG_MTD_CMDLINE_PARTS=y |
393 | # CONFIG_MTD_OF_PARTS is not set | 396 | # CONFIG_MTD_OF_PARTS is not set |
394 | # CONFIG_MTD_AR7_PARTS is not set | 397 | # CONFIG_MTD_AR7_PARTS is not set |
@@ -502,7 +505,7 @@ CONFIG_MISC_DEVICES=y | |||
502 | # | 505 | # |
503 | # EEPROM support | 506 | # EEPROM support |
504 | # | 507 | # |
505 | # CONFIG_EEPROM_AT24 is not set | 508 | CONFIG_EEPROM_AT24=y |
506 | # CONFIG_EEPROM_LEGACY is not set | 509 | # CONFIG_EEPROM_LEGACY is not set |
507 | # CONFIG_EEPROM_93CX6 is not set | 510 | # CONFIG_EEPROM_93CX6 is not set |
508 | CONFIG_HAVE_IDE=y | 511 | CONFIG_HAVE_IDE=y |
@@ -678,7 +681,7 @@ CONFIG_PHYLIB=y | |||
678 | # CONFIG_MARVELL_PHY is not set | 681 | # CONFIG_MARVELL_PHY is not set |
679 | # CONFIG_DAVICOM_PHY is not set | 682 | # CONFIG_DAVICOM_PHY is not set |
680 | # CONFIG_QSEMI_PHY is not set | 683 | # CONFIG_QSEMI_PHY is not set |
681 | # CONFIG_LXT_PHY is not set | 684 | CONFIG_LXT_PHY=y |
682 | # CONFIG_CICADA_PHY is not set | 685 | # CONFIG_CICADA_PHY is not set |
683 | # CONFIG_VITESSE_PHY is not set | 686 | # CONFIG_VITESSE_PHY is not set |
684 | # CONFIG_SMSC_PHY is not set | 687 | # CONFIG_SMSC_PHY is not set |
@@ -815,8 +818,6 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
815 | # CONFIG_IPMI_HANDLER is not set | 818 | # CONFIG_IPMI_HANDLER is not set |
816 | # CONFIG_HW_RANDOM is not set | 819 | # CONFIG_HW_RANDOM is not set |
817 | # CONFIG_NVRAM is not set | 820 | # CONFIG_NVRAM is not set |
818 | CONFIG_GEN_RTC=y | ||
819 | # CONFIG_GEN_RTC_X is not set | ||
820 | # CONFIG_R3964 is not set | 821 | # CONFIG_R3964 is not set |
821 | # CONFIG_APPLICOM is not set | 822 | # CONFIG_APPLICOM is not set |
822 | # CONFIG_RAW_DRIVER is not set | 823 | # CONFIG_RAW_DRIVER is not set |
@@ -1281,7 +1282,61 @@ CONFIG_NEW_LEDS=y | |||
1281 | # CONFIG_ACCESSIBILITY is not set | 1282 | # CONFIG_ACCESSIBILITY is not set |
1282 | # CONFIG_INFINIBAND is not set | 1283 | # CONFIG_INFINIBAND is not set |
1283 | # CONFIG_EDAC is not set | 1284 | # CONFIG_EDAC is not set |
1284 | # CONFIG_RTC_CLASS is not set | 1285 | CONFIG_RTC_LIB=y |
1286 | CONFIG_RTC_CLASS=y | ||
1287 | CONFIG_RTC_HCTOSYS=y | ||
1288 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1289 | # CONFIG_RTC_DEBUG is not set | ||
1290 | |||
1291 | # | ||
1292 | # RTC interfaces | ||
1293 | # | ||
1294 | CONFIG_RTC_INTF_SYSFS=y | ||
1295 | CONFIG_RTC_INTF_PROC=y | ||
1296 | CONFIG_RTC_INTF_DEV=y | ||
1297 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1298 | # CONFIG_RTC_DRV_TEST is not set | ||
1299 | |||
1300 | # | ||
1301 | # I2C RTC drivers | ||
1302 | # | ||
1303 | CONFIG_RTC_DRV_DS1307=y | ||
1304 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1305 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1306 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1307 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1308 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1309 | # CONFIG_RTC_DRV_X1205 is not set | ||
1310 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1311 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1312 | # CONFIG_RTC_DRV_M41T80 is not set | ||
1313 | # CONFIG_RTC_DRV_S35390A is not set | ||
1314 | # CONFIG_RTC_DRV_FM3130 is not set | ||
1315 | # CONFIG_RTC_DRV_RX8581 is not set | ||
1316 | |||
1317 | # | ||
1318 | # SPI RTC drivers | ||
1319 | # | ||
1320 | |||
1321 | # | ||
1322 | # Platform RTC drivers | ||
1323 | # | ||
1324 | # CONFIG_RTC_DRV_CMOS is not set | ||
1325 | # CONFIG_RTC_DRV_DS1286 is not set | ||
1326 | # CONFIG_RTC_DRV_DS1511 is not set | ||
1327 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1328 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1329 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1330 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1331 | # CONFIG_RTC_DRV_M48T35 is not set | ||
1332 | # CONFIG_RTC_DRV_M48T59 is not set | ||
1333 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
1334 | # CONFIG_RTC_DRV_V3020 is not set | ||
1335 | |||
1336 | # | ||
1337 | # on-CPU RTC drivers | ||
1338 | # | ||
1339 | # CONFIG_RTC_DRV_PPC is not set | ||
1285 | # CONFIG_DMADEVICES is not set | 1340 | # CONFIG_DMADEVICES is not set |
1286 | # CONFIG_UIO is not set | 1341 | # CONFIG_UIO is not set |
1287 | # CONFIG_STAGING is not set | 1342 | # CONFIG_STAGING is not set |
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig index 88c6295b76c1..252401824575 100644 --- a/arch/powerpc/configs/ppc64_defconfig +++ b/arch/powerpc/configs/ppc64_defconfig | |||
@@ -2067,9 +2067,9 @@ CONFIG_DEBUG_STACKOVERFLOW=y | |||
2067 | CONFIG_DEBUG_STACK_USAGE=y | 2067 | CONFIG_DEBUG_STACK_USAGE=y |
2068 | # CONFIG_DEBUG_PAGEALLOC is not set | 2068 | # CONFIG_DEBUG_PAGEALLOC is not set |
2069 | # CONFIG_HCALL_STATS is not set | 2069 | # CONFIG_HCALL_STATS is not set |
2070 | # CONFIG_CODE_PATCHING_SELFTEST is not set | 2070 | CONFIG_CODE_PATCHING_SELFTEST=y |
2071 | # CONFIG_FTR_FIXUP_SELFTEST is not set | 2071 | CONFIG_FTR_FIXUP_SELFTEST=y |
2072 | # CONFIG_MSI_BITMAP_SELFTEST is not set | 2072 | CONFIG_MSI_BITMAP_SELFTEST=y |
2073 | CONFIG_XMON=y | 2073 | CONFIG_XMON=y |
2074 | # CONFIG_XMON_DEFAULT is not set | 2074 | # CONFIG_XMON_DEFAULT is not set |
2075 | CONFIG_XMON_DISASSEMBLY=y | 2075 | CONFIG_XMON_DISASSEMBLY=y |
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig index b6eee7c93cdd..ac14f5245d2a 100644 --- a/arch/powerpc/configs/ps3_defconfig +++ b/arch/powerpc/configs/ps3_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.27-rc3 | 3 | # Linux kernel version: 2.6.29-rc8 |
4 | # Wed Aug 20 08:16:53 2008 | 4 | # Fri Mar 13 09:28:45 2009 |
5 | # | 5 | # |
6 | CONFIG_PPC64=y | 6 | CONFIG_PPC64=y |
7 | 7 | ||
@@ -16,13 +16,14 @@ CONFIG_PPC_FPU=y | |||
16 | CONFIG_ALTIVEC=y | 16 | CONFIG_ALTIVEC=y |
17 | # CONFIG_VSX is not set | 17 | # CONFIG_VSX is not set |
18 | CONFIG_PPC_STD_MMU=y | 18 | CONFIG_PPC_STD_MMU=y |
19 | CONFIG_PPC_STD_MMU_64=y | ||
19 | CONFIG_PPC_MM_SLICES=y | 20 | CONFIG_PPC_MM_SLICES=y |
20 | CONFIG_VIRT_CPU_ACCOUNTING=y | 21 | CONFIG_VIRT_CPU_ACCOUNTING=y |
21 | CONFIG_SMP=y | 22 | CONFIG_SMP=y |
22 | CONFIG_NR_CPUS=2 | 23 | CONFIG_NR_CPUS=2 |
23 | CONFIG_64BIT=y | 24 | CONFIG_64BIT=y |
24 | CONFIG_WORD_SIZE=64 | 25 | CONFIG_WORD_SIZE=64 |
25 | CONFIG_PPC_MERGE=y | 26 | CONFIG_ARCH_PHYS_ADDR_T_64BIT=y |
26 | CONFIG_MMU=y | 27 | CONFIG_MMU=y |
27 | CONFIG_GENERIC_CMOS_UPDATE=y | 28 | CONFIG_GENERIC_CMOS_UPDATE=y |
28 | CONFIG_GENERIC_TIME=y | 29 | CONFIG_GENERIC_TIME=y |
@@ -46,7 +47,7 @@ CONFIG_PPC=y | |||
46 | CONFIG_EARLY_PRINTK=y | 47 | CONFIG_EARLY_PRINTK=y |
47 | CONFIG_COMPAT=y | 48 | CONFIG_COMPAT=y |
48 | CONFIG_SYSVIPC_COMPAT=y | 49 | CONFIG_SYSVIPC_COMPAT=y |
49 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | 50 | CONFIG_SCHED_OMIT_FRAME_POINTER=y |
50 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | 51 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y |
51 | CONFIG_PPC_OF=y | 52 | CONFIG_PPC_OF=y |
52 | CONFIG_OF=y | 53 | CONFIG_OF=y |
@@ -74,10 +75,19 @@ CONFIG_POSIX_MQUEUE=y | |||
74 | # CONFIG_BSD_PROCESS_ACCT is not set | 75 | # CONFIG_BSD_PROCESS_ACCT is not set |
75 | # CONFIG_TASKSTATS is not set | 76 | # CONFIG_TASKSTATS is not set |
76 | # CONFIG_AUDIT is not set | 77 | # CONFIG_AUDIT is not set |
78 | |||
79 | # | ||
80 | # RCU Subsystem | ||
81 | # | ||
82 | CONFIG_CLASSIC_RCU=y | ||
83 | # CONFIG_TREE_RCU is not set | ||
84 | # CONFIG_PREEMPT_RCU is not set | ||
85 | # CONFIG_TREE_RCU_TRACE is not set | ||
86 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
77 | # CONFIG_IKCONFIG is not set | 87 | # CONFIG_IKCONFIG is not set |
78 | CONFIG_LOG_BUF_SHIFT=17 | 88 | CONFIG_LOG_BUF_SHIFT=17 |
79 | # CONFIG_CGROUPS is not set | ||
80 | # CONFIG_GROUP_SCHED is not set | 89 | # CONFIG_GROUP_SCHED is not set |
90 | # CONFIG_CGROUPS is not set | ||
81 | CONFIG_SYSFS_DEPRECATED=y | 91 | CONFIG_SYSFS_DEPRECATED=y |
82 | CONFIG_SYSFS_DEPRECATED_V2=y | 92 | CONFIG_SYSFS_DEPRECATED_V2=y |
83 | # CONFIG_RELAY is not set | 93 | # CONFIG_RELAY is not set |
@@ -86,11 +96,13 @@ CONFIG_NAMESPACES=y | |||
86 | # CONFIG_IPC_NS is not set | 96 | # CONFIG_IPC_NS is not set |
87 | # CONFIG_USER_NS is not set | 97 | # CONFIG_USER_NS is not set |
88 | # CONFIG_PID_NS is not set | 98 | # CONFIG_PID_NS is not set |
99 | # CONFIG_NET_NS is not set | ||
89 | CONFIG_BLK_DEV_INITRD=y | 100 | CONFIG_BLK_DEV_INITRD=y |
90 | CONFIG_INITRAMFS_SOURCE="" | 101 | CONFIG_INITRAMFS_SOURCE="" |
91 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 102 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
92 | CONFIG_SYSCTL=y | 103 | CONFIG_SYSCTL=y |
93 | # CONFIG_EMBEDDED is not set | 104 | CONFIG_ANON_INODES=y |
105 | CONFIG_EMBEDDED=y | ||
94 | CONFIG_SYSCTL_SYSCALL=y | 106 | CONFIG_SYSCTL_SYSCALL=y |
95 | CONFIG_KALLSYMS=y | 107 | CONFIG_KALLSYMS=y |
96 | CONFIG_KALLSYMS_ALL=y | 108 | CONFIG_KALLSYMS_ALL=y |
@@ -99,37 +111,36 @@ CONFIG_HOTPLUG=y | |||
99 | CONFIG_PRINTK=y | 111 | CONFIG_PRINTK=y |
100 | CONFIG_BUG=y | 112 | CONFIG_BUG=y |
101 | CONFIG_ELF_CORE=y | 113 | CONFIG_ELF_CORE=y |
102 | # CONFIG_COMPAT_BRK is not set | ||
103 | CONFIG_BASE_FULL=y | 114 | CONFIG_BASE_FULL=y |
104 | CONFIG_FUTEX=y | 115 | CONFIG_FUTEX=y |
105 | CONFIG_ANON_INODES=y | ||
106 | CONFIG_EPOLL=y | 116 | CONFIG_EPOLL=y |
107 | CONFIG_SIGNALFD=y | 117 | CONFIG_SIGNALFD=y |
108 | CONFIG_TIMERFD=y | 118 | CONFIG_TIMERFD=y |
109 | CONFIG_EVENTFD=y | 119 | CONFIG_EVENTFD=y |
110 | CONFIG_SHMEM=y | 120 | CONFIG_SHMEM=y |
121 | CONFIG_AIO=y | ||
111 | CONFIG_VM_EVENT_COUNTERS=y | 122 | CONFIG_VM_EVENT_COUNTERS=y |
123 | # CONFIG_COMPAT_BRK is not set | ||
112 | CONFIG_SLAB=y | 124 | CONFIG_SLAB=y |
113 | # CONFIG_SLUB is not set | 125 | # CONFIG_SLUB is not set |
114 | # CONFIG_SLOB is not set | 126 | # CONFIG_SLOB is not set |
115 | CONFIG_PROFILING=y | 127 | CONFIG_PROFILING=y |
116 | # CONFIG_MARKERS is not set | 128 | CONFIG_TRACEPOINTS=y |
129 | CONFIG_MARKERS=y | ||
117 | CONFIG_OPROFILE=m | 130 | CONFIG_OPROFILE=m |
118 | CONFIG_HAVE_OPROFILE=y | 131 | CONFIG_HAVE_OPROFILE=y |
119 | # CONFIG_KPROBES is not set | 132 | # CONFIG_KPROBES is not set |
120 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | 133 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y |
134 | CONFIG_HAVE_SYSCALL_WRAPPERS=y | ||
121 | CONFIG_HAVE_IOREMAP_PROT=y | 135 | CONFIG_HAVE_IOREMAP_PROT=y |
122 | CONFIG_HAVE_KPROBES=y | 136 | CONFIG_HAVE_KPROBES=y |
123 | CONFIG_HAVE_KRETPROBES=y | 137 | CONFIG_HAVE_KRETPROBES=y |
124 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 138 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
125 | CONFIG_HAVE_DMA_ATTRS=y | 139 | CONFIG_HAVE_DMA_ATTRS=y |
126 | CONFIG_USE_GENERIC_SMP_HELPERS=y | 140 | CONFIG_USE_GENERIC_SMP_HELPERS=y |
127 | # CONFIG_HAVE_CLK is not set | ||
128 | CONFIG_PROC_PAGE_MONITOR=y | ||
129 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 141 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set |
130 | CONFIG_SLABINFO=y | 142 | CONFIG_SLABINFO=y |
131 | CONFIG_RT_MUTEXES=y | 143 | CONFIG_RT_MUTEXES=y |
132 | # CONFIG_TINY_SHMEM is not set | ||
133 | CONFIG_BASE_SMALL=0 | 144 | CONFIG_BASE_SMALL=0 |
134 | CONFIG_MODULES=y | 145 | CONFIG_MODULES=y |
135 | # CONFIG_MODULE_FORCE_LOAD is not set | 146 | # CONFIG_MODULE_FORCE_LOAD is not set |
@@ -137,7 +148,6 @@ CONFIG_MODULE_UNLOAD=y | |||
137 | # CONFIG_MODULE_FORCE_UNLOAD is not set | 148 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
138 | # CONFIG_MODVERSIONS is not set | 149 | # CONFIG_MODVERSIONS is not set |
139 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 150 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
140 | CONFIG_KMOD=y | ||
141 | CONFIG_STOP_MACHINE=y | 151 | CONFIG_STOP_MACHINE=y |
142 | CONFIG_BLOCK=y | 152 | CONFIG_BLOCK=y |
143 | # CONFIG_BLK_DEV_IO_TRACE is not set | 153 | # CONFIG_BLK_DEV_IO_TRACE is not set |
@@ -157,7 +167,7 @@ CONFIG_DEFAULT_AS=y | |||
157 | # CONFIG_DEFAULT_CFQ is not set | 167 | # CONFIG_DEFAULT_CFQ is not set |
158 | # CONFIG_DEFAULT_NOOP is not set | 168 | # CONFIG_DEFAULT_NOOP is not set |
159 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 169 | CONFIG_DEFAULT_IOSCHED="anticipatory" |
160 | CONFIG_CLASSIC_RCU=y | 170 | # CONFIG_FREEZER is not set |
161 | 171 | ||
162 | # | 172 | # |
163 | # Platform support | 173 | # Platform support |
@@ -183,18 +193,20 @@ CONFIG_PS3_STORAGE=y | |||
183 | CONFIG_PS3_DISK=y | 193 | CONFIG_PS3_DISK=y |
184 | CONFIG_PS3_ROM=y | 194 | CONFIG_PS3_ROM=y |
185 | CONFIG_PS3_FLASH=y | 195 | CONFIG_PS3_FLASH=y |
186 | CONFIG_OPROFILE_PS3=y | 196 | CONFIG_PS3_VRAM=m |
187 | CONFIG_PS3_LPM=m | 197 | CONFIG_PS3_LPM=m |
188 | CONFIG_PPC_CELL=y | 198 | CONFIG_PPC_CELL=y |
189 | # CONFIG_PPC_CELL_NATIVE is not set | 199 | # CONFIG_PPC_CELL_NATIVE is not set |
190 | # CONFIG_PPC_IBM_CELL_BLADE is not set | 200 | # CONFIG_PPC_IBM_CELL_BLADE is not set |
191 | # CONFIG_PPC_CELLEB is not set | 201 | # CONFIG_PPC_CELLEB is not set |
202 | # CONFIG_PPC_CELL_QPACE is not set | ||
192 | 203 | ||
193 | # | 204 | # |
194 | # Cell Broadband Engine options | 205 | # Cell Broadband Engine options |
195 | # | 206 | # |
196 | CONFIG_SPU_FS=y | 207 | CONFIG_SPU_FS=y |
197 | CONFIG_SPU_FS_64K_LS=y | 208 | CONFIG_SPU_FS_64K_LS=y |
209 | # CONFIG_SPU_TRACE is not set | ||
198 | CONFIG_SPU_BASE=y | 210 | CONFIG_SPU_BASE=y |
199 | # CONFIG_PQ2ADS is not set | 211 | # CONFIG_PQ2ADS is not set |
200 | # CONFIG_IPIC is not set | 212 | # CONFIG_IPIC is not set |
@@ -210,6 +222,7 @@ CONFIG_SPU_BASE=y | |||
210 | # CONFIG_GENERIC_IOMAP is not set | 222 | # CONFIG_GENERIC_IOMAP is not set |
211 | # CONFIG_CPU_FREQ is not set | 223 | # CONFIG_CPU_FREQ is not set |
212 | # CONFIG_FSL_ULI1575 is not set | 224 | # CONFIG_FSL_ULI1575 is not set |
225 | # CONFIG_SIMPLE_GPIO is not set | ||
213 | 226 | ||
214 | # | 227 | # |
215 | # Kernel options | 228 | # Kernel options |
@@ -229,6 +242,8 @@ CONFIG_PREEMPT_NONE=y | |||
229 | # CONFIG_PREEMPT is not set | 242 | # CONFIG_PREEMPT is not set |
230 | CONFIG_BINFMT_ELF=y | 243 | CONFIG_BINFMT_ELF=y |
231 | CONFIG_COMPAT_BINFMT_ELF=y | 244 | CONFIG_COMPAT_BINFMT_ELF=y |
245 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
246 | # CONFIG_HAVE_AOUT is not set | ||
232 | CONFIG_BINFMT_MISC=y | 247 | CONFIG_BINFMT_MISC=y |
233 | CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y | 248 | CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y |
234 | # CONFIG_IOMMU_VMERGE is not set | 249 | # CONFIG_IOMMU_VMERGE is not set |
@@ -251,7 +266,6 @@ CONFIG_SELECT_MEMORY_MODEL=y | |||
251 | CONFIG_SPARSEMEM_MANUAL=y | 266 | CONFIG_SPARSEMEM_MANUAL=y |
252 | CONFIG_SPARSEMEM=y | 267 | CONFIG_SPARSEMEM=y |
253 | CONFIG_HAVE_MEMORY_PRESENT=y | 268 | CONFIG_HAVE_MEMORY_PRESENT=y |
254 | # CONFIG_SPARSEMEM_STATIC is not set | ||
255 | CONFIG_SPARSEMEM_EXTREME=y | 269 | CONFIG_SPARSEMEM_EXTREME=y |
256 | CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y | 270 | CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y |
257 | # CONFIG_SPARSEMEM_VMEMMAP is not set | 271 | # CONFIG_SPARSEMEM_VMEMMAP is not set |
@@ -261,11 +275,14 @@ CONFIG_MEMORY_HOTPLUG_SPARSE=y | |||
261 | CONFIG_PAGEFLAGS_EXTENDED=y | 275 | CONFIG_PAGEFLAGS_EXTENDED=y |
262 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 276 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
263 | CONFIG_MIGRATION=y | 277 | CONFIG_MIGRATION=y |
264 | CONFIG_RESOURCES_64BIT=y | 278 | CONFIG_PHYS_ADDR_T_64BIT=y |
265 | CONFIG_ZONE_DMA_FLAG=1 | 279 | CONFIG_ZONE_DMA_FLAG=1 |
266 | CONFIG_BOUNCE=y | 280 | CONFIG_BOUNCE=y |
281 | CONFIG_UNEVICTABLE_LRU=y | ||
267 | CONFIG_ARCH_MEMORY_PROBE=y | 282 | CONFIG_ARCH_MEMORY_PROBE=y |
268 | CONFIG_PPC_HAS_HASH_64K=y | 283 | CONFIG_PPC_HAS_HASH_64K=y |
284 | CONFIG_PPC_4K_PAGES=y | ||
285 | # CONFIG_PPC_16K_PAGES is not set | ||
269 | # CONFIG_PPC_64K_PAGES is not set | 286 | # CONFIG_PPC_64K_PAGES is not set |
270 | CONFIG_FORCE_MAX_ZONEORDER=13 | 287 | CONFIG_FORCE_MAX_ZONEORDER=13 |
271 | CONFIG_SCHED_SMT=y | 288 | CONFIG_SCHED_SMT=y |
@@ -299,6 +316,7 @@ CONFIG_NET=y | |||
299 | # | 316 | # |
300 | # Networking options | 317 | # Networking options |
301 | # | 318 | # |
319 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
302 | CONFIG_PACKET=y | 320 | CONFIG_PACKET=y |
303 | CONFIG_PACKET_MMAP=y | 321 | CONFIG_PACKET_MMAP=y |
304 | CONFIG_UNIX=y | 322 | CONFIG_UNIX=y |
@@ -361,6 +379,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y | |||
361 | # CONFIG_TIPC is not set | 379 | # CONFIG_TIPC is not set |
362 | # CONFIG_ATM is not set | 380 | # CONFIG_ATM is not set |
363 | # CONFIG_BRIDGE is not set | 381 | # CONFIG_BRIDGE is not set |
382 | # CONFIG_NET_DSA is not set | ||
364 | # CONFIG_VLAN_8021Q is not set | 383 | # CONFIG_VLAN_8021Q is not set |
365 | # CONFIG_DECNET is not set | 384 | # CONFIG_DECNET is not set |
366 | # CONFIG_LLC2 is not set | 385 | # CONFIG_LLC2 is not set |
@@ -371,6 +390,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y | |||
371 | # CONFIG_ECONET is not set | 390 | # CONFIG_ECONET is not set |
372 | # CONFIG_WAN_ROUTER is not set | 391 | # CONFIG_WAN_ROUTER is not set |
373 | # CONFIG_NET_SCHED is not set | 392 | # CONFIG_NET_SCHED is not set |
393 | # CONFIG_DCB is not set | ||
374 | 394 | ||
375 | # | 395 | # |
376 | # Network testing | 396 | # Network testing |
@@ -392,39 +412,37 @@ CONFIG_BT_HIDP=m | |||
392 | # | 412 | # |
393 | # Bluetooth device drivers | 413 | # Bluetooth device drivers |
394 | # | 414 | # |
395 | CONFIG_BT_HCIUSB=m | 415 | CONFIG_BT_HCIBTUSB=m |
396 | CONFIG_BT_HCIUSB_SCO=y | ||
397 | # CONFIG_BT_HCIUART is not set | 416 | # CONFIG_BT_HCIUART is not set |
398 | # CONFIG_BT_HCIBCM203X is not set | 417 | # CONFIG_BT_HCIBCM203X is not set |
399 | # CONFIG_BT_HCIBPA10X is not set | 418 | # CONFIG_BT_HCIBPA10X is not set |
400 | # CONFIG_BT_HCIBFUSB is not set | 419 | # CONFIG_BT_HCIBFUSB is not set |
401 | # CONFIG_BT_HCIVHCI is not set | 420 | # CONFIG_BT_HCIVHCI is not set |
402 | # CONFIG_AF_RXRPC is not set | 421 | # CONFIG_AF_RXRPC is not set |
403 | 422 | # CONFIG_PHONET is not set | |
404 | # | 423 | CONFIG_WIRELESS=y |
405 | # Wireless | ||
406 | # | ||
407 | CONFIG_CFG80211=m | 424 | CONFIG_CFG80211=m |
425 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
408 | CONFIG_NL80211=y | 426 | CONFIG_NL80211=y |
427 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
409 | CONFIG_WIRELESS_EXT=y | 428 | CONFIG_WIRELESS_EXT=y |
410 | # CONFIG_WIRELESS_EXT_SYSFS is not set | 429 | # CONFIG_WIRELESS_EXT_SYSFS is not set |
430 | # CONFIG_LIB80211 is not set | ||
411 | CONFIG_MAC80211=m | 431 | CONFIG_MAC80211=m |
412 | 432 | ||
413 | # | 433 | # |
414 | # Rate control algorithm selection | 434 | # Rate control algorithm selection |
415 | # | 435 | # |
416 | CONFIG_MAC80211_RC_PID=y | 436 | CONFIG_MAC80211_RC_PID=y |
437 | # CONFIG_MAC80211_RC_MINSTREL is not set | ||
417 | CONFIG_MAC80211_RC_DEFAULT_PID=y | 438 | CONFIG_MAC80211_RC_DEFAULT_PID=y |
439 | # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set | ||
418 | CONFIG_MAC80211_RC_DEFAULT="pid" | 440 | CONFIG_MAC80211_RC_DEFAULT="pid" |
419 | # CONFIG_MAC80211_MESH is not set | 441 | # CONFIG_MAC80211_MESH is not set |
420 | # CONFIG_MAC80211_LEDS is not set | 442 | # CONFIG_MAC80211_LEDS is not set |
421 | # CONFIG_MAC80211_DEBUGFS is not set | 443 | # CONFIG_MAC80211_DEBUGFS is not set |
422 | # CONFIG_MAC80211_DEBUG_MENU is not set | 444 | # CONFIG_MAC80211_DEBUG_MENU is not set |
423 | CONFIG_IEEE80211=m | 445 | # CONFIG_WIMAX is not set |
424 | # CONFIG_IEEE80211_DEBUG is not set | ||
425 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
426 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
427 | CONFIG_IEEE80211_CRYPT_TKIP=m | ||
428 | # CONFIG_RFKILL is not set | 446 | # CONFIG_RFKILL is not set |
429 | # CONFIG_NET_9P is not set | 447 | # CONFIG_NET_9P is not set |
430 | 448 | ||
@@ -450,6 +468,7 @@ CONFIG_MTD_DEBUG=y | |||
450 | CONFIG_MTD_DEBUG_VERBOSE=0 | 468 | CONFIG_MTD_DEBUG_VERBOSE=0 |
451 | # CONFIG_MTD_CONCAT is not set | 469 | # CONFIG_MTD_CONCAT is not set |
452 | # CONFIG_MTD_PARTITIONS is not set | 470 | # CONFIG_MTD_PARTITIONS is not set |
471 | # CONFIG_MTD_TESTS is not set | ||
453 | 472 | ||
454 | # | 473 | # |
455 | # User Modules And Translation Layers | 474 | # User Modules And Translation Layers |
@@ -494,7 +513,6 @@ CONFIG_MTD_CFI_I2=y | |||
494 | # | 513 | # |
495 | # CONFIG_MTD_SLRAM is not set | 514 | # CONFIG_MTD_SLRAM is not set |
496 | # CONFIG_MTD_PHRAM is not set | 515 | # CONFIG_MTD_PHRAM is not set |
497 | CONFIG_MTD_PS3VRAM=y | ||
498 | # CONFIG_MTD_MTDRAM is not set | 516 | # CONFIG_MTD_MTDRAM is not set |
499 | # CONFIG_MTD_BLOCK2MTD is not set | 517 | # CONFIG_MTD_BLOCK2MTD is not set |
500 | 518 | ||
@@ -508,6 +526,11 @@ CONFIG_MTD_PS3VRAM=y | |||
508 | # CONFIG_MTD_ONENAND is not set | 526 | # CONFIG_MTD_ONENAND is not set |
509 | 527 | ||
510 | # | 528 | # |
529 | # LPDDR flash memory drivers | ||
530 | # | ||
531 | # CONFIG_MTD_LPDDR is not set | ||
532 | |||
533 | # | ||
511 | # UBI - Unsorted block images | 534 | # UBI - Unsorted block images |
512 | # | 535 | # |
513 | # CONFIG_MTD_UBI is not set | 536 | # CONFIG_MTD_UBI is not set |
@@ -528,8 +551,13 @@ CONFIG_BLK_DEV_RAM_SIZE=65535 | |||
528 | # CONFIG_ATA_OVER_ETH is not set | 551 | # CONFIG_ATA_OVER_ETH is not set |
529 | # CONFIG_BLK_DEV_HD is not set | 552 | # CONFIG_BLK_DEV_HD is not set |
530 | CONFIG_MISC_DEVICES=y | 553 | CONFIG_MISC_DEVICES=y |
531 | # CONFIG_EEPROM_93CX6 is not set | ||
532 | # CONFIG_ENCLOSURE_SERVICES is not set | 554 | # CONFIG_ENCLOSURE_SERVICES is not set |
555 | # CONFIG_C2PORT is not set | ||
556 | |||
557 | # | ||
558 | # EEPROM support | ||
559 | # | ||
560 | # CONFIG_EEPROM_93CX6 is not set | ||
533 | CONFIG_HAVE_IDE=y | 561 | CONFIG_HAVE_IDE=y |
534 | # CONFIG_IDE is not set | 562 | # CONFIG_IDE is not set |
535 | 563 | ||
@@ -575,7 +603,17 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
575 | # CONFIG_SCSI_LOWLEVEL is not set | 603 | # CONFIG_SCSI_LOWLEVEL is not set |
576 | # CONFIG_SCSI_DH is not set | 604 | # CONFIG_SCSI_DH is not set |
577 | # CONFIG_ATA is not set | 605 | # CONFIG_ATA is not set |
578 | # CONFIG_MD is not set | 606 | CONFIG_MD=y |
607 | # CONFIG_BLK_DEV_MD is not set | ||
608 | CONFIG_BLK_DEV_DM=m | ||
609 | # CONFIG_DM_DEBUG is not set | ||
610 | # CONFIG_DM_CRYPT is not set | ||
611 | # CONFIG_DM_SNAPSHOT is not set | ||
612 | # CONFIG_DM_MIRROR is not set | ||
613 | # CONFIG_DM_ZERO is not set | ||
614 | # CONFIG_DM_MULTIPATH is not set | ||
615 | # CONFIG_DM_DELAY is not set | ||
616 | # CONFIG_DM_UEVENT is not set | ||
579 | # CONFIG_MACINTOSH_DRIVERS is not set | 617 | # CONFIG_MACINTOSH_DRIVERS is not set |
580 | CONFIG_NETDEVICES=y | 618 | CONFIG_NETDEVICES=y |
581 | # CONFIG_DUMMY is not set | 619 | # CONFIG_DUMMY is not set |
@@ -591,6 +629,9 @@ CONFIG_MII=m | |||
591 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 629 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
592 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 630 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
593 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | 631 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set |
632 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
633 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
634 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
594 | # CONFIG_B44 is not set | 635 | # CONFIG_B44 is not set |
595 | CONFIG_NETDEV_1000=y | 636 | CONFIG_NETDEV_1000=y |
596 | CONFIG_GELIC_NET=y | 637 | CONFIG_GELIC_NET=y |
@@ -604,6 +645,7 @@ CONFIG_GELIC_WIRELESS_OLD_PSK_INTERFACE=y | |||
604 | # CONFIG_WLAN_PRE80211 is not set | 645 | # CONFIG_WLAN_PRE80211 is not set |
605 | CONFIG_WLAN_80211=y | 646 | CONFIG_WLAN_80211=y |
606 | # CONFIG_LIBERTAS is not set | 647 | # CONFIG_LIBERTAS is not set |
648 | # CONFIG_LIBERTAS_THINFIRM is not set | ||
607 | # CONFIG_USB_ZD1201 is not set | 649 | # CONFIG_USB_ZD1201 is not set |
608 | # CONFIG_USB_NET_RNDIS_WLAN is not set | 650 | # CONFIG_USB_NET_RNDIS_WLAN is not set |
609 | # CONFIG_RTL8187 is not set | 651 | # CONFIG_RTL8187 is not set |
@@ -615,13 +657,11 @@ CONFIG_WLAN_80211=y | |||
615 | # CONFIG_B43LEGACY is not set | 657 | # CONFIG_B43LEGACY is not set |
616 | CONFIG_ZD1211RW=m | 658 | CONFIG_ZD1211RW=m |
617 | # CONFIG_ZD1211RW_DEBUG is not set | 659 | # CONFIG_ZD1211RW_DEBUG is not set |
618 | CONFIG_RT2X00=m | 660 | # CONFIG_RT2X00 is not set |
619 | CONFIG_RT2X00_LIB=m | 661 | |
620 | CONFIG_RT2X00_LIB_USB=m | 662 | # |
621 | CONFIG_RT2X00_LIB_FIRMWARE=y | 663 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
622 | # CONFIG_RT2500USB is not set | 664 | # |
623 | CONFIG_RT73USB=m | ||
624 | # CONFIG_RT2X00_DEBUG is not set | ||
625 | 665 | ||
626 | # | 666 | # |
627 | # USB Network Adapters | 667 | # USB Network Adapters |
@@ -634,6 +674,7 @@ CONFIG_USB_USBNET=m | |||
634 | CONFIG_USB_NET_AX8817X=m | 674 | CONFIG_USB_NET_AX8817X=m |
635 | # CONFIG_USB_NET_CDCETHER is not set | 675 | # CONFIG_USB_NET_CDCETHER is not set |
636 | # CONFIG_USB_NET_DM9601 is not set | 676 | # CONFIG_USB_NET_DM9601 is not set |
677 | # CONFIG_USB_NET_SMSC95XX is not set | ||
637 | # CONFIG_USB_NET_GL620A is not set | 678 | # CONFIG_USB_NET_GL620A is not set |
638 | # CONFIG_USB_NET_NET1080 is not set | 679 | # CONFIG_USB_NET_NET1080 is not set |
639 | # CONFIG_USB_NET_PLUSB is not set | 680 | # CONFIG_USB_NET_PLUSB is not set |
@@ -664,7 +705,7 @@ CONFIG_SLHC=m | |||
664 | # Input device support | 705 | # Input device support |
665 | # | 706 | # |
666 | CONFIG_INPUT=y | 707 | CONFIG_INPUT=y |
667 | # CONFIG_INPUT_FF_MEMLESS is not set | 708 | CONFIG_INPUT_FF_MEMLESS=m |
668 | # CONFIG_INPUT_POLLDEV is not set | 709 | # CONFIG_INPUT_POLLDEV is not set |
669 | 710 | ||
670 | # | 711 | # |
@@ -735,8 +776,10 @@ CONFIG_DEVKMEM=y | |||
735 | # Non-8250 serial port support | 776 | # Non-8250 serial port support |
736 | # | 777 | # |
737 | CONFIG_UNIX98_PTYS=y | 778 | CONFIG_UNIX98_PTYS=y |
779 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
738 | CONFIG_LEGACY_PTYS=y | 780 | CONFIG_LEGACY_PTYS=y |
739 | CONFIG_LEGACY_PTY_COUNT=16 | 781 | CONFIG_LEGACY_PTY_COUNT=16 |
782 | # CONFIG_HVC_UDBG is not set | ||
740 | # CONFIG_IPMI_HANDLER is not set | 783 | # CONFIG_IPMI_HANDLER is not set |
741 | # CONFIG_HW_RANDOM is not set | 784 | # CONFIG_HW_RANDOM is not set |
742 | # CONFIG_R3964 is not set | 785 | # CONFIG_R3964 is not set |
@@ -753,11 +796,11 @@ CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | |||
753 | # CONFIG_THERMAL is not set | 796 | # CONFIG_THERMAL is not set |
754 | # CONFIG_THERMAL_HWMON is not set | 797 | # CONFIG_THERMAL_HWMON is not set |
755 | # CONFIG_WATCHDOG is not set | 798 | # CONFIG_WATCHDOG is not set |
799 | CONFIG_SSB_POSSIBLE=y | ||
756 | 800 | ||
757 | # | 801 | # |
758 | # Sonics Silicon Backplane | 802 | # Sonics Silicon Backplane |
759 | # | 803 | # |
760 | CONFIG_SSB_POSSIBLE=y | ||
761 | # CONFIG_SSB is not set | 804 | # CONFIG_SSB is not set |
762 | 805 | ||
763 | # | 806 | # |
@@ -767,6 +810,7 @@ CONFIG_SSB_POSSIBLE=y | |||
767 | # CONFIG_MFD_SM501 is not set | 810 | # CONFIG_MFD_SM501 is not set |
768 | # CONFIG_HTC_PASIC3 is not set | 811 | # CONFIG_HTC_PASIC3 is not set |
769 | # CONFIG_MFD_TMIO is not set | 812 | # CONFIG_MFD_TMIO is not set |
813 | # CONFIG_REGULATOR is not set | ||
770 | 814 | ||
771 | # | 815 | # |
772 | # Multimedia devices | 816 | # Multimedia devices |
@@ -792,6 +836,7 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m | |||
792 | CONFIG_FB=y | 836 | CONFIG_FB=y |
793 | # CONFIG_FIRMWARE_EDID is not set | 837 | # CONFIG_FIRMWARE_EDID is not set |
794 | # CONFIG_FB_DDC is not set | 838 | # CONFIG_FB_DDC is not set |
839 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
795 | # CONFIG_FB_CFB_FILLRECT is not set | 840 | # CONFIG_FB_CFB_FILLRECT is not set |
796 | # CONFIG_FB_CFB_COPYAREA is not set | 841 | # CONFIG_FB_CFB_COPYAREA is not set |
797 | # CONFIG_FB_CFB_IMAGEBLIT is not set | 842 | # CONFIG_FB_CFB_IMAGEBLIT is not set |
@@ -817,6 +862,8 @@ CONFIG_FB_SYS_FOPS=y | |||
817 | CONFIG_FB_PS3=y | 862 | CONFIG_FB_PS3=y |
818 | CONFIG_FB_PS3_DEFAULT_SIZE_M=9 | 863 | CONFIG_FB_PS3_DEFAULT_SIZE_M=9 |
819 | # CONFIG_FB_VIRTUAL is not set | 864 | # CONFIG_FB_VIRTUAL is not set |
865 | # CONFIG_FB_METRONOME is not set | ||
866 | # CONFIG_FB_MB862XX is not set | ||
820 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 867 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
821 | 868 | ||
822 | # | 869 | # |
@@ -841,6 +888,7 @@ CONFIG_FB_LOGO_EXTRA=y | |||
841 | # CONFIG_LOGO_LINUX_VGA16 is not set | 888 | # CONFIG_LOGO_LINUX_VGA16 is not set |
842 | CONFIG_LOGO_LINUX_CLUT224=y | 889 | CONFIG_LOGO_LINUX_CLUT224=y |
843 | CONFIG_SOUND=m | 890 | CONFIG_SOUND=m |
891 | # CONFIG_SOUND_OSS_CORE is not set | ||
844 | CONFIG_SND=m | 892 | CONFIG_SND=m |
845 | CONFIG_SND_TIMER=m | 893 | CONFIG_SND_TIMER=m |
846 | CONFIG_SND_PCM=m | 894 | CONFIG_SND_PCM=m |
@@ -849,6 +897,7 @@ CONFIG_SND_RAWMIDI=m | |||
849 | # CONFIG_SND_SEQUENCER is not set | 897 | # CONFIG_SND_SEQUENCER is not set |
850 | # CONFIG_SND_MIXER_OSS is not set | 898 | # CONFIG_SND_MIXER_OSS is not set |
851 | # CONFIG_SND_PCM_OSS is not set | 899 | # CONFIG_SND_PCM_OSS is not set |
900 | # CONFIG_SND_HRTIMER is not set | ||
852 | # CONFIG_SND_DYNAMIC_MINORS is not set | 901 | # CONFIG_SND_DYNAMIC_MINORS is not set |
853 | CONFIG_SND_SUPPORT_OLD_API=y | 902 | CONFIG_SND_SUPPORT_OLD_API=y |
854 | CONFIG_SND_VERBOSE_PROCFS=y | 903 | CONFIG_SND_VERBOSE_PROCFS=y |
@@ -873,15 +922,40 @@ CONFIG_HIDRAW=y | |||
873 | # USB Input Devices | 922 | # USB Input Devices |
874 | # | 923 | # |
875 | CONFIG_USB_HID=m | 924 | CONFIG_USB_HID=m |
876 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | 925 | # CONFIG_HID_PID is not set |
877 | # CONFIG_HID_FF is not set | 926 | CONFIG_USB_HIDDEV=y |
878 | # CONFIG_USB_HIDDEV is not set | ||
879 | 927 | ||
880 | # | 928 | # |
881 | # USB HID Boot Protocol drivers | 929 | # USB HID Boot Protocol drivers |
882 | # | 930 | # |
883 | # CONFIG_USB_KBD is not set | 931 | # CONFIG_USB_KBD is not set |
884 | # CONFIG_USB_MOUSE is not set | 932 | # CONFIG_USB_MOUSE is not set |
933 | |||
934 | # | ||
935 | # Special HID drivers | ||
936 | # | ||
937 | # CONFIG_HID_COMPAT is not set | ||
938 | # CONFIG_HID_A4TECH is not set | ||
939 | # CONFIG_HID_APPLE is not set | ||
940 | # CONFIG_HID_BELKIN is not set | ||
941 | # CONFIG_HID_CHERRY is not set | ||
942 | # CONFIG_HID_CHICONY is not set | ||
943 | # CONFIG_HID_CYPRESS is not set | ||
944 | # CONFIG_HID_EZKEY is not set | ||
945 | # CONFIG_HID_GYRATION is not set | ||
946 | # CONFIG_HID_LOGITECH is not set | ||
947 | # CONFIG_HID_MICROSOFT is not set | ||
948 | # CONFIG_HID_MONTEREY is not set | ||
949 | # CONFIG_HID_NTRIG is not set | ||
950 | # CONFIG_HID_PANTHERLORD is not set | ||
951 | # CONFIG_HID_PETALYNX is not set | ||
952 | # CONFIG_HID_SAMSUNG is not set | ||
953 | # CONFIG_HID_SONY is not set | ||
954 | # CONFIG_HID_SUNPLUS is not set | ||
955 | # CONFIG_GREENASIA_FF is not set | ||
956 | # CONFIG_HID_TOPSEED is not set | ||
957 | # CONFIG_THRUSTMASTER_FF is not set | ||
958 | # CONFIG_ZEROPLUS_FF is not set | ||
885 | CONFIG_USB_SUPPORT=y | 959 | CONFIG_USB_SUPPORT=y |
886 | CONFIG_USB_ARCH_HAS_HCD=y | 960 | CONFIG_USB_ARCH_HAS_HCD=y |
887 | CONFIG_USB_ARCH_HAS_OHCI=y | 961 | CONFIG_USB_ARCH_HAS_OHCI=y |
@@ -898,7 +972,11 @@ CONFIG_USB_DEVICEFS=y | |||
898 | # CONFIG_USB_DYNAMIC_MINORS is not set | 972 | # CONFIG_USB_DYNAMIC_MINORS is not set |
899 | CONFIG_USB_SUSPEND=y | 973 | CONFIG_USB_SUSPEND=y |
900 | # CONFIG_USB_OTG is not set | 974 | # CONFIG_USB_OTG is not set |
901 | CONFIG_USB_MON=y | 975 | # CONFIG_USB_OTG_WHITELIST is not set |
976 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
977 | CONFIG_USB_MON=m | ||
978 | # CONFIG_USB_WUSB is not set | ||
979 | # CONFIG_USB_WUSB_CBAF is not set | ||
902 | 980 | ||
903 | # | 981 | # |
904 | # USB Host Controller Drivers | 982 | # USB Host Controller Drivers |
@@ -909,6 +987,7 @@ CONFIG_USB_EHCI_HCD=m | |||
909 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | 987 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set |
910 | CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y | 988 | CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y |
911 | # CONFIG_USB_EHCI_HCD_PPC_OF is not set | 989 | # CONFIG_USB_EHCI_HCD_PPC_OF is not set |
990 | # CONFIG_USB_OXU210HP_HCD is not set | ||
912 | # CONFIG_USB_ISP116X_HCD is not set | 991 | # CONFIG_USB_ISP116X_HCD is not set |
913 | # CONFIG_USB_ISP1760_HCD is not set | 992 | # CONFIG_USB_ISP1760_HCD is not set |
914 | CONFIG_USB_OHCI_HCD=m | 993 | CONFIG_USB_OHCI_HCD=m |
@@ -918,6 +997,7 @@ CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y | |||
918 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | 997 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y |
919 | # CONFIG_USB_SL811_HCD is not set | 998 | # CONFIG_USB_SL811_HCD is not set |
920 | # CONFIG_USB_R8A66597_HCD is not set | 999 | # CONFIG_USB_R8A66597_HCD is not set |
1000 | # CONFIG_USB_HWA_HCD is not set | ||
921 | 1001 | ||
922 | # | 1002 | # |
923 | # Enable Host or Gadget support to see Inventra options | 1003 | # Enable Host or Gadget support to see Inventra options |
@@ -929,20 +1009,20 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
929 | # CONFIG_USB_ACM is not set | 1009 | # CONFIG_USB_ACM is not set |
930 | # CONFIG_USB_PRINTER is not set | 1010 | # CONFIG_USB_PRINTER is not set |
931 | # CONFIG_USB_WDM is not set | 1011 | # CONFIG_USB_WDM is not set |
1012 | # CONFIG_USB_TMC is not set | ||
932 | 1013 | ||
933 | # | 1014 | # |
934 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 1015 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; |
935 | # | 1016 | # |
936 | 1017 | ||
937 | # | 1018 | # |
938 | # may also be needed; see USB_STORAGE Help for more information | 1019 | # see USB_STORAGE Help for more information |
939 | # | 1020 | # |
940 | CONFIG_USB_STORAGE=m | 1021 | CONFIG_USB_STORAGE=m |
941 | # CONFIG_USB_STORAGE_DEBUG is not set | 1022 | # CONFIG_USB_STORAGE_DEBUG is not set |
942 | # CONFIG_USB_STORAGE_DATAFAB is not set | 1023 | # CONFIG_USB_STORAGE_DATAFAB is not set |
943 | # CONFIG_USB_STORAGE_FREECOM is not set | 1024 | # CONFIG_USB_STORAGE_FREECOM is not set |
944 | # CONFIG_USB_STORAGE_ISD200 is not set | 1025 | # CONFIG_USB_STORAGE_ISD200 is not set |
945 | # CONFIG_USB_STORAGE_DPCM is not set | ||
946 | # CONFIG_USB_STORAGE_USBAT is not set | 1026 | # CONFIG_USB_STORAGE_USBAT is not set |
947 | # CONFIG_USB_STORAGE_SDDR09 is not set | 1027 | # CONFIG_USB_STORAGE_SDDR09 is not set |
948 | # CONFIG_USB_STORAGE_SDDR55 is not set | 1028 | # CONFIG_USB_STORAGE_SDDR55 is not set |
@@ -950,7 +1030,6 @@ CONFIG_USB_STORAGE=m | |||
950 | # CONFIG_USB_STORAGE_ALAUDA is not set | 1030 | # CONFIG_USB_STORAGE_ALAUDA is not set |
951 | # CONFIG_USB_STORAGE_ONETOUCH is not set | 1031 | # CONFIG_USB_STORAGE_ONETOUCH is not set |
952 | # CONFIG_USB_STORAGE_KARMA is not set | 1032 | # CONFIG_USB_STORAGE_KARMA is not set |
953 | # CONFIG_USB_STORAGE_SIERRA is not set | ||
954 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | 1033 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set |
955 | # CONFIG_USB_LIBUSUAL is not set | 1034 | # CONFIG_USB_LIBUSUAL is not set |
956 | 1035 | ||
@@ -971,6 +1050,7 @@ CONFIG_USB_STORAGE=m | |||
971 | # CONFIG_USB_EMI62 is not set | 1050 | # CONFIG_USB_EMI62 is not set |
972 | # CONFIG_USB_EMI26 is not set | 1051 | # CONFIG_USB_EMI26 is not set |
973 | # CONFIG_USB_ADUTUX is not set | 1052 | # CONFIG_USB_ADUTUX is not set |
1053 | # CONFIG_USB_SEVSEG is not set | ||
974 | # CONFIG_USB_RIO500 is not set | 1054 | # CONFIG_USB_RIO500 is not set |
975 | # CONFIG_USB_LEGOTOWER is not set | 1055 | # CONFIG_USB_LEGOTOWER is not set |
976 | # CONFIG_USB_LCD is not set | 1056 | # CONFIG_USB_LCD is not set |
@@ -988,7 +1068,12 @@ CONFIG_USB_STORAGE=m | |||
988 | # CONFIG_USB_IOWARRIOR is not set | 1068 | # CONFIG_USB_IOWARRIOR is not set |
989 | # CONFIG_USB_TEST is not set | 1069 | # CONFIG_USB_TEST is not set |
990 | # CONFIG_USB_ISIGHTFW is not set | 1070 | # CONFIG_USB_ISIGHTFW is not set |
1071 | # CONFIG_USB_VST is not set | ||
991 | # CONFIG_USB_GADGET is not set | 1072 | # CONFIG_USB_GADGET is not set |
1073 | |||
1074 | # | ||
1075 | # OTG and related infrastructure | ||
1076 | # | ||
992 | # CONFIG_MMC is not set | 1077 | # CONFIG_MMC is not set |
993 | # CONFIG_MEMSTICK is not set | 1078 | # CONFIG_MEMSTICK is not set |
994 | # CONFIG_NEW_LEDS is not set | 1079 | # CONFIG_NEW_LEDS is not set |
@@ -1014,12 +1099,15 @@ CONFIG_RTC_INTF_DEV=y | |||
1014 | # Platform RTC drivers | 1099 | # Platform RTC drivers |
1015 | # | 1100 | # |
1016 | # CONFIG_RTC_DRV_CMOS is not set | 1101 | # CONFIG_RTC_DRV_CMOS is not set |
1102 | # CONFIG_RTC_DRV_DS1286 is not set | ||
1017 | # CONFIG_RTC_DRV_DS1511 is not set | 1103 | # CONFIG_RTC_DRV_DS1511 is not set |
1018 | # CONFIG_RTC_DRV_DS1553 is not set | 1104 | # CONFIG_RTC_DRV_DS1553 is not set |
1019 | # CONFIG_RTC_DRV_DS1742 is not set | 1105 | # CONFIG_RTC_DRV_DS1742 is not set |
1020 | # CONFIG_RTC_DRV_STK17TA8 is not set | 1106 | # CONFIG_RTC_DRV_STK17TA8 is not set |
1021 | # CONFIG_RTC_DRV_M48T86 is not set | 1107 | # CONFIG_RTC_DRV_M48T86 is not set |
1108 | # CONFIG_RTC_DRV_M48T35 is not set | ||
1022 | # CONFIG_RTC_DRV_M48T59 is not set | 1109 | # CONFIG_RTC_DRV_M48T59 is not set |
1110 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
1023 | # CONFIG_RTC_DRV_V3020 is not set | 1111 | # CONFIG_RTC_DRV_V3020 is not set |
1024 | 1112 | ||
1025 | # | 1113 | # |
@@ -1028,6 +1116,7 @@ CONFIG_RTC_INTF_DEV=y | |||
1028 | CONFIG_RTC_DRV_PPC=m | 1116 | CONFIG_RTC_DRV_PPC=m |
1029 | # CONFIG_DMADEVICES is not set | 1117 | # CONFIG_DMADEVICES is not set |
1030 | # CONFIG_UIO is not set | 1118 | # CONFIG_UIO is not set |
1119 | # CONFIG_STAGING is not set | ||
1031 | 1120 | ||
1032 | # | 1121 | # |
1033 | # File systems | 1122 | # File systems |
@@ -1035,26 +1124,35 @@ CONFIG_RTC_DRV_PPC=m | |||
1035 | CONFIG_EXT2_FS=m | 1124 | CONFIG_EXT2_FS=m |
1036 | # CONFIG_EXT2_FS_XATTR is not set | 1125 | # CONFIG_EXT2_FS_XATTR is not set |
1037 | # CONFIG_EXT2_FS_XIP is not set | 1126 | # CONFIG_EXT2_FS_XIP is not set |
1038 | CONFIG_EXT3_FS=y | 1127 | CONFIG_EXT3_FS=m |
1039 | CONFIG_EXT3_FS_XATTR=y | 1128 | CONFIG_EXT3_FS_XATTR=y |
1040 | # CONFIG_EXT3_FS_POSIX_ACL is not set | 1129 | # CONFIG_EXT3_FS_POSIX_ACL is not set |
1041 | # CONFIG_EXT3_FS_SECURITY is not set | 1130 | # CONFIG_EXT3_FS_SECURITY is not set |
1042 | # CONFIG_EXT4DEV_FS is not set | 1131 | CONFIG_EXT4_FS=y |
1043 | CONFIG_JBD=y | 1132 | # CONFIG_EXT4DEV_COMPAT is not set |
1133 | CONFIG_EXT4_FS_XATTR=y | ||
1134 | # CONFIG_EXT4_FS_POSIX_ACL is not set | ||
1135 | # CONFIG_EXT4_FS_SECURITY is not set | ||
1136 | CONFIG_JBD=m | ||
1044 | # CONFIG_JBD_DEBUG is not set | 1137 | # CONFIG_JBD_DEBUG is not set |
1138 | CONFIG_JBD2=y | ||
1139 | # CONFIG_JBD2_DEBUG is not set | ||
1045 | CONFIG_FS_MBCACHE=y | 1140 | CONFIG_FS_MBCACHE=y |
1046 | # CONFIG_REISERFS_FS is not set | 1141 | # CONFIG_REISERFS_FS is not set |
1047 | # CONFIG_JFS_FS is not set | 1142 | # CONFIG_JFS_FS is not set |
1048 | # CONFIG_FS_POSIX_ACL is not set | 1143 | # CONFIG_FS_POSIX_ACL is not set |
1144 | CONFIG_FILE_LOCKING=y | ||
1049 | # CONFIG_XFS_FS is not set | 1145 | # CONFIG_XFS_FS is not set |
1050 | # CONFIG_GFS2_FS is not set | 1146 | # CONFIG_GFS2_FS is not set |
1051 | # CONFIG_OCFS2_FS is not set | 1147 | # CONFIG_OCFS2_FS is not set |
1148 | # CONFIG_BTRFS_FS is not set | ||
1052 | CONFIG_DNOTIFY=y | 1149 | CONFIG_DNOTIFY=y |
1053 | CONFIG_INOTIFY=y | 1150 | CONFIG_INOTIFY=y |
1054 | CONFIG_INOTIFY_USER=y | 1151 | CONFIG_INOTIFY_USER=y |
1055 | CONFIG_QUOTA=y | 1152 | CONFIG_QUOTA=y |
1056 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | 1153 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set |
1057 | CONFIG_PRINT_QUOTA_WARNING=y | 1154 | CONFIG_PRINT_QUOTA_WARNING=y |
1155 | CONFIG_QUOTA_TREE=y | ||
1058 | # CONFIG_QFMT_V1 is not set | 1156 | # CONFIG_QFMT_V1 is not set |
1059 | CONFIG_QFMT_V2=y | 1157 | CONFIG_QFMT_V2=y |
1060 | CONFIG_QUOTACTL=y | 1158 | CONFIG_QUOTACTL=y |
@@ -1087,16 +1185,14 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |||
1087 | CONFIG_PROC_FS=y | 1185 | CONFIG_PROC_FS=y |
1088 | CONFIG_PROC_KCORE=y | 1186 | CONFIG_PROC_KCORE=y |
1089 | CONFIG_PROC_SYSCTL=y | 1187 | CONFIG_PROC_SYSCTL=y |
1188 | CONFIG_PROC_PAGE_MONITOR=y | ||
1090 | CONFIG_SYSFS=y | 1189 | CONFIG_SYSFS=y |
1091 | CONFIG_TMPFS=y | 1190 | CONFIG_TMPFS=y |
1092 | # CONFIG_TMPFS_POSIX_ACL is not set | 1191 | # CONFIG_TMPFS_POSIX_ACL is not set |
1093 | CONFIG_HUGETLBFS=y | 1192 | CONFIG_HUGETLBFS=y |
1094 | CONFIG_HUGETLB_PAGE=y | 1193 | CONFIG_HUGETLB_PAGE=y |
1095 | # CONFIG_CONFIGFS_FS is not set | 1194 | # CONFIG_CONFIGFS_FS is not set |
1096 | 1195 | CONFIG_MISC_FILESYSTEMS=y | |
1097 | # | ||
1098 | # Miscellaneous filesystems | ||
1099 | # | ||
1100 | # CONFIG_ADFS_FS is not set | 1196 | # CONFIG_ADFS_FS is not set |
1101 | # CONFIG_AFFS_FS is not set | 1197 | # CONFIG_AFFS_FS is not set |
1102 | # CONFIG_HFS_FS is not set | 1198 | # CONFIG_HFS_FS is not set |
@@ -1106,6 +1202,7 @@ CONFIG_HUGETLB_PAGE=y | |||
1106 | # CONFIG_EFS_FS is not set | 1202 | # CONFIG_EFS_FS is not set |
1107 | # CONFIG_JFFS2_FS is not set | 1203 | # CONFIG_JFFS2_FS is not set |
1108 | # CONFIG_CRAMFS is not set | 1204 | # CONFIG_CRAMFS is not set |
1205 | # CONFIG_SQUASHFS is not set | ||
1109 | # CONFIG_VXFS_FS is not set | 1206 | # CONFIG_VXFS_FS is not set |
1110 | # CONFIG_MINIX_FS is not set | 1207 | # CONFIG_MINIX_FS is not set |
1111 | # CONFIG_OMFS_FS is not set | 1208 | # CONFIG_OMFS_FS is not set |
@@ -1126,6 +1223,7 @@ CONFIG_LOCKD_V4=y | |||
1126 | CONFIG_NFS_COMMON=y | 1223 | CONFIG_NFS_COMMON=y |
1127 | CONFIG_SUNRPC=y | 1224 | CONFIG_SUNRPC=y |
1128 | CONFIG_SUNRPC_GSS=y | 1225 | CONFIG_SUNRPC_GSS=y |
1226 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
1129 | CONFIG_RPCSEC_GSS_KRB5=y | 1227 | CONFIG_RPCSEC_GSS_KRB5=y |
1130 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1228 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
1131 | # CONFIG_SMB_FS is not set | 1229 | # CONFIG_SMB_FS is not set |
@@ -1190,9 +1288,9 @@ CONFIG_NLS_ISO8859_1=y | |||
1190 | # Library routines | 1288 | # Library routines |
1191 | # | 1289 | # |
1192 | CONFIG_BITREVERSE=y | 1290 | CONFIG_BITREVERSE=y |
1193 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | 1291 | CONFIG_GENERIC_FIND_LAST_BIT=y |
1194 | CONFIG_CRC_CCITT=m | 1292 | CONFIG_CRC_CCITT=m |
1195 | # CONFIG_CRC16 is not set | 1293 | CONFIG_CRC16=y |
1196 | CONFIG_CRC_T10DIF=y | 1294 | CONFIG_CRC_T10DIF=y |
1197 | CONFIG_CRC_ITU_T=m | 1295 | CONFIG_CRC_ITU_T=m |
1198 | CONFIG_CRC32=y | 1296 | CONFIG_CRC32=y |
@@ -1250,27 +1348,44 @@ CONFIG_DEBUG_WRITECOUNT=y | |||
1250 | CONFIG_DEBUG_MEMORY_INIT=y | 1348 | CONFIG_DEBUG_MEMORY_INIT=y |
1251 | CONFIG_DEBUG_LIST=y | 1349 | CONFIG_DEBUG_LIST=y |
1252 | # CONFIG_DEBUG_SG is not set | 1350 | # CONFIG_DEBUG_SG is not set |
1253 | CONFIG_FRAME_POINTER=y | 1351 | # CONFIG_DEBUG_NOTIFIERS is not set |
1254 | # CONFIG_BOOT_PRINTK_DELAY is not set | 1352 | # CONFIG_BOOT_PRINTK_DELAY is not set |
1255 | # CONFIG_RCU_TORTURE_TEST is not set | 1353 | # CONFIG_RCU_TORTURE_TEST is not set |
1354 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1256 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1355 | # CONFIG_BACKTRACE_SELF_TEST is not set |
1356 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
1257 | # CONFIG_FAULT_INJECTION is not set | 1357 | # CONFIG_FAULT_INJECTION is not set |
1258 | # CONFIG_LATENCYTOP is not set | 1358 | # CONFIG_LATENCYTOP is not set |
1259 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 1359 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
1260 | CONFIG_HAVE_FTRACE=y | 1360 | CONFIG_NOP_TRACER=y |
1361 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
1261 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 1362 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
1262 | # CONFIG_FTRACE is not set | 1363 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
1364 | CONFIG_RING_BUFFER=y | ||
1365 | CONFIG_TRACING=y | ||
1366 | |||
1367 | # | ||
1368 | # Tracers | ||
1369 | # | ||
1370 | # CONFIG_FUNCTION_TRACER is not set | ||
1263 | # CONFIG_IRQSOFF_TRACER is not set | 1371 | # CONFIG_IRQSOFF_TRACER is not set |
1264 | # CONFIG_SCHED_TRACER is not set | 1372 | # CONFIG_SCHED_TRACER is not set |
1265 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 1373 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
1374 | # CONFIG_BOOT_TRACER is not set | ||
1375 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
1376 | # CONFIG_STACK_TRACER is not set | ||
1377 | # CONFIG_FTRACE_STARTUP_TEST is not set | ||
1378 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
1266 | # CONFIG_SAMPLES is not set | 1379 | # CONFIG_SAMPLES is not set |
1267 | CONFIG_HAVE_ARCH_KGDB=y | 1380 | CONFIG_HAVE_ARCH_KGDB=y |
1268 | # CONFIG_KGDB is not set | 1381 | # CONFIG_KGDB is not set |
1382 | CONFIG_PRINT_STACK_DEPTH=64 | ||
1269 | CONFIG_DEBUG_STACKOVERFLOW=y | 1383 | CONFIG_DEBUG_STACKOVERFLOW=y |
1270 | # CONFIG_DEBUG_STACK_USAGE is not set | 1384 | # CONFIG_DEBUG_STACK_USAGE is not set |
1271 | # CONFIG_DEBUG_PAGEALLOC is not set | 1385 | # CONFIG_DEBUG_PAGEALLOC is not set |
1272 | # CONFIG_CODE_PATCHING_SELFTEST is not set | 1386 | # CONFIG_CODE_PATCHING_SELFTEST is not set |
1273 | # CONFIG_FTR_FIXUP_SELFTEST is not set | 1387 | # CONFIG_FTR_FIXUP_SELFTEST is not set |
1388 | # CONFIG_MSI_BITMAP_SELFTEST is not set | ||
1274 | # CONFIG_XMON is not set | 1389 | # CONFIG_XMON is not set |
1275 | CONFIG_IRQSTACKS=y | 1390 | CONFIG_IRQSTACKS=y |
1276 | # CONFIG_VIRQ_DEBUG is not set | 1391 | # CONFIG_VIRQ_DEBUG is not set |
@@ -1282,16 +1397,26 @@ CONFIG_IRQSTACKS=y | |||
1282 | # | 1397 | # |
1283 | # CONFIG_KEYS is not set | 1398 | # CONFIG_KEYS is not set |
1284 | # CONFIG_SECURITY is not set | 1399 | # CONFIG_SECURITY is not set |
1400 | # CONFIG_SECURITYFS is not set | ||
1285 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1401 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set |
1286 | CONFIG_CRYPTO=y | 1402 | CONFIG_CRYPTO=y |
1287 | 1403 | ||
1288 | # | 1404 | # |
1289 | # Crypto core or helper | 1405 | # Crypto core or helper |
1290 | # | 1406 | # |
1407 | # CONFIG_CRYPTO_FIPS is not set | ||
1291 | CONFIG_CRYPTO_ALGAPI=y | 1408 | CONFIG_CRYPTO_ALGAPI=y |
1409 | CONFIG_CRYPTO_ALGAPI2=y | ||
1292 | CONFIG_CRYPTO_AEAD=m | 1410 | CONFIG_CRYPTO_AEAD=m |
1411 | CONFIG_CRYPTO_AEAD2=y | ||
1293 | CONFIG_CRYPTO_BLKCIPHER=y | 1412 | CONFIG_CRYPTO_BLKCIPHER=y |
1413 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
1414 | CONFIG_CRYPTO_HASH=y | ||
1415 | CONFIG_CRYPTO_HASH2=y | ||
1416 | CONFIG_CRYPTO_RNG=m | ||
1417 | CONFIG_CRYPTO_RNG2=y | ||
1294 | CONFIG_CRYPTO_MANAGER=y | 1418 | CONFIG_CRYPTO_MANAGER=y |
1419 | CONFIG_CRYPTO_MANAGER2=y | ||
1295 | CONFIG_CRYPTO_GF128MUL=m | 1420 | CONFIG_CRYPTO_GF128MUL=m |
1296 | # CONFIG_CRYPTO_NULL is not set | 1421 | # CONFIG_CRYPTO_NULL is not set |
1297 | # CONFIG_CRYPTO_CRYPTD is not set | 1422 | # CONFIG_CRYPTO_CRYPTD is not set |
@@ -1363,6 +1488,11 @@ CONFIG_CRYPTO_SALSA20=m | |||
1363 | # | 1488 | # |
1364 | # CONFIG_CRYPTO_DEFLATE is not set | 1489 | # CONFIG_CRYPTO_DEFLATE is not set |
1365 | CONFIG_CRYPTO_LZO=m | 1490 | CONFIG_CRYPTO_LZO=m |
1491 | |||
1492 | # | ||
1493 | # Random Number Generation | ||
1494 | # | ||
1495 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1366 | CONFIG_CRYPTO_HW=y | 1496 | CONFIG_CRYPTO_HW=y |
1367 | # CONFIG_PPC_CLOCK is not set | 1497 | # CONFIG_PPC_CLOCK is not set |
1368 | # CONFIG_VIRTUALIZATION is not set | 1498 | # CONFIG_VIRTUALIZATION is not set |
diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/code-patching.h index 107d9b915e33..37c32aba79b7 100644 --- a/arch/powerpc/include/asm/code-patching.h +++ b/arch/powerpc/include/asm/code-patching.h | |||
@@ -11,9 +11,7 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <asm/types.h> | 13 | #include <asm/types.h> |
14 | 14 | #include <asm/ppc-opcode.h> | |
15 | #define PPC_NOP_INSTR 0x60000000 | ||
16 | #define PPC_LWSYNC_INSTR 0x7c2004ac | ||
17 | 15 | ||
18 | /* Flags for create_branch: | 16 | /* Flags for create_branch: |
19 | * "b" == create_branch(addr, target, 0); | 17 | * "b" == create_branch(addr, target, 0); |
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index 4911104791c3..80f315e8a421 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h | |||
@@ -145,6 +145,7 @@ extern const char *powerpc_base_platform; | |||
145 | #define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040) | 145 | #define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040) |
146 | #define CPU_FTR_L2CSR ASM_CONST(0x0000000000000080) | 146 | #define CPU_FTR_L2CSR ASM_CONST(0x0000000000000080) |
147 | #define CPU_FTR_601 ASM_CONST(0x0000000000000100) | 147 | #define CPU_FTR_601 ASM_CONST(0x0000000000000100) |
148 | #define CPU_FTR_DBELL ASM_CONST(0x0000000000000200) | ||
148 | #define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400) | 149 | #define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400) |
149 | #define CPU_FTR_L3CR ASM_CONST(0x0000000000000800) | 150 | #define CPU_FTR_L3CR ASM_CONST(0x0000000000000800) |
150 | #define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000) | 151 | #define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000) |
@@ -241,9 +242,11 @@ extern const char *powerpc_base_platform; | |||
241 | /* We need to mark all pages as being coherent if we're SMP or we have a | 242 | /* We need to mark all pages as being coherent if we're SMP or we have a |
242 | * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II | 243 | * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II |
243 | * require it for PCI "streaming/prefetch" to work properly. | 244 | * require it for PCI "streaming/prefetch" to work properly. |
245 | * This is also required by 52xx family. | ||
244 | */ | 246 | */ |
245 | #if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \ | 247 | #if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \ |
246 | || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260) | 248 | || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260) \ |
249 | || defined(CONFIG_PPC_MPC52xx) | ||
247 | #define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT | 250 | #define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT |
248 | #else | 251 | #else |
249 | #define CPU_FTR_COMMON 0 | 252 | #define CPU_FTR_COMMON 0 |
@@ -373,7 +376,8 @@ extern const char *powerpc_base_platform; | |||
373 | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) | 376 | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) |
374 | #define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ | 377 | #define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ |
375 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \ | 378 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \ |
376 | CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE) | 379 | CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \ |
380 | CPU_FTR_DBELL) | ||
377 | #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) | 381 | #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) |
378 | 382 | ||
379 | /* 64-bit CPUs */ | 383 | /* 64-bit CPUs */ |
diff --git a/arch/powerpc/include/asm/dbell.h b/arch/powerpc/include/asm/dbell.h new file mode 100644 index 000000000000..501189a543d1 --- /dev/null +++ b/arch/powerpc/include/asm/dbell.h | |||
@@ -0,0 +1,43 @@ | |||
1 | /* | ||
2 | * Copyright 2009 Freescale Semicondutor, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version | ||
7 | * 2 of the License, or (at your option) any later version. | ||
8 | * | ||
9 | * provides masks and opcode images for use by code generation, emulation | ||
10 | * and for instructions that older assemblers might not know about | ||
11 | */ | ||
12 | #ifndef _ASM_POWERPC_DBELL_H | ||
13 | #define _ASM_POWERPC_DBELL_H | ||
14 | |||
15 | #include <linux/smp.h> | ||
16 | #include <linux/threads.h> | ||
17 | |||
18 | #include <asm/ppc-opcode.h> | ||
19 | |||
20 | #define PPC_DBELL_MSG_BRDCAST (0x04000000) | ||
21 | #define PPC_DBELL_TYPE(x) (((x) & 0xf) << 28) | ||
22 | enum ppc_dbell { | ||
23 | PPC_DBELL = 0, /* doorbell */ | ||
24 | PPC_DBELL_CRIT = 1, /* critical doorbell */ | ||
25 | PPC_G_DBELL = 2, /* guest doorbell */ | ||
26 | PPC_G_DBELL_CRIT = 3, /* guest critical doorbell */ | ||
27 | PPC_G_DBELL_MC = 4, /* guest mcheck doorbell */ | ||
28 | }; | ||
29 | |||
30 | #ifdef CONFIG_SMP | ||
31 | extern unsigned long dbell_smp_message[NR_CPUS]; | ||
32 | extern void smp_dbell_message_pass(int target, int msg); | ||
33 | #endif | ||
34 | |||
35 | static inline void ppc_msgsnd(enum ppc_dbell type, u32 flags, u32 tag) | ||
36 | { | ||
37 | u32 msg = PPC_DBELL_TYPE(type) | (flags & PPC_DBELL_MSG_BRDCAST) | | ||
38 | (tag & 0x07ffffff); | ||
39 | |||
40 | __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); | ||
41 | } | ||
42 | |||
43 | #endif /* _ASM_POWERPC_DBELL_H */ | ||
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h index 86cef7ddc8d5..c69f2b5f0cc4 100644 --- a/arch/powerpc/include/asm/dma-mapping.h +++ b/arch/powerpc/include/asm/dma-mapping.h | |||
@@ -109,18 +109,8 @@ static inline struct dma_mapping_ops *get_dma_ops(struct device *dev) | |||
109 | * only ISA DMA device we support is the floppy and we have a hack | 109 | * only ISA DMA device we support is the floppy and we have a hack |
110 | * in the floppy driver directly to get a device for us. | 110 | * in the floppy driver directly to get a device for us. |
111 | */ | 111 | */ |
112 | 112 | if (unlikely(dev == NULL)) | |
113 | if (unlikely(dev == NULL) || dev->archdata.dma_ops == NULL) { | ||
114 | #ifdef CONFIG_PPC64 | ||
115 | return NULL; | 113 | return NULL; |
116 | #else | ||
117 | /* Use default on 32-bit if dma_ops is not set up */ | ||
118 | /* TODO: Long term, we should fix drivers so that dev and | ||
119 | * archdata dma_ops are set up for all buses. | ||
120 | */ | ||
121 | return &dma_direct_ops; | ||
122 | #endif | ||
123 | } | ||
124 | 114 | ||
125 | return dev->archdata.dma_ops; | 115 | return dev->archdata.dma_ops; |
126 | } | 116 | } |
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h index b5600ce6055e..1a856b15226e 100644 --- a/arch/powerpc/include/asm/elf.h +++ b/arch/powerpc/include/asm/elf.h | |||
@@ -8,6 +8,7 @@ | |||
8 | #endif | 8 | #endif |
9 | 9 | ||
10 | #include <linux/types.h> | 10 | #include <linux/types.h> |
11 | |||
11 | #include <asm/ptrace.h> | 12 | #include <asm/ptrace.h> |
12 | #include <asm/cputable.h> | 13 | #include <asm/cputable.h> |
13 | #include <asm/auxvec.h> | 14 | #include <asm/auxvec.h> |
@@ -178,7 +179,8 @@ typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG]; | |||
178 | the loader. We need to make sure that it is out of the way of the program | 179 | the loader. We need to make sure that it is out of the way of the program |
179 | that it will "exec", and that there is sufficient room for the brk. */ | 180 | that it will "exec", and that there is sufficient room for the brk. */ |
180 | 181 | ||
181 | #define ELF_ET_DYN_BASE (0x20000000) | 182 | extern unsigned long randomize_et_dyn(unsigned long base); |
183 | #define ELF_ET_DYN_BASE (randomize_et_dyn(0x20000000)) | ||
182 | 184 | ||
183 | /* | 185 | /* |
184 | * Our registers are always unsigned longs, whether we're a 32 bit | 186 | * Our registers are always unsigned longs, whether we're a 32 bit |
@@ -270,6 +272,14 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm, | |||
270 | int uses_interp); | 272 | int uses_interp); |
271 | #define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b); | 273 | #define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b); |
272 | 274 | ||
275 | /* 1GB for 64bit, 8MB for 32bit */ | ||
276 | #define STACK_RND_MASK (is_32bit_task() ? \ | ||
277 | (0x7ff >> (PAGE_SHIFT - 12)) : \ | ||
278 | (0x3ffff >> (PAGE_SHIFT - 12))) | ||
279 | |||
280 | extern unsigned long arch_randomize_brk(struct mm_struct *mm); | ||
281 | #define arch_randomize_brk arch_randomize_brk | ||
282 | |||
273 | #endif /* __KERNEL__ */ | 283 | #endif /* __KERNEL__ */ |
274 | 284 | ||
275 | /* | 285 | /* |
diff --git a/arch/powerpc/include/asm/fixmap.h b/arch/powerpc/include/asm/fixmap.h index 8428b38a3d30..d60fd18f428c 100644 --- a/arch/powerpc/include/asm/fixmap.h +++ b/arch/powerpc/include/asm/fixmap.h | |||
@@ -61,7 +61,7 @@ extern void __set_fixmap (enum fixed_addresses idx, | |||
61 | * Some hardware wants to get fixmapped without caching. | 61 | * Some hardware wants to get fixmapped without caching. |
62 | */ | 62 | */ |
63 | #define set_fixmap_nocache(idx, phys) \ | 63 | #define set_fixmap_nocache(idx, phys) \ |
64 | __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) | 64 | __set_fixmap(idx, phys, PAGE_KERNEL_NCG) |
65 | 65 | ||
66 | #define clear_fixmap(idx) \ | 66 | #define clear_fixmap(idx) \ |
67 | __set_fixmap(idx, 0, __pgprot(0)) | 67 | __set_fixmap(idx, 0, __pgprot(0)) |
diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h index e5f2ae8362f7..dde1296b8b41 100644 --- a/arch/powerpc/include/asm/ftrace.h +++ b/arch/powerpc/include/asm/ftrace.h | |||
@@ -5,7 +5,44 @@ | |||
5 | #define MCOUNT_ADDR ((long)(_mcount)) | 5 | #define MCOUNT_ADDR ((long)(_mcount)) |
6 | #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ | 6 | #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ |
7 | 7 | ||
8 | #ifndef __ASSEMBLY__ | 8 | #ifdef __ASSEMBLY__ |
9 | |||
10 | /* Based off of objdump optput from glibc */ | ||
11 | |||
12 | #define MCOUNT_SAVE_FRAME \ | ||
13 | stwu r1,-48(r1); \ | ||
14 | stw r3, 12(r1); \ | ||
15 | stw r4, 16(r1); \ | ||
16 | stw r5, 20(r1); \ | ||
17 | stw r6, 24(r1); \ | ||
18 | mflr r3; \ | ||
19 | lwz r4, 52(r1); \ | ||
20 | mfcr r5; \ | ||
21 | stw r7, 28(r1); \ | ||
22 | stw r8, 32(r1); \ | ||
23 | stw r9, 36(r1); \ | ||
24 | stw r10,40(r1); \ | ||
25 | stw r3, 44(r1); \ | ||
26 | stw r5, 8(r1) | ||
27 | |||
28 | #define MCOUNT_RESTORE_FRAME \ | ||
29 | lwz r6, 8(r1); \ | ||
30 | lwz r0, 44(r1); \ | ||
31 | lwz r3, 12(r1); \ | ||
32 | mtctr r0; \ | ||
33 | lwz r4, 16(r1); \ | ||
34 | mtcr r6; \ | ||
35 | lwz r5, 20(r1); \ | ||
36 | lwz r6, 24(r1); \ | ||
37 | lwz r0, 52(r1); \ | ||
38 | lwz r7, 28(r1); \ | ||
39 | lwz r8, 32(r1); \ | ||
40 | mtlr r0; \ | ||
41 | lwz r9, 36(r1); \ | ||
42 | lwz r10,40(r1); \ | ||
43 | addi r1, r1, 48 | ||
44 | |||
45 | #else /* !__ASSEMBLY__ */ | ||
9 | extern void _mcount(void); | 46 | extern void _mcount(void); |
10 | 47 | ||
11 | #ifdef CONFIG_DYNAMIC_FTRACE | 48 | #ifdef CONFIG_DYNAMIC_FTRACE |
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h index 04e4a620952e..545028f86488 100644 --- a/arch/powerpc/include/asm/highmem.h +++ b/arch/powerpc/include/asm/highmem.h | |||
@@ -39,15 +39,15 @@ extern pte_t *pkmap_page_table; | |||
39 | * chunk of RAM. | 39 | * chunk of RAM. |
40 | */ | 40 | */ |
41 | /* | 41 | /* |
42 | * We use one full pte table with 4K pages. And with 16K/64K pages pte | 42 | * We use one full pte table with 4K pages. And with 16K/64K/256K pages pte |
43 | * table covers enough memory (32MB and 512MB resp.) that both FIXMAP | 43 | * table covers enough memory (32MB/512MB/2GB resp.), so that both FIXMAP |
44 | * and PKMAP can be placed in single pte table. We use 1024 pages for | 44 | * and PKMAP can be placed in a single pte table. We use 512 pages for PKMAP |
45 | * PKMAP in case of 16K/64K pages. | 45 | * in case of 16K/64K/256K page sizes. |
46 | */ | 46 | */ |
47 | #ifdef CONFIG_PPC_4K_PAGES | 47 | #ifdef CONFIG_PPC_4K_PAGES |
48 | #define PKMAP_ORDER PTE_SHIFT | 48 | #define PKMAP_ORDER PTE_SHIFT |
49 | #else | 49 | #else |
50 | #define PKMAP_ORDER 10 | 50 | #define PKMAP_ORDER 9 |
51 | #endif | 51 | #endif |
52 | #define LAST_PKMAP (1 << PKMAP_ORDER) | 52 | #define LAST_PKMAP (1 << PKMAP_ORDER) |
53 | #ifndef CONFIG_PPC_4K_PAGES | 53 | #ifndef CONFIG_PPC_4K_PAGES |
@@ -99,7 +99,7 @@ static inline void *kmap_atomic_prot(struct page *page, enum km_type type, pgpro | |||
99 | #ifdef CONFIG_DEBUG_HIGHMEM | 99 | #ifdef CONFIG_DEBUG_HIGHMEM |
100 | BUG_ON(!pte_none(*(kmap_pte-idx))); | 100 | BUG_ON(!pte_none(*(kmap_pte-idx))); |
101 | #endif | 101 | #endif |
102 | __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot)); | 102 | __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot), 1); |
103 | local_flush_tlb_page(NULL, vaddr); | 103 | local_flush_tlb_page(NULL, vaddr); |
104 | 104 | ||
105 | return (void*) vaddr; | 105 | return (void*) vaddr; |
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h index f75a5fc64d2e..b7e034b0a6dd 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h | |||
@@ -129,7 +129,7 @@ static inline int irqs_disabled_flags(unsigned long flags) | |||
129 | * interrupt-retrigger: should we handle this via lost interrupts and IPIs | 129 | * interrupt-retrigger: should we handle this via lost interrupts and IPIs |
130 | * or should we not care like we do now ? --BenH. | 130 | * or should we not care like we do now ? --BenH. |
131 | */ | 131 | */ |
132 | struct hw_interrupt_type; | 132 | struct irq_chip; |
133 | 133 | ||
134 | #endif /* __KERNEL__ */ | 134 | #endif /* __KERNEL__ */ |
135 | #endif /* _ASM_POWERPC_HW_IRQ_H */ | 135 | #endif /* _ASM_POWERPC_HW_IRQ_H */ |
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h index 494cd8b0a278..001f2f11c19b 100644 --- a/arch/powerpc/include/asm/io.h +++ b/arch/powerpc/include/asm/io.h | |||
@@ -632,6 +632,9 @@ static inline void iosync(void) | |||
632 | * ioremap_flags and cannot be hooked (but can be used by a hook on one | 632 | * ioremap_flags and cannot be hooked (but can be used by a hook on one |
633 | * of the previous ones) | 633 | * of the previous ones) |
634 | * | 634 | * |
635 | * * __ioremap_caller is the same as above but takes an explicit caller | ||
636 | * reference rather than using __builtin_return_address(0) | ||
637 | * | ||
635 | * * __iounmap, is the low level implementation used by iounmap and cannot | 638 | * * __iounmap, is the low level implementation used by iounmap and cannot |
636 | * be hooked (but can be used by a hook on iounmap) | 639 | * be hooked (but can be used by a hook on iounmap) |
637 | * | 640 | * |
@@ -646,6 +649,9 @@ extern void iounmap(volatile void __iomem *addr); | |||
646 | 649 | ||
647 | extern void __iomem *__ioremap(phys_addr_t, unsigned long size, | 650 | extern void __iomem *__ioremap(phys_addr_t, unsigned long size, |
648 | unsigned long flags); | 651 | unsigned long flags); |
652 | extern void __iomem *__ioremap_caller(phys_addr_t, unsigned long size, | ||
653 | unsigned long flags, void *caller); | ||
654 | |||
649 | extern void __iounmap(volatile void __iomem *addr); | 655 | extern void __iounmap(volatile void __iomem *addr); |
650 | 656 | ||
651 | extern void __iomem * __ioremap_at(phys_addr_t pa, void *ea, | 657 | extern void __iomem * __ioremap_at(phys_addr_t pa, void *ea, |
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h index 4e0cf65f7f5a..bb2de6aa5ce0 100644 --- a/arch/powerpc/include/asm/kvm.h +++ b/arch/powerpc/include/asm/kvm.h | |||
@@ -52,4 +52,11 @@ struct kvm_fpu { | |||
52 | __u64 fpr[32]; | 52 | __u64 fpr[32]; |
53 | }; | 53 | }; |
54 | 54 | ||
55 | struct kvm_debug_exit_arch { | ||
56 | }; | ||
57 | |||
58 | /* for KVM_SET_GUEST_DEBUG */ | ||
59 | struct kvm_guest_debug_arch { | ||
60 | }; | ||
61 | |||
55 | #endif /* __LINUX_KVM_POWERPC_H */ | 62 | #endif /* __LINUX_KVM_POWERPC_H */ |
diff --git a/arch/powerpc/include/asm/kvm_44x.h b/arch/powerpc/include/asm/kvm_44x.h index f49031b632ca..d22d39942a92 100644 --- a/arch/powerpc/include/asm/kvm_44x.h +++ b/arch/powerpc/include/asm/kvm_44x.h | |||
@@ -28,6 +28,13 @@ | |||
28 | * need to find some way of advertising it. */ | 28 | * need to find some way of advertising it. */ |
29 | #define KVM44x_GUEST_TLB_SIZE 64 | 29 | #define KVM44x_GUEST_TLB_SIZE 64 |
30 | 30 | ||
31 | struct kvmppc_44x_tlbe { | ||
32 | u32 tid; /* Only the low 8 bits are used. */ | ||
33 | u32 word0; | ||
34 | u32 word1; | ||
35 | u32 word2; | ||
36 | }; | ||
37 | |||
31 | struct kvmppc_44x_shadow_ref { | 38 | struct kvmppc_44x_shadow_ref { |
32 | struct page *page; | 39 | struct page *page; |
33 | u16 gtlb_index; | 40 | u16 gtlb_index; |
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h index 2197764796d9..56bfae59837f 100644 --- a/arch/powerpc/include/asm/kvm_asm.h +++ b/arch/powerpc/include/asm/kvm_asm.h | |||
@@ -42,7 +42,12 @@ | |||
42 | #define BOOKE_INTERRUPT_DTLB_MISS 13 | 42 | #define BOOKE_INTERRUPT_DTLB_MISS 13 |
43 | #define BOOKE_INTERRUPT_ITLB_MISS 14 | 43 | #define BOOKE_INTERRUPT_ITLB_MISS 14 |
44 | #define BOOKE_INTERRUPT_DEBUG 15 | 44 | #define BOOKE_INTERRUPT_DEBUG 15 |
45 | #define BOOKE_MAX_INTERRUPT 15 | 45 | |
46 | /* E500 */ | ||
47 | #define BOOKE_INTERRUPT_SPE_UNAVAIL 32 | ||
48 | #define BOOKE_INTERRUPT_SPE_FP_DATA 33 | ||
49 | #define BOOKE_INTERRUPT_SPE_FP_ROUND 34 | ||
50 | #define BOOKE_INTERRUPT_PERFORMANCE_MONITOR 35 | ||
46 | 51 | ||
47 | #define RESUME_FLAG_NV (1<<0) /* Reload guest nonvolatile state? */ | 52 | #define RESUME_FLAG_NV (1<<0) /* Reload guest nonvolatile state? */ |
48 | #define RESUME_FLAG_HOST (1<<1) /* Resume host? */ | 53 | #define RESUME_FLAG_HOST (1<<1) /* Resume host? */ |
diff --git a/arch/powerpc/include/asm/kvm_e500.h b/arch/powerpc/include/asm/kvm_e500.h new file mode 100644 index 000000000000..9d497ce49726 --- /dev/null +++ b/arch/powerpc/include/asm/kvm_e500.h | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved. | ||
3 | * | ||
4 | * Author: Yu Liu, <yu.liu@freescale.com> | ||
5 | * | ||
6 | * Description: | ||
7 | * This file is derived from arch/powerpc/include/asm/kvm_44x.h, | ||
8 | * by Hollis Blanchard <hollisb@us.ibm.com>. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License, version 2, as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_KVM_E500_H__ | ||
16 | #define __ASM_KVM_E500_H__ | ||
17 | |||
18 | #include <linux/kvm_host.h> | ||
19 | |||
20 | #define BOOKE_INTERRUPT_SIZE 36 | ||
21 | |||
22 | #define E500_PID_NUM 3 | ||
23 | #define E500_TLB_NUM 2 | ||
24 | |||
25 | struct tlbe{ | ||
26 | u32 mas1; | ||
27 | u32 mas2; | ||
28 | u32 mas3; | ||
29 | u32 mas7; | ||
30 | }; | ||
31 | |||
32 | struct kvmppc_vcpu_e500 { | ||
33 | /* Unmodified copy of the guest's TLB. */ | ||
34 | struct tlbe *guest_tlb[E500_TLB_NUM]; | ||
35 | /* TLB that's actually used when the guest is running. */ | ||
36 | struct tlbe *shadow_tlb[E500_TLB_NUM]; | ||
37 | /* Pages which are referenced in the shadow TLB. */ | ||
38 | struct page **shadow_pages[E500_TLB_NUM]; | ||
39 | |||
40 | unsigned int guest_tlb_size[E500_TLB_NUM]; | ||
41 | unsigned int shadow_tlb_size[E500_TLB_NUM]; | ||
42 | unsigned int guest_tlb_nv[E500_TLB_NUM]; | ||
43 | |||
44 | u32 host_pid[E500_PID_NUM]; | ||
45 | u32 pid[E500_PID_NUM]; | ||
46 | |||
47 | u32 mas0; | ||
48 | u32 mas1; | ||
49 | u32 mas2; | ||
50 | u32 mas3; | ||
51 | u32 mas4; | ||
52 | u32 mas5; | ||
53 | u32 mas6; | ||
54 | u32 mas7; | ||
55 | u32 l1csr1; | ||
56 | u32 hid0; | ||
57 | u32 hid1; | ||
58 | |||
59 | struct kvm_vcpu vcpu; | ||
60 | }; | ||
61 | |||
62 | static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu) | ||
63 | { | ||
64 | return container_of(vcpu, struct kvmppc_vcpu_e500, vcpu); | ||
65 | } | ||
66 | |||
67 | #endif /* __ASM_KVM_E500_H__ */ | ||
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h index c1e436fe7738..dfdf13c9fefd 100644 --- a/arch/powerpc/include/asm/kvm_host.h +++ b/arch/powerpc/include/asm/kvm_host.h | |||
@@ -64,13 +64,6 @@ struct kvm_vcpu_stat { | |||
64 | u32 halt_wakeup; | 64 | u32 halt_wakeup; |
65 | }; | 65 | }; |
66 | 66 | ||
67 | struct kvmppc_44x_tlbe { | ||
68 | u32 tid; /* Only the low 8 bits are used. */ | ||
69 | u32 word0; | ||
70 | u32 word1; | ||
71 | u32 word2; | ||
72 | }; | ||
73 | |||
74 | enum kvm_exit_types { | 67 | enum kvm_exit_types { |
75 | MMIO_EXITS, | 68 | MMIO_EXITS, |
76 | DCR_EXITS, | 69 | DCR_EXITS, |
@@ -118,11 +111,6 @@ struct kvm_arch { | |||
118 | struct kvm_vcpu_arch { | 111 | struct kvm_vcpu_arch { |
119 | u32 host_stack; | 112 | u32 host_stack; |
120 | u32 host_pid; | 113 | u32 host_pid; |
121 | u32 host_dbcr0; | ||
122 | u32 host_dbcr1; | ||
123 | u32 host_dbcr2; | ||
124 | u32 host_iac[4]; | ||
125 | u32 host_msr; | ||
126 | 114 | ||
127 | u64 fpr[32]; | 115 | u64 fpr[32]; |
128 | ulong gpr[32]; | 116 | ulong gpr[32]; |
@@ -157,7 +145,7 @@ struct kvm_vcpu_arch { | |||
157 | u32 tbu; | 145 | u32 tbu; |
158 | u32 tcr; | 146 | u32 tcr; |
159 | u32 tsr; | 147 | u32 tsr; |
160 | u32 ivor[16]; | 148 | u32 ivor[64]; |
161 | ulong ivpr; | 149 | ulong ivpr; |
162 | u32 pir; | 150 | u32 pir; |
163 | 151 | ||
@@ -170,6 +158,7 @@ struct kvm_vcpu_arch { | |||
170 | u32 ccr1; | 158 | u32 ccr1; |
171 | u32 dbcr0; | 159 | u32 dbcr0; |
172 | u32 dbcr1; | 160 | u32 dbcr1; |
161 | u32 dbsr; | ||
173 | 162 | ||
174 | #ifdef CONFIG_KVM_EXIT_TIMING | 163 | #ifdef CONFIG_KVM_EXIT_TIMING |
175 | struct kvmppc_exit_timing timing_exit; | 164 | struct kvmppc_exit_timing timing_exit; |
@@ -200,10 +189,4 @@ struct kvm_vcpu_arch { | |||
200 | unsigned long pending_exceptions; | 189 | unsigned long pending_exceptions; |
201 | }; | 190 | }; |
202 | 191 | ||
203 | struct kvm_guest_debug { | ||
204 | int enabled; | ||
205 | unsigned long bp[4]; | ||
206 | int singlestep; | ||
207 | }; | ||
208 | |||
209 | #endif /* __POWERPC_KVM_HOST_H__ */ | 192 | #endif /* __POWERPC_KVM_HOST_H__ */ |
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h index 36d2a50a8487..2c6ee349df5e 100644 --- a/arch/powerpc/include/asm/kvm_ppc.h +++ b/arch/powerpc/include/asm/kvm_ppc.h | |||
@@ -52,13 +52,19 @@ extern int kvmppc_emulate_instruction(struct kvm_run *run, | |||
52 | extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu); | 52 | extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu); |
53 | extern void kvmppc_emulate_dec(struct kvm_vcpu *vcpu); | 53 | extern void kvmppc_emulate_dec(struct kvm_vcpu *vcpu); |
54 | 54 | ||
55 | /* Core-specific hooks */ | ||
56 | |||
55 | extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr, | 57 | extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr, |
56 | u64 asid, u32 flags, u32 max_bytes, | ||
57 | unsigned int gtlb_idx); | 58 | unsigned int gtlb_idx); |
58 | extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode); | 59 | extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode); |
59 | extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid); | 60 | extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid); |
60 | 61 | extern void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu); | |
61 | /* Core-specific hooks */ | 62 | extern int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr); |
63 | extern int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr); | ||
64 | extern gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index, | ||
65 | gva_t eaddr); | ||
66 | extern void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu); | ||
67 | extern void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu); | ||
62 | 68 | ||
63 | extern struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, | 69 | extern struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, |
64 | unsigned int id); | 70 | unsigned int id); |
@@ -71,9 +77,6 @@ extern int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu, | |||
71 | extern void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu); | 77 | extern void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu); |
72 | extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu); | 78 | extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu); |
73 | 79 | ||
74 | extern void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu); | ||
75 | extern void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu); | ||
76 | |||
77 | extern void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu); | 80 | extern void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu); |
78 | extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu); | 81 | extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu); |
79 | extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu); | 82 | extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu); |
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h index 25aaa97facd8..68235f7e4a8f 100644 --- a/arch/powerpc/include/asm/lppaca.h +++ b/arch/powerpc/include/asm/lppaca.h | |||
@@ -97,7 +97,7 @@ struct lppaca { | |||
97 | u64 saved_gpr4; // Saved GPR4 x28-x2F | 97 | u64 saved_gpr4; // Saved GPR4 x28-x2F |
98 | u64 saved_gpr5; // Saved GPR5 x30-x37 | 98 | u64 saved_gpr5; // Saved GPR5 x30-x37 |
99 | 99 | ||
100 | u8 reserved4; // Reserved x38-x38 | 100 | u8 dtl_enable_mask; // Dispatch Trace Log mask x38-x38 |
101 | u8 donate_dedicated_cpu; // Donate dedicated CPU cycles x39-x39 | 101 | u8 donate_dedicated_cpu; // Donate dedicated CPU cycles x39-x39 |
102 | u8 fpregs_in_use; // FP regs in use x3A-x3A | 102 | u8 fpregs_in_use; // FP regs in use x3A-x3A |
103 | u8 pmcregs_in_use; // PMC regs in use x3B-x3B | 103 | u8 pmcregs_in_use; // PMC regs in use x3B-x3B |
@@ -133,8 +133,10 @@ struct lppaca { | |||
133 | //============================================================================= | 133 | //============================================================================= |
134 | // CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data | 134 | // CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data |
135 | //============================================================================= | 135 | //============================================================================= |
136 | u32 page_ins; // CMO Hint - # page ins by OS x00-x04 | 136 | u32 page_ins; // CMO Hint - # page ins by OS x00-x03 |
137 | u8 pmc_save_area[252]; // PMC interrupt Area x04-xFF | 137 | u8 reserved8[148]; // Reserved x04-x97 |
138 | volatile u64 dtl_idx; // Dispatch Trace Log head idx x98-x9F | ||
139 | u8 reserved9[96]; // Reserved xA0-xFF | ||
138 | } __attribute__((__aligned__(0x400))); | 140 | } __attribute__((__aligned__(0x400))); |
139 | 141 | ||
140 | extern struct lppaca lppaca[]; | 142 | extern struct lppaca lppaca[]; |
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h index 2740c44ff717..0efdb1dfdc5f 100644 --- a/arch/powerpc/include/asm/machdep.h +++ b/arch/powerpc/include/asm/machdep.h | |||
@@ -90,7 +90,7 @@ struct machdep_calls { | |||
90 | void (*tce_flush)(struct iommu_table *tbl); | 90 | void (*tce_flush)(struct iommu_table *tbl); |
91 | 91 | ||
92 | void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, | 92 | void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, |
93 | unsigned long flags); | 93 | unsigned long flags, void *caller); |
94 | void (*iounmap)(volatile void __iomem *token); | 94 | void (*iounmap)(volatile void __iomem *token); |
95 | 95 | ||
96 | #ifdef CONFIG_PM | 96 | #ifdef CONFIG_PM |
@@ -327,8 +327,6 @@ extern void __devinit smp_generic_take_timebase(void); | |||
327 | */ | 327 | */ |
328 | /* Print a boot progress message. */ | 328 | /* Print a boot progress message. */ |
329 | void ppc64_boot_msg(unsigned int src, const char *msg); | 329 | void ppc64_boot_msg(unsigned int src, const char *msg); |
330 | /* Print a termination message (print only -- does not stop the kernel) */ | ||
331 | void ppc64_terminate_msg(unsigned int src, const char *msg); | ||
332 | 330 | ||
333 | static inline void log_error(char *buf, unsigned int err_type, int fatal) | 331 | static inline void log_error(char *buf, unsigned int err_type, int fatal) |
334 | { | 332 | { |
diff --git a/arch/powerpc/include/asm/mmu-44x.h b/arch/powerpc/include/asm/mmu-44x.h index 27cc6fdcd3b7..3c86576bfefa 100644 --- a/arch/powerpc/include/asm/mmu-44x.h +++ b/arch/powerpc/include/asm/mmu-44x.h | |||
@@ -83,6 +83,8 @@ typedef struct { | |||
83 | #define PPC44x_TLBE_SIZE PPC44x_TLB_16K | 83 | #define PPC44x_TLBE_SIZE PPC44x_TLB_16K |
84 | #elif (PAGE_SHIFT == 16) | 84 | #elif (PAGE_SHIFT == 16) |
85 | #define PPC44x_TLBE_SIZE PPC44x_TLB_64K | 85 | #define PPC44x_TLBE_SIZE PPC44x_TLB_64K |
86 | #elif (PAGE_SHIFT == 18) | ||
87 | #define PPC44x_TLBE_SIZE PPC44x_TLB_256K | ||
86 | #else | 88 | #else |
87 | #error "Unsupported PAGE_SIZE" | 89 | #error "Unsupported PAGE_SIZE" |
88 | #endif | 90 | #endif |
diff --git a/arch/powerpc/include/asm/mmu-fsl-booke.h b/arch/powerpc/include/asm/mmu-book3e.h index 3f941c0f7e8e..7e74cff81d86 100644 --- a/arch/powerpc/include/asm/mmu-fsl-booke.h +++ b/arch/powerpc/include/asm/mmu-book3e.h | |||
@@ -1,26 +1,42 @@ | |||
1 | #ifndef _ASM_POWERPC_MMU_FSL_BOOKE_H_ | 1 | #ifndef _ASM_POWERPC_MMU_BOOK3E_H_ |
2 | #define _ASM_POWERPC_MMU_FSL_BOOKE_H_ | 2 | #define _ASM_POWERPC_MMU_BOOK3E_H_ |
3 | /* | 3 | /* |
4 | * Freescale Book-E MMU support | 4 | * Freescale Book-E/Book-3e (ISA 2.06+) MMU support |
5 | */ | 5 | */ |
6 | 6 | ||
7 | /* Book-E defined page sizes */ | 7 | /* Book-3e defined page sizes */ |
8 | #define BOOKE_PAGESZ_1K 0 | 8 | #define BOOK3E_PAGESZ_1K 0 |
9 | #define BOOKE_PAGESZ_4K 1 | 9 | #define BOOK3E_PAGESZ_2K 1 |
10 | #define BOOKE_PAGESZ_16K 2 | 10 | #define BOOK3E_PAGESZ_4K 2 |
11 | #define BOOKE_PAGESZ_64K 3 | 11 | #define BOOK3E_PAGESZ_8K 3 |
12 | #define BOOKE_PAGESZ_256K 4 | 12 | #define BOOK3E_PAGESZ_16K 4 |
13 | #define BOOKE_PAGESZ_1M 5 | 13 | #define BOOK3E_PAGESZ_32K 5 |
14 | #define BOOKE_PAGESZ_4M 6 | 14 | #define BOOK3E_PAGESZ_64K 6 |
15 | #define BOOKE_PAGESZ_16M 7 | 15 | #define BOOK3E_PAGESZ_128K 7 |
16 | #define BOOKE_PAGESZ_64M 8 | 16 | #define BOOK3E_PAGESZ_256K 8 |
17 | #define BOOKE_PAGESZ_256M 9 | 17 | #define BOOK3E_PAGESZ_512K 9 |
18 | #define BOOKE_PAGESZ_1GB 10 | 18 | #define BOOK3E_PAGESZ_1M 10 |
19 | #define BOOKE_PAGESZ_4GB 11 | 19 | #define BOOK3E_PAGESZ_2M 11 |
20 | #define BOOKE_PAGESZ_16GB 12 | 20 | #define BOOK3E_PAGESZ_4M 12 |
21 | #define BOOKE_PAGESZ_64GB 13 | 21 | #define BOOK3E_PAGESZ_8M 13 |
22 | #define BOOKE_PAGESZ_256GB 14 | 22 | #define BOOK3E_PAGESZ_16M 14 |
23 | #define BOOKE_PAGESZ_1TB 15 | 23 | #define BOOK3E_PAGESZ_32M 15 |
24 | #define BOOK3E_PAGESZ_64M 16 | ||
25 | #define BOOK3E_PAGESZ_128M 17 | ||
26 | #define BOOK3E_PAGESZ_256M 18 | ||
27 | #define BOOK3E_PAGESZ_512M 19 | ||
28 | #define BOOK3E_PAGESZ_1GB 20 | ||
29 | #define BOOK3E_PAGESZ_2GB 21 | ||
30 | #define BOOK3E_PAGESZ_4GB 22 | ||
31 | #define BOOK3E_PAGESZ_8GB 23 | ||
32 | #define BOOK3E_PAGESZ_16GB 24 | ||
33 | #define BOOK3E_PAGESZ_32GB 25 | ||
34 | #define BOOK3E_PAGESZ_64GB 26 | ||
35 | #define BOOK3E_PAGESZ_128GB 27 | ||
36 | #define BOOK3E_PAGESZ_256GB 28 | ||
37 | #define BOOK3E_PAGESZ_512GB 29 | ||
38 | #define BOOK3E_PAGESZ_1TB 30 | ||
39 | #define BOOK3E_PAGESZ_2TB 31 | ||
24 | 40 | ||
25 | #define MAS0_TLBSEL(x) ((x << 28) & 0x30000000) | 41 | #define MAS0_TLBSEL(x) ((x << 28) & 0x30000000) |
26 | #define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000) | 42 | #define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000) |
@@ -29,8 +45,9 @@ | |||
29 | #define MAS1_VALID 0x80000000 | 45 | #define MAS1_VALID 0x80000000 |
30 | #define MAS1_IPROT 0x40000000 | 46 | #define MAS1_IPROT 0x40000000 |
31 | #define MAS1_TID(x) ((x << 16) & 0x3FFF0000) | 47 | #define MAS1_TID(x) ((x << 16) & 0x3FFF0000) |
48 | #define MAS1_IND 0x00002000 | ||
32 | #define MAS1_TS 0x00001000 | 49 | #define MAS1_TS 0x00001000 |
33 | #define MAS1_TSIZE(x) ((x << 8) & 0x00000F00) | 50 | #define MAS1_TSIZE(x) ((x << 7) & 0x00000F80) |
34 | 51 | ||
35 | #define MAS2_EPN 0xFFFFF000 | 52 | #define MAS2_EPN 0xFFFFF000 |
36 | #define MAS2_X0 0x00000040 | 53 | #define MAS2_X0 0x00000040 |
@@ -40,7 +57,7 @@ | |||
40 | #define MAS2_M 0x00000004 | 57 | #define MAS2_M 0x00000004 |
41 | #define MAS2_G 0x00000002 | 58 | #define MAS2_G 0x00000002 |
42 | #define MAS2_E 0x00000001 | 59 | #define MAS2_E 0x00000001 |
43 | #define MAS2_EPN_MASK(size) (~0 << (2*(size) + 10)) | 60 | #define MAS2_EPN_MASK(size) (~0 << (size + 10)) |
44 | #define MAS2_VAL(addr, size, flags) ((addr) & MAS2_EPN_MASK(size) | (flags)) | 61 | #define MAS2_VAL(addr, size, flags) ((addr) & MAS2_EPN_MASK(size) | (flags)) |
45 | 62 | ||
46 | #define MAS3_RPN 0xFFFFF000 | 63 | #define MAS3_RPN 0xFFFFF000 |
@@ -56,7 +73,7 @@ | |||
56 | #define MAS3_SR 0x00000001 | 73 | #define MAS3_SR 0x00000001 |
57 | 74 | ||
58 | #define MAS4_TLBSELD(x) MAS0_TLBSEL(x) | 75 | #define MAS4_TLBSELD(x) MAS0_TLBSEL(x) |
59 | #define MAS4_TIDDSEL 0x000F0000 | 76 | #define MAS4_INDD 0x00008000 |
60 | #define MAS4_TSIZED(x) MAS1_TSIZE(x) | 77 | #define MAS4_TSIZED(x) MAS1_TSIZE(x) |
61 | #define MAS4_X0D 0x00000040 | 78 | #define MAS4_X0D 0x00000040 |
62 | #define MAS4_X1D 0x00000020 | 79 | #define MAS4_X1D 0x00000020 |
@@ -68,6 +85,7 @@ | |||
68 | 85 | ||
69 | #define MAS6_SPID0 0x3FFF0000 | 86 | #define MAS6_SPID0 0x3FFF0000 |
70 | #define MAS6_SPID1 0x00007FFE | 87 | #define MAS6_SPID1 0x00007FFE |
88 | #define MAS6_ISIZE(x) MAS1_TSIZE(x) | ||
71 | #define MAS6_SAS 0x00000001 | 89 | #define MAS6_SAS 0x00000001 |
72 | #define MAS6_SPID MAS6_SPID0 | 90 | #define MAS6_SPID MAS6_SPID0 |
73 | 91 | ||
@@ -75,6 +93,8 @@ | |||
75 | 93 | ||
76 | #ifndef __ASSEMBLY__ | 94 | #ifndef __ASSEMBLY__ |
77 | 95 | ||
96 | extern unsigned int tlbcam_index; | ||
97 | |||
78 | typedef struct { | 98 | typedef struct { |
79 | unsigned int id; | 99 | unsigned int id; |
80 | unsigned int active; | 100 | unsigned int active; |
@@ -82,4 +102,4 @@ typedef struct { | |||
82 | } mm_context_t; | 102 | } mm_context_t; |
83 | #endif /* !__ASSEMBLY__ */ | 103 | #endif /* !__ASSEMBLY__ */ |
84 | 104 | ||
85 | #endif /* _ASM_POWERPC_MMU_FSL_BOOKE_H_ */ | 105 | #endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */ |
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h index 68b752626808..98c104a09961 100644 --- a/arch/powerpc/include/asm/mmu-hash64.h +++ b/arch/powerpc/include/asm/mmu-hash64.h | |||
@@ -284,8 +284,6 @@ extern void add_gpage(unsigned long addr, unsigned long page_size, | |||
284 | unsigned long number_of_pages); | 284 | unsigned long number_of_pages); |
285 | extern void demote_segment_4k(struct mm_struct *mm, unsigned long addr); | 285 | extern void demote_segment_4k(struct mm_struct *mm, unsigned long addr); |
286 | 286 | ||
287 | extern void htab_initialize(void); | ||
288 | extern void htab_initialize_secondary(void); | ||
289 | extern void hpte_init_native(void); | 287 | extern void hpte_init_native(void); |
290 | extern void hpte_init_lpar(void); | 288 | extern void hpte_init_lpar(void); |
291 | extern void hpte_init_iSeries(void); | 289 | extern void hpte_init_iSeries(void); |
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index 6e7639911318..cbf154387091 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h | |||
@@ -36,9 +36,9 @@ | |||
36 | */ | 36 | */ |
37 | #define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000) | 37 | #define MMU_FTR_USE_TLBIVAX_BCAST ASM_CONST(0x00040000) |
38 | 38 | ||
39 | /* Enable use of tlbilx invalidate-by-PID variant. | 39 | /* Enable use of tlbilx invalidate instructions. |
40 | */ | 40 | */ |
41 | #define MMU_FTR_USE_TLBILX_PID ASM_CONST(0x00080000) | 41 | #define MMU_FTR_USE_TLBILX ASM_CONST(0x00080000) |
42 | 42 | ||
43 | /* This indicates that the processor cannot handle multiple outstanding | 43 | /* This indicates that the processor cannot handle multiple outstanding |
44 | * broadcast tlbivax or tlbsync. This makes the code use a spinlock | 44 | * broadcast tlbivax or tlbsync. This makes the code use a spinlock |
@@ -46,6 +46,12 @@ | |||
46 | */ | 46 | */ |
47 | #define MMU_FTR_LOCK_BCAST_INVAL ASM_CONST(0x00100000) | 47 | #define MMU_FTR_LOCK_BCAST_INVAL ASM_CONST(0x00100000) |
48 | 48 | ||
49 | /* This indicates that the processor doesn't handle way selection | ||
50 | * properly and needs SW to track and update the LRU state. This | ||
51 | * is specific to an errata on e300c2/c3/c4 class parts | ||
52 | */ | ||
53 | #define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000) | ||
54 | |||
49 | #ifndef __ASSEMBLY__ | 55 | #ifndef __ASSEMBLY__ |
50 | #include <asm/cputable.h> | 56 | #include <asm/cputable.h> |
51 | 57 | ||
@@ -56,6 +62,10 @@ static inline int mmu_has_feature(unsigned long feature) | |||
56 | 62 | ||
57 | extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup; | 63 | extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup; |
58 | 64 | ||
65 | /* MMU initialization (64-bit only fo now) */ | ||
66 | extern void early_init_mmu(void); | ||
67 | extern void early_init_mmu_secondary(void); | ||
68 | |||
59 | #endif /* !__ASSEMBLY__ */ | 69 | #endif /* !__ASSEMBLY__ */ |
60 | 70 | ||
61 | 71 | ||
@@ -71,9 +81,9 @@ extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup; | |||
71 | #elif defined(CONFIG_44x) | 81 | #elif defined(CONFIG_44x) |
72 | /* 44x-style software loaded TLB */ | 82 | /* 44x-style software loaded TLB */ |
73 | # include <asm/mmu-44x.h> | 83 | # include <asm/mmu-44x.h> |
74 | #elif defined(CONFIG_FSL_BOOKE) | 84 | #elif defined(CONFIG_PPC_BOOK3E_MMU) |
75 | /* Freescale Book-E software loaded TLB */ | 85 | /* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */ |
76 | # include <asm/mmu-fsl-booke.h> | 86 | # include <asm/mmu-book3e.h> |
77 | #elif defined (CONFIG_PPC_8xx) | 87 | #elif defined (CONFIG_PPC_8xx) |
78 | /* Motorola/Freescale 8xx software loaded TLB */ | 88 | /* Motorola/Freescale 8xx software loaded TLB */ |
79 | # include <asm/mmu-8xx.h> | 89 | # include <asm/mmu-8xx.h> |
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h index ab4f19263c42..b7063669f972 100644 --- a/arch/powerpc/include/asm/mmu_context.h +++ b/arch/powerpc/include/asm/mmu_context.h | |||
@@ -31,7 +31,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | |||
31 | struct task_struct *tsk) | 31 | struct task_struct *tsk) |
32 | { | 32 | { |
33 | /* Mark this context has been used on the new CPU */ | 33 | /* Mark this context has been used on the new CPU */ |
34 | cpu_set(smp_processor_id(), next->cpu_vm_mask); | 34 | cpumask_set_cpu(smp_processor_id(), mm_cpumask(next)); |
35 | 35 | ||
36 | /* 32-bit keeps track of the current PGDIR in the thread struct */ | 36 | /* 32-bit keeps track of the current PGDIR in the thread struct */ |
37 | #ifdef CONFIG_PPC32 | 37 | #ifdef CONFIG_PPC32 |
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h index 81a23932a160..52e049cd9e68 100644 --- a/arch/powerpc/include/asm/mpc52xx.h +++ b/arch/powerpc/include/asm/mpc52xx.h | |||
@@ -273,6 +273,7 @@ extern void mpc5200_setup_xlb_arbiter(void); | |||
273 | extern void mpc52xx_declare_of_platform_devices(void); | 273 | extern void mpc52xx_declare_of_platform_devices(void); |
274 | extern void mpc52xx_map_common_devices(void); | 274 | extern void mpc52xx_map_common_devices(void); |
275 | extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv); | 275 | extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv); |
276 | extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node); | ||
276 | extern void mpc52xx_restart(char *cmd); | 277 | extern void mpc52xx_restart(char *cmd); |
277 | 278 | ||
278 | /* mpc52xx_pic.c */ | 279 | /* mpc52xx_pic.c */ |
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h index 197d569f5bd3..32cbf16f10ea 100644 --- a/arch/powerpc/include/asm/page.h +++ b/arch/powerpc/include/asm/page.h | |||
@@ -19,12 +19,14 @@ | |||
19 | #include <asm/kdump.h> | 19 | #include <asm/kdump.h> |
20 | 20 | ||
21 | /* | 21 | /* |
22 | * On regular PPC32 page size is 4K (but we support 4K/16K/64K pages | 22 | * On regular PPC32 page size is 4K (but we support 4K/16K/64K/256K pages |
23 | * on PPC44x). For PPC64 we support either 4K or 64K software | 23 | * on PPC44x). For PPC64 we support either 4K or 64K software |
24 | * page size. When using 64K pages however, whether we are really supporting | 24 | * page size. When using 64K pages however, whether we are really supporting |
25 | * 64K pages in HW or not is irrelevant to those definitions. | 25 | * 64K pages in HW or not is irrelevant to those definitions. |
26 | */ | 26 | */ |
27 | #if defined(CONFIG_PPC_64K_PAGES) | 27 | #if defined(CONFIG_PPC_256K_PAGES) |
28 | #define PAGE_SHIFT 18 | ||
29 | #elif defined(CONFIG_PPC_64K_PAGES) | ||
28 | #define PAGE_SHIFT 16 | 30 | #define PAGE_SHIFT 16 |
29 | #elif defined(CONFIG_PPC_16K_PAGES) | 31 | #elif defined(CONFIG_PPC_16K_PAGES) |
30 | #define PAGE_SHIFT 14 | 32 | #define PAGE_SHIFT 14 |
diff --git a/arch/powerpc/include/asm/page_32.h b/arch/powerpc/include/asm/page_32.h index 1458d9500381..a0e3f6e6b4ee 100644 --- a/arch/powerpc/include/asm/page_32.h +++ b/arch/powerpc/include/asm/page_32.h | |||
@@ -19,7 +19,11 @@ | |||
19 | #define PTE_FLAGS_OFFSET 0 | 19 | #define PTE_FLAGS_OFFSET 0 |
20 | #endif | 20 | #endif |
21 | 21 | ||
22 | #ifdef CONFIG_PPC_256K_PAGES | ||
23 | #define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2 - 2) /* 1/4 of a page */ | ||
24 | #else | ||
22 | #define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2) /* full page */ | 25 | #define PTE_SHIFT (PAGE_SHIFT - PTE_T_LOG2) /* full page */ |
26 | #endif | ||
23 | 27 | ||
24 | #ifndef __ASSEMBLY__ | 28 | #ifndef __ASSEMBLY__ |
25 | /* | 29 | /* |
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h index 820b5f0a35ce..ba45c997830f 100644 --- a/arch/powerpc/include/asm/pgtable-ppc32.h +++ b/arch/powerpc/include/asm/pgtable-ppc32.h | |||
@@ -19,55 +19,6 @@ extern int icache_44x_need_flush; | |||
19 | #endif /* __ASSEMBLY__ */ | 19 | #endif /* __ASSEMBLY__ */ |
20 | 20 | ||
21 | /* | 21 | /* |
22 | * The PowerPC MMU uses a hash table containing PTEs, together with | ||
23 | * a set of 16 segment registers (on 32-bit implementations), to define | ||
24 | * the virtual to physical address mapping. | ||
25 | * | ||
26 | * We use the hash table as an extended TLB, i.e. a cache of currently | ||
27 | * active mappings. We maintain a two-level page table tree, much | ||
28 | * like that used by the i386, for the sake of the Linux memory | ||
29 | * management code. Low-level assembler code in hashtable.S | ||
30 | * (procedure hash_page) is responsible for extracting ptes from the | ||
31 | * tree and putting them into the hash table when necessary, and | ||
32 | * updating the accessed and modified bits in the page table tree. | ||
33 | */ | ||
34 | |||
35 | /* | ||
36 | * The PowerPC MPC8xx uses a TLB with hardware assisted, software tablewalk. | ||
37 | * We also use the two level tables, but we can put the real bits in them | ||
38 | * needed for the TLB and tablewalk. These definitions require Mx_CTR.PPM = 0, | ||
39 | * Mx_CTR.PPCS = 0, and MD_CTR.TWAM = 1. The level 2 descriptor has | ||
40 | * additional page protection (when Mx_CTR.PPCS = 1) that allows TLB hit | ||
41 | * based upon user/super access. The TLB does not have accessed nor write | ||
42 | * protect. We assume that if the TLB get loaded with an entry it is | ||
43 | * accessed, and overload the changed bit for write protect. We use | ||
44 | * two bits in the software pte that are supposed to be set to zero in | ||
45 | * the TLB entry (24 and 25) for these indicators. Although the level 1 | ||
46 | * descriptor contains the guarded and writethrough/copyback bits, we can | ||
47 | * set these at the page level since they get copied from the Mx_TWC | ||
48 | * register when the TLB entry is loaded. We will use bit 27 for guard, since | ||
49 | * that is where it exists in the MD_TWC, and bit 26 for writethrough. | ||
50 | * These will get masked from the level 2 descriptor at TLB load time, and | ||
51 | * copied to the MD_TWC before it gets loaded. | ||
52 | * Large page sizes added. We currently support two sizes, 4K and 8M. | ||
53 | * This also allows a TLB hander optimization because we can directly | ||
54 | * load the PMD into MD_TWC. The 8M pages are only used for kernel | ||
55 | * mapping of well known areas. The PMD (PGD) entries contain control | ||
56 | * flags in addition to the address, so care must be taken that the | ||
57 | * software no longer assumes these are only pointers. | ||
58 | */ | ||
59 | |||
60 | /* | ||
61 | * At present, all PowerPC 400-class processors share a similar TLB | ||
62 | * architecture. The instruction and data sides share a unified, | ||
63 | * 64-entry, fully-associative TLB which is maintained totally under | ||
64 | * software control. In addition, the instruction side has a | ||
65 | * hardware-managed, 4-entry, fully-associative TLB which serves as a | ||
66 | * first level to the shared TLB. These two TLBs are known as the UTLB | ||
67 | * and ITLB, respectively (see "mmu.h" for definitions). | ||
68 | */ | ||
69 | |||
70 | /* | ||
71 | * The normal case is that PTEs are 32-bits and we have a 1-page | 22 | * The normal case is that PTEs are 32-bits and we have a 1-page |
72 | * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages. -- paulus | 23 | * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages. -- paulus |
73 | * | 24 | * |
@@ -135,409 +86,22 @@ extern int icache_44x_need_flush; | |||
135 | */ | 86 | */ |
136 | 87 | ||
137 | #if defined(CONFIG_40x) | 88 | #if defined(CONFIG_40x) |
138 | 89 | #include <asm/pte-40x.h> | |
139 | /* There are several potential gotchas here. The 40x hardware TLBLO | ||
140 | field looks like this: | ||
141 | |||
142 | 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31 | ||
143 | RPN..................... 0 0 EX WR ZSEL....... W I M G | ||
144 | |||
145 | Where possible we make the Linux PTE bits match up with this | ||
146 | |||
147 | - bits 20 and 21 must be cleared, because we use 4k pages (40x can | ||
148 | support down to 1k pages), this is done in the TLBMiss exception | ||
149 | handler. | ||
150 | - We use only zones 0 (for kernel pages) and 1 (for user pages) | ||
151 | of the 16 available. Bit 24-26 of the TLB are cleared in the TLB | ||
152 | miss handler. Bit 27 is PAGE_USER, thus selecting the correct | ||
153 | zone. | ||
154 | - PRESENT *must* be in the bottom two bits because swap cache | ||
155 | entries use the top 30 bits. Because 40x doesn't support SMP | ||
156 | anyway, M is irrelevant so we borrow it for PAGE_PRESENT. Bit 30 | ||
157 | is cleared in the TLB miss handler before the TLB entry is loaded. | ||
158 | - All other bits of the PTE are loaded into TLBLO without | ||
159 | modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for | ||
160 | software PTE bits. We actually use use bits 21, 24, 25, and | ||
161 | 30 respectively for the software bits: ACCESSED, DIRTY, RW, and | ||
162 | PRESENT. | ||
163 | */ | ||
164 | |||
165 | /* Definitions for 40x embedded chips. */ | ||
166 | #define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */ | ||
167 | #define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */ | ||
168 | #define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */ | ||
169 | #define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */ | ||
170 | #define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */ | ||
171 | #define _PAGE_USER 0x010 /* matches one of the zone permission bits */ | ||
172 | #define _PAGE_RW 0x040 /* software: Writes permitted */ | ||
173 | #define _PAGE_DIRTY 0x080 /* software: dirty page */ | ||
174 | #define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */ | ||
175 | #define _PAGE_HWEXEC 0x200 /* hardware: EX permission */ | ||
176 | #define _PAGE_ACCESSED 0x400 /* software: R: page referenced */ | ||
177 | |||
178 | #define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */ | ||
179 | #define _PMD_BAD 0x802 | ||
180 | #define _PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */ | ||
181 | #define _PMD_SIZE_4M 0x0c0 | ||
182 | #define _PMD_SIZE_16M 0x0e0 | ||
183 | #define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4)) | ||
184 | |||
185 | /* Until my rework is finished, 40x still needs atomic PTE updates */ | ||
186 | #define PTE_ATOMIC_UPDATES 1 | ||
187 | |||
188 | #elif defined(CONFIG_44x) | 90 | #elif defined(CONFIG_44x) |
189 | /* | 91 | #include <asm/pte-44x.h> |
190 | * Definitions for PPC440 | ||
191 | * | ||
192 | * Because of the 3 word TLB entries to support 36-bit addressing, | ||
193 | * the attribute are difficult to map in such a fashion that they | ||
194 | * are easily loaded during exception processing. I decided to | ||
195 | * organize the entry so the ERPN is the only portion in the | ||
196 | * upper word of the PTE and the attribute bits below are packed | ||
197 | * in as sensibly as they can be in the area below a 4KB page size | ||
198 | * oriented RPN. This at least makes it easy to load the RPN and | ||
199 | * ERPN fields in the TLB. -Matt | ||
200 | * | ||
201 | * Note that these bits preclude future use of a page size | ||
202 | * less than 4KB. | ||
203 | * | ||
204 | * | ||
205 | * PPC 440 core has following TLB attribute fields; | ||
206 | * | ||
207 | * TLB1: | ||
208 | * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 | ||
209 | * RPN................................. - - - - - - ERPN....... | ||
210 | * | ||
211 | * TLB2: | ||
212 | * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 | ||
213 | * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR | ||
214 | * | ||
215 | * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional | ||
216 | * TLB2 storage attibute fields. Those are: | ||
217 | * | ||
218 | * TLB2: | ||
219 | * 0...10 11 12 13 14 15 16...31 | ||
220 | * no change WL1 IL1I IL1D IL2I IL2D no change | ||
221 | * | ||
222 | * There are some constrains and options, to decide mapping software bits | ||
223 | * into TLB entry. | ||
224 | * | ||
225 | * - PRESENT *must* be in the bottom three bits because swap cache | ||
226 | * entries use the top 29 bits for TLB2. | ||
227 | * | ||
228 | * - FILE *must* be in the bottom three bits because swap cache | ||
229 | * entries use the top 29 bits for TLB2. | ||
230 | * | ||
231 | * - CACHE COHERENT bit (M) has no effect on original PPC440 cores, | ||
232 | * because it doesn't support SMP. However, some later 460 variants | ||
233 | * have -some- form of SMP support and so I keep the bit there for | ||
234 | * future use | ||
235 | * | ||
236 | * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used | ||
237 | * for memory protection related functions (see PTE structure in | ||
238 | * include/asm-ppc/mmu.h). The _PAGE_XXX definitions in this file map to the | ||
239 | * above bits. Note that the bit values are CPU specific, not architecture | ||
240 | * specific. | ||
241 | * | ||
242 | * The kernel PTE entry holds an arch-dependent swp_entry structure under | ||
243 | * certain situations. In other words, in such situations some portion of | ||
244 | * the PTE bits are used as a swp_entry. In the PPC implementation, the | ||
245 | * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still | ||
246 | * hold protection values. That means the three protection bits are | ||
247 | * reserved for both PTE and SWAP entry at the most significant three | ||
248 | * LSBs. | ||
249 | * | ||
250 | * There are three protection bits available for SWAP entry: | ||
251 | * _PAGE_PRESENT | ||
252 | * _PAGE_FILE | ||
253 | * _PAGE_HASHPTE (if HW has) | ||
254 | * | ||
255 | * So those three bits have to be inside of 0-2nd LSB of PTE. | ||
256 | * | ||
257 | */ | ||
258 | |||
259 | #define _PAGE_PRESENT 0x00000001 /* S: PTE valid */ | ||
260 | #define _PAGE_RW 0x00000002 /* S: Write permission */ | ||
261 | #define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */ | ||
262 | #define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */ | ||
263 | #define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */ | ||
264 | #define _PAGE_DIRTY 0x00000010 /* S: Page dirty */ | ||
265 | #define _PAGE_SPECIAL 0x00000020 /* S: Special page */ | ||
266 | #define _PAGE_USER 0x00000040 /* S: User page */ | ||
267 | #define _PAGE_ENDIAN 0x00000080 /* H: E bit */ | ||
268 | #define _PAGE_GUARDED 0x00000100 /* H: G bit */ | ||
269 | #define _PAGE_COHERENT 0x00000200 /* H: M bit */ | ||
270 | #define _PAGE_NO_CACHE 0x00000400 /* H: I bit */ | ||
271 | #define _PAGE_WRITETHRU 0x00000800 /* H: W bit */ | ||
272 | |||
273 | /* TODO: Add large page lowmem mapping support */ | ||
274 | #define _PMD_PRESENT 0 | ||
275 | #define _PMD_PRESENT_MASK (PAGE_MASK) | ||
276 | #define _PMD_BAD (~PAGE_MASK) | ||
277 | |||
278 | /* ERPN in a PTE never gets cleared, ignore it */ | ||
279 | #define _PTE_NONE_MASK 0xffffffff00000000ULL | ||
280 | |||
281 | #define __HAVE_ARCH_PTE_SPECIAL | ||
282 | |||
283 | #elif defined(CONFIG_FSL_BOOKE) | 92 | #elif defined(CONFIG_FSL_BOOKE) |
284 | /* | 93 | #include <asm/pte-fsl-booke.h> |
285 | MMU Assist Register 3: | ||
286 | |||
287 | 32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63 | ||
288 | RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR | ||
289 | |||
290 | - PRESENT *must* be in the bottom three bits because swap cache | ||
291 | entries use the top 29 bits. | ||
292 | |||
293 | - FILE *must* be in the bottom three bits because swap cache | ||
294 | entries use the top 29 bits. | ||
295 | */ | ||
296 | |||
297 | /* Definitions for FSL Book-E Cores */ | ||
298 | #define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */ | ||
299 | #define _PAGE_USER 0x00002 /* S: User page (maps to UR) */ | ||
300 | #define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */ | ||
301 | #define _PAGE_RW 0x00004 /* S: Write permission (SW) */ | ||
302 | #define _PAGE_DIRTY 0x00008 /* S: Page dirty */ | ||
303 | #define _PAGE_HWEXEC 0x00010 /* H: SX permission */ | ||
304 | #define _PAGE_ACCESSED 0x00020 /* S: Page referenced */ | ||
305 | |||
306 | #define _PAGE_ENDIAN 0x00040 /* H: E bit */ | ||
307 | #define _PAGE_GUARDED 0x00080 /* H: G bit */ | ||
308 | #define _PAGE_COHERENT 0x00100 /* H: M bit */ | ||
309 | #define _PAGE_NO_CACHE 0x00200 /* H: I bit */ | ||
310 | #define _PAGE_WRITETHRU 0x00400 /* H: W bit */ | ||
311 | #define _PAGE_SPECIAL 0x00800 /* S: Special page */ | ||
312 | |||
313 | #ifdef CONFIG_PTE_64BIT | ||
314 | /* ERPN in a PTE never gets cleared, ignore it */ | ||
315 | #define _PTE_NONE_MASK 0xffffffffffff0000ULL | ||
316 | #endif | ||
317 | |||
318 | #define _PMD_PRESENT 0 | ||
319 | #define _PMD_PRESENT_MASK (PAGE_MASK) | ||
320 | #define _PMD_BAD (~PAGE_MASK) | ||
321 | |||
322 | #define __HAVE_ARCH_PTE_SPECIAL | ||
323 | |||
324 | #elif defined(CONFIG_8xx) | 94 | #elif defined(CONFIG_8xx) |
325 | /* Definitions for 8xx embedded chips. */ | 95 | #include <asm/pte-8xx.h> |
326 | #define _PAGE_PRESENT 0x0001 /* Page is valid */ | ||
327 | #define _PAGE_FILE 0x0002 /* when !present: nonlinear file mapping */ | ||
328 | #define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */ | ||
329 | #define _PAGE_SHARED 0x0004 /* No ASID (context) compare */ | ||
330 | |||
331 | /* These five software bits must be masked out when the entry is loaded | ||
332 | * into the TLB. | ||
333 | */ | ||
334 | #define _PAGE_EXEC 0x0008 /* software: i-cache coherency required */ | ||
335 | #define _PAGE_GUARDED 0x0010 /* software: guarded access */ | ||
336 | #define _PAGE_DIRTY 0x0020 /* software: page changed */ | ||
337 | #define _PAGE_RW 0x0040 /* software: user write access allowed */ | ||
338 | #define _PAGE_ACCESSED 0x0080 /* software: page referenced */ | ||
339 | |||
340 | /* Setting any bits in the nibble with the follow two controls will | ||
341 | * require a TLB exception handler change. It is assumed unused bits | ||
342 | * are always zero. | ||
343 | */ | ||
344 | #define _PAGE_HWWRITE 0x0100 /* h/w write enable: never set in Linux PTE */ | ||
345 | #define _PAGE_USER 0x0800 /* One of the PP bits, the other is USER&~RW */ | ||
346 | |||
347 | #define _PMD_PRESENT 0x0001 | ||
348 | #define _PMD_BAD 0x0ff0 | ||
349 | #define _PMD_PAGE_MASK 0x000c | ||
350 | #define _PMD_PAGE_8M 0x000c | ||
351 | |||
352 | #define _PTE_NONE_MASK _PAGE_ACCESSED | ||
353 | |||
354 | /* Until my rework is finished, 8xx still needs atomic PTE updates */ | ||
355 | #define PTE_ATOMIC_UPDATES 1 | ||
356 | |||
357 | #else /* CONFIG_6xx */ | 96 | #else /* CONFIG_6xx */ |
358 | /* Definitions for 60x, 740/750, etc. */ | 97 | #include <asm/pte-hash32.h> |
359 | #define _PAGE_PRESENT 0x001 /* software: pte contains a translation */ | ||
360 | #define _PAGE_HASHPTE 0x002 /* hash_page has made an HPTE for this pte */ | ||
361 | #define _PAGE_FILE 0x004 /* when !present: nonlinear file mapping */ | ||
362 | #define _PAGE_USER 0x004 /* usermode access allowed */ | ||
363 | #define _PAGE_GUARDED 0x008 /* G: prohibit speculative access */ | ||
364 | #define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */ | ||
365 | #define _PAGE_NO_CACHE 0x020 /* I: cache inhibit */ | ||
366 | #define _PAGE_WRITETHRU 0x040 /* W: cache write-through */ | ||
367 | #define _PAGE_DIRTY 0x080 /* C: page changed */ | ||
368 | #define _PAGE_ACCESSED 0x100 /* R: page referenced */ | ||
369 | #define _PAGE_EXEC 0x200 /* software: i-cache coherency required */ | ||
370 | #define _PAGE_RW 0x400 /* software: user write access allowed */ | ||
371 | #define _PAGE_SPECIAL 0x800 /* software: Special page */ | ||
372 | |||
373 | #ifdef CONFIG_PTE_64BIT | ||
374 | /* We never clear the high word of the pte */ | ||
375 | #define _PTE_NONE_MASK (0xffffffff00000000ULL | _PAGE_HASHPTE) | ||
376 | #else | ||
377 | #define _PTE_NONE_MASK _PAGE_HASHPTE | ||
378 | #endif | 98 | #endif |
379 | 99 | ||
380 | #define _PMD_PRESENT 0 | 100 | /* And here we include common definitions */ |
381 | #define _PMD_PRESENT_MASK (PAGE_MASK) | 101 | #include <asm/pte-common.h> |
382 | #define _PMD_BAD (~PAGE_MASK) | ||
383 | |||
384 | /* Hash table based platforms need atomic updates of the linux PTE */ | ||
385 | #define PTE_ATOMIC_UPDATES 1 | ||
386 | |||
387 | #define __HAVE_ARCH_PTE_SPECIAL | ||
388 | |||
389 | #endif | ||
390 | |||
391 | /* | ||
392 | * Some bits are only used on some cpu families... | ||
393 | */ | ||
394 | #ifndef _PAGE_HASHPTE | ||
395 | #define _PAGE_HASHPTE 0 | ||
396 | #endif | ||
397 | #ifndef _PTE_NONE_MASK | ||
398 | #define _PTE_NONE_MASK 0 | ||
399 | #endif | ||
400 | #ifndef _PAGE_SHARED | ||
401 | #define _PAGE_SHARED 0 | ||
402 | #endif | ||
403 | #ifndef _PAGE_HWWRITE | ||
404 | #define _PAGE_HWWRITE 0 | ||
405 | #endif | ||
406 | #ifndef _PAGE_HWEXEC | ||
407 | #define _PAGE_HWEXEC 0 | ||
408 | #endif | ||
409 | #ifndef _PAGE_EXEC | ||
410 | #define _PAGE_EXEC 0 | ||
411 | #endif | ||
412 | #ifndef _PAGE_ENDIAN | ||
413 | #define _PAGE_ENDIAN 0 | ||
414 | #endif | ||
415 | #ifndef _PAGE_COHERENT | ||
416 | #define _PAGE_COHERENT 0 | ||
417 | #endif | ||
418 | #ifndef _PAGE_WRITETHRU | ||
419 | #define _PAGE_WRITETHRU 0 | ||
420 | #endif | ||
421 | #ifndef _PAGE_SPECIAL | ||
422 | #define _PAGE_SPECIAL 0 | ||
423 | #endif | ||
424 | #ifndef _PMD_PRESENT_MASK | ||
425 | #define _PMD_PRESENT_MASK _PMD_PRESENT | ||
426 | #endif | ||
427 | #ifndef _PMD_SIZE | ||
428 | #define _PMD_SIZE 0 | ||
429 | #define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE() | ||
430 | #endif | ||
431 | |||
432 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ | ||
433 | _PAGE_SPECIAL) | ||
434 | |||
435 | |||
436 | #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ | ||
437 | _PAGE_WRITETHRU | _PAGE_ENDIAN | \ | ||
438 | _PAGE_USER | _PAGE_ACCESSED | \ | ||
439 | _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \ | ||
440 | _PAGE_EXEC | _PAGE_HWEXEC) | ||
441 | |||
442 | /* | ||
443 | * We define 2 sets of base prot bits, one for basic pages (ie, | ||
444 | * cacheable kernel and user pages) and one for non cacheable | ||
445 | * pages. We always set _PAGE_COHERENT when SMP is enabled or | ||
446 | * the processor might need it for DMA coherency. | ||
447 | */ | ||
448 | #if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU) | ||
449 | #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT) | ||
450 | #else | ||
451 | #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED) | ||
452 | #endif | ||
453 | #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_NO_CACHE) | ||
454 | |||
455 | #define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE) | ||
456 | #define _PAGE_KERNEL (_PAGE_BASE | _PAGE_SHARED | _PAGE_WRENABLE) | ||
457 | #define _PAGE_KERNEL_NC (_PAGE_BASE_NC | _PAGE_SHARED | _PAGE_WRENABLE) | ||
458 | |||
459 | #ifdef CONFIG_PPC_STD_MMU | ||
460 | /* On standard PPC MMU, no user access implies kernel read/write access, | ||
461 | * so to write-protect kernel memory we must turn on user access */ | ||
462 | #define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED | _PAGE_USER) | ||
463 | #else | ||
464 | #define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED) | ||
465 | #endif | ||
466 | |||
467 | #define _PAGE_IO (_PAGE_KERNEL_NC | _PAGE_GUARDED) | ||
468 | #define _PAGE_RAM (_PAGE_KERNEL | _PAGE_HWEXEC) | ||
469 | |||
470 | #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\ | ||
471 | defined(CONFIG_KPROBES) | ||
472 | /* We want the debuggers to be able to set breakpoints anywhere, so | ||
473 | * don't write protect the kernel text */ | ||
474 | #define _PAGE_RAM_TEXT _PAGE_RAM | ||
475 | #else | ||
476 | #define _PAGE_RAM_TEXT (_PAGE_KERNEL_RO | _PAGE_HWEXEC) | ||
477 | #endif | ||
478 | |||
479 | #define PAGE_NONE __pgprot(_PAGE_BASE) | ||
480 | #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER) | ||
481 | #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) | ||
482 | #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW) | ||
483 | #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC) | ||
484 | #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER) | ||
485 | #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) | ||
486 | |||
487 | #define PAGE_KERNEL __pgprot(_PAGE_RAM) | ||
488 | #define PAGE_KERNEL_NOCACHE __pgprot(_PAGE_IO) | ||
489 | |||
490 | /* | ||
491 | * The PowerPC can only do execute protection on a segment (256MB) basis, | ||
492 | * not on a page basis. So we consider execute permission the same as read. | ||
493 | * Also, write permissions imply read permissions. | ||
494 | * This is the closest we can get.. | ||
495 | */ | ||
496 | #define __P000 PAGE_NONE | ||
497 | #define __P001 PAGE_READONLY_X | ||
498 | #define __P010 PAGE_COPY | ||
499 | #define __P011 PAGE_COPY_X | ||
500 | #define __P100 PAGE_READONLY | ||
501 | #define __P101 PAGE_READONLY_X | ||
502 | #define __P110 PAGE_COPY | ||
503 | #define __P111 PAGE_COPY_X | ||
504 | |||
505 | #define __S000 PAGE_NONE | ||
506 | #define __S001 PAGE_READONLY_X | ||
507 | #define __S010 PAGE_SHARED | ||
508 | #define __S011 PAGE_SHARED_X | ||
509 | #define __S100 PAGE_READONLY | ||
510 | #define __S101 PAGE_READONLY_X | ||
511 | #define __S110 PAGE_SHARED | ||
512 | #define __S111 PAGE_SHARED_X | ||
513 | 102 | ||
514 | #ifndef __ASSEMBLY__ | 103 | #ifndef __ASSEMBLY__ |
515 | /* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a | ||
516 | * kernel without large page PMD support */ | ||
517 | extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); | ||
518 | |||
519 | /* | ||
520 | * Conversions between PTE values and page frame numbers. | ||
521 | */ | ||
522 | |||
523 | /* in some case we want to additionaly adjust where the pfn is in the pte to | ||
524 | * allow room for more flags */ | ||
525 | #if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT) | ||
526 | #define PFN_SHIFT_OFFSET (PAGE_SHIFT + 8) | ||
527 | #else | ||
528 | #define PFN_SHIFT_OFFSET (PAGE_SHIFT) | ||
529 | #endif | ||
530 | 104 | ||
531 | #define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET) | ||
532 | #define pte_page(x) pfn_to_page(pte_pfn(x)) | ||
533 | |||
534 | #define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\ | ||
535 | pgprot_val(prot)) | ||
536 | #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) | ||
537 | #endif /* __ASSEMBLY__ */ | ||
538 | |||
539 | #define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0) | ||
540 | #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) | ||
541 | #define pte_clear(mm, addr, ptep) \ | 105 | #define pte_clear(mm, addr, ptep) \ |
542 | do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0) | 106 | do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0) |
543 | 107 | ||
@@ -546,43 +110,6 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); | |||
546 | #define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK) | 110 | #define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK) |
547 | #define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0) | 111 | #define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0) |
548 | 112 | ||
549 | #ifndef __ASSEMBLY__ | ||
550 | /* | ||
551 | * The following only work if pte_present() is true. | ||
552 | * Undefined behaviour if not.. | ||
553 | */ | ||
554 | static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; } | ||
555 | static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } | ||
556 | static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } | ||
557 | static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } | ||
558 | static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; } | ||
559 | |||
560 | static inline pte_t pte_wrprotect(pte_t pte) { | ||
561 | pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; } | ||
562 | static inline pte_t pte_mkclean(pte_t pte) { | ||
563 | pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; } | ||
564 | static inline pte_t pte_mkold(pte_t pte) { | ||
565 | pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } | ||
566 | |||
567 | static inline pte_t pte_mkwrite(pte_t pte) { | ||
568 | pte_val(pte) |= _PAGE_RW; return pte; } | ||
569 | static inline pte_t pte_mkdirty(pte_t pte) { | ||
570 | pte_val(pte) |= _PAGE_DIRTY; return pte; } | ||
571 | static inline pte_t pte_mkyoung(pte_t pte) { | ||
572 | pte_val(pte) |= _PAGE_ACCESSED; return pte; } | ||
573 | static inline pte_t pte_mkspecial(pte_t pte) { | ||
574 | pte_val(pte) |= _PAGE_SPECIAL; return pte; } | ||
575 | static inline pgprot_t pte_pgprot(pte_t pte) | ||
576 | { | ||
577 | return __pgprot(pte_val(pte) & PAGE_PROT_BITS); | ||
578 | } | ||
579 | |||
580 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
581 | { | ||
582 | pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); | ||
583 | return pte; | ||
584 | } | ||
585 | |||
586 | /* | 113 | /* |
587 | * When flushing the tlb entry for a page, we also need to flush the hash | 114 | * When flushing the tlb entry for a page, we also need to flush the hash |
588 | * table entry. flush_hash_pages is assembler (for speed) in hashtable.S. | 115 | * table entry. flush_hash_pages is assembler (for speed) in hashtable.S. |
@@ -599,11 +126,19 @@ extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, | |||
599 | unsigned long address); | 126 | unsigned long address); |
600 | 127 | ||
601 | /* | 128 | /* |
602 | * Atomic PTE updates. | 129 | * PTE updates. This function is called whenever an existing |
130 | * valid PTE is updated. This does -not- include set_pte_at() | ||
131 | * which nowadays only sets a new PTE. | ||
603 | * | 132 | * |
604 | * pte_update clears and sets bit atomically, and returns | 133 | * Depending on the type of MMU, we may need to use atomic updates |
605 | * the old pte value. In the 64-bit PTE case we lock around the | 134 | * and the PTE may be either 32 or 64 bit wide. In the later case, |
606 | * low PTE word since we expect ALL flag bits to be there | 135 | * when using atomic updates, only the low part of the PTE is |
136 | * accessed atomically. | ||
137 | * | ||
138 | * In addition, on 44x, we also maintain a global flag indicating | ||
139 | * that an executable user mapping was modified, which is needed | ||
140 | * to properly flush the virtually tagged instruction cache of | ||
141 | * those implementations. | ||
607 | */ | 142 | */ |
608 | #ifndef CONFIG_PTE_64BIT | 143 | #ifndef CONFIG_PTE_64BIT |
609 | static inline unsigned long pte_update(pte_t *p, | 144 | static inline unsigned long pte_update(pte_t *p, |
@@ -668,44 +203,6 @@ static inline unsigned long long pte_update(pte_t *p, | |||
668 | #endif /* CONFIG_PTE_64BIT */ | 203 | #endif /* CONFIG_PTE_64BIT */ |
669 | 204 | ||
670 | /* | 205 | /* |
671 | * set_pte stores a linux PTE into the linux page table. | ||
672 | * On machines which use an MMU hash table we avoid changing the | ||
673 | * _PAGE_HASHPTE bit. | ||
674 | */ | ||
675 | |||
676 | static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, | ||
677 | pte_t *ptep, pte_t pte) | ||
678 | { | ||
679 | #if (_PAGE_HASHPTE != 0) && defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT) | ||
680 | pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte) & ~_PAGE_HASHPTE); | ||
681 | #elif defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP) | ||
682 | #if _PAGE_HASHPTE != 0 | ||
683 | if (pte_val(*ptep) & _PAGE_HASHPTE) | ||
684 | flush_hash_entry(mm, ptep, addr); | ||
685 | #endif | ||
686 | __asm__ __volatile__("\ | ||
687 | stw%U0%X0 %2,%0\n\ | ||
688 | eieio\n\ | ||
689 | stw%U0%X0 %L2,%1" | ||
690 | : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4)) | ||
691 | : "r" (pte) : "memory"); | ||
692 | #else | ||
693 | *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE) | ||
694 | | (pte_val(pte) & ~_PAGE_HASHPTE)); | ||
695 | #endif | ||
696 | } | ||
697 | |||
698 | |||
699 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | ||
700 | pte_t *ptep, pte_t pte) | ||
701 | { | ||
702 | #if defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP) && defined(CONFIG_DEBUG_VM) | ||
703 | WARN_ON(pte_present(*ptep)); | ||
704 | #endif | ||
705 | __set_pte_at(mm, addr, ptep, pte); | ||
706 | } | ||
707 | |||
708 | /* | ||
709 | * 2.6 calls this without flushing the TLB entry; this is wrong | 206 | * 2.6 calls this without flushing the TLB entry; this is wrong |
710 | * for our hash-based implementation, we fix that up here. | 207 | * for our hash-based implementation, we fix that up here. |
711 | */ | 208 | */ |
@@ -745,24 +242,14 @@ static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, | |||
745 | } | 242 | } |
746 | 243 | ||
747 | 244 | ||
748 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS | 245 | static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry) |
749 | static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) | ||
750 | { | 246 | { |
751 | unsigned long bits = pte_val(entry) & | 247 | unsigned long bits = pte_val(entry) & |
752 | (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW); | 248 | (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | |
249 | _PAGE_HWEXEC | _PAGE_EXEC); | ||
753 | pte_update(ptep, 0, bits); | 250 | pte_update(ptep, 0, bits); |
754 | } | 251 | } |
755 | 252 | ||
756 | #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ | ||
757 | ({ \ | ||
758 | int __changed = !pte_same(*(__ptep), __entry); \ | ||
759 | if (__changed) { \ | ||
760 | __ptep_set_access_flags(__ptep, __entry, __dirty); \ | ||
761 | flush_tlb_page_nohash(__vma, __address); \ | ||
762 | } \ | ||
763 | __changed; \ | ||
764 | }) | ||
765 | |||
766 | #define __HAVE_ARCH_PTE_SAME | 253 | #define __HAVE_ARCH_PTE_SAME |
767 | #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0) | 254 | #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0) |
768 | 255 | ||
diff --git a/arch/powerpc/include/asm/pgtable-4k.h b/arch/powerpc/include/asm/pgtable-ppc64-4k.h index 1dbca4e7de67..6eefdcffa359 100644 --- a/arch/powerpc/include/asm/pgtable-4k.h +++ b/arch/powerpc/include/asm/pgtable-ppc64-4k.h | |||
@@ -1,5 +1,5 @@ | |||
1 | #ifndef _ASM_POWERPC_PGTABLE_4K_H | 1 | #ifndef _ASM_POWERPC_PGTABLE_PPC64_4K_H |
2 | #define _ASM_POWERPC_PGTABLE_4K_H | 2 | #define _ASM_POWERPC_PGTABLE_PPC64_4K_H |
3 | /* | 3 | /* |
4 | * Entries per page directory level. The PTE level must use a 64b record | 4 | * Entries per page directory level. The PTE level must use a 64b record |
5 | * for each page table entry. The PMD and PGD level use a 32b record for | 5 | * for each page table entry. The PMD and PGD level use a 32b record for |
@@ -40,28 +40,6 @@ | |||
40 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | 40 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) |
41 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | 41 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) |
42 | 42 | ||
43 | /* PTE bits */ | ||
44 | #define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */ | ||
45 | #define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */ | ||
46 | #define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */ | ||
47 | #define _PAGE_F_SECOND _PAGE_SECONDARY | ||
48 | #define _PAGE_F_GIX _PAGE_GROUP_IX | ||
49 | #define _PAGE_SPECIAL 0x10000 /* software: special page */ | ||
50 | #define __HAVE_ARCH_PTE_SPECIAL | ||
51 | |||
52 | /* PTE flags to conserve for HPTE identification */ | ||
53 | #define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \ | ||
54 | _PAGE_SECONDARY | _PAGE_GROUP_IX) | ||
55 | |||
56 | /* There is no 4K PFN hack on 4K pages */ | ||
57 | #define _PAGE_4K_PFN 0 | ||
58 | |||
59 | /* PAGE_MASK gives the right answer below, but only by accident */ | ||
60 | /* It should be preserving the high 48 bits and then specifically */ | ||
61 | /* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */ | ||
62 | #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ | ||
63 | _PAGE_HPTEFLAGS | _PAGE_SPECIAL) | ||
64 | |||
65 | /* Bits to mask out from a PMD to get to the PTE page */ | 43 | /* Bits to mask out from a PMD to get to the PTE page */ |
66 | #define PMD_MASKED_BITS 0 | 44 | #define PMD_MASKED_BITS 0 |
67 | /* Bits to mask out from a PUD to get to the PMD page */ | 45 | /* Bits to mask out from a PUD to get to the PMD page */ |
@@ -69,30 +47,6 @@ | |||
69 | /* Bits to mask out from a PGD to get to the PUD page */ | 47 | /* Bits to mask out from a PGD to get to the PUD page */ |
70 | #define PGD_MASKED_BITS 0 | 48 | #define PGD_MASKED_BITS 0 |
71 | 49 | ||
72 | /* shift to put page number into pte */ | ||
73 | #define PTE_RPN_SHIFT (17) | ||
74 | |||
75 | #ifdef STRICT_MM_TYPECHECKS | ||
76 | #define __real_pte(e,p) ((real_pte_t){(e)}) | ||
77 | #define __rpte_to_pte(r) ((r).pte) | ||
78 | #else | ||
79 | #define __real_pte(e,p) (e) | ||
80 | #define __rpte_to_pte(r) (__pte(r)) | ||
81 | #endif | ||
82 | #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12) | ||
83 | |||
84 | #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ | ||
85 | do { \ | ||
86 | index = 0; \ | ||
87 | shift = mmu_psize_defs[psize].shift; \ | ||
88 | |||
89 | #define pte_iterate_hashed_end() } while(0) | ||
90 | |||
91 | #ifdef CONFIG_PPC_HAS_HASH_64K | ||
92 | #define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr) | ||
93 | #else | ||
94 | #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K | ||
95 | #endif | ||
96 | 50 | ||
97 | /* | 51 | /* |
98 | * 4-level page tables related bits | 52 | * 4-level page tables related bits |
@@ -112,6 +66,9 @@ | |||
112 | #define pud_ERROR(e) \ | 66 | #define pud_ERROR(e) \ |
113 | printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e)) | 67 | printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e)) |
114 | 68 | ||
69 | /* | ||
70 | * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range() */ | ||
115 | #define remap_4k_pfn(vma, addr, pfn, prot) \ | 71 | #define remap_4k_pfn(vma, addr, pfn, prot) \ |
116 | remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot)) | 72 | remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot)) |
117 | #endif /* _ASM_POWERPC_PGTABLE_4K_H */ | 73 | |
74 | #endif /* _ASM_POWERPC_PGTABLE_PPC64_4K_H */ | ||
diff --git a/arch/powerpc/include/asm/pgtable-ppc64-64k.h b/arch/powerpc/include/asm/pgtable-ppc64-64k.h new file mode 100644 index 000000000000..6cc085b945a5 --- /dev/null +++ b/arch/powerpc/include/asm/pgtable-ppc64-64k.h | |||
@@ -0,0 +1,42 @@ | |||
1 | #ifndef _ASM_POWERPC_PGTABLE_PPC64_64K_H | ||
2 | #define _ASM_POWERPC_PGTABLE_PPC64_64K_H | ||
3 | |||
4 | #include <asm-generic/pgtable-nopud.h> | ||
5 | |||
6 | |||
7 | #define PTE_INDEX_SIZE 12 | ||
8 | #define PMD_INDEX_SIZE 12 | ||
9 | #define PUD_INDEX_SIZE 0 | ||
10 | #define PGD_INDEX_SIZE 4 | ||
11 | |||
12 | #ifndef __ASSEMBLY__ | ||
13 | |||
14 | #define PTE_TABLE_SIZE (sizeof(real_pte_t) << PTE_INDEX_SIZE) | ||
15 | #define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) | ||
16 | #define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) | ||
17 | |||
18 | #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) | ||
19 | #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) | ||
20 | #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) | ||
21 | |||
22 | /* With 4k base page size, hugepage PTEs go at the PMD level */ | ||
23 | #define MIN_HUGEPTE_SHIFT PAGE_SHIFT | ||
24 | |||
25 | /* PMD_SHIFT determines what a second-level page table entry can map */ | ||
26 | #define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE) | ||
27 | #define PMD_SIZE (1UL << PMD_SHIFT) | ||
28 | #define PMD_MASK (~(PMD_SIZE-1)) | ||
29 | |||
30 | /* PGDIR_SHIFT determines what a third-level page table entry can map */ | ||
31 | #define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE) | ||
32 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | ||
33 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | ||
34 | |||
35 | #endif /* __ASSEMBLY__ */ | ||
36 | |||
37 | /* Bits to mask out from a PMD to get to the PTE page */ | ||
38 | #define PMD_MASKED_BITS 0x1ff | ||
39 | /* Bits to mask out from a PGD/PUD to get to the PMD page */ | ||
40 | #define PUD_MASKED_BITS 0x1ff | ||
41 | |||
42 | #endif /* _ASM_POWERPC_PGTABLE_PPC64_64K_H */ | ||
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h index b0f18be81d9f..c40db05f21e0 100644 --- a/arch/powerpc/include/asm/pgtable-ppc64.h +++ b/arch/powerpc/include/asm/pgtable-ppc64.h | |||
@@ -11,9 +11,9 @@ | |||
11 | #endif /* __ASSEMBLY__ */ | 11 | #endif /* __ASSEMBLY__ */ |
12 | 12 | ||
13 | #ifdef CONFIG_PPC_64K_PAGES | 13 | #ifdef CONFIG_PPC_64K_PAGES |
14 | #include <asm/pgtable-64k.h> | 14 | #include <asm/pgtable-ppc64-64k.h> |
15 | #else | 15 | #else |
16 | #include <asm/pgtable-4k.h> | 16 | #include <asm/pgtable-ppc64-4k.h> |
17 | #endif | 17 | #endif |
18 | 18 | ||
19 | #define FIRST_USER_ADDRESS 0 | 19 | #define FIRST_USER_ADDRESS 0 |
@@ -25,6 +25,8 @@ | |||
25 | PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT) | 25 | PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT) |
26 | #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) | 26 | #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) |
27 | 27 | ||
28 | |||
29 | /* Some sanity checking */ | ||
28 | #if TASK_SIZE_USER64 > PGTABLE_RANGE | 30 | #if TASK_SIZE_USER64 > PGTABLE_RANGE |
29 | #error TASK_SIZE_USER64 exceeds pagetable range | 31 | #error TASK_SIZE_USER64 exceeds pagetable range |
30 | #endif | 32 | #endif |
@@ -33,7 +35,6 @@ | |||
33 | #error TASK_SIZE_USER64 exceeds user VSID range | 35 | #error TASK_SIZE_USER64 exceeds user VSID range |
34 | #endif | 36 | #endif |
35 | 37 | ||
36 | |||
37 | /* | 38 | /* |
38 | * Define the address range of the vmalloc VM area. | 39 | * Define the address range of the vmalloc VM area. |
39 | */ | 40 | */ |
@@ -76,83 +77,12 @@ | |||
76 | 77 | ||
77 | 78 | ||
78 | /* | 79 | /* |
79 | * Common bits in a linux-style PTE. These match the bits in the | 80 | * Include the PTE bits definitions |
80 | * (hardware-defined) PowerPC PTE as closely as possible. Additional | ||
81 | * bits may be defined in pgtable-*.h | ||
82 | */ | 81 | */ |
83 | #define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */ | 82 | #include <asm/pte-hash64.h> |
84 | #define _PAGE_USER 0x0002 /* matches one of the PP bits */ | 83 | #include <asm/pte-common.h> |
85 | #define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */ | ||
86 | #define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */ | ||
87 | #define _PAGE_GUARDED 0x0008 | ||
88 | #define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */ | ||
89 | #define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */ | ||
90 | #define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */ | ||
91 | #define _PAGE_DIRTY 0x0080 /* C: page changed */ | ||
92 | #define _PAGE_ACCESSED 0x0100 /* R: page referenced */ | ||
93 | #define _PAGE_RW 0x0200 /* software: user write access allowed */ | ||
94 | #define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */ | ||
95 | |||
96 | /* Strong Access Ordering */ | ||
97 | #define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT) | ||
98 | |||
99 | #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT) | ||
100 | |||
101 | #define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY) | ||
102 | |||
103 | /* __pgprot defined in arch/powerpc/include/asm/page.h */ | ||
104 | #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) | ||
105 | |||
106 | #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER) | ||
107 | #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC) | ||
108 | #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER) | ||
109 | #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) | ||
110 | #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER) | ||
111 | #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) | ||
112 | #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_WRENABLE) | ||
113 | #define PAGE_KERNEL_CI __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ | ||
114 | _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED) | ||
115 | #define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC) | ||
116 | |||
117 | #define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE) | ||
118 | #define HAVE_PAGE_AGP | ||
119 | |||
120 | #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \ | ||
121 | _PAGE_NO_CACHE | _PAGE_WRITETHRU | \ | ||
122 | _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \ | ||
123 | _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC) | ||
124 | /* PTEIDX nibble */ | ||
125 | #define _PTEIDX_SECONDARY 0x8 | ||
126 | #define _PTEIDX_GROUP_IX 0x7 | ||
127 | 84 | ||
128 | 85 | ||
129 | /* | ||
130 | * POWER4 and newer have per page execute protection, older chips can only | ||
131 | * do this on a segment (256MB) basis. | ||
132 | * | ||
133 | * Also, write permissions imply read permissions. | ||
134 | * This is the closest we can get.. | ||
135 | * | ||
136 | * Note due to the way vm flags are laid out, the bits are XWR | ||
137 | */ | ||
138 | #define __P000 PAGE_NONE | ||
139 | #define __P001 PAGE_READONLY | ||
140 | #define __P010 PAGE_COPY | ||
141 | #define __P011 PAGE_COPY | ||
142 | #define __P100 PAGE_READONLY_X | ||
143 | #define __P101 PAGE_READONLY_X | ||
144 | #define __P110 PAGE_COPY_X | ||
145 | #define __P111 PAGE_COPY_X | ||
146 | |||
147 | #define __S000 PAGE_NONE | ||
148 | #define __S001 PAGE_READONLY | ||
149 | #define __S010 PAGE_SHARED | ||
150 | #define __S011 PAGE_SHARED | ||
151 | #define __S100 PAGE_READONLY_X | ||
152 | #define __S101 PAGE_READONLY_X | ||
153 | #define __S110 PAGE_SHARED_X | ||
154 | #define __S111 PAGE_SHARED_X | ||
155 | |||
156 | #ifdef CONFIG_PPC_MM_SLICES | 86 | #ifdef CONFIG_PPC_MM_SLICES |
157 | #define HAVE_ARCH_UNMAPPED_AREA | 87 | #define HAVE_ARCH_UNMAPPED_AREA |
158 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN | 88 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN |
@@ -161,32 +91,38 @@ | |||
161 | #ifndef __ASSEMBLY__ | 91 | #ifndef __ASSEMBLY__ |
162 | 92 | ||
163 | /* | 93 | /* |
164 | * Conversion functions: convert a page and protection to a page entry, | 94 | * This is the default implementation of various PTE accessors, it's |
165 | * and a page entry and page directory to the page they refer to. | 95 | * used in all cases except Book3S with 64K pages where we have a |
166 | * | 96 | * concept of sub-pages |
167 | * mk_pte takes a (struct page *) as input | ||
168 | */ | 97 | */ |
169 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | 98 | #ifndef __real_pte |
170 | 99 | ||
171 | static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) | 100 | #ifdef STRICT_MM_TYPECHECKS |
172 | { | 101 | #define __real_pte(e,p) ((real_pte_t){(e)}) |
173 | pte_t pte; | 102 | #define __rpte_to_pte(r) ((r).pte) |
103 | #else | ||
104 | #define __real_pte(e,p) (e) | ||
105 | #define __rpte_to_pte(r) (__pte(r)) | ||
106 | #endif | ||
107 | #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12) | ||
174 | 108 | ||
109 | #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ | ||
110 | do { \ | ||
111 | index = 0; \ | ||
112 | shift = mmu_psize_defs[psize].shift; \ | ||
175 | 113 | ||
176 | pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot); | 114 | #define pte_iterate_hashed_end() } while(0) |
177 | return pte; | ||
178 | } | ||
179 | 115 | ||
180 | #define pte_modify(_pte, newprot) \ | 116 | #ifdef CONFIG_PPC_HAS_HASH_64K |
181 | (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))) | 117 | #define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr) |
118 | #else | ||
119 | #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K | ||
120 | #endif | ||
182 | 121 | ||
183 | #define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0) | 122 | #endif /* __real_pte */ |
184 | #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) | ||
185 | 123 | ||
186 | /* pte_clear moved to later in this file */ | ||
187 | 124 | ||
188 | #define pte_pfn(x) ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT))) | 125 | /* pte_clear moved to later in this file */ |
189 | #define pte_page(x) pfn_to_page(pte_pfn(x)) | ||
190 | 126 | ||
191 | #define PMD_BAD_BITS (PTE_TABLE_SIZE-1) | 127 | #define PMD_BAD_BITS (PTE_TABLE_SIZE-1) |
192 | #define PUD_BAD_BITS (PMD_TABLE_SIZE-1) | 128 | #define PUD_BAD_BITS (PMD_TABLE_SIZE-1) |
@@ -235,36 +171,6 @@ static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) | |||
235 | /* This now only contains the vmalloc pages */ | 171 | /* This now only contains the vmalloc pages */ |
236 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | 172 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) |
237 | 173 | ||
238 | /* | ||
239 | * The following only work if pte_present() is true. | ||
240 | * Undefined behaviour if not.. | ||
241 | */ | ||
242 | static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;} | ||
243 | static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;} | ||
244 | static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;} | ||
245 | static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;} | ||
246 | static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; } | ||
247 | |||
248 | static inline pte_t pte_wrprotect(pte_t pte) { | ||
249 | pte_val(pte) &= ~(_PAGE_RW); return pte; } | ||
250 | static inline pte_t pte_mkclean(pte_t pte) { | ||
251 | pte_val(pte) &= ~(_PAGE_DIRTY); return pte; } | ||
252 | static inline pte_t pte_mkold(pte_t pte) { | ||
253 | pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } | ||
254 | static inline pte_t pte_mkwrite(pte_t pte) { | ||
255 | pte_val(pte) |= _PAGE_RW; return pte; } | ||
256 | static inline pte_t pte_mkdirty(pte_t pte) { | ||
257 | pte_val(pte) |= _PAGE_DIRTY; return pte; } | ||
258 | static inline pte_t pte_mkyoung(pte_t pte) { | ||
259 | pte_val(pte) |= _PAGE_ACCESSED; return pte; } | ||
260 | static inline pte_t pte_mkhuge(pte_t pte) { | ||
261 | return pte; } | ||
262 | static inline pte_t pte_mkspecial(pte_t pte) { | ||
263 | pte_val(pte) |= _PAGE_SPECIAL; return pte; } | ||
264 | static inline pgprot_t pte_pgprot(pte_t pte) | ||
265 | { | ||
266 | return __pgprot(pte_val(pte) & PAGE_PROT_BITS); | ||
267 | } | ||
268 | 174 | ||
269 | /* Atomic PTE updates */ | 175 | /* Atomic PTE updates */ |
270 | static inline unsigned long pte_update(struct mm_struct *mm, | 176 | static inline unsigned long pte_update(struct mm_struct *mm, |
@@ -272,6 +178,7 @@ static inline unsigned long pte_update(struct mm_struct *mm, | |||
272 | pte_t *ptep, unsigned long clr, | 178 | pte_t *ptep, unsigned long clr, |
273 | int huge) | 179 | int huge) |
274 | { | 180 | { |
181 | #ifdef PTE_ATOMIC_UPDATES | ||
275 | unsigned long old, tmp; | 182 | unsigned long old, tmp; |
276 | 183 | ||
277 | __asm__ __volatile__( | 184 | __asm__ __volatile__( |
@@ -284,6 +191,13 @@ static inline unsigned long pte_update(struct mm_struct *mm, | |||
284 | : "=&r" (old), "=&r" (tmp), "=m" (*ptep) | 191 | : "=&r" (old), "=&r" (tmp), "=m" (*ptep) |
285 | : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY) | 192 | : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY) |
286 | : "cc" ); | 193 | : "cc" ); |
194 | #else | ||
195 | unsigned long old = pte_val(*ptep); | ||
196 | *ptep = __pte(old & ~clr); | ||
197 | #endif | ||
198 | /* huge pages use the old page table lock */ | ||
199 | if (!huge) | ||
200 | assert_pte_locked(mm, addr); | ||
287 | 201 | ||
288 | if (old & _PAGE_HASHPTE) | 202 | if (old & _PAGE_HASHPTE) |
289 | hpte_need_flush(mm, addr, ptep, old, huge); | 203 | hpte_need_flush(mm, addr, ptep, old, huge); |
@@ -359,26 +273,17 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, | |||
359 | pte_update(mm, addr, ptep, ~0UL, 0); | 273 | pte_update(mm, addr, ptep, ~0UL, 0); |
360 | } | 274 | } |
361 | 275 | ||
362 | /* | ||
363 | * set_pte stores a linux PTE into the linux page table. | ||
364 | */ | ||
365 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | ||
366 | pte_t *ptep, pte_t pte) | ||
367 | { | ||
368 | if (pte_present(*ptep)) | ||
369 | pte_clear(mm, addr, ptep); | ||
370 | pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); | ||
371 | *ptep = pte; | ||
372 | } | ||
373 | 276 | ||
374 | /* Set the dirty and/or accessed bits atomically in a linux PTE, this | 277 | /* Set the dirty and/or accessed bits atomically in a linux PTE, this |
375 | * function doesn't need to flush the hash entry | 278 | * function doesn't need to flush the hash entry |
376 | */ | 279 | */ |
377 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS | 280 | static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry) |
378 | static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) | ||
379 | { | 281 | { |
380 | unsigned long bits = pte_val(entry) & | 282 | unsigned long bits = pte_val(entry) & |
381 | (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC); | 283 | (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | |
284 | _PAGE_EXEC | _PAGE_HWEXEC); | ||
285 | |||
286 | #ifdef PTE_ATOMIC_UPDATES | ||
382 | unsigned long old, tmp; | 287 | unsigned long old, tmp; |
383 | 288 | ||
384 | __asm__ __volatile__( | 289 | __asm__ __volatile__( |
@@ -391,16 +296,11 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) | |||
391 | :"=&r" (old), "=&r" (tmp), "=m" (*ptep) | 296 | :"=&r" (old), "=&r" (tmp), "=m" (*ptep) |
392 | :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY) | 297 | :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY) |
393 | :"cc"); | 298 | :"cc"); |
299 | #else | ||
300 | unsigned long old = pte_val(*ptep); | ||
301 | *ptep = __pte(old | bits); | ||
302 | #endif | ||
394 | } | 303 | } |
395 | #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ | ||
396 | ({ \ | ||
397 | int __changed = !pte_same(*(__ptep), __entry); \ | ||
398 | if (__changed) { \ | ||
399 | __ptep_set_access_flags(__ptep, __entry, __dirty); \ | ||
400 | flush_tlb_page_nohash(__vma, __address); \ | ||
401 | } \ | ||
402 | __changed; \ | ||
403 | }) | ||
404 | 304 | ||
405 | #define __HAVE_ARCH_PTE_SAME | 305 | #define __HAVE_ARCH_PTE_SAME |
406 | #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) | 306 | #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) |
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h index 07f55e601696..eb17da781128 100644 --- a/arch/powerpc/include/asm/pgtable.h +++ b/arch/powerpc/include/asm/pgtable.h | |||
@@ -6,7 +6,17 @@ | |||
6 | #include <asm/processor.h> /* For TASK_SIZE */ | 6 | #include <asm/processor.h> /* For TASK_SIZE */ |
7 | #include <asm/mmu.h> | 7 | #include <asm/mmu.h> |
8 | #include <asm/page.h> | 8 | #include <asm/page.h> |
9 | |||
9 | struct mm_struct; | 10 | struct mm_struct; |
11 | |||
12 | #ifdef CONFIG_DEBUG_VM | ||
13 | extern void assert_pte_locked(struct mm_struct *mm, unsigned long addr); | ||
14 | #else /* CONFIG_DEBUG_VM */ | ||
15 | static inline void assert_pte_locked(struct mm_struct *mm, unsigned long addr) | ||
16 | { | ||
17 | } | ||
18 | #endif /* !CONFIG_DEBUG_VM */ | ||
19 | |||
10 | #endif /* !__ASSEMBLY__ */ | 20 | #endif /* !__ASSEMBLY__ */ |
11 | 21 | ||
12 | #if defined(CONFIG_PPC64) | 22 | #if defined(CONFIG_PPC64) |
@@ -17,6 +27,130 @@ struct mm_struct; | |||
17 | 27 | ||
18 | #ifndef __ASSEMBLY__ | 28 | #ifndef __ASSEMBLY__ |
19 | 29 | ||
30 | /* Generic accessors to PTE bits */ | ||
31 | static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; } | ||
32 | static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } | ||
33 | static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } | ||
34 | static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } | ||
35 | static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; } | ||
36 | static inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; } | ||
37 | static inline int pte_none(pte_t pte) { return (pte_val(pte) & ~_PTE_NONE_MASK) == 0; } | ||
38 | static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); } | ||
39 | |||
40 | /* Conversion functions: convert a page and protection to a page entry, | ||
41 | * and a page entry and page directory to the page they refer to. | ||
42 | * | ||
43 | * Even if PTEs can be unsigned long long, a PFN is always an unsigned | ||
44 | * long for now. | ||
45 | */ | ||
46 | static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) { | ||
47 | return __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) | | ||
48 | pgprot_val(pgprot)); } | ||
49 | static inline unsigned long pte_pfn(pte_t pte) { | ||
50 | return pte_val(pte) >> PTE_RPN_SHIFT; } | ||
51 | |||
52 | /* Keep these as a macros to avoid include dependency mess */ | ||
53 | #define pte_page(x) pfn_to_page(pte_pfn(x)) | ||
54 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | ||
55 | |||
56 | /* Generic modifiers for PTE bits */ | ||
57 | static inline pte_t pte_wrprotect(pte_t pte) { | ||
58 | pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; } | ||
59 | static inline pte_t pte_mkclean(pte_t pte) { | ||
60 | pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; } | ||
61 | static inline pte_t pte_mkold(pte_t pte) { | ||
62 | pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } | ||
63 | static inline pte_t pte_mkwrite(pte_t pte) { | ||
64 | pte_val(pte) |= _PAGE_RW; return pte; } | ||
65 | static inline pte_t pte_mkdirty(pte_t pte) { | ||
66 | pte_val(pte) |= _PAGE_DIRTY; return pte; } | ||
67 | static inline pte_t pte_mkyoung(pte_t pte) { | ||
68 | pte_val(pte) |= _PAGE_ACCESSED; return pte; } | ||
69 | static inline pte_t pte_mkspecial(pte_t pte) { | ||
70 | pte_val(pte) |= _PAGE_SPECIAL; return pte; } | ||
71 | static inline pte_t pte_mkhuge(pte_t pte) { | ||
72 | return pte; } | ||
73 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
74 | { | ||
75 | pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); | ||
76 | return pte; | ||
77 | } | ||
78 | |||
79 | |||
80 | /* Insert a PTE, top-level function is out of line. It uses an inline | ||
81 | * low level function in the respective pgtable-* files | ||
82 | */ | ||
83 | extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, | ||
84 | pte_t pte); | ||
85 | |||
86 | /* This low level function performs the actual PTE insertion | ||
87 | * Setting the PTE depends on the MMU type and other factors. It's | ||
88 | * an horrible mess that I'm not going to try to clean up now but | ||
89 | * I'm keeping it in one place rather than spread around | ||
90 | */ | ||
91 | static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, | ||
92 | pte_t *ptep, pte_t pte, int percpu) | ||
93 | { | ||
94 | #if defined(CONFIG_PPC_STD_MMU_32) && defined(CONFIG_SMP) && !defined(CONFIG_PTE_64BIT) | ||
95 | /* First case is 32-bit Hash MMU in SMP mode with 32-bit PTEs. We use the | ||
96 | * helper pte_update() which does an atomic update. We need to do that | ||
97 | * because a concurrent invalidation can clear _PAGE_HASHPTE. If it's a | ||
98 | * per-CPU PTE such as a kmap_atomic, we do a simple update preserving | ||
99 | * the hash bits instead (ie, same as the non-SMP case) | ||
100 | */ | ||
101 | if (percpu) | ||
102 | *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE) | ||
103 | | (pte_val(pte) & ~_PAGE_HASHPTE)); | ||
104 | else | ||
105 | pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte)); | ||
106 | |||
107 | #elif defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) && defined(CONFIG_SMP) | ||
108 | /* Second case is 32-bit with 64-bit PTE in SMP mode. In this case, we | ||
109 | * can just store as long as we do the two halves in the right order | ||
110 | * with a barrier in between. This is possible because we take care, | ||
111 | * in the hash code, to pre-invalidate if the PTE was already hashed, | ||
112 | * which synchronizes us with any concurrent invalidation. | ||
113 | * In the percpu case, we also fallback to the simple update preserving | ||
114 | * the hash bits | ||
115 | */ | ||
116 | if (percpu) { | ||
117 | *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE) | ||
118 | | (pte_val(pte) & ~_PAGE_HASHPTE)); | ||
119 | return; | ||
120 | } | ||
121 | #if _PAGE_HASHPTE != 0 | ||
122 | if (pte_val(*ptep) & _PAGE_HASHPTE) | ||
123 | flush_hash_entry(mm, ptep, addr); | ||
124 | #endif | ||
125 | __asm__ __volatile__("\ | ||
126 | stw%U0%X0 %2,%0\n\ | ||
127 | eieio\n\ | ||
128 | stw%U0%X0 %L2,%1" | ||
129 | : "=m" (*ptep), "=m" (*((unsigned char *)ptep+4)) | ||
130 | : "r" (pte) : "memory"); | ||
131 | |||
132 | #elif defined(CONFIG_PPC_STD_MMU_32) | ||
133 | /* Third case is 32-bit hash table in UP mode, we need to preserve | ||
134 | * the _PAGE_HASHPTE bit since we may not have invalidated the previous | ||
135 | * translation in the hash yet (done in a subsequent flush_tlb_xxx()) | ||
136 | * and see we need to keep track that this PTE needs invalidating | ||
137 | */ | ||
138 | *ptep = __pte((pte_val(*ptep) & _PAGE_HASHPTE) | ||
139 | | (pte_val(pte) & ~_PAGE_HASHPTE)); | ||
140 | |||
141 | #else | ||
142 | /* Anything else just stores the PTE normally. That covers all 64-bit | ||
143 | * cases, and 32-bit non-hash with 64-bit PTEs in UP mode | ||
144 | */ | ||
145 | *ptep = pte; | ||
146 | #endif | ||
147 | } | ||
148 | |||
149 | |||
150 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS | ||
151 | extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address, | ||
152 | pte_t *ptep, pte_t entry, int dirty); | ||
153 | |||
20 | /* | 154 | /* |
21 | * Macro to mark a page protection value as "uncacheable". | 155 | * Macro to mark a page protection value as "uncacheable". |
22 | */ | 156 | */ |
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h new file mode 100644 index 000000000000..f4a4db8d5555 --- /dev/null +++ b/arch/powerpc/include/asm/ppc-opcode.h | |||
@@ -0,0 +1,73 @@ | |||
1 | /* | ||
2 | * Copyright 2009 Freescale Semicondutor, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version | ||
7 | * 2 of the License, or (at your option) any later version. | ||
8 | * | ||
9 | * provides masks and opcode images for use by code generation, emulation | ||
10 | * and for instructions that older assemblers might not know about | ||
11 | */ | ||
12 | #ifndef _ASM_POWERPC_PPC_OPCODE_H | ||
13 | #define _ASM_POWERPC_PPC_OPCODE_H | ||
14 | |||
15 | #include <linux/stringify.h> | ||
16 | #include <asm/asm-compat.h> | ||
17 | |||
18 | /* sorted alphabetically */ | ||
19 | #define PPC_INST_DCBA 0x7c0005ec | ||
20 | #define PPC_INST_DCBA_MASK 0xfc0007fe | ||
21 | #define PPC_INST_DCBAL 0x7c2005ec | ||
22 | #define PPC_INST_DCBZL 0x7c2007ec | ||
23 | #define PPC_INST_ISEL 0x7c00001e | ||
24 | #define PPC_INST_ISEL_MASK 0xfc00003e | ||
25 | #define PPC_INST_LSWI 0x7c0004aa | ||
26 | #define PPC_INST_LSWX 0x7c00042a | ||
27 | #define PPC_INST_LWSYNC 0x7c2004ac | ||
28 | #define PPC_INST_MCRXR 0x7c000400 | ||
29 | #define PPC_INST_MCRXR_MASK 0xfc0007fe | ||
30 | #define PPC_INST_MFSPR_PVR 0x7c1f42a6 | ||
31 | #define PPC_INST_MFSPR_PVR_MASK 0xfc1fffff | ||
32 | #define PPC_INST_MSGSND 0x7c00019c | ||
33 | #define PPC_INST_NOP 0x60000000 | ||
34 | #define PPC_INST_POPCNTB 0x7c0000f4 | ||
35 | #define PPC_INST_POPCNTB_MASK 0xfc0007fe | ||
36 | #define PPC_INST_RFCI 0x4c000066 | ||
37 | #define PPC_INST_RFDI 0x4c00004e | ||
38 | #define PPC_INST_RFMCI 0x4c00004c | ||
39 | |||
40 | #define PPC_INST_STRING 0x7c00042a | ||
41 | #define PPC_INST_STRING_MASK 0xfc0007fe | ||
42 | #define PPC_INST_STRING_GEN_MASK 0xfc00067e | ||
43 | |||
44 | #define PPC_INST_STSWI 0x7c0005aa | ||
45 | #define PPC_INST_STSWX 0x7c00052a | ||
46 | #define PPC_INST_TLBILX 0x7c000626 | ||
47 | #define PPC_INST_WAIT 0x7c00007c | ||
48 | |||
49 | /* macros to insert fields into opcodes */ | ||
50 | #define __PPC_RA(a) ((a & 0x1f) << 16) | ||
51 | #define __PPC_RB(b) ((b & 0x1f) << 11) | ||
52 | #define __PPC_T_TLB(t) ((t & 0x3) << 21) | ||
53 | #define __PPC_WC(w) ((w & 0x3) << 21) | ||
54 | |||
55 | /* Deal with instructions that older assemblers aren't aware of */ | ||
56 | #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ | ||
57 | __PPC_RA(a) | __PPC_RB(b)) | ||
58 | #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \ | ||
59 | __PPC_RA(a) | __PPC_RB(b)) | ||
60 | #define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \ | ||
61 | __PPC_RB(b)) | ||
62 | #define PPC_RFCI stringify_in_c(.long PPC_INST_RFCI) | ||
63 | #define PPC_RFDI stringify_in_c(.long PPC_INST_RFDI) | ||
64 | #define PPC_RFMCI stringify_in_c(.long PPC_INST_RFMCI) | ||
65 | #define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_INST_TLBILX | \ | ||
66 | __PPC_T_TLB(t) | __PPC_RA(a) | __PPC_RB(b)) | ||
67 | #define PPC_TLBILX_ALL(a, b) PPC_TLBILX(0, a, b) | ||
68 | #define PPC_TLBILX_PID(a, b) PPC_TLBILX(1, a, b) | ||
69 | #define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b) | ||
70 | #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ | ||
71 | __PPC_WC(w)) | ||
72 | |||
73 | #endif /* _ASM_POWERPC_PPC_OPCODE_H */ | ||
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index 1a0d628eb114..f59a66684aed 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h | |||
@@ -7,6 +7,7 @@ | |||
7 | #include <linux/stringify.h> | 7 | #include <linux/stringify.h> |
8 | #include <asm/asm-compat.h> | 8 | #include <asm/asm-compat.h> |
9 | #include <asm/processor.h> | 9 | #include <asm/processor.h> |
10 | #include <asm/ppc-opcode.h> | ||
10 | 11 | ||
11 | #ifndef __ASSEMBLY__ | 12 | #ifndef __ASSEMBLY__ |
12 | #error __FILE__ should only be used in assembler files | 13 | #error __FILE__ should only be used in assembler files |
@@ -167,11 +168,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); \ | |||
167 | #define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority | 168 | #define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority |
168 | #define HMT_HIGH or 3,3,3 | 169 | #define HMT_HIGH or 3,3,3 |
169 | 170 | ||
170 | /* handle instructions that older assemblers may not know */ | ||
171 | #define RFCI .long 0x4c000066 /* rfci instruction */ | ||
172 | #define RFDI .long 0x4c00004e /* rfdi instruction */ | ||
173 | #define RFMCI .long 0x4c00004c /* rfmci instruction */ | ||
174 | |||
175 | #ifdef __KERNEL__ | 171 | #ifdef __KERNEL__ |
176 | #ifdef CONFIG_PPC64 | 172 | #ifdef CONFIG_PPC64 |
177 | 173 | ||
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index d3466490104a..9eed29eee604 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h | |||
@@ -313,6 +313,25 @@ static inline void prefetchw(const void *x) | |||
313 | #define HAVE_ARCH_PICK_MMAP_LAYOUT | 313 | #define HAVE_ARCH_PICK_MMAP_LAYOUT |
314 | #endif | 314 | #endif |
315 | 315 | ||
316 | #ifdef CONFIG_PPC64 | ||
317 | static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32) | ||
318 | { | ||
319 | unsigned long sp; | ||
320 | |||
321 | if (is_32) | ||
322 | sp = regs->gpr[1] & 0x0ffffffffUL; | ||
323 | else | ||
324 | sp = regs->gpr[1]; | ||
325 | |||
326 | return sp; | ||
327 | } | ||
328 | #else | ||
329 | static inline unsigned long get_clean_sp(struct pt_regs *regs, int is_32) | ||
330 | { | ||
331 | return regs->gpr[1]; | ||
332 | } | ||
333 | #endif | ||
334 | |||
316 | #endif /* __KERNEL__ */ | 335 | #endif /* __KERNEL__ */ |
317 | #endif /* __ASSEMBLY__ */ | 336 | #endif /* __ASSEMBLY__ */ |
318 | #endif /* _ASM_POWERPC_PROCESSOR_H */ | 337 | #endif /* _ASM_POWERPC_PROCESSOR_H */ |
diff --git a/arch/powerpc/include/asm/ps3av.h b/arch/powerpc/include/asm/ps3av.h index cd24ac16660a..0427b0b53d2d 100644 --- a/arch/powerpc/include/asm/ps3av.h +++ b/arch/powerpc/include/asm/ps3av.h | |||
@@ -730,7 +730,7 @@ extern int ps3av_cmd_av_get_hw_conf(struct ps3av_pkt_av_get_hw_conf *); | |||
730 | extern int ps3av_cmd_video_get_monitor_info(struct ps3av_pkt_av_get_monitor_info *, | 730 | extern int ps3av_cmd_video_get_monitor_info(struct ps3av_pkt_av_get_monitor_info *, |
731 | u32); | 731 | u32); |
732 | 732 | ||
733 | extern int ps3av_set_video_mode(u32); | 733 | extern int ps3av_set_video_mode(int); |
734 | extern int ps3av_set_audio_mode(u32, u32, u32, u32, u32); | 734 | extern int ps3av_set_audio_mode(u32, u32, u32, u32, u32); |
735 | extern int ps3av_get_auto_mode(void); | 735 | extern int ps3av_get_auto_mode(void); |
736 | extern int ps3av_get_mode(void); | 736 | extern int ps3av_get_mode(void); |
diff --git a/arch/powerpc/include/asm/ps3fb.h b/arch/powerpc/include/asm/ps3fb.h index e7233a849680..90dbefb8cfc4 100644 --- a/arch/powerpc/include/asm/ps3fb.h +++ b/arch/powerpc/include/asm/ps3fb.h | |||
@@ -21,6 +21,7 @@ | |||
21 | 21 | ||
22 | #include <linux/types.h> | 22 | #include <linux/types.h> |
23 | #include <linux/ioctl.h> | 23 | #include <linux/ioctl.h> |
24 | #include <linux/types.h> | ||
24 | 25 | ||
25 | /* ioctl */ | 26 | /* ioctl */ |
26 | #define PS3FB_IOCTL_SETMODE _IOW('r', 1, int) /* set video mode */ | 27 | #define PS3FB_IOCTL_SETMODE _IOW('r', 1, int) /* set video mode */ |
diff --git a/arch/powerpc/include/asm/pte-40x.h b/arch/powerpc/include/asm/pte-40x.h new file mode 100644 index 000000000000..07630faae029 --- /dev/null +++ b/arch/powerpc/include/asm/pte-40x.h | |||
@@ -0,0 +1,64 @@ | |||
1 | #ifndef _ASM_POWERPC_PTE_40x_H | ||
2 | #define _ASM_POWERPC_PTE_40x_H | ||
3 | #ifdef __KERNEL__ | ||
4 | |||
5 | /* | ||
6 | * At present, all PowerPC 400-class processors share a similar TLB | ||
7 | * architecture. The instruction and data sides share a unified, | ||
8 | * 64-entry, fully-associative TLB which is maintained totally under | ||
9 | * software control. In addition, the instruction side has a | ||
10 | * hardware-managed, 4-entry, fully-associative TLB which serves as a | ||
11 | * first level to the shared TLB. These two TLBs are known as the UTLB | ||
12 | * and ITLB, respectively (see "mmu.h" for definitions). | ||
13 | * | ||
14 | * There are several potential gotchas here. The 40x hardware TLBLO | ||
15 | * field looks like this: | ||
16 | * | ||
17 | * 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31 | ||
18 | * RPN..................... 0 0 EX WR ZSEL....... W I M G | ||
19 | * | ||
20 | * Where possible we make the Linux PTE bits match up with this | ||
21 | * | ||
22 | * - bits 20 and 21 must be cleared, because we use 4k pages (40x can | ||
23 | * support down to 1k pages), this is done in the TLBMiss exception | ||
24 | * handler. | ||
25 | * - We use only zones 0 (for kernel pages) and 1 (for user pages) | ||
26 | * of the 16 available. Bit 24-26 of the TLB are cleared in the TLB | ||
27 | * miss handler. Bit 27 is PAGE_USER, thus selecting the correct | ||
28 | * zone. | ||
29 | * - PRESENT *must* be in the bottom two bits because swap cache | ||
30 | * entries use the top 30 bits. Because 40x doesn't support SMP | ||
31 | * anyway, M is irrelevant so we borrow it for PAGE_PRESENT. Bit 30 | ||
32 | * is cleared in the TLB miss handler before the TLB entry is loaded. | ||
33 | * - All other bits of the PTE are loaded into TLBLO without | ||
34 | * modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for | ||
35 | * software PTE bits. We actually use use bits 21, 24, 25, and | ||
36 | * 30 respectively for the software bits: ACCESSED, DIRTY, RW, and | ||
37 | * PRESENT. | ||
38 | */ | ||
39 | |||
40 | #define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */ | ||
41 | #define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */ | ||
42 | #define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */ | ||
43 | #define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */ | ||
44 | #define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */ | ||
45 | #define _PAGE_USER 0x010 /* matches one of the zone permission bits */ | ||
46 | #define _PAGE_RW 0x040 /* software: Writes permitted */ | ||
47 | #define _PAGE_DIRTY 0x080 /* software: dirty page */ | ||
48 | #define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */ | ||
49 | #define _PAGE_HWEXEC 0x200 /* hardware: EX permission */ | ||
50 | #define _PAGE_ACCESSED 0x400 /* software: R: page referenced */ | ||
51 | |||
52 | #define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */ | ||
53 | #define _PMD_BAD 0x802 | ||
54 | #define _PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */ | ||
55 | #define _PMD_SIZE_4M 0x0c0 | ||
56 | #define _PMD_SIZE_16M 0x0e0 | ||
57 | |||
58 | #define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4)) | ||
59 | |||
60 | /* Until my rework is finished, 40x still needs atomic PTE updates */ | ||
61 | #define PTE_ATOMIC_UPDATES 1 | ||
62 | |||
63 | #endif /* __KERNEL__ */ | ||
64 | #endif /* _ASM_POWERPC_PTE_40x_H */ | ||
diff --git a/arch/powerpc/include/asm/pte-44x.h b/arch/powerpc/include/asm/pte-44x.h new file mode 100644 index 000000000000..37e98bcf83e0 --- /dev/null +++ b/arch/powerpc/include/asm/pte-44x.h | |||
@@ -0,0 +1,102 @@ | |||
1 | #ifndef _ASM_POWERPC_PTE_44x_H | ||
2 | #define _ASM_POWERPC_PTE_44x_H | ||
3 | #ifdef __KERNEL__ | ||
4 | |||
5 | /* | ||
6 | * Definitions for PPC440 | ||
7 | * | ||
8 | * Because of the 3 word TLB entries to support 36-bit addressing, | ||
9 | * the attribute are difficult to map in such a fashion that they | ||
10 | * are easily loaded during exception processing. I decided to | ||
11 | * organize the entry so the ERPN is the only portion in the | ||
12 | * upper word of the PTE and the attribute bits below are packed | ||
13 | * in as sensibly as they can be in the area below a 4KB page size | ||
14 | * oriented RPN. This at least makes it easy to load the RPN and | ||
15 | * ERPN fields in the TLB. -Matt | ||
16 | * | ||
17 | * This isn't entirely true anymore, at least some bits are now | ||
18 | * easier to move into the TLB from the PTE. -BenH. | ||
19 | * | ||
20 | * Note that these bits preclude future use of a page size | ||
21 | * less than 4KB. | ||
22 | * | ||
23 | * | ||
24 | * PPC 440 core has following TLB attribute fields; | ||
25 | * | ||
26 | * TLB1: | ||
27 | * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 | ||
28 | * RPN................................. - - - - - - ERPN....... | ||
29 | * | ||
30 | * TLB2: | ||
31 | * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 | ||
32 | * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR | ||
33 | * | ||
34 | * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional | ||
35 | * TLB2 storage attibute fields. Those are: | ||
36 | * | ||
37 | * TLB2: | ||
38 | * 0...10 11 12 13 14 15 16...31 | ||
39 | * no change WL1 IL1I IL1D IL2I IL2D no change | ||
40 | * | ||
41 | * There are some constrains and options, to decide mapping software bits | ||
42 | * into TLB entry. | ||
43 | * | ||
44 | * - PRESENT *must* be in the bottom three bits because swap cache | ||
45 | * entries use the top 29 bits for TLB2. | ||
46 | * | ||
47 | * - FILE *must* be in the bottom three bits because swap cache | ||
48 | * entries use the top 29 bits for TLB2. | ||
49 | * | ||
50 | * - CACHE COHERENT bit (M) has no effect on original PPC440 cores, | ||
51 | * because it doesn't support SMP. However, some later 460 variants | ||
52 | * have -some- form of SMP support and so I keep the bit there for | ||
53 | * future use | ||
54 | * | ||
55 | * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used | ||
56 | * for memory protection related functions (see PTE structure in | ||
57 | * include/asm-ppc/mmu.h). The _PAGE_XXX definitions in this file map to the | ||
58 | * above bits. Note that the bit values are CPU specific, not architecture | ||
59 | * specific. | ||
60 | * | ||
61 | * The kernel PTE entry holds an arch-dependent swp_entry structure under | ||
62 | * certain situations. In other words, in such situations some portion of | ||
63 | * the PTE bits are used as a swp_entry. In the PPC implementation, the | ||
64 | * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still | ||
65 | * hold protection values. That means the three protection bits are | ||
66 | * reserved for both PTE and SWAP entry at the most significant three | ||
67 | * LSBs. | ||
68 | * | ||
69 | * There are three protection bits available for SWAP entry: | ||
70 | * _PAGE_PRESENT | ||
71 | * _PAGE_FILE | ||
72 | * _PAGE_HASHPTE (if HW has) | ||
73 | * | ||
74 | * So those three bits have to be inside of 0-2nd LSB of PTE. | ||
75 | * | ||
76 | */ | ||
77 | |||
78 | #define _PAGE_PRESENT 0x00000001 /* S: PTE valid */ | ||
79 | #define _PAGE_RW 0x00000002 /* S: Write permission */ | ||
80 | #define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */ | ||
81 | #define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */ | ||
82 | #define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */ | ||
83 | #define _PAGE_DIRTY 0x00000010 /* S: Page dirty */ | ||
84 | #define _PAGE_SPECIAL 0x00000020 /* S: Special page */ | ||
85 | #define _PAGE_USER 0x00000040 /* S: User page */ | ||
86 | #define _PAGE_ENDIAN 0x00000080 /* H: E bit */ | ||
87 | #define _PAGE_GUARDED 0x00000100 /* H: G bit */ | ||
88 | #define _PAGE_COHERENT 0x00000200 /* H: M bit */ | ||
89 | #define _PAGE_NO_CACHE 0x00000400 /* H: I bit */ | ||
90 | #define _PAGE_WRITETHRU 0x00000800 /* H: W bit */ | ||
91 | |||
92 | /* TODO: Add large page lowmem mapping support */ | ||
93 | #define _PMD_PRESENT 0 | ||
94 | #define _PMD_PRESENT_MASK (PAGE_MASK) | ||
95 | #define _PMD_BAD (~PAGE_MASK) | ||
96 | |||
97 | /* ERPN in a PTE never gets cleared, ignore it */ | ||
98 | #define _PTE_NONE_MASK 0xffffffff00000000ULL | ||
99 | |||
100 | |||
101 | #endif /* __KERNEL__ */ | ||
102 | #endif /* _ASM_POWERPC_PTE_44x_H */ | ||
diff --git a/arch/powerpc/include/asm/pte-8xx.h b/arch/powerpc/include/asm/pte-8xx.h new file mode 100644 index 000000000000..8c6e31251034 --- /dev/null +++ b/arch/powerpc/include/asm/pte-8xx.h | |||
@@ -0,0 +1,67 @@ | |||
1 | #ifndef _ASM_POWERPC_PTE_8xx_H | ||
2 | #define _ASM_POWERPC_PTE_8xx_H | ||
3 | #ifdef __KERNEL__ | ||
4 | |||
5 | /* | ||
6 | * The PowerPC MPC8xx uses a TLB with hardware assisted, software tablewalk. | ||
7 | * We also use the two level tables, but we can put the real bits in them | ||
8 | * needed for the TLB and tablewalk. These definitions require Mx_CTR.PPM = 0, | ||
9 | * Mx_CTR.PPCS = 0, and MD_CTR.TWAM = 1. The level 2 descriptor has | ||
10 | * additional page protection (when Mx_CTR.PPCS = 1) that allows TLB hit | ||
11 | * based upon user/super access. The TLB does not have accessed nor write | ||
12 | * protect. We assume that if the TLB get loaded with an entry it is | ||
13 | * accessed, and overload the changed bit for write protect. We use | ||
14 | * two bits in the software pte that are supposed to be set to zero in | ||
15 | * the TLB entry (24 and 25) for these indicators. Although the level 1 | ||
16 | * descriptor contains the guarded and writethrough/copyback bits, we can | ||
17 | * set these at the page level since they get copied from the Mx_TWC | ||
18 | * register when the TLB entry is loaded. We will use bit 27 for guard, since | ||
19 | * that is where it exists in the MD_TWC, and bit 26 for writethrough. | ||
20 | * These will get masked from the level 2 descriptor at TLB load time, and | ||
21 | * copied to the MD_TWC before it gets loaded. | ||
22 | * Large page sizes added. We currently support two sizes, 4K and 8M. | ||
23 | * This also allows a TLB hander optimization because we can directly | ||
24 | * load the PMD into MD_TWC. The 8M pages are only used for kernel | ||
25 | * mapping of well known areas. The PMD (PGD) entries contain control | ||
26 | * flags in addition to the address, so care must be taken that the | ||
27 | * software no longer assumes these are only pointers. | ||
28 | */ | ||
29 | |||
30 | /* Definitions for 8xx embedded chips. */ | ||
31 | #define _PAGE_PRESENT 0x0001 /* Page is valid */ | ||
32 | #define _PAGE_FILE 0x0002 /* when !present: nonlinear file mapping */ | ||
33 | #define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */ | ||
34 | #define _PAGE_SHARED 0x0004 /* No ASID (context) compare */ | ||
35 | |||
36 | /* These five software bits must be masked out when the entry is loaded | ||
37 | * into the TLB. | ||
38 | */ | ||
39 | #define _PAGE_EXEC 0x0008 /* software: i-cache coherency required */ | ||
40 | #define _PAGE_GUARDED 0x0010 /* software: guarded access */ | ||
41 | #define _PAGE_DIRTY 0x0020 /* software: page changed */ | ||
42 | #define _PAGE_RW 0x0040 /* software: user write access allowed */ | ||
43 | #define _PAGE_ACCESSED 0x0080 /* software: page referenced */ | ||
44 | |||
45 | /* Setting any bits in the nibble with the follow two controls will | ||
46 | * require a TLB exception handler change. It is assumed unused bits | ||
47 | * are always zero. | ||
48 | */ | ||
49 | #define _PAGE_HWWRITE 0x0100 /* h/w write enable: never set in Linux PTE */ | ||
50 | #define _PAGE_USER 0x0800 /* One of the PP bits, the other is USER&~RW */ | ||
51 | |||
52 | #define _PMD_PRESENT 0x0001 | ||
53 | #define _PMD_BAD 0x0ff0 | ||
54 | #define _PMD_PAGE_MASK 0x000c | ||
55 | #define _PMD_PAGE_8M 0x000c | ||
56 | |||
57 | #define _PTE_NONE_MASK _PAGE_ACCESSED | ||
58 | |||
59 | /* Until my rework is finished, 8xx still needs atomic PTE updates */ | ||
60 | #define PTE_ATOMIC_UPDATES 1 | ||
61 | |||
62 | /* We need to add _PAGE_SHARED to kernel pages */ | ||
63 | #define _PAGE_KERNEL_RO (_PAGE_SHARED) | ||
64 | #define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE) | ||
65 | |||
66 | #endif /* __KERNEL__ */ | ||
67 | #endif /* _ASM_POWERPC_PTE_8xx_H */ | ||
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h new file mode 100644 index 000000000000..d9740e886801 --- /dev/null +++ b/arch/powerpc/include/asm/pte-common.h | |||
@@ -0,0 +1,180 @@ | |||
1 | /* Included from asm/pgtable-*.h only ! */ | ||
2 | |||
3 | /* | ||
4 | * Some bits are only used on some cpu families... Make sure that all | ||
5 | * the undefined gets a sensible default | ||
6 | */ | ||
7 | #ifndef _PAGE_HASHPTE | ||
8 | #define _PAGE_HASHPTE 0 | ||
9 | #endif | ||
10 | #ifndef _PAGE_SHARED | ||
11 | #define _PAGE_SHARED 0 | ||
12 | #endif | ||
13 | #ifndef _PAGE_HWWRITE | ||
14 | #define _PAGE_HWWRITE 0 | ||
15 | #endif | ||
16 | #ifndef _PAGE_HWEXEC | ||
17 | #define _PAGE_HWEXEC 0 | ||
18 | #endif | ||
19 | #ifndef _PAGE_EXEC | ||
20 | #define _PAGE_EXEC 0 | ||
21 | #endif | ||
22 | #ifndef _PAGE_ENDIAN | ||
23 | #define _PAGE_ENDIAN 0 | ||
24 | #endif | ||
25 | #ifndef _PAGE_COHERENT | ||
26 | #define _PAGE_COHERENT 0 | ||
27 | #endif | ||
28 | #ifndef _PAGE_WRITETHRU | ||
29 | #define _PAGE_WRITETHRU 0 | ||
30 | #endif | ||
31 | #ifndef _PAGE_SPECIAL | ||
32 | #define _PAGE_SPECIAL 0 | ||
33 | #endif | ||
34 | #ifndef _PAGE_4K_PFN | ||
35 | #define _PAGE_4K_PFN 0 | ||
36 | #endif | ||
37 | #ifndef _PAGE_PSIZE | ||
38 | #define _PAGE_PSIZE 0 | ||
39 | #endif | ||
40 | #ifndef _PMD_PRESENT_MASK | ||
41 | #define _PMD_PRESENT_MASK _PMD_PRESENT | ||
42 | #endif | ||
43 | #ifndef _PMD_SIZE | ||
44 | #define _PMD_SIZE 0 | ||
45 | #define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE() | ||
46 | #endif | ||
47 | #ifndef _PAGE_KERNEL_RO | ||
48 | #define _PAGE_KERNEL_RO 0 | ||
49 | #endif | ||
50 | #ifndef _PAGE_KERNEL_RW | ||
51 | #define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE) | ||
52 | #endif | ||
53 | #ifndef _PAGE_HPTEFLAGS | ||
54 | #define _PAGE_HPTEFLAGS _PAGE_HASHPTE | ||
55 | #endif | ||
56 | #ifndef _PTE_NONE_MASK | ||
57 | #define _PTE_NONE_MASK _PAGE_HPTEFLAGS | ||
58 | #endif | ||
59 | |||
60 | /* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a | ||
61 | * kernel without large page PMD support | ||
62 | */ | ||
63 | #ifndef __ASSEMBLY__ | ||
64 | extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); | ||
65 | #endif /* __ASSEMBLY__ */ | ||
66 | |||
67 | /* Location of the PFN in the PTE. Most 32-bit platforms use the same | ||
68 | * as _PAGE_SHIFT here (ie, naturally aligned). | ||
69 | * Platform who don't just pre-define the value so we don't override it here | ||
70 | */ | ||
71 | #ifndef PTE_RPN_SHIFT | ||
72 | #define PTE_RPN_SHIFT (PAGE_SHIFT) | ||
73 | #endif | ||
74 | |||
75 | /* The mask convered by the RPN must be a ULL on 32-bit platforms with | ||
76 | * 64-bit PTEs | ||
77 | */ | ||
78 | #if defined(CONFIG_PPC32) && defined(CONFIG_PTE_64BIT) | ||
79 | #define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT)) | ||
80 | #define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1)) | ||
81 | #else | ||
82 | #define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT)) | ||
83 | #define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1)) | ||
84 | #endif | ||
85 | |||
86 | /* _PAGE_CHG_MASK masks of bits that are to be preserved accross | ||
87 | * pgprot changes | ||
88 | */ | ||
89 | #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \ | ||
90 | _PAGE_ACCESSED | _PAGE_SPECIAL) | ||
91 | |||
92 | /* Mask of bits returned by pte_pgprot() */ | ||
93 | #define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ | ||
94 | _PAGE_WRITETHRU | _PAGE_ENDIAN | _PAGE_4K_PFN | \ | ||
95 | _PAGE_USER | _PAGE_ACCESSED | \ | ||
96 | _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \ | ||
97 | _PAGE_EXEC | _PAGE_HWEXEC) | ||
98 | |||
99 | /* | ||
100 | * We define 2 sets of base prot bits, one for basic pages (ie, | ||
101 | * cacheable kernel and user pages) and one for non cacheable | ||
102 | * pages. We always set _PAGE_COHERENT when SMP is enabled or | ||
103 | * the processor might need it for DMA coherency. | ||
104 | */ | ||
105 | #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE) | ||
106 | #if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU) | ||
107 | #define _PAGE_BASE (_PAGE_BASE_NC | _PAGE_COHERENT) | ||
108 | #else | ||
109 | #define _PAGE_BASE (_PAGE_BASE_NC) | ||
110 | #endif | ||
111 | |||
112 | /* Permission masks used to generate the __P and __S table, | ||
113 | * | ||
114 | * Note:__pgprot is defined in arch/powerpc/include/asm/page.h | ||
115 | * | ||
116 | * Write permissions imply read permissions for now (we could make write-only | ||
117 | * pages on BookE but we don't bother for now). Execute permission control is | ||
118 | * possible on platforms that define _PAGE_EXEC | ||
119 | * | ||
120 | * Note due to the way vm flags are laid out, the bits are XWR | ||
121 | */ | ||
122 | #define PAGE_NONE __pgprot(_PAGE_BASE) | ||
123 | #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW) | ||
124 | #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC) | ||
125 | #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER) | ||
126 | #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) | ||
127 | #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER) | ||
128 | #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) | ||
129 | |||
130 | #define __P000 PAGE_NONE | ||
131 | #define __P001 PAGE_READONLY | ||
132 | #define __P010 PAGE_COPY | ||
133 | #define __P011 PAGE_COPY | ||
134 | #define __P100 PAGE_READONLY_X | ||
135 | #define __P101 PAGE_READONLY_X | ||
136 | #define __P110 PAGE_COPY_X | ||
137 | #define __P111 PAGE_COPY_X | ||
138 | |||
139 | #define __S000 PAGE_NONE | ||
140 | #define __S001 PAGE_READONLY | ||
141 | #define __S010 PAGE_SHARED | ||
142 | #define __S011 PAGE_SHARED | ||
143 | #define __S100 PAGE_READONLY_X | ||
144 | #define __S101 PAGE_READONLY_X | ||
145 | #define __S110 PAGE_SHARED_X | ||
146 | #define __S111 PAGE_SHARED_X | ||
147 | |||
148 | /* Permission masks used for kernel mappings */ | ||
149 | #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW) | ||
150 | #define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \ | ||
151 | _PAGE_NO_CACHE) | ||
152 | #define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \ | ||
153 | _PAGE_NO_CACHE | _PAGE_GUARDED) | ||
154 | #define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC) | ||
155 | #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO) | ||
156 | #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC) | ||
157 | |||
158 | /* Protection used for kernel text. We want the debuggers to be able to | ||
159 | * set breakpoints anywhere, so don't write protect the kernel text | ||
160 | * on platforms where such control is possible. | ||
161 | */ | ||
162 | #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\ | ||
163 | defined(CONFIG_KPROBES) | ||
164 | #define PAGE_KERNEL_TEXT PAGE_KERNEL_X | ||
165 | #else | ||
166 | #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX | ||
167 | #endif | ||
168 | |||
169 | /* Make modules code happy. We don't set RO yet */ | ||
170 | #define PAGE_KERNEL_EXEC PAGE_KERNEL_X | ||
171 | |||
172 | /* Advertise special mapping type for AGP */ | ||
173 | #define PAGE_AGP (PAGE_KERNEL_NC) | ||
174 | #define HAVE_PAGE_AGP | ||
175 | |||
176 | /* Advertise support for _PAGE_SPECIAL */ | ||
177 | #ifdef _PAGE_SPECIAL | ||
178 | #define __HAVE_ARCH_PTE_SPECIAL | ||
179 | #endif | ||
180 | |||
diff --git a/arch/powerpc/include/asm/pte-fsl-booke.h b/arch/powerpc/include/asm/pte-fsl-booke.h new file mode 100644 index 000000000000..10820f58acf5 --- /dev/null +++ b/arch/powerpc/include/asm/pte-fsl-booke.h | |||
@@ -0,0 +1,48 @@ | |||
1 | #ifndef _ASM_POWERPC_PTE_FSL_BOOKE_H | ||
2 | #define _ASM_POWERPC_PTE_FSL_BOOKE_H | ||
3 | #ifdef __KERNEL__ | ||
4 | |||
5 | /* PTE bit definitions for Freescale BookE SW loaded TLB MMU based | ||
6 | * processors | ||
7 | * | ||
8 | MMU Assist Register 3: | ||
9 | |||
10 | 32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63 | ||
11 | RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR | ||
12 | |||
13 | - PRESENT *must* be in the bottom three bits because swap cache | ||
14 | entries use the top 29 bits. | ||
15 | |||
16 | - FILE *must* be in the bottom three bits because swap cache | ||
17 | entries use the top 29 bits. | ||
18 | */ | ||
19 | |||
20 | /* Definitions for FSL Book-E Cores */ | ||
21 | #define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */ | ||
22 | #define _PAGE_USER 0x00002 /* S: User page (maps to UR) */ | ||
23 | #define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */ | ||
24 | #define _PAGE_RW 0x00004 /* S: Write permission (SW) */ | ||
25 | #define _PAGE_DIRTY 0x00008 /* S: Page dirty */ | ||
26 | #define _PAGE_HWEXEC 0x00010 /* H: SX permission */ | ||
27 | #define _PAGE_ACCESSED 0x00020 /* S: Page referenced */ | ||
28 | |||
29 | #define _PAGE_ENDIAN 0x00040 /* H: E bit */ | ||
30 | #define _PAGE_GUARDED 0x00080 /* H: G bit */ | ||
31 | #define _PAGE_COHERENT 0x00100 /* H: M bit */ | ||
32 | #define _PAGE_NO_CACHE 0x00200 /* H: I bit */ | ||
33 | #define _PAGE_WRITETHRU 0x00400 /* H: W bit */ | ||
34 | #define _PAGE_SPECIAL 0x00800 /* S: Special page */ | ||
35 | |||
36 | #ifdef CONFIG_PTE_64BIT | ||
37 | /* ERPN in a PTE never gets cleared, ignore it */ | ||
38 | #define _PTE_NONE_MASK 0xffffffffffff0000ULL | ||
39 | /* We extend the size of the PTE flags area when using 64-bit PTEs */ | ||
40 | #define PTE_RPN_SHIFT (PAGE_SHIFT + 8) | ||
41 | #endif | ||
42 | |||
43 | #define _PMD_PRESENT 0 | ||
44 | #define _PMD_PRESENT_MASK (PAGE_MASK) | ||
45 | #define _PMD_BAD (~PAGE_MASK) | ||
46 | |||
47 | #endif /* __KERNEL__ */ | ||
48 | #endif /* _ASM_POWERPC_PTE_FSL_BOOKE_H */ | ||
diff --git a/arch/powerpc/include/asm/pte-hash32.h b/arch/powerpc/include/asm/pte-hash32.h new file mode 100644 index 000000000000..16e571c7f9ef --- /dev/null +++ b/arch/powerpc/include/asm/pte-hash32.h | |||
@@ -0,0 +1,48 @@ | |||
1 | #ifndef _ASM_POWERPC_PTE_HASH32_H | ||
2 | #define _ASM_POWERPC_PTE_HASH32_H | ||
3 | #ifdef __KERNEL__ | ||
4 | |||
5 | /* | ||
6 | * The "classic" 32-bit implementation of the PowerPC MMU uses a hash | ||
7 | * table containing PTEs, together with a set of 16 segment registers, | ||
8 | * to define the virtual to physical address mapping. | ||
9 | * | ||
10 | * We use the hash table as an extended TLB, i.e. a cache of currently | ||
11 | * active mappings. We maintain a two-level page table tree, much | ||
12 | * like that used by the i386, for the sake of the Linux memory | ||
13 | * management code. Low-level assembler code in hash_low_32.S | ||
14 | * (procedure hash_page) is responsible for extracting ptes from the | ||
15 | * tree and putting them into the hash table when necessary, and | ||
16 | * updating the accessed and modified bits in the page table tree. | ||
17 | */ | ||
18 | |||
19 | #define _PAGE_PRESENT 0x001 /* software: pte contains a translation */ | ||
20 | #define _PAGE_HASHPTE 0x002 /* hash_page has made an HPTE for this pte */ | ||
21 | #define _PAGE_FILE 0x004 /* when !present: nonlinear file mapping */ | ||
22 | #define _PAGE_USER 0x004 /* usermode access allowed */ | ||
23 | #define _PAGE_GUARDED 0x008 /* G: prohibit speculative access */ | ||
24 | #define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */ | ||
25 | #define _PAGE_NO_CACHE 0x020 /* I: cache inhibit */ | ||
26 | #define _PAGE_WRITETHRU 0x040 /* W: cache write-through */ | ||
27 | #define _PAGE_DIRTY 0x080 /* C: page changed */ | ||
28 | #define _PAGE_ACCESSED 0x100 /* R: page referenced */ | ||
29 | #define _PAGE_EXEC 0x200 /* software: i-cache coherency required */ | ||
30 | #define _PAGE_RW 0x400 /* software: user write access allowed */ | ||
31 | #define _PAGE_SPECIAL 0x800 /* software: Special page */ | ||
32 | |||
33 | #ifdef CONFIG_PTE_64BIT | ||
34 | /* We never clear the high word of the pte */ | ||
35 | #define _PTE_NONE_MASK (0xffffffff00000000ULL | _PAGE_HASHPTE) | ||
36 | #else | ||
37 | #define _PTE_NONE_MASK _PAGE_HASHPTE | ||
38 | #endif | ||
39 | |||
40 | #define _PMD_PRESENT 0 | ||
41 | #define _PMD_PRESENT_MASK (PAGE_MASK) | ||
42 | #define _PMD_BAD (~PAGE_MASK) | ||
43 | |||
44 | /* Hash table based platforms need atomic updates of the linux PTE */ | ||
45 | #define PTE_ATOMIC_UPDATES 1 | ||
46 | |||
47 | #endif /* __KERNEL__ */ | ||
48 | #endif /* _ASM_POWERPC_PTE_HASH32_H */ | ||
diff --git a/arch/powerpc/include/asm/pte-hash64-4k.h b/arch/powerpc/include/asm/pte-hash64-4k.h new file mode 100644 index 000000000000..c134e809aac3 --- /dev/null +++ b/arch/powerpc/include/asm/pte-hash64-4k.h | |||
@@ -0,0 +1,17 @@ | |||
1 | /* To be include by pgtable-hash64.h only */ | ||
2 | |||
3 | /* PTE bits */ | ||
4 | #define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */ | ||
5 | #define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */ | ||
6 | #define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */ | ||
7 | #define _PAGE_F_SECOND _PAGE_SECONDARY | ||
8 | #define _PAGE_F_GIX _PAGE_GROUP_IX | ||
9 | #define _PAGE_SPECIAL 0x10000 /* software: special page */ | ||
10 | |||
11 | /* PTE flags to conserve for HPTE identification */ | ||
12 | #define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \ | ||
13 | _PAGE_SECONDARY | _PAGE_GROUP_IX) | ||
14 | |||
15 | /* shift to put page number into pte */ | ||
16 | #define PTE_RPN_SHIFT (17) | ||
17 | |||
diff --git a/arch/powerpc/include/asm/pgtable-64k.h b/arch/powerpc/include/asm/pte-hash64-64k.h index 7389003349a6..e05d26fa372f 100644 --- a/arch/powerpc/include/asm/pgtable-64k.h +++ b/arch/powerpc/include/asm/pte-hash64-64k.h | |||
@@ -1,76 +1,6 @@ | |||
1 | #ifndef _ASM_POWERPC_PGTABLE_64K_H | 1 | /* To be include by pgtable-hash64.h only */ |
2 | #define _ASM_POWERPC_PGTABLE_64K_H | ||
3 | |||
4 | #include <asm-generic/pgtable-nopud.h> | ||
5 | |||
6 | |||
7 | #define PTE_INDEX_SIZE 12 | ||
8 | #define PMD_INDEX_SIZE 12 | ||
9 | #define PUD_INDEX_SIZE 0 | ||
10 | #define PGD_INDEX_SIZE 4 | ||
11 | |||
12 | #ifndef __ASSEMBLY__ | ||
13 | #define PTE_TABLE_SIZE (sizeof(real_pte_t) << PTE_INDEX_SIZE) | ||
14 | #define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) | ||
15 | #define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) | ||
16 | |||
17 | #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) | ||
18 | #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) | ||
19 | #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) | ||
20 | |||
21 | #ifdef CONFIG_PPC_SUBPAGE_PROT | ||
22 | /* | ||
23 | * For the sub-page protection option, we extend the PGD with one of | ||
24 | * these. Basically we have a 3-level tree, with the top level being | ||
25 | * the protptrs array. To optimize speed and memory consumption when | ||
26 | * only addresses < 4GB are being protected, pointers to the first | ||
27 | * four pages of sub-page protection words are stored in the low_prot | ||
28 | * array. | ||
29 | * Each page of sub-page protection words protects 1GB (4 bytes | ||
30 | * protects 64k). For the 3-level tree, each page of pointers then | ||
31 | * protects 8TB. | ||
32 | */ | ||
33 | struct subpage_prot_table { | ||
34 | unsigned long maxaddr; /* only addresses < this are protected */ | ||
35 | unsigned int **protptrs[2]; | ||
36 | unsigned int *low_prot[4]; | ||
37 | }; | ||
38 | |||
39 | #undef PGD_TABLE_SIZE | ||
40 | #define PGD_TABLE_SIZE ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \ | ||
41 | sizeof(struct subpage_prot_table)) | ||
42 | |||
43 | #define SBP_L1_BITS (PAGE_SHIFT - 2) | ||
44 | #define SBP_L2_BITS (PAGE_SHIFT - 3) | ||
45 | #define SBP_L1_COUNT (1 << SBP_L1_BITS) | ||
46 | #define SBP_L2_COUNT (1 << SBP_L2_BITS) | ||
47 | #define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS) | ||
48 | #define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS) | ||
49 | |||
50 | extern void subpage_prot_free(pgd_t *pgd); | ||
51 | |||
52 | static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd) | ||
53 | { | ||
54 | return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD); | ||
55 | } | ||
56 | #endif /* CONFIG_PPC_SUBPAGE_PROT */ | ||
57 | #endif /* __ASSEMBLY__ */ | ||
58 | |||
59 | /* With 4k base page size, hugepage PTEs go at the PMD level */ | ||
60 | #define MIN_HUGEPTE_SHIFT PAGE_SHIFT | ||
61 | |||
62 | /* PMD_SHIFT determines what a second-level page table entry can map */ | ||
63 | #define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE) | ||
64 | #define PMD_SIZE (1UL << PMD_SHIFT) | ||
65 | #define PMD_MASK (~(PMD_SIZE-1)) | ||
66 | |||
67 | /* PGDIR_SHIFT determines what a third-level page table entry can map */ | ||
68 | #define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE) | ||
69 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | ||
70 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | ||
71 | 2 | ||
72 | /* Additional PTE bits (don't change without checking asm in hash_low.S) */ | 3 | /* Additional PTE bits (don't change without checking asm in hash_low.S) */ |
73 | #define __HAVE_ARCH_PTE_SPECIAL | ||
74 | #define _PAGE_SPECIAL 0x00000400 /* software: special page */ | 4 | #define _PAGE_SPECIAL 0x00000400 /* software: special page */ |
75 | #define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */ | 5 | #define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */ |
76 | #define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */ | 6 | #define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */ |
@@ -107,21 +37,15 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd) | |||
107 | * of addressable physical space, or 46 bits for the special 4k PFNs. | 37 | * of addressable physical space, or 46 bits for the special 4k PFNs. |
108 | */ | 38 | */ |
109 | #define PTE_RPN_SHIFT (30) | 39 | #define PTE_RPN_SHIFT (30) |
110 | #define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT)) | ||
111 | #define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1)) | ||
112 | |||
113 | /* _PAGE_CHG_MASK masks of bits that are to be preserved accross | ||
114 | * pgprot changes | ||
115 | */ | ||
116 | #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \ | ||
117 | _PAGE_ACCESSED | _PAGE_SPECIAL) | ||
118 | 40 | ||
119 | /* Bits to mask out from a PMD to get to the PTE page */ | 41 | #ifndef __ASSEMBLY__ |
120 | #define PMD_MASKED_BITS 0x1ff | ||
121 | /* Bits to mask out from a PGD/PUD to get to the PMD page */ | ||
122 | #define PUD_MASKED_BITS 0x1ff | ||
123 | 42 | ||
124 | /* Manipulate "rpte" values */ | 43 | /* |
44 | * With 64K pages on hash table, we have a special PTE format that | ||
45 | * uses a second "half" of the page table to encode sub-page information | ||
46 | * in order to deal with 64K made of 4K HW pages. Thus we override the | ||
47 | * generic accessors and iterators here | ||
48 | */ | ||
125 | #define __real_pte(e,p) ((real_pte_t) { \ | 49 | #define __real_pte(e,p) ((real_pte_t) { \ |
126 | (e), pte_val(*((p) + PTRS_PER_PTE)) }) | 50 | (e), pte_val(*((p) + PTRS_PER_PTE)) }) |
127 | #define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \ | 51 | #define __rpte_to_hidx(r,index) ((pte_val((r).pte) & _PAGE_COMBO) ? \ |
@@ -130,7 +54,6 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd) | |||
130 | #define __rpte_sub_valid(rpte, index) \ | 54 | #define __rpte_sub_valid(rpte, index) \ |
131 | (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index))) | 55 | (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index))) |
132 | 56 | ||
133 | |||
134 | /* Trick: we set __end to va + 64k, which happens works for | 57 | /* Trick: we set __end to va + 64k, which happens works for |
135 | * a 16M page as well as we want only one iteration | 58 | * a 16M page as well as we want only one iteration |
136 | */ | 59 | */ |
@@ -152,4 +75,41 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd) | |||
152 | remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \ | 75 | remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \ |
153 | __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN)) | 76 | __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN)) |
154 | 77 | ||
155 | #endif /* _ASM_POWERPC_PGTABLE_64K_H */ | 78 | |
79 | #ifdef CONFIG_PPC_SUBPAGE_PROT | ||
80 | /* | ||
81 | * For the sub-page protection option, we extend the PGD with one of | ||
82 | * these. Basically we have a 3-level tree, with the top level being | ||
83 | * the protptrs array. To optimize speed and memory consumption when | ||
84 | * only addresses < 4GB are being protected, pointers to the first | ||
85 | * four pages of sub-page protection words are stored in the low_prot | ||
86 | * array. | ||
87 | * Each page of sub-page protection words protects 1GB (4 bytes | ||
88 | * protects 64k). For the 3-level tree, each page of pointers then | ||
89 | * protects 8TB. | ||
90 | */ | ||
91 | struct subpage_prot_table { | ||
92 | unsigned long maxaddr; /* only addresses < this are protected */ | ||
93 | unsigned int **protptrs[2]; | ||
94 | unsigned int *low_prot[4]; | ||
95 | }; | ||
96 | |||
97 | #undef PGD_TABLE_SIZE | ||
98 | #define PGD_TABLE_SIZE ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \ | ||
99 | sizeof(struct subpage_prot_table)) | ||
100 | |||
101 | #define SBP_L1_BITS (PAGE_SHIFT - 2) | ||
102 | #define SBP_L2_BITS (PAGE_SHIFT - 3) | ||
103 | #define SBP_L1_COUNT (1 << SBP_L1_BITS) | ||
104 | #define SBP_L2_COUNT (1 << SBP_L2_BITS) | ||
105 | #define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS) | ||
106 | #define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS) | ||
107 | |||
108 | extern void subpage_prot_free(pgd_t *pgd); | ||
109 | |||
110 | static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd) | ||
111 | { | ||
112 | return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD); | ||
113 | } | ||
114 | #endif /* CONFIG_PPC_SUBPAGE_PROT */ | ||
115 | #endif /* __ASSEMBLY__ */ | ||
diff --git a/arch/powerpc/include/asm/pte-hash64.h b/arch/powerpc/include/asm/pte-hash64.h new file mode 100644 index 000000000000..0419eeb53274 --- /dev/null +++ b/arch/powerpc/include/asm/pte-hash64.h | |||
@@ -0,0 +1,54 @@ | |||
1 | #ifndef _ASM_POWERPC_PTE_HASH64_H | ||
2 | #define _ASM_POWERPC_PTE_HASH64_H | ||
3 | #ifdef __KERNEL__ | ||
4 | |||
5 | /* | ||
6 | * Common bits between 4K and 64K pages in a linux-style PTE. | ||
7 | * These match the bits in the (hardware-defined) PowerPC PTE as closely | ||
8 | * as possible. Additional bits may be defined in pgtable-hash64-*.h | ||
9 | * | ||
10 | * Note: We only support user read/write permissions. Supervisor always | ||
11 | * have full read/write to pages above PAGE_OFFSET (pages below that | ||
12 | * always use the user access permissions). | ||
13 | * | ||
14 | * We could create separate kernel read-only if we used the 3 PP bits | ||
15 | * combinations that newer processors provide but we currently don't. | ||
16 | */ | ||
17 | #define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */ | ||
18 | #define _PAGE_USER 0x0002 /* matches one of the PP bits */ | ||
19 | #define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */ | ||
20 | #define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */ | ||
21 | #define _PAGE_GUARDED 0x0008 | ||
22 | #define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */ | ||
23 | #define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */ | ||
24 | #define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */ | ||
25 | #define _PAGE_DIRTY 0x0080 /* C: page changed */ | ||
26 | #define _PAGE_ACCESSED 0x0100 /* R: page referenced */ | ||
27 | #define _PAGE_RW 0x0200 /* software: user write access allowed */ | ||
28 | #define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */ | ||
29 | |||
30 | /* No separate kernel read-only */ | ||
31 | #define _PAGE_KERNEL_RW (_PAGE_RW | _PAGE_DIRTY) /* user access blocked by key */ | ||
32 | #define _PAGE_KERNEL_RO _PAGE_KERNEL_RW | ||
33 | |||
34 | /* Strong Access Ordering */ | ||
35 | #define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT) | ||
36 | |||
37 | /* No page size encoding in the linux PTE */ | ||
38 | #define _PAGE_PSIZE 0 | ||
39 | |||
40 | /* PTEIDX nibble */ | ||
41 | #define _PTEIDX_SECONDARY 0x8 | ||
42 | #define _PTEIDX_GROUP_IX 0x7 | ||
43 | |||
44 | /* Hash table based platforms need atomic updates of the linux PTE */ | ||
45 | #define PTE_ATOMIC_UPDATES 1 | ||
46 | |||
47 | #ifdef CONFIG_PPC_64K_PAGES | ||
48 | #include <asm/pte-hash64-64k.h> | ||
49 | #else | ||
50 | #include <asm/pte-hash64-4k.h> | ||
51 | #endif | ||
52 | |||
53 | #endif /* __KERNEL__ */ | ||
54 | #endif /* _ASM_POWERPC_PTE_HASH64_H */ | ||
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index f484a343efba..c9ff1ec97479 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
@@ -155,6 +155,8 @@ | |||
155 | #define CTRL_RUNLATCH 0x1 | 155 | #define CTRL_RUNLATCH 0x1 |
156 | #define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ | 156 | #define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ |
157 | #define DABR_TRANSLATION (1UL << 2) | 157 | #define DABR_TRANSLATION (1UL << 2) |
158 | #define DABR_DATA_WRITE (1UL << 1) | ||
159 | #define DABR_DATA_READ (1UL << 0) | ||
158 | #define SPRN_DABR2 0x13D /* e300 */ | 160 | #define SPRN_DABR2 0x13D /* e300 */ |
159 | #define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ | 161 | #define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ |
160 | #define DABRX_USER (1UL << 0) | 162 | #define DABRX_USER (1UL << 0) |
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 67453766bff1..a56f4d61aa72 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h | |||
@@ -10,6 +10,7 @@ | |||
10 | #define __ASM_POWERPC_REG_BOOKE_H__ | 10 | #define __ASM_POWERPC_REG_BOOKE_H__ |
11 | 11 | ||
12 | /* Machine State Register (MSR) Fields */ | 12 | /* Machine State Register (MSR) Fields */ |
13 | #define MSR_GS (1<<28) /* Guest state */ | ||
13 | #define MSR_UCLE (1<<26) /* User-mode cache lock enable */ | 14 | #define MSR_UCLE (1<<26) /* User-mode cache lock enable */ |
14 | #define MSR_SPE (1<<25) /* Enable SPE */ | 15 | #define MSR_SPE (1<<25) /* Enable SPE */ |
15 | #define MSR_DWE (1<<10) /* Debug Wait Enable */ | 16 | #define MSR_DWE (1<<10) /* Debug Wait Enable */ |
@@ -110,6 +111,7 @@ | |||
110 | #define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ | 111 | #define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ |
111 | #define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ | 112 | #define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ |
112 | #define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */ | 113 | #define SPRN_MMUCSR0 0x3F4 /* MMU Control and Status Register 0 */ |
114 | #define SPRN_MMUCFG 0x3F7 /* MMU Configuration Register */ | ||
113 | #define SPRN_PIT 0x3DB /* Programmable Interval Timer */ | 115 | #define SPRN_PIT 0x3DB /* Programmable Interval Timer */ |
114 | #define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */ | 116 | #define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */ |
115 | #define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ | 117 | #define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ |
diff --git a/arch/powerpc/include/asm/socket.h b/arch/powerpc/include/asm/socket.h index f5a4e168e498..1e5cfad0e3f7 100644 --- a/arch/powerpc/include/asm/socket.h +++ b/arch/powerpc/include/asm/socket.h | |||
@@ -61,4 +61,7 @@ | |||
61 | 61 | ||
62 | #define SO_MARK 36 | 62 | #define SO_MARK 36 |
63 | 63 | ||
64 | #define SO_TIMESTAMPING 37 | ||
65 | #define SCM_TIMESTAMPING SO_TIMESTAMPING | ||
66 | |||
64 | #endif /* _ASM_POWERPC_SOCKET_H */ | 67 | #endif /* _ASM_POWERPC_SOCKET_H */ |
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h index 72353f6070a4..fe166491e9dc 100644 --- a/arch/powerpc/include/asm/systbl.h +++ b/arch/powerpc/include/asm/systbl.h | |||
@@ -65,7 +65,7 @@ SYSCALL(ni_syscall) | |||
65 | SYSX(sys_ni_syscall,sys_olduname, sys_olduname) | 65 | SYSX(sys_ni_syscall,sys_olduname, sys_olduname) |
66 | COMPAT_SYS_SPU(umask) | 66 | COMPAT_SYS_SPU(umask) |
67 | SYSCALL_SPU(chroot) | 67 | SYSCALL_SPU(chroot) |
68 | SYSCALL(ustat) | 68 | COMPAT_SYS(ustat) |
69 | SYSCALL_SPU(dup2) | 69 | SYSCALL_SPU(dup2) |
70 | SYSCALL_SPU(getppid) | 70 | SYSCALL_SPU(getppid) |
71 | SYSCALL_SPU(getpgrp) | 71 | SYSCALL_SPU(getpgrp) |
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h index 2a4be19a92c4..f612798e1c93 100644 --- a/arch/powerpc/include/asm/system.h +++ b/arch/powerpc/include/asm/system.h | |||
@@ -531,7 +531,7 @@ __cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new, | |||
531 | #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) | 531 | #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) |
532 | #endif | 532 | #endif |
533 | 533 | ||
534 | #define arch_align_stack(x) (x) | 534 | extern unsigned long arch_align_stack(unsigned long sp); |
535 | 535 | ||
536 | /* Used in very early kernel initialization. */ | 536 | /* Used in very early kernel initialization. */ |
537 | extern unsigned long reloc_offset(void); | 537 | extern unsigned long reloc_offset(void); |
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h index 9665a26a253a..9aba5a38a7c4 100644 --- a/arch/powerpc/include/asm/thread_info.h +++ b/arch/powerpc/include/asm/thread_info.h | |||
@@ -12,8 +12,10 @@ | |||
12 | 12 | ||
13 | /* We have 8k stacks on ppc32 and 16k on ppc64 */ | 13 | /* We have 8k stacks on ppc32 and 16k on ppc64 */ |
14 | 14 | ||
15 | #ifdef CONFIG_PPC64 | 15 | #if defined(CONFIG_PPC64) |
16 | #define THREAD_SHIFT 14 | 16 | #define THREAD_SHIFT 14 |
17 | #elif defined(CONFIG_PPC_256K_PAGES) | ||
18 | #define THREAD_SHIFT 15 | ||
17 | #else | 19 | #else |
18 | #define THREAD_SHIFT 13 | 20 | #define THREAD_SHIFT 13 |
19 | #endif | 21 | #endif |
@@ -154,6 +156,13 @@ static inline void set_restore_sigmask(void) | |||
154 | ti->local_flags |= _TLF_RESTORE_SIGMASK; | 156 | ti->local_flags |= _TLF_RESTORE_SIGMASK; |
155 | set_bit(TIF_SIGPENDING, &ti->flags); | 157 | set_bit(TIF_SIGPENDING, &ti->flags); |
156 | } | 158 | } |
159 | |||
160 | #ifdef CONFIG_PPC64 | ||
161 | #define is_32bit_task() (test_thread_flag(TIF_32BIT)) | ||
162 | #else | ||
163 | #define is_32bit_task() (1) | ||
164 | #endif | ||
165 | |||
157 | #endif /* !__ASSEMBLY__ */ | 166 | #endif /* !__ASSEMBLY__ */ |
158 | 167 | ||
159 | #endif /* __KERNEL__ */ | 168 | #endif /* __KERNEL__ */ |
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h index 6418ceea44b7..cd21e5e6b04f 100644 --- a/arch/powerpc/include/asm/udbg.h +++ b/arch/powerpc/include/asm/udbg.h | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | 16 | ||
17 | extern void (*udbg_putc)(char c); | 17 | extern void (*udbg_putc)(char c); |
18 | extern void (*udbg_flush)(void); | ||
18 | extern int (*udbg_getc)(void); | 19 | extern int (*udbg_getc)(void); |
19 | extern int (*udbg_getc_poll)(void); | 20 | extern int (*udbg_getc_poll)(void); |
20 | 21 | ||
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 8d1a419df35d..71901fbda4a5 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -18,12 +18,10 @@ CFLAGS_REMOVE_cputable.o = -pg -mno-sched-epilog | |||
18 | CFLAGS_REMOVE_prom_init.o = -pg -mno-sched-epilog | 18 | CFLAGS_REMOVE_prom_init.o = -pg -mno-sched-epilog |
19 | CFLAGS_REMOVE_btext.o = -pg -mno-sched-epilog | 19 | CFLAGS_REMOVE_btext.o = -pg -mno-sched-epilog |
20 | CFLAGS_REMOVE_prom.o = -pg -mno-sched-epilog | 20 | CFLAGS_REMOVE_prom.o = -pg -mno-sched-epilog |
21 | 21 | # do not trace tracer code | |
22 | ifdef CONFIG_DYNAMIC_FTRACE | ||
23 | # dynamic ftrace setup. | ||
24 | CFLAGS_REMOVE_ftrace.o = -pg -mno-sched-epilog | 22 | CFLAGS_REMOVE_ftrace.o = -pg -mno-sched-epilog |
25 | endif | 23 | # timers used by tracing |
26 | 24 | CFLAGS_REMOVE_time.o = -pg -mno-sched-epilog | |
27 | endif | 25 | endif |
28 | 26 | ||
29 | obj-y := cputable.o ptrace.o syscalls.o \ | 27 | obj-y := cputable.o ptrace.o syscalls.o \ |
@@ -61,6 +59,7 @@ obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \ | |||
61 | obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o | 59 | obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o |
62 | obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o | 60 | obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o |
63 | obj-$(CONFIG_44x) += cpu_setup_44x.o | 61 | obj-$(CONFIG_44x) += cpu_setup_44x.o |
62 | obj-$(CONFIG_FSL_BOOKE) += cpu_setup_fsl_booke.o dbell.o | ||
64 | 63 | ||
65 | extra-$(CONFIG_PPC_STD_MMU) := head_32.o | 64 | extra-$(CONFIG_PPC_STD_MMU) := head_32.o |
66 | extra-$(CONFIG_PPC64) := head_64.o | 65 | extra-$(CONFIG_PPC64) := head_64.o |
@@ -76,7 +75,7 @@ obj-y += time.o prom.o traps.o setup-common.o \ | |||
76 | obj-$(CONFIG_PPC32) += entry_32.o setup_32.o | 75 | obj-$(CONFIG_PPC32) += entry_32.o setup_32.o |
77 | obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o | 76 | obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o |
78 | obj-$(CONFIG_KGDB) += kgdb.o | 77 | obj-$(CONFIG_KGDB) += kgdb.o |
79 | obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o | 78 | obj-$(CONFIG_PPC_OF_BOOT_TRAMPOLINE) += prom_init.o |
80 | obj-$(CONFIG_MODULES) += ppc_ksyms.o | 79 | obj-$(CONFIG_MODULES) += ppc_ksyms.o |
81 | obj-$(CONFIG_BOOTX_TEXT) += btext.o | 80 | obj-$(CONFIG_BOOTX_TEXT) += btext.o |
82 | obj-$(CONFIG_SMP) += smp.o | 81 | obj-$(CONFIG_SMP) += smp.o |
@@ -94,6 +93,7 @@ obj-$(CONFIG_AUDIT) += audit.o | |||
94 | obj64-$(CONFIG_AUDIT) += compat_audit.o | 93 | obj64-$(CONFIG_AUDIT) += compat_audit.o |
95 | 94 | ||
96 | obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o | 95 | obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o |
96 | obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o | ||
97 | 97 | ||
98 | obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o | 98 | obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o |
99 | 99 | ||
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c index 73cb6a3229ae..5ffcfaa77d6a 100644 --- a/arch/powerpc/kernel/align.c +++ b/arch/powerpc/kernel/align.c | |||
@@ -187,7 +187,7 @@ static struct aligninfo aligninfo[128] = { | |||
187 | { 4, ST+F+S+U }, /* 11 1 1010: stfsux */ | 187 | { 4, ST+F+S+U }, /* 11 1 1010: stfsux */ |
188 | { 8, ST+F+U }, /* 11 1 1011: stfdux */ | 188 | { 8, ST+F+U }, /* 11 1 1011: stfdux */ |
189 | INVALID, /* 11 1 1100 */ | 189 | INVALID, /* 11 1 1100 */ |
190 | INVALID, /* 11 1 1101 */ | 190 | { 4, LD+F }, /* 11 1 1101: lfiwzx */ |
191 | INVALID, /* 11 1 1110 */ | 191 | INVALID, /* 11 1 1110 */ |
192 | INVALID, /* 11 1 1111 */ | 192 | INVALID, /* 11 1 1111 */ |
193 | }; | 193 | }; |
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index 19ee491e9e23..1e40bc053946 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c | |||
@@ -49,7 +49,7 @@ | |||
49 | #include <asm/iseries/alpaca.h> | 49 | #include <asm/iseries/alpaca.h> |
50 | #endif | 50 | #endif |
51 | #ifdef CONFIG_KVM | 51 | #ifdef CONFIG_KVM |
52 | #include <asm/kvm_44x.h> | 52 | #include <linux/kvm_host.h> |
53 | #endif | 53 | #endif |
54 | 54 | ||
55 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | 55 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) |
@@ -284,9 +284,6 @@ int main(void) | |||
284 | #endif /* ! CONFIG_PPC64 */ | 284 | #endif /* ! CONFIG_PPC64 */ |
285 | 285 | ||
286 | /* About the CPU features table */ | 286 | /* About the CPU features table */ |
287 | DEFINE(CPU_SPEC_ENTRY_SIZE, sizeof(struct cpu_spec)); | ||
288 | DEFINE(CPU_SPEC_PVR_MASK, offsetof(struct cpu_spec, pvr_mask)); | ||
289 | DEFINE(CPU_SPEC_PVR_VALUE, offsetof(struct cpu_spec, pvr_value)); | ||
290 | DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features)); | 287 | DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features)); |
291 | DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup)); | 288 | DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup)); |
292 | DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore)); | 289 | DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore)); |
@@ -361,8 +358,6 @@ int main(void) | |||
361 | DEFINE(PTE_SIZE, sizeof(pte_t)); | 358 | DEFINE(PTE_SIZE, sizeof(pte_t)); |
362 | 359 | ||
363 | #ifdef CONFIG_KVM | 360 | #ifdef CONFIG_KVM |
364 | DEFINE(TLBE_BYTES, sizeof(struct kvmppc_44x_tlbe)); | ||
365 | |||
366 | DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack)); | 361 | DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack)); |
367 | DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid)); | 362 | DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid)); |
368 | DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr)); | 363 | DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr)); |
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S index 10b4ab1008af..7d606f89a839 100644 --- a/arch/powerpc/kernel/cpu_setup_44x.S +++ b/arch/powerpc/kernel/cpu_setup_44x.S | |||
@@ -34,6 +34,7 @@ _GLOBAL(__setup_cpu_440grx) | |||
34 | blr | 34 | blr |
35 | _GLOBAL(__setup_cpu_460ex) | 35 | _GLOBAL(__setup_cpu_460ex) |
36 | _GLOBAL(__setup_cpu_460gt) | 36 | _GLOBAL(__setup_cpu_460gt) |
37 | _GLOBAL(__setup_cpu_460sx) | ||
37 | mflr r4 | 38 | mflr r4 |
38 | bl __init_fpu_44x | 39 | bl __init_fpu_44x |
39 | bl __fixup_440A_mcheck | 40 | bl __fixup_440A_mcheck |
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S index 72d1d7395254..54f767e31a1a 100644 --- a/arch/powerpc/kernel/cpu_setup_6xx.S +++ b/arch/powerpc/kernel/cpu_setup_6xx.S | |||
@@ -15,9 +15,14 @@ | |||
15 | #include <asm/ppc_asm.h> | 15 | #include <asm/ppc_asm.h> |
16 | #include <asm/asm-offsets.h> | 16 | #include <asm/asm-offsets.h> |
17 | #include <asm/cache.h> | 17 | #include <asm/cache.h> |
18 | #include <asm/mmu.h> | ||
18 | 19 | ||
19 | _GLOBAL(__setup_cpu_603) | 20 | _GLOBAL(__setup_cpu_603) |
20 | mflr r4 | 21 | mflr r4 |
22 | BEGIN_MMU_FTR_SECTION | ||
23 | li r10,0 | ||
24 | mtspr SPRN_SPRG4,r10 /* init SW LRU tracking */ | ||
25 | END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU) | ||
21 | BEGIN_FTR_SECTION | 26 | BEGIN_FTR_SECTION |
22 | bl __init_fpu_registers | 27 | bl __init_fpu_registers |
23 | END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE) | 28 | END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE) |
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S new file mode 100644 index 000000000000..eb4b9adcedb4 --- /dev/null +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * This file contains low level CPU setup functions. | ||
3 | * Kumar Gala <galak@kernel.crashing.org> | ||
4 | * Copyright 2009 Freescale Semiconductor, Inc. | ||
5 | * | ||
6 | * Based on cpu_setup_6xx code by | ||
7 | * Benjamin Herrenschmidt <benh@kernel.crashing.org> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <asm/processor.h> | ||
17 | #include <asm/cputable.h> | ||
18 | #include <asm/ppc_asm.h> | ||
19 | |||
20 | _GLOBAL(__setup_cpu_e200) | ||
21 | /* enable dedicated debug exception handling resources (Debug APU) */ | ||
22 | mfspr r3,SPRN_HID0 | ||
23 | ori r3,r3,HID0_DAPUEN@l | ||
24 | mtspr SPRN_HID0,r3 | ||
25 | b __setup_e200_ivors | ||
26 | _GLOBAL(__setup_cpu_e500v1) | ||
27 | _GLOBAL(__setup_cpu_e500v2) | ||
28 | b __setup_e500_ivors | ||
29 | _GLOBAL(__setup_cpu_e500mc) | ||
30 | b __setup_e500mc_ivors | ||
31 | |||
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 923f87aff20a..cd1b687544f3 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -35,6 +35,10 @@ const char *powerpc_base_platform; | |||
35 | * and ppc64 | 35 | * and ppc64 |
36 | */ | 36 | */ |
37 | #ifdef CONFIG_PPC32 | 37 | #ifdef CONFIG_PPC32 |
38 | extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec); | ||
39 | extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); | ||
40 | extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); | ||
41 | extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); | ||
38 | extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); | 42 | extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); |
39 | extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); | 43 | extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); |
40 | extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); | 44 | extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); |
@@ -43,6 +47,7 @@ extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); | |||
43 | extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); | 47 | extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); |
44 | extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); | 48 | extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); |
45 | extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); | 49 | extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); |
50 | extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); | ||
46 | extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); | 51 | extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); |
47 | extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); | 52 | extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); |
48 | extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); | 53 | extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); |
@@ -726,6 +731,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
726 | .cpu_setup = __setup_cpu_750, | 731 | .cpu_setup = __setup_cpu_750, |
727 | .machine_check = machine_check_generic, | 732 | .machine_check = machine_check_generic, |
728 | .platform = "ppc750", | 733 | .platform = "ppc750", |
734 | .oprofile_cpu_type = "ppc/750", | ||
735 | .oprofile_type = PPC_OPROFILE_G4, | ||
729 | }, | 736 | }, |
730 | { /* 750FX rev 2.0 must disable HID0[DPM] */ | 737 | { /* 750FX rev 2.0 must disable HID0[DPM] */ |
731 | .pvr_mask = 0xffffffff, | 738 | .pvr_mask = 0xffffffff, |
@@ -741,6 +748,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
741 | .cpu_setup = __setup_cpu_750, | 748 | .cpu_setup = __setup_cpu_750, |
742 | .machine_check = machine_check_generic, | 749 | .machine_check = machine_check_generic, |
743 | .platform = "ppc750", | 750 | .platform = "ppc750", |
751 | .oprofile_cpu_type = "ppc/750", | ||
752 | .oprofile_type = PPC_OPROFILE_G4, | ||
744 | }, | 753 | }, |
745 | { /* 750FX (All revs except 2.0) */ | 754 | { /* 750FX (All revs except 2.0) */ |
746 | .pvr_mask = 0xffff0000, | 755 | .pvr_mask = 0xffff0000, |
@@ -756,6 +765,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
756 | .cpu_setup = __setup_cpu_750fx, | 765 | .cpu_setup = __setup_cpu_750fx, |
757 | .machine_check = machine_check_generic, | 766 | .machine_check = machine_check_generic, |
758 | .platform = "ppc750", | 767 | .platform = "ppc750", |
768 | .oprofile_cpu_type = "ppc/750", | ||
769 | .oprofile_type = PPC_OPROFILE_G4, | ||
759 | }, | 770 | }, |
760 | { /* 750GX */ | 771 | { /* 750GX */ |
761 | .pvr_mask = 0xffff0000, | 772 | .pvr_mask = 0xffff0000, |
@@ -771,6 +782,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
771 | .cpu_setup = __setup_cpu_750fx, | 782 | .cpu_setup = __setup_cpu_750fx, |
772 | .machine_check = machine_check_generic, | 783 | .machine_check = machine_check_generic, |
773 | .platform = "ppc750", | 784 | .platform = "ppc750", |
785 | .oprofile_cpu_type = "ppc/750", | ||
786 | .oprofile_type = PPC_OPROFILE_G4, | ||
774 | }, | 787 | }, |
775 | { /* 740/750 (L2CR bit need fixup for 740) */ | 788 | { /* 740/750 (L2CR bit need fixup for 740) */ |
776 | .pvr_mask = 0xffff0000, | 789 | .pvr_mask = 0xffff0000, |
@@ -1077,7 +1090,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1077 | .cpu_name = "e300c2", | 1090 | .cpu_name = "e300c2", |
1078 | .cpu_features = CPU_FTRS_E300C2, | 1091 | .cpu_features = CPU_FTRS_E300C2, |
1079 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, | 1092 | .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, |
1080 | .mmu_features = MMU_FTR_USE_HIGH_BATS, | 1093 | .mmu_features = MMU_FTR_USE_HIGH_BATS | |
1094 | MMU_FTR_NEED_DTLB_SW_LRU, | ||
1081 | .icache_bsize = 32, | 1095 | .icache_bsize = 32, |
1082 | .dcache_bsize = 32, | 1096 | .dcache_bsize = 32, |
1083 | .cpu_setup = __setup_cpu_603, | 1097 | .cpu_setup = __setup_cpu_603, |
@@ -1090,7 +1104,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1090 | .cpu_name = "e300c3", | 1104 | .cpu_name = "e300c3", |
1091 | .cpu_features = CPU_FTRS_E300, | 1105 | .cpu_features = CPU_FTRS_E300, |
1092 | .cpu_user_features = COMMON_USER, | 1106 | .cpu_user_features = COMMON_USER, |
1093 | .mmu_features = MMU_FTR_USE_HIGH_BATS, | 1107 | .mmu_features = MMU_FTR_USE_HIGH_BATS | |
1108 | MMU_FTR_NEED_DTLB_SW_LRU, | ||
1094 | .icache_bsize = 32, | 1109 | .icache_bsize = 32, |
1095 | .dcache_bsize = 32, | 1110 | .dcache_bsize = 32, |
1096 | .cpu_setup = __setup_cpu_603, | 1111 | .cpu_setup = __setup_cpu_603, |
@@ -1105,7 +1120,8 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1105 | .cpu_name = "e300c4", | 1120 | .cpu_name = "e300c4", |
1106 | .cpu_features = CPU_FTRS_E300, | 1121 | .cpu_features = CPU_FTRS_E300, |
1107 | .cpu_user_features = COMMON_USER, | 1122 | .cpu_user_features = COMMON_USER, |
1108 | .mmu_features = MMU_FTR_USE_HIGH_BATS, | 1123 | .mmu_features = MMU_FTR_USE_HIGH_BATS | |
1124 | MMU_FTR_NEED_DTLB_SW_LRU, | ||
1109 | .icache_bsize = 32, | 1125 | .icache_bsize = 32, |
1110 | .dcache_bsize = 32, | 1126 | .dcache_bsize = 32, |
1111 | .cpu_setup = __setup_cpu_603, | 1127 | .cpu_setup = __setup_cpu_603, |
@@ -1634,6 +1650,19 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1634 | .machine_check = machine_check_440A, | 1650 | .machine_check = machine_check_440A, |
1635 | .platform = "ppc440", | 1651 | .platform = "ppc440", |
1636 | }, | 1652 | }, |
1653 | { /* 460SX */ | ||
1654 | .pvr_mask = 0xffffff00, | ||
1655 | .pvr_value = 0x13541800, | ||
1656 | .cpu_name = "460SX", | ||
1657 | .cpu_features = CPU_FTRS_44X, | ||
1658 | .cpu_user_features = COMMON_USER_BOOKE, | ||
1659 | .mmu_features = MMU_FTR_TYPE_44x, | ||
1660 | .icache_bsize = 32, | ||
1661 | .dcache_bsize = 32, | ||
1662 | .cpu_setup = __setup_cpu_460sx, | ||
1663 | .machine_check = machine_check_440A, | ||
1664 | .platform = "ppc440", | ||
1665 | }, | ||
1637 | { /* default match */ | 1666 | { /* default match */ |
1638 | .pvr_mask = 0x00000000, | 1667 | .pvr_mask = 0x00000000, |
1639 | .pvr_value = 0x00000000, | 1668 | .pvr_value = 0x00000000, |
@@ -1687,6 +1716,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1687 | PPC_FEATURE_UNIFIED_CACHE, | 1716 | PPC_FEATURE_UNIFIED_CACHE, |
1688 | .mmu_features = MMU_FTR_TYPE_FSL_E, | 1717 | .mmu_features = MMU_FTR_TYPE_FSL_E, |
1689 | .dcache_bsize = 32, | 1718 | .dcache_bsize = 32, |
1719 | .cpu_setup = __setup_cpu_e200, | ||
1690 | .machine_check = machine_check_e200, | 1720 | .machine_check = machine_check_e200, |
1691 | .platform = "ppc5554", | 1721 | .platform = "ppc5554", |
1692 | } | 1722 | } |
@@ -1706,6 +1736,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1706 | .num_pmcs = 4, | 1736 | .num_pmcs = 4, |
1707 | .oprofile_cpu_type = "ppc/e500", | 1737 | .oprofile_cpu_type = "ppc/e500", |
1708 | .oprofile_type = PPC_OPROFILE_FSL_EMB, | 1738 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
1739 | .cpu_setup = __setup_cpu_e500v1, | ||
1709 | .machine_check = machine_check_e500, | 1740 | .machine_check = machine_check_e500, |
1710 | .platform = "ppc8540", | 1741 | .platform = "ppc8540", |
1711 | }, | 1742 | }, |
@@ -1724,6 +1755,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1724 | .num_pmcs = 4, | 1755 | .num_pmcs = 4, |
1725 | .oprofile_cpu_type = "ppc/e500", | 1756 | .oprofile_cpu_type = "ppc/e500", |
1726 | .oprofile_type = PPC_OPROFILE_FSL_EMB, | 1757 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
1758 | .cpu_setup = __setup_cpu_e500v2, | ||
1727 | .machine_check = machine_check_e500, | 1759 | .machine_check = machine_check_e500, |
1728 | .platform = "ppc8548", | 1760 | .platform = "ppc8548", |
1729 | }, | 1761 | }, |
@@ -1733,12 +1765,14 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1733 | .cpu_name = "e500mc", | 1765 | .cpu_name = "e500mc", |
1734 | .cpu_features = CPU_FTRS_E500MC, | 1766 | .cpu_features = CPU_FTRS_E500MC, |
1735 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, | 1767 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
1736 | .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, | 1768 | .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | |
1769 | MMU_FTR_USE_TLBILX, | ||
1737 | .icache_bsize = 64, | 1770 | .icache_bsize = 64, |
1738 | .dcache_bsize = 64, | 1771 | .dcache_bsize = 64, |
1739 | .num_pmcs = 4, | 1772 | .num_pmcs = 4, |
1740 | .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ | 1773 | .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ |
1741 | .oprofile_type = PPC_OPROFILE_FSL_EMB, | 1774 | .oprofile_type = PPC_OPROFILE_FSL_EMB, |
1775 | .cpu_setup = __setup_cpu_e500mc, | ||
1742 | .machine_check = machine_check_e500, | 1776 | .machine_check = machine_check_e500, |
1743 | .platform = "ppce500mc", | 1777 | .platform = "ppce500mc", |
1744 | }, | 1778 | }, |
@@ -1762,74 +1796,84 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1762 | 1796 | ||
1763 | static struct cpu_spec the_cpu_spec; | 1797 | static struct cpu_spec the_cpu_spec; |
1764 | 1798 | ||
1765 | struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) | 1799 | static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s) |
1766 | { | 1800 | { |
1767 | struct cpu_spec *s = cpu_specs; | ||
1768 | struct cpu_spec *t = &the_cpu_spec; | 1801 | struct cpu_spec *t = &the_cpu_spec; |
1769 | int i; | 1802 | struct cpu_spec old; |
1770 | 1803 | ||
1771 | s = PTRRELOC(s); | ||
1772 | t = PTRRELOC(t); | 1804 | t = PTRRELOC(t); |
1805 | old = *t; | ||
1773 | 1806 | ||
1774 | for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) | 1807 | /* Copy everything, then do fixups */ |
1775 | if ((pvr & s->pvr_mask) == s->pvr_value) { | 1808 | *t = *s; |
1776 | /* | 1809 | |
1777 | * If we are overriding a previous value derived | 1810 | /* |
1778 | * from the real PVR with a new value obtained | 1811 | * If we are overriding a previous value derived from the real |
1779 | * using a logical PVR value, don't modify the | 1812 | * PVR with a new value obtained using a logical PVR value, |
1780 | * performance monitor fields. | 1813 | * don't modify the performance monitor fields. |
1781 | */ | 1814 | */ |
1782 | if (t->num_pmcs && !s->num_pmcs) { | 1815 | if (old.num_pmcs && !s->num_pmcs) { |
1783 | t->cpu_name = s->cpu_name; | 1816 | t->num_pmcs = old.num_pmcs; |
1784 | t->cpu_features = s->cpu_features; | 1817 | t->pmc_type = old.pmc_type; |
1785 | t->cpu_user_features = s->cpu_user_features; | 1818 | t->oprofile_type = old.oprofile_type; |
1786 | t->icache_bsize = s->icache_bsize; | 1819 | t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv; |
1787 | t->dcache_bsize = s->dcache_bsize; | 1820 | t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr; |
1788 | t->cpu_setup = s->cpu_setup; | 1821 | t->oprofile_mmcra_clear = old.oprofile_mmcra_clear; |
1789 | t->cpu_restore = s->cpu_restore; | 1822 | |
1790 | t->platform = s->platform; | 1823 | /* |
1791 | /* | 1824 | * If we have passed through this logic once before and |
1792 | * If we have passed through this logic once | 1825 | * have pulled the default case because the real PVR was |
1793 | * before and have pulled the default case | 1826 | * not found inside cpu_specs[], then we are possibly |
1794 | * because the real PVR was not found inside | 1827 | * running in compatibility mode. In that case, let the |
1795 | * cpu_specs[], then we are possibly running in | 1828 | * oprofiler know which set of compatibility counters to |
1796 | * compatibility mode. In that case, let the | 1829 | * pull from by making sure the oprofile_cpu_type string |
1797 | * oprofiler know which set of compatibility | 1830 | * is set to that of compatibility mode. If the |
1798 | * counters to pull from by making sure the | 1831 | * oprofile_cpu_type already has a value, then we are |
1799 | * oprofile_cpu_type string is set to that of | 1832 | * possibly overriding a real PVR with a logical one, |
1800 | * compatibility mode. If the oprofile_cpu_type | 1833 | * and, in that case, keep the current value for |
1801 | * already has a value, then we are possibly | 1834 | * oprofile_cpu_type. |
1802 | * overriding a real PVR with a logical one, and, | 1835 | */ |
1803 | * in that case, keep the current value for | 1836 | if (old.oprofile_cpu_type == NULL) |
1804 | * oprofile_cpu_type. | 1837 | t->oprofile_cpu_type = s->oprofile_cpu_type; |
1805 | */ | 1838 | } |
1806 | if (t->oprofile_cpu_type == NULL) | ||
1807 | t->oprofile_cpu_type = s->oprofile_cpu_type; | ||
1808 | } else | ||
1809 | *t = *s; | ||
1810 | *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; | ||
1811 | 1839 | ||
1812 | /* | 1840 | *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; |
1813 | * Set the base platform string once; assumes | 1841 | |
1814 | * we're called with real pvr first. | 1842 | /* |
1815 | */ | 1843 | * Set the base platform string once; assumes |
1816 | if (*PTRRELOC(&powerpc_base_platform) == NULL) | 1844 | * we're called with real pvr first. |
1817 | *PTRRELOC(&powerpc_base_platform) = t->platform; | 1845 | */ |
1846 | if (*PTRRELOC(&powerpc_base_platform) == NULL) | ||
1847 | *PTRRELOC(&powerpc_base_platform) = t->platform; | ||
1818 | 1848 | ||
1819 | #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) | 1849 | #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) |
1820 | /* ppc64 and booke expect identify_cpu to also call | 1850 | /* ppc64 and booke expect identify_cpu to also call setup_cpu for |
1821 | * setup_cpu for that processor. I will consolidate | 1851 | * that processor. I will consolidate that at a later time, for now, |
1822 | * that at a later time, for now, just use #ifdef. | 1852 | * just use #ifdef. We also don't need to PTRRELOC the function |
1823 | * we also don't need to PTRRELOC the function pointer | 1853 | * pointer on ppc64 and booke as we are running at 0 in real mode |
1824 | * on ppc64 and booke as we are running at 0 in real | 1854 | * on ppc64 and reloc_offset is always 0 on booke. |
1825 | * mode on ppc64 and reloc_offset is always 0 on booke. | 1855 | */ |
1826 | */ | 1856 | if (s->cpu_setup) { |
1827 | if (s->cpu_setup) { | 1857 | s->cpu_setup(offset, s); |
1828 | s->cpu_setup(offset, s); | 1858 | } |
1829 | } | ||
1830 | #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ | 1859 | #endif /* CONFIG_PPC64 || CONFIG_BOOKE */ |
1860 | } | ||
1861 | |||
1862 | struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) | ||
1863 | { | ||
1864 | struct cpu_spec *s = cpu_specs; | ||
1865 | int i; | ||
1866 | |||
1867 | s = PTRRELOC(s); | ||
1868 | |||
1869 | for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { | ||
1870 | if ((pvr & s->pvr_mask) == s->pvr_value) { | ||
1871 | setup_cpu_spec(offset, s); | ||
1831 | return s; | 1872 | return s; |
1832 | } | 1873 | } |
1874 | } | ||
1875 | |||
1833 | BUG(); | 1876 | BUG(); |
1877 | |||
1834 | return NULL; | 1878 | return NULL; |
1835 | } | 1879 | } |
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c index 19671aca6591..5fb667a60894 100644 --- a/arch/powerpc/kernel/crash_dump.c +++ b/arch/powerpc/kernel/crash_dump.c | |||
@@ -48,7 +48,7 @@ static void __init create_trampoline(unsigned long addr) | |||
48 | * branch to "addr" we jump to ("addr" + 32 MB). Although it requires | 48 | * branch to "addr" we jump to ("addr" + 32 MB). Although it requires |
49 | * two instructions it doesn't require any registers. | 49 | * two instructions it doesn't require any registers. |
50 | */ | 50 | */ |
51 | patch_instruction(p, PPC_NOP_INSTR); | 51 | patch_instruction(p, PPC_INST_NOP); |
52 | patch_branch(++p, addr + PHYSICAL_START, 0); | 52 | patch_branch(++p, addr + PHYSICAL_START, 0); |
53 | } | 53 | } |
54 | 54 | ||
diff --git a/arch/powerpc/kernel/dbell.c b/arch/powerpc/kernel/dbell.c new file mode 100644 index 000000000000..1493734cd871 --- /dev/null +++ b/arch/powerpc/kernel/dbell.c | |||
@@ -0,0 +1,44 @@ | |||
1 | /* | ||
2 | * Author: Kumar Gala <galak@kernel.crashing.org> | ||
3 | * | ||
4 | * Copyright 2009 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/stddef.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/smp.h> | ||
15 | #include <linux/threads.h> | ||
16 | |||
17 | #include <asm/dbell.h> | ||
18 | |||
19 | #ifdef CONFIG_SMP | ||
20 | unsigned long dbell_smp_message[NR_CPUS]; | ||
21 | |||
22 | void smp_dbell_message_pass(int target, int msg) | ||
23 | { | ||
24 | int i; | ||
25 | |||
26 | if(target < NR_CPUS) { | ||
27 | set_bit(msg, &dbell_smp_message[target]); | ||
28 | ppc_msgsnd(PPC_DBELL, 0, target); | ||
29 | } | ||
30 | else if(target == MSG_ALL_BUT_SELF) { | ||
31 | for_each_online_cpu(i) { | ||
32 | if (i == smp_processor_id()) | ||
33 | continue; | ||
34 | set_bit(msg, &dbell_smp_message[i]); | ||
35 | ppc_msgsnd(PPC_DBELL, 0, i); | ||
36 | } | ||
37 | } | ||
38 | else { /* target == MSG_ALL */ | ||
39 | for_each_online_cpu(i) | ||
40 | set_bit(msg, &dbell_smp_message[i]); | ||
41 | ppc_msgsnd(PPC_DBELL, PPC_DBELL_MSG_BRDCAST, 0); | ||
42 | } | ||
43 | } | ||
44 | #endif | ||
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index 6f7eb7e00c79..4dd38f129153 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S | |||
@@ -63,7 +63,7 @@ debug_transfer_to_handler: | |||
63 | 63 | ||
64 | .globl crit_transfer_to_handler | 64 | .globl crit_transfer_to_handler |
65 | crit_transfer_to_handler: | 65 | crit_transfer_to_handler: |
66 | #ifdef CONFIG_FSL_BOOKE | 66 | #ifdef CONFIG_PPC_BOOK3E_MMU |
67 | mfspr r0,SPRN_MAS0 | 67 | mfspr r0,SPRN_MAS0 |
68 | stw r0,MAS0(r11) | 68 | stw r0,MAS0(r11) |
69 | mfspr r0,SPRN_MAS1 | 69 | mfspr r0,SPRN_MAS1 |
@@ -78,7 +78,7 @@ crit_transfer_to_handler: | |||
78 | mfspr r0,SPRN_MAS7 | 78 | mfspr r0,SPRN_MAS7 |
79 | stw r0,MAS7(r11) | 79 | stw r0,MAS7(r11) |
80 | #endif /* CONFIG_PHYS_64BIT */ | 80 | #endif /* CONFIG_PHYS_64BIT */ |
81 | #endif /* CONFIG_FSL_BOOKE */ | 81 | #endif /* CONFIG_PPC_BOOK3E_MMU */ |
82 | #ifdef CONFIG_44x | 82 | #ifdef CONFIG_44x |
83 | mfspr r0,SPRN_MMUCR | 83 | mfspr r0,SPRN_MMUCR |
84 | stw r0,MMUCR(r11) | 84 | stw r0,MMUCR(r11) |
@@ -914,7 +914,7 @@ exc_exit_restart_end: | |||
914 | mtspr SPRN_##exc_lvl_srr0,r9; \ | 914 | mtspr SPRN_##exc_lvl_srr0,r9; \ |
915 | mtspr SPRN_##exc_lvl_srr1,r10; | 915 | mtspr SPRN_##exc_lvl_srr1,r10; |
916 | 916 | ||
917 | #if defined(CONFIG_FSL_BOOKE) | 917 | #if defined(CONFIG_PPC_BOOK3E_MMU) |
918 | #ifdef CONFIG_PHYS_64BIT | 918 | #ifdef CONFIG_PHYS_64BIT |
919 | #define RESTORE_MAS7 \ | 919 | #define RESTORE_MAS7 \ |
920 | lwz r11,MAS7(r1); \ | 920 | lwz r11,MAS7(r1); \ |
@@ -956,7 +956,7 @@ ret_from_crit_exc: | |||
956 | lwz r10,crit_srr1@l(r10); | 956 | lwz r10,crit_srr1@l(r10); |
957 | mtspr SPRN_SRR0,r9; | 957 | mtspr SPRN_SRR0,r9; |
958 | mtspr SPRN_SRR1,r10; | 958 | mtspr SPRN_SRR1,r10; |
959 | RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) | 959 | RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, PPC_RFCI) |
960 | #endif /* CONFIG_40x */ | 960 | #endif /* CONFIG_40x */ |
961 | 961 | ||
962 | #ifdef CONFIG_BOOKE | 962 | #ifdef CONFIG_BOOKE |
@@ -967,7 +967,7 @@ ret_from_crit_exc: | |||
967 | stw r10,KSP_LIMIT(r9) | 967 | stw r10,KSP_LIMIT(r9) |
968 | RESTORE_xSRR(SRR0,SRR1); | 968 | RESTORE_xSRR(SRR0,SRR1); |
969 | RESTORE_MMU_REGS; | 969 | RESTORE_MMU_REGS; |
970 | RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) | 970 | RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, PPC_RFCI) |
971 | 971 | ||
972 | .globl ret_from_debug_exc | 972 | .globl ret_from_debug_exc |
973 | ret_from_debug_exc: | 973 | ret_from_debug_exc: |
@@ -981,7 +981,7 @@ ret_from_debug_exc: | |||
981 | RESTORE_xSRR(SRR0,SRR1); | 981 | RESTORE_xSRR(SRR0,SRR1); |
982 | RESTORE_xSRR(CSRR0,CSRR1); | 982 | RESTORE_xSRR(CSRR0,CSRR1); |
983 | RESTORE_MMU_REGS; | 983 | RESTORE_MMU_REGS; |
984 | RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI) | 984 | RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, PPC_RFDI) |
985 | 985 | ||
986 | .globl ret_from_mcheck_exc | 986 | .globl ret_from_mcheck_exc |
987 | ret_from_mcheck_exc: | 987 | ret_from_mcheck_exc: |
@@ -992,7 +992,7 @@ ret_from_mcheck_exc: | |||
992 | RESTORE_xSRR(CSRR0,CSRR1); | 992 | RESTORE_xSRR(CSRR0,CSRR1); |
993 | RESTORE_xSRR(DSRR0,DSRR1); | 993 | RESTORE_xSRR(DSRR0,DSRR1); |
994 | RESTORE_MMU_REGS; | 994 | RESTORE_MMU_REGS; |
995 | RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI) | 995 | RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, PPC_RFMCI) |
996 | #endif /* CONFIG_BOOKE */ | 996 | #endif /* CONFIG_BOOKE */ |
997 | 997 | ||
998 | /* | 998 | /* |
@@ -1176,59 +1176,27 @@ _GLOBAL(_mcount) | |||
1176 | bctr | 1176 | bctr |
1177 | 1177 | ||
1178 | _GLOBAL(ftrace_caller) | 1178 | _GLOBAL(ftrace_caller) |
1179 | /* Based off of objdump optput from glibc */ | 1179 | MCOUNT_SAVE_FRAME |
1180 | stwu r1,-48(r1) | 1180 | /* r3 ends up with link register */ |
1181 | stw r3, 12(r1) | ||
1182 | stw r4, 16(r1) | ||
1183 | stw r5, 20(r1) | ||
1184 | stw r6, 24(r1) | ||
1185 | mflr r3 | ||
1186 | lwz r4, 52(r1) | ||
1187 | mfcr r5 | ||
1188 | stw r7, 28(r1) | ||
1189 | stw r8, 32(r1) | ||
1190 | stw r9, 36(r1) | ||
1191 | stw r10,40(r1) | ||
1192 | stw r3, 44(r1) | ||
1193 | stw r5, 8(r1) | ||
1194 | subi r3, r3, MCOUNT_INSN_SIZE | 1181 | subi r3, r3, MCOUNT_INSN_SIZE |
1195 | .globl ftrace_call | 1182 | .globl ftrace_call |
1196 | ftrace_call: | 1183 | ftrace_call: |
1197 | bl ftrace_stub | 1184 | bl ftrace_stub |
1198 | nop | 1185 | nop |
1199 | lwz r6, 8(r1) | 1186 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
1200 | lwz r0, 44(r1) | 1187 | .globl ftrace_graph_call |
1201 | lwz r3, 12(r1) | 1188 | ftrace_graph_call: |
1202 | mtctr r0 | 1189 | b ftrace_graph_stub |
1203 | lwz r4, 16(r1) | 1190 | _GLOBAL(ftrace_graph_stub) |
1204 | mtcr r6 | 1191 | #endif |
1205 | lwz r5, 20(r1) | 1192 | MCOUNT_RESTORE_FRAME |
1206 | lwz r6, 24(r1) | 1193 | /* old link register ends up in ctr reg */ |
1207 | lwz r0, 52(r1) | ||
1208 | lwz r7, 28(r1) | ||
1209 | lwz r8, 32(r1) | ||
1210 | mtlr r0 | ||
1211 | lwz r9, 36(r1) | ||
1212 | lwz r10,40(r1) | ||
1213 | addi r1, r1, 48 | ||
1214 | bctr | 1194 | bctr |
1215 | #else | 1195 | #else |
1216 | _GLOBAL(mcount) | 1196 | _GLOBAL(mcount) |
1217 | _GLOBAL(_mcount) | 1197 | _GLOBAL(_mcount) |
1218 | stwu r1,-48(r1) | 1198 | |
1219 | stw r3, 12(r1) | 1199 | MCOUNT_SAVE_FRAME |
1220 | stw r4, 16(r1) | ||
1221 | stw r5, 20(r1) | ||
1222 | stw r6, 24(r1) | ||
1223 | mflr r3 | ||
1224 | lwz r4, 52(r1) | ||
1225 | mfcr r5 | ||
1226 | stw r7, 28(r1) | ||
1227 | stw r8, 32(r1) | ||
1228 | stw r9, 36(r1) | ||
1229 | stw r10,40(r1) | ||
1230 | stw r3, 44(r1) | ||
1231 | stw r5, 8(r1) | ||
1232 | 1200 | ||
1233 | subi r3, r3, MCOUNT_INSN_SIZE | 1201 | subi r3, r3, MCOUNT_INSN_SIZE |
1234 | LOAD_REG_ADDR(r5, ftrace_trace_function) | 1202 | LOAD_REG_ADDR(r5, ftrace_trace_function) |
@@ -1236,28 +1204,55 @@ _GLOBAL(_mcount) | |||
1236 | 1204 | ||
1237 | mtctr r5 | 1205 | mtctr r5 |
1238 | bctrl | 1206 | bctrl |
1239 | |||
1240 | nop | 1207 | nop |
1241 | 1208 | ||
1242 | lwz r6, 8(r1) | 1209 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
1243 | lwz r0, 44(r1) | 1210 | b ftrace_graph_caller |
1244 | lwz r3, 12(r1) | 1211 | #endif |
1245 | mtctr r0 | 1212 | MCOUNT_RESTORE_FRAME |
1246 | lwz r4, 16(r1) | ||
1247 | mtcr r6 | ||
1248 | lwz r5, 20(r1) | ||
1249 | lwz r6, 24(r1) | ||
1250 | lwz r0, 52(r1) | ||
1251 | lwz r7, 28(r1) | ||
1252 | lwz r8, 32(r1) | ||
1253 | mtlr r0 | ||
1254 | lwz r9, 36(r1) | ||
1255 | lwz r10,40(r1) | ||
1256 | addi r1, r1, 48 | ||
1257 | bctr | 1213 | bctr |
1258 | #endif | 1214 | #endif |
1259 | 1215 | ||
1260 | _GLOBAL(ftrace_stub) | 1216 | _GLOBAL(ftrace_stub) |
1261 | blr | 1217 | blr |
1262 | 1218 | ||
1219 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
1220 | _GLOBAL(ftrace_graph_caller) | ||
1221 | /* load r4 with local address */ | ||
1222 | lwz r4, 44(r1) | ||
1223 | subi r4, r4, MCOUNT_INSN_SIZE | ||
1224 | |||
1225 | /* get the parent address */ | ||
1226 | addi r3, r1, 52 | ||
1227 | |||
1228 | bl prepare_ftrace_return | ||
1229 | nop | ||
1230 | |||
1231 | MCOUNT_RESTORE_FRAME | ||
1232 | /* old link register ends up in ctr reg */ | ||
1233 | bctr | ||
1234 | |||
1235 | _GLOBAL(return_to_handler) | ||
1236 | /* need to save return values */ | ||
1237 | stwu r1, -32(r1) | ||
1238 | stw r3, 20(r1) | ||
1239 | stw r4, 16(r1) | ||
1240 | stw r31, 12(r1) | ||
1241 | mr r31, r1 | ||
1242 | |||
1243 | bl ftrace_return_to_handler | ||
1244 | nop | ||
1245 | |||
1246 | /* return value has real return address */ | ||
1247 | mtlr r3 | ||
1248 | |||
1249 | lwz r3, 20(r1) | ||
1250 | lwz r4, 16(r1) | ||
1251 | lwz r31,12(r1) | ||
1252 | lwz r1, 0(r1) | ||
1253 | |||
1254 | /* Jump back to real return address */ | ||
1255 | blr | ||
1256 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | ||
1257 | |||
1263 | #endif /* CONFIG_MCOUNT */ | 1258 | #endif /* CONFIG_MCOUNT */ |
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 383ed6eb0085..abfc32330479 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S | |||
@@ -908,6 +908,12 @@ _GLOBAL(ftrace_caller) | |||
908 | ftrace_call: | 908 | ftrace_call: |
909 | bl ftrace_stub | 909 | bl ftrace_stub |
910 | nop | 910 | nop |
911 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
912 | .globl ftrace_graph_call | ||
913 | ftrace_graph_call: | ||
914 | b ftrace_graph_stub | ||
915 | _GLOBAL(ftrace_graph_stub) | ||
916 | #endif | ||
911 | ld r0, 128(r1) | 917 | ld r0, 128(r1) |
912 | mtlr r0 | 918 | mtlr r0 |
913 | addi r1, r1, 112 | 919 | addi r1, r1, 112 |
@@ -931,13 +937,90 @@ _GLOBAL(_mcount) | |||
931 | ld r5,0(r5) | 937 | ld r5,0(r5) |
932 | mtctr r5 | 938 | mtctr r5 |
933 | bctrl | 939 | bctrl |
934 | |||
935 | nop | 940 | nop |
941 | |||
942 | |||
943 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
944 | b ftrace_graph_caller | ||
945 | #endif | ||
936 | ld r0, 128(r1) | 946 | ld r0, 128(r1) |
937 | mtlr r0 | 947 | mtlr r0 |
938 | addi r1, r1, 112 | 948 | addi r1, r1, 112 |
939 | _GLOBAL(ftrace_stub) | 949 | _GLOBAL(ftrace_stub) |
940 | blr | 950 | blr |
941 | 951 | ||
942 | #endif | 952 | #endif /* CONFIG_DYNAMIC_FTRACE */ |
943 | #endif | 953 | |
954 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
955 | _GLOBAL(ftrace_graph_caller) | ||
956 | /* load r4 with local address */ | ||
957 | ld r4, 128(r1) | ||
958 | subi r4, r4, MCOUNT_INSN_SIZE | ||
959 | |||
960 | /* get the parent address */ | ||
961 | ld r11, 112(r1) | ||
962 | addi r3, r11, 16 | ||
963 | |||
964 | bl .prepare_ftrace_return | ||
965 | nop | ||
966 | |||
967 | ld r0, 128(r1) | ||
968 | mtlr r0 | ||
969 | addi r1, r1, 112 | ||
970 | blr | ||
971 | |||
972 | _GLOBAL(return_to_handler) | ||
973 | /* need to save return values */ | ||
974 | std r4, -24(r1) | ||
975 | std r3, -16(r1) | ||
976 | std r31, -8(r1) | ||
977 | mr r31, r1 | ||
978 | stdu r1, -112(r1) | ||
979 | |||
980 | bl .ftrace_return_to_handler | ||
981 | nop | ||
982 | |||
983 | /* return value has real return address */ | ||
984 | mtlr r3 | ||
985 | |||
986 | ld r1, 0(r1) | ||
987 | ld r4, -24(r1) | ||
988 | ld r3, -16(r1) | ||
989 | ld r31, -8(r1) | ||
990 | |||
991 | /* Jump back to real return address */ | ||
992 | blr | ||
993 | |||
994 | _GLOBAL(mod_return_to_handler) | ||
995 | /* need to save return values */ | ||
996 | std r4, -32(r1) | ||
997 | std r3, -24(r1) | ||
998 | /* save TOC */ | ||
999 | std r2, -16(r1) | ||
1000 | std r31, -8(r1) | ||
1001 | mr r31, r1 | ||
1002 | stdu r1, -112(r1) | ||
1003 | |||
1004 | /* | ||
1005 | * We are in a module using the module's TOC. | ||
1006 | * Switch to our TOC to run inside the core kernel. | ||
1007 | */ | ||
1008 | LOAD_REG_IMMEDIATE(r4,ftrace_return_to_handler) | ||
1009 | ld r2, 8(r4) | ||
1010 | |||
1011 | bl .ftrace_return_to_handler | ||
1012 | nop | ||
1013 | |||
1014 | /* return value has real return address */ | ||
1015 | mtlr r3 | ||
1016 | |||
1017 | ld r1, 0(r1) | ||
1018 | ld r4, -32(r1) | ||
1019 | ld r3, -24(r1) | ||
1020 | ld r2, -16(r1) | ||
1021 | ld r31, -8(r1) | ||
1022 | |||
1023 | /* Jump back to real return address */ | ||
1024 | blr | ||
1025 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | ||
1026 | #endif /* CONFIG_FUNCTION_TRACER */ | ||
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c index 60c60ccf5e3c..5b5d16b2cac8 100644 --- a/arch/powerpc/kernel/ftrace.c +++ b/arch/powerpc/kernel/ftrace.c | |||
@@ -5,6 +5,9 @@ | |||
5 | * | 5 | * |
6 | * Thanks goes out to P.A. Semi, Inc for supplying me with a PPC64 box. | 6 | * Thanks goes out to P.A. Semi, Inc for supplying me with a PPC64 box. |
7 | * | 7 | * |
8 | * Added function graph tracer code, taken from x86 that was written | ||
9 | * by Frederic Weisbecker, and ported to PPC by Steven Rostedt. | ||
10 | * | ||
8 | */ | 11 | */ |
9 | 12 | ||
10 | #include <linux/spinlock.h> | 13 | #include <linux/spinlock.h> |
@@ -20,14 +23,6 @@ | |||
20 | #include <asm/code-patching.h> | 23 | #include <asm/code-patching.h> |
21 | #include <asm/ftrace.h> | 24 | #include <asm/ftrace.h> |
22 | 25 | ||
23 | #if 0 | ||
24 | #define DEBUGP printk | ||
25 | #else | ||
26 | #define DEBUGP(fmt , ...) do { } while (0) | ||
27 | #endif | ||
28 | |||
29 | static unsigned int ftrace_nop = PPC_NOP_INSTR; | ||
30 | |||
31 | #ifdef CONFIG_PPC32 | 26 | #ifdef CONFIG_PPC32 |
32 | # define GET_ADDR(addr) addr | 27 | # define GET_ADDR(addr) addr |
33 | #else | 28 | #else |
@@ -35,37 +30,23 @@ static unsigned int ftrace_nop = PPC_NOP_INSTR; | |||
35 | # define GET_ADDR(addr) (*(unsigned long *)addr) | 30 | # define GET_ADDR(addr) (*(unsigned long *)addr) |
36 | #endif | 31 | #endif |
37 | 32 | ||
38 | 33 | #ifdef CONFIG_DYNAMIC_FTRACE | |
39 | static unsigned int ftrace_calc_offset(long ip, long addr) | 34 | static unsigned int ftrace_nop_replace(void) |
40 | { | 35 | { |
41 | return (int)(addr - ip); | 36 | return PPC_INST_NOP; |
42 | } | 37 | } |
43 | 38 | ||
44 | static unsigned char *ftrace_nop_replace(void) | 39 | static unsigned int |
40 | ftrace_call_replace(unsigned long ip, unsigned long addr, int link) | ||
45 | { | 41 | { |
46 | return (char *)&ftrace_nop; | 42 | unsigned int op; |
47 | } | ||
48 | |||
49 | static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr) | ||
50 | { | ||
51 | static unsigned int op; | ||
52 | 43 | ||
53 | /* | ||
54 | * It would be nice to just use create_function_call, but that will | ||
55 | * update the code itself. Here we need to just return the | ||
56 | * instruction that is going to be modified, without modifying the | ||
57 | * code. | ||
58 | */ | ||
59 | addr = GET_ADDR(addr); | 44 | addr = GET_ADDR(addr); |
60 | 45 | ||
61 | /* Set to "bl addr" */ | 46 | /* if (link) set op to 'bl' else 'b' */ |
62 | op = 0x48000001 | (ftrace_calc_offset(ip, addr) & 0x03fffffc); | 47 | op = create_branch((unsigned int *)ip, addr, link ? 1 : 0); |
63 | 48 | ||
64 | /* | 49 | return op; |
65 | * No locking needed, this must be called via kstop_machine | ||
66 | * which in essence is like running on a uniprocessor machine. | ||
67 | */ | ||
68 | return (unsigned char *)&op; | ||
69 | } | 50 | } |
70 | 51 | ||
71 | #ifdef CONFIG_PPC64 | 52 | #ifdef CONFIG_PPC64 |
@@ -77,10 +58,9 @@ static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr) | |||
77 | #endif | 58 | #endif |
78 | 59 | ||
79 | static int | 60 | static int |
80 | ftrace_modify_code(unsigned long ip, unsigned char *old_code, | 61 | ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new) |
81 | unsigned char *new_code) | ||
82 | { | 62 | { |
83 | unsigned char replaced[MCOUNT_INSN_SIZE]; | 63 | unsigned int replaced; |
84 | 64 | ||
85 | /* | 65 | /* |
86 | * Note: Due to modules and __init, code can | 66 | * Note: Due to modules and __init, code can |
@@ -93,15 +73,15 @@ ftrace_modify_code(unsigned long ip, unsigned char *old_code, | |||
93 | */ | 73 | */ |
94 | 74 | ||
95 | /* read the text we want to modify */ | 75 | /* read the text we want to modify */ |
96 | if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE)) | 76 | if (probe_kernel_read(&replaced, (void *)ip, MCOUNT_INSN_SIZE)) |
97 | return -EFAULT; | 77 | return -EFAULT; |
98 | 78 | ||
99 | /* Make sure it is what we expect it to be */ | 79 | /* Make sure it is what we expect it to be */ |
100 | if (memcmp(replaced, old_code, MCOUNT_INSN_SIZE) != 0) | 80 | if (replaced != old) |
101 | return -EINVAL; | 81 | return -EINVAL; |
102 | 82 | ||
103 | /* replace the text with the new text */ | 83 | /* replace the text with the new text */ |
104 | if (probe_kernel_write((void *)ip, new_code, MCOUNT_INSN_SIZE)) | 84 | if (probe_kernel_write((void *)ip, &new, MCOUNT_INSN_SIZE)) |
105 | return -EPERM; | 85 | return -EPERM; |
106 | 86 | ||
107 | flush_icache_range(ip, ip + 8); | 87 | flush_icache_range(ip, ip + 8); |
@@ -119,6 +99,8 @@ static int test_24bit_addr(unsigned long ip, unsigned long addr) | |||
119 | return create_branch((unsigned int *)ip, addr, 0); | 99 | return create_branch((unsigned int *)ip, addr, 0); |
120 | } | 100 | } |
121 | 101 | ||
102 | #ifdef CONFIG_MODULES | ||
103 | |||
122 | static int is_bl_op(unsigned int op) | 104 | static int is_bl_op(unsigned int op) |
123 | { | 105 | { |
124 | return (op & 0xfc000003) == 0x48000001; | 106 | return (op & 0xfc000003) == 0x48000001; |
@@ -175,7 +157,7 @@ __ftrace_make_nop(struct module *mod, | |||
175 | * 0xe8, 0x4c, 0x00, 0x28, ld r2,40(r12) | 157 | * 0xe8, 0x4c, 0x00, 0x28, ld r2,40(r12) |
176 | */ | 158 | */ |
177 | 159 | ||
178 | DEBUGP("ip:%lx jumps to %lx r2: %lx", ip, tramp, mod->arch.toc); | 160 | pr_debug("ip:%lx jumps to %lx r2: %lx", ip, tramp, mod->arch.toc); |
179 | 161 | ||
180 | /* Find where the trampoline jumps to */ | 162 | /* Find where the trampoline jumps to */ |
181 | if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) { | 163 | if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) { |
@@ -183,7 +165,7 @@ __ftrace_make_nop(struct module *mod, | |||
183 | return -EFAULT; | 165 | return -EFAULT; |
184 | } | 166 | } |
185 | 167 | ||
186 | DEBUGP(" %08x %08x", jmp[0], jmp[1]); | 168 | pr_debug(" %08x %08x", jmp[0], jmp[1]); |
187 | 169 | ||
188 | /* verify that this is what we expect it to be */ | 170 | /* verify that this is what we expect it to be */ |
189 | if (((jmp[0] & 0xffff0000) != 0x3d820000) || | 171 | if (((jmp[0] & 0xffff0000) != 0x3d820000) || |
@@ -199,18 +181,18 @@ __ftrace_make_nop(struct module *mod, | |||
199 | offset = ((unsigned)((unsigned short)jmp[0]) << 16) + | 181 | offset = ((unsigned)((unsigned short)jmp[0]) << 16) + |
200 | (int)((short)jmp[1]); | 182 | (int)((short)jmp[1]); |
201 | 183 | ||
202 | DEBUGP(" %x ", offset); | 184 | pr_debug(" %x ", offset); |
203 | 185 | ||
204 | /* get the address this jumps too */ | 186 | /* get the address this jumps too */ |
205 | tramp = mod->arch.toc + offset + 32; | 187 | tramp = mod->arch.toc + offset + 32; |
206 | DEBUGP("toc: %lx", tramp); | 188 | pr_debug("toc: %lx", tramp); |
207 | 189 | ||
208 | if (probe_kernel_read(jmp, (void *)tramp, 8)) { | 190 | if (probe_kernel_read(jmp, (void *)tramp, 8)) { |
209 | printk(KERN_ERR "Failed to read %lx\n", tramp); | 191 | printk(KERN_ERR "Failed to read %lx\n", tramp); |
210 | return -EFAULT; | 192 | return -EFAULT; |
211 | } | 193 | } |
212 | 194 | ||
213 | DEBUGP(" %08x %08x\n", jmp[0], jmp[1]); | 195 | pr_debug(" %08x %08x\n", jmp[0], jmp[1]); |
214 | 196 | ||
215 | ptr = ((unsigned long)jmp[0] << 32) + jmp[1]; | 197 | ptr = ((unsigned long)jmp[0] << 32) + jmp[1]; |
216 | 198 | ||
@@ -287,7 +269,7 @@ __ftrace_make_nop(struct module *mod, | |||
287 | * 0x4e, 0x80, 0x04, 0x20 bctr | 269 | * 0x4e, 0x80, 0x04, 0x20 bctr |
288 | */ | 270 | */ |
289 | 271 | ||
290 | DEBUGP("ip:%lx jumps to %lx", ip, tramp); | 272 | pr_debug("ip:%lx jumps to %lx", ip, tramp); |
291 | 273 | ||
292 | /* Find where the trampoline jumps to */ | 274 | /* Find where the trampoline jumps to */ |
293 | if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) { | 275 | if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) { |
@@ -295,7 +277,7 @@ __ftrace_make_nop(struct module *mod, | |||
295 | return -EFAULT; | 277 | return -EFAULT; |
296 | } | 278 | } |
297 | 279 | ||
298 | DEBUGP(" %08x %08x ", jmp[0], jmp[1]); | 280 | pr_debug(" %08x %08x ", jmp[0], jmp[1]); |
299 | 281 | ||
300 | /* verify that this is what we expect it to be */ | 282 | /* verify that this is what we expect it to be */ |
301 | if (((jmp[0] & 0xffff0000) != 0x3d600000) || | 283 | if (((jmp[0] & 0xffff0000) != 0x3d600000) || |
@@ -311,7 +293,7 @@ __ftrace_make_nop(struct module *mod, | |||
311 | if (tramp & 0x8000) | 293 | if (tramp & 0x8000) |
312 | tramp -= 0x10000; | 294 | tramp -= 0x10000; |
313 | 295 | ||
314 | DEBUGP(" %x ", tramp); | 296 | pr_debug(" %x ", tramp); |
315 | 297 | ||
316 | if (tramp != addr) { | 298 | if (tramp != addr) { |
317 | printk(KERN_ERR | 299 | printk(KERN_ERR |
@@ -320,7 +302,7 @@ __ftrace_make_nop(struct module *mod, | |||
320 | return -EINVAL; | 302 | return -EINVAL; |
321 | } | 303 | } |
322 | 304 | ||
323 | op = PPC_NOP_INSTR; | 305 | op = PPC_INST_NOP; |
324 | 306 | ||
325 | if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE)) | 307 | if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE)) |
326 | return -EPERM; | 308 | return -EPERM; |
@@ -330,12 +312,13 @@ __ftrace_make_nop(struct module *mod, | |||
330 | return 0; | 312 | return 0; |
331 | } | 313 | } |
332 | #endif /* PPC64 */ | 314 | #endif /* PPC64 */ |
315 | #endif /* CONFIG_MODULES */ | ||
333 | 316 | ||
334 | int ftrace_make_nop(struct module *mod, | 317 | int ftrace_make_nop(struct module *mod, |
335 | struct dyn_ftrace *rec, unsigned long addr) | 318 | struct dyn_ftrace *rec, unsigned long addr) |
336 | { | 319 | { |
337 | unsigned char *old, *new; | ||
338 | unsigned long ip = rec->ip; | 320 | unsigned long ip = rec->ip; |
321 | unsigned int old, new; | ||
339 | 322 | ||
340 | /* | 323 | /* |
341 | * If the calling address is more that 24 bits away, | 324 | * If the calling address is more that 24 bits away, |
@@ -344,11 +327,12 @@ int ftrace_make_nop(struct module *mod, | |||
344 | */ | 327 | */ |
345 | if (test_24bit_addr(ip, addr)) { | 328 | if (test_24bit_addr(ip, addr)) { |
346 | /* within range */ | 329 | /* within range */ |
347 | old = ftrace_call_replace(ip, addr); | 330 | old = ftrace_call_replace(ip, addr, 1); |
348 | new = ftrace_nop_replace(); | 331 | new = ftrace_nop_replace(); |
349 | return ftrace_modify_code(ip, old, new); | 332 | return ftrace_modify_code(ip, old, new); |
350 | } | 333 | } |
351 | 334 | ||
335 | #ifdef CONFIG_MODULES | ||
352 | /* | 336 | /* |
353 | * Out of range jumps are called from modules. | 337 | * Out of range jumps are called from modules. |
354 | * We should either already have a pointer to the module | 338 | * We should either already have a pointer to the module |
@@ -373,9 +357,13 @@ int ftrace_make_nop(struct module *mod, | |||
373 | mod = rec->arch.mod; | 357 | mod = rec->arch.mod; |
374 | 358 | ||
375 | return __ftrace_make_nop(mod, rec, addr); | 359 | return __ftrace_make_nop(mod, rec, addr); |
376 | 360 | #else | |
361 | /* We should not get here without modules */ | ||
362 | return -EINVAL; | ||
363 | #endif /* CONFIG_MODULES */ | ||
377 | } | 364 | } |
378 | 365 | ||
366 | #ifdef CONFIG_MODULES | ||
379 | #ifdef CONFIG_PPC64 | 367 | #ifdef CONFIG_PPC64 |
380 | static int | 368 | static int |
381 | __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | 369 | __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) |
@@ -392,7 +380,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | |||
392 | * b +8; ld r2,40(r1) | 380 | * b +8; ld r2,40(r1) |
393 | */ | 381 | */ |
394 | if (((op[0] != 0x48000008) || (op[1] != 0xe8410028)) && | 382 | if (((op[0] != 0x48000008) || (op[1] != 0xe8410028)) && |
395 | ((op[0] != PPC_NOP_INSTR) || (op[1] != PPC_NOP_INSTR))) { | 383 | ((op[0] != PPC_INST_NOP) || (op[1] != PPC_INST_NOP))) { |
396 | printk(KERN_ERR "Expected NOPs but have %x %x\n", op[0], op[1]); | 384 | printk(KERN_ERR "Expected NOPs but have %x %x\n", op[0], op[1]); |
397 | return -EINVAL; | 385 | return -EINVAL; |
398 | } | 386 | } |
@@ -414,7 +402,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | |||
414 | /* ld r2,40(r1) */ | 402 | /* ld r2,40(r1) */ |
415 | op[1] = 0xe8410028; | 403 | op[1] = 0xe8410028; |
416 | 404 | ||
417 | DEBUGP("write to %lx\n", rec->ip); | 405 | pr_debug("write to %lx\n", rec->ip); |
418 | 406 | ||
419 | if (probe_kernel_write((void *)ip, op, MCOUNT_INSN_SIZE * 2)) | 407 | if (probe_kernel_write((void *)ip, op, MCOUNT_INSN_SIZE * 2)) |
420 | return -EPERM; | 408 | return -EPERM; |
@@ -435,7 +423,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | |||
435 | return -EFAULT; | 423 | return -EFAULT; |
436 | 424 | ||
437 | /* It should be pointing to a nop */ | 425 | /* It should be pointing to a nop */ |
438 | if (op != PPC_NOP_INSTR) { | 426 | if (op != PPC_INST_NOP) { |
439 | printk(KERN_ERR "Expected NOP but have %x\n", op); | 427 | printk(KERN_ERR "Expected NOP but have %x\n", op); |
440 | return -EINVAL; | 428 | return -EINVAL; |
441 | } | 429 | } |
@@ -454,7 +442,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | |||
454 | return -EINVAL; | 442 | return -EINVAL; |
455 | } | 443 | } |
456 | 444 | ||
457 | DEBUGP("write to %lx\n", rec->ip); | 445 | pr_debug("write to %lx\n", rec->ip); |
458 | 446 | ||
459 | if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE)) | 447 | if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE)) |
460 | return -EPERM; | 448 | return -EPERM; |
@@ -464,11 +452,12 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | |||
464 | return 0; | 452 | return 0; |
465 | } | 453 | } |
466 | #endif /* CONFIG_PPC64 */ | 454 | #endif /* CONFIG_PPC64 */ |
455 | #endif /* CONFIG_MODULES */ | ||
467 | 456 | ||
468 | int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | 457 | int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) |
469 | { | 458 | { |
470 | unsigned char *old, *new; | ||
471 | unsigned long ip = rec->ip; | 459 | unsigned long ip = rec->ip; |
460 | unsigned int old, new; | ||
472 | 461 | ||
473 | /* | 462 | /* |
474 | * If the calling address is more that 24 bits away, | 463 | * If the calling address is more that 24 bits away, |
@@ -478,10 +467,11 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | |||
478 | if (test_24bit_addr(ip, addr)) { | 467 | if (test_24bit_addr(ip, addr)) { |
479 | /* within range */ | 468 | /* within range */ |
480 | old = ftrace_nop_replace(); | 469 | old = ftrace_nop_replace(); |
481 | new = ftrace_call_replace(ip, addr); | 470 | new = ftrace_call_replace(ip, addr, 1); |
482 | return ftrace_modify_code(ip, old, new); | 471 | return ftrace_modify_code(ip, old, new); |
483 | } | 472 | } |
484 | 473 | ||
474 | #ifdef CONFIG_MODULES | ||
485 | /* | 475 | /* |
486 | * Out of range jumps are called from modules. | 476 | * Out of range jumps are called from modules. |
487 | * Being that we are converting from nop, it had better | 477 | * Being that we are converting from nop, it had better |
@@ -493,16 +483,20 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | |||
493 | } | 483 | } |
494 | 484 | ||
495 | return __ftrace_make_call(rec, addr); | 485 | return __ftrace_make_call(rec, addr); |
486 | #else | ||
487 | /* We should not get here without modules */ | ||
488 | return -EINVAL; | ||
489 | #endif /* CONFIG_MODULES */ | ||
496 | } | 490 | } |
497 | 491 | ||
498 | int ftrace_update_ftrace_func(ftrace_func_t func) | 492 | int ftrace_update_ftrace_func(ftrace_func_t func) |
499 | { | 493 | { |
500 | unsigned long ip = (unsigned long)(&ftrace_call); | 494 | unsigned long ip = (unsigned long)(&ftrace_call); |
501 | unsigned char old[MCOUNT_INSN_SIZE], *new; | 495 | unsigned int old, new; |
502 | int ret; | 496 | int ret; |
503 | 497 | ||
504 | memcpy(old, &ftrace_call, MCOUNT_INSN_SIZE); | 498 | old = *(unsigned int *)&ftrace_call; |
505 | new = ftrace_call_replace(ip, (unsigned long)func); | 499 | new = ftrace_call_replace(ip, (unsigned long)func, 1); |
506 | ret = ftrace_modify_code(ip, old, new); | 500 | ret = ftrace_modify_code(ip, old, new); |
507 | 501 | ||
508 | return ret; | 502 | return ret; |
@@ -517,3 +511,115 @@ int __init ftrace_dyn_arch_init(void *data) | |||
517 | 511 | ||
518 | return 0; | 512 | return 0; |
519 | } | 513 | } |
514 | #endif /* CONFIG_DYNAMIC_FTRACE */ | ||
515 | |||
516 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
517 | |||
518 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
519 | extern void ftrace_graph_call(void); | ||
520 | extern void ftrace_graph_stub(void); | ||
521 | |||
522 | int ftrace_enable_ftrace_graph_caller(void) | ||
523 | { | ||
524 | unsigned long ip = (unsigned long)(&ftrace_graph_call); | ||
525 | unsigned long addr = (unsigned long)(&ftrace_graph_caller); | ||
526 | unsigned long stub = (unsigned long)(&ftrace_graph_stub); | ||
527 | unsigned int old, new; | ||
528 | |||
529 | old = ftrace_call_replace(ip, stub, 0); | ||
530 | new = ftrace_call_replace(ip, addr, 0); | ||
531 | |||
532 | return ftrace_modify_code(ip, old, new); | ||
533 | } | ||
534 | |||
535 | int ftrace_disable_ftrace_graph_caller(void) | ||
536 | { | ||
537 | unsigned long ip = (unsigned long)(&ftrace_graph_call); | ||
538 | unsigned long addr = (unsigned long)(&ftrace_graph_caller); | ||
539 | unsigned long stub = (unsigned long)(&ftrace_graph_stub); | ||
540 | unsigned int old, new; | ||
541 | |||
542 | old = ftrace_call_replace(ip, addr, 0); | ||
543 | new = ftrace_call_replace(ip, stub, 0); | ||
544 | |||
545 | return ftrace_modify_code(ip, old, new); | ||
546 | } | ||
547 | #endif /* CONFIG_DYNAMIC_FTRACE */ | ||
548 | |||
549 | #ifdef CONFIG_PPC64 | ||
550 | extern void mod_return_to_handler(void); | ||
551 | #endif | ||
552 | |||
553 | /* | ||
554 | * Hook the return address and push it in the stack of return addrs | ||
555 | * in current thread info. | ||
556 | */ | ||
557 | void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr) | ||
558 | { | ||
559 | unsigned long old; | ||
560 | unsigned long long calltime; | ||
561 | int faulted; | ||
562 | struct ftrace_graph_ent trace; | ||
563 | unsigned long return_hooker = (unsigned long)&return_to_handler; | ||
564 | |||
565 | if (unlikely(atomic_read(¤t->tracing_graph_pause))) | ||
566 | return; | ||
567 | |||
568 | #if CONFIG_PPC64 | ||
569 | /* non core kernel code needs to save and restore the TOC */ | ||
570 | if (REGION_ID(self_addr) != KERNEL_REGION_ID) | ||
571 | return_hooker = (unsigned long)&mod_return_to_handler; | ||
572 | #endif | ||
573 | |||
574 | return_hooker = GET_ADDR(return_hooker); | ||
575 | |||
576 | /* | ||
577 | * Protect against fault, even if it shouldn't | ||
578 | * happen. This tool is too much intrusive to | ||
579 | * ignore such a protection. | ||
580 | */ | ||
581 | asm volatile( | ||
582 | "1: " PPC_LL "%[old], 0(%[parent])\n" | ||
583 | "2: " PPC_STL "%[return_hooker], 0(%[parent])\n" | ||
584 | " li %[faulted], 0\n" | ||
585 | "3:\n" | ||
586 | |||
587 | ".section .fixup, \"ax\"\n" | ||
588 | "4: li %[faulted], 1\n" | ||
589 | " b 3b\n" | ||
590 | ".previous\n" | ||
591 | |||
592 | ".section __ex_table,\"a\"\n" | ||
593 | PPC_LONG_ALIGN "\n" | ||
594 | PPC_LONG "1b,4b\n" | ||
595 | PPC_LONG "2b,4b\n" | ||
596 | ".previous" | ||
597 | |||
598 | : [old] "=r" (old), [faulted] "=r" (faulted) | ||
599 | : [parent] "r" (parent), [return_hooker] "r" (return_hooker) | ||
600 | : "memory" | ||
601 | ); | ||
602 | |||
603 | if (unlikely(faulted)) { | ||
604 | ftrace_graph_stop(); | ||
605 | WARN_ON(1); | ||
606 | return; | ||
607 | } | ||
608 | |||
609 | calltime = cpu_clock(raw_smp_processor_id()); | ||
610 | |||
611 | if (ftrace_push_return_trace(old, calltime, | ||
612 | self_addr, &trace.depth) == -EBUSY) { | ||
613 | *parent = old; | ||
614 | return; | ||
615 | } | ||
616 | |||
617 | trace.func = self_addr; | ||
618 | |||
619 | /* Only trace if the calling function expects to */ | ||
620 | if (!ftrace_graph_entry(&trace)) { | ||
621 | current->curr_ret_stack--; | ||
622 | *parent = old; | ||
623 | } | ||
624 | } | ||
625 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | ||
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index a1c4cfd25ded..54e68c11ae15 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S | |||
@@ -108,18 +108,21 @@ __start: | |||
108 | * because OF may have I/O devices mapped into that area | 108 | * because OF may have I/O devices mapped into that area |
109 | * (particularly on CHRP). | 109 | * (particularly on CHRP). |
110 | */ | 110 | */ |
111 | #ifdef CONFIG_PPC_MULTIPLATFORM | ||
112 | cmpwi 0,r5,0 | 111 | cmpwi 0,r5,0 |
113 | beq 1f | 112 | beq 1f |
114 | 113 | ||
114 | #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE | ||
115 | /* find out where we are now */ | 115 | /* find out where we are now */ |
116 | bcl 20,31,$+4 | 116 | bcl 20,31,$+4 |
117 | 0: mflr r8 /* r8 = runtime addr here */ | 117 | 0: mflr r8 /* r8 = runtime addr here */ |
118 | addis r8,r8,(_stext - 0b)@ha | 118 | addis r8,r8,(_stext - 0b)@ha |
119 | addi r8,r8,(_stext - 0b)@l /* current runtime base addr */ | 119 | addi r8,r8,(_stext - 0b)@l /* current runtime base addr */ |
120 | bl prom_init | 120 | bl prom_init |
121 | #endif /* CONFIG_PPC_OF_BOOT_TRAMPOLINE */ | ||
122 | |||
123 | /* We never return. We also hit that trap if trying to boot | ||
124 | * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */ | ||
121 | trap | 125 | trap |
122 | #endif | ||
123 | 126 | ||
124 | /* | 127 | /* |
125 | * Check for BootX signature when supporting PowerMac and branch to | 128 | * Check for BootX signature when supporting PowerMac and branch to |
@@ -472,12 +475,11 @@ SystemCall: | |||
472 | . = 0x1000 | 475 | . = 0x1000 |
473 | InstructionTLBMiss: | 476 | InstructionTLBMiss: |
474 | /* | 477 | /* |
475 | * r0: stored ctr | 478 | * r0: scratch |
476 | * r1: linux style pte ( later becomes ppc hardware pte ) | 479 | * r1: linux style pte ( later becomes ppc hardware pte ) |
477 | * r2: ptr to linux-style pte | 480 | * r2: ptr to linux-style pte |
478 | * r3: scratch | 481 | * r3: scratch |
479 | */ | 482 | */ |
480 | mfctr r0 | ||
481 | /* Get PTE (linux-style) and check access */ | 483 | /* Get PTE (linux-style) and check access */ |
482 | mfspr r3,SPRN_IMISS | 484 | mfspr r3,SPRN_IMISS |
483 | lis r1,PAGE_OFFSET@h /* check if kernel address */ | 485 | lis r1,PAGE_OFFSET@h /* check if kernel address */ |
@@ -496,25 +498,27 @@ InstructionTLBMiss: | |||
496 | rlwinm. r2,r2,0,0,19 /* extract address of pte page */ | 498 | rlwinm. r2,r2,0,0,19 /* extract address of pte page */ |
497 | beq- InstructionAddressInvalid /* return if no mapping */ | 499 | beq- InstructionAddressInvalid /* return if no mapping */ |
498 | rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ | 500 | rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ |
499 | lwz r3,0(r2) /* get linux-style pte */ | 501 | lwz r0,0(r2) /* get linux-style pte */ |
500 | andc. r1,r1,r3 /* check access & ~permission */ | 502 | andc. r1,r1,r0 /* check access & ~permission */ |
501 | bne- InstructionAddressInvalid /* return if access not permitted */ | 503 | bne- InstructionAddressInvalid /* return if access not permitted */ |
502 | ori r3,r3,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */ | 504 | ori r0,r0,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */ |
503 | /* | 505 | /* |
504 | * NOTE! We are assuming this is not an SMP system, otherwise | 506 | * NOTE! We are assuming this is not an SMP system, otherwise |
505 | * we would need to update the pte atomically with lwarx/stwcx. | 507 | * we would need to update the pte atomically with lwarx/stwcx. |
506 | */ | 508 | */ |
507 | stw r3,0(r2) /* update PTE (accessed bit) */ | 509 | stw r0,0(r2) /* update PTE (accessed bit) */ |
508 | /* Convert linux-style PTE to low word of PPC-style PTE */ | 510 | /* Convert linux-style PTE to low word of PPC-style PTE */ |
509 | rlwinm r1,r3,32-10,31,31 /* _PAGE_RW -> PP lsb */ | 511 | rlwinm r1,r0,32-10,31,31 /* _PAGE_RW -> PP lsb */ |
510 | rlwinm r2,r3,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ | 512 | rlwinm r2,r0,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ |
511 | and r1,r1,r2 /* writable if _RW and _DIRTY */ | 513 | and r1,r1,r2 /* writable if _RW and _DIRTY */ |
512 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ | 514 | rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */ |
513 | rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ | 515 | rlwimi r0,r0,32-1,31,31 /* _PAGE_USER -> PP lsb */ |
514 | ori r1,r1,0xe14 /* clear out reserved bits and M */ | 516 | ori r1,r1,0xe04 /* clear out reserved bits */ |
515 | andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ | 517 | andc r1,r0,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ |
518 | BEGIN_FTR_SECTION | ||
519 | rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ | ||
520 | END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) | ||
516 | mtspr SPRN_RPA,r1 | 521 | mtspr SPRN_RPA,r1 |
517 | mfspr r3,SPRN_IMISS | ||
518 | tlbli r3 | 522 | tlbli r3 |
519 | mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ | 523 | mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ |
520 | mtcrf 0x80,r3 | 524 | mtcrf 0x80,r3 |
@@ -525,7 +529,6 @@ InstructionAddressInvalid: | |||
525 | 529 | ||
526 | addis r1,r1,0x2000 | 530 | addis r1,r1,0x2000 |
527 | mtspr SPRN_DSISR,r1 /* (shouldn't be needed) */ | 531 | mtspr SPRN_DSISR,r1 /* (shouldn't be needed) */ |
528 | mtctr r0 /* Restore CTR */ | ||
529 | andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */ | 532 | andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */ |
530 | or r2,r2,r1 | 533 | or r2,r2,r1 |
531 | mtspr SPRN_SRR1,r2 | 534 | mtspr SPRN_SRR1,r2 |
@@ -546,12 +549,11 @@ InstructionAddressInvalid: | |||
546 | . = 0x1100 | 549 | . = 0x1100 |
547 | DataLoadTLBMiss: | 550 | DataLoadTLBMiss: |
548 | /* | 551 | /* |
549 | * r0: stored ctr | 552 | * r0: scratch |
550 | * r1: linux style pte ( later becomes ppc hardware pte ) | 553 | * r1: linux style pte ( later becomes ppc hardware pte ) |
551 | * r2: ptr to linux-style pte | 554 | * r2: ptr to linux-style pte |
552 | * r3: scratch | 555 | * r3: scratch |
553 | */ | 556 | */ |
554 | mfctr r0 | ||
555 | /* Get PTE (linux-style) and check access */ | 557 | /* Get PTE (linux-style) and check access */ |
556 | mfspr r3,SPRN_DMISS | 558 | mfspr r3,SPRN_DMISS |
557 | lis r1,PAGE_OFFSET@h /* check if kernel address */ | 559 | lis r1,PAGE_OFFSET@h /* check if kernel address */ |
@@ -570,35 +572,48 @@ DataLoadTLBMiss: | |||
570 | rlwinm. r2,r2,0,0,19 /* extract address of pte page */ | 572 | rlwinm. r2,r2,0,0,19 /* extract address of pte page */ |
571 | beq- DataAddressInvalid /* return if no mapping */ | 573 | beq- DataAddressInvalid /* return if no mapping */ |
572 | rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ | 574 | rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ |
573 | lwz r3,0(r2) /* get linux-style pte */ | 575 | lwz r0,0(r2) /* get linux-style pte */ |
574 | andc. r1,r1,r3 /* check access & ~permission */ | 576 | andc. r1,r1,r0 /* check access & ~permission */ |
575 | bne- DataAddressInvalid /* return if access not permitted */ | 577 | bne- DataAddressInvalid /* return if access not permitted */ |
576 | ori r3,r3,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */ | 578 | ori r0,r0,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */ |
577 | /* | 579 | /* |
578 | * NOTE! We are assuming this is not an SMP system, otherwise | 580 | * NOTE! We are assuming this is not an SMP system, otherwise |
579 | * we would need to update the pte atomically with lwarx/stwcx. | 581 | * we would need to update the pte atomically with lwarx/stwcx. |
580 | */ | 582 | */ |
581 | stw r3,0(r2) /* update PTE (accessed bit) */ | 583 | stw r0,0(r2) /* update PTE (accessed bit) */ |
582 | /* Convert linux-style PTE to low word of PPC-style PTE */ | 584 | /* Convert linux-style PTE to low word of PPC-style PTE */ |
583 | rlwinm r1,r3,32-10,31,31 /* _PAGE_RW -> PP lsb */ | 585 | rlwinm r1,r0,32-10,31,31 /* _PAGE_RW -> PP lsb */ |
584 | rlwinm r2,r3,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ | 586 | rlwinm r2,r0,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ |
585 | and r1,r1,r2 /* writable if _RW and _DIRTY */ | 587 | and r1,r1,r2 /* writable if _RW and _DIRTY */ |
586 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ | 588 | rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */ |
587 | rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ | 589 | rlwimi r0,r0,32-1,31,31 /* _PAGE_USER -> PP lsb */ |
588 | ori r1,r1,0xe14 /* clear out reserved bits and M */ | 590 | ori r1,r1,0xe04 /* clear out reserved bits */ |
589 | andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ | 591 | andc r1,r0,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ |
592 | BEGIN_FTR_SECTION | ||
593 | rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ | ||
594 | END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) | ||
590 | mtspr SPRN_RPA,r1 | 595 | mtspr SPRN_RPA,r1 |
591 | mfspr r3,SPRN_DMISS | 596 | mfspr r2,SPRN_SRR1 /* Need to restore CR0 */ |
597 | mtcrf 0x80,r2 | ||
598 | BEGIN_MMU_FTR_SECTION | ||
599 | li r0,1 | ||
600 | mfspr r1,SPRN_SPRG4 | ||
601 | rlwinm r2,r3,20,27,31 /* Get Address bits 15:19 */ | ||
602 | slw r0,r0,r2 | ||
603 | xor r1,r0,r1 | ||
604 | srw r0,r1,r2 | ||
605 | mtspr SPRN_SPRG4,r1 | ||
606 | mfspr r2,SPRN_SRR1 | ||
607 | rlwimi r2,r0,31-14,14,14 | ||
608 | mtspr SPRN_SRR1,r2 | ||
609 | END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU) | ||
592 | tlbld r3 | 610 | tlbld r3 |
593 | mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ | ||
594 | mtcrf 0x80,r3 | ||
595 | rfi | 611 | rfi |
596 | DataAddressInvalid: | 612 | DataAddressInvalid: |
597 | mfspr r3,SPRN_SRR1 | 613 | mfspr r3,SPRN_SRR1 |
598 | rlwinm r1,r3,9,6,6 /* Get load/store bit */ | 614 | rlwinm r1,r3,9,6,6 /* Get load/store bit */ |
599 | addis r1,r1,0x2000 | 615 | addis r1,r1,0x2000 |
600 | mtspr SPRN_DSISR,r1 | 616 | mtspr SPRN_DSISR,r1 |
601 | mtctr r0 /* Restore CTR */ | ||
602 | andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */ | 617 | andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */ |
603 | mtspr SPRN_SRR1,r2 | 618 | mtspr SPRN_SRR1,r2 |
604 | mfspr r1,SPRN_DMISS /* Get failing address */ | 619 | mfspr r1,SPRN_DMISS /* Get failing address */ |
@@ -618,12 +633,11 @@ DataAddressInvalid: | |||
618 | . = 0x1200 | 633 | . = 0x1200 |
619 | DataStoreTLBMiss: | 634 | DataStoreTLBMiss: |
620 | /* | 635 | /* |
621 | * r0: stored ctr | 636 | * r0: scratch |
622 | * r1: linux style pte ( later becomes ppc hardware pte ) | 637 | * r1: linux style pte ( later becomes ppc hardware pte ) |
623 | * r2: ptr to linux-style pte | 638 | * r2: ptr to linux-style pte |
624 | * r3: scratch | 639 | * r3: scratch |
625 | */ | 640 | */ |
626 | mfctr r0 | ||
627 | /* Get PTE (linux-style) and check access */ | 641 | /* Get PTE (linux-style) and check access */ |
628 | mfspr r3,SPRN_DMISS | 642 | mfspr r3,SPRN_DMISS |
629 | lis r1,PAGE_OFFSET@h /* check if kernel address */ | 643 | lis r1,PAGE_OFFSET@h /* check if kernel address */ |
@@ -642,24 +656,38 @@ DataStoreTLBMiss: | |||
642 | rlwinm. r2,r2,0,0,19 /* extract address of pte page */ | 656 | rlwinm. r2,r2,0,0,19 /* extract address of pte page */ |
643 | beq- DataAddressInvalid /* return if no mapping */ | 657 | beq- DataAddressInvalid /* return if no mapping */ |
644 | rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ | 658 | rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ |
645 | lwz r3,0(r2) /* get linux-style pte */ | 659 | lwz r0,0(r2) /* get linux-style pte */ |
646 | andc. r1,r1,r3 /* check access & ~permission */ | 660 | andc. r1,r1,r0 /* check access & ~permission */ |
647 | bne- DataAddressInvalid /* return if access not permitted */ | 661 | bne- DataAddressInvalid /* return if access not permitted */ |
648 | ori r3,r3,_PAGE_ACCESSED|_PAGE_DIRTY | 662 | ori r0,r0,_PAGE_ACCESSED|_PAGE_DIRTY |
649 | /* | 663 | /* |
650 | * NOTE! We are assuming this is not an SMP system, otherwise | 664 | * NOTE! We are assuming this is not an SMP system, otherwise |
651 | * we would need to update the pte atomically with lwarx/stwcx. | 665 | * we would need to update the pte atomically with lwarx/stwcx. |
652 | */ | 666 | */ |
653 | stw r3,0(r2) /* update PTE (accessed/dirty bits) */ | 667 | stw r0,0(r2) /* update PTE (accessed/dirty bits) */ |
654 | /* Convert linux-style PTE to low word of PPC-style PTE */ | 668 | /* Convert linux-style PTE to low word of PPC-style PTE */ |
655 | rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ | 669 | rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */ |
656 | li r1,0xe15 /* clear out reserved bits and M */ | 670 | li r1,0xe05 /* clear out reserved bits & PP lsb */ |
657 | andc r1,r3,r1 /* PP = user? 2: 0 */ | 671 | andc r1,r0,r1 /* PP = user? 2: 0 */ |
672 | BEGIN_FTR_SECTION | ||
673 | rlwinm r1,r1,0,~_PAGE_COHERENT /* clear M (coherence not required) */ | ||
674 | END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT) | ||
658 | mtspr SPRN_RPA,r1 | 675 | mtspr SPRN_RPA,r1 |
659 | mfspr r3,SPRN_DMISS | 676 | mfspr r2,SPRN_SRR1 /* Need to restore CR0 */ |
677 | mtcrf 0x80,r2 | ||
678 | BEGIN_MMU_FTR_SECTION | ||
679 | li r0,1 | ||
680 | mfspr r1,SPRN_SPRG4 | ||
681 | rlwinm r2,r3,20,27,31 /* Get Address bits 15:19 */ | ||
682 | slw r0,r0,r2 | ||
683 | xor r1,r0,r1 | ||
684 | srw r0,r1,r2 | ||
685 | mtspr SPRN_SPRG4,r1 | ||
686 | mfspr r2,SPRN_SRR1 | ||
687 | rlwimi r2,r0,31-14,14,14 | ||
688 | mtspr SPRN_SRR1,r2 | ||
689 | END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU) | ||
660 | tlbld r3 | 690 | tlbld r3 |
661 | mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ | ||
662 | mtcrf 0x80,r3 | ||
663 | rfi | 691 | rfi |
664 | 692 | ||
665 | #ifndef CONFIG_ALTIVEC | 693 | #ifndef CONFIG_ALTIVEC |
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index ebaedafc8e67..50ef505b8fb6 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S | |||
@@ -1360,6 +1360,7 @@ _GLOBAL(__start_initialization_multiplatform) | |||
1360 | b .__after_prom_start | 1360 | b .__after_prom_start |
1361 | 1361 | ||
1362 | _INIT_STATIC(__boot_from_prom) | 1362 | _INIT_STATIC(__boot_from_prom) |
1363 | #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE | ||
1363 | /* Save parameters */ | 1364 | /* Save parameters */ |
1364 | mr r31,r3 | 1365 | mr r31,r3 |
1365 | mr r30,r4 | 1366 | mr r30,r4 |
@@ -1390,7 +1391,10 @@ _INIT_STATIC(__boot_from_prom) | |||
1390 | /* Do all of the interaction with OF client interface */ | 1391 | /* Do all of the interaction with OF client interface */ |
1391 | mr r8,r26 | 1392 | mr r8,r26 |
1392 | bl .prom_init | 1393 | bl .prom_init |
1393 | /* We never return */ | 1394 | #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */ |
1395 | |||
1396 | /* We never return. We also hit that trap if trying to boot | ||
1397 | * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */ | ||
1394 | trap | 1398 | trap |
1395 | 1399 | ||
1396 | _STATIC(__after_prom_start) | 1400 | _STATIC(__after_prom_start) |
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h index fce2df988504..95f39f1e68d4 100644 --- a/arch/powerpc/kernel/head_booke.h +++ b/arch/powerpc/kernel/head_booke.h | |||
@@ -10,6 +10,15 @@ | |||
10 | mtspr SPRN_IVOR##vector_number,r26; \ | 10 | mtspr SPRN_IVOR##vector_number,r26; \ |
11 | sync | 11 | sync |
12 | 12 | ||
13 | #if (THREAD_SHIFT < 15) | ||
14 | #define ALLOC_STACK_FRAME(reg, val) \ | ||
15 | addi reg,reg,val | ||
16 | #else | ||
17 | #define ALLOC_STACK_FRAME(reg, val) \ | ||
18 | addis reg,reg,val@ha; \ | ||
19 | addi reg,reg,val@l | ||
20 | #endif | ||
21 | |||
13 | #define NORMAL_EXCEPTION_PROLOG \ | 22 | #define NORMAL_EXCEPTION_PROLOG \ |
14 | mtspr SPRN_SPRG0,r10; /* save two registers to work with */\ | 23 | mtspr SPRN_SPRG0,r10; /* save two registers to work with */\ |
15 | mtspr SPRN_SPRG1,r11; \ | 24 | mtspr SPRN_SPRG1,r11; \ |
@@ -20,7 +29,7 @@ | |||
20 | beq 1f; \ | 29 | beq 1f; \ |
21 | mfspr r1,SPRN_SPRG3; /* if from user, start at top of */\ | 30 | mfspr r1,SPRN_SPRG3; /* if from user, start at top of */\ |
22 | lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\ | 31 | lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\ |
23 | addi r1,r1,THREAD_SIZE; \ | 32 | ALLOC_STACK_FRAME(r1, THREAD_SIZE); \ |
24 | 1: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\ | 33 | 1: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\ |
25 | mr r11,r1; \ | 34 | mr r11,r1; \ |
26 | stw r10,_CCR(r11); /* save various registers */\ | 35 | stw r10,_CCR(r11); /* save various registers */\ |
@@ -70,10 +79,10 @@ | |||
70 | 79 | ||
71 | /* only on e500mc/e200 */ | 80 | /* only on e500mc/e200 */ |
72 | #define DEBUG_STACK_BASE dbgirq_ctx | 81 | #define DEBUG_STACK_BASE dbgirq_ctx |
73 | #ifdef CONFIG_PPC_E500MC | 82 | #ifdef CONFIG_E200 |
74 | #define DEBUG_SPRG SPRN_SPRG9 | ||
75 | #else | ||
76 | #define DEBUG_SPRG SPRN_SPRG6W | 83 | #define DEBUG_SPRG SPRN_SPRG6W |
84 | #else | ||
85 | #define DEBUG_SPRG SPRN_SPRG9 | ||
77 | #endif | 86 | #endif |
78 | 87 | ||
79 | #define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE) | 88 | #define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE) |
@@ -279,7 +288,7 @@ label: | |||
279 | lwz r11,GPR11(r8); \ | 288 | lwz r11,GPR11(r8); \ |
280 | mfspr r8,DEBUG_SPRG; \ | 289 | mfspr r8,DEBUG_SPRG; \ |
281 | \ | 290 | \ |
282 | RFDI; \ | 291 | PPC_RFDI; \ |
283 | b .; \ | 292 | b .; \ |
284 | \ | 293 | \ |
285 | /* continue normal handling for a debug exception... */ \ | 294 | /* continue normal handling for a debug exception... */ \ |
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 36ffb3504a4f..4c22620d009b 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
@@ -103,10 +103,15 @@ invstr: mflr r6 /* Make it accessible */ | |||
103 | or r7,r7,r4 | 103 | or r7,r7,r4 |
104 | mtspr SPRN_MAS6,r7 | 104 | mtspr SPRN_MAS6,r7 |
105 | tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */ | 105 | tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */ |
106 | #ifndef CONFIG_E200 | ||
107 | mfspr r7,SPRN_MAS1 | 106 | mfspr r7,SPRN_MAS1 |
108 | andis. r7,r7,MAS1_VALID@h | 107 | andis. r7,r7,MAS1_VALID@h |
109 | bne match_TLB | 108 | bne match_TLB |
109 | |||
110 | mfspr r7,SPRN_MMUCFG | ||
111 | rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */ | ||
112 | cmpwi r7,3 | ||
113 | bne match_TLB /* skip if NPIDS != 3 */ | ||
114 | |||
110 | mfspr r7,SPRN_PID1 | 115 | mfspr r7,SPRN_PID1 |
111 | slwi r7,r7,16 | 116 | slwi r7,r7,16 |
112 | or r7,r7,r4 | 117 | or r7,r7,r4 |
@@ -120,7 +125,7 @@ invstr: mflr r6 /* Make it accessible */ | |||
120 | or r7,r7,r4 | 125 | or r7,r7,r4 |
121 | mtspr SPRN_MAS6,r7 | 126 | mtspr SPRN_MAS6,r7 |
122 | tlbsx 0,r6 /* Fall through, we had to match */ | 127 | tlbsx 0,r6 /* Fall through, we had to match */ |
123 | #endif | 128 | |
124 | match_TLB: | 129 | match_TLB: |
125 | mfspr r7,SPRN_MAS0 | 130 | mfspr r7,SPRN_MAS0 |
126 | rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */ | 131 | rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */ |
@@ -168,7 +173,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
168 | 173 | ||
169 | /* grab and fixup the RPN */ | 174 | /* grab and fixup the RPN */ |
170 | mfspr r6,SPRN_MAS1 /* extract MAS1[SIZE] */ | 175 | mfspr r6,SPRN_MAS1 /* extract MAS1[SIZE] */ |
171 | rlwinm r6,r6,25,27,30 | 176 | rlwinm r6,r6,25,27,31 |
172 | li r8,-1 | 177 | li r8,-1 |
173 | addi r6,r6,10 | 178 | addi r6,r6,10 |
174 | slw r6,r8,r6 /* convert to mask */ | 179 | slw r6,r8,r6 /* convert to mask */ |
@@ -194,7 +199,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
194 | xori r6,r4,1 /* Setup TMP mapping in the other Address space */ | 199 | xori r6,r4,1 /* Setup TMP mapping in the other Address space */ |
195 | slwi r6,r6,12 | 200 | slwi r6,r6,12 |
196 | oris r6,r6,(MAS1_VALID|MAS1_IPROT)@h | 201 | oris r6,r6,(MAS1_VALID|MAS1_IPROT)@h |
197 | ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l | 202 | ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_4K))@l |
198 | mtspr SPRN_MAS1,r6 | 203 | mtspr SPRN_MAS1,r6 |
199 | mfspr r6,SPRN_MAS2 | 204 | mfspr r6,SPRN_MAS2 |
200 | li r7,0 /* temp EPN = 0 */ | 205 | li r7,0 /* temp EPN = 0 */ |
@@ -215,14 +220,19 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
215 | 220 | ||
216 | /* 4. Clear out PIDs & Search info */ | 221 | /* 4. Clear out PIDs & Search info */ |
217 | li r6,0 | 222 | li r6,0 |
223 | mtspr SPRN_MAS6,r6 | ||
218 | mtspr SPRN_PID0,r6 | 224 | mtspr SPRN_PID0,r6 |
219 | #ifndef CONFIG_E200 | 225 | |
226 | mfspr r7,SPRN_MMUCFG | ||
227 | rlwinm r7,r7,21,28,31 /* extract MMUCFG[NPIDS] */ | ||
228 | cmpwi r7,3 | ||
229 | bne 2f /* skip if NPIDS != 3 */ | ||
230 | |||
220 | mtspr SPRN_PID1,r6 | 231 | mtspr SPRN_PID1,r6 |
221 | mtspr SPRN_PID2,r6 | 232 | mtspr SPRN_PID2,r6 |
222 | #endif | ||
223 | mtspr SPRN_MAS6,r6 | ||
224 | 233 | ||
225 | /* 5. Invalidate mapping we started in */ | 234 | /* 5. Invalidate mapping we started in */ |
235 | 2: | ||
226 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ | 236 | lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */ |
227 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ | 237 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ |
228 | mtspr SPRN_MAS0,r7 | 238 | mtspr SPRN_MAS0,r7 |
@@ -247,10 +257,10 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
247 | lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ | 257 | lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ |
248 | mtspr SPRN_MAS0,r6 | 258 | mtspr SPRN_MAS0,r6 |
249 | lis r6,(MAS1_VALID|MAS1_IPROT)@h | 259 | lis r6,(MAS1_VALID|MAS1_IPROT)@h |
250 | ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_64M))@l | 260 | ori r6,r6,(MAS1_TSIZE(BOOK3E_PAGESZ_64M))@l |
251 | mtspr SPRN_MAS1,r6 | 261 | mtspr SPRN_MAS1,r6 |
252 | lis r6,MAS2_VAL(PAGE_OFFSET, BOOKE_PAGESZ_64M, M_IF_SMP)@h | 262 | lis r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@h |
253 | ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOKE_PAGESZ_64M, M_IF_SMP)@l | 263 | ori r6,r6,MAS2_VAL(PAGE_OFFSET, BOOK3E_PAGESZ_64M, M_IF_SMP)@l |
254 | mtspr SPRN_MAS2,r6 | 264 | mtspr SPRN_MAS2,r6 |
255 | mtspr SPRN_MAS3,r8 | 265 | mtspr SPRN_MAS3,r8 |
256 | tlbwe | 266 | tlbwe |
@@ -298,26 +308,14 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
298 | SET_IVOR(12, WatchdogTimer); | 308 | SET_IVOR(12, WatchdogTimer); |
299 | SET_IVOR(13, DataTLBError); | 309 | SET_IVOR(13, DataTLBError); |
300 | SET_IVOR(14, InstructionTLBError); | 310 | SET_IVOR(14, InstructionTLBError); |
301 | SET_IVOR(15, DebugDebug); | ||
302 | #if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC) | ||
303 | SET_IVOR(15, DebugCrit); | 311 | SET_IVOR(15, DebugCrit); |
304 | #endif | ||
305 | SET_IVOR(32, SPEUnavailable); | ||
306 | SET_IVOR(33, SPEFloatingPointData); | ||
307 | SET_IVOR(34, SPEFloatingPointRound); | ||
308 | #ifndef CONFIG_E200 | ||
309 | SET_IVOR(35, PerformanceMonitor); | ||
310 | #endif | ||
311 | #ifdef CONFIG_PPC_E500MC | ||
312 | SET_IVOR(36, Doorbell); | ||
313 | #endif | ||
314 | 312 | ||
315 | /* Establish the interrupt vector base */ | 313 | /* Establish the interrupt vector base */ |
316 | lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ | 314 | lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ |
317 | mtspr SPRN_IVPR,r4 | 315 | mtspr SPRN_IVPR,r4 |
318 | 316 | ||
319 | /* Setup the defaults for TLB entries */ | 317 | /* Setup the defaults for TLB entries */ |
320 | li r2,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l | 318 | li r2,(MAS4_TSIZED(BOOK3E_PAGESZ_4K))@l |
321 | #ifdef CONFIG_E200 | 319 | #ifdef CONFIG_E200 |
322 | oris r2,r2,MAS4_TLBSELD(1)@h | 320 | oris r2,r2,MAS4_TLBSELD(1)@h |
323 | #endif | 321 | #endif |
@@ -329,12 +327,6 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
329 | oris r2,r2,HID0_DOZE@h | 327 | oris r2,r2,HID0_DOZE@h |
330 | mtspr SPRN_HID0, r2 | 328 | mtspr SPRN_HID0, r2 |
331 | #endif | 329 | #endif |
332 | #ifdef CONFIG_E200 | ||
333 | /* enable dedicated debug exception handling resources (Debug APU) */ | ||
334 | mfspr r2,SPRN_HID0 | ||
335 | ori r2,r2,HID0_DAPUEN@l | ||
336 | mtspr SPRN_HID0,r2 | ||
337 | #endif | ||
338 | 330 | ||
339 | #if !defined(CONFIG_BDI_SWITCH) | 331 | #if !defined(CONFIG_BDI_SWITCH) |
340 | /* | 332 | /* |
@@ -706,15 +698,13 @@ interrupt_base: | |||
706 | /* Performance Monitor */ | 698 | /* Performance Monitor */ |
707 | EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) | 699 | EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) |
708 | 700 | ||
709 | #ifdef CONFIG_PPC_E500MC | 701 | EXCEPTION(0x2070, Doorbell, doorbell_exception, EXC_XFER_STD) |
710 | EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_STD) | 702 | |
711 | #endif | 703 | CRITICAL_EXCEPTION(0x2080, CriticalDoorbell, unknown_exception) |
712 | 704 | ||
713 | /* Debug Interrupt */ | 705 | /* Debug Interrupt */ |
714 | DEBUG_DEBUG_EXCEPTION | 706 | DEBUG_DEBUG_EXCEPTION |
715 | #if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC) | ||
716 | DEBUG_CRIT_EXCEPTION | 707 | DEBUG_CRIT_EXCEPTION |
717 | #endif | ||
718 | 708 | ||
719 | /* | 709 | /* |
720 | * Local functions | 710 | * Local functions |
@@ -897,6 +887,47 @@ KernelSPE: | |||
897 | * Global functions | 887 | * Global functions |
898 | */ | 888 | */ |
899 | 889 | ||
890 | /* Adjust or setup IVORs for e200 */ | ||
891 | _GLOBAL(__setup_e200_ivors) | ||
892 | li r3,DebugDebug@l | ||
893 | mtspr SPRN_IVOR15,r3 | ||
894 | li r3,SPEUnavailable@l | ||
895 | mtspr SPRN_IVOR32,r3 | ||
896 | li r3,SPEFloatingPointData@l | ||
897 | mtspr SPRN_IVOR33,r3 | ||
898 | li r3,SPEFloatingPointRound@l | ||
899 | mtspr SPRN_IVOR34,r3 | ||
900 | sync | ||
901 | blr | ||
902 | |||
903 | /* Adjust or setup IVORs for e500v1/v2 */ | ||
904 | _GLOBAL(__setup_e500_ivors) | ||
905 | li r3,DebugCrit@l | ||
906 | mtspr SPRN_IVOR15,r3 | ||
907 | li r3,SPEUnavailable@l | ||
908 | mtspr SPRN_IVOR32,r3 | ||
909 | li r3,SPEFloatingPointData@l | ||
910 | mtspr SPRN_IVOR33,r3 | ||
911 | li r3,SPEFloatingPointRound@l | ||
912 | mtspr SPRN_IVOR34,r3 | ||
913 | li r3,PerformanceMonitor@l | ||
914 | mtspr SPRN_IVOR35,r3 | ||
915 | sync | ||
916 | blr | ||
917 | |||
918 | /* Adjust or setup IVORs for e500mc */ | ||
919 | _GLOBAL(__setup_e500mc_ivors) | ||
920 | li r3,DebugDebug@l | ||
921 | mtspr SPRN_IVOR15,r3 | ||
922 | li r3,PerformanceMonitor@l | ||
923 | mtspr SPRN_IVOR35,r3 | ||
924 | li r3,Doorbell@l | ||
925 | mtspr SPRN_IVOR36,r3 | ||
926 | li r3,CriticalDoorbell@l | ||
927 | mtspr SPRN_IVOR37,r3 | ||
928 | sync | ||
929 | blr | ||
930 | |||
900 | /* | 931 | /* |
901 | * extern void loadcam_entry(unsigned int index) | 932 | * extern void loadcam_entry(unsigned int index) |
902 | * | 933 | * |
@@ -1089,7 +1120,7 @@ __secondary_start: | |||
1089 | mtspr SPRN_SPRG3,r4 | 1120 | mtspr SPRN_SPRG3,r4 |
1090 | 1121 | ||
1091 | /* Setup the defaults for TLB entries */ | 1122 | /* Setup the defaults for TLB entries */ |
1092 | li r4,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l | 1123 | li r4,(MAS4_TSIZED(BOOK3E_PAGESZ_4K))@l |
1093 | mtspr SPRN_MAS4,r4 | 1124 | mtspr SPRN_MAS4,r4 |
1094 | 1125 | ||
1095 | /* Jump to start_secondary */ | 1126 | /* Jump to start_secondary */ |
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index ad1e5ac721d8..5576147e57b6 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -171,7 +171,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
171 | { | 171 | { |
172 | int i = *(loff_t *)v, j; | 172 | int i = *(loff_t *)v, j; |
173 | struct irqaction *action; | 173 | struct irqaction *action; |
174 | irq_desc_t *desc; | 174 | struct irq_desc *desc; |
175 | unsigned long flags; | 175 | unsigned long flags; |
176 | 176 | ||
177 | if (i == 0) { | 177 | if (i == 0) { |
@@ -190,7 +190,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
190 | seq_printf(p, "%3d: ", i); | 190 | seq_printf(p, "%3d: ", i); |
191 | #ifdef CONFIG_SMP | 191 | #ifdef CONFIG_SMP |
192 | for_each_online_cpu(j) | 192 | for_each_online_cpu(j) |
193 | seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); | 193 | seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); |
194 | #else | 194 | #else |
195 | seq_printf(p, "%10u ", kstat_irqs(i)); | 195 | seq_printf(p, "%10u ", kstat_irqs(i)); |
196 | #endif /* CONFIG_SMP */ | 196 | #endif /* CONFIG_SMP */ |
@@ -1038,7 +1038,7 @@ arch_initcall(irq_late_init); | |||
1038 | static int virq_debug_show(struct seq_file *m, void *private) | 1038 | static int virq_debug_show(struct seq_file *m, void *private) |
1039 | { | 1039 | { |
1040 | unsigned long flags; | 1040 | unsigned long flags; |
1041 | irq_desc_t *desc; | 1041 | struct irq_desc *desc; |
1042 | const char *p; | 1042 | const char *p; |
1043 | char none[] = "none"; | 1043 | char none[] = "none"; |
1044 | int i; | 1044 | int i; |
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c index 8992b031a7b6..8fbb12508bf3 100644 --- a/arch/powerpc/kernel/module_64.c +++ b/arch/powerpc/kernel/module_64.c | |||
@@ -329,7 +329,7 @@ static unsigned long stub_for_addr(Elf64_Shdr *sechdrs, | |||
329 | restore r2. */ | 329 | restore r2. */ |
330 | static int restore_r2(u32 *instruction, struct module *me) | 330 | static int restore_r2(u32 *instruction, struct module *me) |
331 | { | 331 | { |
332 | if (*instruction != PPC_NOP_INSTR) { | 332 | if (*instruction != PPC_INST_NOP) { |
333 | printk("%s: Expect noop after relocate, got %08x\n", | 333 | printk("%s: Expect noop after relocate, got %08x\n", |
334 | me->name, *instruction); | 334 | me->name, *instruction); |
335 | return 0; | 335 | return 0; |
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 0f4181272311..9c69e7e145c5 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <asm/eeh.h> | 38 | #include <asm/eeh.h> |
39 | 39 | ||
40 | static DEFINE_SPINLOCK(hose_spinlock); | 40 | static DEFINE_SPINLOCK(hose_spinlock); |
41 | LIST_HEAD(hose_list); | ||
41 | 42 | ||
42 | /* XXX kill that some day ... */ | 43 | /* XXX kill that some day ... */ |
43 | static int global_phb_number; /* Global phb counter */ | 44 | static int global_phb_number; /* Global phb counter */ |
@@ -49,7 +50,7 @@ resource_size_t isa_mem_base; | |||
49 | unsigned int ppc_pci_flags = 0; | 50 | unsigned int ppc_pci_flags = 0; |
50 | 51 | ||
51 | 52 | ||
52 | static struct dma_mapping_ops *pci_dma_ops; | 53 | static struct dma_mapping_ops *pci_dma_ops = &dma_direct_ops; |
53 | 54 | ||
54 | void set_pci_dma_ops(struct dma_mapping_ops *dma_ops) | 55 | void set_pci_dma_ops(struct dma_mapping_ops *dma_ops) |
55 | { | 56 | { |
@@ -113,19 +114,24 @@ void pcibios_free_controller(struct pci_controller *phb) | |||
113 | kfree(phb); | 114 | kfree(phb); |
114 | } | 115 | } |
115 | 116 | ||
117 | static resource_size_t pcibios_io_size(const struct pci_controller *hose) | ||
118 | { | ||
119 | #ifdef CONFIG_PPC64 | ||
120 | return hose->pci_io_size; | ||
121 | #else | ||
122 | return hose->io_resource.end - hose->io_resource.start + 1; | ||
123 | #endif | ||
124 | } | ||
125 | |||
116 | int pcibios_vaddr_is_ioport(void __iomem *address) | 126 | int pcibios_vaddr_is_ioport(void __iomem *address) |
117 | { | 127 | { |
118 | int ret = 0; | 128 | int ret = 0; |
119 | struct pci_controller *hose; | 129 | struct pci_controller *hose; |
120 | unsigned long size; | 130 | resource_size_t size; |
121 | 131 | ||
122 | spin_lock(&hose_spinlock); | 132 | spin_lock(&hose_spinlock); |
123 | list_for_each_entry(hose, &hose_list, list_node) { | 133 | list_for_each_entry(hose, &hose_list, list_node) { |
124 | #ifdef CONFIG_PPC64 | 134 | size = pcibios_io_size(hose); |
125 | size = hose->pci_io_size; | ||
126 | #else | ||
127 | size = hose->io_resource.end - hose->io_resource.start + 1; | ||
128 | #endif | ||
129 | if (address >= hose->io_base_virt && | 135 | if (address >= hose->io_base_virt && |
130 | address < (hose->io_base_virt + size)) { | 136 | address < (hose->io_base_virt + size)) { |
131 | ret = 1; | 137 | ret = 1; |
@@ -136,6 +142,29 @@ int pcibios_vaddr_is_ioport(void __iomem *address) | |||
136 | return ret; | 142 | return ret; |
137 | } | 143 | } |
138 | 144 | ||
145 | unsigned long pci_address_to_pio(phys_addr_t address) | ||
146 | { | ||
147 | struct pci_controller *hose; | ||
148 | resource_size_t size; | ||
149 | unsigned long ret = ~0; | ||
150 | |||
151 | spin_lock(&hose_spinlock); | ||
152 | list_for_each_entry(hose, &hose_list, list_node) { | ||
153 | size = pcibios_io_size(hose); | ||
154 | if (address >= hose->io_base_phys && | ||
155 | address < (hose->io_base_phys + size)) { | ||
156 | unsigned long base = | ||
157 | (unsigned long)hose->io_base_virt - _IO_BASE; | ||
158 | ret = base + (address - hose->io_base_phys); | ||
159 | break; | ||
160 | } | ||
161 | } | ||
162 | spin_unlock(&hose_spinlock); | ||
163 | |||
164 | return ret; | ||
165 | } | ||
166 | EXPORT_SYMBOL_GPL(pci_address_to_pio); | ||
167 | |||
139 | /* | 168 | /* |
140 | * Return the domain number for this bus. | 169 | * Return the domain number for this bus. |
141 | */ | 170 | */ |
@@ -1453,7 +1482,7 @@ void __init pcibios_resource_survey(void) | |||
1453 | * we proceed to assigning things that were left unassigned | 1482 | * we proceed to assigning things that were left unassigned |
1454 | */ | 1483 | */ |
1455 | if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) { | 1484 | if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) { |
1456 | pr_debug("PCI: Assigning unassigned resouces...\n"); | 1485 | pr_debug("PCI: Assigning unassigned resources...\n"); |
1457 | pci_assign_unassigned_resources(); | 1486 | pci_assign_unassigned_resources(); |
1458 | } | 1487 | } |
1459 | 1488 | ||
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c index 132cd80afa21..d473634e39e3 100644 --- a/arch/powerpc/kernel/pci_32.c +++ b/arch/powerpc/kernel/pci_32.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <asm/prom.h> | 20 | #include <asm/prom.h> |
21 | #include <asm/sections.h> | 21 | #include <asm/sections.h> |
22 | #include <asm/pci-bridge.h> | 22 | #include <asm/pci-bridge.h> |
23 | #include <asm/ppc-pci.h> | ||
23 | #include <asm/byteorder.h> | 24 | #include <asm/byteorder.h> |
24 | #include <asm/uaccess.h> | 25 | #include <asm/uaccess.h> |
25 | #include <asm/machdep.h> | 26 | #include <asm/machdep.h> |
@@ -43,8 +44,6 @@ static u8* pci_to_OF_bus_map; | |||
43 | */ | 44 | */ |
44 | static int pci_assign_all_buses; | 45 | static int pci_assign_all_buses; |
45 | 46 | ||
46 | LIST_HEAD(hose_list); | ||
47 | |||
48 | static int pci_bus_count; | 47 | static int pci_bus_count; |
49 | 48 | ||
50 | /* This will remain NULL for now, until isa-bridge.c is made common | 49 | /* This will remain NULL for now, until isa-bridge.c is made common |
@@ -219,16 +218,23 @@ scan_OF_pci_childs(struct device_node *parent, pci_OF_scan_iterator filter, void | |||
219 | static struct device_node *scan_OF_for_pci_dev(struct device_node *parent, | 218 | static struct device_node *scan_OF_for_pci_dev(struct device_node *parent, |
220 | unsigned int devfn) | 219 | unsigned int devfn) |
221 | { | 220 | { |
222 | struct device_node *np; | 221 | struct device_node *np, *cnp; |
223 | const u32 *reg; | 222 | const u32 *reg; |
224 | unsigned int psize; | 223 | unsigned int psize; |
225 | 224 | ||
226 | for_each_child_of_node(parent, np) { | 225 | for_each_child_of_node(parent, np) { |
227 | reg = of_get_property(np, "reg", &psize); | 226 | reg = of_get_property(np, "reg", &psize); |
228 | if (reg == NULL || psize < 4) | 227 | if (reg && psize >= 4 && ((reg[0] >> 8) & 0xff) == devfn) |
229 | continue; | ||
230 | if (((reg[0] >> 8) & 0xff) == devfn) | ||
231 | return np; | 228 | return np; |
229 | |||
230 | /* Note: some OFs create a parent node "multifunc-device" as | ||
231 | * a fake root for all functions of a multi-function device, | ||
232 | * we go down them as well. */ | ||
233 | if (!strcmp(np->name, "multifunc-device")) { | ||
234 | cnp = scan_OF_for_pci_dev(np, devfn); | ||
235 | if (cnp) | ||
236 | return cnp; | ||
237 | } | ||
232 | } | 238 | } |
233 | return NULL; | 239 | return NULL; |
234 | } | 240 | } |
@@ -491,24 +497,6 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) | |||
491 | return result; | 497 | return result; |
492 | } | 498 | } |
493 | 499 | ||
494 | unsigned long pci_address_to_pio(phys_addr_t address) | ||
495 | { | ||
496 | struct pci_controller *hose, *tmp; | ||
497 | |||
498 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { | ||
499 | unsigned int size = hose->io_resource.end - | ||
500 | hose->io_resource.start + 1; | ||
501 | if (address >= hose->io_base_phys && | ||
502 | address < (hose->io_base_phys + size)) { | ||
503 | unsigned long base = | ||
504 | (unsigned long)hose->io_base_virt - _IO_BASE; | ||
505 | return base + (address - hose->io_base_phys); | ||
506 | } | ||
507 | } | ||
508 | return (unsigned int)-1; | ||
509 | } | ||
510 | EXPORT_SYMBOL(pci_address_to_pio); | ||
511 | |||
512 | /* | 500 | /* |
513 | * Null PCI config access functions, for the case when we can't | 501 | * Null PCI config access functions, for the case when we can't |
514 | * find a hose. | 502 | * find a hose. |
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index ea8eda8c87cf..be574fc0d92f 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c | |||
@@ -43,8 +43,6 @@ unsigned long pci_probe_only = 1; | |||
43 | unsigned long pci_io_base = ISA_IO_BASE; | 43 | unsigned long pci_io_base = ISA_IO_BASE; |
44 | EXPORT_SYMBOL(pci_io_base); | 44 | EXPORT_SYMBOL(pci_io_base); |
45 | 45 | ||
46 | LIST_HEAD(hose_list); | ||
47 | |||
48 | static void fixup_broken_pcnet32(struct pci_dev* dev) | 46 | static void fixup_broken_pcnet32(struct pci_dev* dev) |
49 | { | 47 | { |
50 | if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { | 48 | if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { |
@@ -524,23 +522,6 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus) | |||
524 | } | 522 | } |
525 | EXPORT_SYMBOL_GPL(pcibios_map_io_space); | 523 | EXPORT_SYMBOL_GPL(pcibios_map_io_space); |
526 | 524 | ||
527 | unsigned long pci_address_to_pio(phys_addr_t address) | ||
528 | { | ||
529 | struct pci_controller *hose, *tmp; | ||
530 | |||
531 | list_for_each_entry_safe(hose, tmp, &hose_list, list_node) { | ||
532 | if (address >= hose->io_base_phys && | ||
533 | address < (hose->io_base_phys + hose->pci_io_size)) { | ||
534 | unsigned long base = | ||
535 | (unsigned long)hose->io_base_virt - _IO_BASE; | ||
536 | return base + (address - hose->io_base_phys); | ||
537 | } | ||
538 | } | ||
539 | return (unsigned int)-1; | ||
540 | } | ||
541 | EXPORT_SYMBOL_GPL(pci_address_to_pio); | ||
542 | |||
543 | |||
544 | #define IOBASE_BRIDGE_NUMBER 0 | 525 | #define IOBASE_BRIDGE_NUMBER 0 |
545 | #define IOBASE_MEMORY 1 | 526 | #define IOBASE_MEMORY 1 |
546 | #define IOBASE_IO 2 | 527 | #define IOBASE_IO 2 |
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index fb7049c054c0..eac064948780 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
@@ -33,7 +33,10 @@ | |||
33 | #include <linux/mqueue.h> | 33 | #include <linux/mqueue.h> |
34 | #include <linux/hardirq.h> | 34 | #include <linux/hardirq.h> |
35 | #include <linux/utsname.h> | 35 | #include <linux/utsname.h> |
36 | #include <linux/ftrace.h> | ||
36 | #include <linux/kernel_stat.h> | 37 | #include <linux/kernel_stat.h> |
38 | #include <linux/personality.h> | ||
39 | #include <linux/random.h> | ||
37 | 40 | ||
38 | #include <asm/pgtable.h> | 41 | #include <asm/pgtable.h> |
39 | #include <asm/uaccess.h> | 42 | #include <asm/uaccess.h> |
@@ -1008,6 +1011,14 @@ void show_stack(struct task_struct *tsk, unsigned long *stack) | |||
1008 | unsigned long sp, ip, lr, newsp; | 1011 | unsigned long sp, ip, lr, newsp; |
1009 | int count = 0; | 1012 | int count = 0; |
1010 | int firstframe = 1; | 1013 | int firstframe = 1; |
1014 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
1015 | int curr_frame = current->curr_ret_stack; | ||
1016 | extern void return_to_handler(void); | ||
1017 | unsigned long addr = (unsigned long)return_to_handler; | ||
1018 | #ifdef CONFIG_PPC64 | ||
1019 | addr = *(unsigned long*)addr; | ||
1020 | #endif | ||
1021 | #endif | ||
1011 | 1022 | ||
1012 | sp = (unsigned long) stack; | 1023 | sp = (unsigned long) stack; |
1013 | if (tsk == NULL) | 1024 | if (tsk == NULL) |
@@ -1030,6 +1041,13 @@ void show_stack(struct task_struct *tsk, unsigned long *stack) | |||
1030 | ip = stack[STACK_FRAME_LR_SAVE]; | 1041 | ip = stack[STACK_FRAME_LR_SAVE]; |
1031 | if (!firstframe || ip != lr) { | 1042 | if (!firstframe || ip != lr) { |
1032 | printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); | 1043 | printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); |
1044 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
1045 | if (ip == addr && curr_frame >= 0) { | ||
1046 | printk(" (%pS)", | ||
1047 | (void *)current->ret_stack[curr_frame].ret); | ||
1048 | curr_frame--; | ||
1049 | } | ||
1050 | #endif | ||
1033 | if (firstframe) | 1051 | if (firstframe) |
1034 | printk(" (unreliable)"); | 1052 | printk(" (unreliable)"); |
1035 | printk("\n"); | 1053 | printk("\n"); |
@@ -1122,3 +1140,43 @@ void thread_info_cache_init(void) | |||
1122 | } | 1140 | } |
1123 | 1141 | ||
1124 | #endif /* THREAD_SHIFT < PAGE_SHIFT */ | 1142 | #endif /* THREAD_SHIFT < PAGE_SHIFT */ |
1143 | |||
1144 | unsigned long arch_align_stack(unsigned long sp) | ||
1145 | { | ||
1146 | if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) | ||
1147 | sp -= get_random_int() & ~PAGE_MASK; | ||
1148 | return sp & ~0xf; | ||
1149 | } | ||
1150 | |||
1151 | static inline unsigned long brk_rnd(void) | ||
1152 | { | ||
1153 | unsigned long rnd = 0; | ||
1154 | |||
1155 | /* 8MB for 32bit, 1GB for 64bit */ | ||
1156 | if (is_32bit_task()) | ||
1157 | rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT))); | ||
1158 | else | ||
1159 | rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT))); | ||
1160 | |||
1161 | return rnd << PAGE_SHIFT; | ||
1162 | } | ||
1163 | |||
1164 | unsigned long arch_randomize_brk(struct mm_struct *mm) | ||
1165 | { | ||
1166 | unsigned long ret = PAGE_ALIGN(mm->brk + brk_rnd()); | ||
1167 | |||
1168 | if (ret < mm->brk) | ||
1169 | return mm->brk; | ||
1170 | |||
1171 | return ret; | ||
1172 | } | ||
1173 | |||
1174 | unsigned long randomize_et_dyn(unsigned long base) | ||
1175 | { | ||
1176 | unsigned long ret = PAGE_ALIGN(base + brk_rnd()); | ||
1177 | |||
1178 | if (ret < base) | ||
1179 | return base; | ||
1180 | |||
1181 | return ret; | ||
1182 | } | ||
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index f00f83109ab3..5ec6a9e23933 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c | |||
@@ -1075,11 +1075,6 @@ static void __init early_reserve_mem(void) | |||
1075 | DBG("reserving: %llx -> %llx\n", base, size); | 1075 | DBG("reserving: %llx -> %llx\n", base, size); |
1076 | lmb_reserve(base, size); | 1076 | lmb_reserve(base, size); |
1077 | } | 1077 | } |
1078 | |||
1079 | #if 0 | ||
1080 | DBG("memory reserved, lmbs :\n"); | ||
1081 | lmb_dump_all(); | ||
1082 | #endif | ||
1083 | } | 1078 | } |
1084 | 1079 | ||
1085 | #ifdef CONFIG_PHYP_DUMP | 1080 | #ifdef CONFIG_PHYP_DUMP |
@@ -1221,6 +1216,7 @@ void __init early_init_devtree(void *params) | |||
1221 | lmb_enforce_memory_limit(limit); | 1216 | lmb_enforce_memory_limit(limit); |
1222 | 1217 | ||
1223 | lmb_analyze(); | 1218 | lmb_analyze(); |
1219 | lmb_dump_all(); | ||
1224 | 1220 | ||
1225 | DBG("Phys. mem: %lx\n", lmb_phys_mem_size()); | 1221 | DBG("Phys. mem: %lx\n", lmb_phys_mem_size()); |
1226 | 1222 | ||
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 7f1b33d5e30d..2e026c0407d4 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c | |||
@@ -2283,6 +2283,8 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4, | |||
2283 | */ | 2283 | */ |
2284 | prom_init_stdout(); | 2284 | prom_init_stdout(); |
2285 | 2285 | ||
2286 | prom_printf("Preparing to boot %s", RELOC(linux_banner)); | ||
2287 | |||
2286 | /* | 2288 | /* |
2287 | * Get default machine type. At this point, we do not differentiate | 2289 | * Get default machine type. At this point, we do not differentiate |
2288 | * between pSeries SMP and pSeries LPAR | 2290 | * between pSeries SMP and pSeries LPAR |
diff --git a/arch/powerpc/kernel/prom_init_check.sh b/arch/powerpc/kernel/prom_init_check.sh index ea3a2ec03ffa..1ac136b128f0 100644 --- a/arch/powerpc/kernel/prom_init_check.sh +++ b/arch/powerpc/kernel/prom_init_check.sh | |||
@@ -20,7 +20,7 @@ WHITELIST="add_reloc_offset __bss_start __bss_stop copy_and_flush | |||
20 | _end enter_prom memcpy memset reloc_offset __secondary_hold | 20 | _end enter_prom memcpy memset reloc_offset __secondary_hold |
21 | __secondary_hold_acknowledge __secondary_hold_spinloop __start | 21 | __secondary_hold_acknowledge __secondary_hold_spinloop __start |
22 | strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224 | 22 | strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224 |
23 | reloc_got2 kernstart_addr memstart_addr" | 23 | reloc_got2 kernstart_addr memstart_addr linux_banner" |
24 | 24 | ||
25 | NM="$1" | 25 | NM="$1" |
26 | OBJ="$2" | 26 | OBJ="$2" |
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c index fdfe14c4bdef..ee4c7609b649 100644 --- a/arch/powerpc/kernel/rtas.c +++ b/arch/powerpc/kernel/rtas.c | |||
@@ -46,6 +46,7 @@ EXPORT_SYMBOL(rtas); | |||
46 | 46 | ||
47 | struct rtas_suspend_me_data { | 47 | struct rtas_suspend_me_data { |
48 | atomic_t working; /* number of cpus accessing this struct */ | 48 | atomic_t working; /* number of cpus accessing this struct */ |
49 | atomic_t done; | ||
49 | int token; /* ibm,suspend-me */ | 50 | int token; /* ibm,suspend-me */ |
50 | int error; | 51 | int error; |
51 | struct completion *complete; /* wait on this until working == 0 */ | 52 | struct completion *complete; /* wait on this until working == 0 */ |
@@ -689,7 +690,7 @@ static int ibm_suspend_me_token = RTAS_UNKNOWN_SERVICE; | |||
689 | #ifdef CONFIG_PPC_PSERIES | 690 | #ifdef CONFIG_PPC_PSERIES |
690 | static void rtas_percpu_suspend_me(void *info) | 691 | static void rtas_percpu_suspend_me(void *info) |
691 | { | 692 | { |
692 | long rc; | 693 | long rc = H_SUCCESS; |
693 | unsigned long msr_save; | 694 | unsigned long msr_save; |
694 | int cpu; | 695 | int cpu; |
695 | struct rtas_suspend_me_data *data = | 696 | struct rtas_suspend_me_data *data = |
@@ -701,7 +702,8 @@ static void rtas_percpu_suspend_me(void *info) | |||
701 | msr_save = mfmsr(); | 702 | msr_save = mfmsr(); |
702 | mtmsr(msr_save & ~(MSR_EE)); | 703 | mtmsr(msr_save & ~(MSR_EE)); |
703 | 704 | ||
704 | rc = plpar_hcall_norets(H_JOIN); | 705 | while (rc == H_SUCCESS && !atomic_read(&data->done)) |
706 | rc = plpar_hcall_norets(H_JOIN); | ||
705 | 707 | ||
706 | mtmsr(msr_save); | 708 | mtmsr(msr_save); |
707 | 709 | ||
@@ -724,6 +726,9 @@ static void rtas_percpu_suspend_me(void *info) | |||
724 | smp_processor_id(), rc); | 726 | smp_processor_id(), rc); |
725 | data->error = rc; | 727 | data->error = rc; |
726 | } | 728 | } |
729 | |||
730 | atomic_set(&data->done, 1); | ||
731 | |||
727 | /* This cpu did the suspend or got an error; in either case, | 732 | /* This cpu did the suspend or got an error; in either case, |
728 | * we need to prod all other other cpus out of join state. | 733 | * we need to prod all other other cpus out of join state. |
729 | * Extra prods are harmless. | 734 | * Extra prods are harmless. |
@@ -766,6 +771,7 @@ static int rtas_ibm_suspend_me(struct rtas_args *args) | |||
766 | } | 771 | } |
767 | 772 | ||
768 | atomic_set(&data.working, 0); | 773 | atomic_set(&data.working, 0); |
774 | atomic_set(&data.done, 0); | ||
769 | data.token = rtas_token("ibm,suspend-me"); | 775 | data.token = rtas_token("ibm,suspend-me"); |
770 | data.error = 0; | 776 | data.error = 0; |
771 | data.complete = &done; | 777 | data.complete = &done; |
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c index 705fc4bf3800..9774f9fed96e 100644 --- a/arch/powerpc/kernel/setup-common.c +++ b/arch/powerpc/kernel/setup-common.c | |||
@@ -35,6 +35,8 @@ | |||
35 | #include <linux/debugfs.h> | 35 | #include <linux/debugfs.h> |
36 | #include <linux/percpu.h> | 36 | #include <linux/percpu.h> |
37 | #include <linux/lmb.h> | 37 | #include <linux/lmb.h> |
38 | #include <linux/of_platform.h> | ||
39 | #include <linux/platform_device.h> | ||
38 | #include <asm/io.h> | 40 | #include <asm/io.h> |
39 | #include <asm/prom.h> | 41 | #include <asm/prom.h> |
40 | #include <asm/processor.h> | 42 | #include <asm/processor.h> |
@@ -669,3 +671,37 @@ static int powerpc_debugfs_init(void) | |||
669 | } | 671 | } |
670 | arch_initcall(powerpc_debugfs_init); | 672 | arch_initcall(powerpc_debugfs_init); |
671 | #endif | 673 | #endif |
674 | |||
675 | static int ppc_dflt_bus_notify(struct notifier_block *nb, | ||
676 | unsigned long action, void *data) | ||
677 | { | ||
678 | struct device *dev = data; | ||
679 | |||
680 | /* We are only intereted in device addition */ | ||
681 | if (action != BUS_NOTIFY_ADD_DEVICE) | ||
682 | return 0; | ||
683 | |||
684 | set_dma_ops(dev, &dma_direct_ops); | ||
685 | |||
686 | return NOTIFY_DONE; | ||
687 | } | ||
688 | |||
689 | static struct notifier_block ppc_dflt_plat_bus_notifier = { | ||
690 | .notifier_call = ppc_dflt_bus_notify, | ||
691 | .priority = INT_MAX, | ||
692 | }; | ||
693 | |||
694 | static struct notifier_block ppc_dflt_of_bus_notifier = { | ||
695 | .notifier_call = ppc_dflt_bus_notify, | ||
696 | .priority = INT_MAX, | ||
697 | }; | ||
698 | |||
699 | static int __init setup_bus_notifier(void) | ||
700 | { | ||
701 | bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier); | ||
702 | bus_register_notifier(&of_platform_bus_type, &ppc_dflt_of_bus_notifier); | ||
703 | |||
704 | return 0; | ||
705 | } | ||
706 | |||
707 | arch_initcall(setup_bus_notifier); | ||
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 2d34196bba8c..c410c606955d 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c | |||
@@ -202,8 +202,6 @@ void __init early_setup(unsigned long dt_ptr) | |||
202 | 202 | ||
203 | /* Fix up paca fields required for the boot cpu */ | 203 | /* Fix up paca fields required for the boot cpu */ |
204 | get_paca()->cpu_start = 1; | 204 | get_paca()->cpu_start = 1; |
205 | get_paca()->stab_real = __pa((u64)&initial_stab); | ||
206 | get_paca()->stab_addr = (u64)&initial_stab; | ||
207 | 205 | ||
208 | /* Probe the machine type */ | 206 | /* Probe the machine type */ |
209 | probe_machine(); | 207 | probe_machine(); |
@@ -212,20 +210,8 @@ void __init early_setup(unsigned long dt_ptr) | |||
212 | 210 | ||
213 | DBG("Found, Initializing memory management...\n"); | 211 | DBG("Found, Initializing memory management...\n"); |
214 | 212 | ||
215 | /* | 213 | /* Initialize the hash table or TLB handling */ |
216 | * Initialize the MMU Hash table and create the linear mapping | 214 | early_init_mmu(); |
217 | * of memory. Has to be done before stab/slb initialization as | ||
218 | * this is currently where the page size encoding is obtained | ||
219 | */ | ||
220 | htab_initialize(); | ||
221 | |||
222 | /* | ||
223 | * Initialize stab / SLB management except on iSeries | ||
224 | */ | ||
225 | if (cpu_has_feature(CPU_FTR_SLB)) | ||
226 | slb_initialize(); | ||
227 | else if (!firmware_has_feature(FW_FEATURE_ISERIES)) | ||
228 | stab_initialize(get_paca()->stab_real); | ||
229 | 215 | ||
230 | DBG(" <- early_setup()\n"); | 216 | DBG(" <- early_setup()\n"); |
231 | } | 217 | } |
@@ -233,22 +219,11 @@ void __init early_setup(unsigned long dt_ptr) | |||
233 | #ifdef CONFIG_SMP | 219 | #ifdef CONFIG_SMP |
234 | void early_setup_secondary(void) | 220 | void early_setup_secondary(void) |
235 | { | 221 | { |
236 | struct paca_struct *lpaca = get_paca(); | ||
237 | |||
238 | /* Mark interrupts enabled in PACA */ | 222 | /* Mark interrupts enabled in PACA */ |
239 | lpaca->soft_enabled = 0; | 223 | get_paca()->soft_enabled = 0; |
240 | 224 | ||
241 | /* Initialize hash table for that CPU */ | 225 | /* Initialize the hash table or TLB handling */ |
242 | htab_initialize_secondary(); | 226 | early_init_mmu_secondary(); |
243 | |||
244 | /* Initialize STAB/SLB. We use a virtual address as it works | ||
245 | * in real mode on pSeries and we want a virutal address on | ||
246 | * iSeries anyway | ||
247 | */ | ||
248 | if (cpu_has_feature(CPU_FTR_SLB)) | ||
249 | slb_initialize(); | ||
250 | else | ||
251 | stab_initialize(lpaca->stab_addr); | ||
252 | } | 227 | } |
253 | 228 | ||
254 | #endif /* CONFIG_SMP */ | 229 | #endif /* CONFIG_SMP */ |
@@ -578,13 +553,6 @@ void ppc64_boot_msg(unsigned int src, const char *msg) | |||
578 | printk("[boot]%04x %s\n", src, msg); | 553 | printk("[boot]%04x %s\n", src, msg); |
579 | } | 554 | } |
580 | 555 | ||
581 | /* Print a termination message (print only -- does not stop the kernel) */ | ||
582 | void ppc64_terminate_msg(unsigned int src, const char *msg) | ||
583 | { | ||
584 | ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg); | ||
585 | printk("[terminate]%04x %s\n", src, msg); | ||
586 | } | ||
587 | |||
588 | void cpu_die(void) | 556 | void cpu_die(void) |
589 | { | 557 | { |
590 | if (ppc_md.cpu_die) | 558 | if (ppc_md.cpu_die) |
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c index a54405ebd7b0..00b5078da9a3 100644 --- a/arch/powerpc/kernel/signal.c +++ b/arch/powerpc/kernel/signal.c | |||
@@ -26,12 +26,12 @@ int show_unhandled_signals = 0; | |||
26 | * Allocate space for the signal frame | 26 | * Allocate space for the signal frame |
27 | */ | 27 | */ |
28 | void __user * get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, | 28 | void __user * get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, |
29 | size_t frame_size) | 29 | size_t frame_size, int is_32) |
30 | { | 30 | { |
31 | unsigned long oldsp, newsp; | 31 | unsigned long oldsp, newsp; |
32 | 32 | ||
33 | /* Default to using normal stack */ | 33 | /* Default to using normal stack */ |
34 | oldsp = regs->gpr[1]; | 34 | oldsp = get_clean_sp(regs, is_32); |
35 | 35 | ||
36 | /* Check for alt stack */ | 36 | /* Check for alt stack */ |
37 | if ((ka->sa.sa_flags & SA_ONSTACK) && | 37 | if ((ka->sa.sa_flags & SA_ONSTACK) && |
diff --git a/arch/powerpc/kernel/signal.h b/arch/powerpc/kernel/signal.h index b427bf8e1d8f..6c0ddfc0603e 100644 --- a/arch/powerpc/kernel/signal.h +++ b/arch/powerpc/kernel/signal.h | |||
@@ -15,7 +15,7 @@ | |||
15 | extern void do_signal(struct pt_regs *regs, unsigned long thread_info_flags); | 15 | extern void do_signal(struct pt_regs *regs, unsigned long thread_info_flags); |
16 | 16 | ||
17 | extern void __user * get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, | 17 | extern void __user * get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, |
18 | size_t frame_size); | 18 | size_t frame_size, int is_32); |
19 | extern void restore_sigmask(sigset_t *set); | 19 | extern void restore_sigmask(sigset_t *set); |
20 | 20 | ||
21 | extern int handle_signal32(unsigned long sig, struct k_sigaction *ka, | 21 | extern int handle_signal32(unsigned long sig, struct k_sigaction *ka, |
@@ -39,22 +39,12 @@ extern unsigned long copy_vsx_from_user(struct task_struct *task, | |||
39 | 39 | ||
40 | #ifdef CONFIG_PPC64 | 40 | #ifdef CONFIG_PPC64 |
41 | 41 | ||
42 | static inline int is_32bit_task(void) | ||
43 | { | ||
44 | return test_thread_flag(TIF_32BIT); | ||
45 | } | ||
46 | |||
47 | extern int handle_rt_signal64(int signr, struct k_sigaction *ka, | 42 | extern int handle_rt_signal64(int signr, struct k_sigaction *ka, |
48 | siginfo_t *info, sigset_t *set, | 43 | siginfo_t *info, sigset_t *set, |
49 | struct pt_regs *regs); | 44 | struct pt_regs *regs); |
50 | 45 | ||
51 | #else /* CONFIG_PPC64 */ | 46 | #else /* CONFIG_PPC64 */ |
52 | 47 | ||
53 | static inline int is_32bit_task(void) | ||
54 | { | ||
55 | return 1; | ||
56 | } | ||
57 | |||
58 | static inline int handle_rt_signal64(int signr, struct k_sigaction *ka, | 48 | static inline int handle_rt_signal64(int signr, struct k_sigaction *ka, |
59 | siginfo_t *info, sigset_t *set, | 49 | siginfo_t *info, sigset_t *set, |
60 | struct pt_regs *regs) | 50 | struct pt_regs *regs) |
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c index b13abf305996..d670429a1608 100644 --- a/arch/powerpc/kernel/signal_32.c +++ b/arch/powerpc/kernel/signal_32.c | |||
@@ -836,7 +836,7 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka, | |||
836 | 836 | ||
837 | /* Set up Signal Frame */ | 837 | /* Set up Signal Frame */ |
838 | /* Put a Real Time Context onto stack */ | 838 | /* Put a Real Time Context onto stack */ |
839 | rt_sf = get_sigframe(ka, regs, sizeof(*rt_sf)); | 839 | rt_sf = get_sigframe(ka, regs, sizeof(*rt_sf), 1); |
840 | addr = rt_sf; | 840 | addr = rt_sf; |
841 | if (unlikely(rt_sf == NULL)) | 841 | if (unlikely(rt_sf == NULL)) |
842 | goto badframe; | 842 | goto badframe; |
@@ -1182,7 +1182,7 @@ int handle_signal32(unsigned long sig, struct k_sigaction *ka, | |||
1182 | unsigned long newsp = 0; | 1182 | unsigned long newsp = 0; |
1183 | 1183 | ||
1184 | /* Set up Signal Frame */ | 1184 | /* Set up Signal Frame */ |
1185 | frame = get_sigframe(ka, regs, sizeof(*frame)); | 1185 | frame = get_sigframe(ka, regs, sizeof(*frame), 1); |
1186 | if (unlikely(frame == NULL)) | 1186 | if (unlikely(frame == NULL)) |
1187 | goto badframe; | 1187 | goto badframe; |
1188 | sc = (struct sigcontext __user *) &frame->sctx; | 1188 | sc = (struct sigcontext __user *) &frame->sctx; |
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c index e132891d3cea..2fe6fc64b614 100644 --- a/arch/powerpc/kernel/signal_64.c +++ b/arch/powerpc/kernel/signal_64.c | |||
@@ -402,7 +402,7 @@ int handle_rt_signal64(int signr, struct k_sigaction *ka, siginfo_t *info, | |||
402 | unsigned long newsp = 0; | 402 | unsigned long newsp = 0; |
403 | long err = 0; | 403 | long err = 0; |
404 | 404 | ||
405 | frame = get_sigframe(ka, regs, sizeof(*frame)); | 405 | frame = get_sigframe(ka, regs, sizeof(*frame), 0); |
406 | if (unlikely(frame == NULL)) | 406 | if (unlikely(frame == NULL)) |
407 | goto badframe; | 407 | goto badframe; |
408 | 408 | ||
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c index 4a2ee08af6a7..f41aec85aa49 100644 --- a/arch/powerpc/kernel/sysfs.c +++ b/arch/powerpc/kernel/sysfs.c | |||
@@ -134,44 +134,23 @@ void ppc_enable_pmcs(void) | |||
134 | } | 134 | } |
135 | EXPORT_SYMBOL(ppc_enable_pmcs); | 135 | EXPORT_SYMBOL(ppc_enable_pmcs); |
136 | 136 | ||
137 | #if defined(CONFIG_6xx) || defined(CONFIG_PPC64) | ||
138 | /* XXX convert to rusty's on_one_cpu */ | ||
139 | static unsigned long run_on_cpu(unsigned long cpu, | ||
140 | unsigned long (*func)(unsigned long), | ||
141 | unsigned long arg) | ||
142 | { | ||
143 | cpumask_t old_affinity = current->cpus_allowed; | ||
144 | unsigned long ret; | ||
145 | |||
146 | /* should return -EINVAL to userspace */ | ||
147 | if (set_cpus_allowed(current, cpumask_of_cpu(cpu))) | ||
148 | return 0; | ||
149 | |||
150 | ret = func(arg); | ||
151 | |||
152 | set_cpus_allowed(current, old_affinity); | ||
153 | |||
154 | return ret; | ||
155 | } | ||
156 | #endif | ||
157 | |||
158 | #define SYSFS_PMCSETUP(NAME, ADDRESS) \ | 137 | #define SYSFS_PMCSETUP(NAME, ADDRESS) \ |
159 | static unsigned long read_##NAME(unsigned long junk) \ | 138 | static void read_##NAME(void *val) \ |
160 | { \ | 139 | { \ |
161 | return mfspr(ADDRESS); \ | 140 | *(unsigned long *)val = mfspr(ADDRESS); \ |
162 | } \ | 141 | } \ |
163 | static unsigned long write_##NAME(unsigned long val) \ | 142 | static void write_##NAME(void *val) \ |
164 | { \ | 143 | { \ |
165 | ppc_enable_pmcs(); \ | 144 | ppc_enable_pmcs(); \ |
166 | mtspr(ADDRESS, val); \ | 145 | mtspr(ADDRESS, *(unsigned long *)val); \ |
167 | return 0; \ | ||
168 | } \ | 146 | } \ |
169 | static ssize_t show_##NAME(struct sys_device *dev, \ | 147 | static ssize_t show_##NAME(struct sys_device *dev, \ |
170 | struct sysdev_attribute *attr, \ | 148 | struct sysdev_attribute *attr, \ |
171 | char *buf) \ | 149 | char *buf) \ |
172 | { \ | 150 | { \ |
173 | struct cpu *cpu = container_of(dev, struct cpu, sysdev); \ | 151 | struct cpu *cpu = container_of(dev, struct cpu, sysdev); \ |
174 | unsigned long val = run_on_cpu(cpu->sysdev.id, read_##NAME, 0); \ | 152 | unsigned long val; \ |
153 | smp_call_function_single(cpu->sysdev.id, read_##NAME, &val, 1); \ | ||
175 | return sprintf(buf, "%lx\n", val); \ | 154 | return sprintf(buf, "%lx\n", val); \ |
176 | } \ | 155 | } \ |
177 | static ssize_t __used \ | 156 | static ssize_t __used \ |
@@ -183,7 +162,7 @@ static ssize_t __used \ | |||
183 | int ret = sscanf(buf, "%lx", &val); \ | 162 | int ret = sscanf(buf, "%lx", &val); \ |
184 | if (ret != 1) \ | 163 | if (ret != 1) \ |
185 | return -EINVAL; \ | 164 | return -EINVAL; \ |
186 | run_on_cpu(cpu->sysdev.id, write_##NAME, val); \ | 165 | smp_call_function_single(cpu->sysdev.id, write_##NAME, &val, 1); \ |
187 | return count; \ | 166 | return count; \ |
188 | } | 167 | } |
189 | 168 | ||
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 5457e9575685..678fbff0d206 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
@@ -52,6 +52,10 @@ | |||
52 | #include <asm/processor.h> | 52 | #include <asm/processor.h> |
53 | #endif | 53 | #endif |
54 | #include <asm/kexec.h> | 54 | #include <asm/kexec.h> |
55 | #include <asm/ppc-opcode.h> | ||
56 | #ifdef CONFIG_FSL_BOOKE | ||
57 | #include <asm/dbell.h> | ||
58 | #endif | ||
55 | 59 | ||
56 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) | 60 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) |
57 | int (*__debugger)(struct pt_regs *regs); | 61 | int (*__debugger)(struct pt_regs *regs); |
@@ -637,29 +641,6 @@ static void parse_fpe(struct pt_regs *regs) | |||
637 | * bits is faster and easier. | 641 | * bits is faster and easier. |
638 | * | 642 | * |
639 | */ | 643 | */ |
640 | #define INST_MFSPR_PVR 0x7c1f42a6 | ||
641 | #define INST_MFSPR_PVR_MASK 0xfc1fffff | ||
642 | |||
643 | #define INST_DCBA 0x7c0005ec | ||
644 | #define INST_DCBA_MASK 0xfc0007fe | ||
645 | |||
646 | #define INST_MCRXR 0x7c000400 | ||
647 | #define INST_MCRXR_MASK 0xfc0007fe | ||
648 | |||
649 | #define INST_STRING 0x7c00042a | ||
650 | #define INST_STRING_MASK 0xfc0007fe | ||
651 | #define INST_STRING_GEN_MASK 0xfc00067e | ||
652 | #define INST_LSWI 0x7c0004aa | ||
653 | #define INST_LSWX 0x7c00042a | ||
654 | #define INST_STSWI 0x7c0005aa | ||
655 | #define INST_STSWX 0x7c00052a | ||
656 | |||
657 | #define INST_POPCNTB 0x7c0000f4 | ||
658 | #define INST_POPCNTB_MASK 0xfc0007fe | ||
659 | |||
660 | #define INST_ISEL 0x7c00001e | ||
661 | #define INST_ISEL_MASK 0xfc00003e | ||
662 | |||
663 | static int emulate_string_inst(struct pt_regs *regs, u32 instword) | 644 | static int emulate_string_inst(struct pt_regs *regs, u32 instword) |
664 | { | 645 | { |
665 | u8 rT = (instword >> 21) & 0x1f; | 646 | u8 rT = (instword >> 21) & 0x1f; |
@@ -670,20 +651,20 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword) | |||
670 | int pos = 0; | 651 | int pos = 0; |
671 | 652 | ||
672 | /* Early out if we are an invalid form of lswx */ | 653 | /* Early out if we are an invalid form of lswx */ |
673 | if ((instword & INST_STRING_MASK) == INST_LSWX) | 654 | if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX) |
674 | if ((rT == rA) || (rT == NB_RB)) | 655 | if ((rT == rA) || (rT == NB_RB)) |
675 | return -EINVAL; | 656 | return -EINVAL; |
676 | 657 | ||
677 | EA = (rA == 0) ? 0 : regs->gpr[rA]; | 658 | EA = (rA == 0) ? 0 : regs->gpr[rA]; |
678 | 659 | ||
679 | switch (instword & INST_STRING_MASK) { | 660 | switch (instword & PPC_INST_STRING_MASK) { |
680 | case INST_LSWX: | 661 | case PPC_INST_LSWX: |
681 | case INST_STSWX: | 662 | case PPC_INST_STSWX: |
682 | EA += NB_RB; | 663 | EA += NB_RB; |
683 | num_bytes = regs->xer & 0x7f; | 664 | num_bytes = regs->xer & 0x7f; |
684 | break; | 665 | break; |
685 | case INST_LSWI: | 666 | case PPC_INST_LSWI: |
686 | case INST_STSWI: | 667 | case PPC_INST_STSWI: |
687 | num_bytes = (NB_RB == 0) ? 32 : NB_RB; | 668 | num_bytes = (NB_RB == 0) ? 32 : NB_RB; |
688 | break; | 669 | break; |
689 | default: | 670 | default: |
@@ -695,9 +676,9 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword) | |||
695 | u8 val; | 676 | u8 val; |
696 | u32 shift = 8 * (3 - (pos & 0x3)); | 677 | u32 shift = 8 * (3 - (pos & 0x3)); |
697 | 678 | ||
698 | switch ((instword & INST_STRING_MASK)) { | 679 | switch ((instword & PPC_INST_STRING_MASK)) { |
699 | case INST_LSWX: | 680 | case PPC_INST_LSWX: |
700 | case INST_LSWI: | 681 | case PPC_INST_LSWI: |
701 | if (get_user(val, (u8 __user *)EA)) | 682 | if (get_user(val, (u8 __user *)EA)) |
702 | return -EFAULT; | 683 | return -EFAULT; |
703 | /* first time updating this reg, | 684 | /* first time updating this reg, |
@@ -706,8 +687,8 @@ static int emulate_string_inst(struct pt_regs *regs, u32 instword) | |||
706 | regs->gpr[rT] = 0; | 687 | regs->gpr[rT] = 0; |
707 | regs->gpr[rT] |= val << shift; | 688 | regs->gpr[rT] |= val << shift; |
708 | break; | 689 | break; |
709 | case INST_STSWI: | 690 | case PPC_INST_STSWI: |
710 | case INST_STSWX: | 691 | case PPC_INST_STSWX: |
711 | val = regs->gpr[rT] >> shift; | 692 | val = regs->gpr[rT] >> shift; |
712 | if (put_user(val, (u8 __user *)EA)) | 693 | if (put_user(val, (u8 __user *)EA)) |
713 | return -EFAULT; | 694 | return -EFAULT; |
@@ -775,18 +756,18 @@ static int emulate_instruction(struct pt_regs *regs) | |||
775 | return -EFAULT; | 756 | return -EFAULT; |
776 | 757 | ||
777 | /* Emulate the mfspr rD, PVR. */ | 758 | /* Emulate the mfspr rD, PVR. */ |
778 | if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) { | 759 | if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) { |
779 | rd = (instword >> 21) & 0x1f; | 760 | rd = (instword >> 21) & 0x1f; |
780 | regs->gpr[rd] = mfspr(SPRN_PVR); | 761 | regs->gpr[rd] = mfspr(SPRN_PVR); |
781 | return 0; | 762 | return 0; |
782 | } | 763 | } |
783 | 764 | ||
784 | /* Emulating the dcba insn is just a no-op. */ | 765 | /* Emulating the dcba insn is just a no-op. */ |
785 | if ((instword & INST_DCBA_MASK) == INST_DCBA) | 766 | if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) |
786 | return 0; | 767 | return 0; |
787 | 768 | ||
788 | /* Emulate the mcrxr insn. */ | 769 | /* Emulate the mcrxr insn. */ |
789 | if ((instword & INST_MCRXR_MASK) == INST_MCRXR) { | 770 | if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) { |
790 | int shift = (instword >> 21) & 0x1c; | 771 | int shift = (instword >> 21) & 0x1c; |
791 | unsigned long msk = 0xf0000000UL >> shift; | 772 | unsigned long msk = 0xf0000000UL >> shift; |
792 | 773 | ||
@@ -796,16 +777,16 @@ static int emulate_instruction(struct pt_regs *regs) | |||
796 | } | 777 | } |
797 | 778 | ||
798 | /* Emulate load/store string insn. */ | 779 | /* Emulate load/store string insn. */ |
799 | if ((instword & INST_STRING_GEN_MASK) == INST_STRING) | 780 | if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) |
800 | return emulate_string_inst(regs, instword); | 781 | return emulate_string_inst(regs, instword); |
801 | 782 | ||
802 | /* Emulate the popcntb (Population Count Bytes) instruction. */ | 783 | /* Emulate the popcntb (Population Count Bytes) instruction. */ |
803 | if ((instword & INST_POPCNTB_MASK) == INST_POPCNTB) { | 784 | if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) { |
804 | return emulate_popcntb_inst(regs, instword); | 785 | return emulate_popcntb_inst(regs, instword); |
805 | } | 786 | } |
806 | 787 | ||
807 | /* Emulate isel (Integer Select) instruction */ | 788 | /* Emulate isel (Integer Select) instruction */ |
808 | if ((instword & INST_ISEL_MASK) == INST_ISEL) { | 789 | if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) { |
809 | return emulate_isel(regs, instword); | 790 | return emulate_isel(regs, instword); |
810 | } | 791 | } |
811 | 792 | ||
@@ -1144,6 +1125,24 @@ void vsx_assist_exception(struct pt_regs *regs) | |||
1144 | #endif /* CONFIG_VSX */ | 1125 | #endif /* CONFIG_VSX */ |
1145 | 1126 | ||
1146 | #ifdef CONFIG_FSL_BOOKE | 1127 | #ifdef CONFIG_FSL_BOOKE |
1128 | |||
1129 | void doorbell_exception(struct pt_regs *regs) | ||
1130 | { | ||
1131 | #ifdef CONFIG_SMP | ||
1132 | int cpu = smp_processor_id(); | ||
1133 | int msg; | ||
1134 | |||
1135 | if (num_online_cpus() < 2) | ||
1136 | return; | ||
1137 | |||
1138 | for (msg = 0; msg < 4; msg++) | ||
1139 | if (test_and_clear_bit(msg, &dbell_smp_message[cpu])) | ||
1140 | smp_message_recv(msg); | ||
1141 | #else | ||
1142 | printk(KERN_WARNING "Received doorbell on non-smp system\n"); | ||
1143 | #endif | ||
1144 | } | ||
1145 | |||
1147 | void CacheLockingException(struct pt_regs *regs, unsigned long address, | 1146 | void CacheLockingException(struct pt_regs *regs, unsigned long address, |
1148 | unsigned long error_code) | 1147 | unsigned long error_code) |
1149 | { | 1148 | { |
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c index 7d6c9bb8c77f..fc9af47e2128 100644 --- a/arch/powerpc/kernel/udbg.c +++ b/arch/powerpc/kernel/udbg.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <asm/udbg.h> | 18 | #include <asm/udbg.h> |
19 | 19 | ||
20 | void (*udbg_putc)(char c); | 20 | void (*udbg_putc)(char c); |
21 | void (*udbg_flush)(void); | ||
21 | int (*udbg_getc)(void); | 22 | int (*udbg_getc)(void); |
22 | int (*udbg_getc_poll)(void); | 23 | int (*udbg_getc_poll)(void); |
23 | 24 | ||
@@ -76,6 +77,9 @@ void udbg_puts(const char *s) | |||
76 | while ((c = *s++) != '\0') | 77 | while ((c = *s++) != '\0') |
77 | udbg_putc(c); | 78 | udbg_putc(c); |
78 | } | 79 | } |
80 | |||
81 | if (udbg_flush) | ||
82 | udbg_flush(); | ||
79 | } | 83 | } |
80 | #if 0 | 84 | #if 0 |
81 | else { | 85 | else { |
@@ -98,6 +102,9 @@ int udbg_write(const char *s, int n) | |||
98 | } | 102 | } |
99 | } | 103 | } |
100 | 104 | ||
105 | if (udbg_flush) | ||
106 | udbg_flush(); | ||
107 | |||
101 | return n - remain; | 108 | return n - remain; |
102 | } | 109 | } |
103 | 110 | ||
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c index 7b7da8cfd5e8..0362a891e54e 100644 --- a/arch/powerpc/kernel/udbg_16550.c +++ b/arch/powerpc/kernel/udbg_16550.c | |||
@@ -48,14 +48,21 @@ struct NS16550 { | |||
48 | 48 | ||
49 | static struct NS16550 __iomem *udbg_comport; | 49 | static struct NS16550 __iomem *udbg_comport; |
50 | 50 | ||
51 | static void udbg_550_putc(char c) | 51 | static void udbg_550_flush(void) |
52 | { | 52 | { |
53 | if (udbg_comport) { | 53 | if (udbg_comport) { |
54 | while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0) | 54 | while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0) |
55 | /* wait for idle */; | 55 | /* wait for idle */; |
56 | out_8(&udbg_comport->thr, c); | 56 | } |
57 | } | ||
58 | |||
59 | static void udbg_550_putc(char c) | ||
60 | { | ||
61 | if (udbg_comport) { | ||
57 | if (c == '\n') | 62 | if (c == '\n') |
58 | udbg_550_putc('\r'); | 63 | udbg_550_putc('\r'); |
64 | udbg_550_flush(); | ||
65 | out_8(&udbg_comport->thr, c); | ||
59 | } | 66 | } |
60 | } | 67 | } |
61 | 68 | ||
@@ -108,6 +115,7 @@ void udbg_init_uart(void __iomem *comport, unsigned int speed, | |||
108 | /* Clear & enable FIFOs */ | 115 | /* Clear & enable FIFOs */ |
109 | out_8(&udbg_comport->fcr ,0x07); | 116 | out_8(&udbg_comport->fcr ,0x07); |
110 | udbg_putc = udbg_550_putc; | 117 | udbg_putc = udbg_550_putc; |
118 | udbg_flush = udbg_550_flush; | ||
111 | udbg_getc = udbg_550_getc; | 119 | udbg_getc = udbg_550_getc; |
112 | udbg_getc_poll = udbg_550_getc_poll; | 120 | udbg_getc_poll = udbg_550_getc_poll; |
113 | } | 121 | } |
@@ -149,14 +157,21 @@ unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock) | |||
149 | } | 157 | } |
150 | 158 | ||
151 | #ifdef CONFIG_PPC_MAPLE | 159 | #ifdef CONFIG_PPC_MAPLE |
152 | void udbg_maple_real_putc(char c) | 160 | void udbg_maple_real_flush(void) |
153 | { | 161 | { |
154 | if (udbg_comport) { | 162 | if (udbg_comport) { |
155 | while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0) | 163 | while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0) |
156 | /* wait for idle */; | 164 | /* wait for idle */; |
157 | real_writeb(c, &udbg_comport->thr); eieio(); | 165 | } |
166 | } | ||
167 | |||
168 | void udbg_maple_real_putc(char c) | ||
169 | { | ||
170 | if (udbg_comport) { | ||
158 | if (c == '\n') | 171 | if (c == '\n') |
159 | udbg_maple_real_putc('\r'); | 172 | udbg_maple_real_putc('\r'); |
173 | udbg_maple_real_flush(); | ||
174 | real_writeb(c, &udbg_comport->thr); eieio(); | ||
160 | } | 175 | } |
161 | } | 176 | } |
162 | 177 | ||
@@ -165,20 +180,28 @@ void __init udbg_init_maple_realmode(void) | |||
165 | udbg_comport = (struct NS16550 __iomem *)0xf40003f8; | 180 | udbg_comport = (struct NS16550 __iomem *)0xf40003f8; |
166 | 181 | ||
167 | udbg_putc = udbg_maple_real_putc; | 182 | udbg_putc = udbg_maple_real_putc; |
183 | udbg_flush = udbg_maple_real_flush; | ||
168 | udbg_getc = NULL; | 184 | udbg_getc = NULL; |
169 | udbg_getc_poll = NULL; | 185 | udbg_getc_poll = NULL; |
170 | } | 186 | } |
171 | #endif /* CONFIG_PPC_MAPLE */ | 187 | #endif /* CONFIG_PPC_MAPLE */ |
172 | 188 | ||
173 | #ifdef CONFIG_PPC_PASEMI | 189 | #ifdef CONFIG_PPC_PASEMI |
174 | void udbg_pas_real_putc(char c) | 190 | void udbg_pas_real_flush(void) |
175 | { | 191 | { |
176 | if (udbg_comport) { | 192 | if (udbg_comport) { |
177 | while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0) | 193 | while ((real_205_readb(&udbg_comport->lsr) & LSR_THRE) == 0) |
178 | /* wait for idle */; | 194 | /* wait for idle */; |
179 | real_205_writeb(c, &udbg_comport->thr); eieio(); | 195 | } |
196 | } | ||
197 | |||
198 | void udbg_pas_real_putc(char c) | ||
199 | { | ||
200 | if (udbg_comport) { | ||
180 | if (c == '\n') | 201 | if (c == '\n') |
181 | udbg_pas_real_putc('\r'); | 202 | udbg_pas_real_putc('\r'); |
203 | udbg_pas_real_flush(); | ||
204 | real_205_writeb(c, &udbg_comport->thr); eieio(); | ||
182 | } | 205 | } |
183 | } | 206 | } |
184 | 207 | ||
@@ -187,6 +210,7 @@ void udbg_init_pas_realmode(void) | |||
187 | udbg_comport = (struct NS16550 __iomem *)0xfcff03f8UL; | 210 | udbg_comport = (struct NS16550 __iomem *)0xfcff03f8UL; |
188 | 211 | ||
189 | udbg_putc = udbg_pas_real_putc; | 212 | udbg_putc = udbg_pas_real_putc; |
213 | udbg_flush = udbg_pas_real_flush; | ||
190 | udbg_getc = NULL; | 214 | udbg_getc = NULL; |
191 | udbg_getc_poll = NULL; | 215 | udbg_getc_poll = NULL; |
192 | } | 216 | } |
@@ -195,14 +219,21 @@ void udbg_init_pas_realmode(void) | |||
195 | #ifdef CONFIG_PPC_EARLY_DEBUG_44x | 219 | #ifdef CONFIG_PPC_EARLY_DEBUG_44x |
196 | #include <platforms/44x/44x.h> | 220 | #include <platforms/44x/44x.h> |
197 | 221 | ||
198 | static void udbg_44x_as1_putc(char c) | 222 | static int udbg_44x_as1_flush(void) |
199 | { | 223 | { |
200 | if (udbg_comport) { | 224 | if (udbg_comport) { |
201 | while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0) | 225 | while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0) |
202 | /* wait for idle */; | 226 | /* wait for idle */; |
203 | as1_writeb(c, &udbg_comport->thr); eieio(); | 227 | } |
228 | } | ||
229 | |||
230 | static void udbg_44x_as1_putc(char c) | ||
231 | { | ||
232 | if (udbg_comport) { | ||
204 | if (c == '\n') | 233 | if (c == '\n') |
205 | udbg_44x_as1_putc('\r'); | 234 | udbg_44x_as1_putc('\r'); |
235 | udbg_44x_as1_flush(); | ||
236 | as1_writeb(c, &udbg_comport->thr); eieio(); | ||
206 | } | 237 | } |
207 | } | 238 | } |
208 | 239 | ||
@@ -222,19 +253,27 @@ void __init udbg_init_44x_as1(void) | |||
222 | (struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR; | 253 | (struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR; |
223 | 254 | ||
224 | udbg_putc = udbg_44x_as1_putc; | 255 | udbg_putc = udbg_44x_as1_putc; |
256 | udbg_flush = udbg_44x_as1_flush; | ||
225 | udbg_getc = udbg_44x_as1_getc; | 257 | udbg_getc = udbg_44x_as1_getc; |
226 | } | 258 | } |
227 | #endif /* CONFIG_PPC_EARLY_DEBUG_44x */ | 259 | #endif /* CONFIG_PPC_EARLY_DEBUG_44x */ |
228 | 260 | ||
229 | #ifdef CONFIG_PPC_EARLY_DEBUG_40x | 261 | #ifdef CONFIG_PPC_EARLY_DEBUG_40x |
230 | static void udbg_40x_real_putc(char c) | 262 | static void udbg_40x_real_flush(void) |
231 | { | 263 | { |
232 | if (udbg_comport) { | 264 | if (udbg_comport) { |
233 | while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0) | 265 | while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0) |
234 | /* wait for idle */; | 266 | /* wait for idle */; |
235 | real_writeb(c, &udbg_comport->thr); eieio(); | 267 | } |
268 | } | ||
269 | |||
270 | static void udbg_40x_real_putc(char c) | ||
271 | { | ||
272 | if (udbg_comport) { | ||
236 | if (c == '\n') | 273 | if (c == '\n') |
237 | udbg_40x_real_putc('\r'); | 274 | udbg_40x_real_putc('\r'); |
275 | udbg_40x_real_flush(); | ||
276 | real_writeb(c, &udbg_comport->thr); eieio(); | ||
238 | } | 277 | } |
239 | } | 278 | } |
240 | 279 | ||
@@ -254,6 +293,7 @@ void __init udbg_init_40x_realmode(void) | |||
254 | CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR; | 293 | CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR; |
255 | 294 | ||
256 | udbg_putc = udbg_40x_real_putc; | 295 | udbg_putc = udbg_40x_real_putc; |
296 | udbg_flush = udbg_40x_real_flush; | ||
257 | udbg_getc = udbg_40x_real_getc; | 297 | udbg_getc = udbg_40x_real_getc; |
258 | udbg_getc_poll = NULL; | 298 | udbg_getc_poll = NULL; |
259 | } | 299 | } |
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S index 295ccc5e86b1..b9ef1644a722 100644 --- a/arch/powerpc/kernel/vmlinux.lds.S +++ b/arch/powerpc/kernel/vmlinux.lds.S | |||
@@ -58,6 +58,7 @@ SECTIONS | |||
58 | SCHED_TEXT | 58 | SCHED_TEXT |
59 | LOCK_TEXT | 59 | LOCK_TEXT |
60 | KPROBES_TEXT | 60 | KPROBES_TEXT |
61 | IRQENTRY_TEXT | ||
61 | 62 | ||
62 | #ifdef CONFIG_PPC32 | 63 | #ifdef CONFIG_PPC32 |
63 | *(.got1) | 64 | *(.got1) |
@@ -181,14 +182,7 @@ SECTIONS | |||
181 | __initramfs_end = .; | 182 | __initramfs_end = .; |
182 | } | 183 | } |
183 | #endif | 184 | #endif |
184 | . = ALIGN(PAGE_SIZE); | 185 | PERCPU(PAGE_SIZE) |
185 | .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { | ||
186 | __per_cpu_start = .; | ||
187 | *(.data.percpu.page_aligned) | ||
188 | *(.data.percpu) | ||
189 | *(.data.percpu.shared_aligned) | ||
190 | __per_cpu_end = .; | ||
191 | } | ||
192 | 186 | ||
193 | . = ALIGN(8); | 187 | . = ALIGN(8); |
194 | .machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) { | 188 | .machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) { |
diff --git a/arch/powerpc/kvm/44x.c b/arch/powerpc/kvm/44x.c index a66bec57265a..0cef809cec21 100644 --- a/arch/powerpc/kvm/44x.c +++ b/arch/powerpc/kvm/44x.c | |||
@@ -28,72 +28,6 @@ | |||
28 | 28 | ||
29 | #include "44x_tlb.h" | 29 | #include "44x_tlb.h" |
30 | 30 | ||
31 | /* Note: clearing MSR[DE] just means that the debug interrupt will not be | ||
32 | * delivered *immediately*. Instead, it simply sets the appropriate DBSR bits. | ||
33 | * If those DBSR bits are still set when MSR[DE] is re-enabled, the interrupt | ||
34 | * will be delivered as an "imprecise debug event" (which is indicated by | ||
35 | * DBSR[IDE]. | ||
36 | */ | ||
37 | static void kvm44x_disable_debug_interrupts(void) | ||
38 | { | ||
39 | mtmsr(mfmsr() & ~MSR_DE); | ||
40 | } | ||
41 | |||
42 | void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu) | ||
43 | { | ||
44 | kvm44x_disable_debug_interrupts(); | ||
45 | |||
46 | mtspr(SPRN_IAC1, vcpu->arch.host_iac[0]); | ||
47 | mtspr(SPRN_IAC2, vcpu->arch.host_iac[1]); | ||
48 | mtspr(SPRN_IAC3, vcpu->arch.host_iac[2]); | ||
49 | mtspr(SPRN_IAC4, vcpu->arch.host_iac[3]); | ||
50 | mtspr(SPRN_DBCR1, vcpu->arch.host_dbcr1); | ||
51 | mtspr(SPRN_DBCR2, vcpu->arch.host_dbcr2); | ||
52 | mtspr(SPRN_DBCR0, vcpu->arch.host_dbcr0); | ||
53 | mtmsr(vcpu->arch.host_msr); | ||
54 | } | ||
55 | |||
56 | void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu) | ||
57 | { | ||
58 | struct kvm_guest_debug *dbg = &vcpu->guest_debug; | ||
59 | u32 dbcr0 = 0; | ||
60 | |||
61 | vcpu->arch.host_msr = mfmsr(); | ||
62 | kvm44x_disable_debug_interrupts(); | ||
63 | |||
64 | /* Save host debug register state. */ | ||
65 | vcpu->arch.host_iac[0] = mfspr(SPRN_IAC1); | ||
66 | vcpu->arch.host_iac[1] = mfspr(SPRN_IAC2); | ||
67 | vcpu->arch.host_iac[2] = mfspr(SPRN_IAC3); | ||
68 | vcpu->arch.host_iac[3] = mfspr(SPRN_IAC4); | ||
69 | vcpu->arch.host_dbcr0 = mfspr(SPRN_DBCR0); | ||
70 | vcpu->arch.host_dbcr1 = mfspr(SPRN_DBCR1); | ||
71 | vcpu->arch.host_dbcr2 = mfspr(SPRN_DBCR2); | ||
72 | |||
73 | /* set registers up for guest */ | ||
74 | |||
75 | if (dbg->bp[0]) { | ||
76 | mtspr(SPRN_IAC1, dbg->bp[0]); | ||
77 | dbcr0 |= DBCR0_IAC1 | DBCR0_IDM; | ||
78 | } | ||
79 | if (dbg->bp[1]) { | ||
80 | mtspr(SPRN_IAC2, dbg->bp[1]); | ||
81 | dbcr0 |= DBCR0_IAC2 | DBCR0_IDM; | ||
82 | } | ||
83 | if (dbg->bp[2]) { | ||
84 | mtspr(SPRN_IAC3, dbg->bp[2]); | ||
85 | dbcr0 |= DBCR0_IAC3 | DBCR0_IDM; | ||
86 | } | ||
87 | if (dbg->bp[3]) { | ||
88 | mtspr(SPRN_IAC4, dbg->bp[3]); | ||
89 | dbcr0 |= DBCR0_IAC4 | DBCR0_IDM; | ||
90 | } | ||
91 | |||
92 | mtspr(SPRN_DBCR0, dbcr0); | ||
93 | mtspr(SPRN_DBCR1, 0); | ||
94 | mtspr(SPRN_DBCR2, 0); | ||
95 | } | ||
96 | |||
97 | void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | 31 | void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) |
98 | { | 32 | { |
99 | kvmppc_44x_tlb_load(vcpu); | 33 | kvmppc_44x_tlb_load(vcpu); |
@@ -149,8 +83,6 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu) | |||
149 | int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu, | 83 | int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu, |
150 | struct kvm_translation *tr) | 84 | struct kvm_translation *tr) |
151 | { | 85 | { |
152 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); | ||
153 | struct kvmppc_44x_tlbe *gtlbe; | ||
154 | int index; | 86 | int index; |
155 | gva_t eaddr; | 87 | gva_t eaddr; |
156 | u8 pid; | 88 | u8 pid; |
@@ -166,9 +98,7 @@ int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu, | |||
166 | return 0; | 98 | return 0; |
167 | } | 99 | } |
168 | 100 | ||
169 | gtlbe = &vcpu_44x->guest_tlb[index]; | 101 | tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr); |
170 | |||
171 | tr->physical_address = tlb_xlate(gtlbe, eaddr); | ||
172 | /* XXX what does "writeable" and "usermode" even mean? */ | 102 | /* XXX what does "writeable" and "usermode" even mean? */ |
173 | tr->valid = 1; | 103 | tr->valid = 1; |
174 | 104 | ||
diff --git a/arch/powerpc/kvm/44x_emulate.c b/arch/powerpc/kvm/44x_emulate.c index 82489a743a6f..61af58fcecee 100644 --- a/arch/powerpc/kvm/44x_emulate.c +++ b/arch/powerpc/kvm/44x_emulate.c | |||
@@ -27,25 +27,12 @@ | |||
27 | #include "booke.h" | 27 | #include "booke.h" |
28 | #include "44x_tlb.h" | 28 | #include "44x_tlb.h" |
29 | 29 | ||
30 | #define OP_RFI 19 | ||
31 | |||
32 | #define XOP_RFI 50 | ||
33 | #define XOP_MFMSR 83 | ||
34 | #define XOP_WRTEE 131 | ||
35 | #define XOP_MTMSR 146 | ||
36 | #define XOP_WRTEEI 163 | ||
37 | #define XOP_MFDCR 323 | 30 | #define XOP_MFDCR 323 |
38 | #define XOP_MTDCR 451 | 31 | #define XOP_MTDCR 451 |
39 | #define XOP_TLBSX 914 | 32 | #define XOP_TLBSX 914 |
40 | #define XOP_ICCCI 966 | 33 | #define XOP_ICCCI 966 |
41 | #define XOP_TLBWE 978 | 34 | #define XOP_TLBWE 978 |
42 | 35 | ||
43 | static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu) | ||
44 | { | ||
45 | vcpu->arch.pc = vcpu->arch.srr0; | ||
46 | kvmppc_set_msr(vcpu, vcpu->arch.srr1); | ||
47 | } | ||
48 | |||
49 | int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | 36 | int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, |
50 | unsigned int inst, int *advance) | 37 | unsigned int inst, int *advance) |
51 | { | 38 | { |
@@ -59,48 +46,9 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
59 | int ws; | 46 | int ws; |
60 | 47 | ||
61 | switch (get_op(inst)) { | 48 | switch (get_op(inst)) { |
62 | case OP_RFI: | ||
63 | switch (get_xop(inst)) { | ||
64 | case XOP_RFI: | ||
65 | kvmppc_emul_rfi(vcpu); | ||
66 | kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS); | ||
67 | *advance = 0; | ||
68 | break; | ||
69 | |||
70 | default: | ||
71 | emulated = EMULATE_FAIL; | ||
72 | break; | ||
73 | } | ||
74 | break; | ||
75 | |||
76 | case 31: | 49 | case 31: |
77 | switch (get_xop(inst)) { | 50 | switch (get_xop(inst)) { |
78 | 51 | ||
79 | case XOP_MFMSR: | ||
80 | rt = get_rt(inst); | ||
81 | vcpu->arch.gpr[rt] = vcpu->arch.msr; | ||
82 | kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS); | ||
83 | break; | ||
84 | |||
85 | case XOP_MTMSR: | ||
86 | rs = get_rs(inst); | ||
87 | kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS); | ||
88 | kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]); | ||
89 | break; | ||
90 | |||
91 | case XOP_WRTEE: | ||
92 | rs = get_rs(inst); | ||
93 | vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE) | ||
94 | | (vcpu->arch.gpr[rs] & MSR_EE); | ||
95 | kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS); | ||
96 | break; | ||
97 | |||
98 | case XOP_WRTEEI: | ||
99 | vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE) | ||
100 | | (inst & MSR_EE); | ||
101 | kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS); | ||
102 | break; | ||
103 | |||
104 | case XOP_MFDCR: | 52 | case XOP_MFDCR: |
105 | dcrn = get_dcrn(inst); | 53 | dcrn = get_dcrn(inst); |
106 | rt = get_rt(inst); | 54 | rt = get_rt(inst); |
@@ -186,186 +134,51 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
186 | emulated = EMULATE_FAIL; | 134 | emulated = EMULATE_FAIL; |
187 | } | 135 | } |
188 | 136 | ||
137 | if (emulated == EMULATE_FAIL) | ||
138 | emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance); | ||
139 | |||
189 | return emulated; | 140 | return emulated; |
190 | } | 141 | } |
191 | 142 | ||
192 | int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) | 143 | int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) |
193 | { | 144 | { |
145 | int emulated = EMULATE_DONE; | ||
146 | |||
194 | switch (sprn) { | 147 | switch (sprn) { |
195 | case SPRN_MMUCR: | ||
196 | vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break; | ||
197 | case SPRN_PID: | 148 | case SPRN_PID: |
198 | kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break; | 149 | kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break; |
150 | case SPRN_MMUCR: | ||
151 | vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break; | ||
199 | case SPRN_CCR0: | 152 | case SPRN_CCR0: |
200 | vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break; | 153 | vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break; |
201 | case SPRN_CCR1: | 154 | case SPRN_CCR1: |
202 | vcpu->arch.ccr1 = vcpu->arch.gpr[rs]; break; | 155 | vcpu->arch.ccr1 = vcpu->arch.gpr[rs]; break; |
203 | case SPRN_DEAR: | ||
204 | vcpu->arch.dear = vcpu->arch.gpr[rs]; break; | ||
205 | case SPRN_ESR: | ||
206 | vcpu->arch.esr = vcpu->arch.gpr[rs]; break; | ||
207 | case SPRN_DBCR0: | ||
208 | vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break; | ||
209 | case SPRN_DBCR1: | ||
210 | vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break; | ||
211 | case SPRN_TSR: | ||
212 | vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break; | ||
213 | case SPRN_TCR: | ||
214 | vcpu->arch.tcr = vcpu->arch.gpr[rs]; | ||
215 | kvmppc_emulate_dec(vcpu); | ||
216 | break; | ||
217 | |||
218 | /* Note: SPRG4-7 are user-readable. These values are | ||
219 | * loaded into the real SPRGs when resuming the | ||
220 | * guest. */ | ||
221 | case SPRN_SPRG4: | ||
222 | vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break; | ||
223 | case SPRN_SPRG5: | ||
224 | vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break; | ||
225 | case SPRN_SPRG6: | ||
226 | vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break; | ||
227 | case SPRN_SPRG7: | ||
228 | vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break; | ||
229 | |||
230 | case SPRN_IVPR: | ||
231 | vcpu->arch.ivpr = vcpu->arch.gpr[rs]; | ||
232 | break; | ||
233 | case SPRN_IVOR0: | ||
234 | vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs]; | ||
235 | break; | ||
236 | case SPRN_IVOR1: | ||
237 | vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs]; | ||
238 | break; | ||
239 | case SPRN_IVOR2: | ||
240 | vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs]; | ||
241 | break; | ||
242 | case SPRN_IVOR3: | ||
243 | vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs]; | ||
244 | break; | ||
245 | case SPRN_IVOR4: | ||
246 | vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs]; | ||
247 | break; | ||
248 | case SPRN_IVOR5: | ||
249 | vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs]; | ||
250 | break; | ||
251 | case SPRN_IVOR6: | ||
252 | vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs]; | ||
253 | break; | ||
254 | case SPRN_IVOR7: | ||
255 | vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs]; | ||
256 | break; | ||
257 | case SPRN_IVOR8: | ||
258 | vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs]; | ||
259 | break; | ||
260 | case SPRN_IVOR9: | ||
261 | vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs]; | ||
262 | break; | ||
263 | case SPRN_IVOR10: | ||
264 | vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs]; | ||
265 | break; | ||
266 | case SPRN_IVOR11: | ||
267 | vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs]; | ||
268 | break; | ||
269 | case SPRN_IVOR12: | ||
270 | vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs]; | ||
271 | break; | ||
272 | case SPRN_IVOR13: | ||
273 | vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs]; | ||
274 | break; | ||
275 | case SPRN_IVOR14: | ||
276 | vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs]; | ||
277 | break; | ||
278 | case SPRN_IVOR15: | ||
279 | vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs]; | ||
280 | break; | ||
281 | |||
282 | default: | 156 | default: |
283 | return EMULATE_FAIL; | 157 | emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs); |
284 | } | 158 | } |
285 | 159 | ||
286 | kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS); | 160 | kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS); |
287 | return EMULATE_DONE; | 161 | return emulated; |
288 | } | 162 | } |
289 | 163 | ||
290 | int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) | 164 | int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) |
291 | { | 165 | { |
166 | int emulated = EMULATE_DONE; | ||
167 | |||
292 | switch (sprn) { | 168 | switch (sprn) { |
293 | /* 440 */ | 169 | case SPRN_PID: |
170 | vcpu->arch.gpr[rt] = vcpu->arch.pid; break; | ||
294 | case SPRN_MMUCR: | 171 | case SPRN_MMUCR: |
295 | vcpu->arch.gpr[rt] = vcpu->arch.mmucr; break; | 172 | vcpu->arch.gpr[rt] = vcpu->arch.mmucr; break; |
296 | case SPRN_CCR0: | 173 | case SPRN_CCR0: |
297 | vcpu->arch.gpr[rt] = vcpu->arch.ccr0; break; | 174 | vcpu->arch.gpr[rt] = vcpu->arch.ccr0; break; |
298 | case SPRN_CCR1: | 175 | case SPRN_CCR1: |
299 | vcpu->arch.gpr[rt] = vcpu->arch.ccr1; break; | 176 | vcpu->arch.gpr[rt] = vcpu->arch.ccr1; break; |
300 | |||
301 | /* Book E */ | ||
302 | case SPRN_PID: | ||
303 | vcpu->arch.gpr[rt] = vcpu->arch.pid; break; | ||
304 | case SPRN_IVPR: | ||
305 | vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break; | ||
306 | case SPRN_DEAR: | ||
307 | vcpu->arch.gpr[rt] = vcpu->arch.dear; break; | ||
308 | case SPRN_ESR: | ||
309 | vcpu->arch.gpr[rt] = vcpu->arch.esr; break; | ||
310 | case SPRN_DBCR0: | ||
311 | vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break; | ||
312 | case SPRN_DBCR1: | ||
313 | vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break; | ||
314 | |||
315 | case SPRN_IVOR0: | ||
316 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; | ||
317 | break; | ||
318 | case SPRN_IVOR1: | ||
319 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; | ||
320 | break; | ||
321 | case SPRN_IVOR2: | ||
322 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; | ||
323 | break; | ||
324 | case SPRN_IVOR3: | ||
325 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; | ||
326 | break; | ||
327 | case SPRN_IVOR4: | ||
328 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; | ||
329 | break; | ||
330 | case SPRN_IVOR5: | ||
331 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; | ||
332 | break; | ||
333 | case SPRN_IVOR6: | ||
334 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; | ||
335 | break; | ||
336 | case SPRN_IVOR7: | ||
337 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; | ||
338 | break; | ||
339 | case SPRN_IVOR8: | ||
340 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; | ||
341 | break; | ||
342 | case SPRN_IVOR9: | ||
343 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; | ||
344 | break; | ||
345 | case SPRN_IVOR10: | ||
346 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; | ||
347 | break; | ||
348 | case SPRN_IVOR11: | ||
349 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; | ||
350 | break; | ||
351 | case SPRN_IVOR12: | ||
352 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; | ||
353 | break; | ||
354 | case SPRN_IVOR13: | ||
355 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; | ||
356 | break; | ||
357 | case SPRN_IVOR14: | ||
358 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; | ||
359 | break; | ||
360 | case SPRN_IVOR15: | ||
361 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; | ||
362 | break; | ||
363 | |||
364 | default: | 177 | default: |
365 | return EMULATE_FAIL; | 178 | emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt); |
366 | } | 179 | } |
367 | 180 | ||
368 | kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS); | 181 | kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS); |
369 | return EMULATE_DONE; | 182 | return emulated; |
370 | } | 183 | } |
371 | 184 | ||
diff --git a/arch/powerpc/kvm/44x_tlb.c b/arch/powerpc/kvm/44x_tlb.c index 9a34b8edb9e2..4a16f472cc18 100644 --- a/arch/powerpc/kvm/44x_tlb.c +++ b/arch/powerpc/kvm/44x_tlb.c | |||
@@ -208,20 +208,38 @@ int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid, | |||
208 | return -1; | 208 | return -1; |
209 | } | 209 | } |
210 | 210 | ||
211 | int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr) | 211 | gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index, |
212 | gva_t eaddr) | ||
213 | { | ||
214 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); | ||
215 | struct kvmppc_44x_tlbe *gtlbe = &vcpu_44x->guest_tlb[gtlb_index]; | ||
216 | unsigned int pgmask = get_tlb_bytes(gtlbe) - 1; | ||
217 | |||
218 | return get_tlb_raddr(gtlbe) | (eaddr & pgmask); | ||
219 | } | ||
220 | |||
221 | int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr) | ||
212 | { | 222 | { |
213 | unsigned int as = !!(vcpu->arch.msr & MSR_IS); | 223 | unsigned int as = !!(vcpu->arch.msr & MSR_IS); |
214 | 224 | ||
215 | return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as); | 225 | return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as); |
216 | } | 226 | } |
217 | 227 | ||
218 | int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr) | 228 | int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr) |
219 | { | 229 | { |
220 | unsigned int as = !!(vcpu->arch.msr & MSR_DS); | 230 | unsigned int as = !!(vcpu->arch.msr & MSR_DS); |
221 | 231 | ||
222 | return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as); | 232 | return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as); |
223 | } | 233 | } |
224 | 234 | ||
235 | void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu) | ||
236 | { | ||
237 | } | ||
238 | |||
239 | void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu) | ||
240 | { | ||
241 | } | ||
242 | |||
225 | static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x, | 243 | static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x, |
226 | unsigned int stlb_index) | 244 | unsigned int stlb_index) |
227 | { | 245 | { |
@@ -248,7 +266,7 @@ static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x, | |||
248 | KVMTRACE_1D(STLB_INVAL, &vcpu_44x->vcpu, stlb_index, handler); | 266 | KVMTRACE_1D(STLB_INVAL, &vcpu_44x->vcpu, stlb_index, handler); |
249 | } | 267 | } |
250 | 268 | ||
251 | void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu) | 269 | void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) |
252 | { | 270 | { |
253 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); | 271 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); |
254 | int i; | 272 | int i; |
@@ -269,15 +287,19 @@ void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu) | |||
269 | * Caller must ensure that the specified guest TLB entry is safe to insert into | 287 | * Caller must ensure that the specified guest TLB entry is safe to insert into |
270 | * the shadow TLB. | 288 | * the shadow TLB. |
271 | */ | 289 | */ |
272 | void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr, u64 asid, | 290 | void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr, |
273 | u32 flags, u32 max_bytes, unsigned int gtlb_index) | 291 | unsigned int gtlb_index) |
274 | { | 292 | { |
275 | struct kvmppc_44x_tlbe stlbe; | 293 | struct kvmppc_44x_tlbe stlbe; |
276 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); | 294 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); |
295 | struct kvmppc_44x_tlbe *gtlbe = &vcpu_44x->guest_tlb[gtlb_index]; | ||
277 | struct kvmppc_44x_shadow_ref *ref; | 296 | struct kvmppc_44x_shadow_ref *ref; |
278 | struct page *new_page; | 297 | struct page *new_page; |
279 | hpa_t hpaddr; | 298 | hpa_t hpaddr; |
280 | gfn_t gfn; | 299 | gfn_t gfn; |
300 | u32 asid = gtlbe->tid; | ||
301 | u32 flags = gtlbe->word2; | ||
302 | u32 max_bytes = get_tlb_bytes(gtlbe); | ||
281 | unsigned int victim; | 303 | unsigned int victim; |
282 | 304 | ||
283 | /* Select TLB entry to clobber. Indirectly guard against races with the TLB | 305 | /* Select TLB entry to clobber. Indirectly guard against races with the TLB |
@@ -448,10 +470,8 @@ int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws) | |||
448 | } | 470 | } |
449 | 471 | ||
450 | if (tlbe_is_host_safe(vcpu, tlbe)) { | 472 | if (tlbe_is_host_safe(vcpu, tlbe)) { |
451 | u64 asid; | ||
452 | gva_t eaddr; | 473 | gva_t eaddr; |
453 | gpa_t gpaddr; | 474 | gpa_t gpaddr; |
454 | u32 flags; | ||
455 | u32 bytes; | 475 | u32 bytes; |
456 | 476 | ||
457 | eaddr = get_tlb_eaddr(tlbe); | 477 | eaddr = get_tlb_eaddr(tlbe); |
@@ -462,10 +482,7 @@ int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws) | |||
462 | eaddr &= ~(bytes - 1); | 482 | eaddr &= ~(bytes - 1); |
463 | gpaddr &= ~(bytes - 1); | 483 | gpaddr &= ~(bytes - 1); |
464 | 484 | ||
465 | asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid; | 485 | kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); |
466 | flags = tlbe->word2 & 0xffff; | ||
467 | |||
468 | kvmppc_mmu_map(vcpu, eaddr, gpaddr, asid, flags, bytes, gtlb_index); | ||
469 | } | 486 | } |
470 | 487 | ||
471 | KVMTRACE_5D(GTLB_WRITE, vcpu, gtlb_index, tlbe->tid, tlbe->word0, | 488 | KVMTRACE_5D(GTLB_WRITE, vcpu, gtlb_index, tlbe->tid, tlbe->word0, |
diff --git a/arch/powerpc/kvm/44x_tlb.h b/arch/powerpc/kvm/44x_tlb.h index 772191f29e62..a9ff80e51526 100644 --- a/arch/powerpc/kvm/44x_tlb.h +++ b/arch/powerpc/kvm/44x_tlb.h | |||
@@ -25,8 +25,6 @@ | |||
25 | 25 | ||
26 | extern int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, | 26 | extern int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, |
27 | unsigned int pid, unsigned int as); | 27 | unsigned int pid, unsigned int as); |
28 | extern int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr); | ||
29 | extern int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr); | ||
30 | 28 | ||
31 | extern int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb, | 29 | extern int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb, |
32 | u8 rc); | 30 | u8 rc); |
@@ -85,11 +83,4 @@ static inline unsigned int get_mmucr_sts(const struct kvm_vcpu *vcpu) | |||
85 | return (vcpu->arch.mmucr >> 16) & 0x1; | 83 | return (vcpu->arch.mmucr >> 16) & 0x1; |
86 | } | 84 | } |
87 | 85 | ||
88 | static inline gpa_t tlb_xlate(struct kvmppc_44x_tlbe *tlbe, gva_t eaddr) | ||
89 | { | ||
90 | unsigned int pgmask = get_tlb_bytes(tlbe) - 1; | ||
91 | |||
92 | return get_tlb_raddr(tlbe) | (eaddr & pgmask); | ||
93 | } | ||
94 | |||
95 | #endif /* __KVM_POWERPC_TLB_H__ */ | 86 | #endif /* __KVM_POWERPC_TLB_H__ */ |
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig index 6dbdc4817d80..5a152a52796f 100644 --- a/arch/powerpc/kvm/Kconfig +++ b/arch/powerpc/kvm/Kconfig | |||
@@ -2,6 +2,9 @@ | |||
2 | # KVM configuration | 2 | # KVM configuration |
3 | # | 3 | # |
4 | 4 | ||
5 | config HAVE_KVM_IRQCHIP | ||
6 | bool | ||
7 | |||
5 | menuconfig VIRTUALIZATION | 8 | menuconfig VIRTUALIZATION |
6 | bool "Virtualization" | 9 | bool "Virtualization" |
7 | ---help--- | 10 | ---help--- |
@@ -43,6 +46,19 @@ config KVM_EXIT_TIMING | |||
43 | 46 | ||
44 | If unsure, say N. | 47 | If unsure, say N. |
45 | 48 | ||
49 | config KVM_E500 | ||
50 | bool "KVM support for PowerPC E500 processors" | ||
51 | depends on EXPERIMENTAL && E500 | ||
52 | select KVM | ||
53 | ---help--- | ||
54 | Support running unmodified E500 guest kernels in virtual machines on | ||
55 | E500 host processors. | ||
56 | |||
57 | This module provides access to the hardware capabilities through | ||
58 | a character device node named /dev/kvm. | ||
59 | |||
60 | If unsure, say N. | ||
61 | |||
46 | config KVM_TRACE | 62 | config KVM_TRACE |
47 | bool "KVM trace support" | 63 | bool "KVM trace support" |
48 | depends on KVM && MARKERS && SYSFS | 64 | depends on KVM && MARKERS && SYSFS |
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile index df7ba59e6d53..4b2df66c79d8 100644 --- a/arch/powerpc/kvm/Makefile +++ b/arch/powerpc/kvm/Makefile | |||
@@ -16,8 +16,18 @@ AFLAGS_booke_interrupts.o := -I$(obj) | |||
16 | 16 | ||
17 | kvm-440-objs := \ | 17 | kvm-440-objs := \ |
18 | booke.o \ | 18 | booke.o \ |
19 | booke_emulate.o \ | ||
19 | booke_interrupts.o \ | 20 | booke_interrupts.o \ |
20 | 44x.o \ | 21 | 44x.o \ |
21 | 44x_tlb.o \ | 22 | 44x_tlb.o \ |
22 | 44x_emulate.o | 23 | 44x_emulate.o |
23 | obj-$(CONFIG_KVM_440) += kvm-440.o | 24 | obj-$(CONFIG_KVM_440) += kvm-440.o |
25 | |||
26 | kvm-e500-objs := \ | ||
27 | booke.o \ | ||
28 | booke_emulate.o \ | ||
29 | booke_interrupts.o \ | ||
30 | e500.o \ | ||
31 | e500_tlb.o \ | ||
32 | e500_emulate.o | ||
33 | obj-$(CONFIG_KVM_E500) += kvm-e500.o | ||
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c index 35485dd6927e..642e4204cf25 100644 --- a/arch/powerpc/kvm/booke.c +++ b/arch/powerpc/kvm/booke.c | |||
@@ -30,10 +30,8 @@ | |||
30 | #include <asm/kvm_ppc.h> | 30 | #include <asm/kvm_ppc.h> |
31 | #include "timing.h" | 31 | #include "timing.h" |
32 | #include <asm/cacheflush.h> | 32 | #include <asm/cacheflush.h> |
33 | #include <asm/kvm_44x.h> | ||
34 | 33 | ||
35 | #include "booke.h" | 34 | #include "booke.h" |
36 | #include "44x_tlb.h" | ||
37 | 35 | ||
38 | unsigned long kvmppc_booke_handlers; | 36 | unsigned long kvmppc_booke_handlers; |
39 | 37 | ||
@@ -120,6 +118,9 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, | |||
120 | case BOOKE_IRQPRIO_DATA_STORAGE: | 118 | case BOOKE_IRQPRIO_DATA_STORAGE: |
121 | case BOOKE_IRQPRIO_INST_STORAGE: | 119 | case BOOKE_IRQPRIO_INST_STORAGE: |
122 | case BOOKE_IRQPRIO_FP_UNAVAIL: | 120 | case BOOKE_IRQPRIO_FP_UNAVAIL: |
121 | case BOOKE_IRQPRIO_SPE_UNAVAIL: | ||
122 | case BOOKE_IRQPRIO_SPE_FP_DATA: | ||
123 | case BOOKE_IRQPRIO_SPE_FP_ROUND: | ||
123 | case BOOKE_IRQPRIO_AP_UNAVAIL: | 124 | case BOOKE_IRQPRIO_AP_UNAVAIL: |
124 | case BOOKE_IRQPRIO_ALIGNMENT: | 125 | case BOOKE_IRQPRIO_ALIGNMENT: |
125 | allowed = 1; | 126 | allowed = 1; |
@@ -165,7 +166,7 @@ void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu) | |||
165 | unsigned int priority; | 166 | unsigned int priority; |
166 | 167 | ||
167 | priority = __ffs(*pending); | 168 | priority = __ffs(*pending); |
168 | while (priority <= BOOKE_MAX_INTERRUPT) { | 169 | while (priority <= BOOKE_IRQPRIO_MAX) { |
169 | if (kvmppc_booke_irqprio_deliver(vcpu, priority)) | 170 | if (kvmppc_booke_irqprio_deliver(vcpu, priority)) |
170 | break; | 171 | break; |
171 | 172 | ||
@@ -263,6 +264,21 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
263 | r = RESUME_GUEST; | 264 | r = RESUME_GUEST; |
264 | break; | 265 | break; |
265 | 266 | ||
267 | case BOOKE_INTERRUPT_SPE_UNAVAIL: | ||
268 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_UNAVAIL); | ||
269 | r = RESUME_GUEST; | ||
270 | break; | ||
271 | |||
272 | case BOOKE_INTERRUPT_SPE_FP_DATA: | ||
273 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); | ||
274 | r = RESUME_GUEST; | ||
275 | break; | ||
276 | |||
277 | case BOOKE_INTERRUPT_SPE_FP_ROUND: | ||
278 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); | ||
279 | r = RESUME_GUEST; | ||
280 | break; | ||
281 | |||
266 | case BOOKE_INTERRUPT_DATA_STORAGE: | 282 | case BOOKE_INTERRUPT_DATA_STORAGE: |
267 | vcpu->arch.dear = vcpu->arch.fault_dear; | 283 | vcpu->arch.dear = vcpu->arch.fault_dear; |
268 | vcpu->arch.esr = vcpu->arch.fault_esr; | 284 | vcpu->arch.esr = vcpu->arch.fault_esr; |
@@ -284,29 +300,27 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
284 | r = RESUME_GUEST; | 300 | r = RESUME_GUEST; |
285 | break; | 301 | break; |
286 | 302 | ||
287 | /* XXX move to a 440-specific file. */ | ||
288 | case BOOKE_INTERRUPT_DTLB_MISS: { | 303 | case BOOKE_INTERRUPT_DTLB_MISS: { |
289 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); | ||
290 | struct kvmppc_44x_tlbe *gtlbe; | ||
291 | unsigned long eaddr = vcpu->arch.fault_dear; | 304 | unsigned long eaddr = vcpu->arch.fault_dear; |
292 | int gtlb_index; | 305 | int gtlb_index; |
306 | gpa_t gpaddr; | ||
293 | gfn_t gfn; | 307 | gfn_t gfn; |
294 | 308 | ||
295 | /* Check the guest TLB. */ | 309 | /* Check the guest TLB. */ |
296 | gtlb_index = kvmppc_44x_dtlb_index(vcpu, eaddr); | 310 | gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); |
297 | if (gtlb_index < 0) { | 311 | if (gtlb_index < 0) { |
298 | /* The guest didn't have a mapping for it. */ | 312 | /* The guest didn't have a mapping for it. */ |
299 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); | 313 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); |
300 | vcpu->arch.dear = vcpu->arch.fault_dear; | 314 | vcpu->arch.dear = vcpu->arch.fault_dear; |
301 | vcpu->arch.esr = vcpu->arch.fault_esr; | 315 | vcpu->arch.esr = vcpu->arch.fault_esr; |
316 | kvmppc_mmu_dtlb_miss(vcpu); | ||
302 | kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); | 317 | kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); |
303 | r = RESUME_GUEST; | 318 | r = RESUME_GUEST; |
304 | break; | 319 | break; |
305 | } | 320 | } |
306 | 321 | ||
307 | gtlbe = &vcpu_44x->guest_tlb[gtlb_index]; | 322 | gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); |
308 | vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr); | 323 | gfn = gpaddr >> PAGE_SHIFT; |
309 | gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT; | ||
310 | 324 | ||
311 | if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { | 325 | if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { |
312 | /* The guest TLB had a mapping, but the shadow TLB | 326 | /* The guest TLB had a mapping, but the shadow TLB |
@@ -315,13 +329,13 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
315 | * b) the guest used a large mapping which we're faking | 329 | * b) the guest used a large mapping which we're faking |
316 | * Either way, we need to satisfy the fault without | 330 | * Either way, we need to satisfy the fault without |
317 | * invoking the guest. */ | 331 | * invoking the guest. */ |
318 | kvmppc_mmu_map(vcpu, eaddr, vcpu->arch.paddr_accessed, gtlbe->tid, | 332 | kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); |
319 | gtlbe->word2, get_tlb_bytes(gtlbe), gtlb_index); | ||
320 | kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); | 333 | kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); |
321 | r = RESUME_GUEST; | 334 | r = RESUME_GUEST; |
322 | } else { | 335 | } else { |
323 | /* Guest has mapped and accessed a page which is not | 336 | /* Guest has mapped and accessed a page which is not |
324 | * actually RAM. */ | 337 | * actually RAM. */ |
338 | vcpu->arch.paddr_accessed = gpaddr; | ||
325 | r = kvmppc_emulate_mmio(run, vcpu); | 339 | r = kvmppc_emulate_mmio(run, vcpu); |
326 | kvmppc_account_exit(vcpu, MMIO_EXITS); | 340 | kvmppc_account_exit(vcpu, MMIO_EXITS); |
327 | } | 341 | } |
@@ -329,10 +343,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
329 | break; | 343 | break; |
330 | } | 344 | } |
331 | 345 | ||
332 | /* XXX move to a 440-specific file. */ | ||
333 | case BOOKE_INTERRUPT_ITLB_MISS: { | 346 | case BOOKE_INTERRUPT_ITLB_MISS: { |
334 | struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu); | ||
335 | struct kvmppc_44x_tlbe *gtlbe; | ||
336 | unsigned long eaddr = vcpu->arch.pc; | 347 | unsigned long eaddr = vcpu->arch.pc; |
337 | gpa_t gpaddr; | 348 | gpa_t gpaddr; |
338 | gfn_t gfn; | 349 | gfn_t gfn; |
@@ -341,18 +352,18 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
341 | r = RESUME_GUEST; | 352 | r = RESUME_GUEST; |
342 | 353 | ||
343 | /* Check the guest TLB. */ | 354 | /* Check the guest TLB. */ |
344 | gtlb_index = kvmppc_44x_itlb_index(vcpu, eaddr); | 355 | gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); |
345 | if (gtlb_index < 0) { | 356 | if (gtlb_index < 0) { |
346 | /* The guest didn't have a mapping for it. */ | 357 | /* The guest didn't have a mapping for it. */ |
347 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); | 358 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); |
359 | kvmppc_mmu_itlb_miss(vcpu); | ||
348 | kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); | 360 | kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); |
349 | break; | 361 | break; |
350 | } | 362 | } |
351 | 363 | ||
352 | kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); | 364 | kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); |
353 | 365 | ||
354 | gtlbe = &vcpu_44x->guest_tlb[gtlb_index]; | 366 | gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); |
355 | gpaddr = tlb_xlate(gtlbe, eaddr); | ||
356 | gfn = gpaddr >> PAGE_SHIFT; | 367 | gfn = gpaddr >> PAGE_SHIFT; |
357 | 368 | ||
358 | if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { | 369 | if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { |
@@ -362,8 +373,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, | |||
362 | * b) the guest used a large mapping which we're faking | 373 | * b) the guest used a large mapping which we're faking |
363 | * Either way, we need to satisfy the fault without | 374 | * Either way, we need to satisfy the fault without |
364 | * invoking the guest. */ | 375 | * invoking the guest. */ |
365 | kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlbe->tid, | 376 | kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); |
366 | gtlbe->word2, get_tlb_bytes(gtlbe), gtlb_index); | ||
367 | } else { | 377 | } else { |
368 | /* Guest mapped and leaped at non-RAM! */ | 378 | /* Guest mapped and leaped at non-RAM! */ |
369 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); | 379 | kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); |
diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h index cf7c94ca24bf..d59bcca1f9d8 100644 --- a/arch/powerpc/kvm/booke.h +++ b/arch/powerpc/kvm/booke.h | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | #include <linux/types.h> | 23 | #include <linux/types.h> |
24 | #include <linux/kvm_host.h> | 24 | #include <linux/kvm_host.h> |
25 | #include <asm/kvm_ppc.h> | ||
25 | #include "timing.h" | 26 | #include "timing.h" |
26 | 27 | ||
27 | /* interrupt priortity ordering */ | 28 | /* interrupt priortity ordering */ |
@@ -30,17 +31,24 @@ | |||
30 | #define BOOKE_IRQPRIO_ALIGNMENT 2 | 31 | #define BOOKE_IRQPRIO_ALIGNMENT 2 |
31 | #define BOOKE_IRQPRIO_PROGRAM 3 | 32 | #define BOOKE_IRQPRIO_PROGRAM 3 |
32 | #define BOOKE_IRQPRIO_FP_UNAVAIL 4 | 33 | #define BOOKE_IRQPRIO_FP_UNAVAIL 4 |
33 | #define BOOKE_IRQPRIO_SYSCALL 5 | 34 | #define BOOKE_IRQPRIO_SPE_UNAVAIL 5 |
34 | #define BOOKE_IRQPRIO_AP_UNAVAIL 6 | 35 | #define BOOKE_IRQPRIO_SPE_FP_DATA 6 |
35 | #define BOOKE_IRQPRIO_DTLB_MISS 7 | 36 | #define BOOKE_IRQPRIO_SPE_FP_ROUND 7 |
36 | #define BOOKE_IRQPRIO_ITLB_MISS 8 | 37 | #define BOOKE_IRQPRIO_SYSCALL 8 |
37 | #define BOOKE_IRQPRIO_MACHINE_CHECK 9 | 38 | #define BOOKE_IRQPRIO_AP_UNAVAIL 9 |
38 | #define BOOKE_IRQPRIO_DEBUG 10 | 39 | #define BOOKE_IRQPRIO_DTLB_MISS 10 |
39 | #define BOOKE_IRQPRIO_CRITICAL 11 | 40 | #define BOOKE_IRQPRIO_ITLB_MISS 11 |
40 | #define BOOKE_IRQPRIO_WATCHDOG 12 | 41 | #define BOOKE_IRQPRIO_MACHINE_CHECK 12 |
41 | #define BOOKE_IRQPRIO_EXTERNAL 13 | 42 | #define BOOKE_IRQPRIO_DEBUG 13 |
42 | #define BOOKE_IRQPRIO_FIT 14 | 43 | #define BOOKE_IRQPRIO_CRITICAL 14 |
43 | #define BOOKE_IRQPRIO_DECREMENTER 15 | 44 | #define BOOKE_IRQPRIO_WATCHDOG 15 |
45 | #define BOOKE_IRQPRIO_EXTERNAL 16 | ||
46 | #define BOOKE_IRQPRIO_FIT 17 | ||
47 | #define BOOKE_IRQPRIO_DECREMENTER 18 | ||
48 | #define BOOKE_IRQPRIO_PERFORMANCE_MONITOR 19 | ||
49 | #define BOOKE_IRQPRIO_MAX 19 | ||
50 | |||
51 | extern unsigned long kvmppc_booke_handlers; | ||
44 | 52 | ||
45 | /* Helper function for "full" MSR writes. No need to call this if only EE is | 53 | /* Helper function for "full" MSR writes. No need to call this if only EE is |
46 | * changing. */ | 54 | * changing. */ |
@@ -57,4 +65,9 @@ static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) | |||
57 | }; | 65 | }; |
58 | } | 66 | } |
59 | 67 | ||
68 | int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | ||
69 | unsigned int inst, int *advance); | ||
70 | int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt); | ||
71 | int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs); | ||
72 | |||
60 | #endif /* __KVM_BOOKE_H__ */ | 73 | #endif /* __KVM_BOOKE_H__ */ |
diff --git a/arch/powerpc/kvm/booke_emulate.c b/arch/powerpc/kvm/booke_emulate.c new file mode 100644 index 000000000000..aebc65e93f4b --- /dev/null +++ b/arch/powerpc/kvm/booke_emulate.c | |||
@@ -0,0 +1,266 @@ | |||
1 | /* | ||
2 | * This program is free software; you can redistribute it and/or modify | ||
3 | * it under the terms of the GNU General Public License, version 2, as | ||
4 | * published by the Free Software Foundation. | ||
5 | * | ||
6 | * This program is distributed in the hope that it will be useful, | ||
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
9 | * GNU General Public License for more details. | ||
10 | * | ||
11 | * You should have received a copy of the GNU General Public License | ||
12 | * along with this program; if not, write to the Free Software | ||
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
14 | * | ||
15 | * Copyright IBM Corp. 2008 | ||
16 | * | ||
17 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> | ||
18 | */ | ||
19 | |||
20 | #include <linux/kvm_host.h> | ||
21 | #include <asm/disassemble.h> | ||
22 | |||
23 | #include "booke.h" | ||
24 | |||
25 | #define OP_19_XOP_RFI 50 | ||
26 | |||
27 | #define OP_31_XOP_MFMSR 83 | ||
28 | #define OP_31_XOP_WRTEE 131 | ||
29 | #define OP_31_XOP_MTMSR 146 | ||
30 | #define OP_31_XOP_WRTEEI 163 | ||
31 | |||
32 | static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu) | ||
33 | { | ||
34 | vcpu->arch.pc = vcpu->arch.srr0; | ||
35 | kvmppc_set_msr(vcpu, vcpu->arch.srr1); | ||
36 | } | ||
37 | |||
38 | int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | ||
39 | unsigned int inst, int *advance) | ||
40 | { | ||
41 | int emulated = EMULATE_DONE; | ||
42 | int rs; | ||
43 | int rt; | ||
44 | |||
45 | switch (get_op(inst)) { | ||
46 | case 19: | ||
47 | switch (get_xop(inst)) { | ||
48 | case OP_19_XOP_RFI: | ||
49 | kvmppc_emul_rfi(vcpu); | ||
50 | kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS); | ||
51 | *advance = 0; | ||
52 | break; | ||
53 | |||
54 | default: | ||
55 | emulated = EMULATE_FAIL; | ||
56 | break; | ||
57 | } | ||
58 | break; | ||
59 | |||
60 | case 31: | ||
61 | switch (get_xop(inst)) { | ||
62 | |||
63 | case OP_31_XOP_MFMSR: | ||
64 | rt = get_rt(inst); | ||
65 | vcpu->arch.gpr[rt] = vcpu->arch.msr; | ||
66 | kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS); | ||
67 | break; | ||
68 | |||
69 | case OP_31_XOP_MTMSR: | ||
70 | rs = get_rs(inst); | ||
71 | kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS); | ||
72 | kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]); | ||
73 | break; | ||
74 | |||
75 | case OP_31_XOP_WRTEE: | ||
76 | rs = get_rs(inst); | ||
77 | vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE) | ||
78 | | (vcpu->arch.gpr[rs] & MSR_EE); | ||
79 | kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS); | ||
80 | break; | ||
81 | |||
82 | case OP_31_XOP_WRTEEI: | ||
83 | vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE) | ||
84 | | (inst & MSR_EE); | ||
85 | kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS); | ||
86 | break; | ||
87 | |||
88 | default: | ||
89 | emulated = EMULATE_FAIL; | ||
90 | } | ||
91 | |||
92 | break; | ||
93 | |||
94 | default: | ||
95 | emulated = EMULATE_FAIL; | ||
96 | } | ||
97 | |||
98 | return emulated; | ||
99 | } | ||
100 | |||
101 | int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) | ||
102 | { | ||
103 | int emulated = EMULATE_DONE; | ||
104 | |||
105 | switch (sprn) { | ||
106 | case SPRN_DEAR: | ||
107 | vcpu->arch.dear = vcpu->arch.gpr[rs]; break; | ||
108 | case SPRN_ESR: | ||
109 | vcpu->arch.esr = vcpu->arch.gpr[rs]; break; | ||
110 | case SPRN_DBCR0: | ||
111 | vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break; | ||
112 | case SPRN_DBCR1: | ||
113 | vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break; | ||
114 | case SPRN_DBSR: | ||
115 | vcpu->arch.dbsr &= ~vcpu->arch.gpr[rs]; break; | ||
116 | case SPRN_TSR: | ||
117 | vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break; | ||
118 | case SPRN_TCR: | ||
119 | vcpu->arch.tcr = vcpu->arch.gpr[rs]; | ||
120 | kvmppc_emulate_dec(vcpu); | ||
121 | break; | ||
122 | |||
123 | /* Note: SPRG4-7 are user-readable. These values are | ||
124 | * loaded into the real SPRGs when resuming the | ||
125 | * guest. */ | ||
126 | case SPRN_SPRG4: | ||
127 | vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break; | ||
128 | case SPRN_SPRG5: | ||
129 | vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break; | ||
130 | case SPRN_SPRG6: | ||
131 | vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break; | ||
132 | case SPRN_SPRG7: | ||
133 | vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break; | ||
134 | |||
135 | case SPRN_IVPR: | ||
136 | vcpu->arch.ivpr = vcpu->arch.gpr[rs]; | ||
137 | break; | ||
138 | case SPRN_IVOR0: | ||
139 | vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs]; | ||
140 | break; | ||
141 | case SPRN_IVOR1: | ||
142 | vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs]; | ||
143 | break; | ||
144 | case SPRN_IVOR2: | ||
145 | vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs]; | ||
146 | break; | ||
147 | case SPRN_IVOR3: | ||
148 | vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs]; | ||
149 | break; | ||
150 | case SPRN_IVOR4: | ||
151 | vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs]; | ||
152 | break; | ||
153 | case SPRN_IVOR5: | ||
154 | vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs]; | ||
155 | break; | ||
156 | case SPRN_IVOR6: | ||
157 | vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs]; | ||
158 | break; | ||
159 | case SPRN_IVOR7: | ||
160 | vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs]; | ||
161 | break; | ||
162 | case SPRN_IVOR8: | ||
163 | vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs]; | ||
164 | break; | ||
165 | case SPRN_IVOR9: | ||
166 | vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs]; | ||
167 | break; | ||
168 | case SPRN_IVOR10: | ||
169 | vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs]; | ||
170 | break; | ||
171 | case SPRN_IVOR11: | ||
172 | vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs]; | ||
173 | break; | ||
174 | case SPRN_IVOR12: | ||
175 | vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs]; | ||
176 | break; | ||
177 | case SPRN_IVOR13: | ||
178 | vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs]; | ||
179 | break; | ||
180 | case SPRN_IVOR14: | ||
181 | vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs]; | ||
182 | break; | ||
183 | case SPRN_IVOR15: | ||
184 | vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs]; | ||
185 | break; | ||
186 | |||
187 | default: | ||
188 | emulated = EMULATE_FAIL; | ||
189 | } | ||
190 | |||
191 | return emulated; | ||
192 | } | ||
193 | |||
194 | int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) | ||
195 | { | ||
196 | int emulated = EMULATE_DONE; | ||
197 | |||
198 | switch (sprn) { | ||
199 | case SPRN_IVPR: | ||
200 | vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break; | ||
201 | case SPRN_DEAR: | ||
202 | vcpu->arch.gpr[rt] = vcpu->arch.dear; break; | ||
203 | case SPRN_ESR: | ||
204 | vcpu->arch.gpr[rt] = vcpu->arch.esr; break; | ||
205 | case SPRN_DBCR0: | ||
206 | vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break; | ||
207 | case SPRN_DBCR1: | ||
208 | vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break; | ||
209 | case SPRN_DBSR: | ||
210 | vcpu->arch.gpr[rt] = vcpu->arch.dbsr; break; | ||
211 | |||
212 | case SPRN_IVOR0: | ||
213 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; | ||
214 | break; | ||
215 | case SPRN_IVOR1: | ||
216 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; | ||
217 | break; | ||
218 | case SPRN_IVOR2: | ||
219 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; | ||
220 | break; | ||
221 | case SPRN_IVOR3: | ||
222 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; | ||
223 | break; | ||
224 | case SPRN_IVOR4: | ||
225 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; | ||
226 | break; | ||
227 | case SPRN_IVOR5: | ||
228 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; | ||
229 | break; | ||
230 | case SPRN_IVOR6: | ||
231 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; | ||
232 | break; | ||
233 | case SPRN_IVOR7: | ||
234 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; | ||
235 | break; | ||
236 | case SPRN_IVOR8: | ||
237 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; | ||
238 | break; | ||
239 | case SPRN_IVOR9: | ||
240 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; | ||
241 | break; | ||
242 | case SPRN_IVOR10: | ||
243 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; | ||
244 | break; | ||
245 | case SPRN_IVOR11: | ||
246 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; | ||
247 | break; | ||
248 | case SPRN_IVOR12: | ||
249 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; | ||
250 | break; | ||
251 | case SPRN_IVOR13: | ||
252 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; | ||
253 | break; | ||
254 | case SPRN_IVOR14: | ||
255 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; | ||
256 | break; | ||
257 | case SPRN_IVOR15: | ||
258 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; | ||
259 | break; | ||
260 | |||
261 | default: | ||
262 | emulated = EMULATE_FAIL; | ||
263 | } | ||
264 | |||
265 | return emulated; | ||
266 | } | ||
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S index 084ebcd7dd83..d0c6f841bbd1 100644 --- a/arch/powerpc/kvm/booke_interrupts.S +++ b/arch/powerpc/kvm/booke_interrupts.S | |||
@@ -86,6 +86,9 @@ KVM_HANDLER BOOKE_INTERRUPT_WATCHDOG | |||
86 | KVM_HANDLER BOOKE_INTERRUPT_DTLB_MISS | 86 | KVM_HANDLER BOOKE_INTERRUPT_DTLB_MISS |
87 | KVM_HANDLER BOOKE_INTERRUPT_ITLB_MISS | 87 | KVM_HANDLER BOOKE_INTERRUPT_ITLB_MISS |
88 | KVM_HANDLER BOOKE_INTERRUPT_DEBUG | 88 | KVM_HANDLER BOOKE_INTERRUPT_DEBUG |
89 | KVM_HANDLER BOOKE_INTERRUPT_SPE_UNAVAIL | ||
90 | KVM_HANDLER BOOKE_INTERRUPT_SPE_FP_DATA | ||
91 | KVM_HANDLER BOOKE_INTERRUPT_SPE_FP_ROUND | ||
89 | 92 | ||
90 | _GLOBAL(kvmppc_handler_len) | 93 | _GLOBAL(kvmppc_handler_len) |
91 | .long kvmppc_handler_1 - kvmppc_handler_0 | 94 | .long kvmppc_handler_1 - kvmppc_handler_0 |
@@ -347,7 +350,9 @@ lightweight_exit: | |||
347 | lwz r3, VCPU_SHADOW_PID(r4) | 350 | lwz r3, VCPU_SHADOW_PID(r4) |
348 | mtspr SPRN_PID, r3 | 351 | mtspr SPRN_PID, r3 |
349 | 352 | ||
353 | #ifdef CONFIG_44x | ||
350 | iccci 0, 0 /* XXX hack */ | 354 | iccci 0, 0 /* XXX hack */ |
355 | #endif | ||
351 | 356 | ||
352 | /* Load some guest volatiles. */ | 357 | /* Load some guest volatiles. */ |
353 | lwz r0, VCPU_GPR(r0)(r4) | 358 | lwz r0, VCPU_GPR(r0)(r4) |
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c new file mode 100644 index 000000000000..d8067fd81cdd --- /dev/null +++ b/arch/powerpc/kvm/e500.c | |||
@@ -0,0 +1,169 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved. | ||
3 | * | ||
4 | * Author: Yu Liu, <yu.liu@freescale.com> | ||
5 | * | ||
6 | * Description: | ||
7 | * This file is derived from arch/powerpc/kvm/44x.c, | ||
8 | * by Hollis Blanchard <hollisb@us.ibm.com>. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License, version 2, as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kvm_host.h> | ||
16 | #include <linux/err.h> | ||
17 | |||
18 | #include <asm/reg.h> | ||
19 | #include <asm/cputable.h> | ||
20 | #include <asm/tlbflush.h> | ||
21 | #include <asm/kvm_e500.h> | ||
22 | #include <asm/kvm_ppc.h> | ||
23 | |||
24 | #include "booke.h" | ||
25 | #include "e500_tlb.h" | ||
26 | |||
27 | void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu) | ||
28 | { | ||
29 | } | ||
30 | |||
31 | void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu) | ||
32 | { | ||
33 | } | ||
34 | |||
35 | void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | ||
36 | { | ||
37 | kvmppc_e500_tlb_load(vcpu, cpu); | ||
38 | } | ||
39 | |||
40 | void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) | ||
41 | { | ||
42 | kvmppc_e500_tlb_put(vcpu); | ||
43 | } | ||
44 | |||
45 | int kvmppc_core_check_processor_compat(void) | ||
46 | { | ||
47 | int r; | ||
48 | |||
49 | if (strcmp(cur_cpu_spec->cpu_name, "e500v2") == 0) | ||
50 | r = 0; | ||
51 | else | ||
52 | r = -ENOTSUPP; | ||
53 | |||
54 | return r; | ||
55 | } | ||
56 | |||
57 | int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu) | ||
58 | { | ||
59 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
60 | |||
61 | kvmppc_e500_tlb_setup(vcpu_e500); | ||
62 | |||
63 | /* Use the same core vertion as host's */ | ||
64 | vcpu->arch.pvr = mfspr(SPRN_PVR); | ||
65 | |||
66 | return 0; | ||
67 | } | ||
68 | |||
69 | /* 'linear_address' is actually an encoding of AS|PID|EADDR . */ | ||
70 | int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu, | ||
71 | struct kvm_translation *tr) | ||
72 | { | ||
73 | int index; | ||
74 | gva_t eaddr; | ||
75 | u8 pid; | ||
76 | u8 as; | ||
77 | |||
78 | eaddr = tr->linear_address; | ||
79 | pid = (tr->linear_address >> 32) & 0xff; | ||
80 | as = (tr->linear_address >> 40) & 0x1; | ||
81 | |||
82 | index = kvmppc_e500_tlb_search(vcpu, eaddr, pid, as); | ||
83 | if (index < 0) { | ||
84 | tr->valid = 0; | ||
85 | return 0; | ||
86 | } | ||
87 | |||
88 | tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr); | ||
89 | /* XXX what does "writeable" and "usermode" even mean? */ | ||
90 | tr->valid = 1; | ||
91 | |||
92 | return 0; | ||
93 | } | ||
94 | |||
95 | struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) | ||
96 | { | ||
97 | struct kvmppc_vcpu_e500 *vcpu_e500; | ||
98 | struct kvm_vcpu *vcpu; | ||
99 | int err; | ||
100 | |||
101 | vcpu_e500 = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL); | ||
102 | if (!vcpu_e500) { | ||
103 | err = -ENOMEM; | ||
104 | goto out; | ||
105 | } | ||
106 | |||
107 | vcpu = &vcpu_e500->vcpu; | ||
108 | err = kvm_vcpu_init(vcpu, kvm, id); | ||
109 | if (err) | ||
110 | goto free_vcpu; | ||
111 | |||
112 | err = kvmppc_e500_tlb_init(vcpu_e500); | ||
113 | if (err) | ||
114 | goto uninit_vcpu; | ||
115 | |||
116 | return vcpu; | ||
117 | |||
118 | uninit_vcpu: | ||
119 | kvm_vcpu_uninit(vcpu); | ||
120 | free_vcpu: | ||
121 | kmem_cache_free(kvm_vcpu_cache, vcpu_e500); | ||
122 | out: | ||
123 | return ERR_PTR(err); | ||
124 | } | ||
125 | |||
126 | void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) | ||
127 | { | ||
128 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
129 | |||
130 | kvmppc_e500_tlb_uninit(vcpu_e500); | ||
131 | kvm_vcpu_uninit(vcpu); | ||
132 | kmem_cache_free(kvm_vcpu_cache, vcpu_e500); | ||
133 | } | ||
134 | |||
135 | static int kvmppc_e500_init(void) | ||
136 | { | ||
137 | int r, i; | ||
138 | unsigned long ivor[3]; | ||
139 | unsigned long max_ivor = 0; | ||
140 | |||
141 | r = kvmppc_booke_init(); | ||
142 | if (r) | ||
143 | return r; | ||
144 | |||
145 | /* copy extra E500 exception handlers */ | ||
146 | ivor[0] = mfspr(SPRN_IVOR32); | ||
147 | ivor[1] = mfspr(SPRN_IVOR33); | ||
148 | ivor[2] = mfspr(SPRN_IVOR34); | ||
149 | for (i = 0; i < 3; i++) { | ||
150 | if (ivor[i] > max_ivor) | ||
151 | max_ivor = ivor[i]; | ||
152 | |||
153 | memcpy((void *)kvmppc_booke_handlers + ivor[i], | ||
154 | kvmppc_handlers_start + (i + 16) * kvmppc_handler_len, | ||
155 | kvmppc_handler_len); | ||
156 | } | ||
157 | flush_icache_range(kvmppc_booke_handlers, | ||
158 | kvmppc_booke_handlers + max_ivor + kvmppc_handler_len); | ||
159 | |||
160 | return kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), THIS_MODULE); | ||
161 | } | ||
162 | |||
163 | static void kvmppc_e500_exit(void) | ||
164 | { | ||
165 | kvmppc_booke_exit(); | ||
166 | } | ||
167 | |||
168 | module_init(kvmppc_e500_init); | ||
169 | module_exit(kvmppc_e500_exit); | ||
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c new file mode 100644 index 000000000000..3f760414b9f8 --- /dev/null +++ b/arch/powerpc/kvm/e500_emulate.c | |||
@@ -0,0 +1,202 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved. | ||
3 | * | ||
4 | * Author: Yu Liu, <yu.liu@freescale.com> | ||
5 | * | ||
6 | * Description: | ||
7 | * This file is derived from arch/powerpc/kvm/44x_emulate.c, | ||
8 | * by Hollis Blanchard <hollisb@us.ibm.com>. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License, version 2, as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <asm/kvm_ppc.h> | ||
16 | #include <asm/disassemble.h> | ||
17 | #include <asm/kvm_e500.h> | ||
18 | |||
19 | #include "booke.h" | ||
20 | #include "e500_tlb.h" | ||
21 | |||
22 | #define XOP_TLBIVAX 786 | ||
23 | #define XOP_TLBSX 914 | ||
24 | #define XOP_TLBRE 946 | ||
25 | #define XOP_TLBWE 978 | ||
26 | |||
27 | int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, | ||
28 | unsigned int inst, int *advance) | ||
29 | { | ||
30 | int emulated = EMULATE_DONE; | ||
31 | int ra; | ||
32 | int rb; | ||
33 | |||
34 | switch (get_op(inst)) { | ||
35 | case 31: | ||
36 | switch (get_xop(inst)) { | ||
37 | |||
38 | case XOP_TLBRE: | ||
39 | emulated = kvmppc_e500_emul_tlbre(vcpu); | ||
40 | break; | ||
41 | |||
42 | case XOP_TLBWE: | ||
43 | emulated = kvmppc_e500_emul_tlbwe(vcpu); | ||
44 | break; | ||
45 | |||
46 | case XOP_TLBSX: | ||
47 | rb = get_rb(inst); | ||
48 | emulated = kvmppc_e500_emul_tlbsx(vcpu,rb); | ||
49 | break; | ||
50 | |||
51 | case XOP_TLBIVAX: | ||
52 | ra = get_ra(inst); | ||
53 | rb = get_rb(inst); | ||
54 | emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb); | ||
55 | break; | ||
56 | |||
57 | default: | ||
58 | emulated = EMULATE_FAIL; | ||
59 | } | ||
60 | |||
61 | break; | ||
62 | |||
63 | default: | ||
64 | emulated = EMULATE_FAIL; | ||
65 | } | ||
66 | |||
67 | if (emulated == EMULATE_FAIL) | ||
68 | emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance); | ||
69 | |||
70 | return emulated; | ||
71 | } | ||
72 | |||
73 | int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs) | ||
74 | { | ||
75 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
76 | int emulated = EMULATE_DONE; | ||
77 | |||
78 | switch (sprn) { | ||
79 | case SPRN_PID: | ||
80 | vcpu_e500->pid[0] = vcpu->arch.shadow_pid = | ||
81 | vcpu->arch.pid = vcpu->arch.gpr[rs]; | ||
82 | break; | ||
83 | case SPRN_PID1: | ||
84 | vcpu_e500->pid[1] = vcpu->arch.gpr[rs]; break; | ||
85 | case SPRN_PID2: | ||
86 | vcpu_e500->pid[2] = vcpu->arch.gpr[rs]; break; | ||
87 | case SPRN_MAS0: | ||
88 | vcpu_e500->mas0 = vcpu->arch.gpr[rs]; break; | ||
89 | case SPRN_MAS1: | ||
90 | vcpu_e500->mas1 = vcpu->arch.gpr[rs]; break; | ||
91 | case SPRN_MAS2: | ||
92 | vcpu_e500->mas2 = vcpu->arch.gpr[rs]; break; | ||
93 | case SPRN_MAS3: | ||
94 | vcpu_e500->mas3 = vcpu->arch.gpr[rs]; break; | ||
95 | case SPRN_MAS4: | ||
96 | vcpu_e500->mas4 = vcpu->arch.gpr[rs]; break; | ||
97 | case SPRN_MAS6: | ||
98 | vcpu_e500->mas6 = vcpu->arch.gpr[rs]; break; | ||
99 | case SPRN_MAS7: | ||
100 | vcpu_e500->mas7 = vcpu->arch.gpr[rs]; break; | ||
101 | case SPRN_L1CSR1: | ||
102 | vcpu_e500->l1csr1 = vcpu->arch.gpr[rs]; break; | ||
103 | case SPRN_HID0: | ||
104 | vcpu_e500->hid0 = vcpu->arch.gpr[rs]; break; | ||
105 | case SPRN_HID1: | ||
106 | vcpu_e500->hid1 = vcpu->arch.gpr[rs]; break; | ||
107 | |||
108 | case SPRN_MMUCSR0: | ||
109 | emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500, | ||
110 | vcpu->arch.gpr[rs]); | ||
111 | break; | ||
112 | |||
113 | /* extra exceptions */ | ||
114 | case SPRN_IVOR32: | ||
115 | vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = vcpu->arch.gpr[rs]; | ||
116 | break; | ||
117 | case SPRN_IVOR33: | ||
118 | vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = vcpu->arch.gpr[rs]; | ||
119 | break; | ||
120 | case SPRN_IVOR34: | ||
121 | vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = vcpu->arch.gpr[rs]; | ||
122 | break; | ||
123 | case SPRN_IVOR35: | ||
124 | vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = vcpu->arch.gpr[rs]; | ||
125 | break; | ||
126 | |||
127 | default: | ||
128 | emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs); | ||
129 | } | ||
130 | |||
131 | return emulated; | ||
132 | } | ||
133 | |||
134 | int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt) | ||
135 | { | ||
136 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
137 | int emulated = EMULATE_DONE; | ||
138 | |||
139 | switch (sprn) { | ||
140 | case SPRN_PID: | ||
141 | vcpu->arch.gpr[rt] = vcpu_e500->pid[0]; break; | ||
142 | case SPRN_PID1: | ||
143 | vcpu->arch.gpr[rt] = vcpu_e500->pid[1]; break; | ||
144 | case SPRN_PID2: | ||
145 | vcpu->arch.gpr[rt] = vcpu_e500->pid[2]; break; | ||
146 | case SPRN_MAS0: | ||
147 | vcpu->arch.gpr[rt] = vcpu_e500->mas0; break; | ||
148 | case SPRN_MAS1: | ||
149 | vcpu->arch.gpr[rt] = vcpu_e500->mas1; break; | ||
150 | case SPRN_MAS2: | ||
151 | vcpu->arch.gpr[rt] = vcpu_e500->mas2; break; | ||
152 | case SPRN_MAS3: | ||
153 | vcpu->arch.gpr[rt] = vcpu_e500->mas3; break; | ||
154 | case SPRN_MAS4: | ||
155 | vcpu->arch.gpr[rt] = vcpu_e500->mas4; break; | ||
156 | case SPRN_MAS6: | ||
157 | vcpu->arch.gpr[rt] = vcpu_e500->mas6; break; | ||
158 | case SPRN_MAS7: | ||
159 | vcpu->arch.gpr[rt] = vcpu_e500->mas7; break; | ||
160 | |||
161 | case SPRN_TLB0CFG: | ||
162 | vcpu->arch.gpr[rt] = mfspr(SPRN_TLB0CFG); | ||
163 | vcpu->arch.gpr[rt] &= ~0xfffUL; | ||
164 | vcpu->arch.gpr[rt] |= vcpu_e500->guest_tlb_size[0]; | ||
165 | break; | ||
166 | |||
167 | case SPRN_TLB1CFG: | ||
168 | vcpu->arch.gpr[rt] = mfspr(SPRN_TLB1CFG); | ||
169 | vcpu->arch.gpr[rt] &= ~0xfffUL; | ||
170 | vcpu->arch.gpr[rt] |= vcpu_e500->guest_tlb_size[1]; | ||
171 | break; | ||
172 | |||
173 | case SPRN_L1CSR1: | ||
174 | vcpu->arch.gpr[rt] = vcpu_e500->l1csr1; break; | ||
175 | case SPRN_HID0: | ||
176 | vcpu->arch.gpr[rt] = vcpu_e500->hid0; break; | ||
177 | case SPRN_HID1: | ||
178 | vcpu->arch.gpr[rt] = vcpu_e500->hid1; break; | ||
179 | |||
180 | case SPRN_MMUCSR0: | ||
181 | vcpu->arch.gpr[rt] = 0; break; | ||
182 | |||
183 | /* extra exceptions */ | ||
184 | case SPRN_IVOR32: | ||
185 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]; | ||
186 | break; | ||
187 | case SPRN_IVOR33: | ||
188 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]; | ||
189 | break; | ||
190 | case SPRN_IVOR34: | ||
191 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]; | ||
192 | break; | ||
193 | case SPRN_IVOR35: | ||
194 | vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]; | ||
195 | break; | ||
196 | default: | ||
197 | emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt); | ||
198 | } | ||
199 | |||
200 | return emulated; | ||
201 | } | ||
202 | |||
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c new file mode 100644 index 000000000000..0e773fc2d5e4 --- /dev/null +++ b/arch/powerpc/kvm/e500_tlb.c | |||
@@ -0,0 +1,757 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved. | ||
3 | * | ||
4 | * Author: Yu Liu, yu.liu@freescale.com | ||
5 | * | ||
6 | * Description: | ||
7 | * This file is based on arch/powerpc/kvm/44x_tlb.c, | ||
8 | * by Hollis Blanchard <hollisb@us.ibm.com>. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License, version 2, as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/types.h> | ||
16 | #include <linux/string.h> | ||
17 | #include <linux/kvm.h> | ||
18 | #include <linux/kvm_host.h> | ||
19 | #include <linux/highmem.h> | ||
20 | #include <asm/kvm_ppc.h> | ||
21 | #include <asm/kvm_e500.h> | ||
22 | |||
23 | #include "../mm/mmu_decl.h" | ||
24 | #include "e500_tlb.h" | ||
25 | |||
26 | #define to_htlb1_esel(esel) (tlb1_entry_num - (esel) - 1) | ||
27 | |||
28 | static unsigned int tlb1_entry_num; | ||
29 | |||
30 | void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu) | ||
31 | { | ||
32 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
33 | struct tlbe *tlbe; | ||
34 | int i, tlbsel; | ||
35 | |||
36 | printk("| %8s | %8s | %8s | %8s | %8s |\n", | ||
37 | "nr", "mas1", "mas2", "mas3", "mas7"); | ||
38 | |||
39 | for (tlbsel = 0; tlbsel < 2; tlbsel++) { | ||
40 | printk("Guest TLB%d:\n", tlbsel); | ||
41 | for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++) { | ||
42 | tlbe = &vcpu_e500->guest_tlb[tlbsel][i]; | ||
43 | if (tlbe->mas1 & MAS1_VALID) | ||
44 | printk(" G[%d][%3d] | %08X | %08X | %08X | %08X |\n", | ||
45 | tlbsel, i, tlbe->mas1, tlbe->mas2, | ||
46 | tlbe->mas3, tlbe->mas7); | ||
47 | } | ||
48 | } | ||
49 | |||
50 | for (tlbsel = 0; tlbsel < 2; tlbsel++) { | ||
51 | printk("Shadow TLB%d:\n", tlbsel); | ||
52 | for (i = 0; i < vcpu_e500->shadow_tlb_size[tlbsel]; i++) { | ||
53 | tlbe = &vcpu_e500->shadow_tlb[tlbsel][i]; | ||
54 | if (tlbe->mas1 & MAS1_VALID) | ||
55 | printk(" S[%d][%3d] | %08X | %08X | %08X | %08X |\n", | ||
56 | tlbsel, i, tlbe->mas1, tlbe->mas2, | ||
57 | tlbe->mas3, tlbe->mas7); | ||
58 | } | ||
59 | } | ||
60 | } | ||
61 | |||
62 | static inline unsigned int tlb0_get_next_victim( | ||
63 | struct kvmppc_vcpu_e500 *vcpu_e500) | ||
64 | { | ||
65 | unsigned int victim; | ||
66 | |||
67 | victim = vcpu_e500->guest_tlb_nv[0]++; | ||
68 | if (unlikely(vcpu_e500->guest_tlb_nv[0] >= KVM_E500_TLB0_WAY_NUM)) | ||
69 | vcpu_e500->guest_tlb_nv[0] = 0; | ||
70 | |||
71 | return victim; | ||
72 | } | ||
73 | |||
74 | static inline unsigned int tlb1_max_shadow_size(void) | ||
75 | { | ||
76 | return tlb1_entry_num - tlbcam_index; | ||
77 | } | ||
78 | |||
79 | static inline int tlbe_is_writable(struct tlbe *tlbe) | ||
80 | { | ||
81 | return tlbe->mas3 & (MAS3_SW|MAS3_UW); | ||
82 | } | ||
83 | |||
84 | static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode) | ||
85 | { | ||
86 | /* Mask off reserved bits. */ | ||
87 | mas3 &= MAS3_ATTRIB_MASK; | ||
88 | |||
89 | if (!usermode) { | ||
90 | /* Guest is in supervisor mode, | ||
91 | * so we need to translate guest | ||
92 | * supervisor permissions into user permissions. */ | ||
93 | mas3 &= ~E500_TLB_USER_PERM_MASK; | ||
94 | mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1; | ||
95 | } | ||
96 | |||
97 | return mas3 | E500_TLB_SUPER_PERM_MASK; | ||
98 | } | ||
99 | |||
100 | static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode) | ||
101 | { | ||
102 | #ifdef CONFIG_SMP | ||
103 | return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M; | ||
104 | #else | ||
105 | return mas2 & MAS2_ATTRIB_MASK; | ||
106 | #endif | ||
107 | } | ||
108 | |||
109 | /* | ||
110 | * writing shadow tlb entry to host TLB | ||
111 | */ | ||
112 | static inline void __write_host_tlbe(struct tlbe *stlbe) | ||
113 | { | ||
114 | mtspr(SPRN_MAS1, stlbe->mas1); | ||
115 | mtspr(SPRN_MAS2, stlbe->mas2); | ||
116 | mtspr(SPRN_MAS3, stlbe->mas3); | ||
117 | mtspr(SPRN_MAS7, stlbe->mas7); | ||
118 | __asm__ __volatile__ ("tlbwe\n" : : ); | ||
119 | } | ||
120 | |||
121 | static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500, | ||
122 | int tlbsel, int esel) | ||
123 | { | ||
124 | struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel]; | ||
125 | |||
126 | local_irq_disable(); | ||
127 | if (tlbsel == 0) { | ||
128 | __write_host_tlbe(stlbe); | ||
129 | } else { | ||
130 | unsigned register mas0; | ||
131 | |||
132 | mas0 = mfspr(SPRN_MAS0); | ||
133 | |||
134 | mtspr(SPRN_MAS0, MAS0_TLBSEL(1) | MAS0_ESEL(to_htlb1_esel(esel))); | ||
135 | __write_host_tlbe(stlbe); | ||
136 | |||
137 | mtspr(SPRN_MAS0, mas0); | ||
138 | } | ||
139 | local_irq_enable(); | ||
140 | } | ||
141 | |||
142 | void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu) | ||
143 | { | ||
144 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
145 | int i; | ||
146 | unsigned register mas0; | ||
147 | |||
148 | /* Load all valid TLB1 entries to reduce guest tlb miss fault */ | ||
149 | local_irq_disable(); | ||
150 | mas0 = mfspr(SPRN_MAS0); | ||
151 | for (i = 0; i < tlb1_max_shadow_size(); i++) { | ||
152 | struct tlbe *stlbe = &vcpu_e500->shadow_tlb[1][i]; | ||
153 | |||
154 | if (get_tlb_v(stlbe)) { | ||
155 | mtspr(SPRN_MAS0, MAS0_TLBSEL(1) | ||
156 | | MAS0_ESEL(to_htlb1_esel(i))); | ||
157 | __write_host_tlbe(stlbe); | ||
158 | } | ||
159 | } | ||
160 | mtspr(SPRN_MAS0, mas0); | ||
161 | local_irq_enable(); | ||
162 | } | ||
163 | |||
164 | void kvmppc_e500_tlb_put(struct kvm_vcpu *vcpu) | ||
165 | { | ||
166 | _tlbil_all(); | ||
167 | } | ||
168 | |||
169 | /* Search the guest TLB for a matching entry. */ | ||
170 | static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500, | ||
171 | gva_t eaddr, int tlbsel, unsigned int pid, int as) | ||
172 | { | ||
173 | int i; | ||
174 | |||
175 | /* XXX Replace loop with fancy data structures. */ | ||
176 | for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++) { | ||
177 | struct tlbe *tlbe = &vcpu_e500->guest_tlb[tlbsel][i]; | ||
178 | unsigned int tid; | ||
179 | |||
180 | if (eaddr < get_tlb_eaddr(tlbe)) | ||
181 | continue; | ||
182 | |||
183 | if (eaddr > get_tlb_end(tlbe)) | ||
184 | continue; | ||
185 | |||
186 | tid = get_tlb_tid(tlbe); | ||
187 | if (tid && (tid != pid)) | ||
188 | continue; | ||
189 | |||
190 | if (!get_tlb_v(tlbe)) | ||
191 | continue; | ||
192 | |||
193 | if (get_tlb_ts(tlbe) != as && as != -1) | ||
194 | continue; | ||
195 | |||
196 | return i; | ||
197 | } | ||
198 | |||
199 | return -1; | ||
200 | } | ||
201 | |||
202 | static void kvmppc_e500_shadow_release(struct kvmppc_vcpu_e500 *vcpu_e500, | ||
203 | int tlbsel, int esel) | ||
204 | { | ||
205 | struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel]; | ||
206 | struct page *page = vcpu_e500->shadow_pages[tlbsel][esel]; | ||
207 | |||
208 | if (page) { | ||
209 | vcpu_e500->shadow_pages[tlbsel][esel] = NULL; | ||
210 | |||
211 | if (get_tlb_v(stlbe)) { | ||
212 | if (tlbe_is_writable(stlbe)) | ||
213 | kvm_release_page_dirty(page); | ||
214 | else | ||
215 | kvm_release_page_clean(page); | ||
216 | } | ||
217 | } | ||
218 | } | ||
219 | |||
220 | static void kvmppc_e500_stlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500, | ||
221 | int tlbsel, int esel) | ||
222 | { | ||
223 | struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel]; | ||
224 | |||
225 | kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel); | ||
226 | stlbe->mas1 = 0; | ||
227 | KVMTRACE_5D(STLB_INVAL, &vcpu_e500->vcpu, index_of(tlbsel, esel), | ||
228 | stlbe->mas1, stlbe->mas2, stlbe->mas3, stlbe->mas7, | ||
229 | handler); | ||
230 | } | ||
231 | |||
232 | static void kvmppc_e500_tlb1_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500, | ||
233 | gva_t eaddr, gva_t eend, u32 tid) | ||
234 | { | ||
235 | unsigned int pid = tid & 0xff; | ||
236 | unsigned int i; | ||
237 | |||
238 | /* XXX Replace loop with fancy data structures. */ | ||
239 | for (i = 0; i < vcpu_e500->guest_tlb_size[1]; i++) { | ||
240 | struct tlbe *stlbe = &vcpu_e500->shadow_tlb[1][i]; | ||
241 | unsigned int tid; | ||
242 | |||
243 | if (!get_tlb_v(stlbe)) | ||
244 | continue; | ||
245 | |||
246 | if (eend < get_tlb_eaddr(stlbe)) | ||
247 | continue; | ||
248 | |||
249 | if (eaddr > get_tlb_end(stlbe)) | ||
250 | continue; | ||
251 | |||
252 | tid = get_tlb_tid(stlbe); | ||
253 | if (tid && (tid != pid)) | ||
254 | continue; | ||
255 | |||
256 | kvmppc_e500_stlbe_invalidate(vcpu_e500, 1, i); | ||
257 | write_host_tlbe(vcpu_e500, 1, i); | ||
258 | } | ||
259 | } | ||
260 | |||
261 | static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu, | ||
262 | unsigned int eaddr, int as) | ||
263 | { | ||
264 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
265 | unsigned int victim, pidsel, tsized; | ||
266 | int tlbsel; | ||
267 | |||
268 | /* since we only have two TLBs, only lower bit is used. */ | ||
269 | tlbsel = (vcpu_e500->mas4 >> 28) & 0x1; | ||
270 | victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0; | ||
271 | pidsel = (vcpu_e500->mas4 >> 16) & 0xf; | ||
272 | tsized = (vcpu_e500->mas4 >> 8) & 0xf; | ||
273 | |||
274 | vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim) | ||
275 | | MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]); | ||
276 | vcpu_e500->mas1 = MAS1_VALID | (as ? MAS1_TS : 0) | ||
277 | | MAS1_TID(vcpu_e500->pid[pidsel]) | ||
278 | | MAS1_TSIZE(tsized); | ||
279 | vcpu_e500->mas2 = (eaddr & MAS2_EPN) | ||
280 | | (vcpu_e500->mas4 & MAS2_ATTRIB_MASK); | ||
281 | vcpu_e500->mas3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3; | ||
282 | vcpu_e500->mas6 = (vcpu_e500->mas6 & MAS6_SPID1) | ||
283 | | (get_cur_pid(vcpu) << 16) | ||
284 | | (as ? MAS6_SAS : 0); | ||
285 | vcpu_e500->mas7 = 0; | ||
286 | } | ||
287 | |||
288 | static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500, | ||
289 | u64 gvaddr, gfn_t gfn, struct tlbe *gtlbe, int tlbsel, int esel) | ||
290 | { | ||
291 | struct page *new_page; | ||
292 | struct tlbe *stlbe; | ||
293 | hpa_t hpaddr; | ||
294 | |||
295 | stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel]; | ||
296 | |||
297 | /* Get reference to new page. */ | ||
298 | new_page = gfn_to_page(vcpu_e500->vcpu.kvm, gfn); | ||
299 | if (is_error_page(new_page)) { | ||
300 | printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn); | ||
301 | kvm_release_page_clean(new_page); | ||
302 | return; | ||
303 | } | ||
304 | hpaddr = page_to_phys(new_page); | ||
305 | |||
306 | /* Drop reference to old page. */ | ||
307 | kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel); | ||
308 | |||
309 | vcpu_e500->shadow_pages[tlbsel][esel] = new_page; | ||
310 | |||
311 | /* Force TS=1 IPROT=0 TSIZE=4KB for all guest mappings. */ | ||
312 | stlbe->mas1 = MAS1_TSIZE(BOOKE_PAGESZ_4K) | ||
313 | | MAS1_TID(get_tlb_tid(gtlbe)) | MAS1_TS | MAS1_VALID; | ||
314 | stlbe->mas2 = (gvaddr & MAS2_EPN) | ||
315 | | e500_shadow_mas2_attrib(gtlbe->mas2, | ||
316 | vcpu_e500->vcpu.arch.msr & MSR_PR); | ||
317 | stlbe->mas3 = (hpaddr & MAS3_RPN) | ||
318 | | e500_shadow_mas3_attrib(gtlbe->mas3, | ||
319 | vcpu_e500->vcpu.arch.msr & MSR_PR); | ||
320 | stlbe->mas7 = (hpaddr >> 32) & MAS7_RPN; | ||
321 | |||
322 | KVMTRACE_5D(STLB_WRITE, &vcpu_e500->vcpu, index_of(tlbsel, esel), | ||
323 | stlbe->mas1, stlbe->mas2, stlbe->mas3, stlbe->mas7, | ||
324 | handler); | ||
325 | } | ||
326 | |||
327 | /* XXX only map the one-one case, for now use TLB0 */ | ||
328 | static int kvmppc_e500_stlbe_map(struct kvmppc_vcpu_e500 *vcpu_e500, | ||
329 | int tlbsel, int esel) | ||
330 | { | ||
331 | struct tlbe *gtlbe; | ||
332 | |||
333 | gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel]; | ||
334 | |||
335 | kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe), | ||
336 | get_tlb_raddr(gtlbe) >> PAGE_SHIFT, | ||
337 | gtlbe, tlbsel, esel); | ||
338 | |||
339 | return esel; | ||
340 | } | ||
341 | |||
342 | /* Caller must ensure that the specified guest TLB entry is safe to insert into | ||
343 | * the shadow TLB. */ | ||
344 | /* XXX for both one-one and one-to-many , for now use TLB1 */ | ||
345 | static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500, | ||
346 | u64 gvaddr, gfn_t gfn, struct tlbe *gtlbe) | ||
347 | { | ||
348 | unsigned int victim; | ||
349 | |||
350 | victim = vcpu_e500->guest_tlb_nv[1]++; | ||
351 | |||
352 | if (unlikely(vcpu_e500->guest_tlb_nv[1] >= tlb1_max_shadow_size())) | ||
353 | vcpu_e500->guest_tlb_nv[1] = 0; | ||
354 | |||
355 | kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, victim); | ||
356 | |||
357 | return victim; | ||
358 | } | ||
359 | |||
360 | /* Invalidate all guest kernel mappings when enter usermode, | ||
361 | * so that when they fault back in they will get the | ||
362 | * proper permission bits. */ | ||
363 | void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode) | ||
364 | { | ||
365 | if (usermode) { | ||
366 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
367 | int i; | ||
368 | |||
369 | /* XXX Replace loop with fancy data structures. */ | ||
370 | for (i = 0; i < tlb1_max_shadow_size(); i++) | ||
371 | kvmppc_e500_stlbe_invalidate(vcpu_e500, 1, i); | ||
372 | |||
373 | _tlbil_all(); | ||
374 | } | ||
375 | } | ||
376 | |||
377 | static int kvmppc_e500_gtlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500, | ||
378 | int tlbsel, int esel) | ||
379 | { | ||
380 | struct tlbe *gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel]; | ||
381 | |||
382 | if (unlikely(get_tlb_iprot(gtlbe))) | ||
383 | return -1; | ||
384 | |||
385 | if (tlbsel == 1) { | ||
386 | kvmppc_e500_tlb1_invalidate(vcpu_e500, get_tlb_eaddr(gtlbe), | ||
387 | get_tlb_end(gtlbe), | ||
388 | get_tlb_tid(gtlbe)); | ||
389 | } else { | ||
390 | kvmppc_e500_stlbe_invalidate(vcpu_e500, tlbsel, esel); | ||
391 | } | ||
392 | |||
393 | gtlbe->mas1 = 0; | ||
394 | |||
395 | return 0; | ||
396 | } | ||
397 | |||
398 | int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value) | ||
399 | { | ||
400 | int esel; | ||
401 | |||
402 | if (value & MMUCSR0_TLB0FI) | ||
403 | for (esel = 0; esel < vcpu_e500->guest_tlb_size[0]; esel++) | ||
404 | kvmppc_e500_gtlbe_invalidate(vcpu_e500, 0, esel); | ||
405 | if (value & MMUCSR0_TLB1FI) | ||
406 | for (esel = 0; esel < vcpu_e500->guest_tlb_size[1]; esel++) | ||
407 | kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel); | ||
408 | |||
409 | _tlbil_all(); | ||
410 | |||
411 | return EMULATE_DONE; | ||
412 | } | ||
413 | |||
414 | int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb) | ||
415 | { | ||
416 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
417 | unsigned int ia; | ||
418 | int esel, tlbsel; | ||
419 | gva_t ea; | ||
420 | |||
421 | ea = ((ra) ? vcpu->arch.gpr[ra] : 0) + vcpu->arch.gpr[rb]; | ||
422 | |||
423 | ia = (ea >> 2) & 0x1; | ||
424 | |||
425 | /* since we only have two TLBs, only lower bit is used. */ | ||
426 | tlbsel = (ea >> 3) & 0x1; | ||
427 | |||
428 | if (ia) { | ||
429 | /* invalidate all entries */ | ||
430 | for (esel = 0; esel < vcpu_e500->guest_tlb_size[tlbsel]; esel++) | ||
431 | kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel); | ||
432 | } else { | ||
433 | ea &= 0xfffff000; | ||
434 | esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, | ||
435 | get_cur_pid(vcpu), -1); | ||
436 | if (esel >= 0) | ||
437 | kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel); | ||
438 | } | ||
439 | |||
440 | _tlbil_all(); | ||
441 | |||
442 | return EMULATE_DONE; | ||
443 | } | ||
444 | |||
445 | int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu) | ||
446 | { | ||
447 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
448 | int tlbsel, esel; | ||
449 | struct tlbe *gtlbe; | ||
450 | |||
451 | tlbsel = get_tlb_tlbsel(vcpu_e500); | ||
452 | esel = get_tlb_esel(vcpu_e500, tlbsel); | ||
453 | |||
454 | gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel]; | ||
455 | vcpu_e500->mas0 &= ~MAS0_NV(~0); | ||
456 | vcpu_e500->mas0 |= MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]); | ||
457 | vcpu_e500->mas1 = gtlbe->mas1; | ||
458 | vcpu_e500->mas2 = gtlbe->mas2; | ||
459 | vcpu_e500->mas3 = gtlbe->mas3; | ||
460 | vcpu_e500->mas7 = gtlbe->mas7; | ||
461 | |||
462 | return EMULATE_DONE; | ||
463 | } | ||
464 | |||
465 | int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb) | ||
466 | { | ||
467 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
468 | int as = !!get_cur_sas(vcpu_e500); | ||
469 | unsigned int pid = get_cur_spid(vcpu_e500); | ||
470 | int esel, tlbsel; | ||
471 | struct tlbe *gtlbe = NULL; | ||
472 | gva_t ea; | ||
473 | |||
474 | ea = vcpu->arch.gpr[rb]; | ||
475 | |||
476 | for (tlbsel = 0; tlbsel < 2; tlbsel++) { | ||
477 | esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as); | ||
478 | if (esel >= 0) { | ||
479 | gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel]; | ||
480 | break; | ||
481 | } | ||
482 | } | ||
483 | |||
484 | if (gtlbe) { | ||
485 | vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel) | ||
486 | | MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]); | ||
487 | vcpu_e500->mas1 = gtlbe->mas1; | ||
488 | vcpu_e500->mas2 = gtlbe->mas2; | ||
489 | vcpu_e500->mas3 = gtlbe->mas3; | ||
490 | vcpu_e500->mas7 = gtlbe->mas7; | ||
491 | } else { | ||
492 | int victim; | ||
493 | |||
494 | /* since we only have two TLBs, only lower bit is used. */ | ||
495 | tlbsel = vcpu_e500->mas4 >> 28 & 0x1; | ||
496 | victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0; | ||
497 | |||
498 | vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim) | ||
499 | | MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]); | ||
500 | vcpu_e500->mas1 = (vcpu_e500->mas6 & MAS6_SPID0) | ||
501 | | (vcpu_e500->mas6 & (MAS6_SAS ? MAS1_TS : 0)) | ||
502 | | (vcpu_e500->mas4 & MAS4_TSIZED(~0)); | ||
503 | vcpu_e500->mas2 &= MAS2_EPN; | ||
504 | vcpu_e500->mas2 |= vcpu_e500->mas4 & MAS2_ATTRIB_MASK; | ||
505 | vcpu_e500->mas3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3; | ||
506 | vcpu_e500->mas7 = 0; | ||
507 | } | ||
508 | |||
509 | return EMULATE_DONE; | ||
510 | } | ||
511 | |||
512 | int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu) | ||
513 | { | ||
514 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
515 | u64 eaddr; | ||
516 | u64 raddr; | ||
517 | u32 tid; | ||
518 | struct tlbe *gtlbe; | ||
519 | int tlbsel, esel, stlbsel, sesel; | ||
520 | |||
521 | tlbsel = get_tlb_tlbsel(vcpu_e500); | ||
522 | esel = get_tlb_esel(vcpu_e500, tlbsel); | ||
523 | |||
524 | gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel]; | ||
525 | |||
526 | if (get_tlb_v(gtlbe) && tlbsel == 1) { | ||
527 | eaddr = get_tlb_eaddr(gtlbe); | ||
528 | tid = get_tlb_tid(gtlbe); | ||
529 | kvmppc_e500_tlb1_invalidate(vcpu_e500, eaddr, | ||
530 | get_tlb_end(gtlbe), tid); | ||
531 | } | ||
532 | |||
533 | gtlbe->mas1 = vcpu_e500->mas1; | ||
534 | gtlbe->mas2 = vcpu_e500->mas2; | ||
535 | gtlbe->mas3 = vcpu_e500->mas3; | ||
536 | gtlbe->mas7 = vcpu_e500->mas7; | ||
537 | |||
538 | KVMTRACE_5D(GTLB_WRITE, vcpu, vcpu_e500->mas0, | ||
539 | gtlbe->mas1, gtlbe->mas2, gtlbe->mas3, gtlbe->mas7, | ||
540 | handler); | ||
541 | |||
542 | /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */ | ||
543 | if (tlbe_is_host_safe(vcpu, gtlbe)) { | ||
544 | switch (tlbsel) { | ||
545 | case 0: | ||
546 | /* TLB0 */ | ||
547 | gtlbe->mas1 &= ~MAS1_TSIZE(~0); | ||
548 | gtlbe->mas1 |= MAS1_TSIZE(BOOKE_PAGESZ_4K); | ||
549 | |||
550 | stlbsel = 0; | ||
551 | sesel = kvmppc_e500_stlbe_map(vcpu_e500, 0, esel); | ||
552 | |||
553 | break; | ||
554 | |||
555 | case 1: | ||
556 | /* TLB1 */ | ||
557 | eaddr = get_tlb_eaddr(gtlbe); | ||
558 | raddr = get_tlb_raddr(gtlbe); | ||
559 | |||
560 | /* Create a 4KB mapping on the host. | ||
561 | * If the guest wanted a large page, | ||
562 | * only the first 4KB is mapped here and the rest | ||
563 | * are mapped on the fly. */ | ||
564 | stlbsel = 1; | ||
565 | sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, | ||
566 | raddr >> PAGE_SHIFT, gtlbe); | ||
567 | break; | ||
568 | |||
569 | default: | ||
570 | BUG(); | ||
571 | } | ||
572 | write_host_tlbe(vcpu_e500, stlbsel, sesel); | ||
573 | } | ||
574 | |||
575 | return EMULATE_DONE; | ||
576 | } | ||
577 | |||
578 | int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr) | ||
579 | { | ||
580 | unsigned int as = !!(vcpu->arch.msr & MSR_IS); | ||
581 | |||
582 | return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as); | ||
583 | } | ||
584 | |||
585 | int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr) | ||
586 | { | ||
587 | unsigned int as = !!(vcpu->arch.msr & MSR_DS); | ||
588 | |||
589 | return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as); | ||
590 | } | ||
591 | |||
592 | void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu) | ||
593 | { | ||
594 | unsigned int as = !!(vcpu->arch.msr & MSR_IS); | ||
595 | |||
596 | kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as); | ||
597 | } | ||
598 | |||
599 | void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu) | ||
600 | { | ||
601 | unsigned int as = !!(vcpu->arch.msr & MSR_DS); | ||
602 | |||
603 | kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as); | ||
604 | } | ||
605 | |||
606 | gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index, | ||
607 | gva_t eaddr) | ||
608 | { | ||
609 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
610 | struct tlbe *gtlbe = | ||
611 | &vcpu_e500->guest_tlb[tlbsel_of(index)][esel_of(index)]; | ||
612 | u64 pgmask = get_tlb_bytes(gtlbe) - 1; | ||
613 | |||
614 | return get_tlb_raddr(gtlbe) | (eaddr & pgmask); | ||
615 | } | ||
616 | |||
617 | void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) | ||
618 | { | ||
619 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
620 | int tlbsel, i; | ||
621 | |||
622 | for (tlbsel = 0; tlbsel < 2; tlbsel++) | ||
623 | for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++) | ||
624 | kvmppc_e500_shadow_release(vcpu_e500, tlbsel, i); | ||
625 | |||
626 | /* discard all guest mapping */ | ||
627 | _tlbil_all(); | ||
628 | } | ||
629 | |||
630 | void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr, | ||
631 | unsigned int index) | ||
632 | { | ||
633 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
634 | int tlbsel = tlbsel_of(index); | ||
635 | int esel = esel_of(index); | ||
636 | int stlbsel, sesel; | ||
637 | |||
638 | switch (tlbsel) { | ||
639 | case 0: | ||
640 | stlbsel = 0; | ||
641 | sesel = esel; | ||
642 | break; | ||
643 | |||
644 | case 1: { | ||
645 | gfn_t gfn = gpaddr >> PAGE_SHIFT; | ||
646 | struct tlbe *gtlbe | ||
647 | = &vcpu_e500->guest_tlb[tlbsel][esel]; | ||
648 | |||
649 | stlbsel = 1; | ||
650 | sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn, gtlbe); | ||
651 | break; | ||
652 | } | ||
653 | |||
654 | default: | ||
655 | BUG(); | ||
656 | break; | ||
657 | } | ||
658 | write_host_tlbe(vcpu_e500, stlbsel, sesel); | ||
659 | } | ||
660 | |||
661 | int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu, | ||
662 | gva_t eaddr, unsigned int pid, int as) | ||
663 | { | ||
664 | struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); | ||
665 | int esel, tlbsel; | ||
666 | |||
667 | for (tlbsel = 0; tlbsel < 2; tlbsel++) { | ||
668 | esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as); | ||
669 | if (esel >= 0) | ||
670 | return index_of(tlbsel, esel); | ||
671 | } | ||
672 | |||
673 | return -1; | ||
674 | } | ||
675 | |||
676 | void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500) | ||
677 | { | ||
678 | struct tlbe *tlbe; | ||
679 | |||
680 | /* Insert large initial mapping for guest. */ | ||
681 | tlbe = &vcpu_e500->guest_tlb[1][0]; | ||
682 | tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOKE_PAGESZ_256M); | ||
683 | tlbe->mas2 = 0; | ||
684 | tlbe->mas3 = E500_TLB_SUPER_PERM_MASK; | ||
685 | tlbe->mas7 = 0; | ||
686 | |||
687 | /* 4K map for serial output. Used by kernel wrapper. */ | ||
688 | tlbe = &vcpu_e500->guest_tlb[1][1]; | ||
689 | tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOKE_PAGESZ_4K); | ||
690 | tlbe->mas2 = (0xe0004500 & 0xFFFFF000) | MAS2_I | MAS2_G; | ||
691 | tlbe->mas3 = (0xe0004500 & 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK; | ||
692 | tlbe->mas7 = 0; | ||
693 | } | ||
694 | |||
695 | int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500) | ||
696 | { | ||
697 | tlb1_entry_num = mfspr(SPRN_TLB1CFG) & 0xFFF; | ||
698 | |||
699 | vcpu_e500->guest_tlb_size[0] = KVM_E500_TLB0_SIZE; | ||
700 | vcpu_e500->guest_tlb[0] = | ||
701 | kzalloc(sizeof(struct tlbe) * KVM_E500_TLB0_SIZE, GFP_KERNEL); | ||
702 | if (vcpu_e500->guest_tlb[0] == NULL) | ||
703 | goto err_out; | ||
704 | |||
705 | vcpu_e500->shadow_tlb_size[0] = KVM_E500_TLB0_SIZE; | ||
706 | vcpu_e500->shadow_tlb[0] = | ||
707 | kzalloc(sizeof(struct tlbe) * KVM_E500_TLB0_SIZE, GFP_KERNEL); | ||
708 | if (vcpu_e500->shadow_tlb[0] == NULL) | ||
709 | goto err_out_guest0; | ||
710 | |||
711 | vcpu_e500->guest_tlb_size[1] = KVM_E500_TLB1_SIZE; | ||
712 | vcpu_e500->guest_tlb[1] = | ||
713 | kzalloc(sizeof(struct tlbe) * KVM_E500_TLB1_SIZE, GFP_KERNEL); | ||
714 | if (vcpu_e500->guest_tlb[1] == NULL) | ||
715 | goto err_out_shadow0; | ||
716 | |||
717 | vcpu_e500->shadow_tlb_size[1] = tlb1_entry_num; | ||
718 | vcpu_e500->shadow_tlb[1] = | ||
719 | kzalloc(sizeof(struct tlbe) * tlb1_entry_num, GFP_KERNEL); | ||
720 | if (vcpu_e500->shadow_tlb[1] == NULL) | ||
721 | goto err_out_guest1; | ||
722 | |||
723 | vcpu_e500->shadow_pages[0] = (struct page **) | ||
724 | kzalloc(sizeof(struct page *) * KVM_E500_TLB0_SIZE, GFP_KERNEL); | ||
725 | if (vcpu_e500->shadow_pages[0] == NULL) | ||
726 | goto err_out_shadow1; | ||
727 | |||
728 | vcpu_e500->shadow_pages[1] = (struct page **) | ||
729 | kzalloc(sizeof(struct page *) * tlb1_entry_num, GFP_KERNEL); | ||
730 | if (vcpu_e500->shadow_pages[1] == NULL) | ||
731 | goto err_out_page0; | ||
732 | |||
733 | return 0; | ||
734 | |||
735 | err_out_page0: | ||
736 | kfree(vcpu_e500->shadow_pages[0]); | ||
737 | err_out_shadow1: | ||
738 | kfree(vcpu_e500->shadow_tlb[1]); | ||
739 | err_out_guest1: | ||
740 | kfree(vcpu_e500->guest_tlb[1]); | ||
741 | err_out_shadow0: | ||
742 | kfree(vcpu_e500->shadow_tlb[0]); | ||
743 | err_out_guest0: | ||
744 | kfree(vcpu_e500->guest_tlb[0]); | ||
745 | err_out: | ||
746 | return -1; | ||
747 | } | ||
748 | |||
749 | void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500) | ||
750 | { | ||
751 | kfree(vcpu_e500->shadow_pages[1]); | ||
752 | kfree(vcpu_e500->shadow_pages[0]); | ||
753 | kfree(vcpu_e500->shadow_tlb[1]); | ||
754 | kfree(vcpu_e500->guest_tlb[1]); | ||
755 | kfree(vcpu_e500->shadow_tlb[0]); | ||
756 | kfree(vcpu_e500->guest_tlb[0]); | ||
757 | } | ||
diff --git a/arch/powerpc/kvm/e500_tlb.h b/arch/powerpc/kvm/e500_tlb.h new file mode 100644 index 000000000000..45b064b76906 --- /dev/null +++ b/arch/powerpc/kvm/e500_tlb.h | |||
@@ -0,0 +1,185 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved. | ||
3 | * | ||
4 | * Author: Yu Liu, yu.liu@freescale.com | ||
5 | * | ||
6 | * Description: | ||
7 | * This file is based on arch/powerpc/kvm/44x_tlb.h, | ||
8 | * by Hollis Blanchard <hollisb@us.ibm.com>. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License, version 2, as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __KVM_E500_TLB_H__ | ||
16 | #define __KVM_E500_TLB_H__ | ||
17 | |||
18 | #include <linux/kvm_host.h> | ||
19 | #include <asm/mmu-fsl-booke.h> | ||
20 | #include <asm/tlb.h> | ||
21 | #include <asm/kvm_e500.h> | ||
22 | |||
23 | #define KVM_E500_TLB0_WAY_SIZE_BIT 7 /* Fixed */ | ||
24 | #define KVM_E500_TLB0_WAY_SIZE (1UL << KVM_E500_TLB0_WAY_SIZE_BIT) | ||
25 | #define KVM_E500_TLB0_WAY_SIZE_MASK (KVM_E500_TLB0_WAY_SIZE - 1) | ||
26 | |||
27 | #define KVM_E500_TLB0_WAY_NUM_BIT 1 /* No greater than 7 */ | ||
28 | #define KVM_E500_TLB0_WAY_NUM (1UL << KVM_E500_TLB0_WAY_NUM_BIT) | ||
29 | #define KVM_E500_TLB0_WAY_NUM_MASK (KVM_E500_TLB0_WAY_NUM - 1) | ||
30 | |||
31 | #define KVM_E500_TLB0_SIZE (KVM_E500_TLB0_WAY_SIZE * KVM_E500_TLB0_WAY_NUM) | ||
32 | #define KVM_E500_TLB1_SIZE 16 | ||
33 | |||
34 | #define index_of(tlbsel, esel) (((tlbsel) << 16) | ((esel) & 0xFFFF)) | ||
35 | #define tlbsel_of(index) ((index) >> 16) | ||
36 | #define esel_of(index) ((index) & 0xFFFF) | ||
37 | |||
38 | #define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW) | ||
39 | #define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW) | ||
40 | #define MAS2_ATTRIB_MASK \ | ||
41 | (MAS2_X0 | MAS2_X1) | ||
42 | #define MAS3_ATTRIB_MASK \ | ||
43 | (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \ | ||
44 | | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK) | ||
45 | |||
46 | extern void kvmppc_dump_tlbs(struct kvm_vcpu *); | ||
47 | extern int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *, ulong); | ||
48 | extern int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *); | ||
49 | extern int kvmppc_e500_emul_tlbre(struct kvm_vcpu *); | ||
50 | extern int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *, int, int); | ||
51 | extern int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *, int); | ||
52 | extern int kvmppc_e500_tlb_search(struct kvm_vcpu *, gva_t, unsigned int, int); | ||
53 | extern void kvmppc_e500_tlb_put(struct kvm_vcpu *); | ||
54 | extern void kvmppc_e500_tlb_load(struct kvm_vcpu *, int); | ||
55 | extern int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *); | ||
56 | extern void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *); | ||
57 | extern void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *); | ||
58 | |||
59 | /* TLB helper functions */ | ||
60 | static inline unsigned int get_tlb_size(const struct tlbe *tlbe) | ||
61 | { | ||
62 | return (tlbe->mas1 >> 8) & 0xf; | ||
63 | } | ||
64 | |||
65 | static inline gva_t get_tlb_eaddr(const struct tlbe *tlbe) | ||
66 | { | ||
67 | return tlbe->mas2 & 0xfffff000; | ||
68 | } | ||
69 | |||
70 | static inline u64 get_tlb_bytes(const struct tlbe *tlbe) | ||
71 | { | ||
72 | unsigned int pgsize = get_tlb_size(tlbe); | ||
73 | return 1ULL << 10 << (pgsize << 1); | ||
74 | } | ||
75 | |||
76 | static inline gva_t get_tlb_end(const struct tlbe *tlbe) | ||
77 | { | ||
78 | u64 bytes = get_tlb_bytes(tlbe); | ||
79 | return get_tlb_eaddr(tlbe) + bytes - 1; | ||
80 | } | ||
81 | |||
82 | static inline u64 get_tlb_raddr(const struct tlbe *tlbe) | ||
83 | { | ||
84 | u64 rpn = tlbe->mas7; | ||
85 | return (rpn << 32) | (tlbe->mas3 & 0xfffff000); | ||
86 | } | ||
87 | |||
88 | static inline unsigned int get_tlb_tid(const struct tlbe *tlbe) | ||
89 | { | ||
90 | return (tlbe->mas1 >> 16) & 0xff; | ||
91 | } | ||
92 | |||
93 | static inline unsigned int get_tlb_ts(const struct tlbe *tlbe) | ||
94 | { | ||
95 | return (tlbe->mas1 >> 12) & 0x1; | ||
96 | } | ||
97 | |||
98 | static inline unsigned int get_tlb_v(const struct tlbe *tlbe) | ||
99 | { | ||
100 | return (tlbe->mas1 >> 31) & 0x1; | ||
101 | } | ||
102 | |||
103 | static inline unsigned int get_tlb_iprot(const struct tlbe *tlbe) | ||
104 | { | ||
105 | return (tlbe->mas1 >> 30) & 0x1; | ||
106 | } | ||
107 | |||
108 | static inline unsigned int get_cur_pid(struct kvm_vcpu *vcpu) | ||
109 | { | ||
110 | return vcpu->arch.pid & 0xff; | ||
111 | } | ||
112 | |||
113 | static inline unsigned int get_cur_spid( | ||
114 | const struct kvmppc_vcpu_e500 *vcpu_e500) | ||
115 | { | ||
116 | return (vcpu_e500->mas6 >> 16) & 0xff; | ||
117 | } | ||
118 | |||
119 | static inline unsigned int get_cur_sas( | ||
120 | const struct kvmppc_vcpu_e500 *vcpu_e500) | ||
121 | { | ||
122 | return vcpu_e500->mas6 & 0x1; | ||
123 | } | ||
124 | |||
125 | static inline unsigned int get_tlb_tlbsel( | ||
126 | const struct kvmppc_vcpu_e500 *vcpu_e500) | ||
127 | { | ||
128 | /* | ||
129 | * Manual says that tlbsel has 2 bits wide. | ||
130 | * Since we only have two TLBs, only lower bit is used. | ||
131 | */ | ||
132 | return (vcpu_e500->mas0 >> 28) & 0x1; | ||
133 | } | ||
134 | |||
135 | static inline unsigned int get_tlb_nv_bit( | ||
136 | const struct kvmppc_vcpu_e500 *vcpu_e500) | ||
137 | { | ||
138 | return vcpu_e500->mas0 & 0xfff; | ||
139 | } | ||
140 | |||
141 | static inline unsigned int get_tlb_esel_bit( | ||
142 | const struct kvmppc_vcpu_e500 *vcpu_e500) | ||
143 | { | ||
144 | return (vcpu_e500->mas0 >> 16) & 0xfff; | ||
145 | } | ||
146 | |||
147 | static inline unsigned int get_tlb_esel( | ||
148 | const struct kvmppc_vcpu_e500 *vcpu_e500, | ||
149 | int tlbsel) | ||
150 | { | ||
151 | unsigned int esel = get_tlb_esel_bit(vcpu_e500); | ||
152 | |||
153 | if (tlbsel == 0) { | ||
154 | esel &= KVM_E500_TLB0_WAY_NUM_MASK; | ||
155 | esel |= ((vcpu_e500->mas2 >> 12) & KVM_E500_TLB0_WAY_SIZE_MASK) | ||
156 | << KVM_E500_TLB0_WAY_NUM_BIT; | ||
157 | } else { | ||
158 | esel &= KVM_E500_TLB1_SIZE - 1; | ||
159 | } | ||
160 | |||
161 | return esel; | ||
162 | } | ||
163 | |||
164 | static inline int tlbe_is_host_safe(const struct kvm_vcpu *vcpu, | ||
165 | const struct tlbe *tlbe) | ||
166 | { | ||
167 | gpa_t gpa; | ||
168 | |||
169 | if (!get_tlb_v(tlbe)) | ||
170 | return 0; | ||
171 | |||
172 | /* Does it match current guest AS? */ | ||
173 | /* XXX what about IS != DS? */ | ||
174 | if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS)) | ||
175 | return 0; | ||
176 | |||
177 | gpa = get_tlb_raddr(tlbe); | ||
178 | if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT)) | ||
179 | /* Mapping is not for RAM. */ | ||
180 | return 0; | ||
181 | |||
182 | return 1; | ||
183 | } | ||
184 | |||
185 | #endif /* __KVM_E500_TLB_H__ */ | ||
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c index d1d38daa93fb..a561d6e8da1c 100644 --- a/arch/powerpc/kvm/emulate.c +++ b/arch/powerpc/kvm/emulate.c | |||
@@ -30,6 +30,39 @@ | |||
30 | #include <asm/disassemble.h> | 30 | #include <asm/disassemble.h> |
31 | #include "timing.h" | 31 | #include "timing.h" |
32 | 32 | ||
33 | #define OP_TRAP 3 | ||
34 | |||
35 | #define OP_31_XOP_LWZX 23 | ||
36 | #define OP_31_XOP_LBZX 87 | ||
37 | #define OP_31_XOP_STWX 151 | ||
38 | #define OP_31_XOP_STBX 215 | ||
39 | #define OP_31_XOP_STBUX 247 | ||
40 | #define OP_31_XOP_LHZX 279 | ||
41 | #define OP_31_XOP_LHZUX 311 | ||
42 | #define OP_31_XOP_MFSPR 339 | ||
43 | #define OP_31_XOP_STHX 407 | ||
44 | #define OP_31_XOP_STHUX 439 | ||
45 | #define OP_31_XOP_MTSPR 467 | ||
46 | #define OP_31_XOP_DCBI 470 | ||
47 | #define OP_31_XOP_LWBRX 534 | ||
48 | #define OP_31_XOP_TLBSYNC 566 | ||
49 | #define OP_31_XOP_STWBRX 662 | ||
50 | #define OP_31_XOP_LHBRX 790 | ||
51 | #define OP_31_XOP_STHBRX 918 | ||
52 | |||
53 | #define OP_LWZ 32 | ||
54 | #define OP_LWZU 33 | ||
55 | #define OP_LBZ 34 | ||
56 | #define OP_LBZU 35 | ||
57 | #define OP_STW 36 | ||
58 | #define OP_STWU 37 | ||
59 | #define OP_STB 38 | ||
60 | #define OP_STBU 39 | ||
61 | #define OP_LHZ 40 | ||
62 | #define OP_LHZU 41 | ||
63 | #define OP_STH 44 | ||
64 | #define OP_STHU 45 | ||
65 | |||
33 | void kvmppc_emulate_dec(struct kvm_vcpu *vcpu) | 66 | void kvmppc_emulate_dec(struct kvm_vcpu *vcpu) |
34 | { | 67 | { |
35 | if (vcpu->arch.tcr & TCR_DIE) { | 68 | if (vcpu->arch.tcr & TCR_DIE) { |
@@ -78,7 +111,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
78 | kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS); | 111 | kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS); |
79 | 112 | ||
80 | switch (get_op(inst)) { | 113 | switch (get_op(inst)) { |
81 | case 3: /* trap */ | 114 | case OP_TRAP: |
82 | vcpu->arch.esr |= ESR_PTR; | 115 | vcpu->arch.esr |= ESR_PTR; |
83 | kvmppc_core_queue_program(vcpu); | 116 | kvmppc_core_queue_program(vcpu); |
84 | advance = 0; | 117 | advance = 0; |
@@ -87,31 +120,31 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
87 | case 31: | 120 | case 31: |
88 | switch (get_xop(inst)) { | 121 | switch (get_xop(inst)) { |
89 | 122 | ||
90 | case 23: /* lwzx */ | 123 | case OP_31_XOP_LWZX: |
91 | rt = get_rt(inst); | 124 | rt = get_rt(inst); |
92 | emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1); | 125 | emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1); |
93 | break; | 126 | break; |
94 | 127 | ||
95 | case 87: /* lbzx */ | 128 | case OP_31_XOP_LBZX: |
96 | rt = get_rt(inst); | 129 | rt = get_rt(inst); |
97 | emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1); | 130 | emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1); |
98 | break; | 131 | break; |
99 | 132 | ||
100 | case 151: /* stwx */ | 133 | case OP_31_XOP_STWX: |
101 | rs = get_rs(inst); | 134 | rs = get_rs(inst); |
102 | emulated = kvmppc_handle_store(run, vcpu, | 135 | emulated = kvmppc_handle_store(run, vcpu, |
103 | vcpu->arch.gpr[rs], | 136 | vcpu->arch.gpr[rs], |
104 | 4, 1); | 137 | 4, 1); |
105 | break; | 138 | break; |
106 | 139 | ||
107 | case 215: /* stbx */ | 140 | case OP_31_XOP_STBX: |
108 | rs = get_rs(inst); | 141 | rs = get_rs(inst); |
109 | emulated = kvmppc_handle_store(run, vcpu, | 142 | emulated = kvmppc_handle_store(run, vcpu, |
110 | vcpu->arch.gpr[rs], | 143 | vcpu->arch.gpr[rs], |
111 | 1, 1); | 144 | 1, 1); |
112 | break; | 145 | break; |
113 | 146 | ||
114 | case 247: /* stbux */ | 147 | case OP_31_XOP_STBUX: |
115 | rs = get_rs(inst); | 148 | rs = get_rs(inst); |
116 | ra = get_ra(inst); | 149 | ra = get_ra(inst); |
117 | rb = get_rb(inst); | 150 | rb = get_rb(inst); |
@@ -126,12 +159,12 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
126 | vcpu->arch.gpr[rs] = ea; | 159 | vcpu->arch.gpr[rs] = ea; |
127 | break; | 160 | break; |
128 | 161 | ||
129 | case 279: /* lhzx */ | 162 | case OP_31_XOP_LHZX: |
130 | rt = get_rt(inst); | 163 | rt = get_rt(inst); |
131 | emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1); | 164 | emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1); |
132 | break; | 165 | break; |
133 | 166 | ||
134 | case 311: /* lhzux */ | 167 | case OP_31_XOP_LHZUX: |
135 | rt = get_rt(inst); | 168 | rt = get_rt(inst); |
136 | ra = get_ra(inst); | 169 | ra = get_ra(inst); |
137 | rb = get_rb(inst); | 170 | rb = get_rb(inst); |
@@ -144,7 +177,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
144 | vcpu->arch.gpr[ra] = ea; | 177 | vcpu->arch.gpr[ra] = ea; |
145 | break; | 178 | break; |
146 | 179 | ||
147 | case 339: /* mfspr */ | 180 | case OP_31_XOP_MFSPR: |
148 | sprn = get_sprn(inst); | 181 | sprn = get_sprn(inst); |
149 | rt = get_rt(inst); | 182 | rt = get_rt(inst); |
150 | 183 | ||
@@ -185,7 +218,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
185 | } | 218 | } |
186 | break; | 219 | break; |
187 | 220 | ||
188 | case 407: /* sthx */ | 221 | case OP_31_XOP_STHX: |
189 | rs = get_rs(inst); | 222 | rs = get_rs(inst); |
190 | ra = get_ra(inst); | 223 | ra = get_ra(inst); |
191 | rb = get_rb(inst); | 224 | rb = get_rb(inst); |
@@ -195,7 +228,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
195 | 2, 1); | 228 | 2, 1); |
196 | break; | 229 | break; |
197 | 230 | ||
198 | case 439: /* sthux */ | 231 | case OP_31_XOP_STHUX: |
199 | rs = get_rs(inst); | 232 | rs = get_rs(inst); |
200 | ra = get_ra(inst); | 233 | ra = get_ra(inst); |
201 | rb = get_rb(inst); | 234 | rb = get_rb(inst); |
@@ -210,7 +243,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
210 | vcpu->arch.gpr[ra] = ea; | 243 | vcpu->arch.gpr[ra] = ea; |
211 | break; | 244 | break; |
212 | 245 | ||
213 | case 467: /* mtspr */ | 246 | case OP_31_XOP_MTSPR: |
214 | sprn = get_sprn(inst); | 247 | sprn = get_sprn(inst); |
215 | rs = get_rs(inst); | 248 | rs = get_rs(inst); |
216 | switch (sprn) { | 249 | switch (sprn) { |
@@ -246,7 +279,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
246 | } | 279 | } |
247 | break; | 280 | break; |
248 | 281 | ||
249 | case 470: /* dcbi */ | 282 | case OP_31_XOP_DCBI: |
250 | /* Do nothing. The guest is performing dcbi because | 283 | /* Do nothing. The guest is performing dcbi because |
251 | * hardware DMA is not snooped by the dcache, but | 284 | * hardware DMA is not snooped by the dcache, but |
252 | * emulated DMA either goes through the dcache as | 285 | * emulated DMA either goes through the dcache as |
@@ -254,15 +287,15 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
254 | * coherence. */ | 287 | * coherence. */ |
255 | break; | 288 | break; |
256 | 289 | ||
257 | case 534: /* lwbrx */ | 290 | case OP_31_XOP_LWBRX: |
258 | rt = get_rt(inst); | 291 | rt = get_rt(inst); |
259 | emulated = kvmppc_handle_load(run, vcpu, rt, 4, 0); | 292 | emulated = kvmppc_handle_load(run, vcpu, rt, 4, 0); |
260 | break; | 293 | break; |
261 | 294 | ||
262 | case 566: /* tlbsync */ | 295 | case OP_31_XOP_TLBSYNC: |
263 | break; | 296 | break; |
264 | 297 | ||
265 | case 662: /* stwbrx */ | 298 | case OP_31_XOP_STWBRX: |
266 | rs = get_rs(inst); | 299 | rs = get_rs(inst); |
267 | ra = get_ra(inst); | 300 | ra = get_ra(inst); |
268 | rb = get_rb(inst); | 301 | rb = get_rb(inst); |
@@ -272,12 +305,12 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
272 | 4, 0); | 305 | 4, 0); |
273 | break; | 306 | break; |
274 | 307 | ||
275 | case 790: /* lhbrx */ | 308 | case OP_31_XOP_LHBRX: |
276 | rt = get_rt(inst); | 309 | rt = get_rt(inst); |
277 | emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0); | 310 | emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0); |
278 | break; | 311 | break; |
279 | 312 | ||
280 | case 918: /* sthbrx */ | 313 | case OP_31_XOP_STHBRX: |
281 | rs = get_rs(inst); | 314 | rs = get_rs(inst); |
282 | ra = get_ra(inst); | 315 | ra = get_ra(inst); |
283 | rb = get_rb(inst); | 316 | rb = get_rb(inst); |
@@ -293,37 +326,37 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
293 | } | 326 | } |
294 | break; | 327 | break; |
295 | 328 | ||
296 | case 32: /* lwz */ | 329 | case OP_LWZ: |
297 | rt = get_rt(inst); | 330 | rt = get_rt(inst); |
298 | emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1); | 331 | emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1); |
299 | break; | 332 | break; |
300 | 333 | ||
301 | case 33: /* lwzu */ | 334 | case OP_LWZU: |
302 | ra = get_ra(inst); | 335 | ra = get_ra(inst); |
303 | rt = get_rt(inst); | 336 | rt = get_rt(inst); |
304 | emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1); | 337 | emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1); |
305 | vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed; | 338 | vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed; |
306 | break; | 339 | break; |
307 | 340 | ||
308 | case 34: /* lbz */ | 341 | case OP_LBZ: |
309 | rt = get_rt(inst); | 342 | rt = get_rt(inst); |
310 | emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1); | 343 | emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1); |
311 | break; | 344 | break; |
312 | 345 | ||
313 | case 35: /* lbzu */ | 346 | case OP_LBZU: |
314 | ra = get_ra(inst); | 347 | ra = get_ra(inst); |
315 | rt = get_rt(inst); | 348 | rt = get_rt(inst); |
316 | emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1); | 349 | emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1); |
317 | vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed; | 350 | vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed; |
318 | break; | 351 | break; |
319 | 352 | ||
320 | case 36: /* stw */ | 353 | case OP_STW: |
321 | rs = get_rs(inst); | 354 | rs = get_rs(inst); |
322 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], | 355 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], |
323 | 4, 1); | 356 | 4, 1); |
324 | break; | 357 | break; |
325 | 358 | ||
326 | case 37: /* stwu */ | 359 | case OP_STWU: |
327 | ra = get_ra(inst); | 360 | ra = get_ra(inst); |
328 | rs = get_rs(inst); | 361 | rs = get_rs(inst); |
329 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], | 362 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], |
@@ -331,13 +364,13 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
331 | vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed; | 364 | vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed; |
332 | break; | 365 | break; |
333 | 366 | ||
334 | case 38: /* stb */ | 367 | case OP_STB: |
335 | rs = get_rs(inst); | 368 | rs = get_rs(inst); |
336 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], | 369 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], |
337 | 1, 1); | 370 | 1, 1); |
338 | break; | 371 | break; |
339 | 372 | ||
340 | case 39: /* stbu */ | 373 | case OP_STBU: |
341 | ra = get_ra(inst); | 374 | ra = get_ra(inst); |
342 | rs = get_rs(inst); | 375 | rs = get_rs(inst); |
343 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], | 376 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], |
@@ -345,25 +378,25 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu) | |||
345 | vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed; | 378 | vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed; |
346 | break; | 379 | break; |
347 | 380 | ||
348 | case 40: /* lhz */ | 381 | case OP_LHZ: |
349 | rt = get_rt(inst); | 382 | rt = get_rt(inst); |
350 | emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1); | 383 | emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1); |
351 | break; | 384 | break; |
352 | 385 | ||
353 | case 41: /* lhzu */ | 386 | case OP_LHZU: |
354 | ra = get_ra(inst); | 387 | ra = get_ra(inst); |
355 | rt = get_rt(inst); | 388 | rt = get_rt(inst); |
356 | emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1); | 389 | emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1); |
357 | vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed; | 390 | vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed; |
358 | break; | 391 | break; |
359 | 392 | ||
360 | case 44: /* sth */ | 393 | case OP_STH: |
361 | rs = get_rs(inst); | 394 | rs = get_rs(inst); |
362 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], | 395 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], |
363 | 2, 1); | 396 | 2, 1); |
364 | break; | 397 | break; |
365 | 398 | ||
366 | case 45: /* sthu */ | 399 | case OP_STHU: |
367 | ra = get_ra(inst); | 400 | ra = get_ra(inst); |
368 | rs = get_rs(inst); | 401 | rs = get_rs(inst); |
369 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], | 402 | emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs], |
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c index 5f81256287f5..9057335fdc61 100644 --- a/arch/powerpc/kvm/powerpc.c +++ b/arch/powerpc/kvm/powerpc.c | |||
@@ -216,46 +216,23 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) | |||
216 | 216 | ||
217 | void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) | 217 | void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) |
218 | { | 218 | { |
219 | kvmppc_core_destroy_mmu(vcpu); | 219 | kvmppc_mmu_destroy(vcpu); |
220 | } | 220 | } |
221 | 221 | ||
222 | void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | 222 | void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) |
223 | { | 223 | { |
224 | if (vcpu->guest_debug.enabled) | ||
225 | kvmppc_core_load_guest_debugstate(vcpu); | ||
226 | |||
227 | kvmppc_core_vcpu_load(vcpu, cpu); | 224 | kvmppc_core_vcpu_load(vcpu, cpu); |
228 | } | 225 | } |
229 | 226 | ||
230 | void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) | 227 | void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) |
231 | { | 228 | { |
232 | if (vcpu->guest_debug.enabled) | ||
233 | kvmppc_core_load_host_debugstate(vcpu); | ||
234 | |||
235 | /* Don't leave guest TLB entries resident when being de-scheduled. */ | ||
236 | /* XXX It would be nice to differentiate between heavyweight exit and | ||
237 | * sched_out here, since we could avoid the TLB flush for heavyweight | ||
238 | * exits. */ | ||
239 | _tlbil_all(); | ||
240 | kvmppc_core_vcpu_put(vcpu); | 229 | kvmppc_core_vcpu_put(vcpu); |
241 | } | 230 | } |
242 | 231 | ||
243 | int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu, | 232 | int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, |
244 | struct kvm_debug_guest *dbg) | 233 | struct kvm_guest_debug *dbg) |
245 | { | 234 | { |
246 | int i; | 235 | return -EINVAL; |
247 | |||
248 | vcpu->guest_debug.enabled = dbg->enabled; | ||
249 | if (vcpu->guest_debug.enabled) { | ||
250 | for (i=0; i < ARRAY_SIZE(vcpu->guest_debug.bp); i++) { | ||
251 | if (dbg->breakpoints[i].enabled) | ||
252 | vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address; | ||
253 | else | ||
254 | vcpu->guest_debug.bp[i] = 0; | ||
255 | } | ||
256 | } | ||
257 | |||
258 | return 0; | ||
259 | } | 236 | } |
260 | 237 | ||
261 | static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu, | 238 | static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu, |
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c index b7dc4c19f582..005a28d380af 100644 --- a/arch/powerpc/lib/dma-noncoherent.c +++ b/arch/powerpc/lib/dma-noncoherent.c | |||
@@ -29,121 +29,11 @@ | |||
29 | #include <linux/types.h> | 29 | #include <linux/types.h> |
30 | #include <linux/highmem.h> | 30 | #include <linux/highmem.h> |
31 | #include <linux/dma-mapping.h> | 31 | #include <linux/dma-mapping.h> |
32 | #include <linux/vmalloc.h> | ||
32 | 33 | ||
33 | #include <asm/tlbflush.h> | 34 | #include <asm/tlbflush.h> |
34 | 35 | ||
35 | /* | 36 | /* |
36 | * This address range defaults to a value that is safe for all | ||
37 | * platforms which currently set CONFIG_NOT_COHERENT_CACHE. It | ||
38 | * can be further configured for specific applications under | ||
39 | * the "Advanced Setup" menu. -Matt | ||
40 | */ | ||
41 | #define CONSISTENT_BASE (CONFIG_CONSISTENT_START) | ||
42 | #define CONSISTENT_END (CONFIG_CONSISTENT_START + CONFIG_CONSISTENT_SIZE) | ||
43 | #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT) | ||
44 | |||
45 | /* | ||
46 | * This is the page table (2MB) covering uncached, DMA consistent allocations | ||
47 | */ | ||
48 | static pte_t *consistent_pte; | ||
49 | static DEFINE_SPINLOCK(consistent_lock); | ||
50 | |||
51 | /* | ||
52 | * VM region handling support. | ||
53 | * | ||
54 | * This should become something generic, handling VM region allocations for | ||
55 | * vmalloc and similar (ioremap, module space, etc). | ||
56 | * | ||
57 | * I envisage vmalloc()'s supporting vm_struct becoming: | ||
58 | * | ||
59 | * struct vm_struct { | ||
60 | * struct vm_region region; | ||
61 | * unsigned long flags; | ||
62 | * struct page **pages; | ||
63 | * unsigned int nr_pages; | ||
64 | * unsigned long phys_addr; | ||
65 | * }; | ||
66 | * | ||
67 | * get_vm_area() would then call vm_region_alloc with an appropriate | ||
68 | * struct vm_region head (eg): | ||
69 | * | ||
70 | * struct vm_region vmalloc_head = { | ||
71 | * .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list), | ||
72 | * .vm_start = VMALLOC_START, | ||
73 | * .vm_end = VMALLOC_END, | ||
74 | * }; | ||
75 | * | ||
76 | * However, vmalloc_head.vm_start is variable (typically, it is dependent on | ||
77 | * the amount of RAM found at boot time.) I would imagine that get_vm_area() | ||
78 | * would have to initialise this each time prior to calling vm_region_alloc(). | ||
79 | */ | ||
80 | struct ppc_vm_region { | ||
81 | struct list_head vm_list; | ||
82 | unsigned long vm_start; | ||
83 | unsigned long vm_end; | ||
84 | }; | ||
85 | |||
86 | static struct ppc_vm_region consistent_head = { | ||
87 | .vm_list = LIST_HEAD_INIT(consistent_head.vm_list), | ||
88 | .vm_start = CONSISTENT_BASE, | ||
89 | .vm_end = CONSISTENT_END, | ||
90 | }; | ||
91 | |||
92 | static struct ppc_vm_region * | ||
93 | ppc_vm_region_alloc(struct ppc_vm_region *head, size_t size, gfp_t gfp) | ||
94 | { | ||
95 | unsigned long addr = head->vm_start, end = head->vm_end - size; | ||
96 | unsigned long flags; | ||
97 | struct ppc_vm_region *c, *new; | ||
98 | |||
99 | new = kmalloc(sizeof(struct ppc_vm_region), gfp); | ||
100 | if (!new) | ||
101 | goto out; | ||
102 | |||
103 | spin_lock_irqsave(&consistent_lock, flags); | ||
104 | |||
105 | list_for_each_entry(c, &head->vm_list, vm_list) { | ||
106 | if ((addr + size) < addr) | ||
107 | goto nospc; | ||
108 | if ((addr + size) <= c->vm_start) | ||
109 | goto found; | ||
110 | addr = c->vm_end; | ||
111 | if (addr > end) | ||
112 | goto nospc; | ||
113 | } | ||
114 | |||
115 | found: | ||
116 | /* | ||
117 | * Insert this entry _before_ the one we found. | ||
118 | */ | ||
119 | list_add_tail(&new->vm_list, &c->vm_list); | ||
120 | new->vm_start = addr; | ||
121 | new->vm_end = addr + size; | ||
122 | |||
123 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
124 | return new; | ||
125 | |||
126 | nospc: | ||
127 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
128 | kfree(new); | ||
129 | out: | ||
130 | return NULL; | ||
131 | } | ||
132 | |||
133 | static struct ppc_vm_region *ppc_vm_region_find(struct ppc_vm_region *head, unsigned long addr) | ||
134 | { | ||
135 | struct ppc_vm_region *c; | ||
136 | |||
137 | list_for_each_entry(c, &head->vm_list, vm_list) { | ||
138 | if (c->vm_start == addr) | ||
139 | goto out; | ||
140 | } | ||
141 | c = NULL; | ||
142 | out: | ||
143 | return c; | ||
144 | } | ||
145 | |||
146 | /* | ||
147 | * Allocate DMA-coherent memory space and return both the kernel remapped | 37 | * Allocate DMA-coherent memory space and return both the kernel remapped |
148 | * virtual and bus address for that space. | 38 | * virtual and bus address for that space. |
149 | */ | 39 | */ |
@@ -151,21 +41,21 @@ void * | |||
151 | __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp) | 41 | __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp) |
152 | { | 42 | { |
153 | struct page *page; | 43 | struct page *page; |
154 | struct ppc_vm_region *c; | ||
155 | unsigned long order; | 44 | unsigned long order; |
45 | int i; | ||
46 | unsigned int nr_pages = PAGE_ALIGN(size)>>PAGE_SHIFT; | ||
47 | unsigned int array_size = nr_pages * sizeof(struct page *); | ||
48 | struct page **pages; | ||
49 | struct page *end; | ||
156 | u64 mask = 0x00ffffff, limit; /* ISA default */ | 50 | u64 mask = 0x00ffffff, limit; /* ISA default */ |
51 | struct vm_struct *area; | ||
157 | 52 | ||
158 | if (!consistent_pte) { | 53 | BUG_ON(!mem_init_done); |
159 | printk(KERN_ERR "%s: not initialised\n", __func__); | ||
160 | dump_stack(); | ||
161 | return NULL; | ||
162 | } | ||
163 | |||
164 | size = PAGE_ALIGN(size); | 54 | size = PAGE_ALIGN(size); |
165 | limit = (mask + 1) & ~mask; | 55 | limit = (mask + 1) & ~mask; |
166 | if ((limit && size >= limit) || size >= (CONSISTENT_END - CONSISTENT_BASE)) { | 56 | if (limit && size >= limit) { |
167 | printk(KERN_WARNING "coherent allocation too big (requested %#x mask %#Lx)\n", | 57 | printk(KERN_WARNING "coherent allocation too big (requested " |
168 | size, mask); | 58 | "%#x mask %#Lx)\n", size, mask); |
169 | return NULL; | 59 | return NULL; |
170 | } | 60 | } |
171 | 61 | ||
@@ -178,6 +68,8 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp) | |||
178 | if (!page) | 68 | if (!page) |
179 | goto no_page; | 69 | goto no_page; |
180 | 70 | ||
71 | end = page + (1 << order); | ||
72 | |||
181 | /* | 73 | /* |
182 | * Invalidate any data that might be lurking in the | 74 | * Invalidate any data that might be lurking in the |
183 | * kernel direct-mapped region for device DMA. | 75 | * kernel direct-mapped region for device DMA. |
@@ -188,48 +80,59 @@ __dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp) | |||
188 | flush_dcache_range(kaddr, kaddr + size); | 80 | flush_dcache_range(kaddr, kaddr + size); |
189 | } | 81 | } |
190 | 82 | ||
83 | split_page(page, order); | ||
84 | |||
191 | /* | 85 | /* |
192 | * Allocate a virtual address in the consistent mapping region. | 86 | * Set the "dma handle" |
193 | */ | 87 | */ |
194 | c = ppc_vm_region_alloc(&consistent_head, size, | 88 | *handle = page_to_phys(page); |
195 | gfp & ~(__GFP_DMA | __GFP_HIGHMEM)); | 89 | |
196 | if (c) { | 90 | area = get_vm_area_caller(size, VM_IOREMAP, |
197 | unsigned long vaddr = c->vm_start; | 91 | __builtin_return_address(1)); |
198 | pte_t *pte = consistent_pte + CONSISTENT_OFFSET(vaddr); | 92 | if (!area) |
199 | struct page *end = page + (1 << order); | 93 | goto out_free_pages; |
200 | 94 | ||
201 | split_page(page, order); | 95 | if (array_size > PAGE_SIZE) { |
202 | 96 | pages = vmalloc(array_size); | |
203 | /* | 97 | area->flags |= VM_VPAGES; |
204 | * Set the "dma handle" | 98 | } else { |
205 | */ | 99 | pages = kmalloc(array_size, GFP_KERNEL); |
206 | *handle = page_to_phys(page); | 100 | } |
101 | if (!pages) | ||
102 | goto out_free_area; | ||
207 | 103 | ||
208 | do { | 104 | area->pages = pages; |
209 | BUG_ON(!pte_none(*pte)); | 105 | area->nr_pages = nr_pages; |
210 | 106 | ||
211 | SetPageReserved(page); | 107 | for (i = 0; i < nr_pages; i++) |
212 | set_pte_at(&init_mm, vaddr, | 108 | pages[i] = page + i; |
213 | pte, mk_pte(page, pgprot_noncached(PAGE_KERNEL))); | ||
214 | page++; | ||
215 | pte++; | ||
216 | vaddr += PAGE_SIZE; | ||
217 | } while (size -= PAGE_SIZE); | ||
218 | 109 | ||
219 | /* | 110 | if (map_vm_area(area, pgprot_noncached(PAGE_KERNEL), &pages)) |
220 | * Free the otherwise unused pages. | 111 | goto out_unmap; |
221 | */ | ||
222 | while (page < end) { | ||
223 | __free_page(page); | ||
224 | page++; | ||
225 | } | ||
226 | 112 | ||
227 | return (void *)c->vm_start; | 113 | /* |
114 | * Free the otherwise unused pages. | ||
115 | */ | ||
116 | page += nr_pages; | ||
117 | while (page < end) { | ||
118 | __free_page(page); | ||
119 | page++; | ||
228 | } | 120 | } |
229 | 121 | ||
122 | return area->addr; | ||
123 | out_unmap: | ||
124 | vunmap(area->addr); | ||
125 | if (array_size > PAGE_SIZE) | ||
126 | vfree(pages); | ||
127 | else | ||
128 | kfree(pages); | ||
129 | goto out_free_pages; | ||
130 | out_free_area: | ||
131 | free_vm_area(area); | ||
132 | out_free_pages: | ||
230 | if (page) | 133 | if (page) |
231 | __free_pages(page, order); | 134 | __free_pages(page, order); |
232 | no_page: | 135 | no_page: |
233 | return NULL; | 136 | return NULL; |
234 | } | 137 | } |
235 | EXPORT_SYMBOL(__dma_alloc_coherent); | 138 | EXPORT_SYMBOL(__dma_alloc_coherent); |
@@ -239,104 +142,12 @@ EXPORT_SYMBOL(__dma_alloc_coherent); | |||
239 | */ | 142 | */ |
240 | void __dma_free_coherent(size_t size, void *vaddr) | 143 | void __dma_free_coherent(size_t size, void *vaddr) |
241 | { | 144 | { |
242 | struct ppc_vm_region *c; | 145 | vfree(vaddr); |
243 | unsigned long flags, addr; | ||
244 | pte_t *ptep; | ||
245 | |||
246 | size = PAGE_ALIGN(size); | ||
247 | |||
248 | spin_lock_irqsave(&consistent_lock, flags); | ||
249 | |||
250 | c = ppc_vm_region_find(&consistent_head, (unsigned long)vaddr); | ||
251 | if (!c) | ||
252 | goto no_area; | ||
253 | |||
254 | if ((c->vm_end - c->vm_start) != size) { | ||
255 | printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n", | ||
256 | __func__, c->vm_end - c->vm_start, size); | ||
257 | dump_stack(); | ||
258 | size = c->vm_end - c->vm_start; | ||
259 | } | ||
260 | |||
261 | ptep = consistent_pte + CONSISTENT_OFFSET(c->vm_start); | ||
262 | addr = c->vm_start; | ||
263 | do { | ||
264 | pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep); | ||
265 | unsigned long pfn; | ||
266 | |||
267 | ptep++; | ||
268 | addr += PAGE_SIZE; | ||
269 | 146 | ||
270 | if (!pte_none(pte) && pte_present(pte)) { | ||
271 | pfn = pte_pfn(pte); | ||
272 | |||
273 | if (pfn_valid(pfn)) { | ||
274 | struct page *page = pfn_to_page(pfn); | ||
275 | ClearPageReserved(page); | ||
276 | |||
277 | __free_page(page); | ||
278 | continue; | ||
279 | } | ||
280 | } | ||
281 | |||
282 | printk(KERN_CRIT "%s: bad page in kernel page table\n", | ||
283 | __func__); | ||
284 | } while (size -= PAGE_SIZE); | ||
285 | |||
286 | flush_tlb_kernel_range(c->vm_start, c->vm_end); | ||
287 | |||
288 | list_del(&c->vm_list); | ||
289 | |||
290 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
291 | |||
292 | kfree(c); | ||
293 | return; | ||
294 | |||
295 | no_area: | ||
296 | spin_unlock_irqrestore(&consistent_lock, flags); | ||
297 | printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n", | ||
298 | __func__, vaddr); | ||
299 | dump_stack(); | ||
300 | } | 147 | } |
301 | EXPORT_SYMBOL(__dma_free_coherent); | 148 | EXPORT_SYMBOL(__dma_free_coherent); |
302 | 149 | ||
303 | /* | 150 | /* |
304 | * Initialise the consistent memory allocation. | ||
305 | */ | ||
306 | static int __init dma_alloc_init(void) | ||
307 | { | ||
308 | pgd_t *pgd; | ||
309 | pud_t *pud; | ||
310 | pmd_t *pmd; | ||
311 | pte_t *pte; | ||
312 | int ret = 0; | ||
313 | |||
314 | do { | ||
315 | pgd = pgd_offset(&init_mm, CONSISTENT_BASE); | ||
316 | pud = pud_alloc(&init_mm, pgd, CONSISTENT_BASE); | ||
317 | pmd = pmd_alloc(&init_mm, pud, CONSISTENT_BASE); | ||
318 | if (!pmd) { | ||
319 | printk(KERN_ERR "%s: no pmd tables\n", __func__); | ||
320 | ret = -ENOMEM; | ||
321 | break; | ||
322 | } | ||
323 | |||
324 | pte = pte_alloc_kernel(pmd, CONSISTENT_BASE); | ||
325 | if (!pte) { | ||
326 | printk(KERN_ERR "%s: no pte tables\n", __func__); | ||
327 | ret = -ENOMEM; | ||
328 | break; | ||
329 | } | ||
330 | |||
331 | consistent_pte = pte; | ||
332 | } while (0); | ||
333 | |||
334 | return ret; | ||
335 | } | ||
336 | |||
337 | core_initcall(dma_alloc_init); | ||
338 | |||
339 | /* | ||
340 | * make an area consistent. | 151 | * make an area consistent. |
341 | */ | 152 | */ |
342 | void __dma_sync(void *vaddr, size_t size, int direction) | 153 | void __dma_sync(void *vaddr, size_t size, int direction) |
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c index 8c5a03be31e0..7e8865bcd683 100644 --- a/arch/powerpc/lib/feature-fixups.c +++ b/arch/powerpc/lib/feature-fixups.c | |||
@@ -85,7 +85,7 @@ static int patch_feature_section(unsigned long value, struct fixup_entry *fcur) | |||
85 | } | 85 | } |
86 | 86 | ||
87 | for (; dest < end; dest++) | 87 | for (; dest < end; dest++) |
88 | patch_instruction(dest, PPC_NOP_INSTR); | 88 | patch_instruction(dest, PPC_INST_NOP); |
89 | 89 | ||
90 | return 0; | 90 | return 0; |
91 | } | 91 | } |
@@ -122,7 +122,7 @@ void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end) | |||
122 | 122 | ||
123 | for (; start < end; start++) { | 123 | for (; start < end; start++) { |
124 | dest = (void *)start + *start; | 124 | dest = (void *)start + *start; |
125 | patch_instruction(dest, PPC_LWSYNC_INSTR); | 125 | patch_instruction(dest, PPC_INST_LWSYNC); |
126 | } | 126 | } |
127 | } | 127 | } |
128 | 128 | ||
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile index f9e506a735ae..0c16ab947f1f 100644 --- a/arch/powerpc/math-emu/Makefile +++ b/arch/powerpc/math-emu/Makefile | |||
@@ -1,6 +1,4 @@ | |||
1 | 1 | ||
2 | obj-y := math.o fmr.o lfd.o stfd.o | ||
3 | |||
4 | obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \ | 2 | obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \ |
5 | fctiw.o fctiwz.o fdiv.o fdivs.o \ | 3 | fctiw.o fctiwz.o fdiv.o fdivs.o \ |
6 | fmadd.o fmadds.o fmsub.o fmsubs.o \ | 4 | fmadd.o fmadds.o fmsub.o fmsubs.o \ |
@@ -9,7 +7,8 @@ obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \ | |||
9 | fres.o frsp.o frsqrte.o fsel.o lfs.o \ | 7 | fres.o frsp.o frsqrte.o fsel.o lfs.o \ |
10 | fsqrt.o fsqrts.o fsub.o fsubs.o \ | 8 | fsqrt.o fsqrts.o fsub.o fsubs.o \ |
11 | mcrfs.o mffs.o mtfsb0.o mtfsb1.o \ | 9 | mcrfs.o mffs.o mtfsb0.o mtfsb1.o \ |
12 | mtfsf.o mtfsfi.o stfiwx.o stfs.o | 10 | mtfsf.o mtfsfi.o stfiwx.o stfs.o \ |
11 | math.o fmr.o lfd.o stfd.o | ||
13 | 12 | ||
14 | obj-$(CONFIG_SPE) += math_efp.o | 13 | obj-$(CONFIG_SPE) += math_efp.o |
15 | 14 | ||
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile index 953cc4a1cde5..17290bcedc5e 100644 --- a/arch/powerpc/mm/Makefile +++ b/arch/powerpc/mm/Makefile | |||
@@ -6,7 +6,7 @@ ifeq ($(CONFIG_PPC64),y) | |||
6 | EXTRA_CFLAGS += -mno-minimal-toc | 6 | EXTRA_CFLAGS += -mno-minimal-toc |
7 | endif | 7 | endif |
8 | 8 | ||
9 | obj-y := fault.o mem.o pgtable.o \ | 9 | obj-y := fault.o mem.o pgtable.o gup.o \ |
10 | init_$(CONFIG_WORD_SIZE).o \ | 10 | init_$(CONFIG_WORD_SIZE).o \ |
11 | pgtable_$(CONFIG_WORD_SIZE).o | 11 | pgtable_$(CONFIG_WORD_SIZE).o |
12 | obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \ | 12 | obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \ |
@@ -14,7 +14,7 @@ obj-$(CONFIG_PPC_MMU_NOHASH) += mmu_context_nohash.o tlb_nohash.o \ | |||
14 | hash-$(CONFIG_PPC_NATIVE) := hash_native_64.o | 14 | hash-$(CONFIG_PPC_NATIVE) := hash_native_64.o |
15 | obj-$(CONFIG_PPC64) += hash_utils_64.o \ | 15 | obj-$(CONFIG_PPC64) += hash_utils_64.o \ |
16 | slb_low.o slb.o stab.o \ | 16 | slb_low.o slb.o stab.o \ |
17 | gup.o mmap.o $(hash-y) | 17 | mmap_64.o $(hash-y) |
18 | obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o | 18 | obj-$(CONFIG_PPC_STD_MMU_32) += ppc_mmu_32.o |
19 | obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \ | 19 | obj-$(CONFIG_PPC_STD_MMU) += hash_low_$(CONFIG_WORD_SIZE).o \ |
20 | tlb_hash$(CONFIG_WORD_SIZE).o \ | 20 | tlb_hash$(CONFIG_WORD_SIZE).o \ |
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c index 91c7b8636b8a..76993941cac9 100644 --- a/arch/powerpc/mm/fault.c +++ b/arch/powerpc/mm/fault.c | |||
@@ -253,45 +253,33 @@ good_area: | |||
253 | #endif /* CONFIG_8xx */ | 253 | #endif /* CONFIG_8xx */ |
254 | 254 | ||
255 | if (is_exec) { | 255 | if (is_exec) { |
256 | #if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) | 256 | #ifdef CONFIG_PPC_STD_MMU |
257 | /* protection fault */ | 257 | /* Protection fault on exec go straight to failure on |
258 | * Hash based MMUs as they either don't support per-page | ||
259 | * execute permission, or if they do, it's handled already | ||
260 | * at the hash level. This test would probably have to | ||
261 | * be removed if we change the way this works to make hash | ||
262 | * processors use the same I/D cache coherency mechanism | ||
263 | * as embedded. | ||
264 | */ | ||
258 | if (error_code & DSISR_PROTFAULT) | 265 | if (error_code & DSISR_PROTFAULT) |
259 | goto bad_area; | 266 | goto bad_area; |
267 | #endif /* CONFIG_PPC_STD_MMU */ | ||
268 | |||
260 | /* | 269 | /* |
261 | * Allow execution from readable areas if the MMU does not | 270 | * Allow execution from readable areas if the MMU does not |
262 | * provide separate controls over reading and executing. | 271 | * provide separate controls over reading and executing. |
272 | * | ||
273 | * Note: That code used to not be enabled for 4xx/BookE. | ||
274 | * It is now as I/D cache coherency for these is done at | ||
275 | * set_pte_at() time and I see no reason why the test | ||
276 | * below wouldn't be valid on those processors. This -may- | ||
277 | * break programs compiled with a really old ABI though. | ||
263 | */ | 278 | */ |
264 | if (!(vma->vm_flags & VM_EXEC) && | 279 | if (!(vma->vm_flags & VM_EXEC) && |
265 | (cpu_has_feature(CPU_FTR_NOEXECUTE) || | 280 | (cpu_has_feature(CPU_FTR_NOEXECUTE) || |
266 | !(vma->vm_flags & (VM_READ | VM_WRITE)))) | 281 | !(vma->vm_flags & (VM_READ | VM_WRITE)))) |
267 | goto bad_area; | 282 | goto bad_area; |
268 | #else | ||
269 | pte_t *ptep; | ||
270 | pmd_t *pmdp; | ||
271 | |||
272 | /* Since 4xx/Book-E supports per-page execute permission, | ||
273 | * we lazily flush dcache to icache. */ | ||
274 | ptep = NULL; | ||
275 | if (get_pteptr(mm, address, &ptep, &pmdp)) { | ||
276 | spinlock_t *ptl = pte_lockptr(mm, pmdp); | ||
277 | spin_lock(ptl); | ||
278 | if (pte_present(*ptep)) { | ||
279 | struct page *page = pte_page(*ptep); | ||
280 | |||
281 | if (!test_bit(PG_arch_1, &page->flags)) { | ||
282 | flush_dcache_icache_page(page); | ||
283 | set_bit(PG_arch_1, &page->flags); | ||
284 | } | ||
285 | pte_update(ptep, 0, _PAGE_HWEXEC | | ||
286 | _PAGE_ACCESSED); | ||
287 | local_flush_tlb_page(vma, address); | ||
288 | pte_unmap_unlock(ptep, ptl); | ||
289 | up_read(&mm->mmap_sem); | ||
290 | return 0; | ||
291 | } | ||
292 | pte_unmap_unlock(ptep, ptl); | ||
293 | } | ||
294 | #endif | ||
295 | /* a write */ | 283 | /* a write */ |
296 | } else if (is_write) { | 284 | } else if (is_write) { |
297 | if (!(vma->vm_flags & VM_WRITE)) | 285 | if (!(vma->vm_flags & VM_WRITE)) |
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c index ea6e41e39d9f..bb3d65998e6b 100644 --- a/arch/powerpc/mm/fsl_booke_mmu.c +++ b/arch/powerpc/mm/fsl_booke_mmu.c | |||
@@ -56,10 +56,14 @@ | |||
56 | 56 | ||
57 | extern void loadcam_entry(unsigned int index); | 57 | extern void loadcam_entry(unsigned int index); |
58 | unsigned int tlbcam_index; | 58 | unsigned int tlbcam_index; |
59 | static unsigned long __cam0, __cam1, __cam2; | 59 | static unsigned long cam[CONFIG_LOWMEM_CAM_NUM]; |
60 | 60 | ||
61 | #define NUM_TLBCAMS (16) | 61 | #define NUM_TLBCAMS (16) |
62 | 62 | ||
63 | #if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS) | ||
64 | #error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS" | ||
65 | #endif | ||
66 | |||
63 | struct tlbcam TLBCAM[NUM_TLBCAMS]; | 67 | struct tlbcam TLBCAM[NUM_TLBCAMS]; |
64 | 68 | ||
65 | struct tlbcamrange { | 69 | struct tlbcamrange { |
@@ -107,7 +111,7 @@ void settlbcam(int index, unsigned long virt, phys_addr_t phys, | |||
107 | unsigned int tsize, lz; | 111 | unsigned int tsize, lz; |
108 | 112 | ||
109 | asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size)); | 113 | asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size)); |
110 | tsize = (21 - lz) / 2; | 114 | tsize = 21 - lz; |
111 | 115 | ||
112 | #ifdef CONFIG_SMP | 116 | #ifdef CONFIG_SMP |
113 | if ((flags & _PAGE_NO_CACHE) == 0) | 117 | if ((flags & _PAGE_NO_CACHE) == 0) |
@@ -152,19 +156,19 @@ void invalidate_tlbcam_entry(int index) | |||
152 | loadcam_entry(index); | 156 | loadcam_entry(index); |
153 | } | 157 | } |
154 | 158 | ||
155 | void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1, | 159 | unsigned long __init mmu_mapin_ram(void) |
156 | unsigned long cam2) | ||
157 | { | 160 | { |
158 | settlbcam(0, PAGE_OFFSET, memstart_addr, cam0, _PAGE_KERNEL, 0); | 161 | unsigned long virt = PAGE_OFFSET; |
159 | tlbcam_index++; | 162 | phys_addr_t phys = memstart_addr; |
160 | if (cam1) { | 163 | |
161 | tlbcam_index++; | 164 | while (cam[tlbcam_index] && tlbcam_index < ARRAY_SIZE(cam)) { |
162 | settlbcam(1, PAGE_OFFSET+cam0, memstart_addr+cam0, cam1, _PAGE_KERNEL, 0); | 165 | settlbcam(tlbcam_index, virt, phys, cam[tlbcam_index], PAGE_KERNEL_X, 0); |
163 | } | 166 | virt += cam[tlbcam_index]; |
164 | if (cam2) { | 167 | phys += cam[tlbcam_index]; |
165 | tlbcam_index++; | 168 | tlbcam_index++; |
166 | settlbcam(2, PAGE_OFFSET+cam0+cam1, memstart_addr+cam0+cam1, cam2, _PAGE_KERNEL, 0); | ||
167 | } | 169 | } |
170 | |||
171 | return virt - PAGE_OFFSET; | ||
168 | } | 172 | } |
169 | 173 | ||
170 | /* | 174 | /* |
@@ -175,51 +179,46 @@ void __init MMU_init_hw(void) | |||
175 | flush_instruction_cache(); | 179 | flush_instruction_cache(); |
176 | } | 180 | } |
177 | 181 | ||
178 | unsigned long __init mmu_mapin_ram(void) | ||
179 | { | ||
180 | cam_mapin_ram(__cam0, __cam1, __cam2); | ||
181 | |||
182 | return __cam0 + __cam1 + __cam2; | ||
183 | } | ||
184 | |||
185 | |||
186 | void __init | 182 | void __init |
187 | adjust_total_lowmem(void) | 183 | adjust_total_lowmem(void) |
188 | { | 184 | { |
189 | phys_addr_t max_lowmem_size = __max_low_memory; | ||
190 | phys_addr_t cam_max_size = 0x10000000; | ||
191 | phys_addr_t ram; | 185 | phys_addr_t ram; |
186 | unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff; | ||
187 | char buf[ARRAY_SIZE(cam) * 5 + 1], *p = buf; | ||
188 | int i; | ||
189 | unsigned long virt = PAGE_OFFSET & 0xffffffffUL; | ||
190 | unsigned long phys = memstart_addr & 0xffffffffUL; | ||
192 | 191 | ||
193 | /* adjust CAM size to max_lowmem_size */ | 192 | /* Convert (4^max) kB to (2^max) bytes */ |
194 | if (max_lowmem_size < cam_max_size) | 193 | max_cam = max_cam * 2 + 10; |
195 | cam_max_size = max_lowmem_size; | ||
196 | 194 | ||
197 | /* adjust lowmem size to max_lowmem_size */ | 195 | /* adjust lowmem size to __max_low_memory */ |
198 | ram = min(max_lowmem_size, total_lowmem); | 196 | ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem); |
199 | 197 | ||
200 | /* Calculate CAM values */ | 198 | /* Calculate CAM values */ |
201 | __cam0 = 1UL << 2 * (__ilog2(ram) / 2); | 199 | __max_low_memory = 0; |
202 | if (__cam0 > cam_max_size) | 200 | for (i = 0; ram && i < ARRAY_SIZE(cam); i++) { |
203 | __cam0 = cam_max_size; | 201 | unsigned int camsize = __ilog2(ram) & ~1U; |
204 | ram -= __cam0; | 202 | unsigned int align = __ffs(virt | phys) & ~1U; |
205 | if (ram) { | 203 | |
206 | __cam1 = 1UL << 2 * (__ilog2(ram) / 2); | 204 | if (camsize > align) |
207 | if (__cam1 > cam_max_size) | 205 | camsize = align; |
208 | __cam1 = cam_max_size; | 206 | if (camsize > max_cam) |
209 | ram -= __cam1; | 207 | camsize = max_cam; |
210 | } | 208 | |
211 | if (ram) { | 209 | cam[i] = 1UL << camsize; |
212 | __cam2 = 1UL << 2 * (__ilog2(ram) / 2); | 210 | ram -= cam[i]; |
213 | if (__cam2 > cam_max_size) | 211 | __max_low_memory += cam[i]; |
214 | __cam2 = cam_max_size; | 212 | virt += cam[i]; |
215 | ram -= __cam2; | 213 | phys += cam[i]; |
214 | |||
215 | p += sprintf(p, "%lu/", cam[i] >> 20); | ||
216 | } | 216 | } |
217 | for (; i < ARRAY_SIZE(cam); i++) | ||
218 | p += sprintf(p, "0/"); | ||
219 | p[-1] = '\0'; | ||
217 | 220 | ||
218 | printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb," | 221 | pr_info("Memory CAM mapping: %s Mb, residual: %dMb\n", buf, |
219 | " CAM2=%ldMb residual: %ldMb\n", | 222 | (unsigned int)((total_lowmem - __max_low_memory) >> 20)); |
220 | __cam0 >> 20, __cam1 >> 20, __cam2 >> 20, | ||
221 | (long int)((total_lowmem - __cam0 - __cam1 - __cam2) | ||
222 | >> 20)); | ||
223 | __max_low_memory = __cam0 + __cam1 + __cam2; | ||
224 | __initial_memory_limit_addr = memstart_addr + __max_low_memory; | 223 | __initial_memory_limit_addr = memstart_addr + __max_low_memory; |
225 | } | 224 | } |
diff --git a/arch/powerpc/mm/gup.c b/arch/powerpc/mm/gup.c index 28a114db3ba0..bc400c78c97f 100644 --- a/arch/powerpc/mm/gup.c +++ b/arch/powerpc/mm/gup.c | |||
@@ -14,6 +14,8 @@ | |||
14 | #include <linux/rwsem.h> | 14 | #include <linux/rwsem.h> |
15 | #include <asm/pgtable.h> | 15 | #include <asm/pgtable.h> |
16 | 16 | ||
17 | #ifdef __HAVE_ARCH_PTE_SPECIAL | ||
18 | |||
17 | /* | 19 | /* |
18 | * The performance critical leaf functions are made noinline otherwise gcc | 20 | * The performance critical leaf functions are made noinline otherwise gcc |
19 | * inlines everything into a single function which results in too much | 21 | * inlines everything into a single function which results in too much |
@@ -151,8 +153,11 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write, | |||
151 | unsigned long addr, len, end; | 153 | unsigned long addr, len, end; |
152 | unsigned long next; | 154 | unsigned long next; |
153 | pgd_t *pgdp; | 155 | pgd_t *pgdp; |
154 | int psize, nr = 0; | 156 | int nr = 0; |
157 | #ifdef CONFIG_PPC64 | ||
155 | unsigned int shift; | 158 | unsigned int shift; |
159 | int psize; | ||
160 | #endif | ||
156 | 161 | ||
157 | pr_debug("%s(%lx,%x,%s)\n", __func__, start, nr_pages, write ? "write" : "read"); | 162 | pr_debug("%s(%lx,%x,%s)\n", __func__, start, nr_pages, write ? "write" : "read"); |
158 | 163 | ||
@@ -205,8 +210,13 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write, | |||
205 | */ | 210 | */ |
206 | local_irq_disable(); | 211 | local_irq_disable(); |
207 | 212 | ||
213 | #ifdef CONFIG_PPC64 | ||
214 | /* Those bits are related to hugetlbfs implementation and only exist | ||
215 | * on 64-bit for now | ||
216 | */ | ||
208 | psize = get_slice_psize(mm, addr); | 217 | psize = get_slice_psize(mm, addr); |
209 | shift = mmu_psize_defs[psize].shift; | 218 | shift = mmu_psize_defs[psize].shift; |
219 | #endif /* CONFIG_PPC64 */ | ||
210 | 220 | ||
211 | #ifdef CONFIG_HUGETLB_PAGE | 221 | #ifdef CONFIG_HUGETLB_PAGE |
212 | if (unlikely(mmu_huge_psizes[psize])) { | 222 | if (unlikely(mmu_huge_psizes[psize])) { |
@@ -236,7 +246,9 @@ int get_user_pages_fast(unsigned long start, int nr_pages, int write, | |||
236 | do { | 246 | do { |
237 | pgd_t pgd = *pgdp; | 247 | pgd_t pgd = *pgdp; |
238 | 248 | ||
249 | #ifdef CONFIG_PPC64 | ||
239 | VM_BUG_ON(shift != mmu_psize_defs[get_slice_psize(mm, addr)].shift); | 250 | VM_BUG_ON(shift != mmu_psize_defs[get_slice_psize(mm, addr)].shift); |
251 | #endif | ||
240 | pr_debug(" %016lx: normal pgd %p\n", addr, | 252 | pr_debug(" %016lx: normal pgd %p\n", addr, |
241 | (void *)pgd_val(pgd)); | 253 | (void *)pgd_val(pgd)); |
242 | next = pgd_addr_end(addr, end); | 254 | next = pgd_addr_end(addr, end); |
@@ -279,3 +291,5 @@ slow_irqon: | |||
279 | return ret; | 291 | return ret; |
280 | } | 292 | } |
281 | } | 293 | } |
294 | |||
295 | #endif /* __HAVE_ARCH_PTE_SPECIAL */ | ||
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 8d5b4758c13a..db556d25c3a7 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c | |||
@@ -516,7 +516,7 @@ static int __init htab_dt_scan_pftsize(unsigned long node, | |||
516 | 516 | ||
517 | static unsigned long __init htab_get_table_size(void) | 517 | static unsigned long __init htab_get_table_size(void) |
518 | { | 518 | { |
519 | unsigned long mem_size, rnd_mem_size, pteg_count; | 519 | unsigned long mem_size, rnd_mem_size, pteg_count, psize; |
520 | 520 | ||
521 | /* If hash size isn't already provided by the platform, we try to | 521 | /* If hash size isn't already provided by the platform, we try to |
522 | * retrieve it from the device-tree. If it's not there neither, we | 522 | * retrieve it from the device-tree. If it's not there neither, we |
@@ -534,7 +534,8 @@ static unsigned long __init htab_get_table_size(void) | |||
534 | rnd_mem_size <<= 1; | 534 | rnd_mem_size <<= 1; |
535 | 535 | ||
536 | /* # pages / 2 */ | 536 | /* # pages / 2 */ |
537 | pteg_count = max(rnd_mem_size >> (12 + 1), 1UL << 11); | 537 | psize = mmu_psize_defs[mmu_virtual_psize].shift; |
538 | pteg_count = max(rnd_mem_size >> (psize + 1), 1UL << 11); | ||
538 | 539 | ||
539 | return pteg_count << 7; | 540 | return pteg_count << 7; |
540 | } | 541 | } |
@@ -589,7 +590,7 @@ static void __init htab_finish_init(void) | |||
589 | make_bl(htab_call_hpte_updatepp, ppc_md.hpte_updatepp); | 590 | make_bl(htab_call_hpte_updatepp, ppc_md.hpte_updatepp); |
590 | } | 591 | } |
591 | 592 | ||
592 | void __init htab_initialize(void) | 593 | static void __init htab_initialize(void) |
593 | { | 594 | { |
594 | unsigned long table; | 595 | unsigned long table; |
595 | unsigned long pteg_count; | 596 | unsigned long pteg_count; |
@@ -731,11 +732,43 @@ void __init htab_initialize(void) | |||
731 | #undef KB | 732 | #undef KB |
732 | #undef MB | 733 | #undef MB |
733 | 734 | ||
734 | void htab_initialize_secondary(void) | 735 | void __init early_init_mmu(void) |
735 | { | 736 | { |
737 | /* Setup initial STAB address in the PACA */ | ||
738 | get_paca()->stab_real = __pa((u64)&initial_stab); | ||
739 | get_paca()->stab_addr = (u64)&initial_stab; | ||
740 | |||
741 | /* Initialize the MMU Hash table and create the linear mapping | ||
742 | * of memory. Has to be done before stab/slb initialization as | ||
743 | * this is currently where the page size encoding is obtained | ||
744 | */ | ||
745 | htab_initialize(); | ||
746 | |||
747 | /* Initialize stab / SLB management except on iSeries | ||
748 | */ | ||
749 | if (cpu_has_feature(CPU_FTR_SLB)) | ||
750 | slb_initialize(); | ||
751 | else if (!firmware_has_feature(FW_FEATURE_ISERIES)) | ||
752 | stab_initialize(get_paca()->stab_real); | ||
753 | } | ||
754 | |||
755 | #ifdef CONFIG_SMP | ||
756 | void __init early_init_mmu_secondary(void) | ||
757 | { | ||
758 | /* Initialize hash table for that CPU */ | ||
736 | if (!firmware_has_feature(FW_FEATURE_LPAR)) | 759 | if (!firmware_has_feature(FW_FEATURE_LPAR)) |
737 | mtspr(SPRN_SDR1, _SDR1); | 760 | mtspr(SPRN_SDR1, _SDR1); |
761 | |||
762 | /* Initialize STAB/SLB. We use a virtual address as it works | ||
763 | * in real mode on pSeries and we want a virutal address on | ||
764 | * iSeries anyway | ||
765 | */ | ||
766 | if (cpu_has_feature(CPU_FTR_SLB)) | ||
767 | slb_initialize(); | ||
768 | else | ||
769 | stab_initialize(get_paca()->stab_addr); | ||
738 | } | 770 | } |
771 | #endif /* CONFIG_SMP */ | ||
739 | 772 | ||
740 | /* | 773 | /* |
741 | * Called by asm hashtable.S for doing lazy icache flush | 774 | * Called by asm hashtable.S for doing lazy icache flush |
@@ -858,7 +891,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap) | |||
858 | unsigned long vsid; | 891 | unsigned long vsid; |
859 | struct mm_struct *mm; | 892 | struct mm_struct *mm; |
860 | pte_t *ptep; | 893 | pte_t *ptep; |
861 | cpumask_t tmp; | 894 | const struct cpumask *tmp; |
862 | int rc, user_region = 0, local = 0; | 895 | int rc, user_region = 0, local = 0; |
863 | int psize, ssize; | 896 | int psize, ssize; |
864 | 897 | ||
@@ -906,8 +939,8 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap) | |||
906 | return 1; | 939 | return 1; |
907 | 940 | ||
908 | /* Check CPU locality */ | 941 | /* Check CPU locality */ |
909 | tmp = cpumask_of_cpu(smp_processor_id()); | 942 | tmp = cpumask_of(smp_processor_id()); |
910 | if (user_region && cpus_equal(mm->cpu_vm_mask, tmp)) | 943 | if (user_region && cpumask_equal(mm_cpumask(mm), tmp)) |
911 | local = 1; | 944 | local = 1; |
912 | 945 | ||
913 | #ifdef CONFIG_HUGETLB_PAGE | 946 | #ifdef CONFIG_HUGETLB_PAGE |
@@ -1023,7 +1056,6 @@ void hash_preload(struct mm_struct *mm, unsigned long ea, | |||
1023 | unsigned long vsid; | 1056 | unsigned long vsid; |
1024 | void *pgdir; | 1057 | void *pgdir; |
1025 | pte_t *ptep; | 1058 | pte_t *ptep; |
1026 | cpumask_t mask; | ||
1027 | unsigned long flags; | 1059 | unsigned long flags; |
1028 | int local = 0; | 1060 | int local = 0; |
1029 | int ssize; | 1061 | int ssize; |
@@ -1066,8 +1098,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea, | |||
1066 | local_irq_save(flags); | 1098 | local_irq_save(flags); |
1067 | 1099 | ||
1068 | /* Is that local to this CPU ? */ | 1100 | /* Is that local to this CPU ? */ |
1069 | mask = cpumask_of_cpu(smp_processor_id()); | 1101 | if (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) |
1070 | if (cpus_equal(mm->cpu_vm_mask, mask)) | ||
1071 | local = 1; | 1102 | local = 1; |
1072 | 1103 | ||
1073 | /* Hash it in */ | 1104 | /* Hash it in */ |
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index f00f09a77f12..f668fa9ba804 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c | |||
@@ -472,40 +472,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, | |||
472 | { | 472 | { |
473 | #ifdef CONFIG_PPC_STD_MMU | 473 | #ifdef CONFIG_PPC_STD_MMU |
474 | unsigned long access = 0, trap; | 474 | unsigned long access = 0, trap; |
475 | #endif | ||
476 | unsigned long pfn = pte_pfn(pte); | ||
477 | |||
478 | /* handle i-cache coherency */ | ||
479 | if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE) && | ||
480 | !cpu_has_feature(CPU_FTR_NOEXECUTE) && | ||
481 | pfn_valid(pfn)) { | ||
482 | struct page *page = pfn_to_page(pfn); | ||
483 | #ifdef CONFIG_8xx | ||
484 | /* On 8xx, cache control instructions (particularly | ||
485 | * "dcbst" from flush_dcache_icache) fault as write | ||
486 | * operation if there is an unpopulated TLB entry | ||
487 | * for the address in question. To workaround that, | ||
488 | * we invalidate the TLB here, thus avoiding dcbst | ||
489 | * misbehaviour. | ||
490 | */ | ||
491 | _tlbil_va(address, 0 /* 8xx doesn't care about PID */); | ||
492 | #endif | ||
493 | /* The _PAGE_USER test should really be _PAGE_EXEC, but | ||
494 | * older glibc versions execute some code from no-exec | ||
495 | * pages, which for now we are supporting. If exec-only | ||
496 | * pages are ever implemented, this will have to change. | ||
497 | */ | ||
498 | if (!PageReserved(page) && (pte_val(pte) & _PAGE_USER) | ||
499 | && !test_bit(PG_arch_1, &page->flags)) { | ||
500 | if (vma->vm_mm == current->active_mm) { | ||
501 | __flush_dcache_icache((void *) address); | ||
502 | } else | ||
503 | flush_dcache_icache_page(page); | ||
504 | set_bit(PG_arch_1, &page->flags); | ||
505 | } | ||
506 | } | ||
507 | 475 | ||
508 | #ifdef CONFIG_PPC_STD_MMU | ||
509 | /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */ | 476 | /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */ |
510 | if (!pte_young(pte) || address >= TASK_SIZE) | 477 | if (!pte_young(pte) || address >= TASK_SIZE) |
511 | return; | 478 | return; |
diff --git a/arch/powerpc/mm/mmap.c b/arch/powerpc/mm/mmap_64.c index 86010fc7d3b1..0d957a4c70fe 100644 --- a/arch/powerpc/mm/mmap.c +++ b/arch/powerpc/mm/mmap_64.c | |||
@@ -24,36 +24,26 @@ | |||
24 | 24 | ||
25 | #include <linux/personality.h> | 25 | #include <linux/personality.h> |
26 | #include <linux/mm.h> | 26 | #include <linux/mm.h> |
27 | #include <linux/random.h> | ||
27 | #include <linux/sched.h> | 28 | #include <linux/sched.h> |
28 | 29 | ||
29 | /* | 30 | /* |
30 | * Top of mmap area (just below the process stack). | 31 | * Top of mmap area (just below the process stack). |
31 | * | 32 | * |
32 | * Leave an at least ~128 MB hole. | 33 | * Leave at least a ~128 MB hole on 32bit applications. |
34 | * | ||
35 | * On 64bit applications we randomise the stack by 1GB so we need to | ||
36 | * space our mmap start address by a further 1GB, otherwise there is a | ||
37 | * chance the mmap area will end up closer to the stack than our ulimit | ||
38 | * requires. | ||
33 | */ | 39 | */ |
34 | #define MIN_GAP (128*1024*1024) | 40 | #define MIN_GAP32 (128*1024*1024) |
41 | #define MIN_GAP64 ((128 + 1024)*1024*1024UL) | ||
42 | #define MIN_GAP ((is_32bit_task()) ? MIN_GAP32 : MIN_GAP64) | ||
35 | #define MAX_GAP (TASK_SIZE/6*5) | 43 | #define MAX_GAP (TASK_SIZE/6*5) |
36 | 44 | ||
37 | static inline unsigned long mmap_base(void) | ||
38 | { | ||
39 | unsigned long gap = current->signal->rlim[RLIMIT_STACK].rlim_cur; | ||
40 | |||
41 | if (gap < MIN_GAP) | ||
42 | gap = MIN_GAP; | ||
43 | else if (gap > MAX_GAP) | ||
44 | gap = MAX_GAP; | ||
45 | |||
46 | return TASK_SIZE - (gap & PAGE_MASK); | ||
47 | } | ||
48 | |||
49 | static inline int mmap_is_legacy(void) | 45 | static inline int mmap_is_legacy(void) |
50 | { | 46 | { |
51 | /* | ||
52 | * Force standard allocation for 64 bit programs. | ||
53 | */ | ||
54 | if (!test_thread_flag(TIF_32BIT)) | ||
55 | return 1; | ||
56 | |||
57 | if (current->personality & ADDR_COMPAT_LAYOUT) | 47 | if (current->personality & ADDR_COMPAT_LAYOUT) |
58 | return 1; | 48 | return 1; |
59 | 49 | ||
@@ -64,6 +54,40 @@ static inline int mmap_is_legacy(void) | |||
64 | } | 54 | } |
65 | 55 | ||
66 | /* | 56 | /* |
57 | * Since get_random_int() returns the same value within a 1 jiffy window, | ||
58 | * we will almost always get the same randomisation for the stack and mmap | ||
59 | * region. This will mean the relative distance between stack and mmap will | ||
60 | * be the same. | ||
61 | * | ||
62 | * To avoid this we can shift the randomness by 1 bit. | ||
63 | */ | ||
64 | static unsigned long mmap_rnd(void) | ||
65 | { | ||
66 | unsigned long rnd = 0; | ||
67 | |||
68 | if (current->flags & PF_RANDOMIZE) { | ||
69 | /* 8MB for 32bit, 1GB for 64bit */ | ||
70 | if (is_32bit_task()) | ||
71 | rnd = (long)(get_random_int() % (1<<(22-PAGE_SHIFT))); | ||
72 | else | ||
73 | rnd = (long)(get_random_int() % (1<<(29-PAGE_SHIFT))); | ||
74 | } | ||
75 | return (rnd << PAGE_SHIFT) * 2; | ||
76 | } | ||
77 | |||
78 | static inline unsigned long mmap_base(void) | ||
79 | { | ||
80 | unsigned long gap = current->signal->rlim[RLIMIT_STACK].rlim_cur; | ||
81 | |||
82 | if (gap < MIN_GAP) | ||
83 | gap = MIN_GAP; | ||
84 | else if (gap > MAX_GAP) | ||
85 | gap = MAX_GAP; | ||
86 | |||
87 | return PAGE_ALIGN(TASK_SIZE - gap - mmap_rnd()); | ||
88 | } | ||
89 | |||
90 | /* | ||
67 | * This function, called very early during the creation of a new | 91 | * This function, called very early during the creation of a new |
68 | * process VM image, sets up which VM layout function to use: | 92 | * process VM image, sets up which VM layout function to use: |
69 | */ | 93 | */ |
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c index 52a0cfc38b64..a70e311bd457 100644 --- a/arch/powerpc/mm/mmu_context_nohash.c +++ b/arch/powerpc/mm/mmu_context_nohash.c | |||
@@ -97,7 +97,7 @@ static unsigned int steal_context_smp(unsigned int id) | |||
97 | mm->context.id = MMU_NO_CONTEXT; | 97 | mm->context.id = MMU_NO_CONTEXT; |
98 | 98 | ||
99 | /* Mark it stale on all CPUs that used this mm */ | 99 | /* Mark it stale on all CPUs that used this mm */ |
100 | for_each_cpu_mask_nr(cpu, mm->cpu_vm_mask) | 100 | for_each_cpu(cpu, mm_cpumask(mm)) |
101 | __set_bit(id, stale_map[cpu]); | 101 | __set_bit(id, stale_map[cpu]); |
102 | return id; | 102 | return id; |
103 | } | 103 | } |
@@ -380,7 +380,7 @@ void __init mmu_context_init(void) | |||
380 | #endif | 380 | #endif |
381 | 381 | ||
382 | printk(KERN_INFO | 382 | printk(KERN_INFO |
383 | "MMU: Allocated %d bytes of context maps for %d contexts\n", | 383 | "MMU: Allocated %zu bytes of context maps for %d contexts\n", |
384 | 2 * CTX_MAP_SIZE + (sizeof(void *) * (last_context + 1)), | 384 | 2 * CTX_MAP_SIZE + (sizeof(void *) * (last_context + 1)), |
385 | last_context - first_context + 1); | 385 | last_context - first_context + 1); |
386 | 386 | ||
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index 5ac08b8ab654..9047145095aa 100644 --- a/arch/powerpc/mm/numa.c +++ b/arch/powerpc/mm/numa.c | |||
@@ -158,35 +158,6 @@ static void unmap_cpu_from_node(unsigned long cpu) | |||
158 | } | 158 | } |
159 | #endif /* CONFIG_HOTPLUG_CPU */ | 159 | #endif /* CONFIG_HOTPLUG_CPU */ |
160 | 160 | ||
161 | static struct device_node * __cpuinit find_cpu_node(unsigned int cpu) | ||
162 | { | ||
163 | unsigned int hw_cpuid = get_hard_smp_processor_id(cpu); | ||
164 | struct device_node *cpu_node = NULL; | ||
165 | const unsigned int *interrupt_server, *reg; | ||
166 | int len; | ||
167 | |||
168 | while ((cpu_node = of_find_node_by_type(cpu_node, "cpu")) != NULL) { | ||
169 | /* Try interrupt server first */ | ||
170 | interrupt_server = of_get_property(cpu_node, | ||
171 | "ibm,ppc-interrupt-server#s", &len); | ||
172 | |||
173 | len = len / sizeof(u32); | ||
174 | |||
175 | if (interrupt_server && (len > 0)) { | ||
176 | while (len--) { | ||
177 | if (interrupt_server[len] == hw_cpuid) | ||
178 | return cpu_node; | ||
179 | } | ||
180 | } else { | ||
181 | reg = of_get_property(cpu_node, "reg", &len); | ||
182 | if (reg && (len > 0) && (reg[0] == hw_cpuid)) | ||
183 | return cpu_node; | ||
184 | } | ||
185 | } | ||
186 | |||
187 | return NULL; | ||
188 | } | ||
189 | |||
190 | /* must hold reference to node during call */ | 161 | /* must hold reference to node during call */ |
191 | static const int *of_get_associativity(struct device_node *dev) | 162 | static const int *of_get_associativity(struct device_node *dev) |
192 | { | 163 | { |
@@ -290,7 +261,7 @@ static int __init find_min_common_depth(void) | |||
290 | ref_points = of_get_property(rtas_root, | 261 | ref_points = of_get_property(rtas_root, |
291 | "ibm,associativity-reference-points", &len); | 262 | "ibm,associativity-reference-points", &len); |
292 | 263 | ||
293 | if ((len >= 1) && ref_points) { | 264 | if ((len >= 2 * sizeof(unsigned int)) && ref_points) { |
294 | depth = ref_points[1]; | 265 | depth = ref_points[1]; |
295 | } else { | 266 | } else { |
296 | dbg("NUMA: ibm,associativity-reference-points not found.\n"); | 267 | dbg("NUMA: ibm,associativity-reference-points not found.\n"); |
@@ -470,7 +441,7 @@ static int of_drconf_to_nid_single(struct of_drconf_cell *drmem, | |||
470 | static int __cpuinit numa_setup_cpu(unsigned long lcpu) | 441 | static int __cpuinit numa_setup_cpu(unsigned long lcpu) |
471 | { | 442 | { |
472 | int nid = 0; | 443 | int nid = 0; |
473 | struct device_node *cpu = find_cpu_node(lcpu); | 444 | struct device_node *cpu = of_get_cpu_node(lcpu, NULL); |
474 | 445 | ||
475 | if (!cpu) { | 446 | if (!cpu) { |
476 | WARN_ON(1); | 447 | WARN_ON(1); |
@@ -652,7 +623,7 @@ static int __init parse_numa_properties(void) | |||
652 | for_each_present_cpu(i) { | 623 | for_each_present_cpu(i) { |
653 | int nid; | 624 | int nid; |
654 | 625 | ||
655 | cpu = find_cpu_node(i); | 626 | cpu = of_get_cpu_node(i, NULL); |
656 | BUG_ON(!cpu); | 627 | BUG_ON(!cpu); |
657 | nid = of_node_to_nid_single(cpu); | 628 | nid = of_node_to_nid_single(cpu); |
658 | of_node_put(cpu); | 629 | of_node_put(cpu); |
@@ -1041,57 +1012,32 @@ early_param("numa", early_numa); | |||
1041 | 1012 | ||
1042 | #ifdef CONFIG_MEMORY_HOTPLUG | 1013 | #ifdef CONFIG_MEMORY_HOTPLUG |
1043 | /* | 1014 | /* |
1044 | * Validate the node associated with the memory section we are | 1015 | * Find the node associated with a hot added memory section for |
1045 | * trying to add. | 1016 | * memory represented in the device tree by the property |
1046 | */ | 1017 | * ibm,dynamic-reconfiguration-memory/ibm,dynamic-memory. |
1047 | int valid_hot_add_scn(int *nid, unsigned long start, u32 lmb_size, | ||
1048 | unsigned long scn_addr) | ||
1049 | { | ||
1050 | nodemask_t nodes; | ||
1051 | |||
1052 | if (*nid < 0 || !node_online(*nid)) | ||
1053 | *nid = any_online_node(NODE_MASK_ALL); | ||
1054 | |||
1055 | if ((scn_addr >= start) && (scn_addr < (start + lmb_size))) { | ||
1056 | nodes_setall(nodes); | ||
1057 | while (NODE_DATA(*nid)->node_spanned_pages == 0) { | ||
1058 | node_clear(*nid, nodes); | ||
1059 | *nid = any_online_node(nodes); | ||
1060 | } | ||
1061 | |||
1062 | return 1; | ||
1063 | } | ||
1064 | |||
1065 | return 0; | ||
1066 | } | ||
1067 | |||
1068 | /* | ||
1069 | * Find the node associated with a hot added memory section represented | ||
1070 | * by the ibm,dynamic-reconfiguration-memory node. | ||
1071 | */ | 1018 | */ |
1072 | static int hot_add_drconf_scn_to_nid(struct device_node *memory, | 1019 | static int hot_add_drconf_scn_to_nid(struct device_node *memory, |
1073 | unsigned long scn_addr) | 1020 | unsigned long scn_addr) |
1074 | { | 1021 | { |
1075 | const u32 *dm; | 1022 | const u32 *dm; |
1076 | unsigned int n, rc; | 1023 | unsigned int drconf_cell_cnt, rc; |
1077 | unsigned long lmb_size; | 1024 | unsigned long lmb_size; |
1078 | int default_nid = any_online_node(NODE_MASK_ALL); | ||
1079 | int nid; | ||
1080 | struct assoc_arrays aa; | 1025 | struct assoc_arrays aa; |
1026 | int nid = -1; | ||
1081 | 1027 | ||
1082 | n = of_get_drconf_memory(memory, &dm); | 1028 | drconf_cell_cnt = of_get_drconf_memory(memory, &dm); |
1083 | if (!n) | 1029 | if (!drconf_cell_cnt) |
1084 | return default_nid;; | 1030 | return -1; |
1085 | 1031 | ||
1086 | lmb_size = of_get_lmb_size(memory); | 1032 | lmb_size = of_get_lmb_size(memory); |
1087 | if (!lmb_size) | 1033 | if (!lmb_size) |
1088 | return default_nid; | 1034 | return -1; |
1089 | 1035 | ||
1090 | rc = of_get_assoc_arrays(memory, &aa); | 1036 | rc = of_get_assoc_arrays(memory, &aa); |
1091 | if (rc) | 1037 | if (rc) |
1092 | return default_nid; | 1038 | return -1; |
1093 | 1039 | ||
1094 | for (; n != 0; --n) { | 1040 | for (; drconf_cell_cnt != 0; --drconf_cell_cnt) { |
1095 | struct of_drconf_cell drmem; | 1041 | struct of_drconf_cell drmem; |
1096 | 1042 | ||
1097 | read_drconf_cell(&drmem, &dm); | 1043 | read_drconf_cell(&drmem, &dm); |
@@ -1102,15 +1048,57 @@ static int hot_add_drconf_scn_to_nid(struct device_node *memory, | |||
1102 | || !(drmem.flags & DRCONF_MEM_ASSIGNED)) | 1048 | || !(drmem.flags & DRCONF_MEM_ASSIGNED)) |
1103 | continue; | 1049 | continue; |
1104 | 1050 | ||
1051 | if ((scn_addr < drmem.base_addr) | ||
1052 | || (scn_addr >= (drmem.base_addr + lmb_size))) | ||
1053 | continue; | ||
1054 | |||
1105 | nid = of_drconf_to_nid_single(&drmem, &aa); | 1055 | nid = of_drconf_to_nid_single(&drmem, &aa); |
1056 | break; | ||
1057 | } | ||
1058 | |||
1059 | return nid; | ||
1060 | } | ||
1106 | 1061 | ||
1107 | if (valid_hot_add_scn(&nid, drmem.base_addr, lmb_size, | 1062 | /* |
1108 | scn_addr)) | 1063 | * Find the node associated with a hot added memory section for memory |
1109 | return nid; | 1064 | * represented in the device tree as a node (i.e. memory@XXXX) for |
1065 | * each lmb. | ||
1066 | */ | ||
1067 | int hot_add_node_scn_to_nid(unsigned long scn_addr) | ||
1068 | { | ||
1069 | struct device_node *memory = NULL; | ||
1070 | int nid = -1; | ||
1071 | |||
1072 | while ((memory = of_find_node_by_type(memory, "memory")) != NULL) { | ||
1073 | unsigned long start, size; | ||
1074 | int ranges; | ||
1075 | const unsigned int *memcell_buf; | ||
1076 | unsigned int len; | ||
1077 | |||
1078 | memcell_buf = of_get_property(memory, "reg", &len); | ||
1079 | if (!memcell_buf || len <= 0) | ||
1080 | continue; | ||
1081 | |||
1082 | /* ranges in cell */ | ||
1083 | ranges = (len >> 2) / (n_mem_addr_cells + n_mem_size_cells); | ||
1084 | |||
1085 | while (ranges--) { | ||
1086 | start = read_n_cells(n_mem_addr_cells, &memcell_buf); | ||
1087 | size = read_n_cells(n_mem_size_cells, &memcell_buf); | ||
1088 | |||
1089 | if ((scn_addr < start) || (scn_addr >= (start + size))) | ||
1090 | continue; | ||
1091 | |||
1092 | nid = of_node_to_nid_single(memory); | ||
1093 | break; | ||
1094 | } | ||
1095 | |||
1096 | of_node_put(memory); | ||
1097 | if (nid >= 0) | ||
1098 | break; | ||
1110 | } | 1099 | } |
1111 | 1100 | ||
1112 | BUG(); /* section address should be found above */ | 1101 | return nid; |
1113 | return 0; | ||
1114 | } | 1102 | } |
1115 | 1103 | ||
1116 | /* | 1104 | /* |
@@ -1121,7 +1109,7 @@ static int hot_add_drconf_scn_to_nid(struct device_node *memory, | |||
1121 | int hot_add_scn_to_nid(unsigned long scn_addr) | 1109 | int hot_add_scn_to_nid(unsigned long scn_addr) |
1122 | { | 1110 | { |
1123 | struct device_node *memory = NULL; | 1111 | struct device_node *memory = NULL; |
1124 | int nid; | 1112 | int nid, found = 0; |
1125 | 1113 | ||
1126 | if (!numa_enabled || (min_common_depth < 0)) | 1114 | if (!numa_enabled || (min_common_depth < 0)) |
1127 | return any_online_node(NODE_MASK_ALL); | 1115 | return any_online_node(NODE_MASK_ALL); |
@@ -1130,35 +1118,25 @@ int hot_add_scn_to_nid(unsigned long scn_addr) | |||
1130 | if (memory) { | 1118 | if (memory) { |
1131 | nid = hot_add_drconf_scn_to_nid(memory, scn_addr); | 1119 | nid = hot_add_drconf_scn_to_nid(memory, scn_addr); |
1132 | of_node_put(memory); | 1120 | of_node_put(memory); |
1133 | return nid; | 1121 | } else { |
1122 | nid = hot_add_node_scn_to_nid(scn_addr); | ||
1134 | } | 1123 | } |
1135 | 1124 | ||
1136 | while ((memory = of_find_node_by_type(memory, "memory")) != NULL) { | 1125 | if (nid < 0 || !node_online(nid)) |
1137 | unsigned long start, size; | 1126 | nid = any_online_node(NODE_MASK_ALL); |
1138 | int ranges; | ||
1139 | const unsigned int *memcell_buf; | ||
1140 | unsigned int len; | ||
1141 | |||
1142 | memcell_buf = of_get_property(memory, "reg", &len); | ||
1143 | if (!memcell_buf || len <= 0) | ||
1144 | continue; | ||
1145 | 1127 | ||
1146 | /* ranges in cell */ | 1128 | if (NODE_DATA(nid)->node_spanned_pages) |
1147 | ranges = (len >> 2) / (n_mem_addr_cells + n_mem_size_cells); | 1129 | return nid; |
1148 | ha_new_range: | ||
1149 | start = read_n_cells(n_mem_addr_cells, &memcell_buf); | ||
1150 | size = read_n_cells(n_mem_size_cells, &memcell_buf); | ||
1151 | nid = of_node_to_nid_single(memory); | ||
1152 | 1130 | ||
1153 | if (valid_hot_add_scn(&nid, start, size, scn_addr)) { | 1131 | for_each_online_node(nid) { |
1154 | of_node_put(memory); | 1132 | if (NODE_DATA(nid)->node_spanned_pages) { |
1155 | return nid; | 1133 | found = 1; |
1134 | break; | ||
1156 | } | 1135 | } |
1157 | |||
1158 | if (--ranges) /* process all ranges in cell */ | ||
1159 | goto ha_new_range; | ||
1160 | } | 1136 | } |
1161 | BUG(); /* section address should be found above */ | 1137 | |
1162 | return 0; | 1138 | BUG_ON(!found); |
1139 | return nid; | ||
1163 | } | 1140 | } |
1141 | |||
1164 | #endif /* CONFIG_MEMORY_HOTPLUG */ | 1142 | #endif /* CONFIG_MEMORY_HOTPLUG */ |
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c index 6d94116fdea1..f5c6fd42265c 100644 --- a/arch/powerpc/mm/pgtable.c +++ b/arch/powerpc/mm/pgtable.c | |||
@@ -1,5 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * This file contains common routines for dealing with free of page tables | 2 | * This file contains common routines for dealing with free of page tables |
3 | * Along with common page table handling code | ||
3 | * | 4 | * |
4 | * Derived from arch/powerpc/mm/tlb_64.c: | 5 | * Derived from arch/powerpc/mm/tlb_64.c: |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | 6 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
@@ -81,11 +82,10 @@ static void pte_free_submit(struct pte_freelist_batch *batch) | |||
81 | void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf) | 82 | void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf) |
82 | { | 83 | { |
83 | /* This is safe since tlb_gather_mmu has disabled preemption */ | 84 | /* This is safe since tlb_gather_mmu has disabled preemption */ |
84 | cpumask_t local_cpumask = cpumask_of_cpu(smp_processor_id()); | ||
85 | struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur); | 85 | struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur); |
86 | 86 | ||
87 | if (atomic_read(&tlb->mm->mm_users) < 2 || | 87 | if (atomic_read(&tlb->mm->mm_users) < 2 || |
88 | cpus_equal(tlb->mm->cpu_vm_mask, local_cpumask)) { | 88 | cpumask_equal(mm_cpumask(tlb->mm), cpumask_of(smp_processor_id()))){ |
89 | pgtable_free(pgf); | 89 | pgtable_free(pgf); |
90 | return; | 90 | return; |
91 | } | 91 | } |
@@ -115,3 +115,133 @@ void pte_free_finish(void) | |||
115 | pte_free_submit(*batchp); | 115 | pte_free_submit(*batchp); |
116 | *batchp = NULL; | 116 | *batchp = NULL; |
117 | } | 117 | } |
118 | |||
119 | /* | ||
120 | * Handle i/d cache flushing, called from set_pte_at() or ptep_set_access_flags() | ||
121 | */ | ||
122 | static pte_t do_dcache_icache_coherency(pte_t pte) | ||
123 | { | ||
124 | unsigned long pfn = pte_pfn(pte); | ||
125 | struct page *page; | ||
126 | |||
127 | if (unlikely(!pfn_valid(pfn))) | ||
128 | return pte; | ||
129 | page = pfn_to_page(pfn); | ||
130 | |||
131 | if (!PageReserved(page) && !test_bit(PG_arch_1, &page->flags)) { | ||
132 | pr_debug("do_dcache_icache_coherency... flushing\n"); | ||
133 | flush_dcache_icache_page(page); | ||
134 | set_bit(PG_arch_1, &page->flags); | ||
135 | } | ||
136 | else | ||
137 | pr_debug("do_dcache_icache_coherency... already clean\n"); | ||
138 | return __pte(pte_val(pte) | _PAGE_HWEXEC); | ||
139 | } | ||
140 | |||
141 | static inline int is_exec_fault(void) | ||
142 | { | ||
143 | return current->thread.regs && TRAP(current->thread.regs) == 0x400; | ||
144 | } | ||
145 | |||
146 | /* We only try to do i/d cache coherency on stuff that looks like | ||
147 | * reasonably "normal" PTEs. We currently require a PTE to be present | ||
148 | * and we avoid _PAGE_SPECIAL and _PAGE_NO_CACHE | ||
149 | */ | ||
150 | static inline int pte_looks_normal(pte_t pte) | ||
151 | { | ||
152 | return (pte_val(pte) & | ||
153 | (_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE)) == | ||
154 | (_PAGE_PRESENT); | ||
155 | } | ||
156 | |||
157 | #if defined(CONFIG_PPC_STD_MMU) | ||
158 | /* Server-style MMU handles coherency when hashing if HW exec permission | ||
159 | * is supposed per page (currently 64-bit only). Else, we always flush | ||
160 | * valid PTEs in set_pte. | ||
161 | */ | ||
162 | static inline int pte_need_exec_flush(pte_t pte, int set_pte) | ||
163 | { | ||
164 | return set_pte && pte_looks_normal(pte) && | ||
165 | !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) || | ||
166 | cpu_has_feature(CPU_FTR_NOEXECUTE)); | ||
167 | } | ||
168 | #elif _PAGE_HWEXEC == 0 | ||
169 | /* Embedded type MMU without HW exec support (8xx only so far), we flush | ||
170 | * the cache for any present PTE | ||
171 | */ | ||
172 | static inline int pte_need_exec_flush(pte_t pte, int set_pte) | ||
173 | { | ||
174 | return set_pte && pte_looks_normal(pte); | ||
175 | } | ||
176 | #else | ||
177 | /* Other embedded CPUs with HW exec support per-page, we flush on exec | ||
178 | * fault if HWEXEC is not set | ||
179 | */ | ||
180 | static inline int pte_need_exec_flush(pte_t pte, int set_pte) | ||
181 | { | ||
182 | return pte_looks_normal(pte) && is_exec_fault() && | ||
183 | !(pte_val(pte) & _PAGE_HWEXEC); | ||
184 | } | ||
185 | #endif | ||
186 | |||
187 | /* | ||
188 | * set_pte stores a linux PTE into the linux page table. | ||
189 | */ | ||
190 | void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) | ||
191 | { | ||
192 | #ifdef CONFIG_DEBUG_VM | ||
193 | WARN_ON(pte_present(*ptep)); | ||
194 | #endif | ||
195 | /* Note: mm->context.id might not yet have been assigned as | ||
196 | * this context might not have been activated yet when this | ||
197 | * is called. | ||
198 | */ | ||
199 | pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); | ||
200 | if (pte_need_exec_flush(pte, 1)) | ||
201 | pte = do_dcache_icache_coherency(pte); | ||
202 | |||
203 | /* Perform the setting of the PTE */ | ||
204 | __set_pte_at(mm, addr, ptep, pte, 0); | ||
205 | } | ||
206 | |||
207 | /* | ||
208 | * This is called when relaxing access to a PTE. It's also called in the page | ||
209 | * fault path when we don't hit any of the major fault cases, ie, a minor | ||
210 | * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have | ||
211 | * handled those two for us, we additionally deal with missing execute | ||
212 | * permission here on some processors | ||
213 | */ | ||
214 | int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address, | ||
215 | pte_t *ptep, pte_t entry, int dirty) | ||
216 | { | ||
217 | int changed; | ||
218 | if (!dirty && pte_need_exec_flush(entry, 0)) | ||
219 | entry = do_dcache_icache_coherency(entry); | ||
220 | changed = !pte_same(*(ptep), entry); | ||
221 | if (changed) { | ||
222 | assert_pte_locked(vma->vm_mm, address); | ||
223 | __ptep_set_access_flags(ptep, entry); | ||
224 | flush_tlb_page_nohash(vma, address); | ||
225 | } | ||
226 | return changed; | ||
227 | } | ||
228 | |||
229 | #ifdef CONFIG_DEBUG_VM | ||
230 | void assert_pte_locked(struct mm_struct *mm, unsigned long addr) | ||
231 | { | ||
232 | pgd_t *pgd; | ||
233 | pud_t *pud; | ||
234 | pmd_t *pmd; | ||
235 | |||
236 | if (mm == &init_mm) | ||
237 | return; | ||
238 | pgd = mm->pgd + pgd_index(addr); | ||
239 | BUG_ON(pgd_none(*pgd)); | ||
240 | pud = pud_offset(pgd, addr); | ||
241 | BUG_ON(pud_none(*pud)); | ||
242 | pmd = pmd_offset(pud, addr); | ||
243 | BUG_ON(!pmd_present(*pmd)); | ||
244 | BUG_ON(!spin_is_locked(pte_lockptr(mm, pmd))); | ||
245 | } | ||
246 | #endif /* CONFIG_DEBUG_VM */ | ||
247 | |||
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c index 58bcaeba728d..430d0908fa50 100644 --- a/arch/powerpc/mm/pgtable_32.c +++ b/arch/powerpc/mm/pgtable_32.c | |||
@@ -129,7 +129,8 @@ pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address) | |||
129 | void __iomem * | 129 | void __iomem * |
130 | ioremap(phys_addr_t addr, unsigned long size) | 130 | ioremap(phys_addr_t addr, unsigned long size) |
131 | { | 131 | { |
132 | return __ioremap(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED); | 132 | return __ioremap_caller(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED, |
133 | __builtin_return_address(0)); | ||
133 | } | 134 | } |
134 | EXPORT_SYMBOL(ioremap); | 135 | EXPORT_SYMBOL(ioremap); |
135 | 136 | ||
@@ -143,20 +144,27 @@ ioremap_flags(phys_addr_t addr, unsigned long size, unsigned long flags) | |||
143 | /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */ | 144 | /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */ |
144 | flags &= ~(_PAGE_USER | _PAGE_EXEC | _PAGE_HWEXEC); | 145 | flags &= ~(_PAGE_USER | _PAGE_EXEC | _PAGE_HWEXEC); |
145 | 146 | ||
146 | return __ioremap(addr, size, flags); | 147 | return __ioremap_caller(addr, size, flags, __builtin_return_address(0)); |
147 | } | 148 | } |
148 | EXPORT_SYMBOL(ioremap_flags); | 149 | EXPORT_SYMBOL(ioremap_flags); |
149 | 150 | ||
150 | void __iomem * | 151 | void __iomem * |
151 | __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) | 152 | __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) |
152 | { | 153 | { |
154 | return __ioremap_caller(addr, size, flags, __builtin_return_address(0)); | ||
155 | } | ||
156 | |||
157 | void __iomem * | ||
158 | __ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags, | ||
159 | void *caller) | ||
160 | { | ||
153 | unsigned long v, i; | 161 | unsigned long v, i; |
154 | phys_addr_t p; | 162 | phys_addr_t p; |
155 | int err; | 163 | int err; |
156 | 164 | ||
157 | /* Make sure we have the base flags */ | 165 | /* Make sure we have the base flags */ |
158 | if ((flags & _PAGE_PRESENT) == 0) | 166 | if ((flags & _PAGE_PRESENT) == 0) |
159 | flags |= _PAGE_KERNEL; | 167 | flags |= PAGE_KERNEL; |
160 | 168 | ||
161 | /* Non-cacheable page cannot be coherent */ | 169 | /* Non-cacheable page cannot be coherent */ |
162 | if (flags & _PAGE_NO_CACHE) | 170 | if (flags & _PAGE_NO_CACHE) |
@@ -212,7 +220,7 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) | |||
212 | 220 | ||
213 | if (mem_init_done) { | 221 | if (mem_init_done) { |
214 | struct vm_struct *area; | 222 | struct vm_struct *area; |
215 | area = get_vm_area(size, VM_IOREMAP); | 223 | area = get_vm_area_caller(size, VM_IOREMAP, caller); |
216 | if (area == 0) | 224 | if (area == 0) |
217 | return NULL; | 225 | return NULL; |
218 | v = (unsigned long) area->addr; | 226 | v = (unsigned long) area->addr; |
@@ -288,7 +296,7 @@ void __init mapin_ram(void) | |||
288 | p = memstart_addr + s; | 296 | p = memstart_addr + s; |
289 | for (; s < total_lowmem; s += PAGE_SIZE) { | 297 | for (; s < total_lowmem; s += PAGE_SIZE) { |
290 | ktext = ((char *) v >= _stext && (char *) v < etext); | 298 | ktext = ((char *) v >= _stext && (char *) v < etext); |
291 | f = ktext ?_PAGE_RAM_TEXT : _PAGE_RAM; | 299 | f = ktext ? PAGE_KERNEL_TEXT : PAGE_KERNEL; |
292 | map_page(v, p, f); | 300 | map_page(v, p, f); |
293 | #ifdef CONFIG_PPC_STD_MMU_32 | 301 | #ifdef CONFIG_PPC_STD_MMU_32 |
294 | if (ktext) | 302 | if (ktext) |
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c index 365e61ae5dbc..bfa7db6b2fd5 100644 --- a/arch/powerpc/mm/pgtable_64.c +++ b/arch/powerpc/mm/pgtable_64.c | |||
@@ -144,8 +144,8 @@ void __iounmap_at(void *ea, unsigned long size) | |||
144 | unmap_kernel_range((unsigned long)ea, size); | 144 | unmap_kernel_range((unsigned long)ea, size); |
145 | } | 145 | } |
146 | 146 | ||
147 | void __iomem * __ioremap(phys_addr_t addr, unsigned long size, | 147 | void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size, |
148 | unsigned long flags) | 148 | unsigned long flags, void *caller) |
149 | { | 149 | { |
150 | phys_addr_t paligned; | 150 | phys_addr_t paligned; |
151 | void __iomem *ret; | 151 | void __iomem *ret; |
@@ -168,8 +168,9 @@ void __iomem * __ioremap(phys_addr_t addr, unsigned long size, | |||
168 | if (mem_init_done) { | 168 | if (mem_init_done) { |
169 | struct vm_struct *area; | 169 | struct vm_struct *area; |
170 | 170 | ||
171 | area = __get_vm_area(size, VM_IOREMAP, | 171 | area = __get_vm_area_caller(size, VM_IOREMAP, |
172 | ioremap_bot, IOREMAP_END); | 172 | ioremap_bot, IOREMAP_END, |
173 | caller); | ||
173 | if (area == NULL) | 174 | if (area == NULL) |
174 | return NULL; | 175 | return NULL; |
175 | ret = __ioremap_at(paligned, area->addr, size, flags); | 176 | ret = __ioremap_at(paligned, area->addr, size, flags); |
@@ -186,19 +187,27 @@ void __iomem * __ioremap(phys_addr_t addr, unsigned long size, | |||
186 | return ret; | 187 | return ret; |
187 | } | 188 | } |
188 | 189 | ||
190 | void __iomem * __ioremap(phys_addr_t addr, unsigned long size, | ||
191 | unsigned long flags) | ||
192 | { | ||
193 | return __ioremap_caller(addr, size, flags, __builtin_return_address(0)); | ||
194 | } | ||
189 | 195 | ||
190 | void __iomem * ioremap(phys_addr_t addr, unsigned long size) | 196 | void __iomem * ioremap(phys_addr_t addr, unsigned long size) |
191 | { | 197 | { |
192 | unsigned long flags = _PAGE_NO_CACHE | _PAGE_GUARDED; | 198 | unsigned long flags = _PAGE_NO_CACHE | _PAGE_GUARDED; |
199 | void *caller = __builtin_return_address(0); | ||
193 | 200 | ||
194 | if (ppc_md.ioremap) | 201 | if (ppc_md.ioremap) |
195 | return ppc_md.ioremap(addr, size, flags); | 202 | return ppc_md.ioremap(addr, size, flags, caller); |
196 | return __ioremap(addr, size, flags); | 203 | return __ioremap_caller(addr, size, flags, caller); |
197 | } | 204 | } |
198 | 205 | ||
199 | void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size, | 206 | void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size, |
200 | unsigned long flags) | 207 | unsigned long flags) |
201 | { | 208 | { |
209 | void *caller = __builtin_return_address(0); | ||
210 | |||
202 | /* writeable implies dirty for kernel addresses */ | 211 | /* writeable implies dirty for kernel addresses */ |
203 | if (flags & _PAGE_RW) | 212 | if (flags & _PAGE_RW) |
204 | flags |= _PAGE_DIRTY; | 213 | flags |= _PAGE_DIRTY; |
@@ -207,8 +216,8 @@ void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size, | |||
207 | flags &= ~(_PAGE_USER | _PAGE_EXEC); | 216 | flags &= ~(_PAGE_USER | _PAGE_EXEC); |
208 | 217 | ||
209 | if (ppc_md.ioremap) | 218 | if (ppc_md.ioremap) |
210 | return ppc_md.ioremap(addr, size, flags); | 219 | return ppc_md.ioremap(addr, size, flags, caller); |
211 | return __ioremap(addr, size, flags); | 220 | return __ioremap_caller(addr, size, flags, caller); |
212 | } | 221 | } |
213 | 222 | ||
214 | 223 | ||
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c index fe65c405412c..2d2a87e10154 100644 --- a/arch/powerpc/mm/ppc_mmu_32.c +++ b/arch/powerpc/mm/ppc_mmu_32.c | |||
@@ -74,9 +74,6 @@ unsigned long p_mapped_by_bats(phys_addr_t pa) | |||
74 | 74 | ||
75 | unsigned long __init mmu_mapin_ram(void) | 75 | unsigned long __init mmu_mapin_ram(void) |
76 | { | 76 | { |
77 | #ifdef CONFIG_POWER4 | ||
78 | return 0; | ||
79 | #else | ||
80 | unsigned long tot, bl, done; | 77 | unsigned long tot, bl, done; |
81 | unsigned long max_size = (256<<20); | 78 | unsigned long max_size = (256<<20); |
82 | 79 | ||
@@ -95,7 +92,7 @@ unsigned long __init mmu_mapin_ram(void) | |||
95 | break; | 92 | break; |
96 | } | 93 | } |
97 | 94 | ||
98 | setbat(2, PAGE_OFFSET, 0, bl, _PAGE_RAM); | 95 | setbat(2, PAGE_OFFSET, 0, bl, PAGE_KERNEL_X); |
99 | done = (unsigned long)bat_addrs[2].limit - PAGE_OFFSET + 1; | 96 | done = (unsigned long)bat_addrs[2].limit - PAGE_OFFSET + 1; |
100 | if ((done < tot) && !bat_addrs[3].limit) { | 97 | if ((done < tot) && !bat_addrs[3].limit) { |
101 | /* use BAT3 to cover a bit more */ | 98 | /* use BAT3 to cover a bit more */ |
@@ -103,12 +100,11 @@ unsigned long __init mmu_mapin_ram(void) | |||
103 | for (bl = 128<<10; bl < max_size; bl <<= 1) | 100 | for (bl = 128<<10; bl < max_size; bl <<= 1) |
104 | if (bl * 2 > tot) | 101 | if (bl * 2 > tot) |
105 | break; | 102 | break; |
106 | setbat(3, PAGE_OFFSET+done, done, bl, _PAGE_RAM); | 103 | setbat(3, PAGE_OFFSET+done, done, bl, PAGE_KERNEL_X); |
107 | done = (unsigned long)bat_addrs[3].limit - PAGE_OFFSET + 1; | 104 | done = (unsigned long)bat_addrs[3].limit - PAGE_OFFSET + 1; |
108 | } | 105 | } |
109 | 106 | ||
110 | return done; | 107 | return done; |
111 | #endif | ||
112 | } | 108 | } |
113 | 109 | ||
114 | /* | 110 | /* |
@@ -136,9 +132,7 @@ void __init setbat(int index, unsigned long virt, phys_addr_t phys, | |||
136 | wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX; | 132 | wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX; |
137 | bat[1].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */ | 133 | bat[1].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */ |
138 | bat[1].batl = BAT_PHYS_ADDR(phys) | wimgxpp; | 134 | bat[1].batl = BAT_PHYS_ADDR(phys) | wimgxpp; |
139 | #ifndef CONFIG_KGDB /* want user access for breakpoints */ | ||
140 | if (flags & _PAGE_USER) | 135 | if (flags & _PAGE_USER) |
141 | #endif | ||
142 | bat[1].batu |= 1; /* Vp = 1 */ | 136 | bat[1].batu |= 1; /* Vp = 1 */ |
143 | if (flags & _PAGE_GUARDED) { | 137 | if (flags & _PAGE_GUARDED) { |
144 | /* G bit must be zero in IBATs */ | 138 | /* G bit must be zero in IBATs */ |
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c index c931bc7d1079..1be1b5e59796 100644 --- a/arch/powerpc/mm/tlb_hash64.c +++ b/arch/powerpc/mm/tlb_hash64.c | |||
@@ -139,12 +139,12 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr, | |||
139 | */ | 139 | */ |
140 | void __flush_tlb_pending(struct ppc64_tlb_batch *batch) | 140 | void __flush_tlb_pending(struct ppc64_tlb_batch *batch) |
141 | { | 141 | { |
142 | cpumask_t tmp; | 142 | const struct cpumask *tmp; |
143 | int i, local = 0; | 143 | int i, local = 0; |
144 | 144 | ||
145 | i = batch->index; | 145 | i = batch->index; |
146 | tmp = cpumask_of_cpu(smp_processor_id()); | 146 | tmp = cpumask_of(smp_processor_id()); |
147 | if (cpus_equal(batch->mm->cpu_vm_mask, tmp)) | 147 | if (cpumask_equal(mm_cpumask(batch->mm), tmp)) |
148 | local = 1; | 148 | local = 1; |
149 | if (i == 1) | 149 | if (i == 1) |
150 | flush_hash_page(batch->vaddr[0], batch->pte[0], | 150 | flush_hash_page(batch->vaddr[0], batch->pte[0], |
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c index 39ac22b13c73..7af72970faed 100644 --- a/arch/powerpc/mm/tlb_nohash.c +++ b/arch/powerpc/mm/tlb_nohash.c | |||
@@ -132,11 +132,11 @@ void flush_tlb_mm(struct mm_struct *mm) | |||
132 | pid = mm->context.id; | 132 | pid = mm->context.id; |
133 | if (unlikely(pid == MMU_NO_CONTEXT)) | 133 | if (unlikely(pid == MMU_NO_CONTEXT)) |
134 | goto no_context; | 134 | goto no_context; |
135 | cpu_mask = mm->cpu_vm_mask; | 135 | if (!cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) { |
136 | cpu_clear(smp_processor_id(), cpu_mask); | ||
137 | if (!cpus_empty(cpu_mask)) { | ||
138 | struct tlb_flush_param p = { .pid = pid }; | 136 | struct tlb_flush_param p = { .pid = pid }; |
139 | smp_call_function_mask(cpu_mask, do_flush_tlb_mm_ipi, &p, 1); | 137 | /* Ignores smp_processor_id() even if set. */ |
138 | smp_call_function_many(mm_cpumask(mm), | ||
139 | do_flush_tlb_mm_ipi, &p, 1); | ||
140 | } | 140 | } |
141 | _tlbil_pid(pid); | 141 | _tlbil_pid(pid); |
142 | no_context: | 142 | no_context: |
@@ -146,16 +146,15 @@ EXPORT_SYMBOL(flush_tlb_mm); | |||
146 | 146 | ||
147 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr) | 147 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr) |
148 | { | 148 | { |
149 | cpumask_t cpu_mask; | 149 | struct cpumask *cpu_mask; |
150 | unsigned int pid; | 150 | unsigned int pid; |
151 | 151 | ||
152 | preempt_disable(); | 152 | preempt_disable(); |
153 | pid = vma ? vma->vm_mm->context.id : 0; | 153 | pid = vma ? vma->vm_mm->context.id : 0; |
154 | if (unlikely(pid == MMU_NO_CONTEXT)) | 154 | if (unlikely(pid == MMU_NO_CONTEXT)) |
155 | goto bail; | 155 | goto bail; |
156 | cpu_mask = vma->vm_mm->cpu_vm_mask; | 156 | cpu_mask = mm_cpumask(vma->vm_mm); |
157 | cpu_clear(smp_processor_id(), cpu_mask); | 157 | if (!cpumask_equal(cpu_mask, cpumask_of(smp_processor_id()))) { |
158 | if (!cpus_empty(cpu_mask)) { | ||
159 | /* If broadcast tlbivax is supported, use it */ | 158 | /* If broadcast tlbivax is supported, use it */ |
160 | if (mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) { | 159 | if (mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) { |
161 | int lock = mmu_has_feature(MMU_FTR_LOCK_BCAST_INVAL); | 160 | int lock = mmu_has_feature(MMU_FTR_LOCK_BCAST_INVAL); |
@@ -167,7 +166,8 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr) | |||
167 | goto bail; | 166 | goto bail; |
168 | } else { | 167 | } else { |
169 | struct tlb_flush_param p = { .pid = pid, .addr = vmaddr }; | 168 | struct tlb_flush_param p = { .pid = pid, .addr = vmaddr }; |
170 | smp_call_function_mask(cpu_mask, | 169 | /* Ignores smp_processor_id() even if set in cpu_mask */ |
170 | smp_call_function_many(cpu_mask, | ||
171 | do_flush_tlb_page_ipi, &p, 1); | 171 | do_flush_tlb_page_ipi, &p, 1); |
172 | } | 172 | } |
173 | } | 173 | } |
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S index f900a39e6ec4..788b87c36f77 100644 --- a/arch/powerpc/mm/tlb_nohash_low.S +++ b/arch/powerpc/mm/tlb_nohash_low.S | |||
@@ -118,25 +118,50 @@ _GLOBAL(_tlbil_pid) | |||
118 | 118 | ||
119 | #elif defined(CONFIG_FSL_BOOKE) | 119 | #elif defined(CONFIG_FSL_BOOKE) |
120 | /* | 120 | /* |
121 | * FSL BookE implementations. Currently _pid and _all are the | 121 | * FSL BookE implementations. |
122 | * same. This will change when tlbilx is actually supported and | 122 | * |
123 | * performs invalidate-by-PID. This change will be driven by | 123 | * Since feature sections are using _SECTION_ELSE we need |
124 | * mmu_features conditional | 124 | * to have the larger code path before the _SECTION_ELSE |
125 | */ | 125 | */ |
126 | 126 | ||
127 | #define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \ | ||
128 | MMUCSR0_TLB2FI | MMUCSR0_TLB3FI) | ||
127 | /* | 129 | /* |
128 | * Flush MMU TLB on the local processor | 130 | * Flush MMU TLB on the local processor |
129 | */ | 131 | */ |
130 | _GLOBAL(_tlbil_pid) | ||
131 | _GLOBAL(_tlbil_all) | 132 | _GLOBAL(_tlbil_all) |
132 | #define MMUCSR0_TLBFI (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \ | 133 | BEGIN_MMU_FTR_SECTION |
133 | MMUCSR0_TLB2FI | MMUCSR0_TLB3FI) | 134 | li r3,(MMUCSR0_TLBFI)@l |
135 | mtspr SPRN_MMUCSR0, r3 | ||
136 | 1: | ||
137 | mfspr r3,SPRN_MMUCSR0 | ||
138 | andi. r3,r3,MMUCSR0_TLBFI@l | ||
139 | bne 1b | ||
140 | MMU_FTR_SECTION_ELSE | ||
141 | PPC_TLBILX_ALL(0,0) | ||
142 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) | ||
143 | msync | ||
144 | isync | ||
145 | blr | ||
146 | |||
147 | _GLOBAL(_tlbil_pid) | ||
148 | BEGIN_MMU_FTR_SECTION | ||
149 | slwi r3,r3,16 | ||
150 | mfmsr r10 | ||
151 | wrteei 0 | ||
152 | mfspr r4,SPRN_MAS6 /* save MAS6 */ | ||
153 | mtspr SPRN_MAS6,r3 | ||
154 | PPC_TLBILX_PID(0,0) | ||
155 | mtspr SPRN_MAS6,r4 /* restore MAS6 */ | ||
156 | wrtee r10 | ||
157 | MMU_FTR_SECTION_ELSE | ||
134 | li r3,(MMUCSR0_TLBFI)@l | 158 | li r3,(MMUCSR0_TLBFI)@l |
135 | mtspr SPRN_MMUCSR0, r3 | 159 | mtspr SPRN_MMUCSR0, r3 |
136 | 1: | 160 | 1: |
137 | mfspr r3,SPRN_MMUCSR0 | 161 | mfspr r3,SPRN_MMUCSR0 |
138 | andi. r3,r3,MMUCSR0_TLBFI@l | 162 | andi. r3,r3,MMUCSR0_TLBFI@l |
139 | bne 1b | 163 | bne 1b |
164 | ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBILX) | ||
140 | msync | 165 | msync |
141 | isync | 166 | isync |
142 | blr | 167 | blr |
@@ -149,7 +174,9 @@ _GLOBAL(_tlbil_va) | |||
149 | mfmsr r10 | 174 | mfmsr r10 |
150 | wrteei 0 | 175 | wrteei 0 |
151 | slwi r4,r4,16 | 176 | slwi r4,r4,16 |
177 | ori r4,r4,(MAS6_ISIZE(BOOK3E_PAGESZ_4K))@l | ||
152 | mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ | 178 | mtspr SPRN_MAS6,r4 /* assume AS=0 for now */ |
179 | BEGIN_MMU_FTR_SECTION | ||
153 | tlbsx 0,r3 | 180 | tlbsx 0,r3 |
154 | mfspr r4,SPRN_MAS1 /* check valid */ | 181 | mfspr r4,SPRN_MAS1 /* check valid */ |
155 | andis. r3,r4,MAS1_VALID@h | 182 | andis. r3,r4,MAS1_VALID@h |
@@ -157,6 +184,9 @@ _GLOBAL(_tlbil_va) | |||
157 | rlwinm r4,r4,0,1,31 | 184 | rlwinm r4,r4,0,1,31 |
158 | mtspr SPRN_MAS1,r4 | 185 | mtspr SPRN_MAS1,r4 |
159 | tlbwe | 186 | tlbwe |
187 | MMU_FTR_SECTION_ELSE | ||
188 | PPC_TLBILX_VA(0,r3) | ||
189 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) | ||
160 | msync | 190 | msync |
161 | isync | 191 | isync |
162 | 1: wrtee r10 | 192 | 1: wrtee r10 |
diff --git a/arch/powerpc/oprofile/op_model_7450.c b/arch/powerpc/oprofile/op_model_7450.c index cc599eb8768b..f8d36f940e88 100644 --- a/arch/powerpc/oprofile/op_model_7450.c +++ b/arch/powerpc/oprofile/op_model_7450.c | |||
@@ -29,7 +29,7 @@ | |||
29 | static unsigned long reset_value[OP_MAX_COUNTER]; | 29 | static unsigned long reset_value[OP_MAX_COUNTER]; |
30 | 30 | ||
31 | static int oprofile_running; | 31 | static int oprofile_running; |
32 | static u32 mmcr0_val, mmcr1_val, mmcr2_val; | 32 | static u32 mmcr0_val, mmcr1_val, mmcr2_val, num_pmcs; |
33 | 33 | ||
34 | #define MMCR0_PMC1_SHIFT 6 | 34 | #define MMCR0_PMC1_SHIFT 6 |
35 | #define MMCR0_PMC2_SHIFT 0 | 35 | #define MMCR0_PMC2_SHIFT 0 |
@@ -88,13 +88,12 @@ static int fsl7450_cpu_setup(struct op_counter_config *ctr) | |||
88 | 88 | ||
89 | mtspr(SPRN_MMCR0, mmcr0_val); | 89 | mtspr(SPRN_MMCR0, mmcr0_val); |
90 | mtspr(SPRN_MMCR1, mmcr1_val); | 90 | mtspr(SPRN_MMCR1, mmcr1_val); |
91 | mtspr(SPRN_MMCR2, mmcr2_val); | 91 | if (num_pmcs > 4) |
92 | mtspr(SPRN_MMCR2, mmcr2_val); | ||
92 | 93 | ||
93 | return 0; | 94 | return 0; |
94 | } | 95 | } |
95 | 96 | ||
96 | #define NUM_CTRS 6 | ||
97 | |||
98 | /* Configures the global settings for the countes on all CPUs. */ | 97 | /* Configures the global settings for the countes on all CPUs. */ |
99 | static int fsl7450_reg_setup(struct op_counter_config *ctr, | 98 | static int fsl7450_reg_setup(struct op_counter_config *ctr, |
100 | struct op_system_config *sys, | 99 | struct op_system_config *sys, |
@@ -102,12 +101,13 @@ static int fsl7450_reg_setup(struct op_counter_config *ctr, | |||
102 | { | 101 | { |
103 | int i; | 102 | int i; |
104 | 103 | ||
104 | num_pmcs = num_ctrs; | ||
105 | /* Our counters count up, and "count" refers to | 105 | /* Our counters count up, and "count" refers to |
106 | * how much before the next interrupt, and we interrupt | 106 | * how much before the next interrupt, and we interrupt |
107 | * on overflow. So we calculate the starting value | 107 | * on overflow. So we calculate the starting value |
108 | * which will give us "count" until overflow. | 108 | * which will give us "count" until overflow. |
109 | * Then we set the events on the enabled counters */ | 109 | * Then we set the events on the enabled counters */ |
110 | for (i = 0; i < NUM_CTRS; ++i) | 110 | for (i = 0; i < num_ctrs; ++i) |
111 | reset_value[i] = 0x80000000UL - ctr[i].count; | 111 | reset_value[i] = 0x80000000UL - ctr[i].count; |
112 | 112 | ||
113 | /* Set events for Counters 1 & 2 */ | 113 | /* Set events for Counters 1 & 2 */ |
@@ -123,9 +123,10 @@ static int fsl7450_reg_setup(struct op_counter_config *ctr, | |||
123 | 123 | ||
124 | /* Set events for Counters 3-6 */ | 124 | /* Set events for Counters 3-6 */ |
125 | mmcr1_val = mmcr1_event3(ctr[2].event) | 125 | mmcr1_val = mmcr1_event3(ctr[2].event) |
126 | | mmcr1_event4(ctr[3].event) | 126 | | mmcr1_event4(ctr[3].event); |
127 | | mmcr1_event5(ctr[4].event) | 127 | if (num_ctrs > 4) |
128 | | mmcr1_event6(ctr[5].event); | 128 | mmcr1_val |= mmcr1_event5(ctr[4].event) |
129 | | mmcr1_event6(ctr[5].event); | ||
129 | 130 | ||
130 | mmcr2_val = 0; | 131 | mmcr2_val = 0; |
131 | 132 | ||
@@ -139,7 +140,7 @@ static int fsl7450_start(struct op_counter_config *ctr) | |||
139 | 140 | ||
140 | mtmsr(mfmsr() | MSR_PMM); | 141 | mtmsr(mfmsr() | MSR_PMM); |
141 | 142 | ||
142 | for (i = 0; i < NUM_CTRS; ++i) { | 143 | for (i = 0; i < num_pmcs; ++i) { |
143 | if (ctr[i].enabled) | 144 | if (ctr[i].enabled) |
144 | classic_ctr_write(i, reset_value[i]); | 145 | classic_ctr_write(i, reset_value[i]); |
145 | else | 146 | else |
@@ -184,7 +185,7 @@ static void fsl7450_handle_interrupt(struct pt_regs *regs, | |||
184 | pc = mfspr(SPRN_SIAR); | 185 | pc = mfspr(SPRN_SIAR); |
185 | is_kernel = is_kernel_addr(pc); | 186 | is_kernel = is_kernel_addr(pc); |
186 | 187 | ||
187 | for (i = 0; i < NUM_CTRS; ++i) { | 188 | for (i = 0; i < num_pmcs; ++i) { |
188 | val = classic_ctr_read(i); | 189 | val = classic_ctr_read(i); |
189 | if (val < 0) { | 190 | if (val < 0) { |
190 | if (oprofile_running && ctr[i].enabled) { | 191 | if (oprofile_running && ctr[i].enabled) { |
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index 3496bc05058e..bf5c7ff2e6e5 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig | |||
@@ -118,6 +118,17 @@ config GLACIER | |||
118 | help | 118 | help |
119 | This option enables support for the AMCC PPC460GT evaluation board. | 119 | This option enables support for the AMCC PPC460GT evaluation board. |
120 | 120 | ||
121 | config REDWOOD | ||
122 | bool "Redwood" | ||
123 | depends on 44x | ||
124 | default n | ||
125 | select PPC44x_SIMPLE | ||
126 | select 460SX | ||
127 | select PCI | ||
128 | select PPC4xx_PCI_EXPRESS | ||
129 | help | ||
130 | This option enables support for the AMCC PPC460SX Redwood board. | ||
131 | |||
121 | config YOSEMITE | 132 | config YOSEMITE |
122 | bool "Yosemite" | 133 | bool "Yosemite" |
123 | depends on 44x | 134 | depends on 44x |
@@ -220,6 +231,14 @@ config 460EX | |||
220 | select IBM_NEW_EMAC_EMAC4 | 231 | select IBM_NEW_EMAC_EMAC4 |
221 | select IBM_NEW_EMAC_TAH | 232 | select IBM_NEW_EMAC_TAH |
222 | 233 | ||
234 | config 460SX | ||
235 | bool | ||
236 | select PPC_FPU | ||
237 | select IBM_NEW_EMAC_EMAC4 | ||
238 | select IBM_NEW_EMAC_RGMII | ||
239 | select IBM_NEW_EMAC_ZMII | ||
240 | select IBM_NEW_EMAC_TAH | ||
241 | |||
223 | # 44x errata/workaround config symbols, selected by the CPU models above | 242 | # 44x errata/workaround config symbols, selected by the CPU models above |
224 | config IBM440EP_ERR42 | 243 | config IBM440EP_ERR42 |
225 | bool | 244 | bool |
diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c index 76fdc51dac8b..5bcd441885e8 100644 --- a/arch/powerpc/platforms/44x/ppc44x_simple.c +++ b/arch/powerpc/platforms/44x/ppc44x_simple.c | |||
@@ -57,6 +57,7 @@ static char *board[] __initdata = { | |||
57 | "ibm,ebony", | 57 | "ibm,ebony", |
58 | "amcc,katmai", | 58 | "amcc,katmai", |
59 | "amcc,rainier", | 59 | "amcc,rainier", |
60 | "amcc,redwood", | ||
60 | "amcc,sequoia", | 61 | "amcc,sequoia", |
61 | "amcc,taishan", | 62 | "amcc,taishan", |
62 | "amcc,yosemite" | 63 | "amcc,yosemite" |
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig index 326852c78b8f..4dac9b0525a4 100644 --- a/arch/powerpc/platforms/512x/Kconfig +++ b/arch/powerpc/platforms/512x/Kconfig | |||
@@ -12,7 +12,7 @@ config PPC_MPC5121 | |||
12 | 12 | ||
13 | config MPC5121_ADS | 13 | config MPC5121_ADS |
14 | bool "Freescale MPC5121E ADS" | 14 | bool "Freescale MPC5121E ADS" |
15 | depends on PPC_MULTIPLATFORM && PPC32 | 15 | depends on 6xx |
16 | select DEFAULT_UIMAGE | 16 | select DEFAULT_UIMAGE |
17 | select PPC_MPC5121 | 17 | select PPC_MPC5121 |
18 | select MPC5121_ADS_CPLD | 18 | select MPC5121_ADS_CPLD |
@@ -21,7 +21,7 @@ config MPC5121_ADS | |||
21 | 21 | ||
22 | config MPC5121_GENERIC | 22 | config MPC5121_GENERIC |
23 | bool "Generic support for simple MPC5121 based boards" | 23 | bool "Generic support for simple MPC5121 based boards" |
24 | depends on PPC_MULTIPLATFORM && PPC32 | 24 | depends on 6xx |
25 | select DEFAULT_UIMAGE | 25 | select DEFAULT_UIMAGE |
26 | select PPC_MPC5121 | 26 | select PPC_MPC5121 |
27 | help | 27 | help |
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig index 696a5ee4962d..8b8e9560a315 100644 --- a/arch/powerpc/platforms/52xx/Kconfig +++ b/arch/powerpc/platforms/52xx/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config PPC_MPC52xx | 1 | config PPC_MPC52xx |
2 | bool "52xx-based boards" | 2 | bool "52xx-based boards" |
3 | depends on PPC_MULTIPLATFORM && PPC32 | 3 | depends on 6xx |
4 | select PPC_CLOCK | 4 | select PPC_CLOCK |
5 | select PPC_PCI_CHOICE | 5 | select PPC_PCI_CHOICE |
6 | 6 | ||
@@ -21,7 +21,13 @@ config PPC_MPC5200_SIMPLE | |||
21 | and if there is a PCI bus node defined in the device tree. | 21 | and if there is a PCI bus node defined in the device tree. |
22 | 22 | ||
23 | Boards that are compatible with this generic platform support | 23 | Boards that are compatible with this generic platform support |
24 | are: 'tqc,tqm5200', 'promess,motionpro', 'schindler,cm5200'. | 24 | are: |
25 | intercontrol,digsy-mtc | ||
26 | phytec,pcm030 | ||
27 | phytec,pcm032 | ||
28 | promess,motionpro | ||
29 | schindler,cm5200 | ||
30 | tqc,tqm5200 | ||
25 | 31 | ||
26 | config PPC_EFIKA | 32 | config PPC_EFIKA |
27 | bool "bPlan Efika 5k2. MPC5200B based computer" | 33 | bool "bPlan Efika 5k2. MPC5200B based computer" |
@@ -35,6 +41,11 @@ config PPC_LITE5200 | |||
35 | depends on PPC_MPC52xx | 41 | depends on PPC_MPC52xx |
36 | select DEFAULT_UIMAGE | 42 | select DEFAULT_UIMAGE |
37 | 43 | ||
44 | config PPC_MEDIA5200 | ||
45 | bool "Freescale Media5200 Eval Board" | ||
46 | depends on PPC_MPC52xx | ||
47 | select DEFAULT_UIMAGE | ||
48 | |||
38 | config PPC_MPC5200_BUGFIX | 49 | config PPC_MPC5200_BUGFIX |
39 | bool "MPC5200 (L25R) bugfix support" | 50 | bool "MPC5200 (L25R) bugfix support" |
40 | depends on PPC_MPC52xx | 51 | depends on PPC_MPC52xx |
diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile index b8a52062738a..bfd4f52cf3dd 100644 --- a/arch/powerpc/platforms/52xx/Makefile +++ b/arch/powerpc/platforms/52xx/Makefile | |||
@@ -1,12 +1,13 @@ | |||
1 | # | 1 | # |
2 | # Makefile for 52xx based boards | 2 | # Makefile for 52xx based boards |
3 | # | 3 | # |
4 | obj-y += mpc52xx_pic.o mpc52xx_common.o | 4 | obj-y += mpc52xx_pic.o mpc52xx_common.o mpc52xx_gpt.o |
5 | obj-$(CONFIG_PCI) += mpc52xx_pci.o | 5 | obj-$(CONFIG_PCI) += mpc52xx_pci.o |
6 | 6 | ||
7 | obj-$(CONFIG_PPC_MPC5200_SIMPLE) += mpc5200_simple.o | 7 | obj-$(CONFIG_PPC_MPC5200_SIMPLE) += mpc5200_simple.o |
8 | obj-$(CONFIG_PPC_EFIKA) += efika.o | 8 | obj-$(CONFIG_PPC_EFIKA) += efika.o |
9 | obj-$(CONFIG_PPC_LITE5200) += lite5200.o | 9 | obj-$(CONFIG_PPC_LITE5200) += lite5200.o |
10 | obj-$(CONFIG_PPC_MEDIA5200) += media5200.o | ||
10 | 11 | ||
11 | obj-$(CONFIG_PM) += mpc52xx_sleep.o mpc52xx_pm.o | 12 | obj-$(CONFIG_PM) += mpc52xx_sleep.o mpc52xx_pm.o |
12 | ifeq ($(CONFIG_PPC_LITE5200),y) | 13 | ifeq ($(CONFIG_PPC_LITE5200),y) |
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c new file mode 100644 index 000000000000..68e4f1696d14 --- /dev/null +++ b/arch/powerpc/platforms/52xx/media5200.c | |||
@@ -0,0 +1,273 @@ | |||
1 | /* | ||
2 | * Support for 'media5200-platform' compatible boards. | ||
3 | * | ||
4 | * Copyright (C) 2008 Secret Lab Technologies Ltd. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | * | ||
11 | * Description: | ||
12 | * This code implements support for the Freescape Media5200 platform | ||
13 | * (built around the MPC5200 SoC). | ||
14 | * | ||
15 | * Notable characteristic of the Media5200 is the presence of an FPGA | ||
16 | * that has all external IRQ lines routed through it. This file implements | ||
17 | * a cascaded interrupt controller driver which attaches itself to the | ||
18 | * Virtual IRQ subsystem after the primary mpc5200 interrupt controller | ||
19 | * is initialized. | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | #undef DEBUG | ||
24 | |||
25 | #include <linux/irq.h> | ||
26 | #include <linux/interrupt.h> | ||
27 | #include <linux/io.h> | ||
28 | #include <asm/time.h> | ||
29 | #include <asm/prom.h> | ||
30 | #include <asm/machdep.h> | ||
31 | #include <asm/mpc52xx.h> | ||
32 | |||
33 | static struct of_device_id mpc5200_gpio_ids[] __initdata = { | ||
34 | { .compatible = "fsl,mpc5200-gpio", }, | ||
35 | { .compatible = "mpc5200-gpio", }, | ||
36 | {} | ||
37 | }; | ||
38 | |||
39 | /* FPGA register set */ | ||
40 | #define MEDIA5200_IRQ_ENABLE (0x40c) | ||
41 | #define MEDIA5200_IRQ_STATUS (0x410) | ||
42 | #define MEDIA5200_NUM_IRQS (6) | ||
43 | #define MEDIA5200_IRQ_SHIFT (32 - MEDIA5200_NUM_IRQS) | ||
44 | |||
45 | struct media5200_irq { | ||
46 | void __iomem *regs; | ||
47 | spinlock_t lock; | ||
48 | struct irq_host *irqhost; | ||
49 | }; | ||
50 | struct media5200_irq media5200_irq; | ||
51 | |||
52 | static void media5200_irq_unmask(unsigned int virq) | ||
53 | { | ||
54 | unsigned long flags; | ||
55 | u32 val; | ||
56 | |||
57 | spin_lock_irqsave(&media5200_irq.lock, flags); | ||
58 | val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE); | ||
59 | val |= 1 << (MEDIA5200_IRQ_SHIFT + irq_map[virq].hwirq); | ||
60 | out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val); | ||
61 | spin_unlock_irqrestore(&media5200_irq.lock, flags); | ||
62 | } | ||
63 | |||
64 | static void media5200_irq_mask(unsigned int virq) | ||
65 | { | ||
66 | unsigned long flags; | ||
67 | u32 val; | ||
68 | |||
69 | spin_lock_irqsave(&media5200_irq.lock, flags); | ||
70 | val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE); | ||
71 | val &= ~(1 << (MEDIA5200_IRQ_SHIFT + irq_map[virq].hwirq)); | ||
72 | out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val); | ||
73 | spin_unlock_irqrestore(&media5200_irq.lock, flags); | ||
74 | } | ||
75 | |||
76 | static struct irq_chip media5200_irq_chip = { | ||
77 | .typename = "Media5200 FPGA", | ||
78 | .unmask = media5200_irq_unmask, | ||
79 | .mask = media5200_irq_mask, | ||
80 | .mask_ack = media5200_irq_mask, | ||
81 | }; | ||
82 | |||
83 | void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc) | ||
84 | { | ||
85 | int sub_virq, val; | ||
86 | u32 status, enable; | ||
87 | |||
88 | /* Mask off the cascaded IRQ */ | ||
89 | spin_lock(&desc->lock); | ||
90 | desc->chip->mask(virq); | ||
91 | spin_unlock(&desc->lock); | ||
92 | |||
93 | /* Ask the FPGA for IRQ status. If 'val' is 0, then no irqs | ||
94 | * are pending. 'ffs()' is 1 based */ | ||
95 | status = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE); | ||
96 | enable = in_be32(media5200_irq.regs + MEDIA5200_IRQ_STATUS); | ||
97 | val = ffs((status & enable) >> MEDIA5200_IRQ_SHIFT); | ||
98 | if (val) { | ||
99 | sub_virq = irq_linear_revmap(media5200_irq.irqhost, val - 1); | ||
100 | /* pr_debug("%s: virq=%i s=%.8x e=%.8x hwirq=%i subvirq=%i\n", | ||
101 | * __func__, virq, status, enable, val - 1, sub_virq); | ||
102 | */ | ||
103 | generic_handle_irq(sub_virq); | ||
104 | } | ||
105 | |||
106 | /* Processing done; can reenable the cascade now */ | ||
107 | spin_lock(&desc->lock); | ||
108 | desc->chip->ack(virq); | ||
109 | if (!(desc->status & IRQ_DISABLED)) | ||
110 | desc->chip->unmask(virq); | ||
111 | spin_unlock(&desc->lock); | ||
112 | } | ||
113 | |||
114 | static int media5200_irq_map(struct irq_host *h, unsigned int virq, | ||
115 | irq_hw_number_t hw) | ||
116 | { | ||
117 | struct irq_desc *desc = get_irq_desc(virq); | ||
118 | |||
119 | pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw); | ||
120 | set_irq_chip_data(virq, &media5200_irq); | ||
121 | set_irq_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq); | ||
122 | set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); | ||
123 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); | ||
124 | desc->status |= IRQ_TYPE_LEVEL_LOW | IRQ_LEVEL; | ||
125 | |||
126 | return 0; | ||
127 | } | ||
128 | |||
129 | static int media5200_irq_xlate(struct irq_host *h, struct device_node *ct, | ||
130 | u32 *intspec, unsigned int intsize, | ||
131 | irq_hw_number_t *out_hwirq, | ||
132 | unsigned int *out_flags) | ||
133 | { | ||
134 | if (intsize != 2) | ||
135 | return -1; | ||
136 | |||
137 | pr_debug("%s: bank=%i, number=%i\n", __func__, intspec[0], intspec[1]); | ||
138 | *out_hwirq = intspec[1]; | ||
139 | *out_flags = IRQ_TYPE_NONE; | ||
140 | return 0; | ||
141 | } | ||
142 | |||
143 | static struct irq_host_ops media5200_irq_ops = { | ||
144 | .map = media5200_irq_map, | ||
145 | .xlate = media5200_irq_xlate, | ||
146 | }; | ||
147 | |||
148 | /* | ||
149 | * Setup Media5200 IRQ mapping | ||
150 | */ | ||
151 | static void __init media5200_init_irq(void) | ||
152 | { | ||
153 | struct device_node *fpga_np; | ||
154 | int cascade_virq; | ||
155 | |||
156 | /* First setup the regular MPC5200 interrupt controller */ | ||
157 | mpc52xx_init_irq(); | ||
158 | |||
159 | /* Now find the FPGA IRQ */ | ||
160 | fpga_np = of_find_compatible_node(NULL, NULL, "fsl,media5200-fpga"); | ||
161 | if (!fpga_np) | ||
162 | goto out; | ||
163 | pr_debug("%s: found fpga node: %s\n", __func__, fpga_np->full_name); | ||
164 | |||
165 | media5200_irq.regs = of_iomap(fpga_np, 0); | ||
166 | if (!media5200_irq.regs) | ||
167 | goto out; | ||
168 | pr_debug("%s: mapped to %p\n", __func__, media5200_irq.regs); | ||
169 | |||
170 | cascade_virq = irq_of_parse_and_map(fpga_np, 0); | ||
171 | if (!cascade_virq) | ||
172 | goto out; | ||
173 | pr_debug("%s: cascaded on virq=%i\n", __func__, cascade_virq); | ||
174 | |||
175 | /* Disable all FPGA IRQs */ | ||
176 | out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, 0); | ||
177 | |||
178 | spin_lock_init(&media5200_irq.lock); | ||
179 | |||
180 | media5200_irq.irqhost = irq_alloc_host(fpga_np, IRQ_HOST_MAP_LINEAR, | ||
181 | MEDIA5200_NUM_IRQS, | ||
182 | &media5200_irq_ops, -1); | ||
183 | if (!media5200_irq.irqhost) | ||
184 | goto out; | ||
185 | pr_debug("%s: allocated irqhost\n", __func__); | ||
186 | |||
187 | media5200_irq.irqhost->host_data = &media5200_irq; | ||
188 | |||
189 | set_irq_data(cascade_virq, &media5200_irq); | ||
190 | set_irq_chained_handler(cascade_virq, media5200_irq_cascade); | ||
191 | |||
192 | return; | ||
193 | |||
194 | out: | ||
195 | pr_err("Could not find Media5200 FPGA; PCI interrupts will not work\n"); | ||
196 | } | ||
197 | |||
198 | /* | ||
199 | * Setup the architecture | ||
200 | */ | ||
201 | static void __init media5200_setup_arch(void) | ||
202 | { | ||
203 | |||
204 | struct device_node *np; | ||
205 | struct mpc52xx_gpio __iomem *gpio; | ||
206 | u32 port_config; | ||
207 | |||
208 | if (ppc_md.progress) | ||
209 | ppc_md.progress("media5200_setup_arch()", 0); | ||
210 | |||
211 | /* Map important registers from the internal memory map */ | ||
212 | mpc52xx_map_common_devices(); | ||
213 | |||
214 | /* Some mpc5200 & mpc5200b related configuration */ | ||
215 | mpc5200_setup_xlb_arbiter(); | ||
216 | |||
217 | mpc52xx_setup_pci(); | ||
218 | |||
219 | np = of_find_matching_node(NULL, mpc5200_gpio_ids); | ||
220 | gpio = of_iomap(np, 0); | ||
221 | of_node_put(np); | ||
222 | if (!gpio) { | ||
223 | printk(KERN_ERR "%s() failed. expect abnormal behavior\n", | ||
224 | __func__); | ||
225 | return; | ||
226 | } | ||
227 | |||
228 | /* Set port config */ | ||
229 | port_config = in_be32(&gpio->port_config); | ||
230 | |||
231 | port_config &= ~0x03000000; /* ATA CS is on csb_4/5 */ | ||
232 | port_config |= 0x01000000; | ||
233 | |||
234 | out_be32(&gpio->port_config, port_config); | ||
235 | |||
236 | /* Unmap zone */ | ||
237 | iounmap(gpio); | ||
238 | |||
239 | } | ||
240 | |||
241 | /* list of the supported boards */ | ||
242 | static char *board[] __initdata = { | ||
243 | "fsl,media5200", | ||
244 | NULL | ||
245 | }; | ||
246 | |||
247 | /* | ||
248 | * Called very early, MMU is off, device-tree isn't unflattened | ||
249 | */ | ||
250 | static int __init media5200_probe(void) | ||
251 | { | ||
252 | unsigned long node = of_get_flat_dt_root(); | ||
253 | int i = 0; | ||
254 | |||
255 | while (board[i]) { | ||
256 | if (of_flat_dt_is_compatible(node, board[i])) | ||
257 | break; | ||
258 | i++; | ||
259 | } | ||
260 | |||
261 | return (board[i] != NULL); | ||
262 | } | ||
263 | |||
264 | define_machine(media5200_platform) { | ||
265 | .name = "media5200-platform", | ||
266 | .probe = media5200_probe, | ||
267 | .setup_arch = media5200_setup_arch, | ||
268 | .init = mpc52xx_declare_of_platform_devices, | ||
269 | .init_IRQ = media5200_init_irq, | ||
270 | .get_irq = mpc52xx_get_irq, | ||
271 | .restart = mpc52xx_restart, | ||
272 | .calibrate_decr = generic_calibrate_decr, | ||
273 | }; | ||
diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c index a3bda0b9f1ff..c31e5b534f0a 100644 --- a/arch/powerpc/platforms/52xx/mpc5200_simple.c +++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c | |||
@@ -50,8 +50,10 @@ static void __init mpc5200_simple_setup_arch(void) | |||
50 | 50 | ||
51 | /* list of the supported boards */ | 51 | /* list of the supported boards */ |
52 | static char *board[] __initdata = { | 52 | static char *board[] __initdata = { |
53 | "promess,motionpro", | 53 | "intercontrol,digsy-mtc", |
54 | "phytec,pcm030", | 54 | "phytec,pcm030", |
55 | "phytec,pcm032", | ||
56 | "promess,motionpro", | ||
55 | "schindler,cm5200", | 57 | "schindler,cm5200", |
56 | "tqc,tqm5200", | 58 | "tqc,tqm5200", |
57 | NULL | 59 | NULL |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c index 98367a0255f3..8e3dd5a0f228 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_common.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c | |||
@@ -28,9 +28,10 @@ static struct of_device_id mpc52xx_xlb_ids[] __initdata = { | |||
28 | static struct of_device_id mpc52xx_bus_ids[] __initdata = { | 28 | static struct of_device_id mpc52xx_bus_ids[] __initdata = { |
29 | { .compatible = "fsl,mpc5200-immr", }, | 29 | { .compatible = "fsl,mpc5200-immr", }, |
30 | { .compatible = "fsl,mpc5200b-immr", }, | 30 | { .compatible = "fsl,mpc5200b-immr", }, |
31 | { .compatible = "fsl,lpb", }, | 31 | { .compatible = "simple-bus", }, |
32 | 32 | ||
33 | /* depreciated matches; shouldn't be used in new device trees */ | 33 | /* depreciated matches; shouldn't be used in new device trees */ |
34 | { .compatible = "fsl,lpb", }, | ||
34 | { .type = "builtin", .compatible = "mpc5200", }, /* efika */ | 35 | { .type = "builtin", .compatible = "mpc5200", }, /* efika */ |
35 | { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */ | 36 | { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */ |
36 | {} | 37 | {} |
@@ -205,6 +206,43 @@ int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv) | |||
205 | EXPORT_SYMBOL(mpc52xx_set_psc_clkdiv); | 206 | EXPORT_SYMBOL(mpc52xx_set_psc_clkdiv); |
206 | 207 | ||
207 | /** | 208 | /** |
209 | * mpc52xx_get_xtal_freq - Get SYS_XTAL_IN frequency for a device | ||
210 | * | ||
211 | * @node: device node | ||
212 | * | ||
213 | * Returns the frequency of the external oscillator clock connected | ||
214 | * to the SYS_XTAL_IN pin, or 0 if it cannot be determined. | ||
215 | */ | ||
216 | unsigned int mpc52xx_get_xtal_freq(struct device_node *node) | ||
217 | { | ||
218 | u32 val; | ||
219 | unsigned int freq; | ||
220 | |||
221 | if (!mpc52xx_cdm) | ||
222 | return 0; | ||
223 | |||
224 | freq = mpc52xx_find_ipb_freq(node); | ||
225 | if (!freq) | ||
226 | return 0; | ||
227 | |||
228 | if (in_8(&mpc52xx_cdm->ipb_clk_sel) & 0x1) | ||
229 | freq *= 2; | ||
230 | |||
231 | val = in_be32(&mpc52xx_cdm->rstcfg); | ||
232 | if (val & (1 << 5)) | ||
233 | freq *= 8; | ||
234 | else | ||
235 | freq *= 4; | ||
236 | if (val & (1 << 6)) | ||
237 | freq /= 12; | ||
238 | else | ||
239 | freq /= 16; | ||
240 | |||
241 | return freq; | ||
242 | } | ||
243 | EXPORT_SYMBOL(mpc52xx_get_xtal_freq); | ||
244 | |||
245 | /** | ||
208 | * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer | 246 | * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer |
209 | */ | 247 | */ |
210 | void | 248 | void |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c index 07f89ae46d04..2b8d8ef32e4e 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c | |||
@@ -354,88 +354,6 @@ static struct of_platform_driver mpc52xx_simple_gpiochip_driver = { | |||
354 | .remove = mpc52xx_gpiochip_remove, | 354 | .remove = mpc52xx_gpiochip_remove, |
355 | }; | 355 | }; |
356 | 356 | ||
357 | /* | ||
358 | * GPIO LIB API implementation for gpt GPIOs. | ||
359 | * | ||
360 | * Each gpt only has a single GPIO. | ||
361 | */ | ||
362 | static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio) | ||
363 | { | ||
364 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | ||
365 | struct mpc52xx_gpt __iomem *regs = mm_gc->regs; | ||
366 | |||
367 | return (in_be32(®s->status) & (1 << (31 - 23))) ? 1 : 0; | ||
368 | } | ||
369 | |||
370 | static void | ||
371 | mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | ||
372 | { | ||
373 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | ||
374 | struct mpc52xx_gpt __iomem *regs = mm_gc->regs; | ||
375 | |||
376 | if (val) | ||
377 | out_be32(®s->mode, 0x34); | ||
378 | else | ||
379 | out_be32(®s->mode, 0x24); | ||
380 | |||
381 | pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val); | ||
382 | } | ||
383 | |||
384 | static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | ||
385 | { | ||
386 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | ||
387 | struct mpc52xx_gpt __iomem *regs = mm_gc->regs; | ||
388 | |||
389 | out_be32(®s->mode, 0x04); | ||
390 | |||
391 | return 0; | ||
392 | } | ||
393 | |||
394 | static int | ||
395 | mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | ||
396 | { | ||
397 | mpc52xx_gpt_gpio_set(gc, gpio, val); | ||
398 | pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val); | ||
399 | |||
400 | return 0; | ||
401 | } | ||
402 | |||
403 | static int __devinit mpc52xx_gpt_gpiochip_probe(struct of_device *ofdev, | ||
404 | const struct of_device_id *match) | ||
405 | { | ||
406 | struct of_mm_gpio_chip *mmchip; | ||
407 | struct of_gpio_chip *chip; | ||
408 | |||
409 | mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL); | ||
410 | if (!mmchip) | ||
411 | return -ENOMEM; | ||
412 | |||
413 | chip = &mmchip->of_gc; | ||
414 | |||
415 | chip->gpio_cells = 2; | ||
416 | chip->gc.ngpio = 1; | ||
417 | chip->gc.direction_input = mpc52xx_gpt_gpio_dir_in; | ||
418 | chip->gc.direction_output = mpc52xx_gpt_gpio_dir_out; | ||
419 | chip->gc.get = mpc52xx_gpt_gpio_get; | ||
420 | chip->gc.set = mpc52xx_gpt_gpio_set; | ||
421 | |||
422 | return of_mm_gpiochip_add(ofdev->node, mmchip); | ||
423 | } | ||
424 | |||
425 | static const struct of_device_id mpc52xx_gpt_gpiochip_match[] = { | ||
426 | { | ||
427 | .compatible = "fsl,mpc5200-gpt-gpio", | ||
428 | }, | ||
429 | {} | ||
430 | }; | ||
431 | |||
432 | static struct of_platform_driver mpc52xx_gpt_gpiochip_driver = { | ||
433 | .name = "gpio_gpt", | ||
434 | .match_table = mpc52xx_gpt_gpiochip_match, | ||
435 | .probe = mpc52xx_gpt_gpiochip_probe, | ||
436 | .remove = mpc52xx_gpiochip_remove, | ||
437 | }; | ||
438 | |||
439 | static int __init mpc52xx_gpio_init(void) | 357 | static int __init mpc52xx_gpio_init(void) |
440 | { | 358 | { |
441 | if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver)) | 359 | if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver)) |
@@ -444,9 +362,6 @@ static int __init mpc52xx_gpio_init(void) | |||
444 | if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver)) | 362 | if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver)) |
445 | printk(KERN_ERR "Unable to register simple GPIO driver\n"); | 363 | printk(KERN_ERR "Unable to register simple GPIO driver\n"); |
446 | 364 | ||
447 | if (of_register_platform_driver(&mpc52xx_gpt_gpiochip_driver)) | ||
448 | printk(KERN_ERR "Unable to register gpt GPIO driver\n"); | ||
449 | |||
450 | return 0; | 365 | return 0; |
451 | } | 366 | } |
452 | 367 | ||
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c new file mode 100644 index 000000000000..bfbcd418e690 --- /dev/null +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c | |||
@@ -0,0 +1,396 @@ | |||
1 | /* | ||
2 | * MPC5200 General Purpose Timer device driver | ||
3 | * | ||
4 | * Copyright (c) 2009 Secret Lab Technologies Ltd. | ||
5 | * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | * This file is a driver for the the General Purpose Timer (gpt) devices | ||
13 | * found on the MPC5200 SoC. Each timer has an IO pin which can be used | ||
14 | * for GPIO or can be used to raise interrupts. The timer function can | ||
15 | * be used independently from the IO pin, or it can be used to control | ||
16 | * output signals or measure input signals. | ||
17 | * | ||
18 | * This driver supports the GPIO and IRQ controller functions of the GPT | ||
19 | * device. Timer functions are not yet supported, nor is the watchdog | ||
20 | * timer. | ||
21 | * | ||
22 | * To use the GPIO function, the following two properties must be added | ||
23 | * to the device tree node for the gpt device (typically in the .dts file | ||
24 | * for the board): | ||
25 | * gpio-controller; | ||
26 | * #gpio-cells = < 2 >; | ||
27 | * This driver will register the GPIO pin if it finds the gpio-controller | ||
28 | * property in the device tree. | ||
29 | * | ||
30 | * To use the IRQ controller function, the following two properties must | ||
31 | * be added to the device tree node for the gpt device: | ||
32 | * interrupt-controller; | ||
33 | * #interrupt-cells = < 1 >; | ||
34 | * The IRQ controller binding only uses one cell to specify the interrupt, | ||
35 | * and the IRQ flags are encoded in the cell. A cell is not used to encode | ||
36 | * the IRQ number because the GPT only has a single IRQ source. For flags, | ||
37 | * a value of '1' means rising edge sensitive and '2' means falling edge. | ||
38 | * | ||
39 | * The GPIO and the IRQ controller functions can be used at the same time, | ||
40 | * but in this use case the IO line will only work as an input. Trying to | ||
41 | * use it as a GPIO output will not work. | ||
42 | * | ||
43 | * When using the GPIO line as an output, it can either be driven as normal | ||
44 | * IO, or it can be an Open Collector (OC) output. At the moment it is the | ||
45 | * responsibility of either the bootloader or the platform setup code to set | ||
46 | * the output mode. This driver does not change the output mode setting. | ||
47 | */ | ||
48 | |||
49 | #include <linux/irq.h> | ||
50 | #include <linux/interrupt.h> | ||
51 | #include <linux/io.h> | ||
52 | #include <linux/of.h> | ||
53 | #include <linux/of_platform.h> | ||
54 | #include <linux/of_gpio.h> | ||
55 | #include <linux/kernel.h> | ||
56 | #include <asm/mpc52xx.h> | ||
57 | |||
58 | MODULE_DESCRIPTION("Freescale MPC52xx gpt driver"); | ||
59 | MODULE_AUTHOR("Sascha Hauer, Grant Likely"); | ||
60 | MODULE_LICENSE("GPL"); | ||
61 | |||
62 | /** | ||
63 | * struct mpc52xx_gpt - Private data structure for MPC52xx GPT driver | ||
64 | * @dev: pointer to device structure | ||
65 | * @regs: virtual address of GPT registers | ||
66 | * @lock: spinlock to coordinate between different functions. | ||
67 | * @of_gc: of_gpio_chip instance structure; used when GPIO is enabled | ||
68 | * @irqhost: Pointer to irq_host instance; used when IRQ mode is supported | ||
69 | */ | ||
70 | struct mpc52xx_gpt_priv { | ||
71 | struct device *dev; | ||
72 | struct mpc52xx_gpt __iomem *regs; | ||
73 | spinlock_t lock; | ||
74 | struct irq_host *irqhost; | ||
75 | |||
76 | #if defined(CONFIG_GPIOLIB) | ||
77 | struct of_gpio_chip of_gc; | ||
78 | #endif | ||
79 | }; | ||
80 | |||
81 | #define MPC52xx_GPT_MODE_MS_MASK (0x07) | ||
82 | #define MPC52xx_GPT_MODE_MS_IC (0x01) | ||
83 | #define MPC52xx_GPT_MODE_MS_OC (0x02) | ||
84 | #define MPC52xx_GPT_MODE_MS_PWM (0x03) | ||
85 | #define MPC52xx_GPT_MODE_MS_GPIO (0x04) | ||
86 | |||
87 | #define MPC52xx_GPT_MODE_GPIO_MASK (0x30) | ||
88 | #define MPC52xx_GPT_MODE_GPIO_OUT_LOW (0x20) | ||
89 | #define MPC52xx_GPT_MODE_GPIO_OUT_HIGH (0x30) | ||
90 | |||
91 | #define MPC52xx_GPT_MODE_IRQ_EN (0x0100) | ||
92 | |||
93 | #define MPC52xx_GPT_MODE_ICT_MASK (0x030000) | ||
94 | #define MPC52xx_GPT_MODE_ICT_RISING (0x010000) | ||
95 | #define MPC52xx_GPT_MODE_ICT_FALLING (0x020000) | ||
96 | #define MPC52xx_GPT_MODE_ICT_TOGGLE (0x030000) | ||
97 | |||
98 | #define MPC52xx_GPT_STATUS_IRQMASK (0x000f) | ||
99 | |||
100 | /* --------------------------------------------------------------------- | ||
101 | * Cascaded interrupt controller hooks | ||
102 | */ | ||
103 | |||
104 | static void mpc52xx_gpt_irq_unmask(unsigned int virq) | ||
105 | { | ||
106 | struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq); | ||
107 | unsigned long flags; | ||
108 | |||
109 | spin_lock_irqsave(&gpt->lock, flags); | ||
110 | setbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN); | ||
111 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
112 | } | ||
113 | |||
114 | static void mpc52xx_gpt_irq_mask(unsigned int virq) | ||
115 | { | ||
116 | struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq); | ||
117 | unsigned long flags; | ||
118 | |||
119 | spin_lock_irqsave(&gpt->lock, flags); | ||
120 | clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN); | ||
121 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
122 | } | ||
123 | |||
124 | static void mpc52xx_gpt_irq_ack(unsigned int virq) | ||
125 | { | ||
126 | struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq); | ||
127 | |||
128 | out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK); | ||
129 | } | ||
130 | |||
131 | static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type) | ||
132 | { | ||
133 | struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq); | ||
134 | unsigned long flags; | ||
135 | u32 reg; | ||
136 | |||
137 | dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, virq, flow_type); | ||
138 | |||
139 | spin_lock_irqsave(&gpt->lock, flags); | ||
140 | reg = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_MODE_ICT_MASK; | ||
141 | if (flow_type & IRQF_TRIGGER_RISING) | ||
142 | reg |= MPC52xx_GPT_MODE_ICT_RISING; | ||
143 | if (flow_type & IRQF_TRIGGER_FALLING) | ||
144 | reg |= MPC52xx_GPT_MODE_ICT_FALLING; | ||
145 | out_be32(&gpt->regs->mode, reg); | ||
146 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
147 | |||
148 | return 0; | ||
149 | } | ||
150 | |||
151 | static struct irq_chip mpc52xx_gpt_irq_chip = { | ||
152 | .typename = "MPC52xx GPT", | ||
153 | .unmask = mpc52xx_gpt_irq_unmask, | ||
154 | .mask = mpc52xx_gpt_irq_mask, | ||
155 | .ack = mpc52xx_gpt_irq_ack, | ||
156 | .set_type = mpc52xx_gpt_irq_set_type, | ||
157 | }; | ||
158 | |||
159 | void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc) | ||
160 | { | ||
161 | struct mpc52xx_gpt_priv *gpt = get_irq_data(virq); | ||
162 | int sub_virq; | ||
163 | u32 status; | ||
164 | |||
165 | status = in_be32(&gpt->regs->status) & MPC52xx_GPT_STATUS_IRQMASK; | ||
166 | if (status) { | ||
167 | sub_virq = irq_linear_revmap(gpt->irqhost, 0); | ||
168 | generic_handle_irq(sub_virq); | ||
169 | } | ||
170 | } | ||
171 | |||
172 | static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq, | ||
173 | irq_hw_number_t hw) | ||
174 | { | ||
175 | struct mpc52xx_gpt_priv *gpt = h->host_data; | ||
176 | |||
177 | dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq); | ||
178 | set_irq_chip_data(virq, gpt); | ||
179 | set_irq_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq); | ||
180 | |||
181 | return 0; | ||
182 | } | ||
183 | |||
184 | static int mpc52xx_gpt_irq_xlate(struct irq_host *h, struct device_node *ct, | ||
185 | u32 *intspec, unsigned int intsize, | ||
186 | irq_hw_number_t *out_hwirq, | ||
187 | unsigned int *out_flags) | ||
188 | { | ||
189 | struct mpc52xx_gpt_priv *gpt = h->host_data; | ||
190 | |||
191 | dev_dbg(gpt->dev, "%s: flags=%i\n", __func__, intspec[0]); | ||
192 | |||
193 | if ((intsize < 1) || (intspec[0] < 1) || (intspec[0] > 3)) { | ||
194 | dev_err(gpt->dev, "bad irq specifier in %s\n", ct->full_name); | ||
195 | return -EINVAL; | ||
196 | } | ||
197 | |||
198 | *out_hwirq = 0; /* The GPT only has 1 IRQ line */ | ||
199 | *out_flags = intspec[0]; | ||
200 | |||
201 | return 0; | ||
202 | } | ||
203 | |||
204 | static struct irq_host_ops mpc52xx_gpt_irq_ops = { | ||
205 | .map = mpc52xx_gpt_irq_map, | ||
206 | .xlate = mpc52xx_gpt_irq_xlate, | ||
207 | }; | ||
208 | |||
209 | static void | ||
210 | mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node) | ||
211 | { | ||
212 | int cascade_virq; | ||
213 | unsigned long flags; | ||
214 | |||
215 | /* Only setup cascaded IRQ if device tree claims the GPT is | ||
216 | * an interrupt controller */ | ||
217 | if (!of_find_property(node, "interrupt-controller", NULL)) | ||
218 | return; | ||
219 | |||
220 | cascade_virq = irq_of_parse_and_map(node, 0); | ||
221 | |||
222 | gpt->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, 1, | ||
223 | &mpc52xx_gpt_irq_ops, -1); | ||
224 | if (!gpt->irqhost) { | ||
225 | dev_err(gpt->dev, "irq_alloc_host() failed\n"); | ||
226 | return; | ||
227 | } | ||
228 | |||
229 | gpt->irqhost->host_data = gpt; | ||
230 | |||
231 | set_irq_data(cascade_virq, gpt); | ||
232 | set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade); | ||
233 | |||
234 | /* Set to Input Capture mode */ | ||
235 | spin_lock_irqsave(&gpt->lock, flags); | ||
236 | clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK, | ||
237 | MPC52xx_GPT_MODE_MS_IC); | ||
238 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
239 | |||
240 | dev_dbg(gpt->dev, "%s() complete. virq=%i\n", __func__, cascade_virq); | ||
241 | } | ||
242 | |||
243 | |||
244 | /* --------------------------------------------------------------------- | ||
245 | * GPIOLIB hooks | ||
246 | */ | ||
247 | #if defined(CONFIG_GPIOLIB) | ||
248 | static inline struct mpc52xx_gpt_priv *gc_to_mpc52xx_gpt(struct gpio_chip *gc) | ||
249 | { | ||
250 | return container_of(to_of_gpio_chip(gc), struct mpc52xx_gpt_priv,of_gc); | ||
251 | } | ||
252 | |||
253 | static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio) | ||
254 | { | ||
255 | struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc); | ||
256 | |||
257 | return (in_be32(&gpt->regs->status) >> 8) & 1; | ||
258 | } | ||
259 | |||
260 | static void | ||
261 | mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int v) | ||
262 | { | ||
263 | struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc); | ||
264 | unsigned long flags; | ||
265 | u32 r; | ||
266 | |||
267 | dev_dbg(gpt->dev, "%s: gpio:%d v:%d\n", __func__, gpio, v); | ||
268 | r = v ? MPC52xx_GPT_MODE_GPIO_OUT_HIGH : MPC52xx_GPT_MODE_GPIO_OUT_LOW; | ||
269 | |||
270 | spin_lock_irqsave(&gpt->lock, flags); | ||
271 | clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK, r); | ||
272 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
273 | } | ||
274 | |||
275 | static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | ||
276 | { | ||
277 | struct mpc52xx_gpt_priv *gpt = gc_to_mpc52xx_gpt(gc); | ||
278 | unsigned long flags; | ||
279 | |||
280 | dev_dbg(gpt->dev, "%s: gpio:%d\n", __func__, gpio); | ||
281 | |||
282 | spin_lock_irqsave(&gpt->lock, flags); | ||
283 | clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_GPIO_MASK); | ||
284 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
285 | |||
286 | return 0; | ||
287 | } | ||
288 | |||
289 | static int | ||
290 | mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | ||
291 | { | ||
292 | mpc52xx_gpt_gpio_set(gc, gpio, val); | ||
293 | return 0; | ||
294 | } | ||
295 | |||
296 | static void | ||
297 | mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node) | ||
298 | { | ||
299 | int rc; | ||
300 | |||
301 | /* Only setup GPIO if the device tree claims the GPT is | ||
302 | * a GPIO controller */ | ||
303 | if (!of_find_property(node, "gpio-controller", NULL)) | ||
304 | return; | ||
305 | |||
306 | gpt->of_gc.gc.label = kstrdup(node->full_name, GFP_KERNEL); | ||
307 | if (!gpt->of_gc.gc.label) { | ||
308 | dev_err(gpt->dev, "out of memory\n"); | ||
309 | return; | ||
310 | } | ||
311 | |||
312 | gpt->of_gc.gpio_cells = 2; | ||
313 | gpt->of_gc.gc.ngpio = 1; | ||
314 | gpt->of_gc.gc.direction_input = mpc52xx_gpt_gpio_dir_in; | ||
315 | gpt->of_gc.gc.direction_output = mpc52xx_gpt_gpio_dir_out; | ||
316 | gpt->of_gc.gc.get = mpc52xx_gpt_gpio_get; | ||
317 | gpt->of_gc.gc.set = mpc52xx_gpt_gpio_set; | ||
318 | gpt->of_gc.gc.base = -1; | ||
319 | gpt->of_gc.xlate = of_gpio_simple_xlate; | ||
320 | node->data = &gpt->of_gc; | ||
321 | of_node_get(node); | ||
322 | |||
323 | /* Setup external pin in GPIO mode */ | ||
324 | clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK, | ||
325 | MPC52xx_GPT_MODE_MS_GPIO); | ||
326 | |||
327 | rc = gpiochip_add(&gpt->of_gc.gc); | ||
328 | if (rc) | ||
329 | dev_err(gpt->dev, "gpiochip_add() failed; rc=%i\n", rc); | ||
330 | |||
331 | dev_dbg(gpt->dev, "%s() complete.\n", __func__); | ||
332 | } | ||
333 | #else /* defined(CONFIG_GPIOLIB) */ | ||
334 | static void | ||
335 | mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *p, struct device_node *np) { } | ||
336 | #endif /* defined(CONFIG_GPIOLIB) */ | ||
337 | |||
338 | /* --------------------------------------------------------------------- | ||
339 | * of_platform bus binding code | ||
340 | */ | ||
341 | static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev, | ||
342 | const struct of_device_id *match) | ||
343 | { | ||
344 | struct mpc52xx_gpt_priv *gpt; | ||
345 | |||
346 | gpt = kzalloc(sizeof *gpt, GFP_KERNEL); | ||
347 | if (!gpt) | ||
348 | return -ENOMEM; | ||
349 | |||
350 | spin_lock_init(&gpt->lock); | ||
351 | gpt->dev = &ofdev->dev; | ||
352 | gpt->regs = of_iomap(ofdev->node, 0); | ||
353 | if (!gpt->regs) { | ||
354 | kfree(gpt); | ||
355 | return -ENOMEM; | ||
356 | } | ||
357 | |||
358 | dev_set_drvdata(&ofdev->dev, gpt); | ||
359 | |||
360 | mpc52xx_gpt_gpio_setup(gpt, ofdev->node); | ||
361 | mpc52xx_gpt_irq_setup(gpt, ofdev->node); | ||
362 | |||
363 | return 0; | ||
364 | } | ||
365 | |||
366 | static int mpc52xx_gpt_remove(struct of_device *ofdev) | ||
367 | { | ||
368 | return -EBUSY; | ||
369 | } | ||
370 | |||
371 | static const struct of_device_id mpc52xx_gpt_match[] = { | ||
372 | { .compatible = "fsl,mpc5200-gpt", }, | ||
373 | |||
374 | /* Depreciated compatible values; don't use for new dts files */ | ||
375 | { .compatible = "fsl,mpc5200-gpt-gpio", }, | ||
376 | { .compatible = "mpc5200-gpt", }, | ||
377 | {} | ||
378 | }; | ||
379 | |||
380 | static struct of_platform_driver mpc52xx_gpt_driver = { | ||
381 | .name = "mpc52xx-gpt", | ||
382 | .match_table = mpc52xx_gpt_match, | ||
383 | .probe = mpc52xx_gpt_probe, | ||
384 | .remove = mpc52xx_gpt_remove, | ||
385 | }; | ||
386 | |||
387 | static int __init mpc52xx_gpt_init(void) | ||
388 | { | ||
389 | if (of_register_platform_driver(&mpc52xx_gpt_driver)) | ||
390 | pr_err("error registering MPC52xx GPT driver\n"); | ||
391 | |||
392 | return 0; | ||
393 | } | ||
394 | |||
395 | /* Make sure GPIOs and IRQs get set up before anyone tries to use them */ | ||
396 | subsys_initcall(mpc52xx_gpt_init); | ||
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c index 0a093f03c758..480f806fd0a9 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c | |||
@@ -163,8 +163,6 @@ static void mpc52xx_extirq_mask(unsigned int virq) | |||
163 | irq = irq_map[virq].hwirq; | 163 | irq = irq_map[virq].hwirq; |
164 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 164 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
165 | 165 | ||
166 | pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); | ||
167 | |||
168 | io_be_clrbit(&intr->ctrl, 11 - l2irq); | 166 | io_be_clrbit(&intr->ctrl, 11 - l2irq); |
169 | } | 167 | } |
170 | 168 | ||
@@ -176,8 +174,6 @@ static void mpc52xx_extirq_unmask(unsigned int virq) | |||
176 | irq = irq_map[virq].hwirq; | 174 | irq = irq_map[virq].hwirq; |
177 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 175 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
178 | 176 | ||
179 | pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); | ||
180 | |||
181 | io_be_setbit(&intr->ctrl, 11 - l2irq); | 177 | io_be_setbit(&intr->ctrl, 11 - l2irq); |
182 | } | 178 | } |
183 | 179 | ||
@@ -189,17 +185,15 @@ static void mpc52xx_extirq_ack(unsigned int virq) | |||
189 | irq = irq_map[virq].hwirq; | 185 | irq = irq_map[virq].hwirq; |
190 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 186 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
191 | 187 | ||
192 | pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); | ||
193 | |||
194 | io_be_setbit(&intr->ctrl, 27-l2irq); | 188 | io_be_setbit(&intr->ctrl, 27-l2irq); |
195 | } | 189 | } |
196 | 190 | ||
197 | static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type) | 191 | static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type) |
198 | { | 192 | { |
199 | struct irq_desc *desc = get_irq_desc(virq); | ||
200 | u32 ctrl_reg, type; | 193 | u32 ctrl_reg, type; |
201 | int irq; | 194 | int irq; |
202 | int l2irq; | 195 | int l2irq; |
196 | void *handler = handle_level_irq; | ||
203 | 197 | ||
204 | irq = irq_map[virq].hwirq; | 198 | irq = irq_map[virq].hwirq; |
205 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 199 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
@@ -207,32 +201,21 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type) | |||
207 | pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type); | 201 | pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type); |
208 | 202 | ||
209 | switch (flow_type) { | 203 | switch (flow_type) { |
210 | case IRQF_TRIGGER_HIGH: | 204 | case IRQF_TRIGGER_HIGH: type = 0; break; |
211 | type = 0; | 205 | case IRQF_TRIGGER_RISING: type = 1; handler = handle_edge_irq; break; |
212 | break; | 206 | case IRQF_TRIGGER_FALLING: type = 2; handler = handle_edge_irq; break; |
213 | case IRQF_TRIGGER_RISING: | 207 | case IRQF_TRIGGER_LOW: type = 3; break; |
214 | type = 1; | ||
215 | break; | ||
216 | case IRQF_TRIGGER_FALLING: | ||
217 | type = 2; | ||
218 | break; | ||
219 | case IRQF_TRIGGER_LOW: | ||
220 | type = 3; | ||
221 | break; | ||
222 | default: | 208 | default: |
223 | type = 0; | 209 | type = 0; |
224 | } | 210 | } |
225 | 211 | ||
226 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); | ||
227 | desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; | ||
228 | if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) | ||
229 | desc->status |= IRQ_LEVEL; | ||
230 | |||
231 | ctrl_reg = in_be32(&intr->ctrl); | 212 | ctrl_reg = in_be32(&intr->ctrl); |
232 | ctrl_reg &= ~(0x3 << (22 - (l2irq * 2))); | 213 | ctrl_reg &= ~(0x3 << (22 - (l2irq * 2))); |
233 | ctrl_reg |= (type << (22 - (l2irq * 2))); | 214 | ctrl_reg |= (type << (22 - (l2irq * 2))); |
234 | out_be32(&intr->ctrl, ctrl_reg); | 215 | out_be32(&intr->ctrl, ctrl_reg); |
235 | 216 | ||
217 | __set_irq_handler_unlocked(virq, handler); | ||
218 | |||
236 | return 0; | 219 | return 0; |
237 | } | 220 | } |
238 | 221 | ||
@@ -247,6 +230,11 @@ static struct irq_chip mpc52xx_extirq_irqchip = { | |||
247 | /* | 230 | /* |
248 | * Main interrupt irq_chip | 231 | * Main interrupt irq_chip |
249 | */ | 232 | */ |
233 | static int mpc52xx_null_set_type(unsigned int virq, unsigned int flow_type) | ||
234 | { | ||
235 | return 0; /* Do nothing so that the sense mask will get updated */ | ||
236 | } | ||
237 | |||
250 | static void mpc52xx_main_mask(unsigned int virq) | 238 | static void mpc52xx_main_mask(unsigned int virq) |
251 | { | 239 | { |
252 | int irq; | 240 | int irq; |
@@ -255,8 +243,6 @@ static void mpc52xx_main_mask(unsigned int virq) | |||
255 | irq = irq_map[virq].hwirq; | 243 | irq = irq_map[virq].hwirq; |
256 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 244 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
257 | 245 | ||
258 | pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); | ||
259 | |||
260 | io_be_setbit(&intr->main_mask, 16 - l2irq); | 246 | io_be_setbit(&intr->main_mask, 16 - l2irq); |
261 | } | 247 | } |
262 | 248 | ||
@@ -268,8 +254,6 @@ static void mpc52xx_main_unmask(unsigned int virq) | |||
268 | irq = irq_map[virq].hwirq; | 254 | irq = irq_map[virq].hwirq; |
269 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 255 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
270 | 256 | ||
271 | pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); | ||
272 | |||
273 | io_be_clrbit(&intr->main_mask, 16 - l2irq); | 257 | io_be_clrbit(&intr->main_mask, 16 - l2irq); |
274 | } | 258 | } |
275 | 259 | ||
@@ -278,6 +262,7 @@ static struct irq_chip mpc52xx_main_irqchip = { | |||
278 | .mask = mpc52xx_main_mask, | 262 | .mask = mpc52xx_main_mask, |
279 | .mask_ack = mpc52xx_main_mask, | 263 | .mask_ack = mpc52xx_main_mask, |
280 | .unmask = mpc52xx_main_unmask, | 264 | .unmask = mpc52xx_main_unmask, |
265 | .set_type = mpc52xx_null_set_type, | ||
281 | }; | 266 | }; |
282 | 267 | ||
283 | /* | 268 | /* |
@@ -291,8 +276,6 @@ static void mpc52xx_periph_mask(unsigned int virq) | |||
291 | irq = irq_map[virq].hwirq; | 276 | irq = irq_map[virq].hwirq; |
292 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 277 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
293 | 278 | ||
294 | pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); | ||
295 | |||
296 | io_be_setbit(&intr->per_mask, 31 - l2irq); | 279 | io_be_setbit(&intr->per_mask, 31 - l2irq); |
297 | } | 280 | } |
298 | 281 | ||
@@ -304,8 +287,6 @@ static void mpc52xx_periph_unmask(unsigned int virq) | |||
304 | irq = irq_map[virq].hwirq; | 287 | irq = irq_map[virq].hwirq; |
305 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 288 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
306 | 289 | ||
307 | pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); | ||
308 | |||
309 | io_be_clrbit(&intr->per_mask, 31 - l2irq); | 290 | io_be_clrbit(&intr->per_mask, 31 - l2irq); |
310 | } | 291 | } |
311 | 292 | ||
@@ -314,6 +295,7 @@ static struct irq_chip mpc52xx_periph_irqchip = { | |||
314 | .mask = mpc52xx_periph_mask, | 295 | .mask = mpc52xx_periph_mask, |
315 | .mask_ack = mpc52xx_periph_mask, | 296 | .mask_ack = mpc52xx_periph_mask, |
316 | .unmask = mpc52xx_periph_unmask, | 297 | .unmask = mpc52xx_periph_unmask, |
298 | .set_type = mpc52xx_null_set_type, | ||
317 | }; | 299 | }; |
318 | 300 | ||
319 | /* | 301 | /* |
@@ -327,8 +309,6 @@ static void mpc52xx_sdma_mask(unsigned int virq) | |||
327 | irq = irq_map[virq].hwirq; | 309 | irq = irq_map[virq].hwirq; |
328 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 310 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
329 | 311 | ||
330 | pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); | ||
331 | |||
332 | io_be_setbit(&sdma->IntMask, l2irq); | 312 | io_be_setbit(&sdma->IntMask, l2irq); |
333 | } | 313 | } |
334 | 314 | ||
@@ -340,8 +320,6 @@ static void mpc52xx_sdma_unmask(unsigned int virq) | |||
340 | irq = irq_map[virq].hwirq; | 320 | irq = irq_map[virq].hwirq; |
341 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 321 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
342 | 322 | ||
343 | pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); | ||
344 | |||
345 | io_be_clrbit(&sdma->IntMask, l2irq); | 323 | io_be_clrbit(&sdma->IntMask, l2irq); |
346 | } | 324 | } |
347 | 325 | ||
@@ -353,8 +331,6 @@ static void mpc52xx_sdma_ack(unsigned int virq) | |||
353 | irq = irq_map[virq].hwirq; | 331 | irq = irq_map[virq].hwirq; |
354 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 332 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
355 | 333 | ||
356 | pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); | ||
357 | |||
358 | out_be32(&sdma->IntPend, 1 << l2irq); | 334 | out_be32(&sdma->IntPend, 1 << l2irq); |
359 | } | 335 | } |
360 | 336 | ||
@@ -363,9 +339,19 @@ static struct irq_chip mpc52xx_sdma_irqchip = { | |||
363 | .mask = mpc52xx_sdma_mask, | 339 | .mask = mpc52xx_sdma_mask, |
364 | .unmask = mpc52xx_sdma_unmask, | 340 | .unmask = mpc52xx_sdma_unmask, |
365 | .ack = mpc52xx_sdma_ack, | 341 | .ack = mpc52xx_sdma_ack, |
342 | .set_type = mpc52xx_null_set_type, | ||
366 | }; | 343 | }; |
367 | 344 | ||
368 | /** | 345 | /** |
346 | * mpc52xx_is_extirq - Returns true if hwirq number is for an external IRQ | ||
347 | */ | ||
348 | static int mpc52xx_is_extirq(int l1, int l2) | ||
349 | { | ||
350 | return ((l1 == 0) && (l2 == 0)) || | ||
351 | ((l1 == 1) && (l2 >= 1) && (l2 <= 3)); | ||
352 | } | ||
353 | |||
354 | /** | ||
369 | * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property | 355 | * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property |
370 | */ | 356 | */ |
371 | static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct, | 357 | static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct, |
@@ -383,38 +369,23 @@ static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct, | |||
383 | 369 | ||
384 | intrvect_l1 = (int)intspec[0]; | 370 | intrvect_l1 = (int)intspec[0]; |
385 | intrvect_l2 = (int)intspec[1]; | 371 | intrvect_l2 = (int)intspec[1]; |
386 | intrvect_type = (int)intspec[2]; | 372 | intrvect_type = (int)intspec[2] & 0x3; |
387 | 373 | ||
388 | intrvect_linux = (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) & | 374 | intrvect_linux = (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) & |
389 | MPC52xx_IRQ_L1_MASK; | 375 | MPC52xx_IRQ_L1_MASK; |
390 | intrvect_linux |= intrvect_l2 & MPC52xx_IRQ_L2_MASK; | 376 | intrvect_linux |= intrvect_l2 & MPC52xx_IRQ_L2_MASK; |
391 | 377 | ||
392 | pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1, | ||
393 | intrvect_l2); | ||
394 | |||
395 | *out_hwirq = intrvect_linux; | 378 | *out_hwirq = intrvect_linux; |
396 | *out_flags = mpc52xx_map_senses[intrvect_type]; | 379 | *out_flags = IRQ_TYPE_LEVEL_LOW; |
380 | if (mpc52xx_is_extirq(intrvect_l1, intrvect_l2)) | ||
381 | *out_flags = mpc52xx_map_senses[intrvect_type]; | ||
397 | 382 | ||
383 | pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1, | ||
384 | intrvect_l2); | ||
398 | return 0; | 385 | return 0; |
399 | } | 386 | } |
400 | 387 | ||
401 | /** | 388 | /** |
402 | * mpc52xx_irqx_gettype - determine the IRQ sense type (level/edge) | ||
403 | * | ||
404 | * Only external IRQs need this. | ||
405 | */ | ||
406 | static int mpc52xx_irqx_gettype(int irq) | ||
407 | { | ||
408 | int type; | ||
409 | u32 ctrl_reg; | ||
410 | |||
411 | ctrl_reg = in_be32(&intr->ctrl); | ||
412 | type = (ctrl_reg >> (22 - irq * 2)) & 0x3; | ||
413 | |||
414 | return mpc52xx_map_senses[type]; | ||
415 | } | ||
416 | |||
417 | /** | ||
418 | * mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure | 389 | * mpc52xx_irqhost_map - Hook to map from virq to an irq_chip structure |
419 | */ | 390 | */ |
420 | static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, | 391 | static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, |
@@ -422,68 +393,46 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, | |||
422 | { | 393 | { |
423 | int l1irq; | 394 | int l1irq; |
424 | int l2irq; | 395 | int l2irq; |
425 | struct irq_chip *good_irqchip; | 396 | struct irq_chip *irqchip; |
426 | void *good_handle; | 397 | void *hndlr; |
427 | int type; | 398 | int type; |
399 | u32 reg; | ||
428 | 400 | ||
429 | l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET; | 401 | l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET; |
430 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 402 | l2irq = irq & MPC52xx_IRQ_L2_MASK; |
431 | 403 | ||
432 | /* | 404 | /* |
433 | * Most of ours IRQs will be level low | 405 | * External IRQs are handled differently by the hardware so they are |
434 | * Only external IRQs on some platform may be others | 406 | * handled by a dedicated irq_chip structure. |
435 | */ | 407 | */ |
436 | type = IRQ_TYPE_LEVEL_LOW; | 408 | if (mpc52xx_is_extirq(l1irq, l2irq)) { |
409 | reg = in_be32(&intr->ctrl); | ||
410 | type = mpc52xx_map_senses[(reg >> (22 - l2irq * 2)) & 0x3]; | ||
411 | if ((type == IRQ_TYPE_EDGE_FALLING) || | ||
412 | (type == IRQ_TYPE_EDGE_RISING)) | ||
413 | hndlr = handle_edge_irq; | ||
414 | else | ||
415 | hndlr = handle_level_irq; | ||
416 | |||
417 | set_irq_chip_and_handler(virq, &mpc52xx_extirq_irqchip, hndlr); | ||
418 | pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n", | ||
419 | __func__, l2irq, virq, (int)irq, type); | ||
420 | return 0; | ||
421 | } | ||
437 | 422 | ||
423 | /* It is an internal SOC irq. Choose the correct irq_chip */ | ||
438 | switch (l1irq) { | 424 | switch (l1irq) { |
439 | case MPC52xx_IRQ_L1_CRIT: | 425 | case MPC52xx_IRQ_L1_MAIN: irqchip = &mpc52xx_main_irqchip; break; |
440 | pr_debug("%s: Critical. l2=%x\n", __func__, l2irq); | 426 | case MPC52xx_IRQ_L1_PERP: irqchip = &mpc52xx_periph_irqchip; break; |
441 | 427 | case MPC52xx_IRQ_L1_SDMA: irqchip = &mpc52xx_sdma_irqchip; break; | |
442 | BUG_ON(l2irq != 0); | ||
443 | |||
444 | type = mpc52xx_irqx_gettype(l2irq); | ||
445 | good_irqchip = &mpc52xx_extirq_irqchip; | ||
446 | break; | ||
447 | |||
448 | case MPC52xx_IRQ_L1_MAIN: | ||
449 | pr_debug("%s: Main IRQ[1-3] l2=%x\n", __func__, l2irq); | ||
450 | |||
451 | if ((l2irq >= 1) && (l2irq <= 3)) { | ||
452 | type = mpc52xx_irqx_gettype(l2irq); | ||
453 | good_irqchip = &mpc52xx_extirq_irqchip; | ||
454 | } else { | ||
455 | good_irqchip = &mpc52xx_main_irqchip; | ||
456 | } | ||
457 | break; | ||
458 | |||
459 | case MPC52xx_IRQ_L1_PERP: | ||
460 | pr_debug("%s: Peripherals. l2=%x\n", __func__, l2irq); | ||
461 | good_irqchip = &mpc52xx_periph_irqchip; | ||
462 | break; | ||
463 | |||
464 | case MPC52xx_IRQ_L1_SDMA: | ||
465 | pr_debug("%s: SDMA. l2=%x\n", __func__, l2irq); | ||
466 | good_irqchip = &mpc52xx_sdma_irqchip; | ||
467 | break; | ||
468 | |||
469 | default: | 428 | default: |
470 | pr_err("%s: invalid virq requested (0x%x)\n", __func__, virq); | 429 | pr_err("%s: invalid irq: virq=%i, l1=%i, l2=%i\n", |
430 | __func__, virq, l1irq, l2irq); | ||
471 | return -EINVAL; | 431 | return -EINVAL; |
472 | } | 432 | } |
473 | 433 | ||
474 | switch (type) { | 434 | set_irq_chip_and_handler(virq, irqchip, handle_level_irq); |
475 | case IRQ_TYPE_EDGE_FALLING: | 435 | pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq); |
476 | case IRQ_TYPE_EDGE_RISING: | ||
477 | good_handle = handle_edge_irq; | ||
478 | break; | ||
479 | default: | ||
480 | good_handle = handle_level_irq; | ||
481 | } | ||
482 | |||
483 | set_irq_chip_and_handler(virq, good_irqchip, good_handle); | ||
484 | |||
485 | pr_debug("%s: virq=%x, hw=%x. type=%x\n", __func__, virq, | ||
486 | (int)irq, type); | ||
487 | 436 | ||
488 | return 0; | 437 | return 0; |
489 | } | 438 | } |
@@ -522,6 +471,8 @@ void __init mpc52xx_init_irq(void) | |||
522 | panic(__FILE__ ": find_and_map failed on 'mpc5200-bestcomm'. " | 471 | panic(__FILE__ ": find_and_map failed on 'mpc5200-bestcomm'. " |
523 | "Check node !"); | 472 | "Check node !"); |
524 | 473 | ||
474 | pr_debug("MPC5200 IRQ controller mapped to 0x%p\n", intr); | ||
475 | |||
525 | /* Disable all interrupt sources. */ | 476 | /* Disable all interrupt sources. */ |
526 | out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */ | 477 | out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */ |
527 | out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */ | 478 | out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */ |
@@ -613,8 +564,5 @@ unsigned int mpc52xx_get_irq(void) | |||
613 | } | 564 | } |
614 | } | 565 | } |
615 | 566 | ||
616 | pr_debug("%s: irq=%x. virq=%d\n", __func__, irq, | ||
617 | irq_linear_revmap(mpc52xx_irqhost, irq)); | ||
618 | |||
619 | return irq_linear_revmap(mpc52xx_irqhost, irq); | 567 | return irq_linear_revmap(mpc52xx_irqhost, irq); |
620 | } | 568 | } |
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig index 30f008b2f92e..7c7df4003820 100644 --- a/arch/powerpc/platforms/82xx/Kconfig +++ b/arch/powerpc/platforms/82xx/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | menuconfig PPC_82xx | 1 | menuconfig PPC_82xx |
2 | bool "82xx-based boards (PQ II)" | 2 | bool "82xx-based boards (PQ II)" |
3 | depends on 6xx && PPC_MULTIPLATFORM | 3 | depends on 6xx |
4 | 4 | ||
5 | if PPC_82xx | 5 | if PPC_82xx |
6 | 6 | ||
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index 83c664afc897..437d29a59d72 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | menuconfig PPC_83xx | 1 | menuconfig PPC_83xx |
2 | bool "83xx-based boards" | 2 | bool "83xx-based boards" |
3 | depends on 6xx && PPC_MULTIPLATFORM | 3 | depends on 6xx |
4 | select PPC_UDBG_16550 | 4 | select PPC_UDBG_16550 |
5 | select PPC_PCI_CHOICE | 5 | select PPC_PCI_CHOICE |
6 | select FSL_PCI if PCI | 6 | select FSL_PCI if PCI |
diff --git a/arch/powerpc/platforms/83xx/asp834x.c b/arch/powerpc/platforms/83xx/asp834x.c index bb30d67ad0a2..aa0d84d22585 100644 --- a/arch/powerpc/platforms/83xx/asp834x.c +++ b/arch/powerpc/platforms/83xx/asp834x.c | |||
@@ -58,6 +58,7 @@ static struct __initdata of_device_id asp8347_ids[] = { | |||
58 | { .type = "soc", }, | 58 | { .type = "soc", }, |
59 | { .compatible = "soc", }, | 59 | { .compatible = "soc", }, |
60 | { .compatible = "simple-bus", }, | 60 | { .compatible = "simple-bus", }, |
61 | { .compatible = "gianfar", }, | ||
61 | {}, | 62 | {}, |
62 | }; | 63 | }; |
63 | 64 | ||
diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c index 91a2c80b9d72..0b4f883b20eb 100644 --- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c | |||
@@ -38,6 +38,8 @@ static void __init mpc831x_rdb_setup_arch(void) | |||
38 | #ifdef CONFIG_PCI | 38 | #ifdef CONFIG_PCI |
39 | for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") | 39 | for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") |
40 | mpc83xx_add_bridge(np); | 40 | mpc83xx_add_bridge(np); |
41 | for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie") | ||
42 | mpc83xx_add_bridge(np); | ||
41 | #endif | 43 | #endif |
42 | mpc831x_usb_cfg(); | 44 | mpc831x_usb_cfg(); |
43 | } | 45 | } |
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c index 76092d37c7d9..81e44fa1c644 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_itx.c +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c | |||
@@ -42,6 +42,7 @@ | |||
42 | static struct of_device_id __initdata mpc834x_itx_ids[] = { | 42 | static struct of_device_id __initdata mpc834x_itx_ids[] = { |
43 | { .compatible = "fsl,pq2pro-localbus", }, | 43 | { .compatible = "fsl,pq2pro-localbus", }, |
44 | { .compatible = "simple-bus", }, | 44 | { .compatible = "simple-bus", }, |
45 | { .compatible = "gianfar", }, | ||
45 | {}, | 46 | {}, |
46 | }; | 47 | }; |
47 | 48 | ||
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c index fc3f2ed1f3e9..d0a634b056ca 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c | |||
@@ -112,6 +112,7 @@ static struct of_device_id mpc834x_ids[] = { | |||
112 | { .type = "soc", }, | 112 | { .type = "soc", }, |
113 | { .compatible = "soc", }, | 113 | { .compatible = "soc", }, |
114 | { .compatible = "simple-bus", }, | 114 | { .compatible = "simple-bus", }, |
115 | { .compatible = "gianfar", }, | ||
115 | {}, | 116 | {}, |
116 | }; | 117 | }; |
117 | 118 | ||
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c index 530ef990ca7c..51df7e754698 100644 --- a/arch/powerpc/platforms/83xx/mpc837x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c | |||
@@ -84,14 +84,10 @@ static void __init mpc837x_mds_setup_arch(void) | |||
84 | ppc_md.progress("mpc837x_mds_setup_arch()", 0); | 84 | ppc_md.progress("mpc837x_mds_setup_arch()", 0); |
85 | 85 | ||
86 | #ifdef CONFIG_PCI | 86 | #ifdef CONFIG_PCI |
87 | for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") { | 87 | for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") |
88 | if (!of_device_is_available(np)) { | 88 | mpc83xx_add_bridge(np); |
89 | pr_warning("%s: disabled by the firmware.\n", | 89 | for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie") |
90 | np->full_name); | ||
91 | continue; | ||
92 | } | ||
93 | mpc83xx_add_bridge(np); | 90 | mpc83xx_add_bridge(np); |
94 | } | ||
95 | #endif | 91 | #endif |
96 | mpc837xmds_usb_cfg(); | 92 | mpc837xmds_usb_cfg(); |
97 | } | 93 | } |
@@ -100,6 +96,7 @@ static struct of_device_id mpc837x_ids[] = { | |||
100 | { .type = "soc", }, | 96 | { .type = "soc", }, |
101 | { .compatible = "soc", }, | 97 | { .compatible = "soc", }, |
102 | { .compatible = "simple-bus", }, | 98 | { .compatible = "simple-bus", }, |
99 | { .compatible = "gianfar", }, | ||
103 | {}, | 100 | {}, |
104 | }; | 101 | }; |
105 | 102 | ||
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c index 1d096545322b..76f3b32a155e 100644 --- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c | |||
@@ -38,6 +38,8 @@ static void __init mpc837x_rdb_setup_arch(void) | |||
38 | #ifdef CONFIG_PCI | 38 | #ifdef CONFIG_PCI |
39 | for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") | 39 | for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") |
40 | mpc83xx_add_bridge(np); | 40 | mpc83xx_add_bridge(np); |
41 | for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie") | ||
42 | mpc83xx_add_bridge(np); | ||
41 | #endif | 43 | #endif |
42 | mpc837x_usb_cfg(); | 44 | mpc837x_usb_cfg(); |
43 | } | 45 | } |
@@ -46,6 +48,7 @@ static struct of_device_id mpc837x_ids[] = { | |||
46 | { .type = "soc", }, | 48 | { .type = "soc", }, |
47 | { .compatible = "soc", }, | 49 | { .compatible = "soc", }, |
48 | { .compatible = "simple-bus", }, | 50 | { .compatible = "simple-bus", }, |
51 | { .compatible = "gianfar", }, | ||
49 | {}, | 52 | {}, |
50 | }; | 53 | }; |
51 | 54 | ||
diff --git a/arch/powerpc/platforms/83xx/sbc834x.c b/arch/powerpc/platforms/83xx/sbc834x.c index 156c4e218009..49023dbe1576 100644 --- a/arch/powerpc/platforms/83xx/sbc834x.c +++ b/arch/powerpc/platforms/83xx/sbc834x.c | |||
@@ -84,6 +84,7 @@ static struct __initdata of_device_id sbc834x_ids[] = { | |||
84 | { .type = "soc", }, | 84 | { .type = "soc", }, |
85 | { .compatible = "soc", }, | 85 | { .compatible = "soc", }, |
86 | { .compatible = "simple-bus", }, | 86 | { .compatible = "simple-bus", }, |
87 | { .compatible = "gianfar", }, | ||
87 | {}, | 88 | {}, |
88 | }; | 89 | }; |
89 | 90 | ||
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c index cc99c280aad9..11e1fac17c7f 100644 --- a/arch/powerpc/platforms/83xx/usb.c +++ b/arch/powerpc/platforms/83xx/usb.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/stddef.h> | 14 | #include <linux/stddef.h> |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
17 | #include <linux/of.h> | ||
17 | 18 | ||
18 | #include <asm/io.h> | 19 | #include <asm/io.h> |
19 | #include <asm/prom.h> | 20 | #include <asm/prom.h> |
@@ -210,7 +211,7 @@ int mpc837x_usb_cfg(void) | |||
210 | int ret = 0; | 211 | int ret = 0; |
211 | 212 | ||
212 | np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr"); | 213 | np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr"); |
213 | if (!np) | 214 | if (!np || !of_device_is_available(np)) |
214 | return -ENODEV; | 215 | return -ENODEV; |
215 | prop = of_get_property(np, "phy_type", NULL); | 216 | prop = of_get_property(np, "phy_type", NULL); |
216 | 217 | ||
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index b79dc710ed34..7f066adc068c 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -51,6 +51,12 @@ config MPC85xx_DS | |||
51 | help | 51 | help |
52 | This option enables support for the MPC85xx DS (MPC8544 DS) board | 52 | This option enables support for the MPC85xx DS (MPC8544 DS) board |
53 | 53 | ||
54 | config SOCRATES | ||
55 | bool "Socrates" | ||
56 | select DEFAULT_UIMAGE | ||
57 | help | ||
58 | This option enables support for the Socrates board. | ||
59 | |||
54 | config KSI8560 | 60 | config KSI8560 |
55 | bool "Emerson KSI8560" | 61 | bool "Emerson KSI8560" |
56 | select DEFAULT_UIMAGE | 62 | select DEFAULT_UIMAGE |
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index f0798c09980f..a857b35b9828 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile | |||
@@ -13,4 +13,5 @@ obj-$(CONFIG_STX_GP3) += stx_gp3.o | |||
13 | obj-$(CONFIG_TQM85xx) += tqm85xx.o | 13 | obj-$(CONFIG_TQM85xx) += tqm85xx.o |
14 | obj-$(CONFIG_SBC8560) += sbc8560.o | 14 | obj-$(CONFIG_SBC8560) += sbc8560.o |
15 | obj-$(CONFIG_SBC8548) += sbc8548.o | 15 | obj-$(CONFIG_SBC8548) += sbc8548.o |
16 | obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o | ||
16 | obj-$(CONFIG_KSI8560) += ksi8560.o | 17 | obj-$(CONFIG_KSI8560) += ksi8560.o |
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c index 81cee7bbf2d2..f4d36b5a2e00 100644 --- a/arch/powerpc/platforms/85xx/ksi8560.c +++ b/arch/powerpc/platforms/85xx/ksi8560.c | |||
@@ -106,8 +106,6 @@ static void __init ksi8560_pic_init(void) | |||
106 | cpm2_pic_init(np); | 106 | cpm2_pic_init(np); |
107 | of_node_put(np); | 107 | of_node_put(np); |
108 | set_irq_chained_handler(irq, cpm2_cascade); | 108 | set_irq_chained_handler(irq, cpm2_cascade); |
109 | |||
110 | setup_irq(0, NULL); | ||
111 | #endif | 109 | #endif |
112 | } | 110 | } |
113 | 111 | ||
@@ -221,6 +219,7 @@ static struct of_device_id __initdata of_bus_ids[] = { | |||
221 | { .type = "simple-bus", }, | 219 | { .type = "simple-bus", }, |
222 | { .name = "cpm", }, | 220 | { .name = "cpm", }, |
223 | { .name = "localbus", }, | 221 | { .name = "localbus", }, |
222 | { .compatible = "gianfar", }, | ||
224 | {}, | 223 | {}, |
225 | }; | 224 | }; |
226 | 225 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c index 1bf5aefdfeb1..63efca20d7bd 100644 --- a/arch/powerpc/platforms/85xx/mpc8536_ds.c +++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c | |||
@@ -92,6 +92,7 @@ static struct of_device_id __initdata mpc8536_ds_ids[] = { | |||
92 | { .type = "soc", }, | 92 | { .type = "soc", }, |
93 | { .compatible = "soc", }, | 93 | { .compatible = "soc", }, |
94 | { .compatible = "simple-bus", }, | 94 | { .compatible = "simple-bus", }, |
95 | { .compatible = "gianfar", }, | ||
95 | {}, | 96 | {}, |
96 | }; | 97 | }; |
97 | 98 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 21f009023e26..9438a892afc4 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c | |||
@@ -226,6 +226,7 @@ static struct of_device_id __initdata of_bus_ids[] = { | |||
226 | { .name = "cpm", }, | 226 | { .name = "cpm", }, |
227 | { .name = "localbus", }, | 227 | { .name = "localbus", }, |
228 | { .compatible = "simple-bus", }, | 228 | { .compatible = "simple-bus", }, |
229 | { .compatible = "gianfar", }, | ||
229 | {}, | 230 | {}, |
230 | }; | 231 | }; |
231 | 232 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index aeb6a5bc5522..0a9e49104bdc 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c | |||
@@ -336,6 +336,7 @@ static struct of_device_id __initdata of_bus_ids[] = { | |||
336 | { .type = "soc", }, | 336 | { .type = "soc", }, |
337 | { .compatible = "soc", }, | 337 | { .compatible = "soc", }, |
338 | { .compatible = "simple-bus", }, | 338 | { .compatible = "simple-bus", }, |
339 | { .compatible = "gianfar", }, | ||
339 | {}, | 340 | {}, |
340 | }; | 341 | }; |
341 | 342 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index 7326d904202c..de66de7a9ca2 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c | |||
@@ -204,6 +204,7 @@ static struct of_device_id __initdata mpc85xxds_ids[] = { | |||
204 | { .type = "soc", }, | 204 | { .type = "soc", }, |
205 | { .compatible = "soc", }, | 205 | { .compatible = "soc", }, |
206 | { .compatible = "simple-bus", }, | 206 | { .compatible = "simple-bus", }, |
207 | { .compatible = "gianfar", }, | ||
207 | {}, | 208 | {}, |
208 | }; | 209 | }; |
209 | 210 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 658a36fab3ab..7dd029034aec 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c | |||
@@ -265,6 +265,7 @@ static struct of_device_id mpc85xx_ids[] = { | |||
265 | { .compatible = "simple-bus", }, | 265 | { .compatible = "simple-bus", }, |
266 | { .type = "qe", }, | 266 | { .type = "qe", }, |
267 | { .compatible = "fsl,qe", }, | 267 | { .compatible = "fsl,qe", }, |
268 | { .compatible = "gianfar", }, | ||
268 | {}, | 269 | {}, |
269 | }; | 270 | }; |
270 | 271 | ||
diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c index 7ec77ce12dad..ecdd8c09e4ed 100644 --- a/arch/powerpc/platforms/85xx/sbc8548.c +++ b/arch/powerpc/platforms/85xx/sbc8548.c | |||
@@ -154,6 +154,7 @@ static struct of_device_id __initdata of_bus_ids[] = { | |||
154 | { .name = "soc", }, | 154 | { .name = "soc", }, |
155 | { .type = "soc", }, | 155 | { .type = "soc", }, |
156 | { .compatible = "simple-bus", }, | 156 | { .compatible = "simple-bus", }, |
157 | { .compatible = "gianfar", }, | ||
157 | {}, | 158 | {}, |
158 | }; | 159 | }; |
159 | 160 | ||
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c index 472f254a19d2..cc27807a8b64 100644 --- a/arch/powerpc/platforms/85xx/sbc8560.c +++ b/arch/powerpc/platforms/85xx/sbc8560.c | |||
@@ -213,6 +213,7 @@ static struct of_device_id __initdata of_bus_ids[] = { | |||
213 | { .name = "cpm", }, | 213 | { .name = "cpm", }, |
214 | { .name = "localbus", }, | 214 | { .name = "localbus", }, |
215 | { .compatible = "simple-bus", }, | 215 | { .compatible = "simple-bus", }, |
216 | { .compatible = "gianfar", }, | ||
216 | {}, | 217 | {}, |
217 | }; | 218 | }; |
218 | 219 | ||
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c index 79a0df17078b..cc0b0db8a6f3 100644 --- a/arch/powerpc/platforms/85xx/smp.c +++ b/arch/powerpc/platforms/85xx/smp.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <asm/page.h> | 21 | #include <asm/page.h> |
22 | #include <asm/mpic.h> | 22 | #include <asm/mpic.h> |
23 | #include <asm/cacheflush.h> | 23 | #include <asm/cacheflush.h> |
24 | #include <asm/dbell.h> | ||
24 | 25 | ||
25 | #include <sysdev/fsl_soc.h> | 26 | #include <sysdev/fsl_soc.h> |
26 | 27 | ||
@@ -80,10 +81,8 @@ smp_85xx_kick_cpu(int nr) | |||
80 | } | 81 | } |
81 | 82 | ||
82 | static void __init | 83 | static void __init |
83 | smp_85xx_setup_cpu(int cpu_nr) | 84 | smp_85xx_basic_setup(int cpu_nr) |
84 | { | 85 | { |
85 | mpic_setup_this_cpu(); | ||
86 | |||
87 | /* Clear any pending timer interrupts */ | 86 | /* Clear any pending timer interrupts */ |
88 | mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); | 87 | mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); |
89 | 88 | ||
@@ -91,15 +90,43 @@ smp_85xx_setup_cpu(int cpu_nr) | |||
91 | mtspr(SPRN_TCR, TCR_DIE); | 90 | mtspr(SPRN_TCR, TCR_DIE); |
92 | } | 91 | } |
93 | 92 | ||
93 | static void __init | ||
94 | smp_85xx_setup_cpu(int cpu_nr) | ||
95 | { | ||
96 | mpic_setup_this_cpu(); | ||
97 | |||
98 | smp_85xx_basic_setup(cpu_nr); | ||
99 | } | ||
100 | |||
94 | struct smp_ops_t smp_85xx_ops = { | 101 | struct smp_ops_t smp_85xx_ops = { |
95 | .message_pass = smp_mpic_message_pass, | ||
96 | .probe = smp_mpic_probe, | ||
97 | .kick_cpu = smp_85xx_kick_cpu, | 102 | .kick_cpu = smp_85xx_kick_cpu, |
98 | .setup_cpu = smp_85xx_setup_cpu, | ||
99 | }; | 103 | }; |
100 | 104 | ||
101 | void __init | 105 | static int __init smp_dummy_probe(void) |
102 | mpc85xx_smp_init(void) | ||
103 | { | 106 | { |
107 | return NR_CPUS; | ||
108 | } | ||
109 | |||
110 | void __init mpc85xx_smp_init(void) | ||
111 | { | ||
112 | struct device_node *np; | ||
113 | |||
114 | smp_85xx_ops.message_pass = NULL; | ||
115 | |||
116 | np = of_find_node_by_type(NULL, "open-pic"); | ||
117 | if (np) { | ||
118 | smp_85xx_ops.probe = smp_mpic_probe; | ||
119 | smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu; | ||
120 | smp_85xx_ops.message_pass = smp_mpic_message_pass; | ||
121 | } else { | ||
122 | smp_85xx_ops.probe = smp_dummy_probe; | ||
123 | smp_85xx_ops.setup_cpu = smp_85xx_basic_setup; | ||
124 | } | ||
125 | |||
126 | if (cpu_has_feature(CPU_FTR_DBELL)) | ||
127 | smp_85xx_ops.message_pass = smp_dbell_message_pass; | ||
128 | |||
129 | BUG_ON(!smp_85xx_ops.message_pass); | ||
130 | |||
104 | smp_ops = &smp_85xx_ops; | 131 | smp_ops = &smp_85xx_ops; |
105 | } | 132 | } |
diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c new file mode 100644 index 000000000000..d0e8443b12c6 --- /dev/null +++ b/arch/powerpc/platforms/85xx/socrates.c | |||
@@ -0,0 +1,133 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2008 Emcraft Systems | ||
3 | * Sergei Poselenov <sposelenov@emcraft.com> | ||
4 | * | ||
5 | * Based on MPC8560 ADS and arch/ppc tqm85xx ports | ||
6 | * | ||
7 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) | ||
8 | * | ||
9 | * Copyright 2008 Freescale Semiconductor Inc. | ||
10 | * | ||
11 | * Copyright (c) 2005-2006 DENX Software Engineering | ||
12 | * Stefan Roese <sr@denx.de> | ||
13 | * | ||
14 | * Based on original work by | ||
15 | * Kumar Gala <kumar.gala@freescale.com> | ||
16 | * Copyright 2004 Freescale Semiconductor Inc. | ||
17 | * | ||
18 | * This program is free software; you can redistribute it and/or modify it | ||
19 | * under the terms of the GNU General Public License as published by the | ||
20 | * Free Software Foundation; either version 2 of the License, or (at your | ||
21 | * option) any later version. | ||
22 | */ | ||
23 | |||
24 | #include <linux/stddef.h> | ||
25 | #include <linux/kernel.h> | ||
26 | #include <linux/pci.h> | ||
27 | #include <linux/kdev_t.h> | ||
28 | #include <linux/delay.h> | ||
29 | #include <linux/seq_file.h> | ||
30 | #include <linux/of_platform.h> | ||
31 | |||
32 | #include <asm/system.h> | ||
33 | #include <asm/time.h> | ||
34 | #include <asm/machdep.h> | ||
35 | #include <asm/pci-bridge.h> | ||
36 | #include <asm/mpic.h> | ||
37 | #include <asm/prom.h> | ||
38 | #include <mm/mmu_decl.h> | ||
39 | #include <asm/udbg.h> | ||
40 | |||
41 | #include <sysdev/fsl_soc.h> | ||
42 | #include <sysdev/fsl_pci.h> | ||
43 | |||
44 | #include "socrates_fpga_pic.h" | ||
45 | |||
46 | static void __init socrates_pic_init(void) | ||
47 | { | ||
48 | struct mpic *mpic; | ||
49 | struct resource r; | ||
50 | struct device_node *np; | ||
51 | |||
52 | np = of_find_node_by_type(NULL, "open-pic"); | ||
53 | if (!np) { | ||
54 | printk(KERN_ERR "Could not find open-pic node\n"); | ||
55 | return; | ||
56 | } | ||
57 | |||
58 | if (of_address_to_resource(np, 0, &r)) { | ||
59 | printk(KERN_ERR "Could not map mpic register space\n"); | ||
60 | of_node_put(np); | ||
61 | return; | ||
62 | } | ||
63 | |||
64 | mpic = mpic_alloc(np, r.start, | ||
65 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | ||
66 | 0, 256, " OpenPIC "); | ||
67 | BUG_ON(mpic == NULL); | ||
68 | of_node_put(np); | ||
69 | |||
70 | mpic_init(mpic); | ||
71 | |||
72 | np = of_find_compatible_node(NULL, NULL, "abb,socrates-fpga-pic"); | ||
73 | if (!np) { | ||
74 | printk(KERN_ERR "Could not find socrates-fpga-pic node\n"); | ||
75 | return; | ||
76 | } | ||
77 | socrates_fpga_pic_init(np); | ||
78 | of_node_put(np); | ||
79 | } | ||
80 | |||
81 | /* | ||
82 | * Setup the architecture | ||
83 | */ | ||
84 | static void __init socrates_setup_arch(void) | ||
85 | { | ||
86 | #ifdef CONFIG_PCI | ||
87 | struct device_node *np; | ||
88 | #endif | ||
89 | |||
90 | if (ppc_md.progress) | ||
91 | ppc_md.progress("socrates_setup_arch()", 0); | ||
92 | |||
93 | #ifdef CONFIG_PCI | ||
94 | for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") | ||
95 | fsl_add_bridge(np, 1); | ||
96 | #endif | ||
97 | } | ||
98 | |||
99 | static struct of_device_id __initdata socrates_of_bus_ids[] = { | ||
100 | { .compatible = "simple-bus", }, | ||
101 | { .compatible = "gianfar", }, | ||
102 | {}, | ||
103 | }; | ||
104 | |||
105 | static void __init socrates_init(void) | ||
106 | { | ||
107 | of_platform_bus_probe(NULL, socrates_of_bus_ids, NULL); | ||
108 | } | ||
109 | |||
110 | /* | ||
111 | * Called very early, device-tree isn't unflattened | ||
112 | */ | ||
113 | static int __init socrates_probe(void) | ||
114 | { | ||
115 | unsigned long root = of_get_flat_dt_root(); | ||
116 | |||
117 | if (of_flat_dt_is_compatible(root, "abb,socrates")) | ||
118 | return 1; | ||
119 | |||
120 | return 0; | ||
121 | } | ||
122 | |||
123 | define_machine(socrates) { | ||
124 | .name = "Socrates", | ||
125 | .probe = socrates_probe, | ||
126 | .setup_arch = socrates_setup_arch, | ||
127 | .init = socrates_init, | ||
128 | .init_IRQ = socrates_pic_init, | ||
129 | .get_irq = mpic_get_irq, | ||
130 | .restart = fsl_rstcr_restart, | ||
131 | .calibrate_decr = generic_calibrate_decr, | ||
132 | .progress = udbg_progress, | ||
133 | }; | ||
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c new file mode 100644 index 000000000000..60edf63d0157 --- /dev/null +++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c | |||
@@ -0,0 +1,327 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Ilya Yanok, Emcraft Systems | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | */ | ||
10 | |||
11 | #include <linux/irq.h> | ||
12 | #include <linux/of_platform.h> | ||
13 | #include <linux/io.h> | ||
14 | |||
15 | /* | ||
16 | * The FPGA supports 9 interrupt sources, which can be routed to 3 | ||
17 | * interrupt request lines of the MPIC. The line to be used can be | ||
18 | * specified through the third cell of FDT property "interrupts". | ||
19 | */ | ||
20 | |||
21 | #define SOCRATES_FPGA_NUM_IRQS 9 | ||
22 | |||
23 | #define FPGA_PIC_IRQCFG (0x0) | ||
24 | #define FPGA_PIC_IRQMASK(n) (0x4 + 0x4 * (n)) | ||
25 | |||
26 | #define SOCRATES_FPGA_IRQ_MASK ((1 << SOCRATES_FPGA_NUM_IRQS) - 1) | ||
27 | |||
28 | struct socrates_fpga_irq_info { | ||
29 | unsigned int irq_line; | ||
30 | int type; | ||
31 | }; | ||
32 | |||
33 | /* | ||
34 | * Interrupt routing and type table | ||
35 | * | ||
36 | * IRQ_TYPE_NONE means the interrupt type is configurable, | ||
37 | * otherwise it's fixed to the specified value. | ||
38 | */ | ||
39 | static struct socrates_fpga_irq_info fpga_irqs[SOCRATES_FPGA_NUM_IRQS] = { | ||
40 | [0] = {0, IRQ_TYPE_NONE}, | ||
41 | [1] = {0, IRQ_TYPE_LEVEL_HIGH}, | ||
42 | [2] = {0, IRQ_TYPE_LEVEL_LOW}, | ||
43 | [3] = {0, IRQ_TYPE_NONE}, | ||
44 | [4] = {0, IRQ_TYPE_NONE}, | ||
45 | [5] = {0, IRQ_TYPE_NONE}, | ||
46 | [6] = {0, IRQ_TYPE_NONE}, | ||
47 | [7] = {0, IRQ_TYPE_NONE}, | ||
48 | [8] = {0, IRQ_TYPE_LEVEL_HIGH}, | ||
49 | }; | ||
50 | |||
51 | #define socrates_fpga_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | ||
52 | |||
53 | static DEFINE_SPINLOCK(socrates_fpga_pic_lock); | ||
54 | |||
55 | static void __iomem *socrates_fpga_pic_iobase; | ||
56 | static struct irq_host *socrates_fpga_pic_irq_host; | ||
57 | static unsigned int socrates_fpga_irqs[3]; | ||
58 | |||
59 | static inline uint32_t socrates_fpga_pic_read(int reg) | ||
60 | { | ||
61 | return in_be32(socrates_fpga_pic_iobase + reg); | ||
62 | } | ||
63 | |||
64 | static inline void socrates_fpga_pic_write(int reg, uint32_t val) | ||
65 | { | ||
66 | out_be32(socrates_fpga_pic_iobase + reg, val); | ||
67 | } | ||
68 | |||
69 | static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq) | ||
70 | { | ||
71 | uint32_t cause; | ||
72 | unsigned long flags; | ||
73 | int i; | ||
74 | |||
75 | /* Check irq line routed to the MPIC */ | ||
76 | for (i = 0; i < 3; i++) { | ||
77 | if (irq == socrates_fpga_irqs[i]) | ||
78 | break; | ||
79 | } | ||
80 | if (i == 3) | ||
81 | return NO_IRQ; | ||
82 | |||
83 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | ||
84 | cause = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(i)); | ||
85 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | ||
86 | for (i = SOCRATES_FPGA_NUM_IRQS - 1; i >= 0; i--) { | ||
87 | if (cause >> (i + 16)) | ||
88 | break; | ||
89 | } | ||
90 | return irq_linear_revmap(socrates_fpga_pic_irq_host, | ||
91 | (irq_hw_number_t)i); | ||
92 | } | ||
93 | |||
94 | void socrates_fpga_pic_cascade(unsigned int irq, struct irq_desc *desc) | ||
95 | { | ||
96 | unsigned int cascade_irq; | ||
97 | |||
98 | /* | ||
99 | * See if we actually have an interrupt, call generic handling code if | ||
100 | * we do. | ||
101 | */ | ||
102 | cascade_irq = socrates_fpga_pic_get_irq(irq); | ||
103 | |||
104 | if (cascade_irq != NO_IRQ) | ||
105 | generic_handle_irq(cascade_irq); | ||
106 | desc->chip->eoi(irq); | ||
107 | |||
108 | } | ||
109 | |||
110 | static void socrates_fpga_pic_ack(unsigned int virq) | ||
111 | { | ||
112 | unsigned long flags; | ||
113 | unsigned int hwirq, irq_line; | ||
114 | uint32_t mask; | ||
115 | |||
116 | hwirq = socrates_fpga_irq_to_hw(virq); | ||
117 | |||
118 | irq_line = fpga_irqs[hwirq].irq_line; | ||
119 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | ||
120 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | ||
121 | & SOCRATES_FPGA_IRQ_MASK; | ||
122 | mask |= (1 << (hwirq + 16)); | ||
123 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); | ||
124 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | ||
125 | } | ||
126 | |||
127 | static void socrates_fpga_pic_mask(unsigned int virq) | ||
128 | { | ||
129 | unsigned long flags; | ||
130 | unsigned int hwirq; | ||
131 | int irq_line; | ||
132 | u32 mask; | ||
133 | |||
134 | hwirq = socrates_fpga_irq_to_hw(virq); | ||
135 | |||
136 | irq_line = fpga_irqs[hwirq].irq_line; | ||
137 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | ||
138 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | ||
139 | & SOCRATES_FPGA_IRQ_MASK; | ||
140 | mask &= ~(1 << hwirq); | ||
141 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); | ||
142 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | ||
143 | } | ||
144 | |||
145 | static void socrates_fpga_pic_mask_ack(unsigned int virq) | ||
146 | { | ||
147 | unsigned long flags; | ||
148 | unsigned int hwirq; | ||
149 | int irq_line; | ||
150 | u32 mask; | ||
151 | |||
152 | hwirq = socrates_fpga_irq_to_hw(virq); | ||
153 | |||
154 | irq_line = fpga_irqs[hwirq].irq_line; | ||
155 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | ||
156 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | ||
157 | & SOCRATES_FPGA_IRQ_MASK; | ||
158 | mask &= ~(1 << hwirq); | ||
159 | mask |= (1 << (hwirq + 16)); | ||
160 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); | ||
161 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | ||
162 | } | ||
163 | |||
164 | static void socrates_fpga_pic_unmask(unsigned int virq) | ||
165 | { | ||
166 | unsigned long flags; | ||
167 | unsigned int hwirq; | ||
168 | int irq_line; | ||
169 | u32 mask; | ||
170 | |||
171 | hwirq = socrates_fpga_irq_to_hw(virq); | ||
172 | |||
173 | irq_line = fpga_irqs[hwirq].irq_line; | ||
174 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | ||
175 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | ||
176 | & SOCRATES_FPGA_IRQ_MASK; | ||
177 | mask |= (1 << hwirq); | ||
178 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); | ||
179 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | ||
180 | } | ||
181 | |||
182 | static void socrates_fpga_pic_eoi(unsigned int virq) | ||
183 | { | ||
184 | unsigned long flags; | ||
185 | unsigned int hwirq; | ||
186 | int irq_line; | ||
187 | u32 mask; | ||
188 | |||
189 | hwirq = socrates_fpga_irq_to_hw(virq); | ||
190 | |||
191 | irq_line = fpga_irqs[hwirq].irq_line; | ||
192 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | ||
193 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | ||
194 | & SOCRATES_FPGA_IRQ_MASK; | ||
195 | mask |= (1 << (hwirq + 16)); | ||
196 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); | ||
197 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | ||
198 | } | ||
199 | |||
200 | static int socrates_fpga_pic_set_type(unsigned int virq, | ||
201 | unsigned int flow_type) | ||
202 | { | ||
203 | unsigned long flags; | ||
204 | unsigned int hwirq; | ||
205 | int polarity; | ||
206 | u32 mask; | ||
207 | |||
208 | hwirq = socrates_fpga_irq_to_hw(virq); | ||
209 | |||
210 | if (fpga_irqs[hwirq].type != IRQ_TYPE_NONE) | ||
211 | return -EINVAL; | ||
212 | |||
213 | switch (flow_type & IRQ_TYPE_SENSE_MASK) { | ||
214 | case IRQ_TYPE_LEVEL_HIGH: | ||
215 | polarity = 1; | ||
216 | break; | ||
217 | case IRQ_TYPE_LEVEL_LOW: | ||
218 | polarity = 0; | ||
219 | break; | ||
220 | default: | ||
221 | return -EINVAL; | ||
222 | } | ||
223 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | ||
224 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQCFG); | ||
225 | if (polarity) | ||
226 | mask |= (1 << hwirq); | ||
227 | else | ||
228 | mask &= ~(1 << hwirq); | ||
229 | socrates_fpga_pic_write(FPGA_PIC_IRQCFG, mask); | ||
230 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | ||
231 | return 0; | ||
232 | } | ||
233 | |||
234 | static struct irq_chip socrates_fpga_pic_chip = { | ||
235 | .typename = " FPGA-PIC ", | ||
236 | .ack = socrates_fpga_pic_ack, | ||
237 | .mask = socrates_fpga_pic_mask, | ||
238 | .mask_ack = socrates_fpga_pic_mask_ack, | ||
239 | .unmask = socrates_fpga_pic_unmask, | ||
240 | .eoi = socrates_fpga_pic_eoi, | ||
241 | .set_type = socrates_fpga_pic_set_type, | ||
242 | }; | ||
243 | |||
244 | static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq, | ||
245 | irq_hw_number_t hwirq) | ||
246 | { | ||
247 | /* All interrupts are LEVEL sensitive */ | ||
248 | get_irq_desc(virq)->status |= IRQ_LEVEL; | ||
249 | set_irq_chip_and_handler(virq, &socrates_fpga_pic_chip, | ||
250 | handle_fasteoi_irq); | ||
251 | |||
252 | return 0; | ||
253 | } | ||
254 | |||
255 | static int socrates_fpga_pic_host_xlate(struct irq_host *h, | ||
256 | struct device_node *ct, u32 *intspec, unsigned int intsize, | ||
257 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | ||
258 | { | ||
259 | struct socrates_fpga_irq_info *fpga_irq = &fpga_irqs[intspec[0]]; | ||
260 | |||
261 | *out_hwirq = intspec[0]; | ||
262 | if (fpga_irq->type == IRQ_TYPE_NONE) { | ||
263 | /* type is configurable */ | ||
264 | if (intspec[1] != IRQ_TYPE_LEVEL_LOW && | ||
265 | intspec[1] != IRQ_TYPE_LEVEL_HIGH) { | ||
266 | pr_warning("FPGA PIC: invalid irq type, " | ||
267 | "setting default active low\n"); | ||
268 | *out_flags = IRQ_TYPE_LEVEL_LOW; | ||
269 | } else { | ||
270 | *out_flags = intspec[1]; | ||
271 | } | ||
272 | } else { | ||
273 | /* type is fixed */ | ||
274 | *out_flags = fpga_irq->type; | ||
275 | } | ||
276 | |||
277 | /* Use specified interrupt routing */ | ||
278 | if (intspec[2] <= 2) | ||
279 | fpga_irq->irq_line = intspec[2]; | ||
280 | else | ||
281 | pr_warning("FPGA PIC: invalid irq routing\n"); | ||
282 | |||
283 | return 0; | ||
284 | } | ||
285 | |||
286 | static struct irq_host_ops socrates_fpga_pic_host_ops = { | ||
287 | .map = socrates_fpga_pic_host_map, | ||
288 | .xlate = socrates_fpga_pic_host_xlate, | ||
289 | }; | ||
290 | |||
291 | void socrates_fpga_pic_init(struct device_node *pic) | ||
292 | { | ||
293 | unsigned long flags; | ||
294 | int i; | ||
295 | |||
296 | /* Setup an irq_host structure */ | ||
297 | socrates_fpga_pic_irq_host = irq_alloc_host(pic, IRQ_HOST_MAP_LINEAR, | ||
298 | SOCRATES_FPGA_NUM_IRQS, &socrates_fpga_pic_host_ops, | ||
299 | SOCRATES_FPGA_NUM_IRQS); | ||
300 | if (socrates_fpga_pic_irq_host == NULL) { | ||
301 | pr_err("FPGA PIC: Unable to allocate host\n"); | ||
302 | return; | ||
303 | } | ||
304 | |||
305 | for (i = 0; i < 3; i++) { | ||
306 | socrates_fpga_irqs[i] = irq_of_parse_and_map(pic, i); | ||
307 | if (socrates_fpga_irqs[i] == NO_IRQ) { | ||
308 | pr_warning("FPGA PIC: can't get irq%d.\n", i); | ||
309 | continue; | ||
310 | } | ||
311 | set_irq_chained_handler(socrates_fpga_irqs[i], | ||
312 | socrates_fpga_pic_cascade); | ||
313 | } | ||
314 | |||
315 | socrates_fpga_pic_iobase = of_iomap(pic, 0); | ||
316 | |||
317 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | ||
318 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(0), | ||
319 | SOCRATES_FPGA_IRQ_MASK << 16); | ||
320 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(1), | ||
321 | SOCRATES_FPGA_IRQ_MASK << 16); | ||
322 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(2), | ||
323 | SOCRATES_FPGA_IRQ_MASK << 16); | ||
324 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | ||
325 | |||
326 | pr_info("FPGA PIC: Setting up Socrates FPGA PIC\n"); | ||
327 | } | ||
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.h b/arch/powerpc/platforms/85xx/socrates_fpga_pic.h new file mode 100644 index 000000000000..21d7d8e42199 --- /dev/null +++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.h | |||
@@ -0,0 +1,16 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Ilya Yanok, Emcraft Systems | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | */ | ||
10 | |||
11 | #ifndef SOCRATES_FPGA_PIC_H | ||
12 | #define SOCRATES_FPGA_PIC_H | ||
13 | |||
14 | void socrates_fpga_pic_init(struct device_node *pic); | ||
15 | |||
16 | #endif | ||
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c index 0cca8f5cb272..f559918f3c6f 100644 --- a/arch/powerpc/platforms/85xx/stx_gp3.c +++ b/arch/powerpc/platforms/85xx/stx_gp3.c | |||
@@ -145,6 +145,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m) | |||
145 | 145 | ||
146 | static struct of_device_id __initdata of_bus_ids[] = { | 146 | static struct of_device_id __initdata of_bus_ids[] = { |
147 | { .compatible = "simple-bus", }, | 147 | { .compatible = "simple-bus", }, |
148 | { .compatible = "gianfar", }, | ||
148 | {}, | 149 | {}, |
149 | }; | 150 | }; |
150 | 151 | ||
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c index 2933a8e827d9..5b0ab9966e90 100644 --- a/arch/powerpc/platforms/85xx/tqm85xx.c +++ b/arch/powerpc/platforms/85xx/tqm85xx.c | |||
@@ -153,6 +153,7 @@ static void tqm85xx_show_cpuinfo(struct seq_file *m) | |||
153 | 153 | ||
154 | static struct of_device_id __initdata of_bus_ids[] = { | 154 | static struct of_device_id __initdata of_bus_ids[] = { |
155 | { .compatible = "simple-bus", }, | 155 | { .compatible = "simple-bus", }, |
156 | { .compatible = "gianfar", }, | ||
156 | {}, | 157 | {}, |
157 | }; | 158 | }; |
158 | 159 | ||
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig index 8e5693935975..fdaf4ddaa955 100644 --- a/arch/powerpc/platforms/86xx/Kconfig +++ b/arch/powerpc/platforms/86xx/Kconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | config PPC_86xx | 1 | config PPC_86xx |
2 | menuconfig PPC_86xx | 2 | menuconfig PPC_86xx |
3 | bool "86xx-based boards" | 3 | bool "86xx-based boards" |
4 | depends on 6xx && PPC_MULTIPLATFORM | 4 | depends on 6xx |
5 | select FSL_SOC | 5 | select FSL_SOC |
6 | select ALTIVEC | 6 | select ALTIVEC |
7 | help | 7 | help |
@@ -31,6 +31,22 @@ config MPC8610_HPCD | |||
31 | help | 31 | help |
32 | This option enables support for the MPC8610 HPCD board. | 32 | This option enables support for the MPC8610 HPCD board. |
33 | 33 | ||
34 | config GEF_PPC9A | ||
35 | bool "GE Fanuc PPC9A" | ||
36 | select DEFAULT_UIMAGE | ||
37 | select GENERIC_GPIO | ||
38 | select ARCH_REQUIRE_GPIOLIB | ||
39 | help | ||
40 | This option enables support for GE Fanuc's PPC9A. | ||
41 | |||
42 | config GEF_SBC310 | ||
43 | bool "GE Fanuc SBC310" | ||
44 | select DEFAULT_UIMAGE | ||
45 | select GENERIC_GPIO | ||
46 | select ARCH_REQUIRE_GPIOLIB | ||
47 | help | ||
48 | This option enables support for GE Fanuc's SBC310. | ||
49 | |||
34 | config GEF_SBC610 | 50 | config GEF_SBC610 |
35 | bool "GE Fanuc SBC610" | 51 | bool "GE Fanuc SBC610" |
36 | select DEFAULT_UIMAGE | 52 | select DEFAULT_UIMAGE |
@@ -48,7 +64,7 @@ config MPC8641 | |||
48 | select FSL_PCI if PCI | 64 | select FSL_PCI if PCI |
49 | select PPC_UDBG_16550 | 65 | select PPC_UDBG_16550 |
50 | select MPIC | 66 | select MPIC |
51 | default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 | 67 | default y if MPC8641_HPCN || SBC8641D || GEF_SBC610 || GEF_SBC310 || GEF_PPC9A |
52 | 68 | ||
53 | config MPC8610 | 69 | config MPC8610 |
54 | bool | 70 | bool |
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile index 31e540c2ebbc..4b0d7b1aa005 100644 --- a/arch/powerpc/platforms/86xx/Makefile +++ b/arch/powerpc/platforms/86xx/Makefile | |||
@@ -9,3 +9,5 @@ obj-$(CONFIG_SBC8641D) += sbc8641d.o | |||
9 | obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o | 9 | obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o |
10 | gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o | 10 | gef-gpio-$(CONFIG_GPIOLIB) += gef_gpio.o |
11 | obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y) | 11 | obj-$(CONFIG_GEF_SBC610) += gef_sbc610.o gef_pic.o $(gef-gpio-y) |
12 | obj-$(CONFIG_GEF_SBC310) += gef_sbc310.o gef_pic.o $(gef-gpio-y) | ||
13 | obj-$(CONFIG_GEF_PPC9A) += gef_ppc9a.o gef_pic.o $(gef-gpio-y) | ||
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c index 85b2800f4cb7..b2ea8875adba 100644 --- a/arch/powerpc/platforms/86xx/gef_gpio.c +++ b/arch/powerpc/platforms/86xx/gef_gpio.c | |||
@@ -37,8 +37,6 @@ | |||
37 | #define GEF_GPIO_OVERRUN 0x1C | 37 | #define GEF_GPIO_OVERRUN 0x1C |
38 | #define GEF_GPIO_MODE 0x20 | 38 | #define GEF_GPIO_MODE 0x20 |
39 | 39 | ||
40 | #define NUM_GPIO 19 | ||
41 | |||
42 | static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value) | 40 | static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value) |
43 | { | 41 | { |
44 | unsigned int data; | 42 | unsigned int data; |
@@ -103,10 +101,10 @@ static void gef_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
103 | static int __init gef_gpio_init(void) | 101 | static int __init gef_gpio_init(void) |
104 | { | 102 | { |
105 | struct device_node *np; | 103 | struct device_node *np; |
104 | int retval; | ||
105 | struct of_mm_gpio_chip *gef_gpio_chip; | ||
106 | 106 | ||
107 | for_each_compatible_node(np, NULL, "gef,sbc610-gpio") { | 107 | for_each_compatible_node(np, NULL, "gef,sbc610-gpio") { |
108 | int retval; | ||
109 | struct of_mm_gpio_chip *gef_gpio_chip; | ||
110 | 108 | ||
111 | pr_debug("%s: Initialising GEF GPIO\n", np->full_name); | 109 | pr_debug("%s: Initialising GEF GPIO\n", np->full_name); |
112 | 110 | ||
@@ -120,7 +118,35 @@ static int __init gef_gpio_init(void) | |||
120 | 118 | ||
121 | /* Setup pointers to chip functions */ | 119 | /* Setup pointers to chip functions */ |
122 | gef_gpio_chip->of_gc.gpio_cells = 2; | 120 | gef_gpio_chip->of_gc.gpio_cells = 2; |
123 | gef_gpio_chip->of_gc.gc.ngpio = NUM_GPIO; | 121 | gef_gpio_chip->of_gc.gc.ngpio = 19; |
122 | gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in; | ||
123 | gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out; | ||
124 | gef_gpio_chip->of_gc.gc.get = gef_gpio_get; | ||
125 | gef_gpio_chip->of_gc.gc.set = gef_gpio_set; | ||
126 | |||
127 | /* This function adds a memory mapped GPIO chip */ | ||
128 | retval = of_mm_gpiochip_add(np, gef_gpio_chip); | ||
129 | if (retval) { | ||
130 | kfree(gef_gpio_chip); | ||
131 | pr_err("%s: Unable to add GPIO\n", np->full_name); | ||
132 | } | ||
133 | } | ||
134 | |||
135 | for_each_compatible_node(np, NULL, "gef,sbc310-gpio") { | ||
136 | |||
137 | pr_debug("%s: Initialising GEF GPIO\n", np->full_name); | ||
138 | |||
139 | /* Allocate chip structure */ | ||
140 | gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL); | ||
141 | if (!gef_gpio_chip) { | ||
142 | pr_err("%s: Unable to allocate structure\n", | ||
143 | np->full_name); | ||
144 | continue; | ||
145 | } | ||
146 | |||
147 | /* Setup pointers to chip functions */ | ||
148 | gef_gpio_chip->of_gc.gpio_cells = 2; | ||
149 | gef_gpio_chip->of_gc.gc.ngpio = 6; | ||
124 | gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in; | 150 | gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in; |
125 | gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out; | 151 | gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out; |
126 | gef_gpio_chip->of_gc.gc.get = gef_gpio_get; | 152 | gef_gpio_chip->of_gc.gc.get = gef_gpio_get; |
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c new file mode 100644 index 000000000000..d79104669cdc --- /dev/null +++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c | |||
@@ -0,0 +1,224 @@ | |||
1 | /* | ||
2 | * GE Fanuc PPC9A board support | ||
3 | * | ||
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | ||
5 | * | ||
6 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | * | ||
13 | * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines) | ||
14 | * Copyright 2006 Freescale Semiconductor Inc. | ||
15 | * | ||
16 | * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c | ||
17 | */ | ||
18 | |||
19 | #include <linux/stddef.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/pci.h> | ||
22 | #include <linux/kdev_t.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <linux/seq_file.h> | ||
25 | #include <linux/of_platform.h> | ||
26 | |||
27 | #include <asm/system.h> | ||
28 | #include <asm/time.h> | ||
29 | #include <asm/machdep.h> | ||
30 | #include <asm/pci-bridge.h> | ||
31 | #include <asm/mpc86xx.h> | ||
32 | #include <asm/prom.h> | ||
33 | #include <mm/mmu_decl.h> | ||
34 | #include <asm/udbg.h> | ||
35 | |||
36 | #include <asm/mpic.h> | ||
37 | |||
38 | #include <sysdev/fsl_pci.h> | ||
39 | #include <sysdev/fsl_soc.h> | ||
40 | |||
41 | #include "mpc86xx.h" | ||
42 | #include "gef_pic.h" | ||
43 | |||
44 | #undef DEBUG | ||
45 | |||
46 | #ifdef DEBUG | ||
47 | #define DBG (fmt...) do { printk(KERN_ERR "PPC9A: " fmt); } while (0) | ||
48 | #else | ||
49 | #define DBG (fmt...) do { } while (0) | ||
50 | #endif | ||
51 | |||
52 | void __iomem *ppc9a_regs; | ||
53 | |||
54 | static void __init gef_ppc9a_init_irq(void) | ||
55 | { | ||
56 | struct device_node *cascade_node = NULL; | ||
57 | |||
58 | mpc86xx_init_irq(); | ||
59 | |||
60 | /* | ||
61 | * There is a simple interrupt handler in the main FPGA, this needs | ||
62 | * to be cascaded into the MPIC | ||
63 | */ | ||
64 | cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic-1.00"); | ||
65 | if (!cascade_node) { | ||
66 | printk(KERN_WARNING "PPC9A: No FPGA PIC\n"); | ||
67 | return; | ||
68 | } | ||
69 | |||
70 | gef_pic_init(cascade_node); | ||
71 | of_node_put(cascade_node); | ||
72 | } | ||
73 | |||
74 | static void __init gef_ppc9a_setup_arch(void) | ||
75 | { | ||
76 | struct device_node *regs; | ||
77 | #ifdef CONFIG_PCI | ||
78 | struct device_node *np; | ||
79 | |||
80 | for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { | ||
81 | fsl_add_bridge(np, 1); | ||
82 | } | ||
83 | #endif | ||
84 | |||
85 | printk(KERN_INFO "GE Fanuc Intelligent Platforms PPC9A 6U VME SBC\n"); | ||
86 | |||
87 | #ifdef CONFIG_SMP | ||
88 | mpc86xx_smp_init(); | ||
89 | #endif | ||
90 | |||
91 | /* Remap basic board registers */ | ||
92 | regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs"); | ||
93 | if (regs) { | ||
94 | ppc9a_regs = of_iomap(regs, 0); | ||
95 | if (ppc9a_regs == NULL) | ||
96 | printk(KERN_WARNING "Unable to map board registers\n"); | ||
97 | of_node_put(regs); | ||
98 | } | ||
99 | } | ||
100 | |||
101 | /* Return the PCB revision */ | ||
102 | static unsigned int gef_ppc9a_get_pcb_rev(void) | ||
103 | { | ||
104 | unsigned int reg; | ||
105 | |||
106 | reg = ioread32(ppc9a_regs); | ||
107 | return (reg >> 8) & 0xff; | ||
108 | } | ||
109 | |||
110 | /* Return the board (software) revision */ | ||
111 | static unsigned int gef_ppc9a_get_board_rev(void) | ||
112 | { | ||
113 | unsigned int reg; | ||
114 | |||
115 | reg = ioread32(ppc9a_regs); | ||
116 | return (reg >> 16) & 0xff; | ||
117 | } | ||
118 | |||
119 | /* Return the FPGA revision */ | ||
120 | static unsigned int gef_ppc9a_get_fpga_rev(void) | ||
121 | { | ||
122 | unsigned int reg; | ||
123 | |||
124 | reg = ioread32(ppc9a_regs); | ||
125 | return (reg >> 24) & 0xf; | ||
126 | } | ||
127 | |||
128 | static void gef_ppc9a_show_cpuinfo(struct seq_file *m) | ||
129 | { | ||
130 | uint svid = mfspr(SPRN_SVR); | ||
131 | |||
132 | seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n"); | ||
133 | |||
134 | seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(), | ||
135 | ('A' + gef_ppc9a_get_board_rev() - 1)); | ||
136 | seq_printf(m, "FPGA Revision\t: %u\n", gef_ppc9a_get_fpga_rev()); | ||
137 | |||
138 | seq_printf(m, "SVR\t\t: 0x%x\n", svid); | ||
139 | } | ||
140 | |||
141 | static void __init gef_ppc9a_nec_fixup(struct pci_dev *pdev) | ||
142 | { | ||
143 | unsigned int val; | ||
144 | |||
145 | /* Do not do the fixup on other platforms! */ | ||
146 | if (!machine_is(gef_ppc9a)) | ||
147 | return; | ||
148 | |||
149 | printk(KERN_INFO "Running NEC uPD720101 Fixup\n"); | ||
150 | |||
151 | /* Ensure ports 1, 2, 3, 4 & 5 are enabled */ | ||
152 | pci_read_config_dword(pdev, 0xe0, &val); | ||
153 | pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x5); | ||
154 | |||
155 | /* System clock is 48-MHz Oscillator and EHCI Enabled. */ | ||
156 | pci_write_config_dword(pdev, 0xe4, 1 << 5); | ||
157 | } | ||
158 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB, | ||
159 | gef_ppc9a_nec_fixup); | ||
160 | |||
161 | /* | ||
162 | * Called very early, device-tree isn't unflattened | ||
163 | * | ||
164 | * This function is called to determine whether the BSP is compatible with the | ||
165 | * supplied device-tree, which is assumed to be the correct one for the actual | ||
166 | * board. It is expected thati, in the future, a kernel may support multiple | ||
167 | * boards. | ||
168 | */ | ||
169 | static int __init gef_ppc9a_probe(void) | ||
170 | { | ||
171 | unsigned long root = of_get_flat_dt_root(); | ||
172 | |||
173 | if (of_flat_dt_is_compatible(root, "gef,ppc9a")) | ||
174 | return 1; | ||
175 | |||
176 | return 0; | ||
177 | } | ||
178 | |||
179 | static long __init mpc86xx_time_init(void) | ||
180 | { | ||
181 | unsigned int temp; | ||
182 | |||
183 | /* Set the time base to zero */ | ||
184 | mtspr(SPRN_TBWL, 0); | ||
185 | mtspr(SPRN_TBWU, 0); | ||
186 | |||
187 | temp = mfspr(SPRN_HID0); | ||
188 | temp |= HID0_TBEN; | ||
189 | mtspr(SPRN_HID0, temp); | ||
190 | asm volatile("isync"); | ||
191 | |||
192 | return 0; | ||
193 | } | ||
194 | |||
195 | static __initdata struct of_device_id of_bus_ids[] = { | ||
196 | { .compatible = "simple-bus", }, | ||
197 | { .compatible = "gianfar", }, | ||
198 | {}, | ||
199 | }; | ||
200 | |||
201 | static int __init declare_of_platform_devices(void) | ||
202 | { | ||
203 | printk(KERN_DEBUG "Probe platform devices\n"); | ||
204 | of_platform_bus_probe(NULL, of_bus_ids, NULL); | ||
205 | |||
206 | return 0; | ||
207 | } | ||
208 | machine_device_initcall(gef_ppc9a, declare_of_platform_devices); | ||
209 | |||
210 | define_machine(gef_ppc9a) { | ||
211 | .name = "GE Fanuc PPC9A", | ||
212 | .probe = gef_ppc9a_probe, | ||
213 | .setup_arch = gef_ppc9a_setup_arch, | ||
214 | .init_IRQ = gef_ppc9a_init_irq, | ||
215 | .show_cpuinfo = gef_ppc9a_show_cpuinfo, | ||
216 | .get_irq = mpic_get_irq, | ||
217 | .restart = fsl_rstcr_restart, | ||
218 | .time_init = mpc86xx_time_init, | ||
219 | .calibrate_decr = generic_calibrate_decr, | ||
220 | .progress = udbg_progress, | ||
221 | #ifdef CONFIG_PCI | ||
222 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
223 | #endif | ||
224 | }; | ||
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c new file mode 100644 index 000000000000..af14f852d747 --- /dev/null +++ b/arch/powerpc/platforms/86xx/gef_sbc310.c | |||
@@ -0,0 +1,235 @@ | |||
1 | /* | ||
2 | * GE Fanuc SBC310 board support | ||
3 | * | ||
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | ||
5 | * | ||
6 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | * | ||
13 | * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines) | ||
14 | * Copyright 2006 Freescale Semiconductor Inc. | ||
15 | * | ||
16 | * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c | ||
17 | */ | ||
18 | |||
19 | #include <linux/stddef.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/pci.h> | ||
22 | #include <linux/kdev_t.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <linux/seq_file.h> | ||
25 | #include <linux/of_platform.h> | ||
26 | |||
27 | #include <asm/system.h> | ||
28 | #include <asm/time.h> | ||
29 | #include <asm/machdep.h> | ||
30 | #include <asm/pci-bridge.h> | ||
31 | #include <asm/mpc86xx.h> | ||
32 | #include <asm/prom.h> | ||
33 | #include <mm/mmu_decl.h> | ||
34 | #include <asm/udbg.h> | ||
35 | |||
36 | #include <asm/mpic.h> | ||
37 | |||
38 | #include <sysdev/fsl_pci.h> | ||
39 | #include <sysdev/fsl_soc.h> | ||
40 | |||
41 | #include "mpc86xx.h" | ||
42 | #include "gef_pic.h" | ||
43 | |||
44 | #undef DEBUG | ||
45 | |||
46 | #ifdef DEBUG | ||
47 | #define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0) | ||
48 | #else | ||
49 | #define DBG (fmt...) do { } while (0) | ||
50 | #endif | ||
51 | |||
52 | void __iomem *sbc310_regs; | ||
53 | |||
54 | static void __init gef_sbc310_init_irq(void) | ||
55 | { | ||
56 | struct device_node *cascade_node = NULL; | ||
57 | |||
58 | mpc86xx_init_irq(); | ||
59 | |||
60 | /* | ||
61 | * There is a simple interrupt handler in the main FPGA, this needs | ||
62 | * to be cascaded into the MPIC | ||
63 | */ | ||
64 | cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic"); | ||
65 | if (!cascade_node) { | ||
66 | printk(KERN_WARNING "SBC310: No FPGA PIC\n"); | ||
67 | return; | ||
68 | } | ||
69 | |||
70 | gef_pic_init(cascade_node); | ||
71 | of_node_put(cascade_node); | ||
72 | } | ||
73 | |||
74 | static void __init gef_sbc310_setup_arch(void) | ||
75 | { | ||
76 | struct device_node *regs; | ||
77 | #ifdef CONFIG_PCI | ||
78 | struct device_node *np; | ||
79 | |||
80 | for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { | ||
81 | fsl_add_bridge(np, 1); | ||
82 | } | ||
83 | #endif | ||
84 | |||
85 | printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC310 6U VPX SBC\n"); | ||
86 | |||
87 | #ifdef CONFIG_SMP | ||
88 | mpc86xx_smp_init(); | ||
89 | #endif | ||
90 | |||
91 | /* Remap basic board registers */ | ||
92 | regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs"); | ||
93 | if (regs) { | ||
94 | sbc310_regs = of_iomap(regs, 0); | ||
95 | if (sbc310_regs == NULL) | ||
96 | printk(KERN_WARNING "Unable to map board registers\n"); | ||
97 | of_node_put(regs); | ||
98 | } | ||
99 | } | ||
100 | |||
101 | /* Return the PCB revision */ | ||
102 | static unsigned int gef_sbc310_get_board_id(void) | ||
103 | { | ||
104 | unsigned int reg; | ||
105 | |||
106 | reg = ioread32(sbc310_regs); | ||
107 | return reg & 0xff; | ||
108 | } | ||
109 | |||
110 | /* Return the PCB revision */ | ||
111 | static unsigned int gef_sbc310_get_pcb_rev(void) | ||
112 | { | ||
113 | unsigned int reg; | ||
114 | |||
115 | reg = ioread32(sbc310_regs); | ||
116 | return (reg >> 8) & 0xff; | ||
117 | } | ||
118 | |||
119 | /* Return the board (software) revision */ | ||
120 | static unsigned int gef_sbc310_get_board_rev(void) | ||
121 | { | ||
122 | unsigned int reg; | ||
123 | |||
124 | reg = ioread32(sbc310_regs); | ||
125 | return (reg >> 16) & 0xff; | ||
126 | } | ||
127 | |||
128 | /* Return the FPGA revision */ | ||
129 | static unsigned int gef_sbc310_get_fpga_rev(void) | ||
130 | { | ||
131 | unsigned int reg; | ||
132 | |||
133 | reg = ioread32(sbc310_regs); | ||
134 | return (reg >> 24) & 0xf; | ||
135 | } | ||
136 | |||
137 | static void gef_sbc310_show_cpuinfo(struct seq_file *m) | ||
138 | { | ||
139 | uint svid = mfspr(SPRN_SVR); | ||
140 | |||
141 | seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n"); | ||
142 | |||
143 | seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id()); | ||
144 | seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(), | ||
145 | ('A' + gef_sbc310_get_board_rev() - 1)); | ||
146 | seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev()); | ||
147 | |||
148 | seq_printf(m, "SVR\t\t: 0x%x\n", svid); | ||
149 | |||
150 | } | ||
151 | |||
152 | static void __init gef_sbc310_nec_fixup(struct pci_dev *pdev) | ||
153 | { | ||
154 | unsigned int val; | ||
155 | |||
156 | /* Do not do the fixup on other platforms! */ | ||
157 | if (!machine_is(gef_sbc310)) | ||
158 | return; | ||
159 | |||
160 | printk(KERN_INFO "Running NEC uPD720101 Fixup\n"); | ||
161 | |||
162 | /* Ensure only ports 1 & 2 are enabled */ | ||
163 | pci_read_config_dword(pdev, 0xe0, &val); | ||
164 | pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2); | ||
165 | |||
166 | /* System clock is 48-MHz Oscillator and EHCI Enabled. */ | ||
167 | pci_write_config_dword(pdev, 0xe4, 1 << 5); | ||
168 | } | ||
169 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB, | ||
170 | gef_sbc310_nec_fixup); | ||
171 | |||
172 | /* | ||
173 | * Called very early, device-tree isn't unflattened | ||
174 | * | ||
175 | * This function is called to determine whether the BSP is compatible with the | ||
176 | * supplied device-tree, which is assumed to be the correct one for the actual | ||
177 | * board. It is expected thati, in the future, a kernel may support multiple | ||
178 | * boards. | ||
179 | */ | ||
180 | static int __init gef_sbc310_probe(void) | ||
181 | { | ||
182 | unsigned long root = of_get_flat_dt_root(); | ||
183 | |||
184 | if (of_flat_dt_is_compatible(root, "gef,sbc310")) | ||
185 | return 1; | ||
186 | |||
187 | return 0; | ||
188 | } | ||
189 | |||
190 | static long __init mpc86xx_time_init(void) | ||
191 | { | ||
192 | unsigned int temp; | ||
193 | |||
194 | /* Set the time base to zero */ | ||
195 | mtspr(SPRN_TBWL, 0); | ||
196 | mtspr(SPRN_TBWU, 0); | ||
197 | |||
198 | temp = mfspr(SPRN_HID0); | ||
199 | temp |= HID0_TBEN; | ||
200 | mtspr(SPRN_HID0, temp); | ||
201 | asm volatile("isync"); | ||
202 | |||
203 | return 0; | ||
204 | } | ||
205 | |||
206 | static __initdata struct of_device_id of_bus_ids[] = { | ||
207 | { .compatible = "simple-bus", }, | ||
208 | { .compatible = "gianfar", }, | ||
209 | {}, | ||
210 | }; | ||
211 | |||
212 | static int __init declare_of_platform_devices(void) | ||
213 | { | ||
214 | printk(KERN_DEBUG "Probe platform devices\n"); | ||
215 | of_platform_bus_probe(NULL, of_bus_ids, NULL); | ||
216 | |||
217 | return 0; | ||
218 | } | ||
219 | machine_device_initcall(gef_sbc310, declare_of_platform_devices); | ||
220 | |||
221 | define_machine(gef_sbc310) { | ||
222 | .name = "GE Fanuc SBC310", | ||
223 | .probe = gef_sbc310_probe, | ||
224 | .setup_arch = gef_sbc310_setup_arch, | ||
225 | .init_IRQ = gef_sbc310_init_irq, | ||
226 | .show_cpuinfo = gef_sbc310_show_cpuinfo, | ||
227 | .get_irq = mpic_get_irq, | ||
228 | .restart = fsl_rstcr_restart, | ||
229 | .time_init = mpc86xx_time_init, | ||
230 | .calibrate_decr = generic_calibrate_decr, | ||
231 | .progress = udbg_progress, | ||
232 | #ifdef CONFIG_PCI | ||
233 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
234 | #endif | ||
235 | }; | ||
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c index d6b772ba3b8f..ea2360639652 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc610.c +++ b/arch/powerpc/platforms/86xx/gef_sbc610.c | |||
@@ -194,6 +194,7 @@ static long __init mpc86xx_time_init(void) | |||
194 | 194 | ||
195 | static __initdata struct of_device_id of_bus_ids[] = { | 195 | static __initdata struct of_device_id of_bus_ids[] = { |
196 | { .compatible = "simple-bus", }, | 196 | { .compatible = "simple-bus", }, |
197 | { .compatible = "gianfar", }, | ||
197 | {}, | 198 | {}, |
198 | }; | 199 | }; |
199 | 200 | ||
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index e8d54ac5292c..3f49a6f893a3 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c | |||
@@ -46,6 +46,7 @@ static unsigned char *pixis_bdcfg0, *pixis_arch; | |||
46 | static struct of_device_id __initdata mpc8610_ids[] = { | 46 | static struct of_device_id __initdata mpc8610_ids[] = { |
47 | { .compatible = "fsl,mpc8610-immr", }, | 47 | { .compatible = "fsl,mpc8610-immr", }, |
48 | { .compatible = "simple-bus", }, | 48 | { .compatible = "simple-bus", }, |
49 | { .compatible = "gianfar", }, | ||
49 | {} | 50 | {} |
50 | }; | 51 | }; |
51 | 52 | ||
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index 27e0e682d8e1..c4ec49b5f7f8 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | |||
@@ -148,6 +148,7 @@ mpc86xx_time_init(void) | |||
148 | static __initdata struct of_device_id of_bus_ids[] = { | 148 | static __initdata struct of_device_id of_bus_ids[] = { |
149 | { .compatible = "simple-bus", }, | 149 | { .compatible = "simple-bus", }, |
150 | { .compatible = "fsl,rapidio-delta", }, | 150 | { .compatible = "fsl,rapidio-delta", }, |
151 | { .compatible = "gianfar", }, | ||
151 | {}, | 152 | {}, |
152 | }; | 153 | }; |
153 | 154 | ||
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c index 5fd7ed40986f..2886a36fc085 100644 --- a/arch/powerpc/platforms/86xx/sbc8641d.c +++ b/arch/powerpc/platforms/86xx/sbc8641d.c | |||
@@ -103,6 +103,7 @@ mpc86xx_time_init(void) | |||
103 | 103 | ||
104 | static __initdata struct of_device_id of_bus_ids[] = { | 104 | static __initdata struct of_device_id of_bus_ids[] = { |
105 | { .compatible = "simple-bus", }, | 105 | { .compatible = "simple-bus", }, |
106 | { .compatible = "gianfar", }, | ||
106 | {}, | 107 | {}, |
107 | }; | 108 | }; |
108 | 109 | ||
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index 200b9cb900ea..ffa2a9fd53d0 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig | |||
@@ -1,14 +1,5 @@ | |||
1 | menu "Platform support" | 1 | menu "Platform support" |
2 | 2 | ||
3 | config PPC_MULTIPLATFORM | ||
4 | bool | ||
5 | depends on PPC64 || 6xx | ||
6 | default y | ||
7 | |||
8 | config CLASSIC32 | ||
9 | def_bool y | ||
10 | depends on 6xx && PPC_MULTIPLATFORM | ||
11 | |||
12 | source "arch/powerpc/platforms/pseries/Kconfig" | 3 | source "arch/powerpc/platforms/pseries/Kconfig" |
13 | source "arch/powerpc/platforms/iseries/Kconfig" | 4 | source "arch/powerpc/platforms/iseries/Kconfig" |
14 | source "arch/powerpc/platforms/chrp/Kconfig" | 5 | source "arch/powerpc/platforms/chrp/Kconfig" |
@@ -28,15 +19,28 @@ source "arch/powerpc/platforms/86xx/Kconfig" | |||
28 | source "arch/powerpc/platforms/embedded6xx/Kconfig" | 19 | source "arch/powerpc/platforms/embedded6xx/Kconfig" |
29 | source "arch/powerpc/platforms/44x/Kconfig" | 20 | source "arch/powerpc/platforms/44x/Kconfig" |
30 | source "arch/powerpc/platforms/40x/Kconfig" | 21 | source "arch/powerpc/platforms/40x/Kconfig" |
22 | source "arch/powerpc/platforms/amigaone/Kconfig" | ||
31 | 23 | ||
32 | config PPC_NATIVE | 24 | config PPC_NATIVE |
33 | bool | 25 | bool |
34 | depends on PPC_MULTIPLATFORM | 26 | depends on 6xx || PPC64 |
35 | help | 27 | help |
36 | Support for running natively on the hardware, i.e. without | 28 | Support for running natively on the hardware, i.e. without |
37 | a hypervisor. This option is not user-selectable but should | 29 | a hypervisor. This option is not user-selectable but should |
38 | be selected by all platforms that need it. | 30 | be selected by all platforms that need it. |
39 | 31 | ||
32 | config PPC_OF_BOOT_TRAMPOLINE | ||
33 | bool "Support booting from Open Firmware or yaboot" | ||
34 | depends on 6xx || PPC64 | ||
35 | default y | ||
36 | help | ||
37 | Support from booting from Open Firmware or yaboot using an | ||
38 | Open Firmware client interface. This enables the kernel to | ||
39 | communicate with open firmware to retrieve system informations | ||
40 | such as the device tree. | ||
41 | |||
42 | In case of doubt, say Y | ||
43 | |||
40 | config UDBG_RTAS_CONSOLE | 44 | config UDBG_RTAS_CONSOLE |
41 | bool "RTAS based debug console" | 45 | bool "RTAS based debug console" |
42 | depends on PPC_RTAS | 46 | depends on PPC_RTAS |
@@ -70,7 +74,7 @@ config PPC_I8259 | |||
70 | 74 | ||
71 | config U3_DART | 75 | config U3_DART |
72 | bool | 76 | bool |
73 | depends on PPC_MULTIPLATFORM && PPC64 | 77 | depends on PPC64 |
74 | default n | 78 | default n |
75 | 79 | ||
76 | config PPC_RTAS | 80 | config PPC_RTAS |
@@ -91,15 +95,6 @@ config RTAS_FLASH | |||
91 | tristate "Firmware flash interface" | 95 | tristate "Firmware flash interface" |
92 | depends on PPC64 && RTAS_PROC | 96 | depends on PPC64 && RTAS_PROC |
93 | 97 | ||
94 | config PPC_PMI | ||
95 | tristate "Support for PMI" | ||
96 | depends on PPC_IBM_CELL_BLADE | ||
97 | help | ||
98 | PMI (Platform Management Interrupt) is a way to | ||
99 | communicate with the BMC (Baseboard Management Controller). | ||
100 | It is used in some IBM Cell blades. | ||
101 | default m | ||
102 | |||
103 | config MMIO_NVRAM | 98 | config MMIO_NVRAM |
104 | bool | 99 | bool |
105 | default n | 100 | default n |
@@ -196,7 +191,7 @@ config PPC601_SYNC_FIX | |||
196 | 191 | ||
197 | config TAU | 192 | config TAU |
198 | bool "On-chip CPU temperature sensor support" | 193 | bool "On-chip CPU temperature sensor support" |
199 | depends on CLASSIC32 | 194 | depends on 6xx |
200 | help | 195 | help |
201 | G3 and G4 processors have an on-chip temperature sensor called the | 196 | G3 and G4 processors have an on-chip temperature sensor called the |
202 | 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die | 197 | 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die |
@@ -274,7 +269,7 @@ config CPM2 | |||
274 | 269 | ||
275 | config AXON_RAM | 270 | config AXON_RAM |
276 | tristate "Axon DDR2 memory device driver" | 271 | tristate "Axon DDR2 memory device driver" |
277 | depends on PPC_IBM_CELL_BLADE | 272 | depends on PPC_IBM_CELL_BLADE && BLOCK |
278 | default m | 273 | default m |
279 | help | 274 | help |
280 | It registers one block device per Axon's DDR2 memory bank found | 275 | It registers one block device per Axon's DDR2 memory bank found |
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index e868b5c50723..9da795e49337 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype | |||
@@ -57,9 +57,17 @@ config E200 | |||
57 | 57 | ||
58 | endchoice | 58 | endchoice |
59 | 59 | ||
60 | # Until we have a choice of exclusive CPU types on 64-bit, we always | ||
61 | # use PPC_BOOK3S. On 32-bit, this is equivalent to 6xx which is | ||
62 | # "classic" MMU | ||
63 | |||
64 | config PPC_BOOK3S | ||
65 | def_bool y | ||
66 | depends on PPC64 || 6xx | ||
67 | |||
60 | config POWER4_ONLY | 68 | config POWER4_ONLY |
61 | bool "Optimize for POWER4" | 69 | bool "Optimize for POWER4" |
62 | depends on PPC64 | 70 | depends on PPC64 && PPC_BOOK3S |
63 | default n | 71 | default n |
64 | ---help--- | 72 | ---help--- |
65 | Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. | 73 | Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. |
@@ -68,16 +76,16 @@ config POWER4_ONLY | |||
68 | 76 | ||
69 | config POWER3 | 77 | config POWER3 |
70 | bool | 78 | bool |
71 | depends on PPC64 | 79 | depends on PPC64 && PPC_BOOK3S |
72 | default y if !POWER4_ONLY | 80 | default y if !POWER4_ONLY |
73 | 81 | ||
74 | config POWER4 | 82 | config POWER4 |
75 | depends on PPC64 | 83 | depends on PPC64 && PPC_BOOK3S |
76 | def_bool y | 84 | def_bool y |
77 | 85 | ||
78 | config TUNE_CELL | 86 | config TUNE_CELL |
79 | bool "Optimize for Cell Broadband Engine" | 87 | bool "Optimize for Cell Broadband Engine" |
80 | depends on PPC64 | 88 | depends on PPC64 && PPC_BOOK3S |
81 | help | 89 | help |
82 | Cause the compiler to optimize for the PPE of the Cell Broadband | 90 | Cause the compiler to optimize for the PPE of the Cell Broadband |
83 | Engine. This will make the code run considerably faster on Cell | 91 | Engine. This will make the code run considerably faster on Cell |
@@ -147,7 +155,7 @@ config PHYS_64BIT | |||
147 | 155 | ||
148 | config ALTIVEC | 156 | config ALTIVEC |
149 | bool "AltiVec Support" | 157 | bool "AltiVec Support" |
150 | depends on CLASSIC32 || POWER4 | 158 | depends on 6xx || POWER4 |
151 | ---help--- | 159 | ---help--- |
152 | This option enables kernel support for the Altivec extensions to the | 160 | This option enables kernel support for the Altivec extensions to the |
153 | PowerPC processor. The kernel currently supports saving and restoring | 161 | PowerPC processor. The kernel currently supports saving and restoring |
@@ -210,6 +218,10 @@ config PPC_MMU_NOHASH | |||
210 | def_bool y | 218 | def_bool y |
211 | depends on !PPC_STD_MMU | 219 | depends on !PPC_STD_MMU |
212 | 220 | ||
221 | config PPC_BOOK3E_MMU | ||
222 | def_bool y | ||
223 | depends on FSL_BOOKE | ||
224 | |||
213 | config PPC_MM_SLICES | 225 | config PPC_MM_SLICES |
214 | bool | 226 | bool |
215 | default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES) | 227 | default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile index 8079e0b4fd69..f7419198e635 100644 --- a/arch/powerpc/platforms/Makefile +++ b/arch/powerpc/platforms/Makefile | |||
@@ -19,3 +19,4 @@ obj-$(CONFIG_PPC_PASEMI) += pasemi/ | |||
19 | obj-$(CONFIG_PPC_CELL) += cell/ | 19 | obj-$(CONFIG_PPC_CELL) += cell/ |
20 | obj-$(CONFIG_PPC_PS3) += ps3/ | 20 | obj-$(CONFIG_PPC_PS3) += ps3/ |
21 | obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/ | 21 | obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/ |
22 | obj-$(CONFIG_AMIGAONE) += amigaone/ | ||
diff --git a/arch/powerpc/platforms/amigaone/Kconfig b/arch/powerpc/platforms/amigaone/Kconfig new file mode 100644 index 000000000000..022476717718 --- /dev/null +++ b/arch/powerpc/platforms/amigaone/Kconfig | |||
@@ -0,0 +1,18 @@ | |||
1 | config AMIGAONE | ||
2 | bool "Eyetech AmigaOne/MAI Teron" | ||
3 | depends on 6xx && BROKEN_ON_SMP | ||
4 | select PPC_I8259 | ||
5 | select PPC_INDIRECT_PCI | ||
6 | select PPC_UDBG_16550 | ||
7 | select PCI | ||
8 | select NOT_COHERENT_CACHE | ||
9 | select CHECK_CACHE_COHERENCY | ||
10 | select DEFAULT_UIMAGE | ||
11 | select PCSPKR_PLATFORM | ||
12 | help | ||
13 | Select AmigaOne for the following machines: | ||
14 | - AmigaOne SE/Teron CX (G3 only) | ||
15 | - AmigaOne XE/Teron PX | ||
16 | - uA1/Teron mini | ||
17 | More information is available at: | ||
18 | <http://amigaone-linux.sourceforge.net/>. | ||
diff --git a/arch/powerpc/platforms/amigaone/Makefile b/arch/powerpc/platforms/amigaone/Makefile new file mode 100644 index 000000000000..e6885b3b2ee7 --- /dev/null +++ b/arch/powerpc/platforms/amigaone/Makefile | |||
@@ -0,0 +1 @@ | |||
obj-y += setup.o | |||
diff --git a/arch/powerpc/platforms/amigaone/setup.c b/arch/powerpc/platforms/amigaone/setup.c new file mode 100644 index 000000000000..443035366c12 --- /dev/null +++ b/arch/powerpc/platforms/amigaone/setup.c | |||
@@ -0,0 +1,170 @@ | |||
1 | /* | ||
2 | * AmigaOne platform setup | ||
3 | * | ||
4 | * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net) | ||
5 | * | ||
6 | * Based on original amigaone_setup.c source code | ||
7 | * Copyright 2003 by Hans-Joerg Frieden and Thomas Frieden | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/seq_file.h> | ||
17 | #include <linux/utsrelease.h> | ||
18 | |||
19 | #include <asm/machdep.h> | ||
20 | #include <asm/cputable.h> | ||
21 | #include <asm/prom.h> | ||
22 | #include <asm/pci-bridge.h> | ||
23 | #include <asm/i8259.h> | ||
24 | #include <asm/time.h> | ||
25 | #include <asm/udbg.h> | ||
26 | |||
27 | extern void __flush_disable_L1(void); | ||
28 | |||
29 | void amigaone_show_cpuinfo(struct seq_file *m) | ||
30 | { | ||
31 | seq_printf(m, "vendor\t\t: Eyetech Ltd.\n"); | ||
32 | } | ||
33 | |||
34 | static int __init amigaone_add_bridge(struct device_node *dev) | ||
35 | { | ||
36 | const u32 *cfg_addr, *cfg_data; | ||
37 | int len; | ||
38 | const int *bus_range; | ||
39 | struct pci_controller *hose; | ||
40 | |||
41 | printk(KERN_INFO "Adding PCI host bridge %s\n", dev->full_name); | ||
42 | |||
43 | cfg_addr = of_get_address(dev, 0, NULL, NULL); | ||
44 | cfg_data = of_get_address(dev, 1, NULL, NULL); | ||
45 | if ((cfg_addr == NULL) || (cfg_data == NULL)) | ||
46 | return -ENODEV; | ||
47 | |||
48 | bus_range = of_get_property(dev, "bus-range", &len); | ||
49 | if ((bus_range == NULL) || (len < 2 * sizeof(int))) | ||
50 | printk(KERN_WARNING "Can't get bus-range for %s, assume" | ||
51 | " bus 0\n", dev->full_name); | ||
52 | |||
53 | hose = pcibios_alloc_controller(dev); | ||
54 | if (hose == NULL) | ||
55 | return -ENOMEM; | ||
56 | |||
57 | hose->first_busno = bus_range ? bus_range[0] : 0; | ||
58 | hose->last_busno = bus_range ? bus_range[1] : 0xff; | ||
59 | |||
60 | setup_indirect_pci(hose, cfg_addr[0], cfg_data[0], 0); | ||
61 | |||
62 | /* Interpret the "ranges" property */ | ||
63 | /* This also maps the I/O region and sets isa_io/mem_base */ | ||
64 | pci_process_bridge_OF_ranges(hose, dev, 1); | ||
65 | |||
66 | return 0; | ||
67 | } | ||
68 | |||
69 | void __init amigaone_setup_arch(void) | ||
70 | { | ||
71 | struct device_node *np; | ||
72 | int phb = -ENODEV; | ||
73 | |||
74 | /* Lookup PCI host bridges. */ | ||
75 | for_each_compatible_node(np, "pci", "mai-logic,articia-s") | ||
76 | phb = amigaone_add_bridge(np); | ||
77 | |||
78 | BUG_ON(phb != 0); | ||
79 | |||
80 | if (ppc_md.progress) | ||
81 | ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0); | ||
82 | } | ||
83 | |||
84 | void __init amigaone_init_IRQ(void) | ||
85 | { | ||
86 | struct device_node *pic, *np = NULL; | ||
87 | const unsigned long *prop = NULL; | ||
88 | unsigned long int_ack = 0; | ||
89 | |||
90 | /* Search for ISA interrupt controller. */ | ||
91 | pic = of_find_compatible_node(NULL, "interrupt-controller", | ||
92 | "pnpPNP,000"); | ||
93 | BUG_ON(pic == NULL); | ||
94 | |||
95 | /* Look for interrupt acknowledge address in the PCI root node. */ | ||
96 | np = of_find_compatible_node(NULL, "pci", "mai-logic,articia-s"); | ||
97 | if (np) { | ||
98 | prop = of_get_property(np, "8259-interrupt-acknowledge", NULL); | ||
99 | if (prop) | ||
100 | int_ack = prop[0]; | ||
101 | of_node_put(np); | ||
102 | } | ||
103 | |||
104 | if (int_ack == 0) | ||
105 | printk(KERN_WARNING "Cannot find PCI interrupt acknowledge" | ||
106 | " address, polling\n"); | ||
107 | |||
108 | i8259_init(pic, int_ack); | ||
109 | ppc_md.get_irq = i8259_irq; | ||
110 | irq_set_default_host(i8259_get_host()); | ||
111 | } | ||
112 | |||
113 | void __init amigaone_init(void) | ||
114 | { | ||
115 | request_region(0x00, 0x20, "dma1"); | ||
116 | request_region(0x40, 0x20, "timer"); | ||
117 | request_region(0x80, 0x10, "dma page reg"); | ||
118 | request_region(0xc0, 0x20, "dma2"); | ||
119 | } | ||
120 | |||
121 | void amigaone_restart(char *cmd) | ||
122 | { | ||
123 | local_irq_disable(); | ||
124 | |||
125 | /* Flush and disable caches. */ | ||
126 | __flush_disable_L1(); | ||
127 | |||
128 | /* Set SRR0 to the reset vector and turn on MSR_IP. */ | ||
129 | mtspr(SPRN_SRR0, 0xfff00100); | ||
130 | mtspr(SPRN_SRR1, MSR_IP); | ||
131 | |||
132 | /* Do an rfi to jump back to firmware. */ | ||
133 | __asm__ __volatile__("rfi" : : : "memory"); | ||
134 | |||
135 | /* Not reached. */ | ||
136 | while (1); | ||
137 | } | ||
138 | |||
139 | static int __init amigaone_probe(void) | ||
140 | { | ||
141 | unsigned long root = of_get_flat_dt_root(); | ||
142 | |||
143 | if (of_flat_dt_is_compatible(root, "eyetech,amigaone")) { | ||
144 | /* | ||
145 | * Coherent memory access cause complete system lockup! Thus | ||
146 | * disable this CPU feature, even if the CPU needs it. | ||
147 | */ | ||
148 | cur_cpu_spec->cpu_features &= ~CPU_FTR_NEED_COHERENT; | ||
149 | |||
150 | ISA_DMA_THRESHOLD = 0x00ffffff; | ||
151 | DMA_MODE_READ = 0x44; | ||
152 | DMA_MODE_WRITE = 0x48; | ||
153 | |||
154 | return 1; | ||
155 | } | ||
156 | |||
157 | return 0; | ||
158 | } | ||
159 | |||
160 | define_machine(amigaone) { | ||
161 | .name = "AmigaOne", | ||
162 | .probe = amigaone_probe, | ||
163 | .setup_arch = amigaone_setup_arch, | ||
164 | .init = amigaone_init, | ||
165 | .show_cpuinfo = amigaone_show_cpuinfo, | ||
166 | .init_IRQ = amigaone_init_IRQ, | ||
167 | .restart = amigaone_restart, | ||
168 | .calibrate_decr = generic_calibrate_decr, | ||
169 | .progress = udbg_progress, | ||
170 | }; | ||
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig index 5cc3279559a4..40e24c39ad06 100644 --- a/arch/powerpc/platforms/cell/Kconfig +++ b/arch/powerpc/platforms/cell/Kconfig | |||
@@ -23,7 +23,7 @@ config PPC_CELL_NATIVE | |||
23 | 23 | ||
24 | config PPC_IBM_CELL_BLADE | 24 | config PPC_IBM_CELL_BLADE |
25 | bool "IBM Cell Blade" | 25 | bool "IBM Cell Blade" |
26 | depends on PPC_MULTIPLATFORM && PPC64 | 26 | depends on PPC64 && PPC_BOOK3S |
27 | select PPC_CELL_NATIVE | 27 | select PPC_CELL_NATIVE |
28 | select MMIO_NVRAM | 28 | select MMIO_NVRAM |
29 | select PPC_UDBG_16550 | 29 | select PPC_UDBG_16550 |
@@ -31,7 +31,7 @@ config PPC_IBM_CELL_BLADE | |||
31 | 31 | ||
32 | config PPC_CELLEB | 32 | config PPC_CELLEB |
33 | bool "Toshiba's Cell Reference Set 'Celleb' Architecture" | 33 | bool "Toshiba's Cell Reference Set 'Celleb' Architecture" |
34 | depends on PPC_MULTIPLATFORM && PPC64 | 34 | depends on PPC64 && PPC_BOOK3S |
35 | select PPC_CELL_NATIVE | 35 | select PPC_CELL_NATIVE |
36 | select HAS_TXX9_SERIAL | 36 | select HAS_TXX9_SERIAL |
37 | select PPC_UDBG_BEAT | 37 | select PPC_UDBG_BEAT |
@@ -40,9 +40,14 @@ config PPC_CELLEB | |||
40 | 40 | ||
41 | config PPC_CELL_QPACE | 41 | config PPC_CELL_QPACE |
42 | bool "IBM Cell - QPACE" | 42 | bool "IBM Cell - QPACE" |
43 | depends on PPC_MULTIPLATFORM && PPC64 | 43 | depends on PPC64 && PPC_BOOK3S |
44 | select PPC_CELL_COMMON | 44 | select PPC_CELL_COMMON |
45 | 45 | ||
46 | config AXON_MSI | ||
47 | bool | ||
48 | depends on PPC_IBM_CELL_BLADE && PCI_MSI | ||
49 | default y | ||
50 | |||
46 | menu "Cell Broadband Engine options" | 51 | menu "Cell Broadband Engine options" |
47 | depends on PPC_CELL | 52 | depends on PPC_CELL |
48 | 53 | ||
@@ -98,7 +103,7 @@ config PPC_IBM_CELL_RESETBUTTON | |||
98 | 103 | ||
99 | config PPC_IBM_CELL_POWERBUTTON | 104 | config PPC_IBM_CELL_POWERBUTTON |
100 | tristate "IBM Cell Blade power button" | 105 | tristate "IBM Cell Blade power button" |
101 | depends on PPC_IBM_CELL_BLADE && PPC_PMI && INPUT_EVDEV | 106 | depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV |
102 | default y | 107 | default y |
103 | help | 108 | help |
104 | Support Powerbutton on IBM Cell blades. | 109 | Support Powerbutton on IBM Cell blades. |
@@ -118,9 +123,9 @@ config CBE_CPUFREQ | |||
118 | For details, take a look at <file:Documentation/cpu-freq/>. | 123 | For details, take a look at <file:Documentation/cpu-freq/>. |
119 | If you don't have such processor, say N | 124 | If you don't have such processor, say N |
120 | 125 | ||
121 | config CBE_CPUFREQ_PMI | 126 | config CBE_CPUFREQ_PMI_ENABLE |
122 | tristate "CBE frequency scaling using PMI interface" | 127 | bool "CBE frequency scaling using PMI interface" |
123 | depends on CBE_CPUFREQ && PPC_PMI && EXPERIMENTAL | 128 | depends on CBE_CPUFREQ && EXPERIMENTAL |
124 | default n | 129 | default n |
125 | help | 130 | help |
126 | Select this, if you want to use the PMI interface | 131 | Select this, if you want to use the PMI interface |
@@ -128,6 +133,20 @@ config CBE_CPUFREQ_PMI | |||
128 | processor will not only be able to run at lower speed, | 133 | processor will not only be able to run at lower speed, |
129 | but also at lower core voltage. | 134 | but also at lower core voltage. |
130 | 135 | ||
136 | config CBE_CPUFREQ_PMI | ||
137 | tristate | ||
138 | depends on CBE_CPUFREQ_PMI_ENABLE | ||
139 | default CBE_CPUFREQ | ||
140 | |||
141 | config PPC_PMI | ||
142 | tristate | ||
143 | default y | ||
144 | depends on CBE_CPUFREQ_PMI || PPC_IBM_CELL_POWERBUTTON | ||
145 | help | ||
146 | PMI (Platform Management Interrupt) is a way to | ||
147 | communicate with the BMC (Baseboard Management Controller). | ||
148 | It is used in some IBM Cell blades. | ||
149 | |||
131 | config CBE_CPUFREQ_SPU_GOVERNOR | 150 | config CBE_CPUFREQ_SPU_GOVERNOR |
132 | tristate "CBE frequency scaling based on SPU usage" | 151 | tristate "CBE frequency scaling based on SPU usage" |
133 | depends on SPU_FS && CPU_FREQ | 152 | depends on SPU_FS && CPU_FREQ |
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile index 43eccb270301..83fafe922641 100644 --- a/arch/powerpc/platforms/cell/Makefile +++ b/arch/powerpc/platforms/cell/Makefile | |||
@@ -28,7 +28,7 @@ obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \ | |||
28 | $(spu-manage-y) \ | 28 | $(spu-manage-y) \ |
29 | spufs/ | 29 | spufs/ |
30 | 30 | ||
31 | obj-$(CONFIG_PCI_MSI) += axon_msi.o | 31 | obj-$(CONFIG_AXON_MSI) += axon_msi.o |
32 | 32 | ||
33 | # qpace setup | 33 | # qpace setup |
34 | obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o | 34 | obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o |
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c index 28c04dab2633..882e47080e74 100644 --- a/arch/powerpc/platforms/cell/interrupt.c +++ b/arch/powerpc/platforms/cell/interrupt.c | |||
@@ -237,8 +237,6 @@ extern int noirqdebug; | |||
237 | 237 | ||
238 | static void handle_iic_irq(unsigned int irq, struct irq_desc *desc) | 238 | static void handle_iic_irq(unsigned int irq, struct irq_desc *desc) |
239 | { | 239 | { |
240 | const unsigned int cpu = smp_processor_id(); | ||
241 | |||
242 | spin_lock(&desc->lock); | 240 | spin_lock(&desc->lock); |
243 | 241 | ||
244 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 242 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
@@ -254,7 +252,7 @@ static void handle_iic_irq(unsigned int irq, struct irq_desc *desc) | |||
254 | goto out_eoi; | 252 | goto out_eoi; |
255 | } | 253 | } |
256 | 254 | ||
257 | kstat_cpu(cpu).irqs[irq]++; | 255 | kstat_incr_irqs_this_cpu(irq, desc); |
258 | 256 | ||
259 | /* Mark the IRQ currently in progress.*/ | 257 | /* Mark the IRQ currently in progress.*/ |
260 | desc->status |= IRQ_INPROGRESS; | 258 | desc->status |= IRQ_INPROGRESS; |
diff --git a/arch/powerpc/platforms/cell/io-workarounds.c b/arch/powerpc/platforms/cell/io-workarounds.c index 059cad6c3f69..5c1118e31940 100644 --- a/arch/powerpc/platforms/cell/io-workarounds.c +++ b/arch/powerpc/platforms/cell/io-workarounds.c | |||
@@ -131,10 +131,10 @@ static const struct ppc_pci_io __devinitconst iowa_pci_io = { | |||
131 | }; | 131 | }; |
132 | 132 | ||
133 | static void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size, | 133 | static void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size, |
134 | unsigned long flags) | 134 | unsigned long flags, void *caller) |
135 | { | 135 | { |
136 | struct iowa_bus *bus; | 136 | struct iowa_bus *bus; |
137 | void __iomem *res = __ioremap(addr, size, flags); | 137 | void __iomem *res = __ioremap_caller(addr, size, flags, caller); |
138 | int busno; | 138 | int busno; |
139 | 139 | ||
140 | bus = iowa_pci_find(0, (unsigned long)addr); | 140 | bus = iowa_pci_find(0, (unsigned long)addr); |
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c index ee5033eddf01..5744527a7f2a 100644 --- a/arch/powerpc/platforms/cell/iommu.c +++ b/arch/powerpc/platforms/cell/iommu.c | |||
@@ -74,7 +74,7 @@ | |||
74 | #define IOC_IO_ExcpStat_V 0x8000000000000000ul | 74 | #define IOC_IO_ExcpStat_V 0x8000000000000000ul |
75 | #define IOC_IO_ExcpStat_SPF_Mask 0x6000000000000000ul | 75 | #define IOC_IO_ExcpStat_SPF_Mask 0x6000000000000000ul |
76 | #define IOC_IO_ExcpStat_SPF_S 0x6000000000000000ul | 76 | #define IOC_IO_ExcpStat_SPF_S 0x6000000000000000ul |
77 | #define IOC_IO_ExcpStat_SPF_P 0x4000000000000000ul | 77 | #define IOC_IO_ExcpStat_SPF_P 0x2000000000000000ul |
78 | #define IOC_IO_ExcpStat_ADDR_Mask 0x00000007fffff000ul | 78 | #define IOC_IO_ExcpStat_ADDR_Mask 0x00000007fffff000ul |
79 | #define IOC_IO_ExcpStat_RW_Mask 0x0000000000000800ul | 79 | #define IOC_IO_ExcpStat_RW_Mask 0x0000000000000800ul |
80 | #define IOC_IO_ExcpStat_IOID_Mask 0x00000000000007fful | 80 | #define IOC_IO_ExcpStat_IOID_Mask 0x00000000000007fful |
@@ -247,17 +247,18 @@ static void tce_free_cell(struct iommu_table *tbl, long index, long npages) | |||
247 | 247 | ||
248 | static irqreturn_t ioc_interrupt(int irq, void *data) | 248 | static irqreturn_t ioc_interrupt(int irq, void *data) |
249 | { | 249 | { |
250 | unsigned long stat; | 250 | unsigned long stat, spf; |
251 | struct cbe_iommu *iommu = data; | 251 | struct cbe_iommu *iommu = data; |
252 | 252 | ||
253 | stat = in_be64(iommu->xlate_regs + IOC_IO_ExcpStat); | 253 | stat = in_be64(iommu->xlate_regs + IOC_IO_ExcpStat); |
254 | spf = stat & IOC_IO_ExcpStat_SPF_Mask; | ||
254 | 255 | ||
255 | /* Might want to rate limit it */ | 256 | /* Might want to rate limit it */ |
256 | printk(KERN_ERR "iommu: DMA exception 0x%016lx\n", stat); | 257 | printk(KERN_ERR "iommu: DMA exception 0x%016lx\n", stat); |
257 | printk(KERN_ERR " V=%d, SPF=[%c%c], RW=%s, IOID=0x%04x\n", | 258 | printk(KERN_ERR " V=%d, SPF=[%c%c], RW=%s, IOID=0x%04x\n", |
258 | !!(stat & IOC_IO_ExcpStat_V), | 259 | !!(stat & IOC_IO_ExcpStat_V), |
259 | (stat & IOC_IO_ExcpStat_SPF_S) ? 'S' : ' ', | 260 | (spf == IOC_IO_ExcpStat_SPF_S) ? 'S' : ' ', |
260 | (stat & IOC_IO_ExcpStat_SPF_P) ? 'P' : ' ', | 261 | (spf == IOC_IO_ExcpStat_SPF_P) ? 'P' : ' ', |
261 | (stat & IOC_IO_ExcpStat_RW_Mask) ? "Read" : "Write", | 262 | (stat & IOC_IO_ExcpStat_RW_Mask) ? "Read" : "Write", |
262 | (unsigned int)(stat & IOC_IO_ExcpStat_IOID_Mask)); | 263 | (unsigned int)(stat & IOC_IO_ExcpStat_IOID_Mask)); |
263 | printk(KERN_ERR " page=0x%016lx\n", | 264 | printk(KERN_ERR " page=0x%016lx\n", |
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c index be84e6a16b30..c5ce02e84c8e 100644 --- a/arch/powerpc/platforms/cell/qpace_setup.c +++ b/arch/powerpc/platforms/cell/qpace_setup.c | |||
@@ -81,16 +81,6 @@ static int __init qpace_publish_devices(void) | |||
81 | } | 81 | } |
82 | machine_subsys_initcall(qpace, qpace_publish_devices); | 82 | machine_subsys_initcall(qpace, qpace_publish_devices); |
83 | 83 | ||
84 | extern int qpace_notify(struct device *dev) | ||
85 | { | ||
86 | /* set dma_ops for of_platform bus */ | ||
87 | if (dev->bus && dev->bus->name | ||
88 | && !strcmp(dev->bus->name, "of_platform")) | ||
89 | set_dma_ops(dev, &dma_direct_ops); | ||
90 | |||
91 | return 0; | ||
92 | } | ||
93 | |||
94 | static void __init qpace_setup_arch(void) | 84 | static void __init qpace_setup_arch(void) |
95 | { | 85 | { |
96 | #ifdef CONFIG_SPU_BASE | 86 | #ifdef CONFIG_SPU_BASE |
@@ -115,9 +105,6 @@ static void __init qpace_setup_arch(void) | |||
115 | #ifdef CONFIG_DUMMY_CONSOLE | 105 | #ifdef CONFIG_DUMMY_CONSOLE |
116 | conswitchp = &dummy_con; | 106 | conswitchp = &dummy_con; |
117 | #endif | 107 | #endif |
118 | |||
119 | /* set notifier function */ | ||
120 | platform_notify = &qpace_notify; | ||
121 | } | 108 | } |
122 | 109 | ||
123 | static int __init qpace_probe(void) | 110 | static int __init qpace_probe(void) |
@@ -141,6 +128,8 @@ define_machine(qpace) { | |||
141 | .power_off = rtas_power_off, | 128 | .power_off = rtas_power_off, |
142 | .halt = rtas_halt, | 129 | .halt = rtas_halt, |
143 | .get_boot_time = rtas_get_boot_time, | 130 | .get_boot_time = rtas_get_boot_time, |
131 | .get_rtc_time = rtas_get_rtc_time, | ||
132 | .set_rtc_time = rtas_set_rtc_time, | ||
144 | .calibrate_decr = generic_calibrate_decr, | 133 | .calibrate_decr = generic_calibrate_decr, |
145 | .progress = qpace_progress, | 134 | .progress = qpace_progress, |
146 | .init_IRQ = iic_init_IRQ, | 135 | .init_IRQ = iic_init_IRQ, |
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index e487ad68ac11..9abd210d87c1 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c | |||
@@ -114,7 +114,7 @@ static inline void mm_needs_global_tlbie(struct mm_struct *mm) | |||
114 | int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1; | 114 | int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1; |
115 | 115 | ||
116 | /* Global TLBIE broadcast required with SPEs. */ | 116 | /* Global TLBIE broadcast required with SPEs. */ |
117 | __cpus_setall(&mm->cpu_vm_mask, nr); | 117 | bitmap_fill(cpumask_bits(mm_cpumask(mm)), nr); |
118 | } | 118 | } |
119 | 119 | ||
120 | void spu_associate_mm(struct spu *spu, struct mm_struct *mm) | 120 | void spu_associate_mm(struct spu *spu, struct mm_struct *mm) |
diff --git a/arch/powerpc/platforms/cell/spu_fault.c b/arch/powerpc/platforms/cell/spu_fault.c index c8b1cd42905d..95d8dadf2d87 100644 --- a/arch/powerpc/platforms/cell/spu_fault.c +++ b/arch/powerpc/platforms/cell/spu_fault.c | |||
@@ -39,60 +39,56 @@ int spu_handle_mm_fault(struct mm_struct *mm, unsigned long ea, | |||
39 | unsigned long is_write; | 39 | unsigned long is_write; |
40 | int ret; | 40 | int ret; |
41 | 41 | ||
42 | #if 0 | 42 | if (mm == NULL) |
43 | if (!IS_VALID_EA(ea)) { | ||
44 | return -EFAULT; | 43 | return -EFAULT; |
45 | } | 44 | |
46 | #endif /* XXX */ | 45 | if (mm->pgd == NULL) |
47 | if (mm == NULL) { | ||
48 | return -EFAULT; | ||
49 | } | ||
50 | if (mm->pgd == NULL) { | ||
51 | return -EFAULT; | 46 | return -EFAULT; |
52 | } | ||
53 | 47 | ||
54 | down_read(&mm->mmap_sem); | 48 | down_read(&mm->mmap_sem); |
49 | ret = -EFAULT; | ||
55 | vma = find_vma(mm, ea); | 50 | vma = find_vma(mm, ea); |
56 | if (!vma) | 51 | if (!vma) |
57 | goto bad_area; | 52 | goto out_unlock; |
58 | if (vma->vm_start <= ea) | 53 | |
59 | goto good_area; | 54 | if (ea < vma->vm_start) { |
60 | if (!(vma->vm_flags & VM_GROWSDOWN)) | 55 | if (!(vma->vm_flags & VM_GROWSDOWN)) |
61 | goto bad_area; | 56 | goto out_unlock; |
62 | if (expand_stack(vma, ea)) | 57 | if (expand_stack(vma, ea)) |
63 | goto bad_area; | 58 | goto out_unlock; |
64 | good_area: | 59 | } |
60 | |||
65 | is_write = dsisr & MFC_DSISR_ACCESS_PUT; | 61 | is_write = dsisr & MFC_DSISR_ACCESS_PUT; |
66 | if (is_write) { | 62 | if (is_write) { |
67 | if (!(vma->vm_flags & VM_WRITE)) | 63 | if (!(vma->vm_flags & VM_WRITE)) |
68 | goto bad_area; | 64 | goto out_unlock; |
69 | } else { | 65 | } else { |
70 | if (dsisr & MFC_DSISR_ACCESS_DENIED) | 66 | if (dsisr & MFC_DSISR_ACCESS_DENIED) |
71 | goto bad_area; | 67 | goto out_unlock; |
72 | if (!(vma->vm_flags & (VM_READ | VM_EXEC))) | 68 | if (!(vma->vm_flags & (VM_READ | VM_EXEC))) |
73 | goto bad_area; | 69 | goto out_unlock; |
74 | } | 70 | } |
71 | |||
75 | ret = 0; | 72 | ret = 0; |
76 | *flt = handle_mm_fault(mm, vma, ea, is_write); | 73 | *flt = handle_mm_fault(mm, vma, ea, is_write); |
77 | if (unlikely(*flt & VM_FAULT_ERROR)) { | 74 | if (unlikely(*flt & VM_FAULT_ERROR)) { |
78 | if (*flt & VM_FAULT_OOM) { | 75 | if (*flt & VM_FAULT_OOM) { |
79 | ret = -ENOMEM; | 76 | ret = -ENOMEM; |
80 | goto bad_area; | 77 | goto out_unlock; |
81 | } else if (*flt & VM_FAULT_SIGBUS) { | 78 | } else if (*flt & VM_FAULT_SIGBUS) { |
82 | ret = -EFAULT; | 79 | ret = -EFAULT; |
83 | goto bad_area; | 80 | goto out_unlock; |
84 | } | 81 | } |
85 | BUG(); | 82 | BUG(); |
86 | } | 83 | } |
84 | |||
87 | if (*flt & VM_FAULT_MAJOR) | 85 | if (*flt & VM_FAULT_MAJOR) |
88 | current->maj_flt++; | 86 | current->maj_flt++; |
89 | else | 87 | else |
90 | current->min_flt++; | 88 | current->min_flt++; |
91 | up_read(&mm->mmap_sem); | ||
92 | return ret; | ||
93 | 89 | ||
94 | bad_area: | 90 | out_unlock: |
95 | up_read(&mm->mmap_sem); | 91 | up_read(&mm->mmap_sem); |
96 | return -EFAULT; | 92 | return ret; |
97 | } | 93 | } |
98 | EXPORT_SYMBOL_GPL(spu_handle_mm_fault); | 94 | EXPORT_SYMBOL_GPL(spu_handle_mm_fault); |
diff --git a/arch/powerpc/platforms/cell/spufs/context.c b/arch/powerpc/platforms/cell/spufs/context.c index 6653ddbed048..db5398c0339f 100644 --- a/arch/powerpc/platforms/cell/spufs/context.c +++ b/arch/powerpc/platforms/cell/spufs/context.c | |||
@@ -35,6 +35,8 @@ atomic_t nr_spu_contexts = ATOMIC_INIT(0); | |||
35 | struct spu_context *alloc_spu_context(struct spu_gang *gang) | 35 | struct spu_context *alloc_spu_context(struct spu_gang *gang) |
36 | { | 36 | { |
37 | struct spu_context *ctx; | 37 | struct spu_context *ctx; |
38 | struct timespec ts; | ||
39 | |||
38 | ctx = kzalloc(sizeof *ctx, GFP_KERNEL); | 40 | ctx = kzalloc(sizeof *ctx, GFP_KERNEL); |
39 | if (!ctx) | 41 | if (!ctx) |
40 | goto out; | 42 | goto out; |
@@ -64,6 +66,8 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang) | |||
64 | __spu_update_sched_info(ctx); | 66 | __spu_update_sched_info(ctx); |
65 | spu_set_timeslice(ctx); | 67 | spu_set_timeslice(ctx); |
66 | ctx->stats.util_state = SPU_UTIL_IDLE_LOADED; | 68 | ctx->stats.util_state = SPU_UTIL_IDLE_LOADED; |
69 | ktime_get_ts(&ts); | ||
70 | ctx->stats.tstamp = timespec_to_ns(&ts); | ||
67 | 71 | ||
68 | atomic_inc(&nr_spu_contexts); | 72 | atomic_inc(&nr_spu_contexts); |
69 | goto out; | 73 | goto out; |
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c index 0da7f2bf5ee1..d6a519e6e1c1 100644 --- a/arch/powerpc/platforms/cell/spufs/file.c +++ b/arch/powerpc/platforms/cell/spufs/file.c | |||
@@ -568,16 +568,17 @@ spufs_regs_write(struct file *file, const char __user *buffer, | |||
568 | struct spu_lscsa *lscsa = ctx->csa.lscsa; | 568 | struct spu_lscsa *lscsa = ctx->csa.lscsa; |
569 | int ret; | 569 | int ret; |
570 | 570 | ||
571 | size = min_t(ssize_t, sizeof lscsa->gprs - *pos, size); | 571 | if (*pos >= sizeof(lscsa->gprs)) |
572 | if (size <= 0) | ||
573 | return -EFBIG; | 572 | return -EFBIG; |
573 | |||
574 | size = min_t(ssize_t, sizeof(lscsa->gprs) - *pos, size); | ||
574 | *pos += size; | 575 | *pos += size; |
575 | 576 | ||
576 | ret = spu_acquire_saved(ctx); | 577 | ret = spu_acquire_saved(ctx); |
577 | if (ret) | 578 | if (ret) |
578 | return ret; | 579 | return ret; |
579 | 580 | ||
580 | ret = copy_from_user(lscsa->gprs + *pos - size, | 581 | ret = copy_from_user((char *)lscsa->gprs + *pos - size, |
581 | buffer, size) ? -EFAULT : size; | 582 | buffer, size) ? -EFAULT : size; |
582 | 583 | ||
583 | spu_release_saved(ctx); | 584 | spu_release_saved(ctx); |
@@ -623,10 +624,11 @@ spufs_fpcr_write(struct file *file, const char __user * buffer, | |||
623 | struct spu_lscsa *lscsa = ctx->csa.lscsa; | 624 | struct spu_lscsa *lscsa = ctx->csa.lscsa; |
624 | int ret; | 625 | int ret; |
625 | 626 | ||
626 | size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size); | 627 | if (*pos >= sizeof(lscsa->fpcr)) |
627 | if (size <= 0) | ||
628 | return -EFBIG; | 628 | return -EFBIG; |
629 | 629 | ||
630 | size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size); | ||
631 | |||
630 | ret = spu_acquire_saved(ctx); | 632 | ret = spu_acquire_saved(ctx); |
631 | if (ret) | 633 | if (ret) |
632 | return ret; | 634 | return ret; |
@@ -2665,7 +2667,7 @@ static const struct file_operations spufs_ctx_fops = { | |||
2665 | .release = single_release, | 2667 | .release = single_release, |
2666 | }; | 2668 | }; |
2667 | 2669 | ||
2668 | struct spufs_tree_descr spufs_dir_contents[] = { | 2670 | const struct spufs_tree_descr spufs_dir_contents[] = { |
2669 | { "capabilities", &spufs_caps_fops, 0444, }, | 2671 | { "capabilities", &spufs_caps_fops, 0444, }, |
2670 | { "mem", &spufs_mem_fops, 0666, LS_SIZE, }, | 2672 | { "mem", &spufs_mem_fops, 0666, LS_SIZE, }, |
2671 | { "regs", &spufs_regs_fops, 0666, sizeof(struct spu_reg128[128]), }, | 2673 | { "regs", &spufs_regs_fops, 0666, sizeof(struct spu_reg128[128]), }, |
@@ -2706,7 +2708,7 @@ struct spufs_tree_descr spufs_dir_contents[] = { | |||
2706 | {}, | 2708 | {}, |
2707 | }; | 2709 | }; |
2708 | 2710 | ||
2709 | struct spufs_tree_descr spufs_dir_nosched_contents[] = { | 2711 | const struct spufs_tree_descr spufs_dir_nosched_contents[] = { |
2710 | { "capabilities", &spufs_caps_fops, 0444, }, | 2712 | { "capabilities", &spufs_caps_fops, 0444, }, |
2711 | { "mem", &spufs_mem_fops, 0666, LS_SIZE, }, | 2713 | { "mem", &spufs_mem_fops, 0666, LS_SIZE, }, |
2712 | { "mbox", &spufs_mbox_fops, 0444, }, | 2714 | { "mbox", &spufs_mbox_fops, 0444, }, |
@@ -2731,12 +2733,12 @@ struct spufs_tree_descr spufs_dir_nosched_contents[] = { | |||
2731 | {}, | 2733 | {}, |
2732 | }; | 2734 | }; |
2733 | 2735 | ||
2734 | struct spufs_tree_descr spufs_dir_debug_contents[] = { | 2736 | const struct spufs_tree_descr spufs_dir_debug_contents[] = { |
2735 | { ".ctx", &spufs_ctx_fops, 0444, }, | 2737 | { ".ctx", &spufs_ctx_fops, 0444, }, |
2736 | {}, | 2738 | {}, |
2737 | }; | 2739 | }; |
2738 | 2740 | ||
2739 | struct spufs_coredump_reader spufs_coredump_read[] = { | 2741 | const struct spufs_coredump_reader spufs_coredump_read[] = { |
2740 | { "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])}, | 2742 | { "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])}, |
2741 | { "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) }, | 2743 | { "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) }, |
2742 | { "lslr", NULL, spufs_lslr_get, 19 }, | 2744 | { "lslr", NULL, spufs_lslr_get, 19 }, |
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c index e309ef70a531..64f068540d0d 100644 --- a/arch/powerpc/platforms/cell/spufs/inode.c +++ b/arch/powerpc/platforms/cell/spufs/inode.c | |||
@@ -186,8 +186,9 @@ static int spufs_rmdir(struct inode *parent, struct dentry *dir) | |||
186 | return simple_rmdir(parent, dir); | 186 | return simple_rmdir(parent, dir); |
187 | } | 187 | } |
188 | 188 | ||
189 | static int spufs_fill_dir(struct dentry *dir, struct spufs_tree_descr *files, | 189 | static int spufs_fill_dir(struct dentry *dir, |
190 | int mode, struct spu_context *ctx) | 190 | const struct spufs_tree_descr *files, int mode, |
191 | struct spu_context *ctx) | ||
191 | { | 192 | { |
192 | struct dentry *dentry, *tmp; | 193 | struct dentry *dentry, *tmp; |
193 | int ret; | 194 | int ret; |
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c index c58bd36b0c5b..4ddf769a64e5 100644 --- a/arch/powerpc/platforms/cell/spufs/run.c +++ b/arch/powerpc/platforms/cell/spufs/run.c | |||
@@ -117,6 +117,9 @@ static int spu_setup_isolated(struct spu_context *ctx) | |||
117 | cond_resched(); | 117 | cond_resched(); |
118 | } | 118 | } |
119 | 119 | ||
120 | /* clear purge status */ | ||
121 | out_be64(mfc_cntl, 0); | ||
122 | |||
120 | /* put the SPE in kernel mode to allow access to the loader */ | 123 | /* put the SPE in kernel mode to allow access to the loader */ |
121 | sr1 = spu_mfc_sr1_get(ctx->spu); | 124 | sr1 = spu_mfc_sr1_get(ctx->spu); |
122 | sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK; | 125 | sr1 &= ~MFC_STATE1_PROBLEM_STATE_MASK; |
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c index 6a0ad196aeb3..f085369301b1 100644 --- a/arch/powerpc/platforms/cell/spufs/sched.c +++ b/arch/powerpc/platforms/cell/spufs/sched.c | |||
@@ -508,7 +508,7 @@ static void __spu_add_to_rq(struct spu_context *ctx) | |||
508 | list_add_tail(&ctx->rq, &spu_prio->runq[ctx->prio]); | 508 | list_add_tail(&ctx->rq, &spu_prio->runq[ctx->prio]); |
509 | set_bit(ctx->prio, spu_prio->bitmap); | 509 | set_bit(ctx->prio, spu_prio->bitmap); |
510 | if (!spu_prio->nr_waiting++) | 510 | if (!spu_prio->nr_waiting++) |
511 | __mod_timer(&spusched_timer, jiffies + SPUSCHED_TICK); | 511 | mod_timer(&spusched_timer, jiffies + SPUSCHED_TICK); |
512 | } | 512 | } |
513 | } | 513 | } |
514 | 514 | ||
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h index 3bf908e2873a..ae31573bea4a 100644 --- a/arch/powerpc/platforms/cell/spufs/spufs.h +++ b/arch/powerpc/platforms/cell/spufs/spufs.h | |||
@@ -241,9 +241,9 @@ struct spufs_tree_descr { | |||
241 | size_t size; | 241 | size_t size; |
242 | }; | 242 | }; |
243 | 243 | ||
244 | extern struct spufs_tree_descr spufs_dir_contents[]; | 244 | extern const struct spufs_tree_descr spufs_dir_contents[]; |
245 | extern struct spufs_tree_descr spufs_dir_nosched_contents[]; | 245 | extern const struct spufs_tree_descr spufs_dir_nosched_contents[]; |
246 | extern struct spufs_tree_descr spufs_dir_debug_contents[]; | 246 | extern const struct spufs_tree_descr spufs_dir_debug_contents[]; |
247 | 247 | ||
248 | /* system call implementation */ | 248 | /* system call implementation */ |
249 | extern struct spufs_calls spufs_calls; | 249 | extern struct spufs_calls spufs_calls; |
@@ -358,7 +358,7 @@ struct spufs_coredump_reader { | |||
358 | u64 (*get)(struct spu_context *ctx); | 358 | u64 (*get)(struct spu_context *ctx); |
359 | size_t size; | 359 | size_t size; |
360 | }; | 360 | }; |
361 | extern struct spufs_coredump_reader spufs_coredump_read[]; | 361 | extern const struct spufs_coredump_reader spufs_coredump_read[]; |
362 | extern int spufs_coredump_num_notes; | 362 | extern int spufs_coredump_num_notes; |
363 | 363 | ||
364 | extern int spu_init_csa(struct spu_state *csa); | 364 | extern int spu_init_csa(struct spu_state *csa); |
diff --git a/arch/powerpc/platforms/chrp/Kconfig b/arch/powerpc/platforms/chrp/Kconfig index 22b4b4e3b6f0..37d438bd5b7a 100644 --- a/arch/powerpc/platforms/chrp/Kconfig +++ b/arch/powerpc/platforms/chrp/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config PPC_CHRP | 1 | config PPC_CHRP |
2 | bool "Common Hardware Reference Platform (CHRP) based machines" | 2 | bool "Common Hardware Reference Platform (CHRP) based machines" |
3 | depends on PPC_MULTIPLATFORM && PPC32 | 3 | depends on 6xx |
4 | select MPIC | 4 | select MPIC |
5 | select PPC_I8259 | 5 | select PPC_I8259 |
6 | select PPC_INDIRECT_PCI | 6 | select PPC_INDIRECT_PCI |
diff --git a/arch/powerpc/platforms/chrp/pegasos_eth.c b/arch/powerpc/platforms/chrp/pegasos_eth.c index 130ff72d99dd..039fc8e82199 100644 --- a/arch/powerpc/platforms/chrp/pegasos_eth.c +++ b/arch/powerpc/platforms/chrp/pegasos_eth.c | |||
@@ -21,8 +21,8 @@ | |||
21 | #define PEGASOS2_SRAM_BASE (0xf2000000) | 21 | #define PEGASOS2_SRAM_BASE (0xf2000000) |
22 | #define PEGASOS2_SRAM_SIZE (256*1024) | 22 | #define PEGASOS2_SRAM_SIZE (256*1024) |
23 | 23 | ||
24 | #define PEGASOS2_SRAM_BASE_ETH0 (PEGASOS2_SRAM_BASE) | 24 | #define PEGASOS2_SRAM_BASE_ETH_PORT0 (PEGASOS2_SRAM_BASE) |
25 | #define PEGASOS2_SRAM_BASE_ETH1 (PEGASOS2_SRAM_BASE_ETH0 + (PEGASOS2_SRAM_SIZE / 2) ) | 25 | #define PEGASOS2_SRAM_BASE_ETH_PORT1 (PEGASOS2_SRAM_BASE_ETH_PORT0 + (PEGASOS2_SRAM_SIZE / 2) ) |
26 | 26 | ||
27 | 27 | ||
28 | #define PEGASOS2_SRAM_RXRING_SIZE (PEGASOS2_SRAM_SIZE/4) | 28 | #define PEGASOS2_SRAM_RXRING_SIZE (PEGASOS2_SRAM_SIZE/4) |
@@ -47,75 +47,42 @@ static struct platform_device mv643xx_eth_shared_device = { | |||
47 | .resource = mv643xx_eth_shared_resources, | 47 | .resource = mv643xx_eth_shared_resources, |
48 | }; | 48 | }; |
49 | 49 | ||
50 | static struct resource mv643xx_eth0_resources[] = { | 50 | static struct resource mv643xx_eth_port1_resources[] = { |
51 | [0] = { | 51 | [0] = { |
52 | .name = "eth0 irq", | 52 | .name = "eth port1 irq", |
53 | .start = 9, | 53 | .start = 9, |
54 | .end = 9, | 54 | .end = 9, |
55 | .flags = IORESOURCE_IRQ, | 55 | .flags = IORESOURCE_IRQ, |
56 | }, | 56 | }, |
57 | }; | 57 | }; |
58 | 58 | ||
59 | 59 | static struct mv643xx_eth_platform_data eth_port1_pd = { | |
60 | static struct mv643xx_eth_platform_data eth0_pd = { | ||
61 | .shared = &mv643xx_eth_shared_device, | ||
62 | .port_number = 0, | ||
63 | |||
64 | .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0, | ||
65 | .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE, | ||
66 | .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16, | ||
67 | |||
68 | .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH0 + PEGASOS2_SRAM_TXRING_SIZE, | ||
69 | .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE, | ||
70 | .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16, | ||
71 | }; | ||
72 | |||
73 | static struct platform_device eth0_device = { | ||
74 | .name = MV643XX_ETH_NAME, | ||
75 | .id = 0, | ||
76 | .num_resources = ARRAY_SIZE(mv643xx_eth0_resources), | ||
77 | .resource = mv643xx_eth0_resources, | ||
78 | .dev = { | ||
79 | .platform_data = ð0_pd, | ||
80 | }, | ||
81 | }; | ||
82 | |||
83 | static struct resource mv643xx_eth1_resources[] = { | ||
84 | [0] = { | ||
85 | .name = "eth1 irq", | ||
86 | .start = 9, | ||
87 | .end = 9, | ||
88 | .flags = IORESOURCE_IRQ, | ||
89 | }, | ||
90 | }; | ||
91 | |||
92 | static struct mv643xx_eth_platform_data eth1_pd = { | ||
93 | .shared = &mv643xx_eth_shared_device, | 60 | .shared = &mv643xx_eth_shared_device, |
94 | .port_number = 1, | 61 | .port_number = 1, |
62 | .phy_addr = MV643XX_ETH_PHY_ADDR(7), | ||
95 | 63 | ||
96 | .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1, | 64 | .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH_PORT1, |
97 | .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE, | 65 | .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE, |
98 | .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16, | 66 | .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16, |
99 | 67 | ||
100 | .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH1 + PEGASOS2_SRAM_TXRING_SIZE, | 68 | .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH_PORT1 + PEGASOS2_SRAM_TXRING_SIZE, |
101 | .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE, | 69 | .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE, |
102 | .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16, | 70 | .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16, |
103 | }; | 71 | }; |
104 | 72 | ||
105 | static struct platform_device eth1_device = { | 73 | static struct platform_device eth_port1_device = { |
106 | .name = MV643XX_ETH_NAME, | 74 | .name = MV643XX_ETH_NAME, |
107 | .id = 1, | 75 | .id = 1, |
108 | .num_resources = ARRAY_SIZE(mv643xx_eth1_resources), | 76 | .num_resources = ARRAY_SIZE(mv643xx_eth_port1_resources), |
109 | .resource = mv643xx_eth1_resources, | 77 | .resource = mv643xx_eth_port1_resources, |
110 | .dev = { | 78 | .dev = { |
111 | .platform_data = ð1_pd, | 79 | .platform_data = ð_port1_pd, |
112 | }, | 80 | }, |
113 | }; | 81 | }; |
114 | 82 | ||
115 | static struct platform_device *mv643xx_eth_pd_devs[] __initdata = { | 83 | static struct platform_device *mv643xx_eth_pd_devs[] __initdata = { |
116 | &mv643xx_eth_shared_device, | 84 | &mv643xx_eth_shared_device, |
117 | ð0_device, | 85 | ð_port1_device, |
118 | ð1_device, | ||
119 | }; | 86 | }; |
120 | 87 | ||
121 | /***********/ | 88 | /***********/ |
@@ -191,15 +158,10 @@ static int __init mv643xx_eth_add_pds(void) | |||
191 | 158 | ||
192 | if ( Enable_SRAM() < 0) | 159 | if ( Enable_SRAM() < 0) |
193 | { | 160 | { |
194 | eth0_pd.tx_sram_addr = 0; | 161 | eth_port1_pd.tx_sram_addr = 0; |
195 | eth0_pd.tx_sram_size = 0; | 162 | eth_port1_pd.tx_sram_size = 0; |
196 | eth0_pd.rx_sram_addr = 0; | 163 | eth_port1_pd.rx_sram_addr = 0; |
197 | eth0_pd.rx_sram_size = 0; | 164 | eth_port1_pd.rx_sram_size = 0; |
198 | |||
199 | eth1_pd.tx_sram_addr = 0; | ||
200 | eth1_pd.tx_sram_size = 0; | ||
201 | eth1_pd.rx_sram_addr = 0; | ||
202 | eth1_pd.rx_sram_size = 0; | ||
203 | 165 | ||
204 | #ifdef BE_VERBOSE | 166 | #ifdef BE_VERBOSE |
205 | printk("Pegasos II/Marvell MV64361: Can't enable the " | 167 | printk("Pegasos II/Marvell MV64361: Can't enable the " |
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig index 4f9f8184d164..291ac9d8cbee 100644 --- a/arch/powerpc/platforms/embedded6xx/Kconfig +++ b/arch/powerpc/platforms/embedded6xx/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config EMBEDDED6xx | 1 | config EMBEDDED6xx |
2 | bool "Embedded 6xx/7xx/7xxx-based boards" | 2 | bool "Embedded 6xx/7xx/7xxx-based boards" |
3 | depends on PPC32 && BROKEN_ON_SMP && PPC_MULTIPLATFORM | 3 | depends on 6xx && BROKEN_ON_SMP |
4 | 4 | ||
5 | config LINKSTATION | 5 | config LINKSTATION |
6 | bool "Linkstation / Kurobox(HG) from Buffalo" | 6 | bool "Linkstation / Kurobox(HG) from Buffalo" |
diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig index 7ddd0a2c8027..647e87787437 100644 --- a/arch/powerpc/platforms/iseries/Kconfig +++ b/arch/powerpc/platforms/iseries/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config PPC_ISERIES | 1 | config PPC_ISERIES |
2 | bool "IBM Legacy iSeries" | 2 | bool "IBM Legacy iSeries" |
3 | depends on PPC_MULTIPLATFORM && PPC64 | 3 | depends on PPC64 && PPC_BOOK3S |
4 | select PPC_INDIRECT_IO | 4 | select PPC_INDIRECT_IO |
5 | select PPC_PCI_CHOICE if EMBEDDED | 5 | select PPC_PCI_CHOICE if EMBEDDED |
6 | 6 | ||
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c index 701d9297c207..94f444758836 100644 --- a/arch/powerpc/platforms/iseries/irq.c +++ b/arch/powerpc/platforms/iseries/irq.c | |||
@@ -214,7 +214,7 @@ void __init iSeries_activate_IRQs() | |||
214 | unsigned long flags; | 214 | unsigned long flags; |
215 | 215 | ||
216 | for_each_irq (irq) { | 216 | for_each_irq (irq) { |
217 | irq_desc_t *desc = get_irq_desc(irq); | 217 | struct irq_desc *desc = get_irq_desc(irq); |
218 | 218 | ||
219 | if (desc && desc->chip && desc->chip->startup) { | 219 | if (desc && desc->chip && desc->chip->startup) { |
220 | spin_lock_irqsave(&desc->lock, flags); | 220 | spin_lock_irqsave(&desc->lock, flags); |
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c index 24519b96d6ad..a6cd3394feaa 100644 --- a/arch/powerpc/platforms/iseries/setup.c +++ b/arch/powerpc/platforms/iseries/setup.c | |||
@@ -617,7 +617,7 @@ static void iseries_dedicated_idle(void) | |||
617 | } | 617 | } |
618 | 618 | ||
619 | static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size, | 619 | static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size, |
620 | unsigned long flags) | 620 | unsigned long flags, void *caller) |
621 | { | 621 | { |
622 | return (void __iomem *)address; | 622 | return (void __iomem *)address; |
623 | } | 623 | } |
diff --git a/arch/powerpc/platforms/maple/Kconfig b/arch/powerpc/platforms/maple/Kconfig index a6467a5591fa..1ea621a94c3b 100644 --- a/arch/powerpc/platforms/maple/Kconfig +++ b/arch/powerpc/platforms/maple/Kconfig | |||
@@ -1,5 +1,5 @@ | |||
1 | config PPC_MAPLE | 1 | config PPC_MAPLE |
2 | depends on PPC_MULTIPLATFORM && PPC64 | 2 | depends on PPC64 && PPC_BOOK3S |
3 | bool "Maple 970FX Evaluation Board" | 3 | bool "Maple 970FX Evaluation Board" |
4 | select PCI | 4 | select PCI |
5 | select MPIC | 5 | select MPIC |
diff --git a/arch/powerpc/platforms/pasemi/Kconfig b/arch/powerpc/platforms/pasemi/Kconfig index 348e0619e3e5..a2aeb327d185 100644 --- a/arch/powerpc/platforms/pasemi/Kconfig +++ b/arch/powerpc/platforms/pasemi/Kconfig | |||
@@ -1,5 +1,5 @@ | |||
1 | config PPC_PASEMI | 1 | config PPC_PASEMI |
2 | depends on PPC_MULTIPLATFORM && PPC64 | 2 | depends on PPC64 && PPC_BOOK3S |
3 | bool "PA Semi SoC-based platforms" | 3 | bool "PA Semi SoC-based platforms" |
4 | default n | 4 | default n |
5 | select MPIC | 5 | select MPIC |
diff --git a/arch/powerpc/platforms/powermac/Kconfig b/arch/powerpc/platforms/powermac/Kconfig index 055990ca8ce6..1e1a0873e1dd 100644 --- a/arch/powerpc/platforms/powermac/Kconfig +++ b/arch/powerpc/platforms/powermac/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config PPC_PMAC | 1 | config PPC_PMAC |
2 | bool "Apple PowerMac based machines" | 2 | bool "Apple PowerMac based machines" |
3 | depends on PPC_MULTIPLATFORM | 3 | depends on PPC_BOOK3S |
4 | select MPIC | 4 | select MPIC |
5 | select PCI | 5 | select PCI |
6 | select PPC_INDIRECT_PCI if PPC32 | 6 | select PPC_INDIRECT_PCI if PPC32 |
diff --git a/arch/powerpc/platforms/powermac/cpufreq_64.c b/arch/powerpc/platforms/powermac/cpufreq_64.c index beb38333b6d2..22ecfbe7183d 100644 --- a/arch/powerpc/platforms/powermac/cpufreq_64.c +++ b/arch/powerpc/platforms/powermac/cpufreq_64.c | |||
@@ -86,6 +86,7 @@ static int (*g5_query_freq)(void); | |||
86 | 86 | ||
87 | static DEFINE_MUTEX(g5_switch_mutex); | 87 | static DEFINE_MUTEX(g5_switch_mutex); |
88 | 88 | ||
89 | static unsigned long transition_latency; | ||
89 | 90 | ||
90 | #ifdef CONFIG_PMAC_SMU | 91 | #ifdef CONFIG_PMAC_SMU |
91 | 92 | ||
@@ -357,7 +358,7 @@ static unsigned int g5_cpufreq_get_speed(unsigned int cpu) | |||
357 | 358 | ||
358 | static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy) | 359 | static int g5_cpufreq_cpu_init(struct cpufreq_policy *policy) |
359 | { | 360 | { |
360 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; | 361 | policy->cpuinfo.transition_latency = transition_latency; |
361 | policy->cur = g5_cpu_freqs[g5_query_freq()].frequency; | 362 | policy->cur = g5_cpu_freqs[g5_query_freq()].frequency; |
362 | /* secondary CPUs are tied to the primary one by the | 363 | /* secondary CPUs are tied to the primary one by the |
363 | * cpufreq core if in the secondary policy we tell it that | 364 | * cpufreq core if in the secondary policy we tell it that |
@@ -500,6 +501,7 @@ static int __init g5_neo2_cpufreq_init(struct device_node *cpus) | |||
500 | g5_cpu_freqs[1].frequency = max_freq/2; | 501 | g5_cpu_freqs[1].frequency = max_freq/2; |
501 | 502 | ||
502 | /* Set callbacks */ | 503 | /* Set callbacks */ |
504 | transition_latency = 12000; | ||
503 | g5_switch_freq = g5_scom_switch_freq; | 505 | g5_switch_freq = g5_scom_switch_freq; |
504 | g5_query_freq = g5_scom_query_freq; | 506 | g5_query_freq = g5_scom_query_freq; |
505 | freq_method = "SCOM"; | 507 | freq_method = "SCOM"; |
@@ -675,6 +677,7 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus) | |||
675 | g5_cpu_freqs[1].frequency = min_freq; | 677 | g5_cpu_freqs[1].frequency = min_freq; |
676 | 678 | ||
677 | /* Set callbacks */ | 679 | /* Set callbacks */ |
680 | transition_latency = CPUFREQ_ETERNAL; | ||
678 | g5_switch_volt = g5_pfunc_switch_volt; | 681 | g5_switch_volt = g5_pfunc_switch_volt; |
679 | g5_switch_freq = g5_pfunc_switch_freq; | 682 | g5_switch_freq = g5_pfunc_switch_freq; |
680 | g5_query_freq = g5_pfunc_query_freq; | 683 | g5_query_freq = g5_pfunc_query_freq; |
diff --git a/arch/powerpc/platforms/powermac/pic.h b/arch/powerpc/platforms/powermac/pic.h index c44c89f5e532..d622a8345aaa 100644 --- a/arch/powerpc/platforms/powermac/pic.h +++ b/arch/powerpc/platforms/powermac/pic.h | |||
@@ -3,7 +3,7 @@ | |||
3 | 3 | ||
4 | #include <linux/irq.h> | 4 | #include <linux/irq.h> |
5 | 5 | ||
6 | extern struct hw_interrupt_type pmac_pic; | 6 | extern struct irq_chip pmac_pic; |
7 | 7 | ||
8 | extern void pmac_pic_init(void); | 8 | extern void pmac_pic_init(void); |
9 | extern int pmac_get_irq(void); | 9 | extern int pmac_get_irq(void); |
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c index 9b78f5300c24..45936c9ed0ec 100644 --- a/arch/powerpc/platforms/powermac/setup.c +++ b/arch/powerpc/platforms/powermac/setup.c | |||
@@ -746,4 +746,7 @@ define_machine(powermac) { | |||
746 | #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64) | 746 | #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64) |
747 | .cpu_die = pmac_cpu_die, | 747 | .cpu_die = pmac_cpu_die, |
748 | #endif | 748 | #endif |
749 | #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC32) | ||
750 | .cpu_die = generic_mach_cpu_die, | ||
751 | #endif | ||
749 | }; | 752 | }; |
diff --git a/arch/powerpc/platforms/prep/Kconfig b/arch/powerpc/platforms/prep/Kconfig index 29d411279b0c..bf8330ef2e76 100644 --- a/arch/powerpc/platforms/prep/Kconfig +++ b/arch/powerpc/platforms/prep/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config PPC_PREP | 1 | config PPC_PREP |
2 | bool "PowerPC Reference Platform (PReP) based machines" | 2 | bool "PowerPC Reference Platform (PReP) based machines" |
3 | depends on PPC_MULTIPLATFORM && PPC32 && BROKEN | 3 | depends on 6xx && BROKEN |
4 | select MPIC | 4 | select MPIC |
5 | select PPC_I8259 | 5 | select PPC_I8259 |
6 | select PPC_INDIRECT_PCI | 6 | select PPC_INDIRECT_PCI |
diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig index 920cf7a454b1..dfe316b161a9 100644 --- a/arch/powerpc/platforms/ps3/Kconfig +++ b/arch/powerpc/platforms/ps3/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config PPC_PS3 | 1 | config PPC_PS3 |
2 | bool "Sony PS3" | 2 | bool "Sony PS3" |
3 | depends on PPC_MULTIPLATFORM && PPC64 | 3 | depends on PPC64 && PPC_BOOK3S |
4 | select PPC_CELL | 4 | select PPC_CELL |
5 | select USB_ARCH_HAS_OHCI | 5 | select USB_ARCH_HAS_OHCI |
6 | select USB_OHCI_LITTLE_ENDIAN | 6 | select USB_OHCI_LITTLE_ENDIAN |
@@ -128,6 +128,13 @@ config PS3_FLASH | |||
128 | be disabled on the kernel command line using "ps3flash=off", to | 128 | be disabled on the kernel command line using "ps3flash=off", to |
129 | not allocate this fixed buffer. | 129 | not allocate this fixed buffer. |
130 | 130 | ||
131 | config PS3_VRAM | ||
132 | tristate "PS3 Video RAM Storage Driver" | ||
133 | depends on FB_PS3=y && BLOCK && m | ||
134 | help | ||
135 | This driver allows you to use excess PS3 video RAM as volatile | ||
136 | storage or system swap. | ||
137 | |||
131 | config PS3_LPM | 138 | config PS3_LPM |
132 | tristate "PS3 Logical Performance Monitor support" | 139 | tristate "PS3 Logical Performance Monitor support" |
133 | depends on PPC_PS3 | 140 | depends on PPC_PS3 |
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c index d281cc0bca71..9a2b6d948610 100644 --- a/arch/powerpc/platforms/ps3/mm.c +++ b/arch/powerpc/platforms/ps3/mm.c | |||
@@ -311,7 +311,7 @@ static int __init ps3_mm_add_memory(void) | |||
311 | result = add_memory(0, start_addr, map.r1.size); | 311 | result = add_memory(0, start_addr, map.r1.size); |
312 | 312 | ||
313 | if (result) { | 313 | if (result) { |
314 | DBG("%s:%d: add_memory failed: (%d)\n", | 314 | pr_err("%s:%d: add_memory failed: (%d)\n", |
315 | __func__, __LINE__, result); | 315 | __func__, __LINE__, result); |
316 | return result; | 316 | return result; |
317 | } | 317 | } |
@@ -322,7 +322,7 @@ static int __init ps3_mm_add_memory(void) | |||
322 | result = online_pages(start_pfn, nr_pages); | 322 | result = online_pages(start_pfn, nr_pages); |
323 | 323 | ||
324 | if (result) | 324 | if (result) |
325 | DBG("%s:%d: online_pages failed: (%d)\n", | 325 | pr_err("%s:%d: online_pages failed: (%d)\n", |
326 | __func__, __LINE__, result); | 326 | __func__, __LINE__, result); |
327 | 327 | ||
328 | return result; | 328 | return result; |
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c index 58311a867851..a705fffbb498 100644 --- a/arch/powerpc/platforms/ps3/system-bus.c +++ b/arch/powerpc/platforms/ps3/system-bus.c | |||
@@ -376,7 +376,7 @@ static int ps3_system_bus_probe(struct device *_dev) | |||
376 | struct ps3_system_bus_driver *drv; | 376 | struct ps3_system_bus_driver *drv; |
377 | 377 | ||
378 | BUG_ON(!dev); | 378 | BUG_ON(!dev); |
379 | pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id); | 379 | dev_dbg(_dev, "%s:%d\n", __func__, __LINE__); |
380 | 380 | ||
381 | drv = ps3_system_bus_dev_to_system_bus_drv(dev); | 381 | drv = ps3_system_bus_dev_to_system_bus_drv(dev); |
382 | BUG_ON(!drv); | 382 | BUG_ON(!drv); |
@@ -398,7 +398,7 @@ static int ps3_system_bus_remove(struct device *_dev) | |||
398 | struct ps3_system_bus_driver *drv; | 398 | struct ps3_system_bus_driver *drv; |
399 | 399 | ||
400 | BUG_ON(!dev); | 400 | BUG_ON(!dev); |
401 | pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id); | 401 | dev_dbg(_dev, "%s:%d\n", __func__, __LINE__); |
402 | 402 | ||
403 | drv = ps3_system_bus_dev_to_system_bus_drv(dev); | 403 | drv = ps3_system_bus_dev_to_system_bus_drv(dev); |
404 | BUG_ON(!drv); | 404 | BUG_ON(!drv); |
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig index ddc2a307cd50..f0e6f28427bd 100644 --- a/arch/powerpc/platforms/pseries/Kconfig +++ b/arch/powerpc/platforms/pseries/Kconfig | |||
@@ -1,5 +1,5 @@ | |||
1 | config PPC_PSERIES | 1 | config PPC_PSERIES |
2 | depends on PPC_MULTIPLATFORM && PPC64 | 2 | depends on PPC64 && PPC_BOOK3S |
3 | bool "IBM pSeries & new (POWER5-based) iSeries" | 3 | bool "IBM pSeries & new (POWER5-based) iSeries" |
4 | select MPIC | 4 | select MPIC |
5 | select PPC_I8259 | 5 | select PPC_I8259 |
@@ -25,6 +25,11 @@ config EEH | |||
25 | depends on PPC_PSERIES && PCI | 25 | depends on PPC_PSERIES && PCI |
26 | default y if !EMBEDDED | 26 | default y if !EMBEDDED |
27 | 27 | ||
28 | config PSERIES_MSI | ||
29 | bool | ||
30 | depends on PCI_MSI && EEH | ||
31 | default y | ||
32 | |||
28 | config SCANLOG | 33 | config SCANLOG |
29 | tristate "Scanlog dump interface" | 34 | tristate "Scanlog dump interface" |
30 | depends on RTAS_PROC && PPC_PSERIES | 35 | depends on RTAS_PROC && PPC_PSERIES |
@@ -63,3 +68,13 @@ config CMM | |||
63 | makes sense for a system running in an LPAR where the unused pages | 68 | makes sense for a system running in an LPAR where the unused pages |
64 | will be reused for other LPARs. The interface allows firmware to | 69 | will be reused for other LPARs. The interface allows firmware to |
65 | balance memory across many LPARs. | 70 | balance memory across many LPARs. |
71 | |||
72 | config DTL | ||
73 | bool "Dispatch Trace Log" | ||
74 | depends on PPC_SPLPAR && DEBUG_FS | ||
75 | help | ||
76 | SPLPAR machines can log hypervisor preempt & dispatch events to a | ||
77 | kernel buffer. Saying Y here will enable logging these events, | ||
78 | which are accessible through a debugfs file. | ||
79 | |||
80 | Say N if you are unsure. | ||
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile index dfe574af2dc0..790c0b872d4f 100644 --- a/arch/powerpc/platforms/pseries/Makefile +++ b/arch/powerpc/platforms/pseries/Makefile | |||
@@ -15,7 +15,7 @@ obj-$(CONFIG_SCANLOG) += scanlog.o | |||
15 | obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o eeh_sysfs.o | 15 | obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o eeh_sysfs.o |
16 | obj-$(CONFIG_KEXEC) += kexec.o | 16 | obj-$(CONFIG_KEXEC) += kexec.o |
17 | obj-$(CONFIG_PCI) += pci.o pci_dlpar.o | 17 | obj-$(CONFIG_PCI) += pci.o pci_dlpar.o |
18 | obj-$(CONFIG_PCI_MSI) += msi.o | 18 | obj-$(CONFIG_PSERIES_MSI) += msi.o |
19 | 19 | ||
20 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o | 20 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o |
21 | obj-$(CONFIG_MEMORY_HOTPLUG) += hotplug-memory.o | 21 | obj-$(CONFIG_MEMORY_HOTPLUG) += hotplug-memory.o |
@@ -25,3 +25,4 @@ obj-$(CONFIG_HVCS) += hvcserver.o | |||
25 | obj-$(CONFIG_HCALL_STATS) += hvCall_inst.o | 25 | obj-$(CONFIG_HCALL_STATS) += hvCall_inst.o |
26 | obj-$(CONFIG_PHYP_DUMP) += phyp_dump.o | 26 | obj-$(CONFIG_PHYP_DUMP) += phyp_dump.o |
27 | obj-$(CONFIG_CMM) += cmm.o | 27 | obj-$(CONFIG_CMM) += cmm.o |
28 | obj-$(CONFIG_DTL) += dtl.o | ||
diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c new file mode 100644 index 000000000000..fafcaa0e81ef --- /dev/null +++ b/arch/powerpc/platforms/pseries/dtl.c | |||
@@ -0,0 +1,278 @@ | |||
1 | /* | ||
2 | * Virtual Processor Dispatch Trace Log | ||
3 | * | ||
4 | * (C) Copyright IBM Corporation 2009 | ||
5 | * | ||
6 | * Author: Jeremy Kerr <jk@ozlabs.org> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2, or (at your option) | ||
11 | * any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
21 | */ | ||
22 | |||
23 | #include <linux/init.h> | ||
24 | #include <linux/debugfs.h> | ||
25 | #include <asm/smp.h> | ||
26 | #include <asm/system.h> | ||
27 | #include <asm/uaccess.h> | ||
28 | |||
29 | #include "plpar_wrappers.h" | ||
30 | |||
31 | /* | ||
32 | * Layout of entries in the hypervisor's DTL buffer. Although we don't | ||
33 | * actually access the internals of an entry (we only need to know the size), | ||
34 | * we might as well define it here for reference. | ||
35 | */ | ||
36 | struct dtl_entry { | ||
37 | u8 dispatch_reason; | ||
38 | u8 preempt_reason; | ||
39 | u16 processor_id; | ||
40 | u32 enqueue_to_dispatch_time; | ||
41 | u32 ready_to_enqueue_time; | ||
42 | u32 waiting_to_ready_time; | ||
43 | u64 timebase; | ||
44 | u64 fault_addr; | ||
45 | u64 srr0; | ||
46 | u64 srr1; | ||
47 | }; | ||
48 | |||
49 | struct dtl { | ||
50 | struct dtl_entry *buf; | ||
51 | struct dentry *file; | ||
52 | int cpu; | ||
53 | int buf_entries; | ||
54 | u64 last_idx; | ||
55 | }; | ||
56 | static DEFINE_PER_CPU(struct dtl, dtl); | ||
57 | |||
58 | /* | ||
59 | * Dispatch trace log event mask: | ||
60 | * 0x7: 0x1: voluntary virtual processor waits | ||
61 | * 0x2: time-slice preempts | ||
62 | * 0x4: virtual partition memory page faults | ||
63 | */ | ||
64 | static u8 dtl_event_mask = 0x7; | ||
65 | |||
66 | |||
67 | /* | ||
68 | * Size of per-cpu log buffers. Default is just under 16 pages worth. | ||
69 | */ | ||
70 | static int dtl_buf_entries = (16 * 85); | ||
71 | |||
72 | |||
73 | static int dtl_enable(struct dtl *dtl) | ||
74 | { | ||
75 | unsigned long addr; | ||
76 | int ret, hwcpu; | ||
77 | |||
78 | /* only allow one reader */ | ||
79 | if (dtl->buf) | ||
80 | return -EBUSY; | ||
81 | |||
82 | /* we need to store the original allocation size for use during read */ | ||
83 | dtl->buf_entries = dtl_buf_entries; | ||
84 | |||
85 | dtl->buf = kmalloc_node(dtl->buf_entries * sizeof(struct dtl_entry), | ||
86 | GFP_KERNEL, cpu_to_node(dtl->cpu)); | ||
87 | if (!dtl->buf) { | ||
88 | printk(KERN_WARNING "%s: buffer alloc failed for cpu %d\n", | ||
89 | __func__, dtl->cpu); | ||
90 | return -ENOMEM; | ||
91 | } | ||
92 | |||
93 | /* Register our dtl buffer with the hypervisor. The HV expects the | ||
94 | * buffer size to be passed in the second word of the buffer */ | ||
95 | ((u32 *)dtl->buf)[1] = dtl->buf_entries * sizeof(struct dtl_entry); | ||
96 | |||
97 | hwcpu = get_hard_smp_processor_id(dtl->cpu); | ||
98 | addr = __pa(dtl->buf); | ||
99 | ret = register_dtl(hwcpu, addr); | ||
100 | if (ret) { | ||
101 | printk(KERN_WARNING "%s: DTL registration for cpu %d (hw %d) " | ||
102 | "failed with %d\n", __func__, dtl->cpu, hwcpu, ret); | ||
103 | kfree(dtl->buf); | ||
104 | return -EIO; | ||
105 | } | ||
106 | |||
107 | /* set our initial buffer indices */ | ||
108 | dtl->last_idx = lppaca[dtl->cpu].dtl_idx = 0; | ||
109 | |||
110 | /* ensure that our updates to the lppaca fields have occurred before | ||
111 | * we actually enable the logging */ | ||
112 | smp_wmb(); | ||
113 | |||
114 | /* enable event logging */ | ||
115 | lppaca[dtl->cpu].dtl_enable_mask = dtl_event_mask; | ||
116 | |||
117 | return 0; | ||
118 | } | ||
119 | |||
120 | static void dtl_disable(struct dtl *dtl) | ||
121 | { | ||
122 | int hwcpu = get_hard_smp_processor_id(dtl->cpu); | ||
123 | |||
124 | lppaca[dtl->cpu].dtl_enable_mask = 0x0; | ||
125 | |||
126 | unregister_dtl(hwcpu, __pa(dtl->buf)); | ||
127 | |||
128 | kfree(dtl->buf); | ||
129 | dtl->buf = NULL; | ||
130 | dtl->buf_entries = 0; | ||
131 | } | ||
132 | |||
133 | /* file interface */ | ||
134 | |||
135 | static int dtl_file_open(struct inode *inode, struct file *filp) | ||
136 | { | ||
137 | struct dtl *dtl = inode->i_private; | ||
138 | int rc; | ||
139 | |||
140 | rc = dtl_enable(dtl); | ||
141 | if (rc) | ||
142 | return rc; | ||
143 | |||
144 | filp->private_data = dtl; | ||
145 | return 0; | ||
146 | } | ||
147 | |||
148 | static int dtl_file_release(struct inode *inode, struct file *filp) | ||
149 | { | ||
150 | struct dtl *dtl = inode->i_private; | ||
151 | dtl_disable(dtl); | ||
152 | return 0; | ||
153 | } | ||
154 | |||
155 | static ssize_t dtl_file_read(struct file *filp, char __user *buf, size_t len, | ||
156 | loff_t *pos) | ||
157 | { | ||
158 | int rc, cur_idx, last_idx, n_read, n_req, read_size; | ||
159 | struct dtl *dtl; | ||
160 | |||
161 | if ((len % sizeof(struct dtl_entry)) != 0) | ||
162 | return -EINVAL; | ||
163 | |||
164 | dtl = filp->private_data; | ||
165 | |||
166 | /* requested number of entries to read */ | ||
167 | n_req = len / sizeof(struct dtl_entry); | ||
168 | |||
169 | /* actual number of entries read */ | ||
170 | n_read = 0; | ||
171 | |||
172 | cur_idx = lppaca[dtl->cpu].dtl_idx; | ||
173 | last_idx = dtl->last_idx; | ||
174 | |||
175 | if (cur_idx - last_idx > dtl->buf_entries) { | ||
176 | pr_debug("%s: hv buffer overflow for cpu %d, samples lost\n", | ||
177 | __func__, dtl->cpu); | ||
178 | } | ||
179 | |||
180 | cur_idx %= dtl->buf_entries; | ||
181 | last_idx %= dtl->buf_entries; | ||
182 | |||
183 | /* read the tail of the buffer if we've wrapped */ | ||
184 | if (last_idx > cur_idx) { | ||
185 | read_size = min(n_req, dtl->buf_entries - last_idx); | ||
186 | |||
187 | rc = copy_to_user(buf, &dtl->buf[last_idx], | ||
188 | read_size * sizeof(struct dtl_entry)); | ||
189 | if (rc) | ||
190 | return -EFAULT; | ||
191 | |||
192 | last_idx = 0; | ||
193 | n_req -= read_size; | ||
194 | n_read += read_size; | ||
195 | buf += read_size * sizeof(struct dtl_entry); | ||
196 | } | ||
197 | |||
198 | /* .. and now the head */ | ||
199 | read_size = min(n_req, cur_idx - last_idx); | ||
200 | rc = copy_to_user(buf, &dtl->buf[last_idx], | ||
201 | read_size * sizeof(struct dtl_entry)); | ||
202 | if (rc) | ||
203 | return -EFAULT; | ||
204 | |||
205 | n_read += read_size; | ||
206 | dtl->last_idx += n_read; | ||
207 | |||
208 | return n_read * sizeof(struct dtl_entry); | ||
209 | } | ||
210 | |||
211 | static struct file_operations dtl_fops = { | ||
212 | .open = dtl_file_open, | ||
213 | .release = dtl_file_release, | ||
214 | .read = dtl_file_read, | ||
215 | .llseek = no_llseek, | ||
216 | }; | ||
217 | |||
218 | static struct dentry *dtl_dir; | ||
219 | |||
220 | static int dtl_setup_file(struct dtl *dtl) | ||
221 | { | ||
222 | char name[10]; | ||
223 | |||
224 | sprintf(name, "cpu-%d", dtl->cpu); | ||
225 | |||
226 | dtl->file = debugfs_create_file(name, 0400, dtl_dir, dtl, &dtl_fops); | ||
227 | if (!dtl->file) | ||
228 | return -ENOMEM; | ||
229 | |||
230 | return 0; | ||
231 | } | ||
232 | |||
233 | static int dtl_init(void) | ||
234 | { | ||
235 | struct dentry *event_mask_file, *buf_entries_file; | ||
236 | int rc, i; | ||
237 | |||
238 | if (!firmware_has_feature(FW_FEATURE_SPLPAR)) | ||
239 | return -ENODEV; | ||
240 | |||
241 | /* set up common debugfs structure */ | ||
242 | |||
243 | rc = -ENOMEM; | ||
244 | dtl_dir = debugfs_create_dir("dtl", powerpc_debugfs_root); | ||
245 | if (!dtl_dir) { | ||
246 | printk(KERN_WARNING "%s: can't create dtl root dir\n", | ||
247 | __func__); | ||
248 | goto err; | ||
249 | } | ||
250 | |||
251 | event_mask_file = debugfs_create_x8("dtl_event_mask", 0600, | ||
252 | dtl_dir, &dtl_event_mask); | ||
253 | buf_entries_file = debugfs_create_u32("dtl_buf_entries", 0600, | ||
254 | dtl_dir, &dtl_buf_entries); | ||
255 | |||
256 | if (!event_mask_file || !buf_entries_file) { | ||
257 | printk(KERN_WARNING "%s: can't create dtl files\n", __func__); | ||
258 | goto err_remove_dir; | ||
259 | } | ||
260 | |||
261 | /* set up the per-cpu log structures */ | ||
262 | for_each_possible_cpu(i) { | ||
263 | struct dtl *dtl = &per_cpu(dtl, i); | ||
264 | dtl->cpu = i; | ||
265 | |||
266 | rc = dtl_setup_file(dtl); | ||
267 | if (rc) | ||
268 | goto err_remove_dir; | ||
269 | } | ||
270 | |||
271 | return 0; | ||
272 | |||
273 | err_remove_dir: | ||
274 | debugfs_remove_recursive(dtl_dir); | ||
275 | err: | ||
276 | return rc; | ||
277 | } | ||
278 | arch_initcall(dtl_init); | ||
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c index 0ad56ff7b4a0..380420f8c400 100644 --- a/arch/powerpc/platforms/pseries/eeh_driver.c +++ b/arch/powerpc/platforms/pseries/eeh_driver.c | |||
@@ -79,6 +79,40 @@ static int irq_in_use(unsigned int irq) | |||
79 | return rc; | 79 | return rc; |
80 | } | 80 | } |
81 | 81 | ||
82 | /** | ||
83 | * eeh_disable_irq - disable interrupt for the recovering device | ||
84 | */ | ||
85 | static void eeh_disable_irq(struct pci_dev *dev) | ||
86 | { | ||
87 | struct device_node *dn = pci_device_to_OF_node(dev); | ||
88 | |||
89 | /* Don't disable MSI and MSI-X interrupts. They are | ||
90 | * effectively disabled by the DMA Stopped state | ||
91 | * when an EEH error occurs. | ||
92 | */ | ||
93 | if (dev->msi_enabled || dev->msix_enabled) | ||
94 | return; | ||
95 | |||
96 | if (!irq_in_use(dev->irq)) | ||
97 | return; | ||
98 | |||
99 | PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED; | ||
100 | disable_irq_nosync(dev->irq); | ||
101 | } | ||
102 | |||
103 | /** | ||
104 | * eeh_enable_irq - enable interrupt for the recovering device | ||
105 | */ | ||
106 | static void eeh_enable_irq(struct pci_dev *dev) | ||
107 | { | ||
108 | struct device_node *dn = pci_device_to_OF_node(dev); | ||
109 | |||
110 | if ((PCI_DN(dn)->eeh_mode) & EEH_MODE_IRQ_DISABLED) { | ||
111 | PCI_DN(dn)->eeh_mode &= ~EEH_MODE_IRQ_DISABLED; | ||
112 | enable_irq(dev->irq); | ||
113 | } | ||
114 | } | ||
115 | |||
82 | /* ------------------------------------------------------- */ | 116 | /* ------------------------------------------------------- */ |
83 | /** | 117 | /** |
84 | * eeh_report_error - report pci error to each device driver | 118 | * eeh_report_error - report pci error to each device driver |
@@ -98,11 +132,8 @@ static void eeh_report_error(struct pci_dev *dev, void *userdata) | |||
98 | if (!driver) | 132 | if (!driver) |
99 | return; | 133 | return; |
100 | 134 | ||
101 | if (irq_in_use (dev->irq)) { | 135 | eeh_disable_irq(dev); |
102 | struct device_node *dn = pci_device_to_OF_node(dev); | 136 | |
103 | PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED; | ||
104 | disable_irq_nosync(dev->irq); | ||
105 | } | ||
106 | if (!driver->err_handler || | 137 | if (!driver->err_handler || |
107 | !driver->err_handler->error_detected) | 138 | !driver->err_handler->error_detected) |
108 | return; | 139 | return; |
@@ -147,15 +178,12 @@ static void eeh_report_reset(struct pci_dev *dev, void *userdata) | |||
147 | { | 178 | { |
148 | enum pci_ers_result rc, *res = userdata; | 179 | enum pci_ers_result rc, *res = userdata; |
149 | struct pci_driver *driver = dev->driver; | 180 | struct pci_driver *driver = dev->driver; |
150 | struct device_node *dn = pci_device_to_OF_node(dev); | ||
151 | 181 | ||
152 | if (!driver) | 182 | if (!driver) |
153 | return; | 183 | return; |
154 | 184 | ||
155 | if ((PCI_DN(dn)->eeh_mode) & EEH_MODE_IRQ_DISABLED) { | 185 | eeh_enable_irq(dev); |
156 | PCI_DN(dn)->eeh_mode &= ~EEH_MODE_IRQ_DISABLED; | 186 | |
157 | enable_irq(dev->irq); | ||
158 | } | ||
159 | if (!driver->err_handler || | 187 | if (!driver->err_handler || |
160 | !driver->err_handler->slot_reset) | 188 | !driver->err_handler->slot_reset) |
161 | return; | 189 | return; |
@@ -174,17 +202,14 @@ static void eeh_report_reset(struct pci_dev *dev, void *userdata) | |||
174 | static void eeh_report_resume(struct pci_dev *dev, void *userdata) | 202 | static void eeh_report_resume(struct pci_dev *dev, void *userdata) |
175 | { | 203 | { |
176 | struct pci_driver *driver = dev->driver; | 204 | struct pci_driver *driver = dev->driver; |
177 | struct device_node *dn = pci_device_to_OF_node(dev); | ||
178 | 205 | ||
179 | dev->error_state = pci_channel_io_normal; | 206 | dev->error_state = pci_channel_io_normal; |
180 | 207 | ||
181 | if (!driver) | 208 | if (!driver) |
182 | return; | 209 | return; |
183 | 210 | ||
184 | if ((PCI_DN(dn)->eeh_mode) & EEH_MODE_IRQ_DISABLED) { | 211 | eeh_enable_irq(dev); |
185 | PCI_DN(dn)->eeh_mode &= ~EEH_MODE_IRQ_DISABLED; | 212 | |
186 | enable_irq(dev->irq); | ||
187 | } | ||
188 | if (!driver->err_handler || | 213 | if (!driver->err_handler || |
189 | !driver->err_handler->resume) | 214 | !driver->err_handler->resume) |
190 | return; | 215 | return; |
@@ -208,15 +233,12 @@ static void eeh_report_failure(struct pci_dev *dev, void *userdata) | |||
208 | if (!driver) | 233 | if (!driver) |
209 | return; | 234 | return; |
210 | 235 | ||
211 | if (irq_in_use (dev->irq)) { | 236 | eeh_disable_irq(dev); |
212 | struct device_node *dn = pci_device_to_OF_node(dev); | 237 | |
213 | PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED; | 238 | if (!driver->err_handler || |
214 | disable_irq_nosync(dev->irq); | 239 | !driver->err_handler->error_detected) |
215 | } | ||
216 | if (!driver->err_handler) | ||
217 | return; | ||
218 | if (!driver->err_handler->error_detected) | ||
219 | return; | 240 | return; |
241 | |||
220 | driver->err_handler->error_detected(dev, pci_channel_io_perm_failure); | 242 | driver->err_handler->error_detected(dev, pci_channel_io_perm_failure); |
221 | } | 243 | } |
222 | 244 | ||
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c index f15222bbe136..bf2e1ac41308 100644 --- a/arch/powerpc/platforms/pseries/msi.c +++ b/arch/powerpc/platforms/pseries/msi.c | |||
@@ -71,11 +71,13 @@ static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs) | |||
71 | } while (rtas_busy_delay(rc)); | 71 | } while (rtas_busy_delay(rc)); |
72 | 72 | ||
73 | /* | 73 | /* |
74 | * If the RTAS call succeeded, check the number of irqs is actually | 74 | * If the RTAS call succeeded, return the number of irqs allocated. |
75 | * what we asked for. If not, return an error. | 75 | * If not, make sure we return a negative error code. |
76 | */ | 76 | */ |
77 | if (rc == 0 && rtas_ret[0] != num_irqs) | 77 | if (rc == 0) |
78 | rc = -ENOSPC; | 78 | rc = rtas_ret[0]; |
79 | else if (rc > 0) | ||
80 | rc = -rc; | ||
79 | 81 | ||
80 | pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d), got %d rc = %d\n", | 82 | pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d), got %d rc = %d\n", |
81 | func, num_irqs, rtas_ret[0], rc); | 83 | func, num_irqs, rtas_ret[0], rc); |
@@ -91,7 +93,7 @@ static void rtas_disable_msi(struct pci_dev *pdev) | |||
91 | if (!pdn) | 93 | if (!pdn) |
92 | return; | 94 | return; |
93 | 95 | ||
94 | if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0)) | 96 | if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0) |
95 | pr_debug("rtas_msi: Setting MSIs to 0 failed!\n"); | 97 | pr_debug("rtas_msi: Setting MSIs to 0 failed!\n"); |
96 | } | 98 | } |
97 | 99 | ||
@@ -132,7 +134,7 @@ static void rtas_teardown_msi_irqs(struct pci_dev *pdev) | |||
132 | rtas_disable_msi(pdev); | 134 | rtas_disable_msi(pdev); |
133 | } | 135 | } |
134 | 136 | ||
135 | static int check_req_msi(struct pci_dev *pdev, int nvec) | 137 | static int check_req(struct pci_dev *pdev, int nvec, char *prop_name) |
136 | { | 138 | { |
137 | struct device_node *dn; | 139 | struct device_node *dn; |
138 | struct pci_dn *pdn; | 140 | struct pci_dn *pdn; |
@@ -144,26 +146,235 @@ static int check_req_msi(struct pci_dev *pdev, int nvec) | |||
144 | 146 | ||
145 | dn = pdn->node; | 147 | dn = pdn->node; |
146 | 148 | ||
147 | req_msi = of_get_property(dn, "ibm,req#msi", NULL); | 149 | req_msi = of_get_property(dn, prop_name, NULL); |
148 | if (!req_msi) { | 150 | if (!req_msi) { |
149 | pr_debug("rtas_msi: No ibm,req#msi on %s\n", dn->full_name); | 151 | pr_debug("rtas_msi: No %s on %s\n", prop_name, dn->full_name); |
150 | return -ENOENT; | 152 | return -ENOENT; |
151 | } | 153 | } |
152 | 154 | ||
153 | if (*req_msi < nvec) { | 155 | if (*req_msi < nvec) { |
154 | pr_debug("rtas_msi: ibm,req#msi requests < %d MSIs\n", nvec); | 156 | pr_debug("rtas_msi: %s requests < %d MSIs\n", prop_name, nvec); |
155 | return -ENOSPC; | 157 | |
158 | if (*req_msi == 0) /* Be paranoid */ | ||
159 | return -ENOSPC; | ||
160 | |||
161 | return *req_msi; | ||
156 | } | 162 | } |
157 | 163 | ||
158 | return 0; | 164 | return 0; |
159 | } | 165 | } |
160 | 166 | ||
167 | static int check_req_msi(struct pci_dev *pdev, int nvec) | ||
168 | { | ||
169 | return check_req(pdev, nvec, "ibm,req#msi"); | ||
170 | } | ||
171 | |||
172 | static int check_req_msix(struct pci_dev *pdev, int nvec) | ||
173 | { | ||
174 | return check_req(pdev, nvec, "ibm,req#msi-x"); | ||
175 | } | ||
176 | |||
177 | /* Quota calculation */ | ||
178 | |||
179 | static struct device_node *find_pe_total_msi(struct pci_dev *dev, int *total) | ||
180 | { | ||
181 | struct device_node *dn; | ||
182 | const u32 *p; | ||
183 | |||
184 | dn = of_node_get(pci_device_to_OF_node(dev)); | ||
185 | while (dn) { | ||
186 | p = of_get_property(dn, "ibm,pe-total-#msi", NULL); | ||
187 | if (p) { | ||
188 | pr_debug("rtas_msi: found prop on dn %s\n", | ||
189 | dn->full_name); | ||
190 | *total = *p; | ||
191 | return dn; | ||
192 | } | ||
193 | |||
194 | dn = of_get_next_parent(dn); | ||
195 | } | ||
196 | |||
197 | return NULL; | ||
198 | } | ||
199 | |||
200 | static struct device_node *find_pe_dn(struct pci_dev *dev, int *total) | ||
201 | { | ||
202 | struct device_node *dn; | ||
203 | |||
204 | /* Found our PE and assume 8 at that point. */ | ||
205 | |||
206 | dn = pci_device_to_OF_node(dev); | ||
207 | if (!dn) | ||
208 | return NULL; | ||
209 | |||
210 | dn = find_device_pe(dn); | ||
211 | if (!dn) | ||
212 | return NULL; | ||
213 | |||
214 | /* We actually want the parent */ | ||
215 | dn = of_get_parent(dn); | ||
216 | if (!dn) | ||
217 | return NULL; | ||
218 | |||
219 | /* Hardcode of 8 for old firmwares */ | ||
220 | *total = 8; | ||
221 | pr_debug("rtas_msi: using PE dn %s\n", dn->full_name); | ||
222 | |||
223 | return dn; | ||
224 | } | ||
225 | |||
226 | struct msi_counts { | ||
227 | struct device_node *requestor; | ||
228 | int num_devices; | ||
229 | int request; | ||
230 | int quota; | ||
231 | int spare; | ||
232 | int over_quota; | ||
233 | }; | ||
234 | |||
235 | static void *count_non_bridge_devices(struct device_node *dn, void *data) | ||
236 | { | ||
237 | struct msi_counts *counts = data; | ||
238 | const u32 *p; | ||
239 | u32 class; | ||
240 | |||
241 | pr_debug("rtas_msi: counting %s\n", dn->full_name); | ||
242 | |||
243 | p = of_get_property(dn, "class-code", NULL); | ||
244 | class = p ? *p : 0; | ||
245 | |||
246 | if ((class >> 8) != PCI_CLASS_BRIDGE_PCI) | ||
247 | counts->num_devices++; | ||
248 | |||
249 | return NULL; | ||
250 | } | ||
251 | |||
252 | static void *count_spare_msis(struct device_node *dn, void *data) | ||
253 | { | ||
254 | struct msi_counts *counts = data; | ||
255 | const u32 *p; | ||
256 | int req; | ||
257 | |||
258 | if (dn == counts->requestor) | ||
259 | req = counts->request; | ||
260 | else { | ||
261 | /* We don't know if a driver will try to use MSI or MSI-X, | ||
262 | * so we just have to punt and use the larger of the two. */ | ||
263 | req = 0; | ||
264 | p = of_get_property(dn, "ibm,req#msi", NULL); | ||
265 | if (p) | ||
266 | req = *p; | ||
267 | |||
268 | p = of_get_property(dn, "ibm,req#msi-x", NULL); | ||
269 | if (p) | ||
270 | req = max(req, (int)*p); | ||
271 | } | ||
272 | |||
273 | if (req < counts->quota) | ||
274 | counts->spare += counts->quota - req; | ||
275 | else if (req > counts->quota) | ||
276 | counts->over_quota++; | ||
277 | |||
278 | return NULL; | ||
279 | } | ||
280 | |||
281 | static int msi_quota_for_device(struct pci_dev *dev, int request) | ||
282 | { | ||
283 | struct device_node *pe_dn; | ||
284 | struct msi_counts counts; | ||
285 | int total; | ||
286 | |||
287 | pr_debug("rtas_msi: calc quota for %s, request %d\n", pci_name(dev), | ||
288 | request); | ||
289 | |||
290 | pe_dn = find_pe_total_msi(dev, &total); | ||
291 | if (!pe_dn) | ||
292 | pe_dn = find_pe_dn(dev, &total); | ||
293 | |||
294 | if (!pe_dn) { | ||
295 | pr_err("rtas_msi: couldn't find PE for %s\n", pci_name(dev)); | ||
296 | goto out; | ||
297 | } | ||
298 | |||
299 | pr_debug("rtas_msi: found PE %s\n", pe_dn->full_name); | ||
300 | |||
301 | memset(&counts, 0, sizeof(struct msi_counts)); | ||
302 | |||
303 | /* Work out how many devices we have below this PE */ | ||
304 | traverse_pci_devices(pe_dn, count_non_bridge_devices, &counts); | ||
305 | |||
306 | if (counts.num_devices == 0) { | ||
307 | pr_err("rtas_msi: found 0 devices under PE for %s\n", | ||
308 | pci_name(dev)); | ||
309 | goto out; | ||
310 | } | ||
311 | |||
312 | counts.quota = total / counts.num_devices; | ||
313 | if (request <= counts.quota) | ||
314 | goto out; | ||
315 | |||
316 | /* else, we have some more calculating to do */ | ||
317 | counts.requestor = pci_device_to_OF_node(dev); | ||
318 | counts.request = request; | ||
319 | traverse_pci_devices(pe_dn, count_spare_msis, &counts); | ||
320 | |||
321 | /* If the quota isn't an integer multiple of the total, we can | ||
322 | * use the remainder as spare MSIs for anyone that wants them. */ | ||
323 | counts.spare += total % counts.num_devices; | ||
324 | |||
325 | /* Divide any spare by the number of over-quota requestors */ | ||
326 | if (counts.over_quota) | ||
327 | counts.quota += counts.spare / counts.over_quota; | ||
328 | |||
329 | /* And finally clamp the request to the possibly adjusted quota */ | ||
330 | request = min(counts.quota, request); | ||
331 | |||
332 | pr_debug("rtas_msi: request clamped to quota %d\n", request); | ||
333 | out: | ||
334 | of_node_put(pe_dn); | ||
335 | |||
336 | return request; | ||
337 | } | ||
338 | |||
161 | static int rtas_msi_check_device(struct pci_dev *pdev, int nvec, int type) | 339 | static int rtas_msi_check_device(struct pci_dev *pdev, int nvec, int type) |
162 | { | 340 | { |
341 | int quota, rc; | ||
342 | |||
163 | if (type == PCI_CAP_ID_MSIX) | 343 | if (type == PCI_CAP_ID_MSIX) |
164 | pr_debug("rtas_msi: MSI-X untested, trying anyway.\n"); | 344 | rc = check_req_msix(pdev, nvec); |
345 | else | ||
346 | rc = check_req_msi(pdev, nvec); | ||
347 | |||
348 | if (rc) | ||
349 | return rc; | ||
350 | |||
351 | quota = msi_quota_for_device(pdev, nvec); | ||
165 | 352 | ||
166 | return check_req_msi(pdev, nvec); | 353 | if (quota && quota < nvec) |
354 | return quota; | ||
355 | |||
356 | return 0; | ||
357 | } | ||
358 | |||
359 | static int check_msix_entries(struct pci_dev *pdev) | ||
360 | { | ||
361 | struct msi_desc *entry; | ||
362 | int expected; | ||
363 | |||
364 | /* There's no way for us to express to firmware that we want | ||
365 | * a discontiguous, or non-zero based, range of MSI-X entries. | ||
366 | * So we must reject such requests. */ | ||
367 | |||
368 | expected = 0; | ||
369 | list_for_each_entry(entry, &pdev->msi_list, list) { | ||
370 | if (entry->msi_attrib.entry_nr != expected) { | ||
371 | pr_debug("rtas_msi: bad MSI-X entries.\n"); | ||
372 | return -EINVAL; | ||
373 | } | ||
374 | expected++; | ||
375 | } | ||
376 | |||
377 | return 0; | ||
167 | } | 378 | } |
168 | 379 | ||
169 | static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | 380 | static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) |
@@ -177,6 +388,9 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
177 | if (!pdn) | 388 | if (!pdn) |
178 | return -ENODEV; | 389 | return -ENODEV; |
179 | 390 | ||
391 | if (type == PCI_CAP_ID_MSIX && check_msix_entries(pdev)) | ||
392 | return -EINVAL; | ||
393 | |||
180 | /* | 394 | /* |
181 | * Try the new more explicit firmware interface, if that fails fall | 395 | * Try the new more explicit firmware interface, if that fails fall |
182 | * back to the old interface. The old interface is known to never | 396 | * back to the old interface. The old interface is known to never |
@@ -185,21 +399,21 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
185 | if (type == PCI_CAP_ID_MSI) { | 399 | if (type == PCI_CAP_ID_MSI) { |
186 | rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec); | 400 | rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec); |
187 | 401 | ||
188 | if (rc) { | 402 | if (rc < 0) { |
189 | pr_debug("rtas_msi: trying the old firmware call.\n"); | 403 | pr_debug("rtas_msi: trying the old firmware call.\n"); |
190 | rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec); | 404 | rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec); |
191 | } | 405 | } |
192 | } else | 406 | } else |
193 | rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec); | 407 | rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec); |
194 | 408 | ||
195 | if (rc) { | 409 | if (rc != nvec) { |
196 | pr_debug("rtas_msi: rtas_change_msi() failed\n"); | 410 | pr_debug("rtas_msi: rtas_change_msi() failed\n"); |
197 | return rc; | 411 | return rc; |
198 | } | 412 | } |
199 | 413 | ||
200 | i = 0; | 414 | i = 0; |
201 | list_for_each_entry(entry, &pdev->msi_list, list) { | 415 | list_for_each_entry(entry, &pdev->msi_list, list) { |
202 | hwirq = rtas_query_irq_number(pdn, i); | 416 | hwirq = rtas_query_irq_number(pdn, i++); |
203 | if (hwirq < 0) { | 417 | if (hwirq < 0) { |
204 | pr_debug("rtas_msi: error (%d) getting hwirq\n", rc); | 418 | pr_debug("rtas_msi: error (%d) getting hwirq\n", rc); |
205 | return hwirq; | 419 | return hwirq; |
@@ -234,8 +448,8 @@ static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev) | |||
234 | } | 448 | } |
235 | 449 | ||
236 | /* No MSI -> MSIs can't have been assigned by fw, leave LSI */ | 450 | /* No MSI -> MSIs can't have been assigned by fw, leave LSI */ |
237 | if (check_req_msi(pdev, 1)) { | 451 | if (check_req_msi(pdev, 1) && check_req_msix(pdev, 1)) { |
238 | dev_dbg(&pdev->dev, "rtas_msi: no req#msi, nothing to do.\n"); | 452 | dev_dbg(&pdev->dev, "rtas_msi: no req#msi/x, nothing to do.\n"); |
239 | return; | 453 | return; |
240 | } | 454 | } |
241 | 455 | ||
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c index 5e1ed3d60ee5..ad152a0e3946 100644 --- a/arch/powerpc/platforms/pseries/pci_dlpar.c +++ b/arch/powerpc/platforms/pseries/pci_dlpar.c | |||
@@ -137,11 +137,9 @@ EXPORT_SYMBOL_GPL(pcibios_add_pci_devices); | |||
137 | struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn) | 137 | struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn) |
138 | { | 138 | { |
139 | struct pci_controller *phb; | 139 | struct pci_controller *phb; |
140 | int primary; | ||
141 | 140 | ||
142 | pr_debug("PCI: Initializing new hotplug PHB %s\n", dn->full_name); | 141 | pr_debug("PCI: Initializing new hotplug PHB %s\n", dn->full_name); |
143 | 142 | ||
144 | primary = list_empty(&hose_list); | ||
145 | phb = pcibios_alloc_controller(dn); | 143 | phb = pcibios_alloc_controller(dn); |
146 | if (!phb) | 144 | if (!phb) |
147 | return NULL; | 145 | return NULL; |
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h index d967c1893ab5..a24a6b2333b2 100644 --- a/arch/powerpc/platforms/pseries/plpar_wrappers.h +++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h | |||
@@ -43,6 +43,16 @@ static inline long register_slb_shadow(unsigned long cpu, unsigned long vpa) | |||
43 | return vpa_call(0x3, cpu, vpa); | 43 | return vpa_call(0x3, cpu, vpa); |
44 | } | 44 | } |
45 | 45 | ||
46 | static inline long unregister_dtl(unsigned long cpu, unsigned long vpa) | ||
47 | { | ||
48 | return vpa_call(0x6, cpu, vpa); | ||
49 | } | ||
50 | |||
51 | static inline long register_dtl(unsigned long cpu, unsigned long vpa) | ||
52 | { | ||
53 | return vpa_call(0x2, cpu, vpa); | ||
54 | } | ||
55 | |||
46 | static inline long plpar_page_set_loaned(unsigned long vpa) | 56 | static inline long plpar_page_set_loaned(unsigned long vpa) |
47 | { | 57 | { |
48 | unsigned long cmo_page_sz = cmo_get_page_size(); | 58 | unsigned long cmo_page_sz = cmo_get_page_size(); |
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c index c591a25b0b0d..b6f1b137d427 100644 --- a/arch/powerpc/platforms/pseries/reconfig.c +++ b/arch/powerpc/platforms/pseries/reconfig.c | |||
@@ -468,9 +468,13 @@ static int do_update_property(char *buf, size_t bufsize) | |||
468 | 468 | ||
469 | rc = blocking_notifier_call_chain(&pSeries_reconfig_chain, | 469 | rc = blocking_notifier_call_chain(&pSeries_reconfig_chain, |
470 | action, value); | 470 | action, value); |
471 | if (rc == NOTIFY_BAD) { | ||
472 | rc = prom_update_property(np, oldprop, newprop); | ||
473 | return -ENOMEM; | ||
474 | } | ||
471 | } | 475 | } |
472 | 476 | ||
473 | return rc; | 477 | return 0; |
474 | } | 478 | } |
475 | 479 | ||
476 | /** | 480 | /** |
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c index f1c3395633b9..fd969f0e3121 100644 --- a/arch/powerpc/sysdev/cpm2.c +++ b/arch/powerpc/sysdev/cpm2.c | |||
@@ -52,6 +52,7 @@ cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */ | |||
52 | * the communication processor devices. | 52 | * the communication processor devices. |
53 | */ | 53 | */ |
54 | cpm2_map_t __iomem *cpm2_immr; | 54 | cpm2_map_t __iomem *cpm2_immr; |
55 | EXPORT_SYMBOL(cpm2_immr); | ||
55 | 56 | ||
56 | #define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount | 57 | #define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount |
57 | of space for CPM as it is larger | 58 | of space for CPM as it is larger |
@@ -129,7 +130,8 @@ void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src) | |||
129 | brg -= 4; | 130 | brg -= 4; |
130 | } | 131 | } |
131 | bp += brg; | 132 | bp += brg; |
132 | val = (((clk / rate) - 1) << 1) | CPM_BRG_EN | src; | 133 | /* Round the clock divider to the nearest integer. */ |
134 | val = (((clk * 2 / rate) - 1) & ~1) | CPM_BRG_EN | src; | ||
133 | if (div16) | 135 | if (div16) |
134 | val |= CPM_BRG_DIV16; | 136 | val |= CPM_BRG_DIV16; |
135 | 137 | ||
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c index 00d3d17c84a3..e4b6d66d93de 100644 --- a/arch/powerpc/sysdev/cpm_common.c +++ b/arch/powerpc/sysdev/cpm_common.c | |||
@@ -56,7 +56,7 @@ void __init udbg_init_cpm(void) | |||
56 | { | 56 | { |
57 | if (cpm_udbg_txdesc) { | 57 | if (cpm_udbg_txdesc) { |
58 | #ifdef CONFIG_CPM2 | 58 | #ifdef CONFIG_CPM2 |
59 | setbat(1, 0xf0000000, 0xf0000000, 1024*1024, _PAGE_IO); | 59 | setbat(1, 0xf0000000, 0xf0000000, 1024*1024, PAGE_KERNEL_NCG); |
60 | #endif | 60 | #endif |
61 | udbg_putc = udbg_putc_cpm; | 61 | udbg_putc = udbg_putc_cpm; |
62 | } | 62 | } |
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 9817f63723dd..78021d8afc53 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -1,12 +1,16 @@ | |||
1 | /* | 1 | /* |
2 | * MPC83xx/85xx/86xx PCI/PCIE support routing. | 2 | * MPC83xx/85xx/86xx PCI/PCIE support routing. |
3 | * | 3 | * |
4 | * Copyright 2007,2008 Freescale Semiconductor, Inc | 4 | * Copyright 2007-2009 Freescale Semiconductor, Inc. |
5 | * Copyright 2008-2009 MontaVista Software, Inc. | ||
5 | * | 6 | * |
6 | * Initial author: Xianghua Xiao <x.xiao@freescale.com> | 7 | * Initial author: Xianghua Xiao <x.xiao@freescale.com> |
7 | * Recode: ZHANG WEI <wei.zhang@freescale.com> | 8 | * Recode: ZHANG WEI <wei.zhang@freescale.com> |
8 | * Rewrite the routing for Frescale PCI and PCI Express | 9 | * Rewrite the routing for Frescale PCI and PCI Express |
9 | * Roy Zang <tie-fei.zang@freescale.com> | 10 | * Roy Zang <tie-fei.zang@freescale.com> |
11 | * MPC83xx PCI-Express support: | ||
12 | * Tony Li <tony.li@freescale.com> | ||
13 | * Anton Vorontsov <avorontsov@ru.mvista.com> | ||
10 | * | 14 | * |
11 | * This program is free software; you can redistribute it and/or modify it | 15 | * This program is free software; you can redistribute it and/or modify it |
12 | * under the terms of the GNU General Public License as published by the | 16 | * under the terms of the GNU General Public License as published by the |
@@ -27,6 +31,29 @@ | |||
27 | #include <sysdev/fsl_soc.h> | 31 | #include <sysdev/fsl_soc.h> |
28 | #include <sysdev/fsl_pci.h> | 32 | #include <sysdev/fsl_pci.h> |
29 | 33 | ||
34 | static int fsl_pcie_bus_fixup; | ||
35 | |||
36 | static void __init quirk_fsl_pcie_header(struct pci_dev *dev) | ||
37 | { | ||
38 | /* if we aren't a PCIe don't bother */ | ||
39 | if (!pci_find_capability(dev, PCI_CAP_ID_EXP)) | ||
40 | return; | ||
41 | |||
42 | dev->class = PCI_CLASS_BRIDGE_PCI << 8; | ||
43 | fsl_pcie_bus_fixup = 1; | ||
44 | return; | ||
45 | } | ||
46 | |||
47 | static int __init fsl_pcie_check_link(struct pci_controller *hose) | ||
48 | { | ||
49 | u32 val; | ||
50 | |||
51 | early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val); | ||
52 | if (val < PCIE_LTSSM_L0) | ||
53 | return 1; | ||
54 | return 0; | ||
55 | } | ||
56 | |||
30 | #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) | 57 | #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) |
31 | static int __init setup_one_atmu(struct ccsr_pci __iomem *pci, | 58 | static int __init setup_one_atmu(struct ccsr_pci __iomem *pci, |
32 | unsigned int index, const struct resource *res, | 59 | unsigned int index, const struct resource *res, |
@@ -159,28 +186,6 @@ static void __init setup_pci_pcsrbar(struct pci_controller *hose) | |||
159 | #endif | 186 | #endif |
160 | } | 187 | } |
161 | 188 | ||
162 | static int fsl_pcie_bus_fixup; | ||
163 | |||
164 | static void __init quirk_fsl_pcie_header(struct pci_dev *dev) | ||
165 | { | ||
166 | /* if we aren't a PCIe don't bother */ | ||
167 | if (!pci_find_capability(dev, PCI_CAP_ID_EXP)) | ||
168 | return ; | ||
169 | |||
170 | dev->class = PCI_CLASS_BRIDGE_PCI << 8; | ||
171 | fsl_pcie_bus_fixup = 1; | ||
172 | return ; | ||
173 | } | ||
174 | |||
175 | static int __init fsl_pcie_check_link(struct pci_controller *hose) | ||
176 | { | ||
177 | u32 val; | ||
178 | early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val); | ||
179 | if (val < PCIE_LTSSM_L0) | ||
180 | return 1; | ||
181 | return 0; | ||
182 | } | ||
183 | |||
184 | void fsl_pcibios_fixup_bus(struct pci_bus *bus) | 189 | void fsl_pcibios_fixup_bus(struct pci_bus *bus) |
185 | { | 190 | { |
186 | struct pci_controller *hose = (struct pci_controller *) bus->sysdata; | 191 | struct pci_controller *hose = (struct pci_controller *) bus->sysdata; |
@@ -294,8 +299,184 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); | |||
294 | #endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ | 299 | #endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ |
295 | 300 | ||
296 | #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) | 301 | #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) |
302 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header); | ||
303 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314, quirk_fsl_pcie_header); | ||
304 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315E, quirk_fsl_pcie_header); | ||
305 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8315, quirk_fsl_pcie_header); | ||
306 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8377E, quirk_fsl_pcie_header); | ||
307 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8377, quirk_fsl_pcie_header); | ||
308 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8378E, quirk_fsl_pcie_header); | ||
309 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8378, quirk_fsl_pcie_header); | ||
310 | |||
311 | struct mpc83xx_pcie_priv { | ||
312 | void __iomem *cfg_type0; | ||
313 | void __iomem *cfg_type1; | ||
314 | u32 dev_base; | ||
315 | }; | ||
316 | |||
317 | /* | ||
318 | * With the convention of u-boot, the PCIE outbound window 0 serves | ||
319 | * as configuration transactions outbound. | ||
320 | */ | ||
321 | #define PEX_OUTWIN0_BAR 0xCA4 | ||
322 | #define PEX_OUTWIN0_TAL 0xCA8 | ||
323 | #define PEX_OUTWIN0_TAH 0xCAC | ||
324 | |||
325 | static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn) | ||
326 | { | ||
327 | struct pci_controller *hose = bus->sysdata; | ||
328 | |||
329 | if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) | ||
330 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
331 | /* | ||
332 | * Workaround for the HW bug: for Type 0 configure transactions the | ||
333 | * PCI-E controller does not check the device number bits and just | ||
334 | * assumes that the device number bits are 0. | ||
335 | */ | ||
336 | if (bus->number == hose->first_busno || | ||
337 | bus->primary == hose->first_busno) { | ||
338 | if (devfn & 0xf8) | ||
339 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
340 | } | ||
341 | |||
342 | if (ppc_md.pci_exclude_device) { | ||
343 | if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) | ||
344 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
345 | } | ||
346 | |||
347 | return PCIBIOS_SUCCESSFUL; | ||
348 | } | ||
349 | |||
350 | static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus, | ||
351 | unsigned int devfn, int offset) | ||
352 | { | ||
353 | struct pci_controller *hose = bus->sysdata; | ||
354 | struct mpc83xx_pcie_priv *pcie = hose->dn->data; | ||
355 | u8 bus_no = bus->number - hose->first_busno; | ||
356 | u32 dev_base = bus_no << 24 | devfn << 16; | ||
357 | int ret; | ||
358 | |||
359 | ret = mpc83xx_pcie_exclude_device(bus, devfn); | ||
360 | if (ret) | ||
361 | return NULL; | ||
362 | |||
363 | offset &= 0xfff; | ||
364 | |||
365 | /* Type 0 */ | ||
366 | if (bus->number == hose->first_busno) | ||
367 | return pcie->cfg_type0 + offset; | ||
368 | |||
369 | if (pcie->dev_base == dev_base) | ||
370 | goto mapped; | ||
371 | |||
372 | out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, dev_base); | ||
373 | |||
374 | pcie->dev_base = dev_base; | ||
375 | mapped: | ||
376 | return pcie->cfg_type1 + offset; | ||
377 | } | ||
378 | |||
379 | static int mpc83xx_pcie_read_config(struct pci_bus *bus, unsigned int devfn, | ||
380 | int offset, int len, u32 *val) | ||
381 | { | ||
382 | void __iomem *cfg_addr; | ||
383 | |||
384 | cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset); | ||
385 | if (!cfg_addr) | ||
386 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
387 | |||
388 | switch (len) { | ||
389 | case 1: | ||
390 | *val = in_8(cfg_addr); | ||
391 | break; | ||
392 | case 2: | ||
393 | *val = in_le16(cfg_addr); | ||
394 | break; | ||
395 | default: | ||
396 | *val = in_le32(cfg_addr); | ||
397 | break; | ||
398 | } | ||
399 | |||
400 | return PCIBIOS_SUCCESSFUL; | ||
401 | } | ||
402 | |||
403 | static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn, | ||
404 | int offset, int len, u32 val) | ||
405 | { | ||
406 | void __iomem *cfg_addr; | ||
407 | |||
408 | cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset); | ||
409 | if (!cfg_addr) | ||
410 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
411 | |||
412 | switch (len) { | ||
413 | case 1: | ||
414 | out_8(cfg_addr, val); | ||
415 | break; | ||
416 | case 2: | ||
417 | out_le16(cfg_addr, val); | ||
418 | break; | ||
419 | default: | ||
420 | out_le32(cfg_addr, val); | ||
421 | break; | ||
422 | } | ||
423 | |||
424 | return PCIBIOS_SUCCESSFUL; | ||
425 | } | ||
426 | |||
427 | static struct pci_ops mpc83xx_pcie_ops = { | ||
428 | .read = mpc83xx_pcie_read_config, | ||
429 | .write = mpc83xx_pcie_write_config, | ||
430 | }; | ||
431 | |||
432 | static int __init mpc83xx_pcie_setup(struct pci_controller *hose, | ||
433 | struct resource *reg) | ||
434 | { | ||
435 | struct mpc83xx_pcie_priv *pcie; | ||
436 | u32 cfg_bar; | ||
437 | int ret = -ENOMEM; | ||
438 | |||
439 | pcie = zalloc_maybe_bootmem(sizeof(*pcie), GFP_KERNEL); | ||
440 | if (!pcie) | ||
441 | return ret; | ||
442 | |||
443 | pcie->cfg_type0 = ioremap(reg->start, resource_size(reg)); | ||
444 | if (!pcie->cfg_type0) | ||
445 | goto err0; | ||
446 | |||
447 | cfg_bar = in_le32(pcie->cfg_type0 + PEX_OUTWIN0_BAR); | ||
448 | if (!cfg_bar) { | ||
449 | /* PCI-E isn't configured. */ | ||
450 | ret = -ENODEV; | ||
451 | goto err1; | ||
452 | } | ||
453 | |||
454 | pcie->cfg_type1 = ioremap(cfg_bar, 0x1000); | ||
455 | if (!pcie->cfg_type1) | ||
456 | goto err1; | ||
457 | |||
458 | WARN_ON(hose->dn->data); | ||
459 | hose->dn->data = pcie; | ||
460 | hose->ops = &mpc83xx_pcie_ops; | ||
461 | |||
462 | out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAH, 0); | ||
463 | out_le32(pcie->cfg_type0 + PEX_OUTWIN0_TAL, 0); | ||
464 | |||
465 | if (fsl_pcie_check_link(hose)) | ||
466 | hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK; | ||
467 | |||
468 | return 0; | ||
469 | err1: | ||
470 | iounmap(pcie->cfg_type0); | ||
471 | err0: | ||
472 | kfree(pcie); | ||
473 | return ret; | ||
474 | |||
475 | } | ||
476 | |||
297 | int __init mpc83xx_add_bridge(struct device_node *dev) | 477 | int __init mpc83xx_add_bridge(struct device_node *dev) |
298 | { | 478 | { |
479 | int ret; | ||
299 | int len; | 480 | int len; |
300 | struct pci_controller *hose; | 481 | struct pci_controller *hose; |
301 | struct resource rsrc_reg; | 482 | struct resource rsrc_reg; |
@@ -303,6 +484,11 @@ int __init mpc83xx_add_bridge(struct device_node *dev) | |||
303 | const int *bus_range; | 484 | const int *bus_range; |
304 | int primary; | 485 | int primary; |
305 | 486 | ||
487 | if (!of_device_is_available(dev)) { | ||
488 | pr_warning("%s: disabled by the firmware.\n", | ||
489 | dev->full_name); | ||
490 | return -ENODEV; | ||
491 | } | ||
306 | pr_debug("Adding PCI host bridge %s\n", dev->full_name); | 492 | pr_debug("Adding PCI host bridge %s\n", dev->full_name); |
307 | 493 | ||
308 | /* Fetch host bridge registers address */ | 494 | /* Fetch host bridge registers address */ |
@@ -350,7 +536,14 @@ int __init mpc83xx_add_bridge(struct device_node *dev) | |||
350 | hose->first_busno = bus_range ? bus_range[0] : 0; | 536 | hose->first_busno = bus_range ? bus_range[0] : 0; |
351 | hose->last_busno = bus_range ? bus_range[1] : 0xff; | 537 | hose->last_busno = bus_range ? bus_range[1] : 0xff; |
352 | 538 | ||
353 | setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0); | 539 | if (of_device_is_compatible(dev, "fsl,mpc8314-pcie")) { |
540 | ret = mpc83xx_pcie_setup(hose, &rsrc_reg); | ||
541 | if (ret) | ||
542 | goto err0; | ||
543 | } else { | ||
544 | setup_indirect_pci(hose, rsrc_cfg.start, | ||
545 | rsrc_cfg.start + 4, 0); | ||
546 | } | ||
354 | 547 | ||
355 | printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. " | 548 | printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. " |
356 | "Firmware bus number: %d->%d\n", | 549 | "Firmware bus number: %d->%d\n", |
@@ -365,5 +558,8 @@ int __init mpc83xx_add_bridge(struct device_node *dev) | |||
365 | pci_process_bridge_OF_ranges(hose, dev, primary); | 558 | pci_process_bridge_OF_ranges(hose, dev, primary); |
366 | 559 | ||
367 | return 0; | 560 | return 0; |
561 | err0: | ||
562 | pcibios_free_controller(hose); | ||
563 | return ret; | ||
368 | } | 564 | } |
369 | #endif /* CONFIG_PPC_83xx */ | 565 | #endif /* CONFIG_PPC_83xx */ |
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 115cb16351fd..a01c89d3f9bd 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/module.h> | 22 | #include <linux/module.h> |
23 | #include <linux/device.h> | 23 | #include <linux/device.h> |
24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
25 | #include <linux/of.h> | ||
25 | #include <linux/of_platform.h> | 26 | #include <linux/of_platform.h> |
26 | #include <linux/phy.h> | 27 | #include <linux/phy.h> |
27 | #include <linux/phy_fixed.h> | 28 | #include <linux/phy_fixed.h> |
@@ -328,6 +329,9 @@ static int __init fsl_usb_of_init(void) | |||
328 | struct fsl_usb2_platform_data usb_data; | 329 | struct fsl_usb2_platform_data usb_data; |
329 | const unsigned char *prop = NULL; | 330 | const unsigned char *prop = NULL; |
330 | 331 | ||
332 | if (!of_device_is_available(np)) | ||
333 | continue; | ||
334 | |||
331 | memset(&r, 0, sizeof(r)); | 335 | memset(&r, 0, sizeof(r)); |
332 | memset(&usb_data, 0, sizeof(usb_data)); | 336 | memset(&usb_data, 0, sizeof(usb_data)); |
333 | 337 | ||
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 9a89cd3e80a2..a86d3ce01ead 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c | |||
@@ -568,8 +568,7 @@ static void ipic_ack_irq(unsigned int virq) | |||
568 | 568 | ||
569 | spin_lock_irqsave(&ipic_lock, flags); | 569 | spin_lock_irqsave(&ipic_lock, flags); |
570 | 570 | ||
571 | temp = ipic_read(ipic->regs, ipic_info[src].ack); | 571 | temp = 1 << (31 - ipic_info[src].bit); |
572 | temp |= (1 << (31 - ipic_info[src].bit)); | ||
573 | ipic_write(ipic->regs, ipic_info[src].ack, temp); | 572 | ipic_write(ipic->regs, ipic_info[src].ack, temp); |
574 | 573 | ||
575 | /* mb() can't guarantee that ack is finished. But it does finish | 574 | /* mb() can't guarantee that ack is finished. But it does finish |
@@ -592,8 +591,7 @@ static void ipic_mask_irq_and_ack(unsigned int virq) | |||
592 | temp &= ~(1 << (31 - ipic_info[src].bit)); | 591 | temp &= ~(1 << (31 - ipic_info[src].bit)); |
593 | ipic_write(ipic->regs, ipic_info[src].mask, temp); | 592 | ipic_write(ipic->regs, ipic_info[src].mask, temp); |
594 | 593 | ||
595 | temp = ipic_read(ipic->regs, ipic_info[src].ack); | 594 | temp = 1 << (31 - ipic_info[src].bit); |
596 | temp |= (1 << (31 - ipic_info[src].bit)); | ||
597 | ipic_write(ipic->regs, ipic_info[src].ack, temp); | 595 | ipic_write(ipic->regs, ipic_info[src].ack, temp); |
598 | 596 | ||
599 | /* mb() can't guarantee that ack is finished. But it does finish | 597 | /* mb() can't guarantee that ack is finished. But it does finish |
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c index f84217b8863a..5a32cbef9b6c 100644 --- a/arch/powerpc/sysdev/msi_bitmap.c +++ b/arch/powerpc/sysdev/msi_bitmap.c | |||
@@ -141,7 +141,7 @@ void msi_bitmap_free(struct msi_bitmap *bmp) | |||
141 | #define check(x) \ | 141 | #define check(x) \ |
142 | if (!(x)) printk("msi_bitmap: test failed at line %d\n", __LINE__); | 142 | if (!(x)) printk("msi_bitmap: test failed at line %d\n", __LINE__); |
143 | 143 | ||
144 | void test_basics(void) | 144 | void __init test_basics(void) |
145 | { | 145 | { |
146 | struct msi_bitmap bmp; | 146 | struct msi_bitmap bmp; |
147 | int i, size = 512; | 147 | int i, size = 512; |
@@ -186,7 +186,7 @@ void test_basics(void) | |||
186 | kfree(bmp.bitmap); | 186 | kfree(bmp.bitmap); |
187 | } | 187 | } |
188 | 188 | ||
189 | void test_of_node(void) | 189 | void __init test_of_node(void) |
190 | { | 190 | { |
191 | u32 prop_data[] = { 10, 10, 25, 3, 40, 1, 100, 100, 200, 20 }; | 191 | u32 prop_data[] = { 10, 10, 25, 3, 40, 1, 100, 100, 200, 20 }; |
192 | const char *expected_str = "0-9,20-24,28-39,41-99,220-255"; | 192 | const char *expected_str = "0-9,20-24,28-39,41-99,220-255"; |
@@ -234,7 +234,7 @@ void test_of_node(void) | |||
234 | kfree(bmp.bitmap); | 234 | kfree(bmp.bitmap); |
235 | } | 235 | } |
236 | 236 | ||
237 | int msi_bitmap_selftest(void) | 237 | int __init msi_bitmap_selftest(void) |
238 | { | 238 | { |
239 | printk(KERN_DEBUG "Running MSI bitmap self-tests ...\n"); | 239 | printk(KERN_DEBUG "Running MSI bitmap self-tests ...\n"); |
240 | 240 | ||
diff --git a/arch/powerpc/sysdev/pmi.c b/arch/powerpc/sysdev/pmi.c index c858749263e0..aaa915998eb6 100644 --- a/arch/powerpc/sysdev/pmi.c +++ b/arch/powerpc/sysdev/pmi.c | |||
@@ -50,7 +50,7 @@ struct pmi_data { | |||
50 | 50 | ||
51 | static struct pmi_data *data; | 51 | static struct pmi_data *data; |
52 | 52 | ||
53 | static int pmi_irq_handler(int irq, void *dev_id) | 53 | static irqreturn_t pmi_irq_handler(int irq, void *dev_id) |
54 | { | 54 | { |
55 | u8 type; | 55 | u8 type; |
56 | int rc; | 56 | int rc; |
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 5558d932b4d5..6a2d473c345a 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c | |||
@@ -1839,6 +1839,8 @@ static int __init ppc4xx_pci_find_bridges(void) | |||
1839 | { | 1839 | { |
1840 | struct device_node *np; | 1840 | struct device_node *np; |
1841 | 1841 | ||
1842 | ppc_pci_flags |= PPC_PCI_ENABLE_PROC_DOMAINS | PPC_PCI_COMPAT_DOMAIN_0; | ||
1843 | |||
1842 | #ifdef CONFIG_PPC4xx_PCI_EXPRESS | 1844 | #ifdef CONFIG_PPC4xx_PCI_EXPRESS |
1843 | for_each_compatible_node(np, NULL, "ibm,plb-pciex") | 1845 | for_each_compatible_node(np, NULL, "ibm,plb-pciex") |
1844 | ppc4xx_probe_pciex_bridge(np); | 1846 | ppc4xx_probe_pciex_bridge(np); |