Merge commit 'gcl/merge' into merge

2 files changed, 6 insertions, 4 deletions

diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 4911104791c3..21172badd708 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -241,9 +241,11 @@ extern const char *powerpc_base_platform;
 /* We need to mark all pages as being coherent if we're SMP or we have a
  * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II
  * require it for PCI "streaming/prefetch" to work properly.
+ * This is also required by 52xx family.
  */
 #if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \
-        || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260)
+        || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260) \
+        || defined(CONFIG_PPC_MPC52xx)
 #define CPU_FTR_COMMON                  CPU_FTR_NEED_COHERENT
 #else
 #define CPU_FTR_COMMON                  0
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index a1c4cfd25ded..7db2e42d97a2 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -511,7 +511,7 @@ InstructionTLBMiss:
         and     r1,r1,r2                /* writable if _RW and _DIRTY */
         rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
         rlwimi  r3,r3,32-1,31,31        /* _PAGE_USER -> PP lsb */
-        ori     r1,r1,0xe14             /* clear out reserved bits and M */
+        ori     r1,r1,0xe04             /* clear out reserved bits */
         andc    r1,r3,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
         mtspr   SPRN_RPA,r1
         mfspr   r3,SPRN_IMISS
@@ -585,7 +585,7 @@ DataLoadTLBMiss:
         and     r1,r1,r2                /* writable if _RW and _DIRTY */
         rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
         rlwimi  r3,r3,32-1,31,31        /* _PAGE_USER -> PP lsb */
-        ori     r1,r1,0xe14             /* clear out reserved bits and M */
+        ori     r1,r1,0xe04             /* clear out reserved bits */
         andc    r1,r3,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
         mtspr   SPRN_RPA,r1
         mfspr   r3,SPRN_DMISS
@@ -653,7 +653,7 @@ DataStoreTLBMiss:
         stw     r3,0(r2)                /* update PTE (accessed/dirty bits) */
         /* Convert linux-style PTE to low word of PPC-style PTE */
         rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
-        li      r1,0xe15                /* clear out reserved bits and M */
+        li      r1,0xe05                /* clear out reserved bits & PP lsb */
         andc    r1,r3,r1                /* PP = user? 2: 0 */
         mtspr   SPRN_RPA,r1
         mfspr   r3,SPRN_DMISS