Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (45 commits)
  crypto: caam - add support for sha512 variants of existing AEAD algorithms
  crypto: caam - remove unused authkeylen from caam_ctx
  crypto: caam - fix decryption shared vs. non-shared key setting
  crypto: caam - platform_bus_type migration
  crypto: aesni-intel - fix aesni build on i386
  crypto: aesni-intel - Merge with fpu.ko
  crypto: mv_cesa - make count_sgs() null-pointer proof
  crypto: mv_cesa - copy remaining bytes to SRAM only when needed
  crypto: mv_cesa - move digest state initialisation to a better place
  crypto: mv_cesa - fill inner/outer IV fields only in HMAC case
  crypto: mv_cesa - refactor copy_src_to_buf()
  crypto: mv_cesa - no need to save digest state after the last chunk
  crypto: mv_cesa - print a warning when registration of AES algos fail
  crypto: mv_cesa - drop this call to mv_hash_final from mv_hash_finup
  crypto: mv_cesa - the descriptor pointer register needs to be set just once
  crypto: mv_cesa - use ablkcipher_request_cast instead of the manual container_of
  crypto: caam - fix printk recursion for long error texts
  crypto: caam - remove unused keylen from session context
  hwrng: amd - enable AMD hw rnd driver for Maple PPC boards
  hwrng: amd - manage resource allocation
  ...

1 files changed, 85 insertions, 1 deletions

diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 5b7fc29dd6cf..927f94d16e9b 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -1,7 +1,7 @@
 /*
  * P4080DS Device Tree Source
  *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -33,6 +33,17 @@
                 dma1 = &dma1;
                 sdhc = &sdhc;
 
+                crypto = &crypto;
+                sec_jr0 = &sec_jr0;
+                sec_jr1 = &sec_jr1;
+                sec_jr2 = &sec_jr2;
+                sec_jr3 = &sec_jr3;
+                rtic_a = &rtic_a;
+                rtic_b = &rtic_b;
+                rtic_c = &rtic_c;
+                rtic_d = &rtic_d;
+                sec_mon = &sec_mon;
+
                 rio0 = &rapidio0;
         };
 
@@ -410,6 +421,79 @@
                         dr_mode = "host";
                         phy_type = "ulpi";
                 };
+
+                crypto: crypto@300000 {
+                        compatible = "fsl,sec-v4.0";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x300000 0x10000>;
+                        ranges = <0 0x300000 0x10000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <92 2>;
+
+                        sec_jr0: jr@1000 {
+                                compatible = "fsl,sec-v4.0-job-ring";
+                                reg = <0x1000 0x1000>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <88 2>;
+                        };
+
+                        sec_jr1: jr@2000 {
+                                compatible = "fsl,sec-v4.0-job-ring";
+                                reg = <0x2000 0x1000>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <89 2>;
+                        };
+
+                        sec_jr2: jr@3000 {
+                                compatible = "fsl,sec-v4.0-job-ring";
+                                reg = <0x3000 0x1000>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <90 2>;
+                        };
+
+                        sec_jr3: jr@4000 {
+                                compatible = "fsl,sec-v4.0-job-ring";
+                                reg = <0x4000 0x1000>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <91 2>;
+                        };
+
+                        rtic@6000 {
+                                compatible = "fsl,sec-v4.0-rtic";
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0x6000 0x100>;
+                                ranges = <0x0 0x6100 0xe00>;
+
+                                rtic_a: rtic-a@0 {
+                                        compatible = "fsl,sec-v4.0-rtic-memory";
+                                        reg = <0x00 0x20 0x100 0x80>;
+                                };
+
+                                rtic_b: rtic-b@20 {
+                                        compatible = "fsl,sec-v4.0-rtic-memory";
+                                        reg = <0x20 0x20 0x200 0x80>;
+                                };
+
+                                rtic_c: rtic-c@40 {
+                                        compatible = "fsl,sec-v4.0-rtic-memory";
+                                        reg = <0x40 0x20 0x300 0x80>;
+                                };
+
+                                rtic_d: rtic-d@60 {
+                                        compatible = "fsl,sec-v4.0-rtic-memory";
+                                        reg = <0x60 0x20 0x500 0x80>;
+                                };
+                        };
+                };
+
+                sec_mon: sec_mon@314000 {
+                        compatible = "fsl,sec-v4.0-mon";
+                        reg = <0x314000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <93 2>;
+                };
         };
 
         rapidio0: rapidio@ffe0c0000 {