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authorVitaly Bordug <vitb@kernel.crashing.org>2007-07-17 07:03:37 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-17 13:23:02 -0400
commit99121c0da3586f46a0397d9b0b4551a6286d003d (patch)
treee88be81c275bb949a3774b46c7cd89ac1a83ea98 /arch/powerpc
parent2a7326b5bbafac4c96bcdb944b2a773593030b96 (diff)
powerpc: 8xx: fix whitespace and indentation
Rolling forward PCMCIA driver, it was discovered that the indentation in existing one, as well as in BSP side are very odd. This patch is just result of Lindent run ontop of culprit files. Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Cc: Dominik Brodowski <linux@dominikbrodowski.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Kumar Gala <galak@gate.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/platforms/8xx/mpc885ads_setup.c125
1 files changed, 58 insertions, 67 deletions
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index dc27dab48df0..5a808d611ae3 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -40,7 +40,7 @@
40#include <asm/prom.h> 40#include <asm/prom.h>
41 41
42extern void cpm_reset(void); 42extern void cpm_reset(void);
43extern void mpc8xx_show_cpuinfo(struct seq_file*); 43extern void mpc8xx_show_cpuinfo(struct seq_file *);
44extern void mpc8xx_restart(char *cmd); 44extern void mpc8xx_restart(char *cmd);
45extern void mpc8xx_calibrate_decr(void); 45extern void mpc8xx_calibrate_decr(void);
46extern int mpc8xx_set_rtc_time(struct rtc_time *tm); 46extern int mpc8xx_set_rtc_time(struct rtc_time *tm);
@@ -48,9 +48,9 @@ extern void mpc8xx_get_rtc_time(struct rtc_time *tm);
48extern void m8xx_pic_init(void); 48extern void m8xx_pic_init(void);
49extern unsigned int mpc8xx_get_irq(void); 49extern unsigned int mpc8xx_get_irq(void);
50 50
51static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi); 51static void init_smc1_uart_ioports(struct fs_uart_platform_info *fpi);
52static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi); 52static void init_smc2_uart_ioports(struct fs_uart_platform_info *fpi);
53static void init_scc3_ioports(struct fs_platform_info* ptr); 53static void init_scc3_ioports(struct fs_platform_info *ptr);
54 54
55#ifdef CONFIG_PCMCIA_M8XX 55#ifdef CONFIG_PCMCIA_M8XX
56static void pcmcia_hw_setup(int slot, int enable) 56static void pcmcia_hw_setup(int slot, int enable)
@@ -73,7 +73,7 @@ static int pcmcia_set_voltage(int slot, int vcc, int vpp)
73 73
74 bcsr_io = ioremap(BCSR1, sizeof(unsigned long)); 74 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
75 75
76 switch(vcc) { 76 switch (vcc) {
77 case 0: 77 case 0:
78 break; 78 break;
79 case 33: 79 case 33:
@@ -86,12 +86,12 @@ static int pcmcia_set_voltage(int slot, int vcc, int vpp)
86 return 1; 86 return 1;
87 } 87 }
88 88
89 switch(vpp) { 89 switch (vpp) {
90 case 0: 90 case 0:
91 break; 91 break;
92 case 33: 92 case 33:
93 case 50: 93 case 50:
94 if(vcc == vpp) 94 if (vcc == vpp)
95 reg |= BCSR1_PCCVPP1; 95 reg |= BCSR1_PCCVPP1;
96 else 96 else
97 return 1; 97 return 1;
@@ -127,7 +127,7 @@ void __init mpc885ads_board_setup(void)
127#endif 127#endif
128 128
129 bcsr_io = ioremap(BCSR1, sizeof(unsigned long)); 129 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
130 cp = (cpm8xx_t *)immr_map(im_cpm); 130 cp = (cpm8xx_t *) immr_map(im_cpm);
131 131
132 if (bcsr_io == NULL) { 132 if (bcsr_io == NULL) {
133 printk(KERN_CRIT "Could not remap BCSR\n"); 133 printk(KERN_CRIT "Could not remap BCSR\n");
@@ -140,13 +140,13 @@ void __init mpc885ads_board_setup(void)
140 out_8(&(cp->cp_smc[0].smc_smcm), tmpval8); 140 out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
141 clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN); /* brg1 */ 141 clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN); /* brg1 */
142#else 142#else
143 setbits32(bcsr_io,BCSR1_RS232EN_1); 143 setbits32(bcsr_io, BCSR1_RS232EN_1);
144 out_be16(&cp->cp_smc[0].smc_smcmr, 0); 144 out_be16(&cp->cp_smc[0].smc_smcmr, 0);
145 out_8(&cp->cp_smc[0].smc_smce, 0); 145 out_8(&cp->cp_smc[0].smc_smce, 0);
146#endif 146#endif
147 147
148#ifdef CONFIG_SERIAL_CPM_SMC2 148#ifdef CONFIG_SERIAL_CPM_SMC2
149 clrbits32(bcsr_io,BCSR1_RS232EN_2); 149 clrbits32(bcsr_io, BCSR1_RS232EN_2);
150 clrbits32(&cp->cp_simode, 0xe0000000 >> 1); 150 clrbits32(&cp->cp_simode, 0xe0000000 >> 1);
151 setbits32(&cp->cp_simode, 0x20000000 >> 1); /* brg2 */ 151 setbits32(&cp->cp_simode, 0x20000000 >> 1); /* brg2 */
152 tmpval8 = in_8(&(cp->cp_smc[1].smc_smcm)) | (SMCM_RX | SMCM_TX); 152 tmpval8 = in_8(&(cp->cp_smc[1].smc_smcm)) | (SMCM_RX | SMCM_TX);
@@ -155,7 +155,7 @@ void __init mpc885ads_board_setup(void)
155 155
156 init_smc2_uart_ioports(0); 156 init_smc2_uart_ioports(0);
157#else 157#else
158 setbits32(bcsr_io,BCSR1_RS232EN_2); 158 setbits32(bcsr_io, BCSR1_RS232EN_2);
159 out_be16(&cp->cp_smc[1].smc_smcmr, 0); 159 out_be16(&cp->cp_smc[1].smc_smcmr, 0);
160 out_8(&cp->cp_smc[1].smc_smce, 0); 160 out_8(&cp->cp_smc[1].smc_smce, 0);
161#endif 161#endif
@@ -164,16 +164,16 @@ void __init mpc885ads_board_setup(void)
164 164
165#ifdef CONFIG_FS_ENET 165#ifdef CONFIG_FS_ENET
166 /* use MDC for MII (common) */ 166 /* use MDC for MII (common) */
167 io_port = (iop8xx_t*)immr_map(im_ioport); 167 io_port = (iop8xx_t *) immr_map(im_ioport);
168 setbits16(&io_port->iop_pdpar, 0x0080); 168 setbits16(&io_port->iop_pdpar, 0x0080);
169 clrbits16(&io_port->iop_pddir, 0x0080); 169 clrbits16(&io_port->iop_pddir, 0x0080);
170 170
171 bcsr_io = ioremap(BCSR5, sizeof(unsigned long)); 171 bcsr_io = ioremap(BCSR5, sizeof(unsigned long));
172 clrbits32(bcsr_io,BCSR5_MII1_EN); 172 clrbits32(bcsr_io, BCSR5_MII1_EN);
173 clrbits32(bcsr_io,BCSR5_MII1_RST); 173 clrbits32(bcsr_io, BCSR5_MII1_RST);
174#ifndef CONFIG_FC_ENET_HAS_SCC 174#ifndef CONFIG_FC_ENET_HAS_SCC
175 clrbits32(bcsr_io,BCSR5_MII2_EN); 175 clrbits32(bcsr_io, BCSR5_MII2_EN);
176 clrbits32(bcsr_io,BCSR5_MII2_RST); 176 clrbits32(bcsr_io, BCSR5_MII2_RST);
177 177
178#endif 178#endif
179 iounmap(bcsr_io); 179 iounmap(bcsr_io);
@@ -182,17 +182,16 @@ void __init mpc885ads_board_setup(void)
182#endif 182#endif
183 183
184#ifdef CONFIG_PCMCIA_M8XX 184#ifdef CONFIG_PCMCIA_M8XX
185 /*Set up board specific hook-ups*/ 185 /*Set up board specific hook-ups */
186 m8xx_pcmcia_ops.hw_ctrl = pcmcia_hw_setup; 186 m8xx_pcmcia_ops.hw_ctrl = pcmcia_hw_setup;
187 m8xx_pcmcia_ops.voltage_set = pcmcia_set_voltage; 187 m8xx_pcmcia_ops.voltage_set = pcmcia_set_voltage;
188#endif 188#endif
189} 189}
190 190
191 191static void init_fec1_ioports(struct fs_platform_info *ptr)
192static void init_fec1_ioports(struct fs_platform_info* ptr)
193{ 192{
194 cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm); 193 cpm8xx_t *cp = (cpm8xx_t *) immr_map(im_cpm);
195 iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport); 194 iop8xx_t *io_port = (iop8xx_t *) immr_map(im_ioport);
196 195
197 /* configure FEC1 pins */ 196 /* configure FEC1 pins */
198 setbits16(&io_port->iop_papar, 0xf830); 197 setbits16(&io_port->iop_papar, 0xf830);
@@ -214,11 +213,10 @@ static void init_fec1_ioports(struct fs_platform_info* ptr)
214 immr_unmap(cp); 213 immr_unmap(cp);
215} 214}
216 215
217 216static void init_fec2_ioports(struct fs_platform_info *ptr)
218static void init_fec2_ioports(struct fs_platform_info* ptr)
219{ 217{
220 cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm); 218 cpm8xx_t *cp = (cpm8xx_t *) immr_map(im_cpm);
221 iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport); 219 iop8xx_t *io_port = (iop8xx_t *) immr_map(im_ioport);
222 220
223 /* configure FEC2 pins */ 221 /* configure FEC2 pins */
224 setbits32(&cp->cp_pepar, 0x0003fffc); 222 setbits32(&cp->cp_pepar, 0x0003fffc);
@@ -248,15 +246,15 @@ void init_fec_ioports(struct fs_platform_info *fpi)
248 } 246 }
249} 247}
250 248
251static void init_scc3_ioports(struct fs_platform_info* fpi) 249static void init_scc3_ioports(struct fs_platform_info *fpi)
252{ 250{
253 unsigned *bcsr_io; 251 unsigned *bcsr_io;
254 iop8xx_t *io_port; 252 iop8xx_t *io_port;
255 cpm8xx_t *cp; 253 cpm8xx_t *cp;
256 254
257 bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE); 255 bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
258 io_port = (iop8xx_t *)immr_map(im_ioport); 256 io_port = (iop8xx_t *) immr_map(im_ioport);
259 cp = (cpm8xx_t *)immr_map(im_cpm); 257 cp = (cpm8xx_t *) immr_map(im_cpm);
260 258
261 if (bcsr_io == NULL) { 259 if (bcsr_io == NULL) {
262 printk(KERN_CRIT "Could not remap BCSR\n"); 260 printk(KERN_CRIT "Could not remap BCSR\n");
@@ -265,9 +263,9 @@ static void init_scc3_ioports(struct fs_platform_info* fpi)
265 263
266 /* Enable the PHY. 264 /* Enable the PHY.
267 */ 265 */
268 clrbits32(bcsr_io+4, BCSR4_ETH10_RST); 266 clrbits32(bcsr_io + 4, BCSR4_ETH10_RST);
269 udelay(1000); 267 udelay(1000);
270 setbits32(bcsr_io+4, BCSR4_ETH10_RST); 268 setbits32(bcsr_io + 4, BCSR4_ETH10_RST);
271 /* Configure port A pins for Txd and Rxd. 269 /* Configure port A pins for Txd and Rxd.
272 */ 270 */
273 setbits16(&io_port->iop_papar, PA_ENET_RXD | PA_ENET_TXD); 271 setbits16(&io_port->iop_papar, PA_ENET_RXD | PA_ENET_TXD);
@@ -283,8 +281,7 @@ static void init_scc3_ioports(struct fs_platform_info* fpi)
283 */ 281 */
284 setbits32(&cp->cp_pepar, PE_ENET_TCLK | PE_ENET_RCLK); 282 setbits32(&cp->cp_pepar, PE_ENET_TCLK | PE_ENET_RCLK);
285 clrbits32(&cp->cp_pepar, PE_ENET_TENA); 283 clrbits32(&cp->cp_pepar, PE_ENET_TENA);
286 clrbits32(&cp->cp_pedir, 284 clrbits32(&cp->cp_pedir, PE_ENET_TCLK | PE_ENET_RCLK | PE_ENET_TENA);
287 PE_ENET_TCLK | PE_ENET_RCLK | PE_ENET_TENA);
288 clrbits32(&cp->cp_peso, PE_ENET_TCLK | PE_ENET_RCLK); 285 clrbits32(&cp->cp_peso, PE_ENET_TCLK | PE_ENET_RCLK);
289 setbits32(&cp->cp_peso, PE_ENET_TENA); 286 setbits32(&cp->cp_peso, PE_ENET_TENA);
290 287
@@ -308,7 +305,7 @@ static void init_scc3_ioports(struct fs_platform_info* fpi)
308 clrbits32(&cp->cp_pedir, PE_ENET_TENA); 305 clrbits32(&cp->cp_pedir, PE_ENET_TENA);
309 setbits32(&cp->cp_peso, PE_ENET_TENA); 306 setbits32(&cp->cp_peso, PE_ENET_TENA);
310 307
311 setbits32(bcsr_io+4, BCSR1_ETHEN); 308 setbits32(bcsr_io + 4, BCSR1_ETHEN);
312 iounmap(bcsr_io); 309 iounmap(bcsr_io);
313 immr_unmap(io_port); 310 immr_unmap(io_port);
314 immr_unmap(cp); 311 immr_unmap(cp);
@@ -328,50 +325,48 @@ void init_scc_ioports(struct fs_platform_info *fpi)
328 } 325 }
329} 326}
330 327
331 328static void init_smc1_uart_ioports(struct fs_uart_platform_info *ptr)
332
333static void init_smc1_uart_ioports(struct fs_uart_platform_info* ptr)
334{ 329{
335 unsigned *bcsr_io; 330 unsigned *bcsr_io;
336 cpm8xx_t *cp; 331 cpm8xx_t *cp;
337 332
338 cp = (cpm8xx_t *)immr_map(im_cpm); 333 cp = (cpm8xx_t *) immr_map(im_cpm);
339 setbits32(&cp->cp_pepar, 0x000000c0); 334 setbits32(&cp->cp_pepar, 0x000000c0);
340 clrbits32(&cp->cp_pedir, 0x000000c0); 335 clrbits32(&cp->cp_pedir, 0x000000c0);
341 clrbits32(&cp->cp_peso, 0x00000040); 336 clrbits32(&cp->cp_peso, 0x00000040);
342 setbits32(&cp->cp_peso, 0x00000080); 337 setbits32(&cp->cp_peso, 0x00000080);
343 immr_unmap(cp); 338 immr_unmap(cp);
344 339
345 bcsr_io = ioremap(BCSR1, sizeof(unsigned long)); 340 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
346 341
347 if (bcsr_io == NULL) { 342 if (bcsr_io == NULL) {
348 printk(KERN_CRIT "Could not remap BCSR1\n"); 343 printk(KERN_CRIT "Could not remap BCSR1\n");
349 return; 344 return;
350 } 345 }
351 clrbits32(bcsr_io,BCSR1_RS232EN_1); 346 clrbits32(bcsr_io, BCSR1_RS232EN_1);
352 iounmap(bcsr_io); 347 iounmap(bcsr_io);
353} 348}
354 349
355static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi) 350static void init_smc2_uart_ioports(struct fs_uart_platform_info *fpi)
356{ 351{
357 unsigned *bcsr_io; 352 unsigned *bcsr_io;
358 cpm8xx_t *cp; 353 cpm8xx_t *cp;
359 354
360 cp = (cpm8xx_t *)immr_map(im_cpm); 355 cp = (cpm8xx_t *) immr_map(im_cpm);
361 setbits32(&cp->cp_pepar, 0x00000c00); 356 setbits32(&cp->cp_pepar, 0x00000c00);
362 clrbits32(&cp->cp_pedir, 0x00000c00); 357 clrbits32(&cp->cp_pedir, 0x00000c00);
363 clrbits32(&cp->cp_peso, 0x00000400); 358 clrbits32(&cp->cp_peso, 0x00000400);
364 setbits32(&cp->cp_peso, 0x00000800); 359 setbits32(&cp->cp_peso, 0x00000800);
365 immr_unmap(cp); 360 immr_unmap(cp);
366 361
367 bcsr_io = ioremap(BCSR1, sizeof(unsigned long)); 362 bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
368 363
369 if (bcsr_io == NULL) { 364 if (bcsr_io == NULL) {
370 printk(KERN_CRIT "Could not remap BCSR1\n"); 365 printk(KERN_CRIT "Could not remap BCSR1\n");
371 return; 366 return;
372 } 367 }
373 clrbits32(bcsr_io,BCSR1_RS232EN_2); 368 clrbits32(bcsr_io, BCSR1_RS232EN_2);
374 iounmap(bcsr_io); 369 iounmap(bcsr_io);
375} 370}
376 371
377void init_smc_ioports(struct fs_uart_platform_info *data) 372void init_smc_ioports(struct fs_uart_platform_info *data)
@@ -444,15 +439,11 @@ static int __init mpc885ads_probe(void)
444 return 1; 439 return 1;
445} 440}
446 441
447define_machine(mpc885_ads) { 442define_machine(mpc885_ads)
448 .name = "MPC885 ADS", 443{
449 .probe = mpc885ads_probe, 444.name = "MPC885 ADS",.probe = mpc885ads_probe,.setup_arch =
450 .setup_arch = mpc885ads_setup_arch, 445 mpc885ads_setup_arch,.init_IRQ =
451 .init_IRQ = m8xx_pic_init, 446 m8xx_pic_init,.show_cpuinfo = mpc8xx_show_cpuinfo,.get_irq =
452 .show_cpuinfo = mpc8xx_show_cpuinfo, 447 mpc8xx_get_irq,.restart = mpc8xx_restart,.calibrate_decr =
453 .get_irq = mpc8xx_get_irq, 448 mpc8xx_calibrate_decr,.set_rtc_time =
454 .restart = mpc8xx_restart, 449 mpc8xx_set_rtc_time,.get_rtc_time = mpc8xx_get_rtc_time,};
455 .calibrate_decr = mpc8xx_calibrate_decr,
456 .set_rtc_time = mpc8xx_set_rtc_time,
457 .get_rtc_time = mpc8xx_get_rtc_time,
458};