diff options
author | Stephen Rothwell <sfr@canb.auug.org.au> | 2006-06-27 21:55:49 -0400 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-06-28 01:19:00 -0400 |
commit | 127efeb286bb772019236182a1b4fc14ff2ae00c (patch) | |
tree | b33c93d9a076ee4d194124b3167f6fbd91b46b61 /arch/powerpc | |
parent | a240da35a1087804cbdc3faba949445e64d1eecb (diff) |
[POWERPC] Consolidate some of kernel/misc*.S
There were some common functions (mainly i/o).
Also some small white space cleanups and remove a couple of small unused
functions.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/kernel/Makefile | 3 | ||||
-rw-r--r-- | arch/powerpc/kernel/misc.S | 203 | ||||
-rw-r--r-- | arch/powerpc/kernel/misc_32.S | 156 | ||||
-rw-r--r-- | arch/powerpc/kernel/misc_64.S | 181 |
4 files changed, 209 insertions, 334 deletions
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 803858e86160..814f242aeb8c 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -50,7 +50,8 @@ extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o | |||
50 | extra-$(CONFIG_8xx) := head_8xx.o | 50 | extra-$(CONFIG_8xx) := head_8xx.o |
51 | extra-y += vmlinux.lds | 51 | extra-y += vmlinux.lds |
52 | 52 | ||
53 | obj-y += time.o prom.o traps.o setup-common.o udbg.o | 53 | obj-y += time.o prom.o traps.o setup-common.o \ |
54 | udbg.o misc.o | ||
54 | obj-$(CONFIG_PPC32) += entry_32.o setup_32.o misc_32.o | 55 | obj-$(CONFIG_PPC32) += entry_32.o setup_32.o misc_32.o |
55 | obj-$(CONFIG_PPC64) += misc_64.o dma_64.o iommu.o | 56 | obj-$(CONFIG_PPC64) += misc_64.o dma_64.o iommu.o |
56 | obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o | 57 | obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o |
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S new file mode 100644 index 000000000000..fc23040d5a26 --- /dev/null +++ b/arch/powerpc/kernel/misc.S | |||
@@ -0,0 +1,203 @@ | |||
1 | /* | ||
2 | * This file contains miscellaneous low-level functions. | ||
3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | ||
4 | * | ||
5 | * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) | ||
6 | * and Paul Mackerras. | ||
7 | * | ||
8 | * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com) | ||
9 | * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or | ||
12 | * modify it under the terms of the GNU General Public License | ||
13 | * as published by the Free Software Foundation; either version | ||
14 | * 2 of the License, or (at your option) any later version. | ||
15 | */ | ||
16 | #include <asm/ppc_asm.h> | ||
17 | |||
18 | .text | ||
19 | |||
20 | #ifdef CONFIG_PPC64 | ||
21 | #define IN_SYNC twi 0,r5,0; isync | ||
22 | #define EIEIO_32 | ||
23 | #define SYNC_64 sync | ||
24 | #else /* CONFIG_PPC32 */ | ||
25 | #define IN_SYNC | ||
26 | #define EIEIO_32 eieio | ||
27 | #define SYNC_64 | ||
28 | #endif | ||
29 | /* | ||
30 | * Returns (address we are running at) - (address we were linked at) | ||
31 | * for use before the text and data are mapped to KERNELBASE. | ||
32 | */ | ||
33 | |||
34 | _GLOBAL(reloc_offset) | ||
35 | mflr r0 | ||
36 | bl 1f | ||
37 | 1: mflr r3 | ||
38 | LOAD_REG_IMMEDIATE(r4,1b) | ||
39 | subf r3,r4,r3 | ||
40 | mtlr r0 | ||
41 | blr | ||
42 | |||
43 | /* | ||
44 | * add_reloc_offset(x) returns x + reloc_offset(). | ||
45 | */ | ||
46 | _GLOBAL(add_reloc_offset) | ||
47 | mflr r0 | ||
48 | bl 1f | ||
49 | 1: mflr r5 | ||
50 | LOAD_REG_IMMEDIATE(r4,1b) | ||
51 | subf r5,r4,r5 | ||
52 | add r3,r3,r5 | ||
53 | mtlr r0 | ||
54 | blr | ||
55 | |||
56 | /* | ||
57 | * I/O string operations | ||
58 | * | ||
59 | * insb(port, buf, len) | ||
60 | * outsb(port, buf, len) | ||
61 | * insw(port, buf, len) | ||
62 | * outsw(port, buf, len) | ||
63 | * insl(port, buf, len) | ||
64 | * outsl(port, buf, len) | ||
65 | * insw_ns(port, buf, len) | ||
66 | * outsw_ns(port, buf, len) | ||
67 | * insl_ns(port, buf, len) | ||
68 | * outsl_ns(port, buf, len) | ||
69 | * | ||
70 | * The *_ns versions don't do byte-swapping. | ||
71 | */ | ||
72 | _GLOBAL(_insb) | ||
73 | cmpwi 0,r5,0 | ||
74 | mtctr r5 | ||
75 | subi r4,r4,1 | ||
76 | blelr- | ||
77 | 00: lbz r5,0(r3) | ||
78 | eieio | ||
79 | stbu r5,1(r4) | ||
80 | bdnz 00b | ||
81 | IN_SYNC | ||
82 | blr | ||
83 | |||
84 | _GLOBAL(_outsb) | ||
85 | cmpwi 0,r5,0 | ||
86 | mtctr r5 | ||
87 | subi r4,r4,1 | ||
88 | blelr- | ||
89 | 00: lbzu r5,1(r4) | ||
90 | stb r5,0(r3) | ||
91 | EIEIO_32 | ||
92 | bdnz 00b | ||
93 | SYNC_64 | ||
94 | blr | ||
95 | |||
96 | _GLOBAL(_insw) | ||
97 | cmpwi 0,r5,0 | ||
98 | mtctr r5 | ||
99 | subi r4,r4,2 | ||
100 | blelr- | ||
101 | 00: lhbrx r5,0,r3 | ||
102 | eieio | ||
103 | sthu r5,2(r4) | ||
104 | bdnz 00b | ||
105 | IN_SYNC | ||
106 | blr | ||
107 | |||
108 | _GLOBAL(_outsw) | ||
109 | cmpwi 0,r5,0 | ||
110 | mtctr r5 | ||
111 | subi r4,r4,2 | ||
112 | blelr- | ||
113 | 00: lhzu r5,2(r4) | ||
114 | EIEIO_32 | ||
115 | sthbrx r5,0,r3 | ||
116 | bdnz 00b | ||
117 | SYNC_64 | ||
118 | blr | ||
119 | |||
120 | _GLOBAL(_insl) | ||
121 | cmpwi 0,r5,0 | ||
122 | mtctr r5 | ||
123 | subi r4,r4,4 | ||
124 | blelr- | ||
125 | 00: lwbrx r5,0,r3 | ||
126 | eieio | ||
127 | stwu r5,4(r4) | ||
128 | bdnz 00b | ||
129 | IN_SYNC | ||
130 | blr | ||
131 | |||
132 | _GLOBAL(_outsl) | ||
133 | cmpwi 0,r5,0 | ||
134 | mtctr r5 | ||
135 | subi r4,r4,4 | ||
136 | blelr- | ||
137 | 00: lwzu r5,4(r4) | ||
138 | stwbrx r5,0,r3 | ||
139 | EIEIO_32 | ||
140 | bdnz 00b | ||
141 | SYNC_64 | ||
142 | blr | ||
143 | |||
144 | #ifdef CONFIG_PPC32 | ||
145 | _GLOBAL(__ide_mm_insw) | ||
146 | #endif | ||
147 | _GLOBAL(_insw_ns) | ||
148 | cmpwi 0,r5,0 | ||
149 | mtctr r5 | ||
150 | subi r4,r4,2 | ||
151 | blelr- | ||
152 | 00: lhz r5,0(r3) | ||
153 | eieio | ||
154 | sthu r5,2(r4) | ||
155 | bdnz 00b | ||
156 | IN_SYNC | ||
157 | blr | ||
158 | |||
159 | #ifdef CONFIG_PPC32 | ||
160 | _GLOBAL(__ide_mm_outsw) | ||
161 | #endif | ||
162 | _GLOBAL(_outsw_ns) | ||
163 | cmpwi 0,r5,0 | ||
164 | mtctr r5 | ||
165 | subi r4,r4,2 | ||
166 | blelr- | ||
167 | 00: lhzu r5,2(r4) | ||
168 | sth r5,0(r3) | ||
169 | EIEIO_32 | ||
170 | bdnz 00b | ||
171 | SYNC_64 | ||
172 | blr | ||
173 | |||
174 | #ifdef CONFIG_PPC32 | ||
175 | _GLOBAL(__ide_mm_insl) | ||
176 | #endif | ||
177 | _GLOBAL(_insl_ns) | ||
178 | cmpwi 0,r5,0 | ||
179 | mtctr r5 | ||
180 | subi r4,r4,4 | ||
181 | blelr- | ||
182 | 00: lwz r5,0(r3) | ||
183 | eieio | ||
184 | stwu r5,4(r4) | ||
185 | bdnz 00b | ||
186 | IN_SYNC | ||
187 | blr | ||
188 | |||
189 | #ifdef CONFIG_PPC32 | ||
190 | _GLOBAL(__ide_mm_outsl) | ||
191 | #endif | ||
192 | _GLOBAL(_outsl_ns) | ||
193 | cmpwi 0,r5,0 | ||
194 | mtctr r5 | ||
195 | subi r4,r4,4 | ||
196 | blelr- | ||
197 | 00: lwzu r5,4(r4) | ||
198 | stw r5,0(r3) | ||
199 | EIEIO_32 | ||
200 | bdnz 00b | ||
201 | SYNC_64 | ||
202 | blr | ||
203 | |||
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 01d3916c4cb1..c74774e2175d 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
@@ -61,32 +61,6 @@ _GLOBAL(mulhdu) | |||
61 | blr | 61 | blr |
62 | 62 | ||
63 | /* | 63 | /* |
64 | * Returns (address we're running at) - (address we were linked at) | ||
65 | * for use before the text and data are mapped to KERNELBASE. | ||
66 | */ | ||
67 | _GLOBAL(reloc_offset) | ||
68 | mflr r0 | ||
69 | bl 1f | ||
70 | 1: mflr r3 | ||
71 | LOAD_REG_IMMEDIATE(r4,1b) | ||
72 | subf r3,r4,r3 | ||
73 | mtlr r0 | ||
74 | blr | ||
75 | |||
76 | /* | ||
77 | * add_reloc_offset(x) returns x + reloc_offset(). | ||
78 | */ | ||
79 | _GLOBAL(add_reloc_offset) | ||
80 | mflr r0 | ||
81 | bl 1f | ||
82 | 1: mflr r5 | ||
83 | LOAD_REG_IMMEDIATE(r4,1b) | ||
84 | subf r5,r4,r5 | ||
85 | add r3,r3,r5 | ||
86 | mtlr r0 | ||
87 | blr | ||
88 | |||
89 | /* | ||
90 | * sub_reloc_offset(x) returns x - reloc_offset(). | 64 | * sub_reloc_offset(x) returns x - reloc_offset(). |
91 | */ | 65 | */ |
92 | _GLOBAL(sub_reloc_offset) | 66 | _GLOBAL(sub_reloc_offset) |
@@ -781,136 +755,6 @@ _GLOBAL(atomic_set_mask) | |||
781 | blr | 755 | blr |
782 | 756 | ||
783 | /* | 757 | /* |
784 | * I/O string operations | ||
785 | * | ||
786 | * insb(port, buf, len) | ||
787 | * outsb(port, buf, len) | ||
788 | * insw(port, buf, len) | ||
789 | * outsw(port, buf, len) | ||
790 | * insl(port, buf, len) | ||
791 | * outsl(port, buf, len) | ||
792 | * insw_ns(port, buf, len) | ||
793 | * outsw_ns(port, buf, len) | ||
794 | * insl_ns(port, buf, len) | ||
795 | * outsl_ns(port, buf, len) | ||
796 | * | ||
797 | * The *_ns versions don't do byte-swapping. | ||
798 | */ | ||
799 | _GLOBAL(_insb) | ||
800 | cmpwi 0,r5,0 | ||
801 | mtctr r5 | ||
802 | subi r4,r4,1 | ||
803 | blelr- | ||
804 | 00: lbz r5,0(r3) | ||
805 | eieio | ||
806 | stbu r5,1(r4) | ||
807 | bdnz 00b | ||
808 | blr | ||
809 | |||
810 | _GLOBAL(_outsb) | ||
811 | cmpwi 0,r5,0 | ||
812 | mtctr r5 | ||
813 | subi r4,r4,1 | ||
814 | blelr- | ||
815 | 00: lbzu r5,1(r4) | ||
816 | stb r5,0(r3) | ||
817 | eieio | ||
818 | bdnz 00b | ||
819 | blr | ||
820 | |||
821 | _GLOBAL(_insw) | ||
822 | cmpwi 0,r5,0 | ||
823 | mtctr r5 | ||
824 | subi r4,r4,2 | ||
825 | blelr- | ||
826 | 00: lhbrx r5,0,r3 | ||
827 | eieio | ||
828 | sthu r5,2(r4) | ||
829 | bdnz 00b | ||
830 | blr | ||
831 | |||
832 | _GLOBAL(_outsw) | ||
833 | cmpwi 0,r5,0 | ||
834 | mtctr r5 | ||
835 | subi r4,r4,2 | ||
836 | blelr- | ||
837 | 00: lhzu r5,2(r4) | ||
838 | eieio | ||
839 | sthbrx r5,0,r3 | ||
840 | bdnz 00b | ||
841 | blr | ||
842 | |||
843 | _GLOBAL(_insl) | ||
844 | cmpwi 0,r5,0 | ||
845 | mtctr r5 | ||
846 | subi r4,r4,4 | ||
847 | blelr- | ||
848 | 00: lwbrx r5,0,r3 | ||
849 | eieio | ||
850 | stwu r5,4(r4) | ||
851 | bdnz 00b | ||
852 | blr | ||
853 | |||
854 | _GLOBAL(_outsl) | ||
855 | cmpwi 0,r5,0 | ||
856 | mtctr r5 | ||
857 | subi r4,r4,4 | ||
858 | blelr- | ||
859 | 00: lwzu r5,4(r4) | ||
860 | stwbrx r5,0,r3 | ||
861 | eieio | ||
862 | bdnz 00b | ||
863 | blr | ||
864 | |||
865 | _GLOBAL(__ide_mm_insw) | ||
866 | _GLOBAL(_insw_ns) | ||
867 | cmpwi 0,r5,0 | ||
868 | mtctr r5 | ||
869 | subi r4,r4,2 | ||
870 | blelr- | ||
871 | 00: lhz r5,0(r3) | ||
872 | eieio | ||
873 | sthu r5,2(r4) | ||
874 | bdnz 00b | ||
875 | blr | ||
876 | |||
877 | _GLOBAL(__ide_mm_outsw) | ||
878 | _GLOBAL(_outsw_ns) | ||
879 | cmpwi 0,r5,0 | ||
880 | mtctr r5 | ||
881 | subi r4,r4,2 | ||
882 | blelr- | ||
883 | 00: lhzu r5,2(r4) | ||
884 | sth r5,0(r3) | ||
885 | eieio | ||
886 | bdnz 00b | ||
887 | blr | ||
888 | |||
889 | _GLOBAL(__ide_mm_insl) | ||
890 | _GLOBAL(_insl_ns) | ||
891 | cmpwi 0,r5,0 | ||
892 | mtctr r5 | ||
893 | subi r4,r4,4 | ||
894 | blelr- | ||
895 | 00: lwz r5,0(r3) | ||
896 | eieio | ||
897 | stwu r5,4(r4) | ||
898 | bdnz 00b | ||
899 | blr | ||
900 | |||
901 | _GLOBAL(__ide_mm_outsl) | ||
902 | _GLOBAL(_outsl_ns) | ||
903 | cmpwi 0,r5,0 | ||
904 | mtctr r5 | ||
905 | subi r4,r4,4 | ||
906 | blelr- | ||
907 | 00: lwzu r5,4(r4) | ||
908 | stw r5,0(r3) | ||
909 | eieio | ||
910 | bdnz 00b | ||
911 | blr | ||
912 | |||
913 | /* | ||
914 | * Extended precision shifts. | 758 | * Extended precision shifts. |
915 | * | 759 | * |
916 | * Updated to be valid for shift counts from 0 to 63 inclusive. | 760 | * Updated to be valid for shift counts from 0 to 63 inclusive. |
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 6bf4a4637209..580891cb8ccb 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S | |||
@@ -1,14 +1,12 @@ | |||
1 | /* | 1 | /* |
2 | * arch/powerpc/kernel/misc64.S | ||
3 | * | ||
4 | * This file contains miscellaneous low-level functions. | 2 | * This file contains miscellaneous low-level functions. |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | 3 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
6 | * | 4 | * |
7 | * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) | 5 | * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) |
8 | * and Paul Mackerras. | 6 | * and Paul Mackerras. |
9 | * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com) | 7 | * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com) |
10 | * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) | 8 | * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com) |
11 | * | 9 | * |
12 | * This program is free software; you can redistribute it and/or | 10 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 11 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version | 12 | * as published by the Free Software Foundation; either version |
@@ -30,41 +28,10 @@ | |||
30 | 28 | ||
31 | .text | 29 | .text |
32 | 30 | ||
33 | /* | ||
34 | * Returns (address we are running at) - (address we were linked at) | ||
35 | * for use before the text and data are mapped to KERNELBASE. | ||
36 | */ | ||
37 | |||
38 | _GLOBAL(reloc_offset) | ||
39 | mflr r0 | ||
40 | bl 1f | ||
41 | 1: mflr r3 | ||
42 | LOAD_REG_IMMEDIATE(r4,1b) | ||
43 | subf r3,r4,r3 | ||
44 | mtlr r0 | ||
45 | blr | ||
46 | |||
47 | /* | ||
48 | * add_reloc_offset(x) returns x + reloc_offset(). | ||
49 | */ | ||
50 | _GLOBAL(add_reloc_offset) | ||
51 | mflr r0 | ||
52 | bl 1f | ||
53 | 1: mflr r5 | ||
54 | LOAD_REG_IMMEDIATE(r4,1b) | ||
55 | subf r5,r4,r5 | ||
56 | add r3,r3,r5 | ||
57 | mtlr r0 | ||
58 | blr | ||
59 | |||
60 | _GLOBAL(get_msr) | 31 | _GLOBAL(get_msr) |
61 | mfmsr r3 | 32 | mfmsr r3 |
62 | blr | 33 | blr |
63 | 34 | ||
64 | _GLOBAL(get_dar) | ||
65 | mfdar r3 | ||
66 | blr | ||
67 | |||
68 | _GLOBAL(get_srr0) | 35 | _GLOBAL(get_srr0) |
69 | mfsrr0 r3 | 36 | mfsrr0 r3 |
70 | blr | 37 | blr |
@@ -72,10 +39,6 @@ _GLOBAL(get_srr0) | |||
72 | _GLOBAL(get_srr1) | 39 | _GLOBAL(get_srr1) |
73 | mfsrr1 r3 | 40 | mfsrr1 r3 |
74 | blr | 41 | blr |
75 | |||
76 | _GLOBAL(get_sp) | ||
77 | mr r3,r1 | ||
78 | blr | ||
79 | 42 | ||
80 | #ifdef CONFIG_IRQSTACKS | 43 | #ifdef CONFIG_IRQSTACKS |
81 | _GLOBAL(call_do_softirq) | 44 | _GLOBAL(call_do_softirq) |
@@ -281,144 +244,6 @@ _GLOBAL(__flush_dcache_icache) | |||
281 | bdnz 1b | 244 | bdnz 1b |
282 | isync | 245 | isync |
283 | blr | 246 | blr |
284 | |||
285 | /* | ||
286 | * I/O string operations | ||
287 | * | ||
288 | * insb(port, buf, len) | ||
289 | * outsb(port, buf, len) | ||
290 | * insw(port, buf, len) | ||
291 | * outsw(port, buf, len) | ||
292 | * insl(port, buf, len) | ||
293 | * outsl(port, buf, len) | ||
294 | * insw_ns(port, buf, len) | ||
295 | * outsw_ns(port, buf, len) | ||
296 | * insl_ns(port, buf, len) | ||
297 | * outsl_ns(port, buf, len) | ||
298 | * | ||
299 | * The *_ns versions don't do byte-swapping. | ||
300 | */ | ||
301 | _GLOBAL(_insb) | ||
302 | cmpwi 0,r5,0 | ||
303 | mtctr r5 | ||
304 | subi r4,r4,1 | ||
305 | blelr- | ||
306 | 00: lbz r5,0(r3) | ||
307 | eieio | ||
308 | stbu r5,1(r4) | ||
309 | bdnz 00b | ||
310 | twi 0,r5,0 | ||
311 | isync | ||
312 | blr | ||
313 | |||
314 | _GLOBAL(_outsb) | ||
315 | cmpwi 0,r5,0 | ||
316 | mtctr r5 | ||
317 | subi r4,r4,1 | ||
318 | blelr- | ||
319 | 00: lbzu r5,1(r4) | ||
320 | stb r5,0(r3) | ||
321 | bdnz 00b | ||
322 | sync | ||
323 | blr | ||
324 | |||
325 | _GLOBAL(_insw) | ||
326 | cmpwi 0,r5,0 | ||
327 | mtctr r5 | ||
328 | subi r4,r4,2 | ||
329 | blelr- | ||
330 | 00: lhbrx r5,0,r3 | ||
331 | eieio | ||
332 | sthu r5,2(r4) | ||
333 | bdnz 00b | ||
334 | twi 0,r5,0 | ||
335 | isync | ||
336 | blr | ||
337 | |||
338 | _GLOBAL(_outsw) | ||
339 | cmpwi 0,r5,0 | ||
340 | mtctr r5 | ||
341 | subi r4,r4,2 | ||
342 | blelr- | ||
343 | 00: lhzu r5,2(r4) | ||
344 | sthbrx r5,0,r3 | ||
345 | bdnz 00b | ||
346 | sync | ||
347 | blr | ||
348 | |||
349 | _GLOBAL(_insl) | ||
350 | cmpwi 0,r5,0 | ||
351 | mtctr r5 | ||
352 | subi r4,r4,4 | ||
353 | blelr- | ||
354 | 00: lwbrx r5,0,r3 | ||
355 | eieio | ||
356 | stwu r5,4(r4) | ||
357 | bdnz 00b | ||
358 | twi 0,r5,0 | ||
359 | isync | ||
360 | blr | ||
361 | |||
362 | _GLOBAL(_outsl) | ||
363 | cmpwi 0,r5,0 | ||
364 | mtctr r5 | ||
365 | subi r4,r4,4 | ||
366 | blelr- | ||
367 | 00: lwzu r5,4(r4) | ||
368 | stwbrx r5,0,r3 | ||
369 | bdnz 00b | ||
370 | sync | ||
371 | blr | ||
372 | |||
373 | /* _GLOBAL(ide_insw) now in drivers/ide/ide-iops.c */ | ||
374 | _GLOBAL(_insw_ns) | ||
375 | cmpwi 0,r5,0 | ||
376 | mtctr r5 | ||
377 | subi r4,r4,2 | ||
378 | blelr- | ||
379 | 00: lhz r5,0(r3) | ||
380 | eieio | ||
381 | sthu r5,2(r4) | ||
382 | bdnz 00b | ||
383 | twi 0,r5,0 | ||
384 | isync | ||
385 | blr | ||
386 | |||
387 | /* _GLOBAL(ide_outsw) now in drivers/ide/ide-iops.c */ | ||
388 | _GLOBAL(_outsw_ns) | ||
389 | cmpwi 0,r5,0 | ||
390 | mtctr r5 | ||
391 | subi r4,r4,2 | ||
392 | blelr- | ||
393 | 00: lhzu r5,2(r4) | ||
394 | sth r5,0(r3) | ||
395 | bdnz 00b | ||
396 | sync | ||
397 | blr | ||
398 | |||
399 | _GLOBAL(_insl_ns) | ||
400 | cmpwi 0,r5,0 | ||
401 | mtctr r5 | ||
402 | subi r4,r4,4 | ||
403 | blelr- | ||
404 | 00: lwz r5,0(r3) | ||
405 | eieio | ||
406 | stwu r5,4(r4) | ||
407 | bdnz 00b | ||
408 | twi 0,r5,0 | ||
409 | isync | ||
410 | blr | ||
411 | |||
412 | _GLOBAL(_outsl_ns) | ||
413 | cmpwi 0,r5,0 | ||
414 | mtctr r5 | ||
415 | subi r4,r4,4 | ||
416 | blelr- | ||
417 | 00: lwzu r5,4(r4) | ||
418 | stw r5,0(r3) | ||
419 | bdnz 00b | ||
420 | sync | ||
421 | blr | ||
422 | 247 | ||
423 | /* | 248 | /* |
424 | * identify_cpu and calls setup_cpu | 249 | * identify_cpu and calls setup_cpu |
@@ -563,6 +388,7 @@ _GLOBAL(real_writeb) | |||
563 | blr | 388 | blr |
564 | #endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */ | 389 | #endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */ |
565 | 390 | ||
391 | #ifdef CONFIG_CPU_FREQ_PMAC64 | ||
566 | /* | 392 | /* |
567 | * SCOM access functions for 970 (FX only for now) | 393 | * SCOM access functions for 970 (FX only for now) |
568 | * | 394 | * |
@@ -631,6 +457,7 @@ _GLOBAL(scom970_write) | |||
631 | /* restore interrupts */ | 457 | /* restore interrupts */ |
632 | mtmsrd r5,1 | 458 | mtmsrd r5,1 |
633 | blr | 459 | blr |
460 | #endif /* CONFIG_CPU_FREQ_PMAC64 */ | ||
634 | 461 | ||
635 | 462 | ||
636 | /* | 463 | /* |